diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 5760949758920f4ca916f2a412fcd9d1a8a14c6b..de867bbebfaa681d13a77cbabf79fac4fd968e7f 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -204,6 +204,8 @@ deploy-job-ZCU104:      # This job runs in the deploy stage.
   environment: production
   script:
     - echo "Deploying application to ZCU104"
+    # list all tests and write list to fpga_tests file
+    - find nanosoc_tech/testcodes/*/*.hex > fpga_tests
     # start a detached terminal so that the xilinx environment can be opened without interferring w
     - screen -dmS zynq -L -Logfile screenlog
     - sleep 5
@@ -216,10 +218,13 @@ deploy-job-ZCU104:      # This job runs in the deploy stage.
     # use scp to copy over bit files and python script
     - screen -r zynq -X stuff "scp -i ~/.ssh/id_rsa dwn1c21@soclabs.soton.ac.uk:~/builds/wzndG1mA/0/soclabs/aes-128-project/nanosoc_tech/fpga/ci_tools/load_bitfile.py ./ \n"
     - sleep 2
-    - screen -r zynq -X stuff "scp -i ~/.ssh/id_rsa dwn1c21@soclabs.soton.ac.uk:~/builds/wzndG1mA/0/soclabs/aes-128-project/imp/fpga/output/pynq_zcu104/overlays/nanosoc_design.bit ./pynq/overlays/soclabs/design_1.bit \n"
+    - screen -r zynq -X stuff "scp -i ~/.ssh/id_rsa dwn1c21@soclabs.soton.ac.uk:~/builds/wzndG1mA/0/soclabs/aes-128-project/imp/fpga/output/pynq_zcu104/overlays/nanosoc_design.* ./pynq/overlays/soclabs/ \n"
     - sleep 2
-    - screen -r zynq -X stuff "scp -i ~/.ssh/id_rsa dwn1c21@soclabs.soton.ac.uk:~/builds/wzndG1mA/0/soclabs/aes-128-project/imp/fpga/output/pynq_zcu104/overlays/nanosoc_design.hwh ./pynq/overlays/soclabs/design_1.hwh \n"
+    - screen -r zynq -X stuff "scp -i ~/.ssh/id_rsa dwn1c21@soclabs.soton.ac.uk:~/builds/wzndG1mA/0/soclabs/aes-128-project/fpga_tests ./ \n"
     - sleep 2
+    - screen -r zynq -X stuff "mkdir binaries\n"
+    - screen -r zynq -X stuff "scp -i ~/.ssh/id_rsa dwn1c21@soclabs.soton.ac.uk:~/builds/wzndG1mA/0/soclabs/aes-128-project/nanosoc_tech/testcodes/*/*.hex ./binaries/ \n"
+    - sleep 10
     # Need root access to load the overlay onto the FPGA
     - screen -r zynq -X stuff "sudo su\n"
     - sleep 1
@@ -228,18 +233,16 @@ deploy-job-ZCU104:      # This job runs in the deploy stage.
     - screen -r zynq -X stuff "source /etc/profile.d/xrt_setup.sh \n"
     - screen -r zynq -X stuff "source /etc/profile.d/boardname.sh \n"
     - sleep 5
-    # run load_bitfile: this loads the overlay and checks that it has been loaded
+    # run run_full_verification: this loads the overlay and checks that it has been loaded
     # script will output "Overlay Loaded" if successful
-    - screen -r zynq -X stuff "python3 load_bitfile.py \n"
-    - sleep 40
+    - screen -r zynq -X stuff "python run_full_verification.py \n"
+    - while ! grep -q "ALL TESTS FINISHED" screenlog; do sleep 10; done
+    - screep -r zynq -X stuff "scp -i ~/.ssh/id_rsa verification_log dwn1c21@soclabs.soton.ac.uk:~/SoC-Labs/accelerator-project/ \n"
     # deactivate the pynq virtual environment and exit root access
     - screen -r zynq -X stuff "deactivate \n"
     - screen -r zynq -X stuff "exit \n"
-    # test the screenlog for "Overlay Loaded"
-    - cp ./nanosoc_tech/fpga/ci_tools/test_bitfile_ZCU104.sh ./
-    - chmod +x test_bitfile_ZCU104.sh
-    - ./test_bitfile_ZCU104.sh
-
+    # Display test results
+    - cat verification_log
   after_script:
     # cleanup xilinx directories and quit screen
     - screen -r zynq -X stuff "rm load_bitfile.py \n"