diff --git a/accelerator-wrapper b/accelerator-wrapper
index ed24acbb029a15213b628101f59c3e05d22c86c0..89c275741c13d77d87eff97825677bbb4d444bb4 160000
--- a/accelerator-wrapper
+++ b/accelerator-wrapper
@@ -1 +1 @@
-Subproject commit ed24acbb029a15213b628101f59c3e05d22c86c0
+Subproject commit 89c275741c13d77d87eff97825677bbb4d444bb4
diff --git a/simulate/socsim/wrapper_sha256_hashing_stream.sh b/simulate/socsim/wrapper_sha256_hashing_stream.sh
new file mode 100755
index 0000000000000000000000000000000000000000..008ebf22680bfc6751c8efc8be8bc0d953e05d48
--- /dev/null
+++ b/simulate/socsim/wrapper_sha256_hashing_stream.sh
@@ -0,0 +1,16 @@
+#-----------------------------------------------------------------------------
+# SoC Labs icarus verilog simulation script for engine testbench
+# A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
+#
+# Contributors
+#
+# David Mapstone (d.a.mapstone@soton.ac.uk)
+#
+# Copyright  2022, SoC Labs (www.soclabs.org)
+#-----------------------------------------------------------------------------
+
+#!/usr/bin/env bash
+
+mkdir -p $SOC_TOP_DIR/simulate/sim/ 
+iverilog -c $ACC_WRAPPER_DIR/flist/accelerator_wrapper.flist -c $ACC_WRAPPER_DIR/flist/ahb_ip.flist -c $ACC_ENGINE_DIR/flist/*.flist -I $ACC_WRAPPER_DIR/hdl/verif/ -I $ACC_WRAPPER_DIR/hdl/verif/submodules -I $ACC_WRAPPER_DIR/hdl/src/ -I $ACC_ENGINE_DIR/hdl/src/ -g2012 -o $SOC_TOP_DIR/simulate/sim/wrapper_sha256_hashing_stream.vvp $ACC_WRAPPER_DIR/hdl/verif/tb_wrapper_sha256_hashing_stream.sv
+cd $SOC_TOP_DIR/simulate/sim/ && vvp wrapper_sha256_hashing_stream.vvp +STIMFILE=$ACC_WRAPPER_DIR/simulate/stimulus/ahb_input_hash_stim.m2d
\ No newline at end of file
diff --git a/socsim b/socsim
index 55fae46b24cd1ec6e93347e553ad3d5e88fc0064..f14cbe8a2f6124b6bca3a6b23b5e735b715458b7 160000
--- a/socsim
+++ b/socsim
@@ -1 +1 @@
-Subproject commit 55fae46b24cd1ec6e93347e553ad3d5e88fc0064
+Subproject commit f14cbe8a2f6124b6bca3a6b23b5e735b715458b7