Verified Commit cfedc8ce authored by Minyong Li's avatar Minyong Li 💬
Browse files

testbench/CanCore.tb.v: add reset and delays before $stop

This stops at the middle of memory write back.
parent fb03c4c0
...@@ -44,7 +44,10 @@ initial begin ...@@ -44,7 +44,10 @@ initial begin
$readmemh("../../../../firmware/test/test.prog.hex", canCore.programMemory.mem); $readmemh("../../../../firmware/test/test.prog.hex", canCore.programMemory.mem);
$readmemh("../../../../firmware/test/test.data.hex", canCore.dataMemory.mem); $readmemh("../../../../firmware/test/test.data.hex", canCore.dataMemory.mem);
$stop; #2 reset <= 0;
// Refer to test.prog.hex for the number of steps
#59 $stop;
end end
endmodule endmodule
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