From ac7c25857520dc203095ee850fe958626557926d Mon Sep 17 00:00:00 2001 From: Minyong Li <ml10g20@soton.ac.uk> Date: Sun, 29 Aug 2021 16:03:47 +0100 Subject: [PATCH] Revert "core.*Memory: add mem load for simulation" 91d71c4 already includes the memory load instructions. In addition, these bind statements do not work well with a few tools I use. This reverts commit d7827bd842f8af06065e5c100186c8b4bdc9604b. --- src/main/scala/uk/ac/soton/ecs/can/core/DataMemory.scala | 3 --- src/main/scala/uk/ac/soton/ecs/can/core/ProgramMemory.scala | 3 --- 2 files changed, 6 deletions(-) diff --git a/src/main/scala/uk/ac/soton/ecs/can/core/DataMemory.scala b/src/main/scala/uk/ac/soton/ecs/can/core/DataMemory.scala index 7feb2a8..e4a1f78 100644 --- a/src/main/scala/uk/ac/soton/ecs/can/core/DataMemory.scala +++ b/src/main/scala/uk/ac/soton/ecs/can/core/DataMemory.scala @@ -5,7 +5,6 @@ package uk.ac.soton.ecs.can.core import chisel3._ import chisel3.util.log2Ceil -import chisel3.util.experimental.loadMemoryFromFile import uk.ac.soton.ecs.can.types._ import uk.ac.soton.ecs.can.config.CanCoreConfiguration @@ -26,6 +25,4 @@ class DataMemory(implicit cfg: CanCoreConfiguration) extends MultiIOModule { when(write.en) { mem(write.addr) := write.data } - - loadMemoryFromFile(mem, "firmware/test/test.data.hex") } diff --git a/src/main/scala/uk/ac/soton/ecs/can/core/ProgramMemory.scala b/src/main/scala/uk/ac/soton/ecs/can/core/ProgramMemory.scala index 572eb07..5cc4271 100644 --- a/src/main/scala/uk/ac/soton/ecs/can/core/ProgramMemory.scala +++ b/src/main/scala/uk/ac/soton/ecs/can/core/ProgramMemory.scala @@ -5,7 +5,6 @@ package uk.ac.soton.ecs.can.core import chisel3._ import chisel3.util.log2Ceil -import chisel3.util.experimental.loadMemoryFromFile import uk.ac.soton.ecs.can.config.CanCoreConfiguration import uk.ac.soton.ecs.can.types._ @@ -37,6 +36,4 @@ class ProgramMemory(implicit cfg: CanCoreConfiguration) extends MultiIOModule { when(write.en) { mem(write.addr) := write.data } - - loadMemoryFromFile(mem, "firmware/test/test.prog.hex") } -- GitLab