Verified Commit 9a4dc499 authored by Minyong Li's avatar Minyong Li 💬
Browse files

core.CanCore: add halted output signal

This may be used to interrupt an external controller.
parent 2b87115f
Pipeline #7477 passed with stage
in 3 minutes and 1 second
......@@ -21,6 +21,8 @@ class CanCore(implicit cfg: CanCoreConfiguration) extends MultiIOModule {
val io = IO(new Bundle {
val take = Input(Bool())
val halted = Output(Bool())
val programMemory = new Bundle {
val read =
new MemoryReadIO(programMemoryAddressWidth, programMemoryDataWidth)
......@@ -46,7 +48,9 @@ class CanCore(implicit cfg: CanCoreConfiguration) extends MultiIOModule {
private val ctrl = programMemory.read.data.asTypeOf(new CanCoreControlWord)
programMemory.halt := Mux(io.take, io.take, ctrl.halt)
private val halt = Mux(io.take, io.take, ctrl.halt)
io.halted := halt
programMemory.halt := halt
dataMemory.read.addr := Mux(
io.take,
......
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