From 453d1bdbf5cc18b7acfff2a97d74fba3118594cb Mon Sep 17 00:00:00 2001 From: Minyong Li <ml10g20@soton.ac.uk> Date: Thu, 17 Jun 2021 16:13:51 +0100 Subject: [PATCH] core.QuarterRound: replace Cat w/ ## opr --- src/main/scala/uk/ac/soton/ecs/can/core/QuarterRound.scala | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/main/scala/uk/ac/soton/ecs/can/core/QuarterRound.scala b/src/main/scala/uk/ac/soton/ecs/can/core/QuarterRound.scala index 9efdf32..84d73f8 100644 --- a/src/main/scala/uk/ac/soton/ecs/can/core/QuarterRound.scala +++ b/src/main/scala/uk/ac/soton/ecs/can/core/QuarterRound.scala @@ -4,7 +4,6 @@ package uk.ac.soton.ecs.can.core import chisel3._ -import chisel3.util._ class QuarterRound extends Module { val io = IO(new Bundle { @@ -13,7 +12,7 @@ class QuarterRound extends Module { }) private def rotateLeft(v: UInt, b: Int): UInt = - Cat(v(31 - b, 0), v(31, 32 - b)) + v(31 - b, 0) ## v(31, 32 - b) val a0 = io.in(0) val b0 = io.in(1) -- GitLab