diff --git a/src/main/scala/uk/ac/soton/ecs/can/core/CanCoreConfiguration.scala b/src/main/scala/uk/ac/soton/ecs/can/core/CanCoreConfiguration.scala
index 9919bf5b1296e9759c3a8401c3bcddbaaa782af8..1b94630636356019aed2e7a0f779f4c64622a720 100644
--- a/src/main/scala/uk/ac/soton/ecs/can/core/CanCoreConfiguration.scala
+++ b/src/main/scala/uk/ac/soton/ecs/can/core/CanCoreConfiguration.scala
@@ -3,8 +3,8 @@ package uk.ac.soton.ecs.can.core
 case class CanCoreConfiguration(
     programMemoryWords: Int,
     dataMemoryWords: Int,
-    syncReadMemory: Boolean = true,
-    regAfterBlockInitializer: Boolean = true,
-    regBetweenRounds: Boolean = true,
-    regAfterAdder: Boolean = true
+    syncReadMemory: Boolean,
+    regAfterBlockInitializer: Boolean,
+    regBetweenRounds: Boolean,
+    regAfterAdder: Boolean
 )
diff --git a/src/main/scala/uk/ac/soton/ecs/can/core/DataMemory.scala b/src/main/scala/uk/ac/soton/ecs/can/core/DataMemory.scala
index 62e1c149a6e1fc288d975c1f12de59501da6b551..9eaf108bf44c3335cf777fa3664bba9d515a921f 100644
--- a/src/main/scala/uk/ac/soton/ecs/can/core/DataMemory.scala
+++ b/src/main/scala/uk/ac/soton/ecs/can/core/DataMemory.scala
@@ -9,7 +9,7 @@ class DataMemory(
     addrWidth: Int,
     dataWidth: Int,
     size: Int,
-    syncMem: Boolean = true
+    syncMem: Boolean
 ) extends MultiIOModule {
   val read = IO(
     Vec(
diff --git a/src/main/scala/uk/ac/soton/ecs/can/core/ProgramMemory.scala b/src/main/scala/uk/ac/soton/ecs/can/core/ProgramMemory.scala
index f5997254dd9a39dccab1c3a7aba431683a86993a..5074434bb331df563483f5fc5a784e8700fd4f38 100644
--- a/src/main/scala/uk/ac/soton/ecs/can/core/ProgramMemory.scala
+++ b/src/main/scala/uk/ac/soton/ecs/can/core/ProgramMemory.scala
@@ -9,7 +9,7 @@ class ProgramMemory(
     addrWidth: Int,
     cwWidth: Int,
     nWords: Int,
-    syncMem: Boolean = true
+    syncMem: Boolean
 ) extends MultiIOModule {
   val br = IO(new Bundle {
     val abs = Input(Bool())