From 1b6286a3ede59c348380bfc02548f4e8ba540985 Mon Sep 17 00:00:00 2001 From: Minyong Li <ml10g20@soton.ac.uk> Date: Sat, 26 Jun 2021 17:28:00 +0100 Subject: [PATCH] core.ControlWord: fix missing s --- src/main/scala/uk/ac/soton/ecs/can/core/ControlWord.scala | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/main/scala/uk/ac/soton/ecs/can/core/ControlWord.scala b/src/main/scala/uk/ac/soton/ecs/can/core/ControlWord.scala index 8760cb1..5a4e3da 100644 --- a/src/main/scala/uk/ac/soton/ecs/can/core/ControlWord.scala +++ b/src/main/scala/uk/ac/soton/ecs/can/core/ControlWord.scala @@ -11,7 +11,7 @@ class ControlWord(addrWidth: Int, immWidth: Int = 8) extends Bundle { val relativeBranch = Bool() val ramReadAddress = Vec(2, UInt(addrWidth.W)) val ramWriteAddress = UInt(addrWidth.W) - val fillConstant = Bool() + val fillConstants = Bool() val incrementBlockCount = Bool() val roundLoop = Bool() val addFrom = Bool() -- GitLab