diff --git a/behavioural/ahb_pixel_memory.sv b/behavioural/ahb_pixel_memory.sv
index 36c8974a2e40c1757682288fc974d860d2160c12..ac580ae9b733df1a0e43ab733f06fcef538f88f8 100755
--- a/behavioural/ahb_pixel_memory.sv
+++ b/behavioural/ahb_pixel_memory.sv
@@ -56,7 +56,7 @@ timeprecision 100ps;
localparam No_Transfer = 2'b0;
//memory
- logic [7:0] memory [0:307199] ;
+ logic [0:0] memory [0:307199] ;
// other declarations
logic write_enable, read_enable;
@@ -98,21 +98,14 @@ always_ff @(posedge HCLK, negedge HRESETn)
pixel_address = (pixel_y * 640) + pixel_x ;
-
- assign pixel = memory[pixel_address] ;
-
- assign HRDATA = read_enable ? memory[word_address] : '0 ;
+ always_ff @(posedge HCLK)
+ begin
+ pixel <= memory[pixel_address] ;
+ end
+
+ //assign HRDATA = read_enable ? memory[word_address] : '0 ;
+ assign HRDATA = '0; // read is not permitted mode
- /*
- assign bv1 = memory[0] ;
- assign bv2 = memory[1] ;
- assign bv3 = memory[2] ;
- assign tv1 = memory[3] ;
- assign tv2 = memory[4] ;
- assign tv3 = memory[5] ;
- assign BCO = memory[6] ;
- assign TCO = memory[7] ;
- */
//Transfer Response
diff --git a/db/.cmp.kpt b/db/.cmp.kpt
index 35d38993f7b823f617da8d7951d47013e84c8b63..8bde8b93d9b1b36f2537cba1258ce27e165eaef0 100644
Binary files a/db/.cmp.kpt and b/db/.cmp.kpt differ
diff --git a/db/altsyncram_efn1.tdf b/db/altsyncram_efn1.tdf
new file mode 100644
index 0000000000000000000000000000000000000000..5619e18d056eae51517157e4310a301a0115d80d
--- /dev/null
+++ b/db/altsyncram_efn1.tdf
@@ -0,0 +1,1135 @@
+--altsyncram ACF_BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES="CARE" ADDRESS_ACLR_A="NONE" ADDRESS_ACLR_B="NONE" ADDRESS_REG_B="CLOCK0" CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CYCLONEII_M4K_COMPATIBILITY="ON" DEVICE_FAMILY="Cyclone V" INDATA_ACLR_A="NONE" LOW_POWER_MODE="AUTO" NUMWORDS_A=307200 NUMWORDS_B=307200 OPERATION_MODE="DUAL_PORT" OUTDATA_ACLR_B="NONE" OUTDATA_REG_B="UNREGISTERED" READ_DURING_WRITE_MODE_MIXED_PORTS="OLD_DATA" WIDTH_A=1 WIDTH_B=1 WIDTHAD_A=19 WIDTHAD_B=19 WRCONTROL_ACLR_A="NONE" address_a address_b clock0 data_a q_b wren_a CARRY_CHAIN="MANUAL" CARRY_CHAIN_LENGTH=48
+--VERSION_BEGIN 16.1 cbx_altera_syncram_nd_impl 2017:01:11:18:30:33:SJ cbx_altsyncram 2017:01:11:18:30:33:SJ cbx_cycloneii 2017:01:11:18:30:33:SJ cbx_lpm_add_sub 2017:01:11:18:30:33:SJ cbx_lpm_compare 2017:01:11:18:30:33:SJ cbx_lpm_decode 2017:01:11:18:30:33:SJ cbx_lpm_mux 2017:01:11:18:30:33:SJ cbx_mgl 2017:01:11:19:37:47:SJ cbx_nadder 2017:01:11:18:30:33:SJ cbx_stratix 2017:01:11:18:30:33:SJ cbx_stratixii 2017:01:11:18:30:33:SJ cbx_stratixiii 2017:01:11:18:30:33:SJ cbx_stratixv 2017:01:11:18:30:33:SJ cbx_util_mgl 2017:01:11:18:30:33:SJ VERSION_END
+
+
+-- Copyright (C) 2017 Intel Corporation. All rights reserved.
+-- Your use of Intel Corporation's design tools, logic functions
+-- and other software and tools, and its AMPP partner logic
+-- functions, and any output files from any of the foregoing
+-- (including device programming or simulation files), and any
+-- associated documentation or information are expressly subject
+-- to the terms and conditions of the Intel Program License
+-- Subscription Agreement, the Intel Quartus Prime License Agreement,
+-- the Intel MegaCore Function License Agreement, or other
+-- applicable license agreement, including, without limitation,
+-- that your use is for the sole purpose of programming logic
+-- devices manufactured by Intel and sold by Intel or its
+-- authorized distributors. Please refer to the applicable
+-- agreement for further details.
+
+
+FUNCTION decode_3na (data[5..0], enable)
+RETURNS ( eq[37..0]);
+FUNCTION mux_chb (data[37..0], sel[5..0])
+RETURNS ( result[0..0]);
+FUNCTION cyclonev_ram_block (clk0, clk1, clr0, clr1, ena0, ena1, ena2, ena3, portaaddr[PORT_A_ADDRESS_WIDTH-1..0], portaaddrstall, portabyteenamasks[PORT_A_BYTE_ENABLE_MASK_WIDTH-1..0], portadatain[PORT_A_DATA_WIDTH-1..0], portare, portawe, portbaddr[PORT_B_ADDRESS_WIDTH-1..0], portbaddrstall, portbbyteenamasks[PORT_B_BYTE_ENABLE_MASK_WIDTH-1..0], portbdatain[PORT_B_DATA_WIDTH-1..0], portbre, portbwe)
+WITH ( CLK0_CORE_CLOCK_ENABLE, CLK0_INPUT_CLOCK_ENABLE, CLK0_OUTPUT_CLOCK_ENABLE, CLK1_CORE_CLOCK_ENABLE, CLK1_INPUT_CLOCK_ENABLE, CLK1_OUTPUT_CLOCK_ENABLE, CONNECTIVITY_CHECKING, DATA_INTERLEAVE_OFFSET_IN_BITS, DATA_INTERLEAVE_WIDTH_IN_BITS, DONT_POWER_OPTIMIZE, ENABLE_ECC, INIT_FILE, INIT_FILE_LAYOUT, LOGICAL_RAM_NAME, mem_init0, mem_init1, mem_init10, mem_init11, mem_init12, mem_init13, mem_init14, mem_init15, mem_init16, mem_init17, mem_init18, mem_init19, mem_init2, mem_init20, mem_init21, mem_init22, mem_init23, mem_init24, mem_init25, mem_init26, mem_init27, mem_init28, mem_init29, mem_init3, mem_init30, mem_init31, mem_init32, mem_init33, mem_init34, mem_init35, mem_init36, mem_init37, mem_init38, mem_init39, mem_init4, mem_init40, mem_init41, mem_init42, mem_init43, mem_init44, mem_init45, mem_init46, mem_init47, mem_init48, mem_init49, mem_init5, mem_init50, mem_init51, mem_init52, mem_init53, mem_init54, mem_init55, mem_init56, mem_init57, mem_init58, mem_init59, mem_init6, mem_init60, mem_init61, mem_init62, mem_init63, mem_init64, mem_init65, mem_init66, mem_init67, mem_init68, mem_init69, mem_init7, mem_init70, mem_init71, mem_init8, mem_init9, MIXED_PORT_FEED_THROUGH_MODE, OPERATION_MODE, PORT_A_ADDRESS_CLEAR, PORT_A_ADDRESS_WIDTH = 1, PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, PORT_A_BYTE_SIZE, PORT_A_DATA_OUT_CLEAR, PORT_A_DATA_OUT_CLOCK, PORT_A_DATA_WIDTH = 1, PORT_A_FIRST_ADDRESS, PORT_A_FIRST_BIT_NUMBER, PORT_A_LAST_ADDRESS, PORT_A_LOGICAL_RAM_DEPTH, PORT_A_LOGICAL_RAM_WIDTH, PORT_A_READ_DURING_WRITE_MODE, PORT_B_ADDRESS_CLEAR, PORT_B_ADDRESS_CLOCK, PORT_B_ADDRESS_WIDTH = 1, PORT_B_BYTE_ENABLE_CLOCK, PORT_B_BYTE_ENABLE_MASK_WIDTH = 1, PORT_B_BYTE_SIZE, PORT_B_DATA_IN_CLOCK, PORT_B_DATA_OUT_CLEAR, PORT_B_DATA_OUT_CLOCK, PORT_B_DATA_WIDTH = 1, PORT_B_FIRST_ADDRESS, PORT_B_FIRST_BIT_NUMBER, PORT_B_LAST_ADDRESS, PORT_B_LOGICAL_RAM_DEPTH, PORT_B_LOGICAL_RAM_WIDTH, PORT_B_READ_DURING_WRITE_MODE, PORT_B_READ_ENABLE_CLOCK, PORT_B_WRITE_ENABLE_CLOCK, POWER_UP_UNINITIALIZED, RAM_BLOCK_TYPE, WIDTH_ECCSTATUS = 3)
+RETURNS ( dftout[8..0], eccstatus[WIDTH_ECCSTATUS-1..0], portadataout[PORT_A_DATA_WIDTH-1..0], portbdataout[PORT_B_DATA_WIDTH-1..0]);
+
+--synthesis_resources = lut 21 M10K 1 M10K 37 reg 6
+OPTIONS ALTERA_INTERNAL_OPTION = "OPTIMIZE_POWER_DURING_SYNTHESIS=NORMAL_COMPILATION";
+
+SUBDESIGN altsyncram_efn1
+(
+ address_a[18..0] : input;
+ address_b[18..0] : input;
+ clock0 : input;
+ data_a[0..0] : input;
+ q_b[0..0] : output;
+ wren_a : input;
+)
+VARIABLE
+ address_reg_b[5..0] : dffe;
+ decode2 : decode_3na;
+ mux3 : mux_chb;
+ ram_block1a0 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 0,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 8191,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 0,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 8191,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a1 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 8192,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 16383,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 8192,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 16383,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a2 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 16384,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 24575,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 16384,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 24575,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a3 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 24576,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 32767,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 24576,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 32767,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a4 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 32768,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 40959,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 32768,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 40959,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a5 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 40960,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 49151,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 40960,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 49151,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a6 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 49152,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 57343,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 49152,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 57343,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a7 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 57344,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 65535,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 57344,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 65535,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a8 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 65536,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 73727,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 65536,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 73727,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a9 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 73728,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 81919,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 73728,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 81919,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a10 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 81920,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 90111,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 81920,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 90111,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a11 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 90112,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 98303,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 90112,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 98303,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a12 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 98304,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 106495,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 98304,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 106495,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a13 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 106496,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 114687,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 106496,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 114687,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a14 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 114688,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 122879,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 114688,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 122879,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a15 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 122880,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 131071,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 122880,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 131071,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a16 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 131072,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 139263,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 131072,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 139263,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a17 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 139264,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 147455,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 139264,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 147455,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a18 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 147456,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 155647,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 147456,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 155647,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a19 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 155648,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 163839,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 155648,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 163839,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a20 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 163840,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 172031,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 163840,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 172031,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a21 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 172032,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 180223,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 172032,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 180223,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a22 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 180224,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 188415,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 180224,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 188415,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a23 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 188416,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 196607,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 188416,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 196607,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a24 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 196608,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 204799,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 196608,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 204799,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a25 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 204800,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 212991,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 204800,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 212991,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a26 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 212992,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 221183,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 212992,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 221183,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a27 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 221184,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 229375,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 221184,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 229375,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a28 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 229376,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 237567,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 229376,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 237567,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a29 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 237568,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 245759,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 237568,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 245759,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a30 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 245760,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 253951,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 245760,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 253951,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a31 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 253952,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 262143,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 253952,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 262143,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a32 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 262144,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 270335,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 262144,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 270335,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a33 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 270336,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 278527,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 270336,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 278527,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a34 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 278528,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 286719,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 278528,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 286719,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a35 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 286720,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 294911,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 286720,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 294911,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a36 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 13,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 294912,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 303103,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 13,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 294912,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 303103,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ ram_block1a37 : cyclonev_ram_block
+ WITH (
+ CLK0_CORE_CLOCK_ENABLE = "none",
+ CLK0_INPUT_CLOCK_ENABLE = "none",
+ CONNECTIVITY_CHECKING = "OFF",
+ LOGICAL_RAM_NAME = "ALTSYNCRAM",
+ MIXED_PORT_FEED_THROUGH_MODE = "old",
+ OPERATION_MODE = "dual_port",
+ PORT_A_ADDRESS_WIDTH = 12,
+ PORT_A_DATA_WIDTH = 1,
+ PORT_A_FIRST_ADDRESS = 303104,
+ PORT_A_FIRST_BIT_NUMBER = 0,
+ PORT_A_LAST_ADDRESS = 307199,
+ PORT_A_LOGICAL_RAM_DEPTH = 307200,
+ PORT_A_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_ADDRESS_CLEAR = "none",
+ PORT_B_ADDRESS_CLOCK = "clock0",
+ PORT_B_ADDRESS_WIDTH = 12,
+ PORT_B_DATA_OUT_CLEAR = "none",
+ PORT_B_DATA_WIDTH = 1,
+ PORT_B_FIRST_ADDRESS = 303104,
+ PORT_B_FIRST_BIT_NUMBER = 0,
+ PORT_B_LAST_ADDRESS = 307199,
+ PORT_B_LOGICAL_RAM_DEPTH = 307200,
+ PORT_B_LOGICAL_RAM_WIDTH = 1,
+ PORT_B_READ_ENABLE_CLOCK = "clock0",
+ RAM_BLOCK_TYPE = "AUTO"
+ );
+ address_a_wire[18..0] : WIRE;
+ address_b_sel[5..0] : WIRE;
+ address_b_wire[18..0] : WIRE;
+ w_addr_val_a2w[5..0] : WIRE;
+
+BEGIN
+ address_reg_b[].clk = clock0;
+ address_reg_b[].d = address_b_sel[];
+ decode2.data[] = w_addr_val_a2w[];
+ decode2.enable = wren_a;
+ mux3.data[] = ( ram_block1a[37..0].portbdataout[0..0]);
+ mux3.sel[] = address_reg_b[].q;
+ ram_block1a[37..0].clk0 = clock0;
+ ram_block1a[36..0].portaaddr[] = ( address_a_wire[12..0]);
+ ram_block1a[37].portaaddr[] = ( address_a_wire[11..0]);
+ ram_block1a[37..0].portadatain[] = ( data_a[0..0]);
+ ram_block1a[37..0].portawe = ( decode2.eq[37..0]);
+ ram_block1a[36..0].portbaddr[] = ( address_b_wire[12..0]);
+ ram_block1a[37].portbaddr[] = ( address_b_wire[11..0]);
+ ram_block1a[37..0].portbre = B"11111111111111111111111111111111111111";
+ address_a_wire[] = address_a[];
+ address_b_sel[5..0] = address_b[18..13];
+ address_b_wire[] = address_b[];
+ q_b[] = mux3.result[];
+ w_addr_val_a2w[5..0] = address_a_wire[18..13];
+END;
+--VALID FILE
diff --git a/db/de1_soc_wrapper.(0).cnf.cdb b/db/de1_soc_wrapper.(0).cnf.cdb
new file mode 100644
index 0000000000000000000000000000000000000000..c08f0c5a4f6779f4060880068f82f15bb3f1b310
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diff --git a/db/de1_soc_wrapper.(0).cnf.hdb b/db/de1_soc_wrapper.(0).cnf.hdb
new file mode 100644
index 0000000000000000000000000000000000000000..2fc52dcaebb4db57a034e8d1559db7e8f1ce1abd
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diff --git a/db/de1_soc_wrapper.(1).cnf.cdb b/db/de1_soc_wrapper.(1).cnf.cdb
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index 0000000000000000000000000000000000000000..b2903d6567d688b9e6adcb76c9a501f9a8911bef
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diff --git a/db/de1_soc_wrapper.(1).cnf.hdb b/db/de1_soc_wrapper.(1).cnf.hdb
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index 0000000000000000000000000000000000000000..17b5b8971b383b635ffa23724033ce13cb65c69c
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diff --git a/db/de1_soc_wrapper.(10).cnf.cdb b/db/de1_soc_wrapper.(10).cnf.cdb
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index 0000000000000000000000000000000000000000..bf76023035ac5f8ce667608f42c8e698b99f8de1
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diff --git a/db/de1_soc_wrapper.(11).cnf.hdb b/db/de1_soc_wrapper.(11).cnf.hdb
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diff --git a/db/de1_soc_wrapper.(12).cnf.cdb b/db/de1_soc_wrapper.(12).cnf.cdb
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index 0000000000000000000000000000000000000000..675a26fd88030e5c63508878de2ae87ae3f09023
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diff --git a/db/de1_soc_wrapper.(14).cnf.cdb b/db/de1_soc_wrapper.(14).cnf.cdb
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diff --git a/db/de1_soc_wrapper.(14).cnf.hdb b/db/de1_soc_wrapper.(14).cnf.hdb
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index 0000000000000000000000000000000000000000..23c536444cc039c4edd83a0ca5966b7d8b4f508f
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diff --git a/db/de1_soc_wrapper.(2).cnf.cdb b/db/de1_soc_wrapper.(2).cnf.cdb
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index 0000000000000000000000000000000000000000..f0311f50f0473e2926da924c39f0d4ab55816148
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diff --git a/db/de1_soc_wrapper.(4).cnf.cdb b/db/de1_soc_wrapper.(4).cnf.cdb
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index 0000000000000000000000000000000000000000..415166779e36f35a4172a441d67f2901d2ffa002
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diff --git a/db/de1_soc_wrapper.(5).cnf.cdb b/db/de1_soc_wrapper.(5).cnf.cdb
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index 0000000000000000000000000000000000000000..eba7804513a7ba22ea3dc82863e83ebc7cbec6ba
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index 0000000000000000000000000000000000000000..c78cdb78d2082b0b156e00736cdd9bcd609c192a
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diff --git a/db/de1_soc_wrapper.(6).cnf.cdb b/db/de1_soc_wrapper.(6).cnf.cdb
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index 0000000000000000000000000000000000000000..e860fc4fb89ac0e8c577ab2f6ce0bb8fe2bfe0b0
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diff --git a/db/de1_soc_wrapper.(6).cnf.hdb b/db/de1_soc_wrapper.(6).cnf.hdb
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index 0000000000000000000000000000000000000000..61054fd5a53b175f1ce426422eb6e09c25922a79
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diff --git a/db/de1_soc_wrapper.(7).cnf.cdb b/db/de1_soc_wrapper.(7).cnf.cdb
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index 0000000000000000000000000000000000000000..c8800ab46ff37b6fecd838445b9b3acb78b51f9c
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diff --git a/db/de1_soc_wrapper.(7).cnf.hdb b/db/de1_soc_wrapper.(7).cnf.hdb
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index 0000000000000000000000000000000000000000..4a63c965dc41bb436cb5c1d1a45cc133f0c505dc
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diff --git a/db/de1_soc_wrapper.(8).cnf.cdb b/db/de1_soc_wrapper.(8).cnf.cdb
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index 0000000000000000000000000000000000000000..9ce94f46d0f948ce84f88f1d8e17c6a38e0371d8
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diff --git a/db/de1_soc_wrapper.(8).cnf.hdb b/db/de1_soc_wrapper.(8).cnf.hdb
new file mode 100644
index 0000000000000000000000000000000000000000..1506b1f256e8d7ea6b6f98f5c1bd3693804f3324
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diff --git a/db/de1_soc_wrapper.(9).cnf.cdb b/db/de1_soc_wrapper.(9).cnf.cdb
new file mode 100644
index 0000000000000000000000000000000000000000..2f59dc49f581d57db5dd43f54c32820fbe782b38
Binary files /dev/null and b/db/de1_soc_wrapper.(9).cnf.cdb differ
diff --git a/db/de1_soc_wrapper.(9).cnf.hdb b/db/de1_soc_wrapper.(9).cnf.hdb
new file mode 100644
index 0000000000000000000000000000000000000000..ef67df6b5c2d003d8391767cc4fe12e25940bdf1
Binary files /dev/null and b/db/de1_soc_wrapper.(9).cnf.hdb differ
diff --git a/db/de1_soc_wrapper.asm.qmsg b/db/de1_soc_wrapper.asm.qmsg
new file mode 100644
index 0000000000000000000000000000000000000000..992db77e36458257f02e8ea4e65bb49e76db9c14
--- /dev/null
+++ b/db/de1_soc_wrapper.asm.qmsg
@@ -0,0 +1,6 @@
+{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1600942868516 ""}
+{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus Prime " "Running Quartus Prime Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition " "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1600942868519 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Sep 24 11:21:08 2020 " "Processing started: Thu Sep 24 11:21:08 2020" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1600942868519 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Assembler" 0 -1 1600942868519 ""}
+{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper " "Command: quartus_asm --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper" { } { } 0 0 "Command: %1!s!" 0 0 "Assembler" 0 -1 1600942868519 ""}
+{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." { } { } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Assembler" 0 -1 1600942869656 ""}
+{ "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Assembler is generating device programming files" { } { } 0 115030 "Assembler is generating device programming files" 0 0 "Assembler" 0 -1 1600942876963 ""}
+{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 1 Quartus Prime " "Quartus Prime Assembler was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1108 " "Peak virtual memory: 1108 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1600942877585 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Sep 24 11:21:17 2020 " "Processing ended: Thu Sep 24 11:21:17 2020" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1600942877585 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:09 " "Elapsed time: 00:00:09" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1600942877585 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:09 " "Total CPU time (on all processors): 00:00:09" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1600942877585 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Assembler" 0 -1 1600942877585 ""}
diff --git a/db/de1_soc_wrapper.asm.rdb b/db/de1_soc_wrapper.asm.rdb
new file mode 100644
index 0000000000000000000000000000000000000000..c7eaf09befe1ca1ad9b2e59422c920e3678397af
Binary files /dev/null and b/db/de1_soc_wrapper.asm.rdb differ
diff --git a/db/de1_soc_wrapper.cbx.xml b/db/de1_soc_wrapper.cbx.xml
new file mode 100644
index 0000000000000000000000000000000000000000..17573ffb4dc61da1c6db756afd6fc95e808e3f45
--- /dev/null
+++ b/db/de1_soc_wrapper.cbx.xml
@@ -0,0 +1,5 @@
+<?xml version="1.0" ?>
+<LOG_ROOT>
+ <PROJECT NAME="de1_soc_wrapper">
+ </PROJECT>
+</LOG_ROOT>
diff --git a/db/de1_soc_wrapper.cmp.bpm b/db/de1_soc_wrapper.cmp.bpm
new file mode 100644
index 0000000000000000000000000000000000000000..4a5f706e572bec095eb04720c1eaf41812522f27
Binary files /dev/null and b/db/de1_soc_wrapper.cmp.bpm differ
diff --git a/db/de1_soc_wrapper.cmp.cdb b/db/de1_soc_wrapper.cmp.cdb
new file mode 100644
index 0000000000000000000000000000000000000000..f7991969e6275c03747fb4b23dfd67c2746abb66
Binary files /dev/null and b/db/de1_soc_wrapper.cmp.cdb differ
diff --git a/db/de1_soc_wrapper.cmp.hdb b/db/de1_soc_wrapper.cmp.hdb
new file mode 100644
index 0000000000000000000000000000000000000000..73d73ebe9a5486a853b6b5b9e888d1df06f2f222
Binary files /dev/null and b/db/de1_soc_wrapper.cmp.hdb differ
diff --git a/db/de1_soc_wrapper.cmp.idb b/db/de1_soc_wrapper.cmp.idb
new file mode 100644
index 0000000000000000000000000000000000000000..8beca67c241fd223a2379c758016622902ad4e3d
Binary files /dev/null and b/db/de1_soc_wrapper.cmp.idb differ
diff --git a/db/de1_soc_wrapper.cmp.logdb b/db/de1_soc_wrapper.cmp.logdb
new file mode 100644
index 0000000000000000000000000000000000000000..2a8817be965a0ba156c5d41fd7c5bd69c55c41f0
--- /dev/null
+++ b/db/de1_soc_wrapper.cmp.logdb
@@ -0,0 +1,121 @@
+v1
+IO_RULES,NUM_CLKS_NOT_EXCEED_CLKS_AVAILABLE,INAPPLICABLE,IO_000002,Capacity Checks,Number of clocks in an I/O bank should not exceed the number of clocks available.,Critical,No Global Signal assignments found.,,I/O,,
+IO_RULES,NUM_VREF_NOT_EXCEED_LOC_AVAILABLE,INAPPLICABLE,IO_000003,Capacity Checks,Number of pins in a Vrefgroup should not exceed the number of locations available.,Critical,No Location assignments found.,,I/O,,
+IO_RULES,NUM_PINS_NOT_EXCEED_LOC_AVAILABLE,INAPPLICABLE,IO_000001,Capacity Checks,Number of pins in an I/O bank should not exceed the number of locations available.,Critical,No Location assignments found.,,I/O,,
+IO_RULES,IO_BANK_SUPPORT_VCCIO,INAPPLICABLE,IO_000004,Voltage Compatibility Checks,The I/O bank should support the requested VCCIO.,Critical,No IOBANK_VCCIO assignments found.,,I/O,,
+IO_RULES,IO_BANK_NOT_HAVE_COMPETING_VREF,INAPPLICABLE,IO_000005,Voltage Compatibility Checks,The I/O bank should not have competing VREF values.,Critical,No VREF I/O Standard assignments found.,,I/O,,
+IO_RULES,IO_BANK_NOT_HAVE_COMPETING_VCCIO,PASS,IO_000006,Voltage Compatibility Checks,The I/O bank should not have competing VCCIO values.,Critical,0 such failures found.,,I/O,,
+IO_RULES,CHECK_UNAVAILABLE_LOC,INAPPLICABLE,IO_000007,Valid Location Checks,Checks for unavailable locations.,Critical,No Location assignments found.,,I/O,,
+IO_RULES,CHECK_RESERVED_LOC,INAPPLICABLE,IO_000008,Valid Location Checks,Checks for reserved locations.,Critical,No reserved LogicLock region found.,,I/O,,
+IO_RULES,IO_STD_SUPPORT_BUS_HOLD_VALUE,INAPPLICABLE,IO_000022,I/O Properties Checks for One I/O,The I/O standard should support the requested Bus Hold value.,Critical,No Enable Bus-Hold Circuitry assignments found.,,I/O,,
+IO_RULES,IO_STD_SUPPORT_WEAK_PULL_UP_VALUE,INAPPLICABLE,IO_000021,I/O Properties Checks for One I/O,The I/O standard should support the requested Weak Pull Up value.,Critical,No Weak Pull-Up Resistor assignments found.,,I/O,,
+IO_RULES,LOC_SUPPORTS_SLEW_RATE,INAPPLICABLE,IO_000046,I/O Properties Checks for One I/O,The location should support the requested Slew Rate value.,Critical,No Slew Rate assignments found.,,I/O,,
+IO_RULES,IO_STD_SUPPORT_OPEN_DRAIN_VALUE,INAPPLICABLE,IO_000023,I/O Properties Checks for One I/O,The I/O standard should support the Open Drain value.,Critical,No open drain assignments found.,,I/O,,
+IO_RULES,IO_DIR_SUPPORT_OCT_VALUE,PASS,IO_000024,I/O Properties Checks for One I/O,The I/O direction should support the On Chip Termination value.,Critical,0 such failures found.,,I/O,,
+IO_RULES,OCT_AND_CURRENT_STRENGTH_NOT_USED_SIMULTANEOUSLY,INAPPLICABLE,IO_000026,I/O Properties Checks for One I/O,On Chip Termination and Current Strength should not be used at the same time.,Critical,No Current Strength assignments found.,,I/O,,
+IO_RULES,WEAK_PULL_UP_AND_BUS_HOLD_NOT_USED_SIMULTANEOUSLY,INAPPLICABLE,IO_000027,I/O Properties Checks for One I/O,Weak Pull Up and Bus Hold should not be used at the same time.,Critical,No Enable Bus-Hold Circuitry or Weak Pull-Up Resistor assignments found.,,I/O,,
+IO_RULES,IO_STD_SUPPORTS_SLEW_RATE,INAPPLICABLE,IO_000045,I/O Properties Checks for One I/O,The I/O standard should support the requested Slew Rate value.,Critical,No Slew Rate assignments found.,,I/O,,
+IO_RULES,OCT_SUPPORTS_SLEW_RATE,INAPPLICABLE,IO_000047,I/O Properties Checks for One I/O,On Chip Termination and Slew Rate should not be used at the same time.,Critical,No Slew Rate assignments found.,,I/O,,
+IO_RULES,IO_STD_SUPPORT_PCI_CLAMP_DIODE,INAPPLICABLE,IO_000020,I/O Properties Checks for One I/O,The I/O standard should support the requested PCI Clamp Diode.,Critical,No Clamping Diode assignments found.,,I/O,,
+IO_RULES,IO_STD_SUPPORT_OCT_VALUE,PASS,IO_000019,I/O Properties Checks for One I/O,The I/O standard should support the requested On Chip Termination value.,Critical,0 such failures found.,,I/O,,
+IO_RULES,IO_STD_SUPPORT_CURRENT_STRENGTH,INAPPLICABLE,IO_000018,I/O Properties Checks for One I/O,The I/O standard should support the requested Current Strength.,Critical,No Current Strength assignments found.,,I/O,,
+IO_RULES,LOC_SUPPORT_PCI_CLAMP_DIODE,INAPPLICABLE,IO_000015,I/O Properties Checks for One I/O,The location should support the requested PCI Clamp Diode.,Critical,No Clamping Diode assignments found.,,I/O,,
+IO_RULES,LOC_SUPPORT_WEAK_PULL_UP_VALUE,INAPPLICABLE,IO_000014,I/O Properties Checks for One I/O,The location should support the requested Weak Pull Up value.,Critical,No Weak Pull-Up Resistor assignments found.,,I/O,,
+IO_RULES,LOC_SUPPORT_BUS_HOLD_VALUE,INAPPLICABLE,IO_000013,I/O Properties Checks for One I/O,The location should support the requested Bus Hold value.,Critical,No Enable Bus-Hold Circuitry assignments found.,,I/O,,
+IO_RULES,LOC_SUPPORT_OCT_VALUE,PASS,IO_000012,I/O Properties Checks for One I/O,The location should support the requested On Chip Termination value.,Critical,0 such failures found.,,I/O,,
+IO_RULES,LOC_SUPPORT_CURRENT_STRENGTH,INAPPLICABLE,IO_000011,I/O Properties Checks for One I/O,The location should support the requested Current Strength.,Critical,No Current Strength assignments found.,,I/O,,
+IO_RULES,LOC_SUPPORT_IO_DIR,PASS,IO_000010,I/O Properties Checks for One I/O,The location should support the requested I/O direction.,Critical,0 such failures found.,,I/O,,
+IO_RULES,LOC_SUPPORT_IO_STD,PASS,IO_000009,I/O Properties Checks for One I/O,The location should support the requested I/O standard.,Critical,0 such failures found.,,I/O,,
+IO_RULES,SINGLE_ENDED_OUTPUTS_LAB_ROWS_FROM_DIFF_IO,INAPPLICABLE,IO_000034,SI Related Distance Checks,Single-ended outputs should be 0 LAB row(s) away from a differential I/O.,High,No Differential I/O Standard assignments found.,,I/O,,
+IO_RULES,DEV_IO_RULE_OCT_DISCLAIMER,,,,,,,,,,
+IO_RULES_MATRIX,Pin/Rules,IO_000002;IO_000003;IO_000001;IO_000004;IO_000005;IO_000006;IO_000007;IO_000008;IO_000022;IO_000021;IO_000046;IO_000023;IO_000024;IO_000026;IO_000027;IO_000045;IO_000047;IO_000020;IO_000019;IO_000018;IO_000015;IO_000014;IO_000013;IO_000012;IO_000011;IO_000010;IO_000009;IO_000034,
+IO_RULES_MATRIX,Total Pass,0;0;0;0;0;81;0;0;0;0;0;0;66;0;0;0;0;0;66;0;0;0;0;66;0;81;81;0,
+IO_RULES_MATRIX,Total Unchecked,0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0,
+IO_RULES_MATRIX,Total Inapplicable,81;81;81;81;81;0;81;81;81;81;81;81;15;81;81;81;81;81;15;81;81;81;81;15;81;0;0;81,
+IO_RULES_MATRIX,Total Fail,0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0,
+IO_RULES_MATRIX,KEY[3],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,LEDR[0],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,LEDR[1],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,LEDR[2],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,LEDR[3],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,LEDR[4],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,LEDR[5],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,LEDR[6],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,LEDR[7],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,LEDR[8],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,LEDR[9],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX0[0],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX0[1],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX0[2],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX0[3],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX0[4],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX0[5],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX0[6],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX1[0],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX1[1],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX1[2],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX1[3],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX1[4],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX1[5],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX1[6],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX2[0],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX2[1],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX2[2],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX2[3],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX2[4],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX2[5],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX2[6],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX3[0],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX3[1],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX3[2],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX3[3],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX3[4],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX3[5],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,HEX3[6],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_R[0],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_R[1],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_R[2],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_R[3],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_R[4],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_R[5],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_R[6],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_R[7],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_G[0],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_G[1],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_G[2],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_G[3],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_G[4],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_G[5],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_G[6],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_G[7],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_B[0],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_B[1],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_B[2],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_B[3],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_B[4],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_B[5],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_B[6],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_B[7],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_HS,Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_VS,Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_CLK,Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,VGA_BLANK_N,Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,CLOCK_50,Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,KEY[2],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,SW[7],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,KEY[1],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,KEY[0],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,SW[2],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,SW[9],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,SW[1],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,SW[4],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,SW[3],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,SW[5],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,SW[0],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,SW[8],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_MATRIX,SW[6],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable,
+IO_RULES_SUMMARY,Total I/O Rules,28,
+IO_RULES_SUMMARY,Number of I/O Rules Passed,6,
+IO_RULES_SUMMARY,Number of I/O Rules Failed,0,
+IO_RULES_SUMMARY,Number of I/O Rules Unchecked,0,
+IO_RULES_SUMMARY,Number of I/O Rules Inapplicable,22,
diff --git a/db/de1_soc_wrapper.cmp.rdb b/db/de1_soc_wrapper.cmp.rdb
new file mode 100644
index 0000000000000000000000000000000000000000..1581ddb846fccfb892b15209c757a6c58e975485
Binary files /dev/null and b/db/de1_soc_wrapper.cmp.rdb differ
diff --git a/db/de1_soc_wrapper.cmp_merge.kpt b/db/de1_soc_wrapper.cmp_merge.kpt
new file mode 100644
index 0000000000000000000000000000000000000000..b2655245e28f4e9497c334b21fa82de236c4b45d
Binary files /dev/null and b/db/de1_soc_wrapper.cmp_merge.kpt differ
diff --git a/db/de1_soc_wrapper.cyclonev_io_sim_cache.ff_0c_fast.hsd b/db/de1_soc_wrapper.cyclonev_io_sim_cache.ff_0c_fast.hsd
new file mode 100644
index 0000000000000000000000000000000000000000..fec2c9f4847c658ffed7135e24bce1d98cafe778
Binary files /dev/null and b/db/de1_soc_wrapper.cyclonev_io_sim_cache.ff_0c_fast.hsd differ
diff --git a/db/de1_soc_wrapper.cyclonev_io_sim_cache.ff_85c_fast.hsd b/db/de1_soc_wrapper.cyclonev_io_sim_cache.ff_85c_fast.hsd
new file mode 100644
index 0000000000000000000000000000000000000000..647cbddbb117257d1c79e03f24166e5ffa114372
Binary files /dev/null and b/db/de1_soc_wrapper.cyclonev_io_sim_cache.ff_85c_fast.hsd differ
diff --git a/db/de1_soc_wrapper.cyclonev_io_sim_cache.tt_0c_slow.hsd b/db/de1_soc_wrapper.cyclonev_io_sim_cache.tt_0c_slow.hsd
new file mode 100644
index 0000000000000000000000000000000000000000..6406a8fb5f5d0c7b15e3d6223d66b2ba38af89ce
Binary files /dev/null and b/db/de1_soc_wrapper.cyclonev_io_sim_cache.tt_0c_slow.hsd differ
diff --git a/db/de1_soc_wrapper.cyclonev_io_sim_cache.tt_85c_slow.hsd b/db/de1_soc_wrapper.cyclonev_io_sim_cache.tt_85c_slow.hsd
new file mode 100644
index 0000000000000000000000000000000000000000..e197f90d59b93576918a9c0c113c2fb07ced993f
Binary files /dev/null and b/db/de1_soc_wrapper.cyclonev_io_sim_cache.tt_85c_slow.hsd differ
diff --git a/db/de1_soc_wrapper.db_info b/db/de1_soc_wrapper.db_info
index 41e5984910064af4c7205fa697b271a6ce26fa5e..98b26586160ea13254423bf381a3fd7375f4b3d8 100644
--- a/db/de1_soc_wrapper.db_info
+++ b/db/de1_soc_wrapper.db_info
@@ -1,3 +1,3 @@
Quartus_Version = Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
Version_Index = 419482368
-Creation_Time = Thu Sep 24 10:40:14 2020
+Creation_Time = Thu Sep 24 10:53:11 2020
diff --git a/db/de1_soc_wrapper.eda.qmsg b/db/de1_soc_wrapper.eda.qmsg
new file mode 100644
index 0000000000000000000000000000000000000000..471edfa0177d2f2d272c3878a7d1140c59f23f1c
--- /dev/null
+++ b/db/de1_soc_wrapper.eda.qmsg
@@ -0,0 +1,7 @@
+{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1600942892206 ""}
+{ "Info" "IQEXE_START_BANNER_PRODUCT" "EDA Netlist Writer Quartus Prime " "Running Quartus Prime EDA Netlist Writer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition " "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1600942892209 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Sep 24 11:21:31 2020 " "Processing started: Thu Sep 24 11:21:31 2020" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1600942892209 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "EDA Netlist Writer" 0 -1 1600942892209 ""}
+{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_eda --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper " "Command: quartus_eda --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper" { } { } 0 0 "Command: %1!s!" 0 0 "EDA Netlist Writer" 0 -1 1600942892209 ""}
+{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." { } { } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "EDA Netlist Writer" 0 -1 1600942893250 ""}
+{ "Warning" "WQNETO_SWITCH_TO_FUNCTIONAL_SIMULATION" "" "Generated the EDA functional simulation netlist because it is the only supported netlist type for this device." { } { } 0 10905 "Generated the EDA functional simulation netlist because it is the only supported netlist type for this device." 0 0 "EDA Netlist Writer" 0 -1 1600942893358 ""}
+{ "Info" "IWSC_DONE_HDL_GENERATION" "de1_soc_wrapper.vo /home/ks6n19/Documents/project/simulation/modelsim/ simulation " "Generated file de1_soc_wrapper.vo in folder \"/home/ks6n19/Documents/project/simulation/modelsim/\" for EDA simulation tool" { } { } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "EDA Netlist Writer" 0 -1 1600942894528 ""}
+{ "Info" "IQEXE_ERROR_COUNT" "EDA Netlist Writer 0 s 2 s Quartus Prime " "Quartus Prime EDA Netlist Writer was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1316 " "Peak virtual memory: 1316 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1600942894704 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Sep 24 11:21:34 2020 " "Processing ended: Thu Sep 24 11:21:34 2020" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1600942894704 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Elapsed time: 00:00:03" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1600942894704 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:03 " "Total CPU time (on all processors): 00:00:03" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1600942894704 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "EDA Netlist Writer" 0 -1 1600942894704 ""}
diff --git a/db/de1_soc_wrapper.fit.qmsg b/db/de1_soc_wrapper.fit.qmsg
new file mode 100644
index 0000000000000000000000000000000000000000..9d96a069948fc3f3a2e5ec4b65bd28fb07773d76
--- /dev/null
+++ b/db/de1_soc_wrapper.fit.qmsg
@@ -0,0 +1,44 @@
+{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." { } { } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Fitter" 0 -1 1600942742508 ""}
+{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "16 24 " "Parallel compilation is enabled and will use 16 of the 24 processors detected" { } { } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Fitter" 0 -1 1600942742510 ""}
+{ "Info" "IMPP_MPP_USER_DEVICE" "de1_soc_wrapper 5CSEMA5F31C6 " "Selected device 5CSEMA5F31C6 for design \"de1_soc_wrapper\"" { } { } 0 119006 "Selected device %2!s! for design \"%1!s!\"" 0 0 "Fitter" 0 -1 1600942742555 ""}
+{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1600942742598 ""}
+{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1600942742598 ""}
+{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" { } { } 0 171003 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "Fitter" 0 -1 1600942743116 ""}
+{ "Warning" "WCUT_CUT_ATOM_PINS_WITH_INCOMPLETE_IO_ASSIGNMENTS" "" "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" { } { } 0 15714 "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" 0 0 "Fitter" 0 -1 1600942743307 ""}
+{ "Info" "IFSAC_FSAC_RAM_METASTABILITY_INFO" "" "Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." { } { } 0 176045 "Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." 0 0 "Fitter" 0 -1 1600942743379 ""}
+{ "Critical Warning" "WFIOMGR_PINS_MISSING_LOCATION_INFO" "81 81 " "No exact pin location assignment(s) for 81 pins of 81 total pins. For the list of pins please refer to the I/O Assignment Warnings table in the fitter report." { } { } 1 169085 "No exact pin location assignment(s) for %1!d! pins of %2!d! total pins. For the list of pins please refer to the I/O Assignment Warnings table in the fitter report." 0 0 "Fitter" 0 -1 1600942743507 ""}
+{ "Info" "IFITCC_FITCC_FITTER_PERIPHERY_PLACEMENT_START_INFO" "" "Starting Fitter periphery placement operations" { } { } 0 184020 "Starting Fitter periphery placement operations" 0 0 "Fitter" 0 -1 1600942756454 ""}
+{ "Info" "ICCLK_CLOCKS_TOP" "1 (1 global) " "Promoted 1 clock (1 global)" { { "Info" "ICCLK_PROMOTE_ASSIGNMENT" "CLOCK_50~inputCLKENA0 1020 global CLKCTRL_G8 " "CLOCK_50~inputCLKENA0 with 1020 fanout uses global clock CLKCTRL_G8" { } { } 0 11162 "%1!s! with %2!d! fanout uses %3!s! clock %4!s!" 0 0 "Design Software" 0 -1 1600942756804 ""} } { } 0 11178 "Promoted %1!d! clock%2!s! %3!s!" 0 0 "Fitter" 0 -1 1600942756804 ""}
+{ "Info" "ICCLK_CLOCKS_TOP_AUTO" "1 (1 global) " "Automatically promoted 1 clock (1 global)" { { "Info" "ICCLK_PROMOTE_ASSIGNMENT" "KEY\[2\]~inputCLKENA0 942 global CLKCTRL_G10 " "KEY\[2\]~inputCLKENA0 with 942 fanout uses global clock CLKCTRL_G10" { } { } 0 11162 "%1!s! with %2!d! fanout uses %3!s! clock %4!s!" 0 0 "Design Software" 0 -1 1600942756804 ""} } { } 0 11191 "Automatically promoted %1!d! clock%2!s! %3!s!" 0 0 "Fitter" 0 -1 1600942756804 ""}
+{ "Info" "IFITCC_FITCC_FITTER_PERIPHERY_PLACEMENT_END_INFO" "00:00:00 " "Fitter periphery placement operations ending: elapsed time is 00:00:00" { } { } 0 184021 "Fitter periphery placement operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1600942756804 ""}
+{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_REGPACKING_INFO" "" "Starting register packing" { } { } 0 176233 "Starting register packing" 0 0 "Fitter" 0 -1 1600942756833 ""}
+{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Started Fast Input/Output/OE register processing" { } { } 1 176236 "Started Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1600942756838 ""}
+{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Finished Fast Input/Output/OE register processing" { } { } 1 176237 "Finished Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1600942756846 ""}
+{ "Extra Info" "IFSAC_FSAC_START_MAC_SCAN_CHAIN_INFERENCING" "" "Start inferring scan chains for DSP blocks" { } { } 1 176238 "Start inferring scan chains for DSP blocks" 1 0 "Fitter" 0 -1 1600942756855 ""}
+{ "Extra Info" "IFSAC_FSAC_FINISH_MAC_SCAN_CHAIN_INFERENCING" "" "Inferring scan chains for DSP blocks is complete" { } { } 1 176239 "Inferring scan chains for DSP blocks is complete" 1 0 "Fitter" 0 -1 1600942756855 ""}
+{ "Extra Info" "IFSAC_FSAC_START_IO_MAC_RAM_PACKING" "" "Moving registers into I/O cells, DSP blocks, and RAM blocks to improve timing and density" { } { } 1 176246 "Moving registers into I/O cells, DSP blocks, and RAM blocks to improve timing and density" 1 0 "Fitter" 0 -1 1600942756860 ""}
+{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "de1_soc_wrapper.sdc " "Synopsys Design Constraints File file not found: 'de1_soc_wrapper.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." { } { } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "Fitter" 0 -1 1600942758132 ""}
+{ "Info" "ISTA_NO_CLOCK_FOUND_NO_DERIVING_MSG" "base clocks " "No user constrained base clocks found in the design" { } { } 0 332144 "No user constrained %1!s! found in the design" 0 0 "Fitter" 0 -1 1600942758132 ""}
+{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" { } { } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "Fitter" 0 -1 1600942758193 ""}
+{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Fitter" 0 -1 1600942758193 ""}
+{ "Info" "ISTA_TDC_NO_DEFAULT_OPTIMIZATION_GOALS" "" "Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time." { } { } 0 332130 "Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time." 0 0 "Fitter" 0 -1 1600942758194 ""}
+{ "Extra Info" "IFSAC_FSAC_FINISH_IO_MAC_RAM_PACKING" "" "Finished moving registers into I/O cells, DSP blocks, and RAM blocks" { } { } 1 176247 "Finished moving registers into I/O cells, DSP blocks, and RAM blocks" 1 0 "Fitter" 0 -1 1600942758477 ""}
+{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Finished register packing" { { "Extra Info" "IFSAC_NO_REGISTERS_WERE_PACKED" "" "No registers were packed into other blocks" { } { } 1 176219 "No registers were packed into other blocks" 0 0 "Design Software" 0 -1 1600942758483 ""} } { } 0 176235 "Finished register packing" 0 0 "Fitter" 0 -1 1600942758483 ""}
+{ "Info" "IFSV_FITTER_PREPARATION_END" "00:00:15 " "Fitter preparation operations ending: elapsed time is 00:00:15" { } { } 0 11798 "Fitter preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1600942758634 ""}
+{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Fitter placement preparation operations beginning" { } { } 0 170189 "Fitter placement preparation operations beginning" 0 0 "Fitter" 0 -1 1600942763957 ""}
+{ "Info" "IVPR20K_VPR_APL_ENABLED" "" "The Fitter is using Advanced Physical Optimization." { } { } 0 14951 "The Fitter is using Advanced Physical Optimization." 0 0 "Fitter" 0 -1 1600942764744 ""}
+{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:17 " "Fitter placement preparation operations ending: elapsed time is 00:00:17" { } { } 0 170190 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1600942780943 ""}
+{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Fitter placement operations beginning" { } { } 0 170191 "Fitter placement operations beginning" 0 0 "Fitter" 0 -1 1600942799017 ""}
+{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Fitter placement was successful" { } { } 0 170137 "Fitter placement was successful" 0 0 "Fitter" 0 -1 1600942810183 ""}
+{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:11 " "Fitter placement operations ending: elapsed time is 00:00:11" { } { } 0 170192 "Fitter placement operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1600942810183 ""}
+{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Fitter routing operations beginning" { } { } 0 170193 "Fitter routing operations beginning" 0 0 "Fitter" 0 -1 1600942812110 ""}
+{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "2 " "Router estimated average interconnect usage is 2% of the available device resources" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "27 X22_Y0 X32_Y10 " "Router estimated peak interconnect usage is 27% of the available device resources in the region that extends from location X22_Y0 to location X32_Y10" { } { { "loc" "" { Generic "/home/ks6n19/Documents/project/" { { 1 { 0 "Router estimated peak interconnect usage is 27% of the available device resources in the region that extends from location X22_Y0 to location X32_Y10"} { { 12 { 0 ""} 22 0 11 11 } } } } } } } 0 170196 "Router estimated peak interconnect usage is %1!d!%% of the available device resources in the region that extends from location %2!s! to location %3!s!" 0 0 "Design Software" 0 -1 1600942819956 ""} } { } 0 170195 "Router estimated average interconnect usage is %1!d!%% of the available device resources" 0 0 "Fitter" 0 -1 1600942819956 ""}
+{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "The Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Optimizations that may affect the design's routability were skipped" { } { } 0 170201 "Optimizations that may affect the design's routability were skipped" 0 0 "Design Software" 0 -1 1600942847341 ""} } { } 0 170199 "The Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." 0 0 "Fitter" 0 -1 1600942847341 ""}
+{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:32 " "Fitter routing operations ending: elapsed time is 00:00:32" { } { } 0 170194 "Fitter routing operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1600942847345 ""}
+{ "Info" "IVPR20K_VPR_TIMING_ANALYSIS_TIME" "the Fitter 5.94 " "Total time spent on timing analysis during the Fitter is 5.94 seconds." { } { } 0 11888 "Total time spent on timing analysis during %1!s! is %2!s! seconds." 0 0 "Fitter" 0 -1 1600942854925 ""}
+{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1600942855027 ""}
+{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1600942856234 ""}
+{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1600942856237 ""}
+{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1600942857403 ""}
+{ "Info" "IFSV_FITTER_POST_OPERATION_END" "00:00:10 " "Fitter post-fit operations ending: elapsed time is 00:00:10" { } { } 0 11801 "Fitter post-fit operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1600942864634 ""}
+{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 4 s Quartus Prime " "Quartus Prime Fitter was successful. 0 errors, 4 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "2652 " "Peak virtual memory: 2652 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1600942866872 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Sep 24 11:21:06 2020 " "Processing ended: Thu Sep 24 11:21:06 2020" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1600942866872 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:02:05 " "Elapsed time: 00:02:05" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1600942866872 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:12:16 " "Total CPU time (on all processors): 00:12:16" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1600942866872 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Fitter" 0 -1 1600942866872 ""}
diff --git a/db/de1_soc_wrapper.hier_info b/db/de1_soc_wrapper.hier_info
new file mode 100644
index 0000000000000000000000000000000000000000..5ace155ddb0cfdb99fd3c4db256b0320ecb2cd3c
--- /dev/null
+++ b/db/de1_soc_wrapper.hier_info
@@ -0,0 +1,3776 @@
+|de1_soc_wrapper
+CLOCK_50 => CLOCK_50.IN1
+SW[0] => arm_soc:soc_inst.Switches[0]
+SW[1] => arm_soc:soc_inst.Switches[1]
+SW[2] => arm_soc:soc_inst.Switches[2]
+SW[3] => arm_soc:soc_inst.Switches[3]
+SW[4] => arm_soc:soc_inst.Switches[4]
+SW[5] => arm_soc:soc_inst.Switches[5]
+SW[6] => arm_soc:soc_inst.Switches[6]
+SW[7] => arm_soc:soc_inst.Switches[7]
+SW[8] => arm_soc:soc_inst.Switches[8]
+SW[9] => arm_soc:soc_inst.Switches[9]
+KEY[0] => KEY[0].IN1
+KEY[1] => KEY[1].IN1
+KEY[2] => HRESETn.IN1
+KEY[3] => KEY[3].IN1
+LEDR[0] <= <GND>
+LEDR[1] <= <GND>
+LEDR[2] <= <GND>
+LEDR[3] <= <GND>
+LEDR[4] <= <GND>
+LEDR[5] <= <GND>
+LEDR[6] <= <GND>
+LEDR[7] <= <GND>
+LEDR[8] <= <GND>
+LEDR[9] <= <GND>
+HEX0[0] <= <VCC>
+HEX0[1] <= <VCC>
+HEX0[2] <= heartbeat.DB_MAX_OUTPUT_PORT_TYPE
+HEX0[3] <= heartbeat.DB_MAX_OUTPUT_PORT_TYPE
+HEX0[4] <= heartbeat.DB_MAX_OUTPUT_PORT_TYPE
+HEX0[5] <= <VCC>
+HEX0[6] <= heartbeat.DB_MAX_OUTPUT_PORT_TYPE
+HEX1[0] <= arm_soc:soc_inst.LOCKUP
+HEX1[1] <= <VCC>
+HEX1[2] <= <VCC>
+HEX1[3] <= <VCC>
+HEX1[4] <= <VCC>
+HEX1[5] <= <VCC>
+HEX1[6] <= <VCC>
+HEX2[0] <= <VCC>
+HEX2[1] <= <VCC>
+HEX2[2] <= <VCC>
+HEX2[3] <= <VCC>
+HEX2[4] <= running.DB_MAX_OUTPUT_PORT_TYPE
+HEX2[5] <= <VCC>
+HEX2[6] <= running.DB_MAX_OUTPUT_PORT_TYPE
+HEX3[0] <= <VCC>
+HEX3[1] <= <VCC>
+HEX3[2] <= <VCC>
+HEX3[3] <= arm_soc:soc_inst.LOCKUP
+HEX3[4] <= arm_soc:soc_inst.LOCKUP
+HEX3[5] <= arm_soc:soc_inst.LOCKUP
+HEX3[6] <= <VCC>
+VGA_R[0] <= razzle:raz_inst.VGA_R
+VGA_R[1] <= razzle:raz_inst.VGA_R
+VGA_R[2] <= razzle:raz_inst.VGA_R
+VGA_R[3] <= razzle:raz_inst.VGA_R
+VGA_R[4] <= razzle:raz_inst.VGA_R
+VGA_R[5] <= razzle:raz_inst.VGA_R
+VGA_R[6] <= razzle:raz_inst.VGA_R
+VGA_R[7] <= razzle:raz_inst.VGA_R
+VGA_G[0] <= razzle:raz_inst.VGA_G
+VGA_G[1] <= razzle:raz_inst.VGA_G
+VGA_G[2] <= razzle:raz_inst.VGA_G
+VGA_G[3] <= razzle:raz_inst.VGA_G
+VGA_G[4] <= razzle:raz_inst.VGA_G
+VGA_G[5] <= razzle:raz_inst.VGA_G
+VGA_G[6] <= razzle:raz_inst.VGA_G
+VGA_G[7] <= razzle:raz_inst.VGA_G
+VGA_B[0] <= razzle:raz_inst.VGA_B
+VGA_B[1] <= razzle:raz_inst.VGA_B
+VGA_B[2] <= razzle:raz_inst.VGA_B
+VGA_B[3] <= razzle:raz_inst.VGA_B
+VGA_B[4] <= razzle:raz_inst.VGA_B
+VGA_B[5] <= razzle:raz_inst.VGA_B
+VGA_B[6] <= razzle:raz_inst.VGA_B
+VGA_B[7] <= razzle:raz_inst.VGA_B
+VGA_HS <= razzle:raz_inst.VGA_HS
+VGA_VS <= razzle:raz_inst.VGA_VS
+VGA_CLK <= razzle:raz_inst.VGA_CLK
+VGA_BLANK_N <= razzle:raz_inst.VGA_BLANK_N
+
+
+|de1_soc_wrapper|arm_soc:soc_inst
+HCLK => CORTEXM0DS:m0_1.HCLK
+HCLK => ahb_interconnect:interconnect_1.HCLK
+HCLK => ahb_ram:ram_1.HCLK
+HCLK => ahb_switches:switches_1.HCLK
+HCLK => ahb_pixel_memory:pix1.HCLK
+HRESETn => CORTEXM0DS:m0_1.HRESETn
+HRESETn => ahb_interconnect:interconnect_1.HRESETn
+HRESETn => ahb_ram:ram_1.HRESETn
+HRESETn => ahb_switches:switches_1.HRESETn
+HRESETn => ahb_pixel_memory:pix1.HRESETn
+pixel_x[0] => ahb_pixel_memory:pix1.pixel_x[0]
+pixel_x[1] => ahb_pixel_memory:pix1.pixel_x[1]
+pixel_x[2] => ahb_pixel_memory:pix1.pixel_x[2]
+pixel_x[3] => ahb_pixel_memory:pix1.pixel_x[3]
+pixel_x[4] => ahb_pixel_memory:pix1.pixel_x[4]
+pixel_x[5] => ahb_pixel_memory:pix1.pixel_x[5]
+pixel_x[6] => ahb_pixel_memory:pix1.pixel_x[6]
+pixel_x[7] => ahb_pixel_memory:pix1.pixel_x[7]
+pixel_x[8] => ahb_pixel_memory:pix1.pixel_x[8]
+pixel_x[9] => ahb_pixel_memory:pix1.pixel_x[9]
+pixel_y[0] => ahb_pixel_memory:pix1.pixel_y[0]
+pixel_y[1] => ahb_pixel_memory:pix1.pixel_y[1]
+pixel_y[2] => ahb_pixel_memory:pix1.pixel_y[2]
+pixel_y[3] => ahb_pixel_memory:pix1.pixel_y[3]
+pixel_y[4] => ahb_pixel_memory:pix1.pixel_y[4]
+pixel_y[5] => ahb_pixel_memory:pix1.pixel_y[5]
+pixel_y[6] => ahb_pixel_memory:pix1.pixel_y[6]
+pixel_y[7] => ahb_pixel_memory:pix1.pixel_y[7]
+pixel_y[8] => ahb_pixel_memory:pix1.pixel_y[8]
+Switches[0] => ahb_switches:switches_1.Switches[0]
+Switches[1] => ahb_switches:switches_1.Switches[1]
+Switches[2] => ahb_switches:switches_1.Switches[2]
+Switches[3] => ahb_switches:switches_1.Switches[3]
+Switches[4] => ahb_switches:switches_1.Switches[4]
+Switches[5] => ahb_switches:switches_1.Switches[5]
+Switches[6] => ahb_switches:switches_1.Switches[6]
+Switches[7] => ahb_switches:switches_1.Switches[7]
+Switches[8] => ahb_switches:switches_1.Switches[8]
+Switches[9] => ahb_switches:switches_1.Switches[9]
+Switches[10] => ahb_switches:switches_1.Switches[10]
+Switches[11] => ahb_switches:switches_1.Switches[11]
+Switches[12] => ahb_switches:switches_1.Switches[12]
+Switches[13] => ahb_switches:switches_1.Switches[13]
+Switches[14] => ahb_switches:switches_1.Switches[14]
+Switches[15] => ahb_switches:switches_1.Switches[15]
+Buttons[0] => ahb_switches:switches_1.Buttons[0]
+Buttons[1] => ahb_switches:switches_1.Buttons[1]
+pixel <= ahb_pixel_memory:pix1.pixel
+LOCKUP <= CORTEXM0DS:m0_1.LOCKUP
+
+
+|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1
+HCLK => HCLK.IN1
+HRESETn => HRESETn.IN1
+HADDR[0] <= cortexm0ds_logic:u_logic.haddr_o
+HADDR[1] <= cortexm0ds_logic:u_logic.haddr_o
+HADDR[2] <= cortexm0ds_logic:u_logic.haddr_o
+HADDR[3] <= cortexm0ds_logic:u_logic.haddr_o
+HADDR[4] <= cortexm0ds_logic:u_logic.haddr_o
+HADDR[5] <= cortexm0ds_logic:u_logic.haddr_o
+HADDR[6] <= cortexm0ds_logic:u_logic.haddr_o
+HADDR[7] <= cortexm0ds_logic:u_logic.haddr_o
+HADDR[8] <= cortexm0ds_logic:u_logic.haddr_o
+HADDR[9] <= cortexm0ds_logic:u_logic.haddr_o
+HADDR[10] <= cortexm0ds_logic:u_logic.haddr_o
+HADDR[11] <= cortexm0ds_logic:u_logic.haddr_o
+HADDR[12] <= cortexm0ds_logic:u_logic.haddr_o
+HADDR[13] <= cortexm0ds_logic:u_logic.haddr_o
+HADDR[14] <= cortexm0ds_logic:u_logic.haddr_o
+HADDR[15] <= cortexm0ds_logic:u_logic.haddr_o
+HADDR[16] <= cortexm0ds_logic:u_logic.haddr_o
+HADDR[17] <= cortexm0ds_logic:u_logic.haddr_o
+HADDR[18] <= cortexm0ds_logic:u_logic.haddr_o
+HADDR[19] <= cortexm0ds_logic:u_logic.haddr_o
+HADDR[20] <= cortexm0ds_logic:u_logic.haddr_o
+HADDR[21] <= cortexm0ds_logic:u_logic.haddr_o
+HADDR[22] <= cortexm0ds_logic:u_logic.haddr_o
+HADDR[23] <= cortexm0ds_logic:u_logic.haddr_o
+HADDR[24] <= cortexm0ds_logic:u_logic.haddr_o
+HADDR[25] <= cortexm0ds_logic:u_logic.haddr_o
+HADDR[26] <= cortexm0ds_logic:u_logic.haddr_o
+HADDR[27] <= cortexm0ds_logic:u_logic.haddr_o
+HADDR[28] <= cortexm0ds_logic:u_logic.haddr_o
+HADDR[29] <= cortexm0ds_logic:u_logic.haddr_o
+HADDR[30] <= cortexm0ds_logic:u_logic.haddr_o
+HADDR[31] <= cortexm0ds_logic:u_logic.haddr_o
+HBURST[0] <= cortexm0ds_logic:u_logic.hburst_o
+HBURST[1] <= cortexm0ds_logic:u_logic.hburst_o
+HBURST[2] <= cortexm0ds_logic:u_logic.hburst_o
+HMASTLOCK <= cortexm0ds_logic:u_logic.hmastlock_o
+HPROT[0] <= cortexm0ds_logic:u_logic.hprot_o
+HPROT[1] <= cortexm0ds_logic:u_logic.hprot_o
+HPROT[2] <= cortexm0ds_logic:u_logic.hprot_o
+HPROT[3] <= cortexm0ds_logic:u_logic.hprot_o
+HSIZE[0] <= cortexm0ds_logic:u_logic.hsize_o
+HSIZE[1] <= cortexm0ds_logic:u_logic.hsize_o
+HSIZE[2] <= cortexm0ds_logic:u_logic.hsize_o
+HTRANS[0] <= cortexm0ds_logic:u_logic.htrans_o
+HTRANS[1] <= cortexm0ds_logic:u_logic.htrans_o
+HWDATA[0] <= cortexm0ds_logic:u_logic.hwdata_o
+HWDATA[1] <= cortexm0ds_logic:u_logic.hwdata_o
+HWDATA[2] <= cortexm0ds_logic:u_logic.hwdata_o
+HWDATA[3] <= cortexm0ds_logic:u_logic.hwdata_o
+HWDATA[4] <= cortexm0ds_logic:u_logic.hwdata_o
+HWDATA[5] <= cortexm0ds_logic:u_logic.hwdata_o
+HWDATA[6] <= cortexm0ds_logic:u_logic.hwdata_o
+HWDATA[7] <= cortexm0ds_logic:u_logic.hwdata_o
+HWDATA[8] <= cortexm0ds_logic:u_logic.hwdata_o
+HWDATA[9] <= cortexm0ds_logic:u_logic.hwdata_o
+HWDATA[10] <= cortexm0ds_logic:u_logic.hwdata_o
+HWDATA[11] <= cortexm0ds_logic:u_logic.hwdata_o
+HWDATA[12] <= cortexm0ds_logic:u_logic.hwdata_o
+HWDATA[13] <= cortexm0ds_logic:u_logic.hwdata_o
+HWDATA[14] <= cortexm0ds_logic:u_logic.hwdata_o
+HWDATA[15] <= cortexm0ds_logic:u_logic.hwdata_o
+HWDATA[16] <= cortexm0ds_logic:u_logic.hwdata_o
+HWDATA[17] <= cortexm0ds_logic:u_logic.hwdata_o
+HWDATA[18] <= cortexm0ds_logic:u_logic.hwdata_o
+HWDATA[19] <= cortexm0ds_logic:u_logic.hwdata_o
+HWDATA[20] <= cortexm0ds_logic:u_logic.hwdata_o
+HWDATA[21] <= cortexm0ds_logic:u_logic.hwdata_o
+HWDATA[22] <= cortexm0ds_logic:u_logic.hwdata_o
+HWDATA[23] <= cortexm0ds_logic:u_logic.hwdata_o
+HWDATA[24] <= cortexm0ds_logic:u_logic.hwdata_o
+HWDATA[25] <= cortexm0ds_logic:u_logic.hwdata_o
+HWDATA[26] <= cortexm0ds_logic:u_logic.hwdata_o
+HWDATA[27] <= cortexm0ds_logic:u_logic.hwdata_o
+HWDATA[28] <= cortexm0ds_logic:u_logic.hwdata_o
+HWDATA[29] <= cortexm0ds_logic:u_logic.hwdata_o
+HWDATA[30] <= cortexm0ds_logic:u_logic.hwdata_o
+HWDATA[31] <= cortexm0ds_logic:u_logic.hwdata_o
+HWRITE <= cortexm0ds_logic:u_logic.hwrite_o
+HRDATA[0] => HRDATA[0].IN1
+HRDATA[1] => HRDATA[1].IN1
+HRDATA[2] => HRDATA[2].IN1
+HRDATA[3] => HRDATA[3].IN1
+HRDATA[4] => HRDATA[4].IN1
+HRDATA[5] => HRDATA[5].IN1
+HRDATA[6] => HRDATA[6].IN1
+HRDATA[7] => HRDATA[7].IN1
+HRDATA[8] => HRDATA[8].IN1
+HRDATA[9] => HRDATA[9].IN1
+HRDATA[10] => HRDATA[10].IN1
+HRDATA[11] => HRDATA[11].IN1
+HRDATA[12] => HRDATA[12].IN1
+HRDATA[13] => HRDATA[13].IN1
+HRDATA[14] => HRDATA[14].IN1
+HRDATA[15] => HRDATA[15].IN1
+HRDATA[16] => HRDATA[16].IN1
+HRDATA[17] => HRDATA[17].IN1
+HRDATA[18] => HRDATA[18].IN1
+HRDATA[19] => HRDATA[19].IN1
+HRDATA[20] => HRDATA[20].IN1
+HRDATA[21] => HRDATA[21].IN1
+HRDATA[22] => HRDATA[22].IN1
+HRDATA[23] => HRDATA[23].IN1
+HRDATA[24] => HRDATA[24].IN1
+HRDATA[25] => HRDATA[25].IN1
+HRDATA[26] => HRDATA[26].IN1
+HRDATA[27] => HRDATA[27].IN1
+HRDATA[28] => HRDATA[28].IN1
+HRDATA[29] => HRDATA[29].IN1
+HRDATA[30] => HRDATA[30].IN1
+HRDATA[31] => HRDATA[31].IN1
+HREADY => HREADY.IN1
+HRESP => HRESP.IN1
+NMI => NMI.IN1
+IRQ[0] => IRQ[0].IN1
+IRQ[1] => IRQ[1].IN1
+IRQ[2] => IRQ[2].IN1
+IRQ[3] => IRQ[3].IN1
+IRQ[4] => IRQ[4].IN1
+IRQ[5] => IRQ[5].IN1
+IRQ[6] => IRQ[6].IN1
+IRQ[7] => IRQ[7].IN1
+IRQ[8] => IRQ[8].IN1
+IRQ[9] => IRQ[9].IN1
+IRQ[10] => IRQ[10].IN1
+IRQ[11] => IRQ[11].IN1
+IRQ[12] => IRQ[12].IN1
+IRQ[13] => IRQ[13].IN1
+IRQ[14] => IRQ[14].IN1
+IRQ[15] => IRQ[15].IN1
+TXEV <= cortexm0ds_logic:u_logic.txev_o
+RXEV => RXEV.IN1
+LOCKUP <= cortexm0ds_logic:u_logic.lockup_o
+SYSRESETREQ <= cortexm0ds_logic:u_logic.sys_reset_req_o
+SLEEPING <= cortexm0ds_logic:u_logic.sleeping_o
+
+
+|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic
+hclk => Ypi3z4.CLK
+hclk => Joi3z4.CLK
+hclk => Umi3z4.CLK
+hclk => Fli3z4.CLK
+hclk => Qji3z4.CLK
+hclk => Aii3z4.CLK
+hclk => Lgi3z4.CLK
+hclk => Uei3z4.CLK
+hclk => Ddi3z4.CLK
+hclk => Rbi3z4.CLK
+hclk => Cai3z4.CLK
+hclk => N8i3z4.CLK
+hclk => Y6i3z4.CLK
+hclk => J5i3z4.CLK
+hclk => S3i3z4.CLK
+hclk => B2i3z4.CLK
+hclk => M0i3z4.CLK
+hclk => Xyh3z4.CLK
+hclk => Ixh3z4.CLK
+hclk => Tvh3z4.CLK
+hclk => Euh3z4.CLK
+hclk => Psh3z4.CLK
+hclk => Arh3z4.CLK
+hclk => Lph3z4.CLK
+hclk => Wnh3z4.CLK
+hclk => Hmh3z4.CLK
+hclk => Skh3z4.CLK
+hclk => Djh3z4.CLK
+hclk => Ohh3z4.CLK
+hclk => Zfh3z4.CLK
+hclk => Ieh3z4.CLK
+hclk => Tch3z4.CLK
+hclk => Ebh3z4.CLK
+hclk => P9h3z4.CLK
+hclk => A8h3z4.CLK
+hclk => I6h3z4.CLK
+hclk => Q4h3z4.CLK
+hclk => Z2h3z4.CLK
+hclk => I1h3z4.CLK
+hclk => Tzg3z4.CLK
+hclk => Eyg3z4.CLK
+hclk => Pwg3z4.CLK
+hclk => Avg3z4.CLK
+hclk => Ltg3z4.CLK
+hclk => Wrg3z4.CLK
+hclk => Hqg3z4.CLK
+hclk => Sog3z4.CLK
+hclk => Dng3z4.CLK
+hclk => Olg3z4.CLK
+hclk => Zjg3z4.CLK
+hclk => Kig3z4.CLK
+hclk => Vgg3z4.CLK
+hclk => Gfg3z4.CLK
+hclk => Rdg3z4.CLK
+hclk => Ccg3z4.CLK
+hclk => Nag3z4.CLK
+hclk => B9g3z4.CLK
+hclk => K7g3z4.CLK
+hclk => T5g3z4.CLK
+hclk => D4g3z4.CLK
+hclk => O2g3z4.CLK
+hclk => Z0g3z4.CLK
+hclk => Kzf3z4.CLK
+hclk => Vxf3z4.CLK
+hclk => Jwf3z4.CLK
+hclk => Uuf3z4.CLK
+hclk => Ftf3z4.CLK
+hclk => Qrf3z4.CLK
+hclk => Bqf3z4.CLK
+hclk => Mof3z4.CLK
+hclk => Xmf3z4.CLK
+hclk => Ilf3z4.CLK
+hclk => Tjf3z4.CLK
+hclk => Eif3z4.CLK
+hclk => Pgf3z4.CLK
+hclk => Aff3z4.CLK
+hclk => Ldf3z4.CLK
+hclk => Wbf3z4.CLK
+hclk => Kaf3z4.CLK
+hclk => T8f3z4.CLK
+hclk => C7f3z4.CLK
+hclk => M5f3z4.CLK
+hclk => W3f3z4.CLK
+hclk => H2f3z4.CLK
+hclk => Q0f3z4.CLK
+hclk => Aze3z4.CLK
+hclk => Kxe3z4.CLK
+hclk => Vve3z4.CLK
+hclk => Hue3z4.CLK
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+hclk => Fre3z4.CLK
+hclk => Rpe3z4.CLK
+hclk => Foe3z4.CLK
+hclk => Tme3z4.CLK
+hclk => Ble3z4.CLK
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+hclk => She3z4.CLK
+hclk => Bge3z4.CLK
+hclk => Lee3z4.CLK
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+hclk => Ibe3z4.CLK
+hclk => U9e3z4.CLK
+hclk => F8e3z4.CLK
+hclk => Q6e3z4.CLK
+hclk => B5e3z4.CLK
+hclk => M3e3z4.CLK
+hclk => X1e3z4.CLK
+hclk => I0e3z4.CLK
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+hclk => Pvd3z4.CLK
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+hclk => Wqd3z4.CLK
+hclk => Hpd3z4.CLK
+hclk => Snd3z4.CLK
+hclk => Gmd3z4.CLK
+hclk => Rkd3z4.CLK
+hclk => Bjd3z4.CLK
+hclk => Lhd3z4.CLK
+hclk => Vfd3z4.CLK
+hclk => Fed3z4.CLK
+hclk => Pcd3z4.CLK
+hclk => Zad3z4.CLK
+hclk => J9d3z4.CLK
+hclk => T7d3z4.CLK
+hclk => G6d3z4.CLK
+hclk => V4d3z4.CLK
+hclk => H3d3z4.CLK
+hclk => T1d3z4.CLK
+hclk => E0d3z4.CLK
+hclk => Qyc3z4.CLK
+hclk => Cxc3z4.CLK
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+hclk => Ztc3z4.CLK
+hclk => Jsc3z4.CLK
+hclk => Tqc3z4.CLK
+hclk => Dpc3z4.CLK
+hclk => Nnc3z4.CLK
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+hclk => Jkc3z4.CLK
+hclk => Uic3z4.CLK
+hclk => Fhc3z4.CLK
+hclk => Qfc3z4.CLK
+hclk => Bec3z4.CLK
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+hclk => Vac3z4.CLK
+hclk => E9c3z4.CLK
+hclk => N7c3z4.CLK
+hclk => W5c3z4.CLK
+hclk => F4c3z4.CLK
+hclk => O2c3z4.CLK
+hclk => X0c3z4.CLK
+hclk => Gzb3z4.CLK
+hclk => Pxb3z4.CLK
+hclk => Yvb3z4.CLK
+hclk => Hub3z4.CLK
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+hclk => Ipb3z4.CLK
+hclk => Rnb3z4.CLK
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+hclk => Kkb3z4.CLK
+hclk => Tib3z4.CLK
+hclk => Dhb3z4.CLK
+hclk => Nfb3z4.CLK
+hclk => Xdb3z4.CLK
+hclk => Gcb3z4.CLK
+hclk => Pab3z4.CLK
+hclk => Z8b3z4.CLK
+hclk => J7b3z4.CLK
+hclk => S5b3z4.CLK
+hclk => C4b3z4.CLK
+hclk => M2b3z4.CLK
+hclk => W0b3z4.CLK
+hclk => Gza3z4.CLK
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+hclk => Zva3z4.CLK
+hclk => Iua3z4.CLK
+hclk => Rsa3z4.CLK
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+hclk => I793z4.CLK
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+hclk => F483z4.CLK
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+hclk => Nz73z4.CLK
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+hclk => Na73z4.CLK
+hclk => Y873z4.CLK
+hclk => J773z4.CLK
+hclk => U573z4.CLK
+hclk => F473z4.CLK
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+hclk => B173z4.CLK
+hclk => Mz63z4.CLK
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+hclk => Kw63z4.CLK
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+hclk => It63z4.CLK
+hclk => Tr63z4.CLK
+hclk => Eq63z4.CLK
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+hclk => An63z4.CLK
+hclk => Ll63z4.CLK
+hclk => Wj63z4.CLK
+hclk => Ii63z4.CLK
+hclk => Ug63z4.CLK
+hclk => Gf63z4.CLK
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+hclk => Na63z4.CLK
+hclk => Z863z4.CLK
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+hclk => X563z4.CLK
+hclk => I463z4.CLK
+hclk => T263z4.CLK
+hclk => E163z4.CLK
+hclk => Pz53z4.CLK
+hclk => Ay53z4.CLK
+hclk => Lw53z4.CLK
+hclk => Wu53z4.CLK
+hclk => Ht53z4.CLK
+hclk => Sr53z4.CLK
+hclk => Dq53z4.CLK
+hclk => Po53z4.CLK
+hclk => Bn53z4.CLK
+hclk => Nl53z4.CLK
+hclk => Zj53z4.CLK
+hclk => Ki53z4.CLK
+hclk => Vg53z4.CLK
+hclk => Gf53z4.CLK
+hclk => Rd53z4.CLK
+hclk => Cc53z4.CLK
+hclk => Na53z4.CLK
+hclk => Z853z4.CLK
+hclk => L753z4.CLK
+hclk => X553z4.CLK
+hclk => I453z4.CLK
+hclk => T253z4.CLK
+hclk => E153z4.CLK
+hclk => Qz43z4.CLK
+hclk => Cy43z4.CLK
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+hclk => Zu43z4.CLK
+hclk => Kt43z4.CLK
+hclk => Vr43z4.CLK
+hclk => Gq43z4.CLK
+hclk => Ro43z4.CLK
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+hclk => Yj43z4.CLK
+hclk => Ji43z4.CLK
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+hclk => Gf43z4.CLK
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+hclk => Ec43z4.CLK
+hclk => Qa43z4.CLK
+hclk => B943z4.CLK
+hclk => M743z4.CLK
+hclk => X543z4.CLK
+hclk => I443z4.CLK
+hclk => T243z4.CLK
+hclk => E143z4.CLK
+hclk => Qz33z4.CLK
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+hclk => Zu33z4.CLK
+hclk => Kt33z4.CLK
+hclk => Vr33z4.CLK
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+hclk => To33z4.CLK
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+hclk => Bk33z4.CLK
+hclk => Mi33z4.CLK
+hclk => Xg33z4.CLK
+hclk => If33z4.CLK
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+hclk => Ec33z4.CLK
+hclk => Pa33z4.CLK
+hclk => A933z4.CLK
+hclk => L733z4.CLK
+hclk => X533z4.CLK
+hclk => J433z4.CLK
+hclk => V233z4.CLK
+hclk => H133z4.CLK
+hclk => Sz23z4.CLK
+hclk => Dy23z4.CLK
+hclk => Ow23z4.CLK
+hclk => Zu23z4.CLK
+hclk => Kt23z4.CLK
+hclk => Vr23z4.CLK
+hclk => Hq23z4.CLK
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+hclk => Ql23z4.CLK
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+hclk => Mi23z4.CLK
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+hclk => Kf23z4.CLK
+hclk => Wd23z4.CLK
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+hclk => Sa23z4.CLK
+hclk => D923z4.CLK
+hclk => O723z4.CLK
+hclk => Z523z4.CLK
+hclk => K423z4.CLK
+hclk => V223z4.CLK
+hclk => G123z4.CLK
+hclk => Rz13z4.CLK
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+hclk => Av13z4.CLK
+hclk => Mt13z4.CLK
+hclk => Yr13z4.CLK
+hclk => Jq13z4.CLK
+hclk => Uo13z4.CLK
+hclk => Fn13z4.CLK
+hclk => Ql13z4.CLK
+hclk => Bk13z4.CLK
+hclk => Mi13z4.CLK
+hclk => Yg13z4.CLK
+hclk => Kf13z4.CLK
+hclk => Wd13z4.CLK
+hclk => Hc13z4.CLK
+hclk => Sa13z4.CLK
+hclk => E913z4.CLK
+hclk => Q713z4.CLK
+hclk => B613z4.CLK
+hclk => M413z4.CLK
+hclk => X213z4.CLK
+hclk => I113z4.CLK
+hclk => Tz03z4.CLK
+hclk => Ey03z4.CLK
+hclk => Pw03z4.CLK
+hclk => Bv03z4.CLK
+hclk => Nt03z4.CLK
+hclk => Zr03z4.CLK
+hclk => Lq03z4.CLK
+hclk => Wo03z4.CLK
+hclk => Hn03z4.CLK
+hclk => Sl03z4.CLK
+hclk => Ek03z4.CLK
+hclk => Qi03z4.CLK
+hclk => Ch03z4.CLK
+hclk => Nf03z4.CLK
+hclk => Yd03z4.CLK
+hclk => Kc03z4.CLK
+hclk => Wa03z4.CLK
+hclk => H903z4.CLK
+hclk => S703z4.CLK
+hclk => D603z4.CLK
+hclk => O403z4.CLK
+hclk => Z203z4.CLK
+hclk => K103z4.CLK
+hclk => Vzz2z4.CLK
+hclk => Hyz2z4.CLK
+hclk => Twz2z4.CLK
+hclk => Fvz2z4.CLK
+hclk => Rtz2z4.CLK
+hclk => Csz2z4.CLK
+hclk => Nqz2z4.CLK
+hclk => Yoz2z4.CLK
+hclk => Knz2z4.CLK
+hclk => Wlz2z4.CLK
+hclk => Ikz2z4.CLK
+hclk => Tiz2z4.CLK
+hclk => Ehz2z4.CLK
+hclk => Pfz2z4.CLK
+hclk => Aez2z4.CLK
+hclk => Mcz2z4.CLK
+hclk => Yaz2z4.CLK
+hclk => K9z2z4.CLK
+hclk => W7z2z4.CLK
+hclk => I6z2z4.CLK
+hclk => U4z2z4.CLK
+hclk => C3z2z4.CLK
+hclk => K1z2z4.CLK
+hclk => Wzy2z4.CLK
+hclk => Hyy2z4.CLK
+hclk => Swy2z4.CLK
+hclk => Dvy2z4.CLK
+hclk => Pty2z4.CLK
+hclk => Bsy2z4.CLK
+hclk => Nqy2z4.CLK
+hclk => Zoy2z4.CLK
+hclk => Lny2z4.CLK
+hclk => Xly2z4.CLK
+hclk => Jky2z4.CLK
+hclk => Viy2z4.CLK
+hclk => Jhy2z4.CLK
+hclk => Ufy2z4.CLK
+hclk => Fey2z4.CLK
+hclk => Qcy2z4.CLK
+hclk => Bby2z4.CLK
+hclk => M9y2z4.CLK
+hclk => Y7y2z4.CLK
+hclk => K6y2z4.CLK
+hclk => W4y2z4.CLK
+hclk => I3y2z4.CLK
+hclk => T1y2z4.CLK
+hclk => F0y2z4.CLK
+hclk => Tyx2z4.CLK
+hclk => Hxx2z4.CLK
+hclk => Vvx2z4.CLK
+hclk => Jux2z4.CLK
+hclk => Xsx2z4.CLK
+hclk => Lrx2z4.CLK
+hclk => Zpx2z4.CLK
+hclk => Nox2z4.CLK
+hclk => Bnx2z4.CLK
+hclk => Plx2z4.CLK
+hclk => Dkx2z4.CLK
+hclk => Rix2z4.CLK
+hclk => Fhx2z4.CLK
+hclk => Ufx2z4.CLK
+hclk => Jex2z4.CLK
+hclk => Ycx2z4.CLK
+hclk => Nbx2z4.CLK
+hclk => Cax2z4.CLK
+hclk => R8x2z4.CLK
+hclk => G7x2z4.CLK
+hclk => U5x2z4.CLK
+hclk => J4x2z4.CLK
+hclk => U2x2z4.CLK
+hclk => F1x2z4.CLK
+hclk => Qzw2z4.CLK
+hclk => Byw2z4.CLK
+hclk => Mww2z4.CLK
+hclk => Xuw2z4.CLK
+hclk => Itw2z4.CLK
+hclk => Urw2z4.CLK
+hclk => Gqw2z4.CLK
+hclk => Sow2z4.CLK
+hclk => Enw2z4.CLK
+hclk => Qlw2z4.CLK
+hclk => Ckw2z4.CLK
+hclk => Oiw2z4.CLK
+hclk => Ahw2z4.CLK
+hclk => Mfw2z4.CLK
+hclk => Ydw2z4.CLK
+hclk => Jcw2z4.CLK
+hclk => Vaw2z4.CLK
+hclk => G9w2z4.CLK
+hclk => U7w2z4.CLK
+hclk => I6w2z4.CLK
+hclk => S4w2z4.CLK
+hclk => C3w2z4.CLK
+hclk => R1w2z4.CLK
+hclk => G0w2z4.CLK
+hclk => Uyv2z4.CLK
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+hclk => Rvv2z4.CLK
+hclk => Duv2z4.CLK
+hclk => Psv2z4.CLK
+hclk => Arv2z4.CLK
+hclk => Lpv2z4.CLK
+hclk => Wnv2z4.CLK
+hclk => Hmv2z4.CLK
+hclk => Skv2z4.CLK
+hclk => Djv2z4.CLK
+hclk => Ohv2z4.CLK
+hclk => Zfv2z4.CLK
+hclk => Kev2z4.CLK
+hclk => Vcv2z4.CLK
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+hclk => T9v2z4.CLK
+hclk => F8v2z4.CLK
+hclk => R6v2z4.CLK
+hclk => C5v2z4.CLK
+hclk => N3v2z4.CLK
+hclk => Y1v2z4.CLK
+hclk => J0v2z4.CLK
+hclk => Uyu2z4.CLK
+hclk => Fxu2z4.CLK
+hclk => Rvu2z4.CLK
+hclk => Duu2z4.CLK
+hclk => Psu2z4.CLK
+hclk => Aru2z4.CLK
+hclk => Lpu2z4.CLK
+hclk => Wnu2z4.CLK
+hclk => Imu2z4.CLK
+hclk => Uku2z4.CLK
+hclk => Gju2z4.CLK
+hclk => Rhu2z4.CLK
+hclk => Cgu2z4.CLK
+hclk => Neu2z4.CLK
+hclk => Ycu2z4.CLK
+hclk => Jbu2z4.CLK
+hclk => U9u2z4.CLK
+hclk => F8u2z4.CLK
+hclk => Q6u2z4.CLK
+hclk => B5u2z4.CLK
+hclk => M3u2z4.CLK
+hclk => Y1u2z4.CLK
+hclk => K0u2z4.CLK
+hclk => Wyt2z4.CLK
+hclk => Ixt2z4.CLK
+hclk => Tvt2z4.CLK
+hclk => Eut2z4.CLK
+hclk => Pst2z4.CLK
+hclk => Art2z4.CLK
+hclk => Lpt2z4.CLK
+hclk => Wnt2z4.CLK
+hclk => Imt2z4.CLK
+hclk => Ukt2z4.CLK
+hclk => Gjt2z4.CLK
+hclk => Rht2z4.CLK
+hclk => Cgt2z4.CLK
+hclk => Pet2z4.CLK
+hclk => Adt2z4.CLK
+hclk => Mbt2z4.CLK
+hclk => Y9t2z4.CLK
+hclk => L8t2z4.CLK
+hclk => Y6t2z4.CLK
+hclk => O5t2z4.CLK
+hclk => A4t2z4.CLK
+hclk => I2t2z4.CLK
+hclk => R0t2z4.CLK
+hclk => Azs2z4.CLK
+hclk => Jxs2z4.CLK
+hclk => Svs2z4.CLK
+hclk => Bus2z4.CLK
+hclk => Kss2z4.CLK
+hclk => Tqs2z4.CLK
+hclk => Cps2z4.CLK
+hclk => Lns2z4.CLK
+hclk => Uls2z4.CLK
+hclk => Dks2z4.CLK
+hclk => Mis2z4.CLK
+hclk => Vgs2z4.CLK
+hclk => Ffs2z4.CLK
+hclk => Rds2z4.CLK
+hclk => Dcs2z4.CLK
+hclk => Oas2z4.CLK
+hclk => Z8s2z4.CLK
+hclk => K7s2z4.CLK
+hclk => W5s2z4.CLK
+hclk => I4s2z4.CLK
+hclk => U2s2z4.CLK
+hclk => G1s2z4.CLK
+hclk => Szr2z4.CLK
+hclk => Eyr2z4.CLK
+hclk => Qwr2z4.CLK
+hclk => Cvr2z4.CLK
+hclk => Otr2z4.CLK
+hclk => Asr2z4.CLK
+hclk => Lqr2z4.CLK
+hclk => Wor2z4.CLK
+hclk => Hnr2z4.CLK
+hclk => Slr2z4.CLK
+hclk => Dkr2z4.CLK
+hclk => Oir2z4.CLK
+hclk => Zgr2z4.CLK
+hclk => Kfr2z4.CLK
+hclk => Vdr2z4.CLK
+hclk => Gcr2z4.CLK
+hclk => Oar2z4.CLK
+hclk => W8r2z4.CLK
+hclk => I7r2z4.CLK
+hclk => U5r2z4.CLK
+hclk => G4r2z4.CLK
+hclk => S2r2z4.CLK
+hclk => E1r2z4.CLK
+hclk => Qzq2z4.CLK
+hclk => Cyq2z4.CLK
+hclk => Owq2z4.CLK
+hclk => Wuq2z4.CLK
+hclk => Etq2z4.CLK
+hclk => Trq2z4.CLK
+hclk => Eqq2z4.CLK
+hclk => Poq2z4.CLK
+hclk => Anq2z4.CLK
+hclk => Llq2z4.CLK
+hclk => Zjq2z4.CLK
+hclk => Kiq2z4.CLK
+hclk => Vgq2z4.CLK
+hclk => Gfq2z4.CLK
+hclk => Rdq2z4.CLK
+hclk => Ccq2z4.CLK
+hclk => Naq2z4.CLK
+hclk => Y8q2z4.CLK
+hclk => J7q2z4.CLK
+hclk => U5q2z4.CLK
+hclk => F4q2z4.CLK
+hclk => Q2q2z4.CLK
+hclk => B1q2z4.CLK
+hclk => Mzp2z4.CLK
+hclk => Wxp2z4.CLK
+hclk => Iwp2z4.CLK
+hclk => Uup2z4.CLK
+hclk => Gtp2z4.CLK
+hclk => Qrp2z4.CLK
+hclk => Aqp2z4.CLK
+hclk => Kop2z4.CLK
+hclk => Wmp2z4.CLK
+hclk => Ilp2z4.CLK
+hclk => Ujp2z4.CLK
+hclk => Gip2z4.CLK
+hclk => Sgp2z4.CLK
+hclk => Efp2z4.CLK
+hclk => Tdp2z4.CLK
+hclk => Ecp2z4.CLK
+hclk => Pap2z4.CLK
+hclk => A9p2z4.CLK
+hclk => L7p2z4.CLK
+hclk => W5p2z4.CLK
+hclk => H4p2z4.CLK
+hclk => S2p2z4.CLK
+hclk => D1p2z4.CLK
+hclk => Ozo2z4.CLK
+hclk => Zxo2z4.CLK
+hclk => Kwo2z4.CLK
+hclk => Vuo2z4.CLK
+hclk => Gto2z4.CLK
+hclk => Rro2z4.CLK
+hclk => Cqo2z4.CLK
+hclk => Noo2z4.CLK
+hclk => Ymo2z4.CLK
+hclk => Jlo2z4.CLK
+hclk => Ujo2z4.CLK
+hclk => Fio2z4.CLK
+hclk => Ogo2z4.CLK
+hclk => Xeo2z4.CLK
+hclk => Gdo2z4.CLK
+hclk => Rbo2z4.CLK
+hclk => Cao2z4.CLK
+hclk => N8o2z4.CLK
+hclk => Y6o2z4.CLK
+hclk => J5o2z4.CLK
+hclk => V3o2z4.CLK
+hclk => F2o2z4.CLK
+hclk => O0o2z4.CLK
+hclk => Xyn2z4.CLK
+hclk => Ixn2z4.CLK
+hclk => Tvn2z4.CLK
+hclk => Eun2z4.CLK
+hclk => Psn2z4.CLK
+hclk => Arn2z4.CLK
+hclk => Ipn2z4.CLK
+hclk => Qnn2z4.CLK
+hclk => Cmn2z4.CLK
+hclk => Okn2z4.CLK
+hclk => Ajn2z4.CLK
+hclk => Mhn2z4.CLK
+hclk => Yfn2z4.CLK
+hclk => Nen2z4.CLK
+hclk => Zcn2z4.CLK
+hclk => Lbn2z4.CLK
+hclk => X9n2z4.CLK
+hclk => G8n2z4.CLK
+hclk => R6n2z4.CLK
+hclk => C5n2z4.CLK
+hclk => N3n2z4.CLK
+hclk => Y1n2z4.CLK
+hclk => J0n2z4.CLK
+hclk => Rym2z4.CLK
+hclk => Axm2z4.CLK
+hclk => Mvm2z4.CLK
+hclk => Ytm2z4.CLK
+hclk => Ksm2z4.CLK
+hclk => Wqm2z4.CLK
+hclk => Ipm2z4.CLK
+hclk => Unm2z4.CLK
+hclk => Gmm2z4.CLK
+hclk => Skm2z4.CLK
+hclk => Ejm2z4.CLK
+hclk => Thm2z4.CLK
+hclk => Fgm2z4.CLK
+hclk => Qem2z4.CLK
+hclk => Bdm2z4.CLK
+hclk => Nbm2z4.CLK
+hclk => Cam2z4.CLK
+hclk => L8m2z4.CLK
+hclk => X6m2z4.CLK
+hclk => J5m2z4.CLK
+hclk => V3m2z4.CLK
+hclk => H2m2z4.CLK
+hclk => T0m2z4.CLK
+hclk => Fzl2z4.CLK
+hclk => Rxl2z4.CLK
+hclk => Dwl2z4.CLK
+hclk => Lul2z4.CLK
+hclk => Usl2z4.CLK
+hclk => Grl2z4.CLK
+hclk => Spl2z4.CLK
+hclk => Eol2z4.CLK
+hclk => Qml2z4.CLK
+hclk => Cll2z4.CLK
+hclk => Mjl2z4.CLK
+hclk => Xhl2z4.CLK
+hclk => Igl2z4.CLK
+hclk => Tel2z4.CLK
+hclk => Edl2z4.CLK
+hclk => Pbl2z4.CLK
+hclk => Y9l2z4.CLK
+hclk => H8l2z4.CLK
+hclk => Q6l2z4.CLK
+hclk => Z4l2z4.CLK
+hclk => K3l2z4.CLK
+hclk => V1l2z4.CLK
+hclk => J0l2z4.CLK
+hclk => Xyk2z4.CLK
+hclk => Gxk2z4.CLK
+hclk => Svk2z4.CLK
+hclk => Auk2z4.CLK
+hclk => Nsk2z4.CLK
+hclk => Ark2z4.CLK
+hclk => Npk2z4.CLK
+hclk => Aok2z4.CLK
+hclk => Omk2z4.CLK
+hclk => Zkk2z4.CLK
+hclk => Kjk2z4.CLK
+hclk => Vhk2z4.CLK
+hclk => Ggk2z4.CLK
+hclk => Rek2z4.CLK
+hclk => Idk2z4.CLK
+hclk => Wbk2z4.CLK
+hclk => Hak2z4.CLK
+hclk => S8k2z4.CLK
+hclk => D7k2z4.CLK
+hclk => O5k2z4.CLK
+hclk => Z3k2z4.CLK
+hclk => K2k2z4.CLK
+hclk => V0k2z4.CLK
+hclk => Hzj2z4.CLK
+hclk => Txj2z4.CLK
+hclk => Fwj2z4.CLK
+hclk => Ruj2z4.CLK
+hclk => Dtj2z4.CLK
+hclk => Orj2z4.CLK
+hclk => Zpj2z4.CLK
+hclk => Koj2z4.CLK
+hclk => Vmj2z4.CLK
+hclk => Glj2z4.CLK
+hclk => Sjj2z4.CLK
+hclk => Fij2z4.CLK
+hclk => Sgj2z4.CLK
+hclk => Ffj2z4.CLK
+hclk => Qdj2z4.CLK
+hclk => Fcj2z4.CLK
+hclk => Uaj2z4.CLK
+hclk => F9j2z4.CLK
+hclk => Q7j2z4.CLK
+hclk => B6j2z4.CLK
+hclk => M4j2z4.CLK
+hclk => X2j2z4.CLK
+hclk => M1j2z4.CLK
+hclk => Yzi2z4.CLK
+hclk => Kyi2z4.CLK
+hclk => Ywi2z4.CLK
+hclk => Mvi2z4.CLK
+hclk => Xti2z4.CLK
+hclk => Isi2z4.CLK
+hclk => Uqi2z4.CLK
+hclk => Fpi2z4.CLK
+hclk => Rni2z4.CLK
+hclk => Emi2z4.CLK
+hclk => Tki2z4.CLK
+hclk => Gji2z4.CLK
+hclk => Rhi2z4.CLK
+hclk => Igi2z4.CLK
+hclk => Zei2z4.CLK
+hclk => Pdi2z4.CLK
+hclk => Gci2z4.CLK
+hclk => Wai2z4.CLK
+hclk => H9i2z4.CLK
+hclk => Z7i2z4.CLK
+hclk => J6i2z4.CLK
+hreset_n => Ypi3z4.ACLR
+hreset_n => Xti2z4.PRESET
+hreset_n => Uu83z4.PRESET
+hreset_n => Jw83z4.PRESET
+hreset_n => Zkk2z4.PRESET
+hreset_n => Yx83z4.PRESET
+hreset_n => Nz83z4.PRESET
+hreset_n => C193z4.PRESET
+hreset_n => R293z4.PRESET
+hreset_n => Wbf3z4.PRESET
+hreset_n => Md93z4.PRESET
+hreset_n => Bf93z4.PRESET
+hreset_n => Nag3z4.PRESET
+hreset_n => Qg93z4.PRESET
+hreset_n => Fi93z4.PRESET
+hreset_n => Uj93z4.PRESET
+hreset_n => Jl93z4.PRESET
+hreset_n => E0d3z4.PRESET
+hreset_n => No93z4.PRESET
+hreset_n => Cq93z4.PRESET
+hreset_n => Rr93z4.PRESET
+hreset_n => Snd3z4.PRESET
+hreset_n => Gt93z4.PRESET
+hreset_n => Cxc3z4.PRESET
+hreset_n => Qyc3z4.PRESET
+hreset_n => Grl2z4.PRESET
+hreset_n => G493z4.PRESET
+hreset_n => W893z4.PRESET
+hreset_n => Ka93z4.PRESET
+hreset_n => Yb93z4.PRESET
+hreset_n => Vu93z4.PRESET
+hreset_n => Txj2z4.PRESET
+hreset_n => Unm2z4.PRESET
+hreset_n => Koj2z4.PRESET
+hreset_n => Rro2z4.PRESET
+hreset_n => Fio2z4.PRESET
+hreset_n => Kjk2z4.PRESET
+hreset_n => Gfq2z4.PRESET
+hreset_n => V0k2z4.PRESET
+hreset_n => Pbl2z4.PRESET
+hreset_n => Zpj2z4.PRESET
+hreset_n => Orj2z4.PRESET
+hreset_n => J0n2z4.PRESET
+hreset_n => Anq2z4.PRESET
+hreset_n => Ccg3z4.PRESET
+hreset_n => A9p2z4.PRESET
+hreset_n => Arn2z4.PRESET
+hreset_n => Kwo2z4.PRESET
+hreset_n => J5o2z4.PRESET
+hreset_n => Naq2z4.PRESET
+hreset_n => Mzp2z4.PRESET
+hreset_n => Hnr2z4.PRESET
+hreset_n => Gcr2z4.PRESET
+hreset_n => Hpd3z4.PRESET
+hreset_n => K7s2z4.PRESET
+hreset_n => U2s2z4.PRESET
+hreset_n => Asr2z4.PRESET
+hreset_n => Spl2z4.PRESET
+hreset_n => Ipm2z4.PRESET
+hreset_n => Sgp2z4.PRESET
+hreset_n => E1r2z4.PRESET
+hreset_n => T0m2z4.PRESET
+hreset_n => Yfn2z4.PRESET
+hreset_n => Fwj2z4.PRESET
+hreset_n => Gmm2z4.PRESET
+hreset_n => Ll73z4.PRESET
+hreset_n => Ft73z4.PRESET
+hreset_n => Uu73z4.PRESET
+hreset_n => An73z4.PRESET
+hreset_n => Jw73z4.PRESET
+hreset_n => Yx73z4.PRESET
+hreset_n => Nz73z4.PRESET
+hreset_n => C183z4.PRESET
+hreset_n => Ldf3z4.PRESET
+hreset_n => V883z4.PRESET
+hreset_n => Ka83z4.PRESET
+hreset_n => Rdg3z4.PRESET
+hreset_n => Zb83z4.PRESET
+hreset_n => Od83z4.PRESET
+hreset_n => Df83z4.PRESET
+hreset_n => Sg83z4.PRESET
+hreset_n => Ft83z4.PRESET
+hreset_n => Hi83z4.PRESET
+hreset_n => Wj83z4.PRESET
+hreset_n => Ll83z4.PRESET
+hreset_n => Wqd3z4.PRESET
+hreset_n => An83z4.PRESET
+hreset_n => Dq83z4.PRESET
+hreset_n => Rr83z4.PRESET
+hreset_n => Po73z4.PRESET
+hreset_n => R283z4.PRESET
+hreset_n => F483z4.PRESET
+hreset_n => T583z4.PRESET
+hreset_n => H783z4.PRESET
+hreset_n => Po83z4.PRESET
+hreset_n => Dq73z4.PRESET
+hreset_n => Rr73z4.PRESET
+hreset_n => Cc63z4.PRESET
+hreset_n => Wj63z4.PRESET
+hreset_n => Ll63z4.PRESET
+hreset_n => Rd63z4.PRESET
+hreset_n => An63z4.PRESET
+hreset_n => Po63z4.PRESET
+hreset_n => Eq63z4.PRESET
+hreset_n => Tr63z4.PRESET
+hreset_n => Aff3z4.PRESET
+hreset_n => Mz63z4.PRESET
+hreset_n => B173z4.PRESET
+hreset_n => Gfg3z4.PRESET
+hreset_n => Q273z4.PRESET
+hreset_n => F473z4.PRESET
+hreset_n => U573z4.PRESET
+hreset_n => J773z4.PRESET
+hreset_n => Wj73z4.PRESET
+hreset_n => Y873z4.PRESET
+hreset_n => Na73z4.PRESET
+hreset_n => Cc73z4.PRESET
+hreset_n => Lsd3z4.PRESET
+hreset_n => Rd73z4.PRESET
+hreset_n => Ug73z4.PRESET
+hreset_n => Ii73z4.PRESET
+hreset_n => Gf63z4.PRESET
+hreset_n => It63z4.PRESET
+hreset_n => Wu63z4.PRESET
+hreset_n => Kw63z4.PRESET
+hreset_n => Yx63z4.PRESET
+hreset_n => Gf73z4.PRESET
+hreset_n => Ug63z4.PRESET
+hreset_n => Ii63z4.PRESET
+hreset_n => Lpu2z4.PRESET
+hreset_n => Fxu2z4.PRESET
+hreset_n => Uyu2z4.PRESET
+hreset_n => Aru2z4.PRESET
+hreset_n => J0v2z4.PRESET
+hreset_n => Y1v2z4.PRESET
+hreset_n => N3v2z4.PRESET
+hreset_n => C5v2z4.PRESET
+hreset_n => Xmf3z4.PRESET
+hreset_n => Vcv2z4.PRESET
+hreset_n => Kev2z4.PRESET
+hreset_n => Dng3z4.PRESET
+hreset_n => Zfv2z4.PRESET
+hreset_n => Ohv2z4.PRESET
+hreset_n => Djv2z4.PRESET
+hreset_n => Skv2z4.PRESET
+hreset_n => Fxv2z4.PRESET
+hreset_n => Hmv2z4.PRESET
+hreset_n => Wnv2z4.PRESET
+hreset_n => Lpv2z4.PRESET
+hreset_n => I0e3z4.PRESET
+hreset_n => Arv2z4.PRESET
+hreset_n => Duv2z4.PRESET
+hreset_n => Rvv2z4.PRESET
+hreset_n => Psu2z4.PRESET
+hreset_n => R6v2z4.PRESET
+hreset_n => F8v2z4.PRESET
+hreset_n => T9v2z4.PRESET
+hreset_n => Hbv2z4.PRESET
+hreset_n => Psv2z4.PRESET
+hreset_n => Duu2z4.PRESET
+hreset_n => Rvu2z4.PRESET
+hreset_n => Glj2z4.PRESET
+hreset_n => Gto2z4.PRESET
+hreset_n => Ujo2z4.PRESET
+hreset_n => Ggk2z4.PRESET
+hreset_n => Vgq2z4.PRESET
+hreset_n => K2k2z4.PRESET
+hreset_n => Edl2z4.PRESET
+hreset_n => Vmj2z4.PRESET
+hreset_n => Mof3z4.PRESET
+hreset_n => Y1n2z4.PRESET
+hreset_n => Poq2z4.PRESET
+hreset_n => Sog3z4.PRESET
+hreset_n => Pap2z4.PRESET
+hreset_n => Psn2z4.PRESET
+hreset_n => Zxo2z4.PRESET
+hreset_n => Y6o2z4.PRESET
+hreset_n => Ccq2z4.PRESET
+hreset_n => B1q2z4.PRESET
+hreset_n => Wor2z4.PRESET
+hreset_n => Vdr2z4.PRESET
+hreset_n => X1e3z4.PRESET
+hreset_n => Z8s2z4.PRESET
+hreset_n => I4s2z4.PRESET
+hreset_n => Otr2z4.PRESET
+hreset_n => Qml2z4.PRESET
+hreset_n => Wqm2z4.PRESET
+hreset_n => Gip2z4.PRESET
+hreset_n => S2r2z4.PRESET
+hreset_n => H2m2z4.PRESET
+hreset_n => Mhn2z4.PRESET
+hreset_n => Dtj2z4.PRESET
+hreset_n => Ejm2z4.PRESET
+hreset_n => Cgt2z4.PRESET
+hreset_n => Wnt2z4.PRESET
+hreset_n => Lpt2z4.PRESET
+hreset_n => Rht2z4.PRESET
+hreset_n => Art2z4.PRESET
+hreset_n => Pst2z4.PRESET
+hreset_n => Eut2z4.PRESET
+hreset_n => Tvt2z4.PRESET
+hreset_n => Bqf3z4.PRESET
+hreset_n => M3u2z4.PRESET
+hreset_n => B5u2z4.PRESET
+hreset_n => Hqg3z4.PRESET
+hreset_n => Q6u2z4.PRESET
+hreset_n => F8u2z4.PRESET
+hreset_n => U9u2z4.PRESET
+hreset_n => Jbu2z4.PRESET
+hreset_n => Wnu2z4.PRESET
+hreset_n => Ycu2z4.PRESET
+hreset_n => Neu2z4.PRESET
+hreset_n => Cgu2z4.PRESET
+hreset_n => M3e3z4.PRESET
+hreset_n => Rhu2z4.PRESET
+hreset_n => Uku2z4.PRESET
+hreset_n => Imu2z4.PRESET
+hreset_n => Gjt2z4.PRESET
+hreset_n => Ixt2z4.PRESET
+hreset_n => Wyt2z4.PRESET
+hreset_n => K0u2z4.PRESET
+hreset_n => Y1u2z4.PRESET
+hreset_n => Gju2z4.PRESET
+hreset_n => Ukt2z4.PRESET
+hreset_n => Imt2z4.PRESET
+hreset_n => Isi2z4.PRESET
+hreset_n => Vuo2z4.PRESET
+hreset_n => Jlo2z4.PRESET
+hreset_n => Vhk2z4.PRESET
+hreset_n => Kiq2z4.PRESET
+hreset_n => Z3k2z4.PRESET
+hreset_n => Tel2z4.PRESET
+hreset_n => F9j2z4.PRESET
+hreset_n => Fpi2z4.PRESET
+hreset_n => N3n2z4.PRESET
+hreset_n => Eqq2z4.PRESET
+hreset_n => Wrg3z4.PRESET
+hreset_n => Ecp2z4.PRESET
+hreset_n => Eun2z4.PRESET
+hreset_n => Ozo2z4.PRESET
+hreset_n => N8o2z4.PRESET
+hreset_n => Rdq2z4.PRESET
+hreset_n => Q2q2z4.PRESET
+hreset_n => Lqr2z4.PRESET
+hreset_n => Kfr2z4.PRESET
+hreset_n => B5e3z4.PRESET
+hreset_n => Oas2z4.PRESET
+hreset_n => W5s2z4.PRESET
+hreset_n => Cvr2z4.PRESET
+hreset_n => Eol2z4.PRESET
+hreset_n => Ksm2z4.PRESET
+hreset_n => Ujp2z4.PRESET
+hreset_n => G4r2z4.PRESET
+hreset_n => V3m2z4.PRESET
+hreset_n => Ajn2z4.PRESET
+hreset_n => Ruj2z4.PRESET
+hreset_n => Skm2z4.PRESET
+hreset_n => T253z4.PRESET
+hreset_n => Na53z4.PRESET
+hreset_n => Cc53z4.PRESET
+hreset_n => I453z4.PRESET
+hreset_n => Rd53z4.PRESET
+hreset_n => Gf53z4.PRESET
+hreset_n => Vg53z4.PRESET
+hreset_n => Ki53z4.PRESET
+hreset_n => Pgf3z4.PRESET
+hreset_n => Dq53z4.PRESET
+hreset_n => Sr53z4.PRESET
+hreset_n => Vgg3z4.PRESET
+hreset_n => Ht53z4.PRESET
+hreset_n => Wu53z4.PRESET
+hreset_n => Lw53z4.PRESET
+hreset_n => Ay53z4.PRESET
+hreset_n => Na63z4.PRESET
+hreset_n => Pz53z4.PRESET
+hreset_n => E163z4.PRESET
+hreset_n => T263z4.PRESET
+hreset_n => Aud3z4.PRESET
+hreset_n => I463z4.PRESET
+hreset_n => L763z4.PRESET
+hreset_n => Z863z4.PRESET
+hreset_n => X553z4.PRESET
+hreset_n => Zj53z4.PRESET
+hreset_n => Nl53z4.PRESET
+hreset_n => Bn53z4.PRESET
+hreset_n => Po53z4.PRESET
+hreset_n => X563z4.PRESET
+hreset_n => L753z4.PRESET
+hreset_n => Z853z4.PRESET
+hreset_n => Kt33z4.PRESET
+hreset_n => E143z4.PRESET
+hreset_n => T243z4.PRESET
+hreset_n => Zu33z4.PRESET
+hreset_n => I443z4.PRESET
+hreset_n => X543z4.PRESET
+hreset_n => M743z4.PRESET
+hreset_n => B943z4.PRESET
+hreset_n => Eif3z4.PRESET
+hreset_n => Ug43z4.PRESET
+hreset_n => Ji43z4.PRESET
+hreset_n => Kig3z4.PRESET
+hreset_n => Yj43z4.PRESET
+hreset_n => Nl43z4.PRESET
+hreset_n => Cn43z4.PRESET
+hreset_n => Ro43z4.PRESET
+hreset_n => E153z4.PRESET
+hreset_n => Gq43z4.PRESET
+hreset_n => Vr43z4.PRESET
+hreset_n => Kt43z4.PRESET
+hreset_n => Pvd3z4.PRESET
+hreset_n => Zu43z4.PRESET
+hreset_n => Cy43z4.PRESET
+hreset_n => Qz43z4.PRESET
+hreset_n => Ow33z4.PRESET
+hreset_n => Qa43z4.PRESET
+hreset_n => Ec43z4.PRESET
+hreset_n => Sd43z4.PRESET
+hreset_n => Gf43z4.PRESET
+hreset_n => Ow43z4.PRESET
+hreset_n => Cy33z4.PRESET
+hreset_n => Qz33z4.PRESET
+hreset_n => Bk23z4.PRESET
+hreset_n => Vr23z4.PRESET
+hreset_n => Kt23z4.PRESET
+hreset_n => Ql23z4.PRESET
+hreset_n => Zu23z4.PRESET
+hreset_n => Ow23z4.PRESET
+hreset_n => Dy23z4.PRESET
+hreset_n => Sz23z4.PRESET
+hreset_n => Tjf3z4.PRESET
+hreset_n => L733z4.PRESET
+hreset_n => A933z4.PRESET
+hreset_n => Zjg3z4.PRESET
+hreset_n => Pa33z4.PRESET
+hreset_n => Ec33z4.PRESET
+hreset_n => Td33z4.PRESET
+hreset_n => If33z4.PRESET
+hreset_n => Vr33z4.PRESET
+hreset_n => Xg33z4.PRESET
+hreset_n => Mi33z4.PRESET
+hreset_n => Bk33z4.PRESET
+hreset_n => Exd3z4.PRESET
+hreset_n => Ql33z4.PRESET
+hreset_n => To33z4.PRESET
+hreset_n => Hq33z4.PRESET
+hreset_n => Fn23z4.PRESET
+hreset_n => H133z4.PRESET
+hreset_n => V233z4.PRESET
+hreset_n => J433z4.PRESET
+hreset_n => X533z4.PRESET
+hreset_n => Fn33z4.PRESET
+hreset_n => To23z4.PRESET
+hreset_n => Hq23z4.PRESET
+hreset_n => Sa13z4.PRESET
+hreset_n => Mi13z4.PRESET
+hreset_n => Bk13z4.PRESET
+hreset_n => Hc13z4.PRESET
+hreset_n => Ql13z4.PRESET
+hreset_n => Fn13z4.PRESET
+hreset_n => Uo13z4.PRESET
+hreset_n => Jq13z4.PRESET
+hreset_n => Ilf3z4.PRESET
+hreset_n => Cy13z4.PRESET
+hreset_n => Rz13z4.PRESET
+hreset_n => Olg3z4.PRESET
+hreset_n => G123z4.PRESET
+hreset_n => V223z4.PRESET
+hreset_n => K423z4.PRESET
+hreset_n => Z523z4.PRESET
+hreset_n => Mi23z4.PRESET
+hreset_n => O723z4.PRESET
+hreset_n => D923z4.PRESET
+hreset_n => Sa23z4.PRESET
+hreset_n => Tyd3z4.PRESET
+hreset_n => Hc23z4.PRESET
+hreset_n => Kf23z4.PRESET
+hreset_n => Yg23z4.PRESET
+hreset_n => Wd13z4.PRESET
+hreset_n => Yr13z4.PRESET
+hreset_n => Mt13z4.PRESET
+hreset_n => Av13z4.PRESET
+hreset_n => Ow13z4.PRESET
+hreset_n => Wd23z4.PRESET
+hreset_n => Kf13z4.PRESET
+hreset_n => Yg13z4.PRESET
+hreset_n => Ehz2z4.PRESET
+hreset_n => J5i3z4.PRESET
+hreset_n => Yoz2z4.PRESET
+hreset_n => Tiz2z4.PRESET
+hreset_n => Djh3z4.PRESET
+hreset_n => Nqz2z4.PRESET
+hreset_n => Csz2z4.PRESET
+hreset_n => Qji3z4.PRESET
+hreset_n => Qrf3z4.PRESET
+hreset_n => Vzz2z4.PRESET
+hreset_n => A8h3z4.PRESET
+hreset_n => Ltg3z4.PRESET
+hreset_n => Tvh3z4.PRESET
+hreset_n => K103z4.PRESET
+hreset_n => Z203z4.PRESET
+hreset_n => O403z4.PRESET
+hreset_n => Lph3z4.PRESET
+hreset_n => D603z4.PRESET
+hreset_n => Vxf3z4.PRESET
+hreset_n => S703z4.PRESET
+hreset_n => Q6e3z4.PRESET
+hreset_n => H903z4.PRESET
+hreset_n => Rpe3z4.PRESET
+hreset_n => Kc03z4.PRESET
+hreset_n => Ikz2z4.PRESET
+hreset_n => Rtz2z4.PRESET
+hreset_n => Fvz2z4.PRESET
+hreset_n => Twz2z4.PRESET
+hreset_n => Hyz2z4.PRESET
+hreset_n => Wa03z4.PRESET
+hreset_n => Wlz2z4.PRESET
+hreset_n => Knz2z4.PRESET
+hreset_n => Yd03z4.PRESET
+hreset_n => Y6i3z4.PRESET
+hreset_n => Sl03z4.PRESET
+hreset_n => Nf03z4.PRESET
+hreset_n => Skh3z4.PRESET
+hreset_n => Hn03z4.PRESET
+hreset_n => Wo03z4.PRESET
+hreset_n => Fli3z4.PRESET
+hreset_n => Ftf3z4.PRESET
+hreset_n => Pw03z4.PRESET
+hreset_n => P9h3z4.PRESET
+hreset_n => Avg3z4.PRESET
+hreset_n => Ixh3z4.PRESET
+hreset_n => Ey03z4.PRESET
+hreset_n => Tz03z4.PRESET
+hreset_n => I113z4.PRESET
+hreset_n => Arh3z4.PRESET
+hreset_n => X213z4.PRESET
+hreset_n => Kzf3z4.PRESET
+hreset_n => M413z4.PRESET
+hreset_n => F8e3z4.PRESET
+hreset_n => B613z4.PRESET
+hreset_n => Fre3z4.PRESET
+hreset_n => E913z4.PRESET
+hreset_n => Ch03z4.PRESET
+hreset_n => Lq03z4.PRESET
+hreset_n => Zr03z4.PRESET
+hreset_n => Nt03z4.PRESET
+hreset_n => Bv03z4.PRESET
+hreset_n => Q713z4.PRESET
+hreset_n => Qi03z4.PRESET
+hreset_n => Ek03z4.PRESET
+hreset_n => X2j2z4.PRESET
+hreset_n => N8i3z4.PRESET
+hreset_n => Ymo2z4.PRESET
+hreset_n => Rek2z4.PRESET
+hreset_n => Hmh3z4.PRESET
+hreset_n => O5k2z4.PRESET
+hreset_n => Igl2z4.PRESET
+hreset_n => Umi3z4.PRESET
+hreset_n => M4j2z4.PRESET
+hreset_n => C5n2z4.PRESET
+hreset_n => Ebh3z4.PRESET
+hreset_n => Pwg3z4.PRESET
+hreset_n => Xyh3z4.PRESET
+hreset_n => Tvn2z4.PRESET
+hreset_n => D1p2z4.PRESET
+hreset_n => Cao2z4.PRESET
+hreset_n => Psh3z4.PRESET
+hreset_n => F4q2z4.PRESET
+hreset_n => Z0g3z4.PRESET
+hreset_n => Zgr2z4.PRESET
+hreset_n => U9e3z4.PRESET
+hreset_n => Dcs2z4.PRESET
+hreset_n => Tse3z4.PRESET
+hreset_n => Qwr2z4.PRESET
+hreset_n => Cll2z4.PRESET
+hreset_n => Ytm2z4.PRESET
+hreset_n => Ilp2z4.PRESET
+hreset_n => U5r2z4.PRESET
+hreset_n => J5m2z4.PRESET
+hreset_n => Okn2z4.PRESET
+hreset_n => Pfz2z4.PRESET
+hreset_n => Cai3z4.PRESET
+hreset_n => Noo2z4.PRESET
+hreset_n => Aez2z4.PRESET
+hreset_n => Wnh3z4.PRESET
+hreset_n => D7k2z4.PRESET
+hreset_n => Xhl2z4.PRESET
+hreset_n => Joi3z4.PRESET
+hreset_n => Uuf3z4.PRESET
+hreset_n => R6n2z4.PRESET
+hreset_n => Tch3z4.PRESET
+hreset_n => Eyg3z4.PRESET
+hreset_n => M0i3z4.PRESET
+hreset_n => Ixn2z4.PRESET
+hreset_n => S2p2z4.PRESET
+hreset_n => Rbo2z4.PRESET
+hreset_n => Euh3z4.PRESET
+hreset_n => U5q2z4.PRESET
+hreset_n => O2g3z4.PRESET
+hreset_n => Oir2z4.PRESET
+hreset_n => Ibe3z4.PRESET
+hreset_n => Rds2z4.PRESET
+hreset_n => Hue3z4.PRESET
+hreset_n => Eyr2z4.PRESET
+hreset_n => Mcz2z4.PRESET
+hreset_n => Mvm2z4.PRESET
+hreset_n => Wmp2z4.PRESET
+hreset_n => I7r2z4.PRESET
+hreset_n => X6m2z4.PRESET
+hreset_n => Cmn2z4.PRESET
+hreset_n => J0l2z4.PRESET
+hreset_n => Omk2z4.PRESET
+hreset_n => Vvx2z4.PRESET
+hreset_n => Jux2z4.PRESET
+hreset_n => Xsx2z4.PRESET
+hreset_n => Lrx2z4.PRESET
+hreset_n => Zpx2z4.PRESET
+hreset_n => Xyk2z4.PRESET
+hreset_n => Kaf3z4.PRESET
+hreset_n => Nox2z4.PRESET
+hreset_n => Foe3z4.PRESET
+hreset_n => B9g3z4.PRESET
+hreset_n => Zjq2z4.PRESET
+hreset_n => Bnx2z4.PRESET
+hreset_n => Plx2z4.PRESET
+hreset_n => Dkx2z4.PRESET
+hreset_n => Jwf3z4.PRESET
+hreset_n => Rix2z4.PRESET
+hreset_n => Tme3z4.PRESET
+hreset_n => Fhx2z4.PRESET
+hreset_n => Gmd3z4.PRESET
+hreset_n => Ufx2z4.PRESET
+hreset_n => V4d3z4.PRESET
+hreset_n => Jex2z4.PRESET
+hreset_n => Ycx2z4.PRESET
+hreset_n => Nbx2z4.PRESET
+hreset_n => Cax2z4.PRESET
+hreset_n => R8x2z4.PRESET
+hreset_n => G7x2z4.PRESET
+hreset_n => J4x2z4.PRESET
+hreset_n => Fcj2z4.PRESET
+hreset_n => Gci2z4.PRESET
+hreset_n => Igi2z4.PRESET
+hreset_n => Zei2z4.ACLR
+hreset_n => Idk2z4.ACLR
+hreset_n => Z7i2z4.PRESET
+hreset_n => Tdp2z4.ACLR
+hreset_n => Trq2z4.ACLR
+hreset_n => Cam2z4.ACLR
+hreset_n => Uaj2z4.ACLR
+hreset_n => G0w2z4.PRESET
+hreset_n => R1w2z4.PRESET
+hreset_n => Nen2z4.ACLR
+hreset_n => Thm2z4.ACLR
+hreset_n => J6i2z4.ACLR
+hreset_n => H9i2z4.PRESET
+hreset_n => Wai2z4.PRESET
+hreset_n => Pdi2z4.PRESET
+hreset_n => Rhi2z4.PRESET
+hreset_n => Gji2z4.ACLR
+hreset_n => Tki2z4.ACLR
+hreset_n => Emi2z4.ACLR
+hreset_n => Rni2z4.PRESET
+hreset_n => Uqi2z4.ACLR
+hreset_n => Mvi2z4.ACLR
+hreset_n => Ywi2z4.ACLR
+hreset_n => Kyi2z4.PRESET
+hreset_n => Yzi2z4.PRESET
+hreset_n => M1j2z4.PRESET
+hreset_n => B6j2z4.PRESET
+hreset_n => Q7j2z4.PRESET
+hreset_n => Qdj2z4.PRESET
+hreset_n => Ffj2z4.ACLR
+hreset_n => Sgj2z4.ACLR
+hreset_n => Fij2z4.ACLR
+hreset_n => Sjj2z4.PRESET
+hreset_n => Hzj2z4.ACLR
+hreset_n => S8k2z4.PRESET
+hreset_n => Hak2z4.PRESET
+hreset_n => Wbk2z4.ACLR
+hreset_n => Aok2z4.ACLR
+hreset_n => Npk2z4.ACLR
+hreset_n => Ark2z4.ACLR
+hreset_n => Nsk2z4.ACLR
+hreset_n => Auk2z4.PRESET
+hreset_n => Svk2z4.PRESET
+hreset_n => Gxk2z4.ACLR
+hreset_n => V1l2z4.PRESET
+hreset_n => K3l2z4.ACLR
+hreset_n => Z4l2z4.ACLR
+hreset_n => Q6l2z4.ACLR
+hreset_n => H8l2z4.ACLR
+hreset_n => Y9l2z4.ACLR
+hreset_n => Mjl2z4.ACLR
+hreset_n => Usl2z4.ACLR
+hreset_n => Lul2z4.ACLR
+hreset_n => Dwl2z4.PRESET
+hreset_n => Rxl2z4.PRESET
+hreset_n => Fzl2z4.PRESET
+hreset_n => L8m2z4.PRESET
+hreset_n => Nbm2z4.ACLR
+hreset_n => Bdm2z4.PRESET
+hreset_n => Qem2z4.PRESET
+hreset_n => Fgm2z4.PRESET
+hreset_n => Axm2z4.ACLR
+hreset_n => Rym2z4.ACLR
+hreset_n => G8n2z4.ACLR
+hreset_n => X9n2z4.ACLR
+hreset_n => Lbn2z4.PRESET
+hreset_n => Zcn2z4.PRESET
+hreset_n => Qnn2z4.ACLR
+hreset_n => Ipn2z4.ACLR
+hreset_n => Xyn2z4.PRESET
+hreset_n => O0o2z4.PRESET
+hreset_n => F2o2z4.PRESET
+hreset_n => V3o2z4.ACLR
+hreset_n => Gdo2z4.PRESET
+hreset_n => Xeo2z4.PRESET
+hreset_n => Ogo2z4.PRESET
+hreset_n => Cqo2z4.PRESET
+hreset_n => H4p2z4.PRESET
+hreset_n => W5p2z4.PRESET
+hreset_n => L7p2z4.PRESET
+hreset_n => Efp2z4.PRESET
+hreset_n => Kop2z4.ACLR
+hreset_n => Aqp2z4.ACLR
+hreset_n => Qrp2z4.ACLR
+hreset_n => Gtp2z4.PRESET
+hreset_n => Uup2z4.PRESET
+hreset_n => Iwp2z4.PRESET
+hreset_n => Wxp2z4.ACLR
+hreset_n => J7q2z4.PRESET
+hreset_n => Y8q2z4.PRESET
+hreset_n => Llq2z4.PRESET
+hreset_n => Etq2z4.ACLR
+hreset_n => Wuq2z4.ACLR
+hreset_n => Owq2z4.PRESET
+hreset_n => Cyq2z4.PRESET
+hreset_n => Qzq2z4.PRESET
+hreset_n => W8r2z4.ACLR
+hreset_n => Oar2z4.ACLR
+hreset_n => Dkr2z4.PRESET
+hreset_n => Slr2z4.PRESET
+hreset_n => Szr2z4.PRESET
+hreset_n => G1s2z4.PRESET
+hreset_n => Ffs2z4.ACLR
+hreset_n => Vgs2z4.ACLR
+hreset_n => Mis2z4.ACLR
+hreset_n => Dks2z4.ACLR
+hreset_n => Uls2z4.ACLR
+hreset_n => Lns2z4.ACLR
+hreset_n => Cps2z4.ACLR
+hreset_n => Tqs2z4.ACLR
+hreset_n => Kss2z4.ACLR
+hreset_n => Bus2z4.ACLR
+hreset_n => Svs2z4.ACLR
+hreset_n => Jxs2z4.ACLR
+hreset_n => Azs2z4.ACLR
+hreset_n => R0t2z4.ACLR
+hreset_n => I2t2z4.PRESET
+hreset_n => A4t2z4.ACLR
+hreset_n => O5t2z4.PRESET
+hreset_n => Y6t2z4.ACLR
+hreset_n => L8t2z4.ACLR
+hreset_n => Y9t2z4.ACLR
+hreset_n => Mbt2z4.ACLR
+hreset_n => Adt2z4.ACLR
+hreset_n => Pet2z4.ACLR
+hreset_n => Uyv2z4.ACLR
+hreset_n => C3w2z4.ACLR
+hreset_n => S4w2z4.ACLR
+hreset_n => I6w2z4.ACLR
+hreset_n => U7w2z4.ACLR
+hreset_n => G9w2z4.PRESET
+hreset_n => Vaw2z4.ACLR
+hreset_n => Jcw2z4.PRESET
+hreset_n => Ydw2z4.PRESET
+hreset_n => Mfw2z4.PRESET
+hreset_n => Ahw2z4.PRESET
+hreset_n => Oiw2z4.PRESET
+hreset_n => Ckw2z4.PRESET
+hreset_n => Qlw2z4.PRESET
+hreset_n => Enw2z4.PRESET
+hreset_n => Sow2z4.PRESET
+hreset_n => Gqw2z4.PRESET
+hreset_n => Urw2z4.PRESET
+hreset_n => Itw2z4.PRESET
+hreset_n => Xuw2z4.PRESET
+hreset_n => Mww2z4.PRESET
+hreset_n => Byw2z4.PRESET
+hreset_n => Qzw2z4.PRESET
+hreset_n => F1x2z4.PRESET
+hreset_n => U2x2z4.PRESET
+hreset_n => U5x2z4.ACLR
+hreset_n => Hxx2z4.PRESET
+hreset_n => Tyx2z4.PRESET
+hreset_n => F0y2z4.PRESET
+hreset_n => T1y2z4.PRESET
+hreset_n => I3y2z4.PRESET
+hreset_n => W4y2z4.PRESET
+hreset_n => K6y2z4.PRESET
+hreset_n => Y7y2z4.PRESET
+hreset_n => M9y2z4.PRESET
+hreset_n => Bby2z4.PRESET
+hreset_n => Qcy2z4.PRESET
+hreset_n => Fey2z4.PRESET
+hreset_n => Ufy2z4.PRESET
+hreset_n => Jhy2z4.ACLR
+hreset_n => Viy2z4.PRESET
+hreset_n => Jky2z4.PRESET
+hreset_n => Xly2z4.PRESET
+hreset_n => Lny2z4.PRESET
+hreset_n => Zoy2z4.PRESET
+hreset_n => Nqy2z4.PRESET
+hreset_n => Bsy2z4.PRESET
+hreset_n => Pty2z4.PRESET
+hreset_n => Dvy2z4.PRESET
+hreset_n => Swy2z4.PRESET
+hreset_n => Hyy2z4.PRESET
+hreset_n => Wzy2z4.PRESET
+hreset_n => K1z2z4.PRESET
+hreset_n => C3z2z4.PRESET
+hreset_n => U4z2z4.PRESET
+hreset_n => I6z2z4.PRESET
+hreset_n => W7z2z4.PRESET
+hreset_n => K9z2z4.PRESET
+hreset_n => Yaz2z4.PRESET
+hreset_n => U593z4.PRESET
+hreset_n => I793z4.PRESET
+hreset_n => Ym93z4.PRESET
+hreset_n => Jw93z4.PRESET
+hreset_n => Xx93z4.PRESET
+hreset_n => Lz93z4.ACLR
+hreset_n => B1a3z4.ACLR
+hreset_n => P2a3z4.ACLR
+hreset_n => D4a3z4.PRESET
+hreset_n => U5a3z4.PRESET
+hreset_n => L7a3z4.PRESET
+hreset_n => C9a3z4.PRESET
+hreset_n => Taa3z4.PRESET
+hreset_n => Jca3z4.PRESET
+hreset_n => Aea3z4.PRESET
+hreset_n => Qfa3z4.PRESET
+hreset_n => Gha3z4.PRESET
+hreset_n => Wia3z4.PRESET
+hreset_n => Mka3z4.PRESET
+hreset_n => Cma3z4.PRESET
+hreset_n => Tna3z4.ACLR
+hreset_n => Jpa3z4.PRESET
+hreset_n => Ara3z4.PRESET
+hreset_n => Rsa3z4.PRESET
+hreset_n => Iua3z4.PRESET
+hreset_n => Zva3z4.PRESET
+hreset_n => Qxa3z4.PRESET
+hreset_n => Gza3z4.PRESET
+hreset_n => W0b3z4.PRESET
+hreset_n => M2b3z4.PRESET
+hreset_n => C4b3z4.PRESET
+hreset_n => S5b3z4.ACLR
+hreset_n => J7b3z4.PRESET
+hreset_n => Z8b3z4.PRESET
+hreset_n => Pab3z4.ACLR
+hreset_n => Gcb3z4.ACLR
+hreset_n => Xdb3z4.ACLR
+hreset_n => Nfb3z4.PRESET
+hreset_n => Dhb3z4.PRESET
+hreset_n => Tib3z4.ACLR
+hreset_n => Kkb3z4.ACLR
+hreset_n => Bmb3z4.ACLR
+hreset_n => Rnb3z4.ACLR
+hreset_n => Ipb3z4.ACLR
+hreset_n => Zqb3z4.ACLR
+hreset_n => Qsb3z4.ACLR
+hreset_n => Hub3z4.ACLR
+hreset_n => Yvb3z4.ACLR
+hreset_n => Pxb3z4.ACLR
+hreset_n => Gzb3z4.ACLR
+hreset_n => X0c3z4.ACLR
+hreset_n => O2c3z4.ACLR
+hreset_n => F4c3z4.ACLR
+hreset_n => W5c3z4.ACLR
+hreset_n => N7c3z4.ACLR
+hreset_n => E9c3z4.ACLR
+hreset_n => Vac3z4.ACLR
+hreset_n => Mcc3z4.ACLR
+hreset_n => Bec3z4.ACLR
+hreset_n => Qfc3z4.ACLR
+hreset_n => Fhc3z4.ACLR
+hreset_n => Uic3z4.ACLR
+hreset_n => Jkc3z4.ACLR
+hreset_n => Ylc3z4.ACLR
+hreset_n => Nnc3z4.ACLR
+hreset_n => Dpc3z4.ACLR
+hreset_n => Tqc3z4.ACLR
+hreset_n => Jsc3z4.ACLR
+hreset_n => Ztc3z4.ACLR
+hreset_n => Ovc3z4.PRESET
+hreset_n => T1d3z4.PRESET
+hreset_n => H3d3z4.PRESET
+hreset_n => G6d3z4.PRESET
+hreset_n => T7d3z4.ACLR
+hreset_n => J9d3z4.ACLR
+hreset_n => Zad3z4.ACLR
+hreset_n => Pcd3z4.ACLR
+hreset_n => Fed3z4.ACLR
+hreset_n => Vfd3z4.ACLR
+hreset_n => Lhd3z4.ACLR
+hreset_n => Bjd3z4.ACLR
+hreset_n => Rkd3z4.PRESET
+hreset_n => Wce3z4.PRESET
+hreset_n => Lee3z4.ACLR
+hreset_n => Bge3z4.PRESET
+hreset_n => She3z4.PRESET
+hreset_n => Jje3z4.ACLR
+hreset_n => Ble3z4.ACLR
+hreset_n => Vve3z4.ACLR
+hreset_n => Kxe3z4.PRESET
+hreset_n => Aze3z4.PRESET
+hreset_n => Q0f3z4.ACLR
+hreset_n => H2f3z4.ACLR
+hreset_n => W3f3z4.PRESET
+hreset_n => M5f3z4.PRESET
+hreset_n => C7f3z4.ACLR
+hreset_n => T8f3z4.ACLR
+hreset_n => D4g3z4.ACLR
+hreset_n => T5g3z4.PRESET
+hreset_n => K7g3z4.PRESET
+hreset_n => Tzg3z4.PRESET
+hreset_n => I1h3z4.PRESET
+hreset_n => Z2h3z4.PRESET
+hreset_n => Q4h3z4.ACLR
+hreset_n => I6h3z4.ACLR
+hreset_n => Ieh3z4.PRESET
+hreset_n => Zfh3z4.PRESET
+hreset_n => Ohh3z4.PRESET
+hreset_n => B2i3z4.PRESET
+hreset_n => S3i3z4.PRESET
+hreset_n => Rbi3z4.PRESET
+hreset_n => Ddi3z4.PRESET
+hreset_n => Uei3z4.PRESET
+hreset_n => Lgi3z4.PRESET
+hreset_n => Aii3z4.ACLR
+haddr_o[0] <= haddr_o.DB_MAX_OUTPUT_PORT_TYPE
+haddr_o[1] <= haddr_o.DB_MAX_OUTPUT_PORT_TYPE
+haddr_o[2] <= Fvovx4.DB_MAX_OUTPUT_PORT_TYPE
+haddr_o[3] <= Ekovx4.DB_MAX_OUTPUT_PORT_TYPE
+haddr_o[4] <= Yuovx4.DB_MAX_OUTPUT_PORT_TYPE
+haddr_o[5] <= Rxzvx4.DB_MAX_OUTPUT_PORT_TYPE
+haddr_o[6] <= Hszvx4.DB_MAX_OUTPUT_PORT_TYPE
+haddr_o[7] <= S4qvx4.DB_MAX_OUTPUT_PORT_TYPE
+haddr_o[8] <= Z6ovx4.DB_MAX_OUTPUT_PORT_TYPE
+haddr_o[9] <= Xxovx4.DB_MAX_OUTPUT_PORT_TYPE
+haddr_o[10] <= Jxovx4.DB_MAX_OUTPUT_PORT_TYPE
+haddr_o[11] <= Owovx4.DB_MAX_OUTPUT_PORT_TYPE
+haddr_o[12] <= Cqovx4.DB_MAX_OUTPUT_PORT_TYPE
+haddr_o[13] <= haddr_o.DB_MAX_OUTPUT_PORT_TYPE
+haddr_o[14] <= haddr_o.DB_MAX_OUTPUT_PORT_TYPE
+haddr_o[15] <= haddr_o.DB_MAX_OUTPUT_PORT_TYPE
+haddr_o[16] <= Vpovx4.DB_MAX_OUTPUT_PORT_TYPE
+haddr_o[17] <= Bv0wx4.DB_MAX_OUTPUT_PORT_TYPE
+haddr_o[18] <= Fq0wx4.DB_MAX_OUTPUT_PORT_TYPE
+haddr_o[19] <= Ql0wx4.DB_MAX_OUTPUT_PORT_TYPE
+haddr_o[20] <= Ug0wx4.DB_MAX_OUTPUT_PORT_TYPE
+haddr_o[21] <= Fc0wx4.DB_MAX_OUTPUT_PORT_TYPE
+haddr_o[22] <= C70wx4.DB_MAX_OUTPUT_PORT_TYPE
+haddr_o[23] <= Y92wx4.DB_MAX_OUTPUT_PORT_TYPE
+haddr_o[24] <= Y1pvx4.DB_MAX_OUTPUT_PORT_TYPE
+haddr_o[25] <= Rnovx4.DB_MAX_OUTPUT_PORT_TYPE
+haddr_o[26] <= Nhzvx4.DB_MAX_OUTPUT_PORT_TYPE
+haddr_o[27] <= Vezvx4.DB_MAX_OUTPUT_PORT_TYPE
+haddr_o[28] <= V2qvx4.DB_MAX_OUTPUT_PORT_TYPE
+haddr_o[29] <= haddr_o.DB_MAX_OUTPUT_PORT_TYPE
+haddr_o[30] <= haddr_o.DB_MAX_OUTPUT_PORT_TYPE
+haddr_o[31] <= haddr_o.DB_MAX_OUTPUT_PORT_TYPE
+hburst_o[0] <= <GND>
+hburst_o[1] <= <GND>
+hburst_o[2] <= <GND>
+hmastlock_o <= <GND>
+hprot_o[0] <= hprot_o.DB_MAX_OUTPUT_PORT_TYPE
+hprot_o[1] <= <VCC>
+hprot_o[2] <= hprot_o.DB_MAX_OUTPUT_PORT_TYPE
+hprot_o[3] <= hprot_o.DB_MAX_OUTPUT_PORT_TYPE
+hsize_o[0] <= hsize_o.DB_MAX_OUTPUT_PORT_TYPE
+hsize_o[1] <= hsize_o.DB_MAX_OUTPUT_PORT_TYPE
+hsize_o[2] <= <GND>
+htrans_o[0] <= <GND>
+htrans_o[1] <= htrans_o.DB_MAX_OUTPUT_PORT_TYPE
+hwdata_o[0] <= hwdata_o.DB_MAX_OUTPUT_PORT_TYPE
+hwdata_o[1] <= O15wx4.DB_MAX_OUTPUT_PORT_TYPE
+hwdata_o[2] <= L35wx4.DB_MAX_OUTPUT_PORT_TYPE
+hwdata_o[3] <= hwdata_o.DB_MAX_OUTPUT_PORT_TYPE
+hwdata_o[4] <= Jyuvx4.DB_MAX_OUTPUT_PORT_TYPE
+hwdata_o[5] <= Dvuvx4.DB_MAX_OUTPUT_PORT_TYPE
+hwdata_o[6] <= hwdata_o.DB_MAX_OUTPUT_PORT_TYPE
+hwdata_o[7] <= Youvx4.DB_MAX_OUTPUT_PORT_TYPE
+hwdata_o[8] <= hwdata_o.DB_MAX_OUTPUT_PORT_TYPE
+hwdata_o[9] <= hwdata_o.DB_MAX_OUTPUT_PORT_TYPE
+hwdata_o[10] <= hwdata_o.DB_MAX_OUTPUT_PORT_TYPE
+hwdata_o[11] <= hwdata_o.DB_MAX_OUTPUT_PORT_TYPE
+hwdata_o[12] <= hwdata_o.DB_MAX_OUTPUT_PORT_TYPE
+hwdata_o[13] <= hwdata_o.DB_MAX_OUTPUT_PORT_TYPE
+hwdata_o[14] <= Bq5wx4.DB_MAX_OUTPUT_PORT_TYPE
+hwdata_o[15] <= hwdata_o.DB_MAX_OUTPUT_PORT_TYPE
+hwdata_o[16] <= O24wx4.DB_MAX_OUTPUT_PORT_TYPE
+hwdata_o[17] <= hwdata_o.DB_MAX_OUTPUT_PORT_TYPE
+hwdata_o[18] <= hwdata_o.DB_MAX_OUTPUT_PORT_TYPE
+hwdata_o[19] <= hwdata_o.DB_MAX_OUTPUT_PORT_TYPE
+hwdata_o[20] <= hwdata_o.DB_MAX_OUTPUT_PORT_TYPE
+hwdata_o[21] <= hwdata_o.DB_MAX_OUTPUT_PORT_TYPE
+hwdata_o[22] <= hwdata_o.DB_MAX_OUTPUT_PORT_TYPE
+hwdata_o[23] <= hwdata_o.DB_MAX_OUTPUT_PORT_TYPE
+hwdata_o[24] <= hwdata_o.DB_MAX_OUTPUT_PORT_TYPE
+hwdata_o[25] <= hwdata_o.DB_MAX_OUTPUT_PORT_TYPE
+hwdata_o[26] <= hwdata_o.DB_MAX_OUTPUT_PORT_TYPE
+hwdata_o[27] <= hwdata_o.DB_MAX_OUTPUT_PORT_TYPE
+hwdata_o[28] <= Sx3wx4.DB_MAX_OUTPUT_PORT_TYPE
+hwdata_o[29] <= hwdata_o.DB_MAX_OUTPUT_PORT_TYPE
+hwdata_o[30] <= hwdata_o.DB_MAX_OUTPUT_PORT_TYPE
+hwdata_o[31] <= hwdata_o.DB_MAX_OUTPUT_PORT_TYPE
+hwrite_o <= hwrite_o.DB_MAX_OUTPUT_PORT_TYPE
+hrdata_i[0] => Wkqvx4.IN1
+hrdata_i[0] => Cvqvx4.IN1
+hrdata_i[0] => Fgowx4.IN1
+hrdata_i[1] => Rzqvx4.IN1
+hrdata_i[1] => Iqrvx4.IN1
+hrdata_i[1] => W9twx4.IN1
+hrdata_i[2] => L3rvx4.IN1
+hrdata_i[2] => Msrvx4.IN1
+hrdata_i[2] => Bxqwx4.IN1
+hrdata_i[3] => U4rvx4.IN1
+hrdata_i[3] => Xurvx4.IN1
+hrdata_i[3] => Mptwx4.IN1
+hrdata_i[4] => D6rvx4.IN1
+hrdata_i[4] => Ixrvx4.IN1
+hrdata_i[4] => Wdwwx4.IN1
+hrdata_i[5] => R6rvx4.IN1
+hrdata_i[5] => Tzrvx4.IN1
+hrdata_i[5] => K1vwx4.IN1
+hrdata_i[6] => O8rvx4.IN1
+hrdata_i[6] => E2svx4.IN1
+hrdata_i[6] => Lppwx4.IN1
+hrdata_i[7] => X9rvx4.IN1
+hrdata_i[7] => P4svx4.IN1
+hrdata_i[7] => Ouwwx4.IN1
+hrdata_i[8] => Zarvx4.IN1
+hrdata_i[8] => A7svx4.IN1
+hrdata_i[8] => Oaowx4.IN1
+hrdata_i[9] => Bcrvx4.IN1
+hrdata_i[9] => L9svx4.IN1
+hrdata_i[9] => R3twx4.IN1
+hrdata_i[10] => Ddrvx4.IN1
+hrdata_i[10] => Wbsvx4.IN1
+hrdata_i[10] => Qnqwx4.IN1
+hrdata_i[11] => Fervx4.IN1
+hrdata_i[11] => Hesvx4.IN1
+hrdata_i[11] => Lltwx4.IN1
+hrdata_i[12] => Hfrvx4.IN1
+hrdata_i[12] => Sgsvx4.IN1
+hrdata_i[12] => J3wwx4.IN1
+hrdata_i[13] => Udpvx4.IN1
+hrdata_i[13] => Jgrvx4.IN1
+hrdata_i[13] => Wmuwx4.IN1
+hrdata_i[14] => Hmrvx4.IN1
+hrdata_i[14] => Djsvx4.IN1
+hrdata_i[14] => Qapwx4.IN1
+hrdata_i[15] => Oapvx4.IN1
+hrdata_i[15] => Cnrvx4.IN1
+hrdata_i[15] => Ofxwx4.IN1
+hrdata_i[16] => Dlqvx4.IN1
+hrdata_i[16] => S7mwx4.IN1
+hrdata_i[16] => U6owx4.IN1
+hrdata_i[17] => Pqrvx4.IN1
+hrdata_i[17] => N8mwx4.IN1
+hrdata_i[17] => Mbtwx4.IN1
+hrdata_i[18] => Tsrvx4.IN1
+hrdata_i[18] => B9mwx4.IN1
+hrdata_i[18] => P5qwx4.IN1
+hrdata_i[19] => Evrvx4.IN1
+hrdata_i[19] => P9mwx4.IN1
+hrdata_i[19] => Nttwx4.IN1
+hrdata_i[20] => Pxrvx4.IN1
+hrdata_i[20] => Damwx4.IN1
+hrdata_i[20] => Sjvwx4.IN1
+hrdata_i[21] => A0svx4.IN1
+hrdata_i[21] => Ramwx4.IN1
+hrdata_i[21] => C5uwx4.IN1
+hrdata_i[22] => L2svx4.IN1
+hrdata_i[22] => Fbmwx4.IN1
+hrdata_i[22] => D0pwx4.IN1
+hrdata_i[23] => W4svx4.IN1
+hrdata_i[23] => Tbmwx4.IN1
+hrdata_i[23] => D6xwx4.IN1
+hrdata_i[24] => H7svx4.IN1
+hrdata_i[24] => Hcmwx4.IN1
+hrdata_i[24] => Qbowx4.IN1
+hrdata_i[25] => S9svx4.IN1
+hrdata_i[25] => Vcmwx4.IN1
+hrdata_i[25] => Xdtwx4.IN1
+hrdata_i[26] => Dcsvx4.IN1
+hrdata_i[26] => Jdmwx4.IN1
+hrdata_i[26] => T7qwx4.IN1
+hrdata_i[27] => Oesvx4.IN1
+hrdata_i[27] => Xdmwx4.IN1
+hrdata_i[27] => Mwtwx4.IN1
+hrdata_i[28] => Zgsvx4.IN1
+hrdata_i[28] => Lemwx4.IN1
+hrdata_i[28] => G5wwx4.IN1
+hrdata_i[29] => Bepvx4.IN1
+hrdata_i[29] => Zemwx4.IN1
+hrdata_i[29] => Touwx4.IN1
+hrdata_i[30] => Fksvx4.IN1
+hrdata_i[30] => Nfmwx4.IN1
+hrdata_i[30] => Gcpwx4.IN1
+hrdata_i[31] => Cbpvx4.IN1
+hrdata_i[31] => Bgmwx4.IN1
+hrdata_i[31] => Msxwx4.IN1
+hready_i => Q5ovx4.IN1
+hready_i => Kgovx4.IN1
+hready_i => Thovx4.IN1
+hready_i => Cjovx4.IN1
+hready_i => Skovx4.IN1
+hready_i => Lqpvx4.IN1
+hready_i => Ziqvx4.OUTPUTSELECT
+hready_i => Gosvx4.IN1
+hready_i => U6wvx4.IN1
+hready_i => Rfpvx4.IN1
+hready_i => Upyvx4.IN1
+hready_i => Vtyvx4.IN1
+hready_i => U5qvx4.IN1
+hready_i => Ro1wx4.IN1
+hready_i => Rg2wx4.IN1
+hready_i => Z9zvx4.IN1
+hready_i => Df3wx4.IN1
+hready_i => J86wx4.IN1
+hready_i => Poewx4.IN1
+hready_i => Ewiwx4.IN1
+hready_i => M6kwx4.IN1
+hready_i => Xslwx4.IN1
+hready_i => J5vvx4.IN1
+hready_i => Mdrwx4.IN1
+hready_i => Yafwx4.IN1
+hready_i => Qllwx4.IN1
+hready_i => K6yvx4.IN1
+hready_i => Qaiwx4.IN1
+hready_i => Obovx4.IN1
+hready_i => A3pvx4.IN1
+hready_i => Q4pvx4.IN1
+hready_i => Vvpvx4.OUTPUTSELECT
+hready_i => B6qvx4.IN1
+hready_i => Ysqvx4.IN1
+hready_i => Nxqvx4.IN1
+hready_i => Dn2wx4.IN1
+hready_i => Xaiwx4.OUTPUTSELECT
+hready_i => Kkjwx4.IN1
+hready_i => Trkwx4.IN1
+hready_i => Stlwx4.IN1
+hready_i => Bpsvx4.IN1
+hready_i => Qmywx4.IN1
+hready_i => Cmywx4.IN1
+hready_i => Wai2z4.ENA
+hready_i => Tki2z4.ENA
+hready_i => Ffj2z4.ENA
+hready_i => Sgj2z4.ENA
+hready_i => Fij2z4.ENA
+hready_i => Ark2z4.ENA
+hready_i => Y9t2z4.ENA
+hready_i => Pet2z4.ENA
+hready_i => G9w2z4.ENA
+hready_i => Vaw2z4.ENA
+hready_i => Hxx2z4.ENA
+hready_i => Aii3z4.ENA
+hresp_i => Y7qvx4.IN1
+hresp_i => Igmwx4.IN1
+hresp_i => Iiywx4.IN1
+nmi_i => I1vvx4.IN1
+nmi_i => Nx4wx4.IN1
+irq_i[0] => Gmnvx4.IN1
+irq_i[0] => Wy4wx4.IN1
+irq_i[1] => Y4mvx4.IN1
+irq_i[1] => T05wx4.IN1
+irq_i[2] => Bamvx4.IN1
+irq_i[2] => Q25wx4.IN1
+irq_i[3] => Iamvx4.IN1
+irq_i[3] => G45wx4.IN1
+irq_i[4] => S8mvx4.IN1
+irq_i[4] => W55wx4.IN1
+irq_i[5] => Z8mvx4.IN1
+irq_i[5] => M75wx4.IN1
+irq_i[6] => G9mvx4.IN1
+irq_i[6] => C95wx4.IN1
+irq_i[7] => N9mvx4.IN1
+irq_i[7] => Sa5wx4.IN1
+irq_i[8] => O6mvx4.IN1
+irq_i[8] => Ic5wx4.IN1
+irq_i[9] => V6mvx4.IN1
+irq_i[9] => Te5wx4.IN1
+irq_i[10] => C7mvx4.IN1
+irq_i[10] => Qg5wx4.IN1
+irq_i[11] => J7mvx4.IN1
+irq_i[11] => Ui5wx4.IN1
+irq_i[12] => A6mvx4.IN1
+irq_i[12] => Yk5wx4.IN1
+irq_i[13] => Dbmvx4.IN1
+irq_i[13] => Cn5wx4.IN1
+irq_i[14] => R4mvx4.IN1
+irq_i[14] => Gp5wx4.IN1
+irq_i[15] => Kbmvx4.IN1
+irq_i[15] => Rr5wx4.IN1
+txev_o <= txev_o.DB_MAX_OUTPUT_PORT_TYPE
+rxev_i => Rt3wx4.IN1
+lockup_o <= Z5pvx4.DB_MAX_OUTPUT_PORT_TYPE
+sys_reset_req_o <= Ypi3z4.DB_MAX_OUTPUT_PORT_TYPE
+sleeping_o <= sleeping_o.DB_MAX_OUTPUT_PORT_TYPE
+vis_r0_o[0] <= Unm2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r0_o[1] <= Txj2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r0_o[2] <= Vu93z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r0_o[3] <= Yb93z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r0_o[4] <= Ka93z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r0_o[5] <= W893z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r0_o[6] <= G493z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r0_o[7] <= Grl2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r0_o[8] <= Qyc3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r0_o[9] <= Cxc3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r0_o[10] <= Gt93z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r0_o[11] <= Snd3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r0_o[12] <= Rr93z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r0_o[13] <= Cq93z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r0_o[14] <= No93z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r0_o[15] <= E0d3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r0_o[16] <= Jl93z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r0_o[17] <= Uj93z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r0_o[18] <= Fi93z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r0_o[19] <= Qg93z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r0_o[20] <= Nag3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r0_o[21] <= Bf93z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r0_o[22] <= Md93z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r0_o[23] <= Wbf3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r0_o[24] <= R293z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r0_o[25] <= C193z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r0_o[26] <= Nz83z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r0_o[27] <= Yx83z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r0_o[28] <= Zkk2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r0_o[29] <= Jw83z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r0_o[30] <= Uu83z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r0_o[31] <= Xti2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r1_o[0] <= Gmm2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r1_o[1] <= Fwj2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r1_o[2] <= Yfn2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r1_o[3] <= T0m2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r1_o[4] <= E1r2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r1_o[5] <= Sgp2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r1_o[6] <= Ipm2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r1_o[7] <= Spl2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r1_o[8] <= Asr2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r1_o[9] <= U2s2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r1_o[10] <= K7s2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r1_o[11] <= Hpd3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r1_o[12] <= Gcr2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r1_o[13] <= Hnr2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r1_o[14] <= Mzp2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r1_o[15] <= Naq2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r1_o[16] <= J5o2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r1_o[17] <= Kwo2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r1_o[18] <= Arn2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r1_o[19] <= A9p2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r1_o[20] <= Ccg3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r1_o[21] <= Anq2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r1_o[22] <= J0n2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r1_o[23] <= Orj2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r1_o[24] <= Zpj2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r1_o[25] <= Pbl2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r1_o[26] <= V0k2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r1_o[27] <= Gfq2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r1_o[28] <= Kjk2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r1_o[29] <= Fio2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r1_o[30] <= Rro2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r1_o[31] <= Koj2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r2_o[0] <= Rr73z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r2_o[1] <= Dq73z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r2_o[2] <= Po83z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r2_o[3] <= H783z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r2_o[4] <= T583z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r2_o[5] <= F483z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r2_o[6] <= R283z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r2_o[7] <= Po73z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r2_o[8] <= Rr83z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r2_o[9] <= Dq83z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r2_o[10] <= An83z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r2_o[11] <= Wqd3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r2_o[12] <= Ll83z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r2_o[13] <= Wj83z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r2_o[14] <= Hi83z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r2_o[15] <= Ft83z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r2_o[16] <= Sg83z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r2_o[17] <= Df83z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r2_o[18] <= Od83z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r2_o[19] <= Zb83z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r2_o[20] <= Rdg3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r2_o[21] <= Ka83z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r2_o[22] <= V883z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r2_o[23] <= Ldf3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r2_o[24] <= C183z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r2_o[25] <= Nz73z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r2_o[26] <= Yx73z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r2_o[27] <= Jw73z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r2_o[28] <= An73z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r2_o[29] <= Uu73z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r2_o[30] <= Ft73z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r2_o[31] <= Ll73z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r3_o[0] <= Ii63z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r3_o[1] <= Ug63z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r3_o[2] <= Gf73z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r3_o[3] <= Yx63z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r3_o[4] <= Kw63z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r3_o[5] <= Wu63z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r3_o[6] <= It63z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r3_o[7] <= Gf63z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r3_o[8] <= Ii73z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r3_o[9] <= Ug73z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r3_o[10] <= Rd73z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r3_o[11] <= Lsd3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r3_o[12] <= Cc73z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r3_o[13] <= Na73z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r3_o[14] <= Y873z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r3_o[15] <= Wj73z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r3_o[16] <= J773z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r3_o[17] <= U573z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r3_o[18] <= F473z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r3_o[19] <= Q273z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r3_o[20] <= Gfg3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r3_o[21] <= B173z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r3_o[22] <= Mz63z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r3_o[23] <= Aff3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r3_o[24] <= Tr63z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r3_o[25] <= Eq63z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r3_o[26] <= Po63z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r3_o[27] <= An63z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r3_o[28] <= Rd63z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r3_o[29] <= Ll63z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r3_o[30] <= Wj63z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r3_o[31] <= Cc63z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r4_o[0] <= Rvu2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r4_o[1] <= Duu2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r4_o[2] <= Psv2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r4_o[3] <= Hbv2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r4_o[4] <= T9v2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r4_o[5] <= F8v2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r4_o[6] <= R6v2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r4_o[7] <= Psu2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r4_o[8] <= Rvv2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r4_o[9] <= Duv2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r4_o[10] <= Arv2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r4_o[11] <= I0e3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r4_o[12] <= Lpv2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r4_o[13] <= Wnv2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r4_o[14] <= Hmv2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r4_o[15] <= Fxv2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r4_o[16] <= Skv2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r4_o[17] <= Djv2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r4_o[18] <= Ohv2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r4_o[19] <= Zfv2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r4_o[20] <= Dng3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r4_o[21] <= Kev2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r4_o[22] <= Vcv2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r4_o[23] <= Xmf3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r4_o[24] <= C5v2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r4_o[25] <= N3v2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r4_o[26] <= Y1v2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r4_o[27] <= J0v2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r4_o[28] <= Aru2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r4_o[29] <= Uyu2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r4_o[30] <= Fxu2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r4_o[31] <= Lpu2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r5_o[0] <= Ejm2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r5_o[1] <= Dtj2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r5_o[2] <= Mhn2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r5_o[3] <= H2m2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r5_o[4] <= S2r2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r5_o[5] <= Gip2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r5_o[6] <= Wqm2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r5_o[7] <= Qml2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r5_o[8] <= Otr2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r5_o[9] <= I4s2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r5_o[10] <= Z8s2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r5_o[11] <= X1e3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r5_o[12] <= Vdr2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r5_o[13] <= Wor2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r5_o[14] <= B1q2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r5_o[15] <= Ccq2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r5_o[16] <= Y6o2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r5_o[17] <= Zxo2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r5_o[18] <= Psn2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r5_o[19] <= Pap2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r5_o[20] <= Sog3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r5_o[21] <= Poq2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r5_o[22] <= Y1n2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r5_o[23] <= Mof3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r5_o[24] <= Vmj2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r5_o[25] <= Edl2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r5_o[26] <= K2k2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r5_o[27] <= Vgq2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r5_o[28] <= Ggk2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r5_o[29] <= Ujo2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r5_o[30] <= Gto2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r5_o[31] <= Glj2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r6_o[0] <= Imt2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r6_o[1] <= Ukt2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r6_o[2] <= Gju2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r6_o[3] <= Y1u2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r6_o[4] <= K0u2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r6_o[5] <= Wyt2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r6_o[6] <= Ixt2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r6_o[7] <= Gjt2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r6_o[8] <= Imu2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r6_o[9] <= Uku2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r6_o[10] <= Rhu2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r6_o[11] <= M3e3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r6_o[12] <= Cgu2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r6_o[13] <= Neu2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r6_o[14] <= Ycu2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r6_o[15] <= Wnu2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r6_o[16] <= Jbu2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r6_o[17] <= U9u2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r6_o[18] <= F8u2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r6_o[19] <= Q6u2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r6_o[20] <= Hqg3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r6_o[21] <= B5u2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r6_o[22] <= M3u2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r6_o[23] <= Bqf3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r6_o[24] <= Tvt2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r6_o[25] <= Eut2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r6_o[26] <= Pst2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r6_o[27] <= Art2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r6_o[28] <= Rht2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r6_o[29] <= Lpt2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r6_o[30] <= Wnt2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r6_o[31] <= Cgt2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r7_o[0] <= Skm2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r7_o[1] <= Ruj2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r7_o[2] <= Ajn2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r7_o[3] <= V3m2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r7_o[4] <= G4r2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r7_o[5] <= Ujp2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r7_o[6] <= Ksm2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r7_o[7] <= Eol2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r7_o[8] <= Cvr2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r7_o[9] <= W5s2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r7_o[10] <= Oas2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r7_o[11] <= B5e3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r7_o[12] <= Kfr2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r7_o[13] <= Lqr2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r7_o[14] <= Q2q2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r7_o[15] <= Rdq2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r7_o[16] <= N8o2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r7_o[17] <= Ozo2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r7_o[18] <= Eun2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r7_o[19] <= Ecp2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r7_o[20] <= Wrg3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r7_o[21] <= Eqq2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r7_o[22] <= N3n2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r7_o[23] <= Fpi2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r7_o[24] <= F9j2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r7_o[25] <= Tel2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r7_o[26] <= Z3k2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r7_o[27] <= Kiq2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r7_o[28] <= Vhk2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r7_o[29] <= Jlo2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r7_o[30] <= Vuo2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r7_o[31] <= Isi2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r8_o[0] <= Z853z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r8_o[1] <= L753z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r8_o[2] <= X563z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r8_o[3] <= Po53z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r8_o[4] <= Bn53z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r8_o[5] <= Nl53z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r8_o[6] <= Zj53z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r8_o[7] <= X553z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r8_o[8] <= Z863z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r8_o[9] <= L763z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r8_o[10] <= I463z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r8_o[11] <= Aud3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r8_o[12] <= T263z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r8_o[13] <= E163z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r8_o[14] <= Pz53z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r8_o[15] <= Na63z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r8_o[16] <= Ay53z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r8_o[17] <= Lw53z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r8_o[18] <= Wu53z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r8_o[19] <= Ht53z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r8_o[20] <= Vgg3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r8_o[21] <= Sr53z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r8_o[22] <= Dq53z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r8_o[23] <= Pgf3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r8_o[24] <= Ki53z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r8_o[25] <= Vg53z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r8_o[26] <= Gf53z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r8_o[27] <= Rd53z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r8_o[28] <= I453z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r8_o[29] <= Cc53z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r8_o[30] <= Na53z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r8_o[31] <= T253z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r9_o[0] <= Qz33z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r9_o[1] <= Cy33z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r9_o[2] <= Ow43z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r9_o[3] <= Gf43z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r9_o[4] <= Sd43z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r9_o[5] <= Ec43z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r9_o[6] <= Qa43z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r9_o[7] <= Ow33z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r9_o[8] <= Qz43z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r9_o[9] <= Cy43z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r9_o[10] <= Zu43z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r9_o[11] <= Pvd3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r9_o[12] <= Kt43z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r9_o[13] <= Vr43z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r9_o[14] <= Gq43z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r9_o[15] <= E153z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r9_o[16] <= Ro43z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r9_o[17] <= Cn43z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r9_o[18] <= Nl43z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r9_o[19] <= Yj43z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r9_o[20] <= Kig3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r9_o[21] <= Ji43z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r9_o[22] <= Ug43z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r9_o[23] <= Eif3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r9_o[24] <= B943z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r9_o[25] <= M743z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r9_o[26] <= X543z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r9_o[27] <= I443z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r9_o[28] <= Zu33z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r9_o[29] <= T243z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r9_o[30] <= E143z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r9_o[31] <= Kt33z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r10_o[0] <= Hq23z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r10_o[1] <= To23z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r10_o[2] <= Fn33z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r10_o[3] <= X533z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r10_o[4] <= J433z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r10_o[5] <= V233z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r10_o[6] <= H133z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r10_o[7] <= Fn23z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r10_o[8] <= Hq33z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r10_o[9] <= To33z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r10_o[10] <= Ql33z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r10_o[11] <= Exd3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r10_o[12] <= Bk33z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r10_o[13] <= Mi33z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r10_o[14] <= Xg33z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r10_o[15] <= Vr33z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r10_o[16] <= If33z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r10_o[17] <= Td33z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r10_o[18] <= Ec33z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r10_o[19] <= Pa33z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r10_o[20] <= Zjg3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r10_o[21] <= A933z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r10_o[22] <= L733z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r10_o[23] <= Tjf3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r10_o[24] <= Sz23z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r10_o[25] <= Dy23z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r10_o[26] <= Ow23z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r10_o[27] <= Zu23z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r10_o[28] <= Ql23z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r10_o[29] <= Kt23z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r10_o[30] <= Vr23z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r10_o[31] <= Bk23z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r11_o[0] <= Yg13z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r11_o[1] <= Kf13z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r11_o[2] <= Wd23z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r11_o[3] <= Ow13z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r11_o[4] <= Av13z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r11_o[5] <= Mt13z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r11_o[6] <= Yr13z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r11_o[7] <= Wd13z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r11_o[8] <= Yg23z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r11_o[9] <= Kf23z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r11_o[10] <= Hc23z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r11_o[11] <= Tyd3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r11_o[12] <= Sa23z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r11_o[13] <= D923z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r11_o[14] <= O723z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r11_o[15] <= Mi23z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r11_o[16] <= Z523z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r11_o[17] <= K423z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r11_o[18] <= V223z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r11_o[19] <= G123z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r11_o[20] <= Olg3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r11_o[21] <= Rz13z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r11_o[22] <= Cy13z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r11_o[23] <= Ilf3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r11_o[24] <= Jq13z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r11_o[25] <= Uo13z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r11_o[26] <= Fn13z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r11_o[27] <= Ql13z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r11_o[28] <= Hc13z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r11_o[29] <= Bk13z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r11_o[30] <= Mi13z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r11_o[31] <= Sa13z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r12_o[0] <= Knz2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r12_o[1] <= Wlz2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r12_o[2] <= Wa03z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r12_o[3] <= Hyz2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r12_o[4] <= Twz2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r12_o[5] <= Fvz2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r12_o[6] <= Rtz2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r12_o[7] <= Ikz2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r12_o[8] <= Kc03z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r12_o[9] <= Rpe3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r12_o[10] <= H903z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r12_o[11] <= Q6e3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r12_o[12] <= S703z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r12_o[13] <= Vxf3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r12_o[14] <= D603z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r12_o[15] <= Lph3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r12_o[16] <= O403z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r12_o[17] <= Z203z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r12_o[18] <= K103z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r12_o[19] <= Tvh3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r12_o[20] <= Ltg3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r12_o[21] <= A8h3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r12_o[22] <= Vzz2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r12_o[23] <= Qrf3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r12_o[24] <= Qji3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r12_o[25] <= Csz2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r12_o[26] <= Nqz2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r12_o[27] <= Djh3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r12_o[28] <= Tiz2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r12_o[29] <= Yoz2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r12_o[30] <= J5i3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r12_o[31] <= Ehz2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r14_o[0] <= Ek03z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r14_o[1] <= Qi03z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r14_o[2] <= Q713z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r14_o[3] <= Bv03z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r14_o[4] <= Nt03z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r14_o[5] <= Zr03z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r14_o[6] <= Lq03z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r14_o[7] <= Ch03z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r14_o[8] <= E913z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r14_o[9] <= Fre3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r14_o[10] <= B613z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r14_o[11] <= F8e3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r14_o[12] <= M413z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r14_o[13] <= Kzf3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r14_o[14] <= X213z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r14_o[15] <= Arh3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r14_o[16] <= I113z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r14_o[17] <= Tz03z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r14_o[18] <= Ey03z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r14_o[19] <= Ixh3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r14_o[20] <= Avg3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r14_o[21] <= P9h3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r14_o[22] <= Pw03z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r14_o[23] <= Ftf3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r14_o[24] <= Fli3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r14_o[25] <= Wo03z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r14_o[26] <= Hn03z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r14_o[27] <= Skh3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r14_o[28] <= Nf03z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r14_o[29] <= Sl03z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r14_o[30] <= Y6i3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_r14_o[31] <= Yd03z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_msp_o[0] <= Okn2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_msp_o[1] <= J5m2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_msp_o[2] <= U5r2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_msp_o[3] <= Ilp2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_msp_o[4] <= Ytm2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_msp_o[5] <= Cll2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_msp_o[6] <= Qwr2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_msp_o[7] <= Tse3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_msp_o[8] <= Dcs2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_msp_o[9] <= U9e3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_msp_o[10] <= Zgr2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_msp_o[11] <= Z0g3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_msp_o[12] <= F4q2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_msp_o[13] <= Psh3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_msp_o[14] <= Cao2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_msp_o[15] <= D1p2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_msp_o[16] <= Tvn2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_msp_o[17] <= Xyh3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_msp_o[18] <= Pwg3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_msp_o[19] <= Ebh3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_msp_o[20] <= C5n2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_msp_o[21] <= M4j2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_msp_o[22] <= Umi3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_msp_o[23] <= Igl2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_msp_o[24] <= O5k2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_msp_o[25] <= Hmh3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_msp_o[26] <= Rek2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_msp_o[27] <= Ymo2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_msp_o[28] <= N8i3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_msp_o[29] <= X2j2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_psp_o[0] <= Cmn2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_psp_o[1] <= X6m2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_psp_o[2] <= I7r2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_psp_o[3] <= Wmp2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_psp_o[4] <= Mvm2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_psp_o[5] <= Mcz2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_psp_o[6] <= Eyr2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_psp_o[7] <= Hue3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_psp_o[8] <= Rds2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_psp_o[9] <= Ibe3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_psp_o[10] <= Oir2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_psp_o[11] <= O2g3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_psp_o[12] <= U5q2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_psp_o[13] <= Euh3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_psp_o[14] <= Rbo2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_psp_o[15] <= S2p2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_psp_o[16] <= Ixn2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_psp_o[17] <= M0i3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_psp_o[18] <= Eyg3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_psp_o[19] <= Tch3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_psp_o[20] <= R6n2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_psp_o[21] <= Uuf3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_psp_o[22] <= Joi3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_psp_o[23] <= Xhl2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_psp_o[24] <= D7k2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_psp_o[25] <= Wnh3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_psp_o[26] <= Aez2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_psp_o[27] <= Noo2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_psp_o[28] <= Cai3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_psp_o[29] <= Pfz2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_pc_o[0] <= Fcj2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_pc_o[1] <= J4x2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_pc_o[2] <= G7x2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_pc_o[3] <= R8x2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_pc_o[4] <= Cax2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_pc_o[5] <= Nbx2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_pc_o[6] <= Ycx2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_pc_o[7] <= Jex2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_pc_o[8] <= V4d3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_pc_o[9] <= Ufx2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_pc_o[10] <= Gmd3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_pc_o[11] <= Fhx2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_pc_o[12] <= Tme3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_pc_o[13] <= Rix2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_pc_o[14] <= Jwf3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_pc_o[15] <= Dkx2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_pc_o[16] <= Plx2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_pc_o[17] <= Bnx2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_pc_o[18] <= Zjq2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_pc_o[19] <= B9g3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_pc_o[20] <= Foe3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_pc_o[21] <= Nox2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_pc_o[22] <= Kaf3z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_pc_o[23] <= Xyk2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_pc_o[24] <= Zpx2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_pc_o[25] <= Lrx2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_pc_o[26] <= Xsx2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_pc_o[27] <= Jux2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_pc_o[28] <= Vvx2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_pc_o[29] <= Omk2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_pc_o[30] <= J0l2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_apsr_o[0] <= Idk2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_apsr_o[1] <= Zei2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_apsr_o[2] <= Igi2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_apsr_o[3] <= Gci2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_tbit_o <= Z7i2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_ipsr_o[0] <= R1w2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_ipsr_o[1] <= G0w2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_ipsr_o[2] <= Uaj2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_ipsr_o[3] <= Cam2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_ipsr_o[4] <= Trq2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_ipsr_o[5] <= Tdp2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_control_o <= Nen2z4.DB_MAX_OUTPUT_PORT_TYPE
+vis_primask_o <= Thm2z4.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1
+HCLK => mux_sel[0].CLK
+HCLK => mux_sel[1].CLK
+HCLK => mux_sel[2].CLK
+HRESETn => mux_sel[0].ACLR
+HRESETn => mux_sel[1].ACLR
+HRESETn => mux_sel[2].ACLR
+HADDR[0] => LessThan0.IN64
+HADDR[0] => LessThan1.IN64
+HADDR[1] => LessThan0.IN63
+HADDR[1] => LessThan1.IN63
+HADDR[2] => LessThan0.IN62
+HADDR[2] => LessThan1.IN62
+HADDR[3] => LessThan0.IN61
+HADDR[3] => LessThan1.IN61
+HADDR[4] => LessThan0.IN60
+HADDR[4] => LessThan1.IN60
+HADDR[5] => LessThan0.IN59
+HADDR[5] => LessThan1.IN59
+HADDR[6] => LessThan0.IN58
+HADDR[6] => LessThan1.IN58
+HADDR[7] => LessThan0.IN57
+HADDR[7] => LessThan1.IN57
+HADDR[8] => LessThan0.IN56
+HADDR[8] => LessThan1.IN56
+HADDR[9] => LessThan0.IN55
+HADDR[9] => LessThan1.IN55
+HADDR[10] => LessThan0.IN54
+HADDR[10] => LessThan1.IN54
+HADDR[11] => LessThan0.IN53
+HADDR[11] => LessThan1.IN53
+HADDR[12] => LessThan0.IN52
+HADDR[12] => LessThan1.IN52
+HADDR[13] => LessThan0.IN51
+HADDR[13] => LessThan1.IN51
+HADDR[14] => LessThan0.IN50
+HADDR[14] => LessThan1.IN50
+HADDR[15] => LessThan0.IN49
+HADDR[15] => LessThan1.IN49
+HADDR[16] => LessThan0.IN48
+HADDR[16] => LessThan1.IN48
+HADDR[17] => LessThan0.IN47
+HADDR[17] => LessThan1.IN47
+HADDR[18] => LessThan0.IN46
+HADDR[18] => LessThan1.IN46
+HADDR[19] => LessThan0.IN45
+HADDR[19] => LessThan1.IN45
+HADDR[20] => LessThan0.IN44
+HADDR[20] => LessThan1.IN44
+HADDR[21] => LessThan0.IN43
+HADDR[21] => LessThan1.IN43
+HADDR[22] => LessThan0.IN42
+HADDR[22] => LessThan1.IN42
+HADDR[23] => LessThan0.IN41
+HADDR[23] => LessThan1.IN41
+HADDR[24] => LessThan0.IN40
+HADDR[24] => LessThan1.IN40
+HADDR[25] => LessThan0.IN39
+HADDR[25] => LessThan1.IN39
+HADDR[26] => LessThan0.IN38
+HADDR[26] => LessThan1.IN38
+HADDR[27] => LessThan0.IN37
+HADDR[27] => LessThan1.IN37
+HADDR[28] => LessThan0.IN36
+HADDR[28] => LessThan1.IN36
+HADDR[29] => LessThan0.IN35
+HADDR[29] => LessThan1.IN35
+HADDR[30] => LessThan0.IN34
+HADDR[30] => LessThan1.IN34
+HADDR[31] => LessThan0.IN33
+HADDR[31] => LessThan1.IN33
+HSEL_SIGNALS[0] <= LessThan0.DB_MAX_OUTPUT_PORT_TYPE
+HSEL_SIGNALS[1] <= HSEL_SIGNALS.DB_MAX_OUTPUT_PORT_TYPE
+HSEL_SIGNALS[2] <= HSEL_SIGNALS.DB_MAX_OUTPUT_PORT_TYPE
+HREADYOUT_SIGNALS[0] => HREADY.DATAB
+HREADYOUT_SIGNALS[1] => HREADY.DATAB
+HREADYOUT_SIGNALS[2] => HREADY.DATAB
+HRDATA_SIGNALS[0][0] => HRDATA.DATAB
+HRDATA_SIGNALS[0][1] => HRDATA.DATAB
+HRDATA_SIGNALS[0][2] => HRDATA.DATAB
+HRDATA_SIGNALS[0][3] => HRDATA.DATAB
+HRDATA_SIGNALS[0][4] => HRDATA.DATAB
+HRDATA_SIGNALS[0][5] => HRDATA.DATAB
+HRDATA_SIGNALS[0][6] => HRDATA.DATAB
+HRDATA_SIGNALS[0][7] => HRDATA.DATAB
+HRDATA_SIGNALS[0][8] => HRDATA.DATAB
+HRDATA_SIGNALS[0][9] => HRDATA.DATAB
+HRDATA_SIGNALS[0][10] => HRDATA.DATAB
+HRDATA_SIGNALS[0][11] => HRDATA.DATAB
+HRDATA_SIGNALS[0][12] => HRDATA.DATAB
+HRDATA_SIGNALS[0][13] => HRDATA.DATAB
+HRDATA_SIGNALS[0][14] => HRDATA.DATAB
+HRDATA_SIGNALS[0][15] => HRDATA.DATAB
+HRDATA_SIGNALS[0][16] => HRDATA.DATAB
+HRDATA_SIGNALS[0][17] => HRDATA.DATAB
+HRDATA_SIGNALS[0][18] => HRDATA.DATAB
+HRDATA_SIGNALS[0][19] => HRDATA.DATAB
+HRDATA_SIGNALS[0][20] => HRDATA.DATAB
+HRDATA_SIGNALS[0][21] => HRDATA.DATAB
+HRDATA_SIGNALS[0][22] => HRDATA.DATAB
+HRDATA_SIGNALS[0][23] => HRDATA.DATAB
+HRDATA_SIGNALS[0][24] => HRDATA.DATAB
+HRDATA_SIGNALS[0][25] => HRDATA.DATAB
+HRDATA_SIGNALS[0][26] => HRDATA.DATAB
+HRDATA_SIGNALS[0][27] => HRDATA.DATAB
+HRDATA_SIGNALS[0][28] => HRDATA.DATAB
+HRDATA_SIGNALS[0][29] => HRDATA.DATAB
+HRDATA_SIGNALS[0][30] => HRDATA.DATAB
+HRDATA_SIGNALS[0][31] => HRDATA.DATAB
+HRDATA_SIGNALS[1][0] => HRDATA.DATAB
+HRDATA_SIGNALS[1][1] => HRDATA.DATAB
+HRDATA_SIGNALS[1][2] => HRDATA.DATAB
+HRDATA_SIGNALS[1][3] => HRDATA.DATAB
+HRDATA_SIGNALS[1][4] => HRDATA.DATAB
+HRDATA_SIGNALS[1][5] => HRDATA.DATAB
+HRDATA_SIGNALS[1][6] => HRDATA.DATAB
+HRDATA_SIGNALS[1][7] => HRDATA.DATAB
+HRDATA_SIGNALS[1][8] => HRDATA.DATAB
+HRDATA_SIGNALS[1][9] => HRDATA.DATAB
+HRDATA_SIGNALS[1][10] => HRDATA.DATAB
+HRDATA_SIGNALS[1][11] => HRDATA.DATAB
+HRDATA_SIGNALS[1][12] => HRDATA.DATAB
+HRDATA_SIGNALS[1][13] => HRDATA.DATAB
+HRDATA_SIGNALS[1][14] => HRDATA.DATAB
+HRDATA_SIGNALS[1][15] => HRDATA.DATAB
+HRDATA_SIGNALS[1][16] => HRDATA.DATAB
+HRDATA_SIGNALS[1][17] => HRDATA.DATAB
+HRDATA_SIGNALS[1][18] => HRDATA.DATAB
+HRDATA_SIGNALS[1][19] => HRDATA.DATAB
+HRDATA_SIGNALS[1][20] => HRDATA.DATAB
+HRDATA_SIGNALS[1][21] => HRDATA.DATAB
+HRDATA_SIGNALS[1][22] => HRDATA.DATAB
+HRDATA_SIGNALS[1][23] => HRDATA.DATAB
+HRDATA_SIGNALS[1][24] => HRDATA.DATAB
+HRDATA_SIGNALS[1][25] => HRDATA.DATAB
+HRDATA_SIGNALS[1][26] => HRDATA.DATAB
+HRDATA_SIGNALS[1][27] => HRDATA.DATAB
+HRDATA_SIGNALS[1][28] => HRDATA.DATAB
+HRDATA_SIGNALS[1][29] => HRDATA.DATAB
+HRDATA_SIGNALS[1][30] => HRDATA.DATAB
+HRDATA_SIGNALS[1][31] => HRDATA.DATAB
+HRDATA_SIGNALS[2][0] => HRDATA.DATAB
+HRDATA_SIGNALS[2][1] => HRDATA.DATAB
+HRDATA_SIGNALS[2][2] => HRDATA.DATAB
+HRDATA_SIGNALS[2][3] => HRDATA.DATAB
+HRDATA_SIGNALS[2][4] => HRDATA.DATAB
+HRDATA_SIGNALS[2][5] => HRDATA.DATAB
+HRDATA_SIGNALS[2][6] => HRDATA.DATAB
+HRDATA_SIGNALS[2][7] => HRDATA.DATAB
+HRDATA_SIGNALS[2][8] => HRDATA.DATAB
+HRDATA_SIGNALS[2][9] => HRDATA.DATAB
+HRDATA_SIGNALS[2][10] => HRDATA.DATAB
+HRDATA_SIGNALS[2][11] => HRDATA.DATAB
+HRDATA_SIGNALS[2][12] => HRDATA.DATAB
+HRDATA_SIGNALS[2][13] => HRDATA.DATAB
+HRDATA_SIGNALS[2][14] => HRDATA.DATAB
+HRDATA_SIGNALS[2][15] => HRDATA.DATAB
+HRDATA_SIGNALS[2][16] => HRDATA.DATAB
+HRDATA_SIGNALS[2][17] => HRDATA.DATAB
+HRDATA_SIGNALS[2][18] => HRDATA.DATAB
+HRDATA_SIGNALS[2][19] => HRDATA.DATAB
+HRDATA_SIGNALS[2][20] => HRDATA.DATAB
+HRDATA_SIGNALS[2][21] => HRDATA.DATAB
+HRDATA_SIGNALS[2][22] => HRDATA.DATAB
+HRDATA_SIGNALS[2][23] => HRDATA.DATAB
+HRDATA_SIGNALS[2][24] => HRDATA.DATAB
+HRDATA_SIGNALS[2][25] => HRDATA.DATAB
+HRDATA_SIGNALS[2][26] => HRDATA.DATAB
+HRDATA_SIGNALS[2][27] => HRDATA.DATAB
+HRDATA_SIGNALS[2][28] => HRDATA.DATAB
+HRDATA_SIGNALS[2][29] => HRDATA.DATAB
+HRDATA_SIGNALS[2][30] => HRDATA.DATAB
+HRDATA_SIGNALS[2][31] => HRDATA.DATAB
+HREADY <= HREADY.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[0] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[1] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[2] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[3] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[4] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[5] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[6] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[7] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[8] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[9] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[10] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[11] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[12] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[13] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[14] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[15] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[16] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[17] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[18] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[19] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[20] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[21] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[22] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[23] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[24] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[25] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[26] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[27] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[28] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[29] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[30] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[31] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|de1_soc_wrapper|arm_soc:soc_inst|ahb_ram:ram_1
+HSEL => always1.IN0
+HCLK => memory.we_a.CLK
+HCLK => memory.waddr_a[11].CLK
+HCLK => memory.waddr_a[10].CLK
+HCLK => memory.waddr_a[9].CLK
+HCLK => memory.waddr_a[8].CLK
+HCLK => memory.waddr_a[7].CLK
+HCLK => memory.waddr_a[6].CLK
+HCLK => memory.waddr_a[5].CLK
+HCLK => memory.waddr_a[4].CLK
+HCLK => memory.waddr_a[3].CLK
+HCLK => memory.waddr_a[2].CLK
+HCLK => memory.waddr_a[1].CLK
+HCLK => memory.waddr_a[0].CLK
+HCLK => memory.data_a[31].CLK
+HCLK => memory.data_a[30].CLK
+HCLK => memory.data_a[29].CLK
+HCLK => memory.data_a[28].CLK
+HCLK => memory.data_a[27].CLK
+HCLK => memory.data_a[26].CLK
+HCLK => memory.data_a[25].CLK
+HCLK => memory.data_a[24].CLK
+HCLK => memory.data_a[23].CLK
+HCLK => memory.data_a[22].CLK
+HCLK => memory.data_a[21].CLK
+HCLK => memory.data_a[20].CLK
+HCLK => memory.data_a[19].CLK
+HCLK => memory.data_a[18].CLK
+HCLK => memory.data_a[17].CLK
+HCLK => memory.data_a[16].CLK
+HCLK => memory.data_a[15].CLK
+HCLK => memory.data_a[14].CLK
+HCLK => memory.data_a[13].CLK
+HCLK => memory.data_a[12].CLK
+HCLK => memory.data_a[11].CLK
+HCLK => memory.data_a[10].CLK
+HCLK => memory.data_a[9].CLK
+HCLK => memory.data_a[8].CLK
+HCLK => memory.data_a[7].CLK
+HCLK => memory.data_a[6].CLK
+HCLK => memory.data_a[5].CLK
+HCLK => memory.data_a[4].CLK
+HCLK => memory.data_a[3].CLK
+HCLK => memory.data_a[2].CLK
+HCLK => memory.data_a[1].CLK
+HCLK => memory.data_a[0].CLK
+HCLK => data_from_memory[0].CLK
+HCLK => data_from_memory[1].CLK
+HCLK => data_from_memory[2].CLK
+HCLK => data_from_memory[3].CLK
+HCLK => data_from_memory[4].CLK
+HCLK => data_from_memory[5].CLK
+HCLK => data_from_memory[6].CLK
+HCLK => data_from_memory[7].CLK
+HCLK => data_from_memory[8].CLK
+HCLK => data_from_memory[9].CLK
+HCLK => data_from_memory[10].CLK
+HCLK => data_from_memory[11].CLK
+HCLK => data_from_memory[12].CLK
+HCLK => data_from_memory[13].CLK
+HCLK => data_from_memory[14].CLK
+HCLK => data_from_memory[15].CLK
+HCLK => data_from_memory[16].CLK
+HCLK => data_from_memory[17].CLK
+HCLK => data_from_memory[18].CLK
+HCLK => data_from_memory[19].CLK
+HCLK => data_from_memory[20].CLK
+HCLK => data_from_memory[21].CLK
+HCLK => data_from_memory[22].CLK
+HCLK => data_from_memory[23].CLK
+HCLK => data_from_memory[24].CLK
+HCLK => data_from_memory[25].CLK
+HCLK => data_from_memory[26].CLK
+HCLK => data_from_memory[27].CLK
+HCLK => data_from_memory[28].CLK
+HCLK => data_from_memory[29].CLK
+HCLK => data_from_memory[30].CLK
+HCLK => data_from_memory[31].CLK
+HCLK => byte_select[0].CLK
+HCLK => byte_select[1].CLK
+HCLK => byte_select[2].CLK
+HCLK => byte_select[3].CLK
+HCLK => saved_word_address[0].CLK
+HCLK => saved_word_address[1].CLK
+HCLK => saved_word_address[2].CLK
+HCLK => saved_word_address[3].CLK
+HCLK => saved_word_address[4].CLK
+HCLK => saved_word_address[5].CLK
+HCLK => saved_word_address[6].CLK
+HCLK => saved_word_address[7].CLK
+HCLK => saved_word_address[8].CLK
+HCLK => saved_word_address[9].CLK
+HCLK => saved_word_address[10].CLK
+HCLK => saved_word_address[11].CLK
+HCLK => read_cycle.CLK
+HCLK => write_cycle.CLK
+HCLK => memory.CLK0
+HRESETn => byte_select[0].ACLR
+HRESETn => byte_select[1].ACLR
+HRESETn => byte_select[2].ACLR
+HRESETn => byte_select[3].ACLR
+HRESETn => saved_word_address[0].ACLR
+HRESETn => saved_word_address[1].ACLR
+HRESETn => saved_word_address[2].ACLR
+HRESETn => saved_word_address[3].ACLR
+HRESETn => saved_word_address[4].ACLR
+HRESETn => saved_word_address[5].ACLR
+HRESETn => saved_word_address[6].ACLR
+HRESETn => saved_word_address[7].ACLR
+HRESETn => saved_word_address[8].ACLR
+HRESETn => saved_word_address[9].ACLR
+HRESETn => saved_word_address[10].ACLR
+HRESETn => saved_word_address[11].ACLR
+HRESETn => read_cycle.ACLR
+HRESETn => write_cycle.ACLR
+HREADY => always1.IN1
+HADDR[0] => Equal0.IN31
+HADDR[0] => Equal1.IN0
+HADDR[0] => Equal2.IN31
+HADDR[0] => Equal3.IN1
+HADDR[1] => Equal0.IN30
+HADDR[1] => Equal1.IN31
+HADDR[1] => Equal2.IN0
+HADDR[1] => Equal3.IN0
+HADDR[2] => memory.raddr_a[0].DATAB
+HADDR[2] => saved_word_address[0].DATAIN
+HADDR[3] => memory.raddr_a[1].DATAB
+HADDR[3] => saved_word_address[1].DATAIN
+HADDR[4] => memory.raddr_a[2].DATAB
+HADDR[4] => saved_word_address[2].DATAIN
+HADDR[5] => memory.raddr_a[3].DATAB
+HADDR[5] => saved_word_address[3].DATAIN
+HADDR[6] => memory.raddr_a[4].DATAB
+HADDR[6] => saved_word_address[4].DATAIN
+HADDR[7] => memory.raddr_a[5].DATAB
+HADDR[7] => saved_word_address[5].DATAIN
+HADDR[8] => memory.raddr_a[6].DATAB
+HADDR[8] => saved_word_address[6].DATAIN
+HADDR[9] => memory.raddr_a[7].DATAB
+HADDR[9] => saved_word_address[7].DATAIN
+HADDR[10] => memory.raddr_a[8].DATAB
+HADDR[10] => saved_word_address[8].DATAIN
+HADDR[11] => memory.raddr_a[9].DATAB
+HADDR[11] => saved_word_address[9].DATAIN
+HADDR[12] => memory.raddr_a[10].DATAB
+HADDR[12] => saved_word_address[10].DATAIN
+HADDR[13] => memory.raddr_a[11].DATAB
+HADDR[13] => saved_word_address[11].DATAIN
+HADDR[14] => ~NO_FANOUT~
+HADDR[15] => ~NO_FANOUT~
+HADDR[16] => ~NO_FANOUT~
+HADDR[17] => ~NO_FANOUT~
+HADDR[18] => ~NO_FANOUT~
+HADDR[19] => ~NO_FANOUT~
+HADDR[20] => ~NO_FANOUT~
+HADDR[21] => ~NO_FANOUT~
+HADDR[22] => ~NO_FANOUT~
+HADDR[23] => ~NO_FANOUT~
+HADDR[24] => ~NO_FANOUT~
+HADDR[25] => ~NO_FANOUT~
+HADDR[26] => ~NO_FANOUT~
+HADDR[27] => ~NO_FANOUT~
+HADDR[28] => ~NO_FANOUT~
+HADDR[29] => ~NO_FANOUT~
+HADDR[30] => ~NO_FANOUT~
+HADDR[31] => ~NO_FANOUT~
+HTRANS[0] => Equal4.IN1
+HTRANS[1] => Equal4.IN0
+HWRITE => write_cycle.DATAB
+HWRITE => read_cycle.DATAB
+HSIZE[0] => byte1.IN1
+HSIZE[0] => byte3.IN1
+HSIZE[1] => byte0.IN1
+HSIZE[1] => byte1.IN1
+HSIZE[1] => byte2.IN1
+HSIZE[1] => byte3.IN1
+HSIZE[2] => ~NO_FANOUT~
+HWDATA[0] => data_to_memory.DATAB
+HWDATA[1] => data_to_memory.DATAB
+HWDATA[2] => data_to_memory.DATAB
+HWDATA[3] => data_to_memory.DATAB
+HWDATA[4] => data_to_memory.DATAB
+HWDATA[5] => data_to_memory.DATAB
+HWDATA[6] => data_to_memory.DATAB
+HWDATA[7] => data_to_memory.DATAB
+HWDATA[8] => data_to_memory.DATAB
+HWDATA[9] => data_to_memory.DATAB
+HWDATA[10] => data_to_memory.DATAB
+HWDATA[11] => data_to_memory.DATAB
+HWDATA[12] => data_to_memory.DATAB
+HWDATA[13] => data_to_memory.DATAB
+HWDATA[14] => data_to_memory.DATAB
+HWDATA[15] => data_to_memory.DATAB
+HWDATA[16] => data_to_memory.DATAB
+HWDATA[17] => data_to_memory.DATAB
+HWDATA[18] => data_to_memory.DATAB
+HWDATA[19] => data_to_memory.DATAB
+HWDATA[20] => data_to_memory.DATAB
+HWDATA[21] => data_to_memory.DATAB
+HWDATA[22] => data_to_memory.DATAB
+HWDATA[23] => data_to_memory.DATAB
+HWDATA[24] => data_to_memory.DATAB
+HWDATA[25] => data_to_memory.DATAB
+HWDATA[26] => data_to_memory.DATAB
+HWDATA[27] => data_to_memory.DATAB
+HWDATA[28] => data_to_memory.DATAB
+HWDATA[29] => data_to_memory.DATAB
+HWDATA[30] => data_to_memory.DATAB
+HWDATA[31] => data_to_memory.DATAB
+HREADYOUT <= write_cycle.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[0] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[1] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[2] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[3] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[4] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[5] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[6] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[7] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[8] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[9] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[10] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[11] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[12] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[13] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[14] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[15] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[16] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[17] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[18] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[19] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[20] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[21] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[22] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[23] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[24] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[25] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[26] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[27] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[28] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[29] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[30] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[31] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|de1_soc_wrapper|arm_soc:soc_inst|ahb_switches:switches_1
+HCLK => half_word_address[0].CLK
+HCLK => half_word_address[1].CLK
+HCLK => read_enable.CLK
+HCLK => DataValid[0].CLK
+HCLK => DataValid[1].CLK
+HCLK => last_buttons[0].CLK
+HCLK => last_buttons[1].CLK
+HCLK => switch_store[1][0].CLK
+HCLK => switch_store[1][1].CLK
+HCLK => switch_store[1][2].CLK
+HCLK => switch_store[1][3].CLK
+HCLK => switch_store[1][4].CLK
+HCLK => switch_store[1][5].CLK
+HCLK => switch_store[1][6].CLK
+HCLK => switch_store[1][7].CLK
+HCLK => switch_store[1][8].CLK
+HCLK => switch_store[1][9].CLK
+HCLK => switch_store[1][10].CLK
+HCLK => switch_store[1][11].CLK
+HCLK => switch_store[1][12].CLK
+HCLK => switch_store[1][13].CLK
+HCLK => switch_store[1][14].CLK
+HCLK => switch_store[1][15].CLK
+HCLK => switch_store[0][0].CLK
+HCLK => switch_store[0][1].CLK
+HCLK => switch_store[0][2].CLK
+HCLK => switch_store[0][3].CLK
+HCLK => switch_store[0][4].CLK
+HCLK => switch_store[0][5].CLK
+HCLK => switch_store[0][6].CLK
+HCLK => switch_store[0][7].CLK
+HCLK => switch_store[0][8].CLK
+HCLK => switch_store[0][9].CLK
+HCLK => switch_store[0][10].CLK
+HCLK => switch_store[0][11].CLK
+HCLK => switch_store[0][12].CLK
+HCLK => switch_store[0][13].CLK
+HCLK => switch_store[0][14].CLK
+HCLK => switch_store[0][15].CLK
+HRESETn => DataValid[0].ACLR
+HRESETn => DataValid[1].ACLR
+HRESETn => last_buttons[0].ACLR
+HRESETn => last_buttons[1].ACLR
+HRESETn => switch_store[1][0].ACLR
+HRESETn => switch_store[1][1].ACLR
+HRESETn => switch_store[1][2].ACLR
+HRESETn => switch_store[1][3].ACLR
+HRESETn => switch_store[1][4].ACLR
+HRESETn => switch_store[1][5].ACLR
+HRESETn => switch_store[1][6].ACLR
+HRESETn => switch_store[1][7].ACLR
+HRESETn => switch_store[1][8].ACLR
+HRESETn => switch_store[1][9].ACLR
+HRESETn => switch_store[1][10].ACLR
+HRESETn => switch_store[1][11].ACLR
+HRESETn => switch_store[1][12].ACLR
+HRESETn => switch_store[1][13].ACLR
+HRESETn => switch_store[1][14].ACLR
+HRESETn => switch_store[1][15].ACLR
+HRESETn => switch_store[0][0].ACLR
+HRESETn => switch_store[0][1].ACLR
+HRESETn => switch_store[0][2].ACLR
+HRESETn => switch_store[0][3].ACLR
+HRESETn => switch_store[0][4].ACLR
+HRESETn => switch_store[0][5].ACLR
+HRESETn => switch_store[0][6].ACLR
+HRESETn => switch_store[0][7].ACLR
+HRESETn => switch_store[0][8].ACLR
+HRESETn => switch_store[0][9].ACLR
+HRESETn => switch_store[0][10].ACLR
+HRESETn => switch_store[0][11].ACLR
+HRESETn => switch_store[0][12].ACLR
+HRESETn => switch_store[0][13].ACLR
+HRESETn => switch_store[0][14].ACLR
+HRESETn => switch_store[0][15].ACLR
+HRESETn => half_word_address[0].ACLR
+HRESETn => half_word_address[1].ACLR
+HRESETn => read_enable.ACLR
+HADDR[0] => ~NO_FANOUT~
+HADDR[1] => half_word_address.DATAB
+HADDR[2] => half_word_address.DATAB
+HADDR[3] => ~NO_FANOUT~
+HADDR[4] => ~NO_FANOUT~
+HADDR[5] => ~NO_FANOUT~
+HADDR[6] => ~NO_FANOUT~
+HADDR[7] => ~NO_FANOUT~
+HADDR[8] => ~NO_FANOUT~
+HADDR[9] => ~NO_FANOUT~
+HADDR[10] => ~NO_FANOUT~
+HADDR[11] => ~NO_FANOUT~
+HADDR[12] => ~NO_FANOUT~
+HADDR[13] => ~NO_FANOUT~
+HADDR[14] => ~NO_FANOUT~
+HADDR[15] => ~NO_FANOUT~
+HADDR[16] => ~NO_FANOUT~
+HADDR[17] => ~NO_FANOUT~
+HADDR[18] => ~NO_FANOUT~
+HADDR[19] => ~NO_FANOUT~
+HADDR[20] => ~NO_FANOUT~
+HADDR[21] => ~NO_FANOUT~
+HADDR[22] => ~NO_FANOUT~
+HADDR[23] => ~NO_FANOUT~
+HADDR[24] => ~NO_FANOUT~
+HADDR[25] => ~NO_FANOUT~
+HADDR[26] => ~NO_FANOUT~
+HADDR[27] => ~NO_FANOUT~
+HADDR[28] => ~NO_FANOUT~
+HADDR[29] => ~NO_FANOUT~
+HADDR[30] => ~NO_FANOUT~
+HADDR[31] => ~NO_FANOUT~
+HWDATA[0] => ~NO_FANOUT~
+HWDATA[1] => ~NO_FANOUT~
+HWDATA[2] => ~NO_FANOUT~
+HWDATA[3] => ~NO_FANOUT~
+HWDATA[4] => ~NO_FANOUT~
+HWDATA[5] => ~NO_FANOUT~
+HWDATA[6] => ~NO_FANOUT~
+HWDATA[7] => ~NO_FANOUT~
+HWDATA[8] => ~NO_FANOUT~
+HWDATA[9] => ~NO_FANOUT~
+HWDATA[10] => ~NO_FANOUT~
+HWDATA[11] => ~NO_FANOUT~
+HWDATA[12] => ~NO_FANOUT~
+HWDATA[13] => ~NO_FANOUT~
+HWDATA[14] => ~NO_FANOUT~
+HWDATA[15] => ~NO_FANOUT~
+HWDATA[16] => ~NO_FANOUT~
+HWDATA[17] => ~NO_FANOUT~
+HWDATA[18] => ~NO_FANOUT~
+HWDATA[19] => ~NO_FANOUT~
+HWDATA[20] => ~NO_FANOUT~
+HWDATA[21] => ~NO_FANOUT~
+HWDATA[22] => ~NO_FANOUT~
+HWDATA[23] => ~NO_FANOUT~
+HWDATA[24] => ~NO_FANOUT~
+HWDATA[25] => ~NO_FANOUT~
+HWDATA[26] => ~NO_FANOUT~
+HWDATA[27] => ~NO_FANOUT~
+HWDATA[28] => ~NO_FANOUT~
+HWDATA[29] => ~NO_FANOUT~
+HWDATA[30] => ~NO_FANOUT~
+HWDATA[31] => ~NO_FANOUT~
+HSIZE[0] => ~NO_FANOUT~
+HSIZE[1] => ~NO_FANOUT~
+HSIZE[2] => ~NO_FANOUT~
+HTRANS[0] => Equal2.IN1
+HTRANS[1] => Equal2.IN0
+HWRITE => read_enable.DATAB
+HREADY => always1.IN0
+HSEL => always1.IN1
+HRDATA[0] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[1] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[2] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[3] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[4] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[5] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[6] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[7] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[8] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[9] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[10] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[11] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[12] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[13] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[14] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[15] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[16] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[17] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[18] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[19] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[20] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[21] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[22] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[23] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[24] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[25] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[26] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[27] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[28] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[29] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[30] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HRDATA[31] <= HRDATA.DB_MAX_OUTPUT_PORT_TYPE
+HREADYOUT <= <VCC>
+Switches[0] => switch_store[0][0].DATAIN
+Switches[0] => switch_store[1][0].DATAIN
+Switches[1] => switch_store[0][1].DATAIN
+Switches[1] => switch_store[1][1].DATAIN
+Switches[2] => switch_store[0][2].DATAIN
+Switches[2] => switch_store[1][2].DATAIN
+Switches[3] => switch_store[0][3].DATAIN
+Switches[3] => switch_store[1][3].DATAIN
+Switches[4] => switch_store[0][4].DATAIN
+Switches[4] => switch_store[1][4].DATAIN
+Switches[5] => switch_store[0][5].DATAIN
+Switches[5] => switch_store[1][5].DATAIN
+Switches[6] => switch_store[0][6].DATAIN
+Switches[6] => switch_store[1][6].DATAIN
+Switches[7] => switch_store[0][7].DATAIN
+Switches[7] => switch_store[1][7].DATAIN
+Switches[8] => switch_store[0][8].DATAIN
+Switches[8] => switch_store[1][8].DATAIN
+Switches[9] => switch_store[0][9].DATAIN
+Switches[9] => switch_store[1][9].DATAIN
+Switches[10] => switch_store[0][10].DATAIN
+Switches[10] => switch_store[1][10].DATAIN
+Switches[11] => switch_store[0][11].DATAIN
+Switches[11] => switch_store[1][11].DATAIN
+Switches[12] => switch_store[0][12].DATAIN
+Switches[12] => switch_store[1][12].DATAIN
+Switches[13] => switch_store[0][13].DATAIN
+Switches[13] => switch_store[1][13].DATAIN
+Switches[14] => switch_store[0][14].DATAIN
+Switches[14] => switch_store[1][14].DATAIN
+Switches[15] => switch_store[0][15].DATAIN
+Switches[15] => switch_store[1][15].DATAIN
+Buttons[0] => always0.IN1
+Buttons[0] => last_buttons[0].DATAIN
+Buttons[1] => always0.IN1
+Buttons[1] => last_buttons[1].DATAIN
+
+
+|de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1
+HSEL => always0.IN0
+HCLK => memory.we_a.CLK
+HCLK => memory.waddr_a[18].CLK
+HCLK => memory.waddr_a[17].CLK
+HCLK => memory.waddr_a[16].CLK
+HCLK => memory.waddr_a[15].CLK
+HCLK => memory.waddr_a[14].CLK
+HCLK => memory.waddr_a[13].CLK
+HCLK => memory.waddr_a[12].CLK
+HCLK => memory.waddr_a[11].CLK
+HCLK => memory.waddr_a[10].CLK
+HCLK => memory.waddr_a[9].CLK
+HCLK => memory.waddr_a[8].CLK
+HCLK => memory.waddr_a[7].CLK
+HCLK => memory.waddr_a[6].CLK
+HCLK => memory.waddr_a[5].CLK
+HCLK => memory.waddr_a[4].CLK
+HCLK => memory.waddr_a[3].CLK
+HCLK => memory.waddr_a[2].CLK
+HCLK => memory.waddr_a[1].CLK
+HCLK => memory.waddr_a[0].CLK
+HCLK => memory.data_a[0].CLK
+HCLK => pixel~reg0.CLK
+HCLK => word_address[0].CLK
+HCLK => word_address[1].CLK
+HCLK => word_address[2].CLK
+HCLK => word_address[3].CLK
+HCLK => word_address[4].CLK
+HCLK => word_address[5].CLK
+HCLK => word_address[6].CLK
+HCLK => word_address[7].CLK
+HCLK => word_address[8].CLK
+HCLK => word_address[9].CLK
+HCLK => word_address[10].CLK
+HCLK => word_address[11].CLK
+HCLK => word_address[12].CLK
+HCLK => word_address[13].CLK
+HCLK => word_address[14].CLK
+HCLK => word_address[15].CLK
+HCLK => word_address[16].CLK
+HCLK => word_address[17].CLK
+HCLK => word_address[18].CLK
+HCLK => write_enable.CLK
+HCLK => memory.CLK0
+HRESETn => word_address[0].ACLR
+HRESETn => word_address[1].ACLR
+HRESETn => word_address[2].ACLR
+HRESETn => word_address[3].ACLR
+HRESETn => word_address[4].ACLR
+HRESETn => word_address[5].ACLR
+HRESETn => word_address[6].ACLR
+HRESETn => word_address[7].ACLR
+HRESETn => word_address[8].ACLR
+HRESETn => word_address[9].ACLR
+HRESETn => word_address[10].ACLR
+HRESETn => word_address[11].ACLR
+HRESETn => word_address[12].ACLR
+HRESETn => word_address[13].ACLR
+HRESETn => word_address[14].ACLR
+HRESETn => word_address[15].ACLR
+HRESETn => word_address[16].ACLR
+HRESETn => word_address[17].ACLR
+HRESETn => word_address[18].ACLR
+HRESETn => write_enable.ACLR
+HREADY => always0.IN1
+HADDR[0] => ~NO_FANOUT~
+HADDR[1] => ~NO_FANOUT~
+HADDR[2] => word_address.DATAB
+HADDR[3] => word_address.DATAB
+HADDR[4] => word_address.DATAB
+HADDR[5] => word_address.DATAB
+HADDR[6] => word_address.DATAB
+HADDR[7] => word_address.DATAB
+HADDR[8] => word_address.DATAB
+HADDR[9] => word_address.DATAB
+HADDR[10] => word_address.DATAB
+HADDR[11] => word_address.DATAB
+HADDR[12] => word_address.DATAB
+HADDR[13] => word_address.DATAB
+HADDR[14] => word_address.DATAB
+HADDR[15] => word_address.DATAB
+HADDR[16] => word_address.DATAB
+HADDR[17] => word_address.DATAB
+HADDR[18] => word_address.DATAB
+HADDR[19] => word_address.DATAB
+HADDR[20] => word_address.DATAB
+HADDR[21] => ~NO_FANOUT~
+HADDR[22] => ~NO_FANOUT~
+HADDR[23] => ~NO_FANOUT~
+HADDR[24] => ~NO_FANOUT~
+HADDR[25] => ~NO_FANOUT~
+HADDR[26] => ~NO_FANOUT~
+HADDR[27] => ~NO_FANOUT~
+HADDR[28] => ~NO_FANOUT~
+HADDR[29] => ~NO_FANOUT~
+HADDR[30] => ~NO_FANOUT~
+HADDR[31] => ~NO_FANOUT~
+HTRANS[0] => Equal0.IN1
+HTRANS[1] => Equal0.IN0
+HWRITE => write_enable.DATAB
+HSIZE[0] => ~NO_FANOUT~
+HSIZE[1] => ~NO_FANOUT~
+HSIZE[2] => ~NO_FANOUT~
+HWDATA[0] => memory.data_a[0].DATAIN
+HWDATA[0] => memory.DATAIN
+HWDATA[1] => ~NO_FANOUT~
+HWDATA[2] => ~NO_FANOUT~
+HWDATA[3] => ~NO_FANOUT~
+HWDATA[4] => ~NO_FANOUT~
+HWDATA[5] => ~NO_FANOUT~
+HWDATA[6] => ~NO_FANOUT~
+HWDATA[7] => ~NO_FANOUT~
+HWDATA[8] => ~NO_FANOUT~
+HWDATA[9] => ~NO_FANOUT~
+HWDATA[10] => ~NO_FANOUT~
+HWDATA[11] => ~NO_FANOUT~
+HWDATA[12] => ~NO_FANOUT~
+HWDATA[13] => ~NO_FANOUT~
+HWDATA[14] => ~NO_FANOUT~
+HWDATA[15] => ~NO_FANOUT~
+HWDATA[16] => ~NO_FANOUT~
+HWDATA[17] => ~NO_FANOUT~
+HWDATA[18] => ~NO_FANOUT~
+HWDATA[19] => ~NO_FANOUT~
+HWDATA[20] => ~NO_FANOUT~
+HWDATA[21] => ~NO_FANOUT~
+HWDATA[22] => ~NO_FANOUT~
+HWDATA[23] => ~NO_FANOUT~
+HWDATA[24] => ~NO_FANOUT~
+HWDATA[25] => ~NO_FANOUT~
+HWDATA[26] => ~NO_FANOUT~
+HWDATA[27] => ~NO_FANOUT~
+HWDATA[28] => ~NO_FANOUT~
+HWDATA[29] => ~NO_FANOUT~
+HWDATA[30] => ~NO_FANOUT~
+HWDATA[31] => ~NO_FANOUT~
+pixel_x[0] => memory.RADDR
+pixel_x[1] => memory.RADDR1
+pixel_x[2] => memory.RADDR2
+pixel_x[3] => memory.RADDR3
+pixel_x[4] => memory.RADDR4
+pixel_x[5] => memory.RADDR5
+pixel_x[6] => memory.RADDR6
+pixel_x[7] => Add1.IN22
+pixel_x[8] => Add1.IN21
+pixel_x[9] => Add1.IN20
+pixel_y[0] => Add0.IN18
+pixel_y[0] => Add1.IN24
+pixel_y[1] => Add0.IN17
+pixel_y[1] => Add1.IN23
+pixel_y[2] => Add0.IN15
+pixel_y[2] => Add0.IN16
+pixel_y[3] => Add0.IN13
+pixel_y[3] => Add0.IN14
+pixel_y[4] => Add0.IN11
+pixel_y[4] => Add0.IN12
+pixel_y[5] => Add0.IN9
+pixel_y[5] => Add0.IN10
+pixel_y[6] => Add0.IN7
+pixel_y[6] => Add0.IN8
+pixel_y[7] => Add0.IN5
+pixel_y[7] => Add0.IN6
+pixel_y[8] => Add0.IN3
+pixel_y[8] => Add0.IN4
+HREADYOUT <= <VCC>
+HRDATA[0] <= <GND>
+HRDATA[1] <= <GND>
+HRDATA[2] <= <GND>
+HRDATA[3] <= <GND>
+HRDATA[4] <= <GND>
+HRDATA[5] <= <GND>
+HRDATA[6] <= <GND>
+HRDATA[7] <= <GND>
+HRDATA[8] <= <GND>
+HRDATA[9] <= <GND>
+HRDATA[10] <= <GND>
+HRDATA[11] <= <GND>
+HRDATA[12] <= <GND>
+HRDATA[13] <= <GND>
+HRDATA[14] <= <GND>
+HRDATA[15] <= <GND>
+HRDATA[16] <= <GND>
+HRDATA[17] <= <GND>
+HRDATA[18] <= <GND>
+HRDATA[19] <= <GND>
+HRDATA[20] <= <GND>
+HRDATA[21] <= <GND>
+HRDATA[22] <= <GND>
+HRDATA[23] <= <GND>
+HRDATA[24] <= <GND>
+HRDATA[25] <= <GND>
+HRDATA[26] <= <GND>
+HRDATA[27] <= <GND>
+HRDATA[28] <= <GND>
+HRDATA[29] <= <GND>
+HRDATA[30] <= <GND>
+HRDATA[31] <= <GND>
+pixel <= pixel~reg0.DB_MAX_OUTPUT_PORT_TYPE
+
+
+|de1_soc_wrapper|razzle:raz_inst
+CLOCK_50 => VGA_VS~reg0.CLK
+CLOCK_50 => VGA_HS~reg0.CLK
+CLOCK_50 => video_on_V.CLK
+CLOCK_50 => video_on_H.CLK
+CLOCK_50 => V_count[0].CLK
+CLOCK_50 => V_count[1].CLK
+CLOCK_50 => V_count[2].CLK
+CLOCK_50 => V_count[3].CLK
+CLOCK_50 => V_count[4].CLK
+CLOCK_50 => V_count[5].CLK
+CLOCK_50 => V_count[6].CLK
+CLOCK_50 => V_count[7].CLK
+CLOCK_50 => V_count[8].CLK
+CLOCK_50 => V_count[9].CLK
+CLOCK_50 => V_count[10].CLK
+CLOCK_50 => H_count[0].CLK
+CLOCK_50 => H_count[1].CLK
+CLOCK_50 => H_count[2].CLK
+CLOCK_50 => H_count[3].CLK
+CLOCK_50 => H_count[4].CLK
+CLOCK_50 => H_count[5].CLK
+CLOCK_50 => H_count[6].CLK
+CLOCK_50 => H_count[7].CLK
+CLOCK_50 => H_count[8].CLK
+CLOCK_50 => H_count[9].CLK
+CLOCK_50 => H_count[10].CLK
+CLOCK_50 => clock_enable.CLK
+KEY[0] => ~NO_FANOUT~
+KEY[1] => ~NO_FANOUT~
+KEY[2] => video_on_V.ACLR
+KEY[2] => video_on_H.ACLR
+KEY[2] => V_count[0].ACLR
+KEY[2] => V_count[1].ACLR
+KEY[2] => V_count[2].ACLR
+KEY[2] => V_count[3].ACLR
+KEY[2] => V_count[4].ACLR
+KEY[2] => V_count[5].ACLR
+KEY[2] => V_count[6].ACLR
+KEY[2] => V_count[7].ACLR
+KEY[2] => V_count[8].ACLR
+KEY[2] => V_count[9].ACLR
+KEY[2] => V_count[10].ACLR
+KEY[2] => H_count[0].ACLR
+KEY[2] => H_count[1].ACLR
+KEY[2] => H_count[2].ACLR
+KEY[2] => H_count[3].ACLR
+KEY[2] => H_count[4].ACLR
+KEY[2] => H_count[5].ACLR
+KEY[2] => H_count[6].ACLR
+KEY[2] => H_count[7].ACLR
+KEY[2] => H_count[8].ACLR
+KEY[2] => H_count[9].ACLR
+KEY[2] => H_count[10].ACLR
+KEY[2] => clock_enable.ACLR
+KEY[2] => VGA_VS~reg0.ENA
+KEY[2] => VGA_HS~reg0.ENA
+KEY[3] => ~NO_FANOUT~
+pixel[0] => Red.IN1
+pixel[1] => ~NO_FANOUT~
+pixel[2] => ~NO_FANOUT~
+pixel[3] => ~NO_FANOUT~
+pixel[4] => ~NO_FANOUT~
+pixel[5] => ~NO_FANOUT~
+pixel[6] => ~NO_FANOUT~
+pixel[7] => ~NO_FANOUT~
+pixel[8] => ~NO_FANOUT~
+pixel[9] => ~NO_FANOUT~
+VGA_R[0] <= Red.DB_MAX_OUTPUT_PORT_TYPE
+VGA_R[1] <= Red.DB_MAX_OUTPUT_PORT_TYPE
+VGA_R[2] <= Red.DB_MAX_OUTPUT_PORT_TYPE
+VGA_R[3] <= Red.DB_MAX_OUTPUT_PORT_TYPE
+VGA_R[4] <= Red.DB_MAX_OUTPUT_PORT_TYPE
+VGA_R[5] <= Red.DB_MAX_OUTPUT_PORT_TYPE
+VGA_R[6] <= Red.DB_MAX_OUTPUT_PORT_TYPE
+VGA_R[7] <= Red.DB_MAX_OUTPUT_PORT_TYPE
+VGA_G[0] <= <GND>
+VGA_G[1] <= <GND>
+VGA_G[2] <= <GND>
+VGA_G[3] <= <GND>
+VGA_G[4] <= <GND>
+VGA_G[5] <= <GND>
+VGA_G[6] <= <GND>
+VGA_G[7] <= <GND>
+VGA_B[0] <= <GND>
+VGA_B[1] <= <GND>
+VGA_B[2] <= <GND>
+VGA_B[3] <= <GND>
+VGA_B[4] <= <GND>
+VGA_B[5] <= <GND>
+VGA_B[6] <= <GND>
+VGA_B[7] <= <GND>
+pixel_x[0] <= H_count[0].DB_MAX_OUTPUT_PORT_TYPE
+pixel_x[1] <= H_count[1].DB_MAX_OUTPUT_PORT_TYPE
+pixel_x[2] <= H_count[2].DB_MAX_OUTPUT_PORT_TYPE
+pixel_x[3] <= H_count[3].DB_MAX_OUTPUT_PORT_TYPE
+pixel_x[4] <= H_count[4].DB_MAX_OUTPUT_PORT_TYPE
+pixel_x[5] <= H_count[5].DB_MAX_OUTPUT_PORT_TYPE
+pixel_x[6] <= H_count[6].DB_MAX_OUTPUT_PORT_TYPE
+pixel_x[7] <= H_count[7].DB_MAX_OUTPUT_PORT_TYPE
+pixel_x[8] <= H_count[8].DB_MAX_OUTPUT_PORT_TYPE
+pixel_x[9] <= H_count[9].DB_MAX_OUTPUT_PORT_TYPE
+pixel_y[0] <= V_count[0].DB_MAX_OUTPUT_PORT_TYPE
+pixel_y[1] <= V_count[1].DB_MAX_OUTPUT_PORT_TYPE
+pixel_y[2] <= V_count[2].DB_MAX_OUTPUT_PORT_TYPE
+pixel_y[3] <= V_count[3].DB_MAX_OUTPUT_PORT_TYPE
+pixel_y[4] <= V_count[4].DB_MAX_OUTPUT_PORT_TYPE
+pixel_y[5] <= V_count[5].DB_MAX_OUTPUT_PORT_TYPE
+pixel_y[6] <= V_count[6].DB_MAX_OUTPUT_PORT_TYPE
+pixel_y[7] <= V_count[7].DB_MAX_OUTPUT_PORT_TYPE
+pixel_y[8] <= V_count[8].DB_MAX_OUTPUT_PORT_TYPE
+VGA_HS <= VGA_HS~reg0.DB_MAX_OUTPUT_PORT_TYPE
+VGA_VS <= VGA_VS~reg0.DB_MAX_OUTPUT_PORT_TYPE
+VGA_CLK <= clock_enable.DB_MAX_OUTPUT_PORT_TYPE
+VGA_BLANK_N <= video_on.DB_MAX_OUTPUT_PORT_TYPE
+
+
diff --git a/db/de1_soc_wrapper.hif b/db/de1_soc_wrapper.hif
new file mode 100644
index 0000000000000000000000000000000000000000..4a677983222f4be16726857841f58666fd493fec
Binary files /dev/null and b/db/de1_soc_wrapper.hif differ
diff --git a/db/de1_soc_wrapper.lpc.html b/db/de1_soc_wrapper.lpc.html
new file mode 100644
index 0000000000000000000000000000000000000000..42e8160f90c85131ecd407430c6ba312e205b0e4
--- /dev/null
+++ b/db/de1_soc_wrapper.lpc.html
@@ -0,0 +1,146 @@
+<TABLE>
+<TR bgcolor="#C0C0C0">
+<TH>Hierarchy</TH>
+<TH>Input</TH>
+<TH>Constant Input</TH>
+<TH>Unused Input</TH>
+<TH>Floating Input</TH>
+<TH>Output</TH>
+<TH>Constant Output</TH>
+<TH>Unused Output</TH>
+<TH>Floating Output</TH>
+<TH>Bidir</TH>
+<TH>Constant Bidir</TH>
+<TH>Unused Bidir</TH>
+<TH>Input only Bidir</TH>
+<TH>Output only Bidir</TH>
+</TR>
+<TR >
+<TD >raz_inst</TD>
+<TD >15</TD>
+<TD >25</TD>
+<TD >3</TD>
+<TD >25</TD>
+<TD >47</TD>
+<TD >25</TD>
+<TD >25</TD>
+<TD >25</TD>
+<TD >0</TD>
+<TD >0</TD>
+<TD >0</TD>
+<TD >0</TD>
+<TD >0</TD>
+</TR>
+<TR >
+<TD >soc_inst|pix1</TD>
+<TD >93</TD>
+<TD >33</TD>
+<TD >47</TD>
+<TD >33</TD>
+<TD >34</TD>
+<TD >33</TD>
+<TD >33</TD>
+<TD >33</TD>
+<TD >0</TD>
+<TD >0</TD>
+<TD >0</TD>
+<TD >0</TD>
+<TD >0</TD>
+</TR>
+<TR >
+<TD >soc_inst|switches_1</TD>
+<TD >92</TD>
+<TD >1</TD>
+<TD >65</TD>
+<TD >1</TD>
+<TD >33</TD>
+<TD >1</TD>
+<TD >1</TD>
+<TD >1</TD>
+<TD >0</TD>
+<TD >0</TD>
+<TD >0</TD>
+<TD >0</TD>
+<TD >0</TD>
+</TR>
+<TR >
+<TD >soc_inst|ram_1</TD>
+<TD >74</TD>
+<TD >0</TD>
+<TD >19</TD>
+<TD >0</TD>
+<TD >33</TD>
+<TD >0</TD>
+<TD >0</TD>
+<TD >0</TD>
+<TD >0</TD>
+<TD >0</TD>
+<TD >0</TD>
+<TD >0</TD>
+<TD >0</TD>
+</TR>
+<TR >
+<TD >soc_inst|interconnect_1</TD>
+<TD >133</TD>
+<TD >0</TD>
+<TD >0</TD>
+<TD >0</TD>
+<TD >36</TD>
+<TD >0</TD>
+<TD >0</TD>
+<TD >0</TD>
+<TD >0</TD>
+<TD >0</TD>
+<TD >0</TD>
+<TD >0</TD>
+<TD >0</TD>
+</TR>
+<TR >
+<TD >soc_inst|m0_1|u_logic</TD>
+<TD >54</TD>
+<TD >7</TD>
+<TD >0</TD>
+<TD >7</TD>
+<TD >634</TD>
+<TD >7</TD>
+<TD >7</TD>
+<TD >7</TD>
+<TD >0</TD>
+<TD >0</TD>
+<TD >0</TD>
+<TD >0</TD>
+<TD >0</TD>
+</TR>
+<TR >
+<TD >soc_inst|m0_1</TD>
+<TD >54</TD>
+<TD >30</TD>
+<TD >0</TD>
+<TD >30</TD>
+<TD >82</TD>
+<TD >30</TD>
+<TD >30</TD>
+<TD >30</TD>
+<TD >0</TD>
+<TD >0</TD>
+<TD >0</TD>
+<TD >0</TD>
+<TD >0</TD>
+</TR>
+<TR >
+<TD >soc_inst</TD>
+<TD >39</TD>
+<TD >6</TD>
+<TD >0</TD>
+<TD >6</TD>
+<TD >2</TD>
+<TD >6</TD>
+<TD >6</TD>
+<TD >6</TD>
+<TD >0</TD>
+<TD >0</TD>
+<TD >0</TD>
+<TD >0</TD>
+<TD >0</TD>
+</TR>
+</TABLE>
diff --git a/db/de1_soc_wrapper.lpc.rdb b/db/de1_soc_wrapper.lpc.rdb
new file mode 100644
index 0000000000000000000000000000000000000000..fa147adebcf547dd96ee3108996531bc78cbc477
Binary files /dev/null and b/db/de1_soc_wrapper.lpc.rdb differ
diff --git a/db/de1_soc_wrapper.lpc.txt b/db/de1_soc_wrapper.lpc.txt
new file mode 100644
index 0000000000000000000000000000000000000000..e7d35410fabe4ee80838a5ec15e76ef3b9a3bfd2
--- /dev/null
+++ b/db/de1_soc_wrapper.lpc.txt
@@ -0,0 +1,14 @@
++------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+; Legal Partition Candidates ;
++-------------------------+-------+----------------+--------------+----------------+--------+-----------------+---------------+-----------------+-------+----------------+--------------+------------------+-------------------+
+; Hierarchy ; Input ; Constant Input ; Unused Input ; Floating Input ; Output ; Constant Output ; Unused Output ; Floating Output ; Bidir ; Constant Bidir ; Unused Bidir ; Input only Bidir ; Output only Bidir ;
++-------------------------+-------+----------------+--------------+----------------+--------+-----------------+---------------+-----------------+-------+----------------+--------------+------------------+-------------------+
+; raz_inst ; 15 ; 25 ; 3 ; 25 ; 47 ; 25 ; 25 ; 25 ; 0 ; 0 ; 0 ; 0 ; 0 ;
+; soc_inst|pix1 ; 93 ; 33 ; 47 ; 33 ; 34 ; 33 ; 33 ; 33 ; 0 ; 0 ; 0 ; 0 ; 0 ;
+; soc_inst|switches_1 ; 92 ; 1 ; 65 ; 1 ; 33 ; 1 ; 1 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ;
+; soc_inst|ram_1 ; 74 ; 0 ; 19 ; 0 ; 33 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
+; soc_inst|interconnect_1 ; 133 ; 0 ; 0 ; 0 ; 36 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
+; soc_inst|m0_1|u_logic ; 54 ; 7 ; 0 ; 7 ; 634 ; 7 ; 7 ; 7 ; 0 ; 0 ; 0 ; 0 ; 0 ;
+; soc_inst|m0_1 ; 54 ; 30 ; 0 ; 30 ; 82 ; 30 ; 30 ; 30 ; 0 ; 0 ; 0 ; 0 ; 0 ;
+; soc_inst ; 39 ; 6 ; 0 ; 6 ; 2 ; 6 ; 6 ; 6 ; 0 ; 0 ; 0 ; 0 ; 0 ;
++-------------------------+-------+----------------+--------------+----------------+--------+-----------------+---------------+-----------------+-------+----------------+--------------+------------------+-------------------+
diff --git a/db/de1_soc_wrapper.map.ammdb b/db/de1_soc_wrapper.map.ammdb
new file mode 100644
index 0000000000000000000000000000000000000000..b60b62e8666708fc3428d703732d8c70421a348a
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diff --git a/db/de1_soc_wrapper.map.bpm b/db/de1_soc_wrapper.map.bpm
new file mode 100644
index 0000000000000000000000000000000000000000..b513d9c2dabe2df3c4e047cb9c1bc8bf0b6caa3d
Binary files /dev/null and b/db/de1_soc_wrapper.map.bpm differ
diff --git a/db/de1_soc_wrapper.map.cdb b/db/de1_soc_wrapper.map.cdb
new file mode 100644
index 0000000000000000000000000000000000000000..d46c07e2f8aac72fcbe2a2ca94869ac47ff3159c
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diff --git a/db/de1_soc_wrapper.map.hdb b/db/de1_soc_wrapper.map.hdb
new file mode 100644
index 0000000000000000000000000000000000000000..2148ca4a58eab4b6a87bace0925b31036394e40a
Binary files /dev/null and b/db/de1_soc_wrapper.map.hdb differ
diff --git a/db/de1_soc_wrapper.map.kpt b/db/de1_soc_wrapper.map.kpt
new file mode 100644
index 0000000000000000000000000000000000000000..6291962feadf28a3a616e7f5ce4c74ebc00f3048
Binary files /dev/null and b/db/de1_soc_wrapper.map.kpt differ
diff --git a/db/de1_soc_wrapper.map.qmsg b/db/de1_soc_wrapper.map.qmsg
new file mode 100644
index 0000000000000000000000000000000000000000..c202d25d1a79975e9977a0fcbd5d8606e8b3c6ac
--- /dev/null
+++ b/db/de1_soc_wrapper.map.qmsg
@@ -0,0 +1,72 @@
+{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1600942713587 ""}
+{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus Prime " "Running Quartus Prime Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition " "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1600942713589 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Sep 24 11:18:33 2020 " "Processing started: Thu Sep 24 11:18:33 2020" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1600942713589 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942713589 ""}
+{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off project24_09 -c de1_soc_wrapper " "Command: quartus_map --read_settings_files=on --write_settings_files=off project24_09 -c de1_soc_wrapper" { } { } 0 0 "Command: %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942713590 ""}
+{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." { } { } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Analysis & Synthesis" 0 -1 1600942713910 ""}
+{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "16 24 " "Parallel compilation is enabled and will use 16 of the 24 processors detected" { } { } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Analysis & Synthesis" 0 -1 1600942713910 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/razzle.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/razzle.sv" { { "Info" "ISGN_ENTITY_NAME" "1 razzle " "Found entity 1: razzle" { } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 8 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942722999 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942722999 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/ahb_interconnect.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/ahb_interconnect.sv" { { "Info" "ISGN_ENTITY_NAME" "1 ahb_interconnect " "Found entity 1: ahb_interconnect" { } { { "behavioural/ahb_interconnect.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942723004 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942723004 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/ahb_pixel_memory.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/ahb_pixel_memory.sv" { { "Info" "ISGN_ENTITY_NAME" "1 ahb_pixel_memory " "Found entity 1: ahb_pixel_memory" { } { { "behavioural/ahb_pixel_memory.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv" 23 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942723007 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942723007 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/ahb_ram.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/ahb_ram.sv" { { "Info" "ISGN_ENTITY_NAME" "1 ahb_ram " "Found entity 1: ahb_ram" { } { { "behavioural/ahb_ram.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_ram.sv" 24 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942723011 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942723011 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/ahb_switches.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/ahb_switches.sv" { { "Info" "ISGN_ENTITY_NAME" "1 ahb_switches " "Found entity 1: ahb_switches" { } { { "behavioural/ahb_switches.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_switches.sv" 32 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942723014 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942723014 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/arm_soc.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/arm_soc.sv" { { "Info" "ISGN_ENTITY_NAME" "1 arm_soc " "Found entity 1: arm_soc" { } { { "behavioural/arm_soc.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 4 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942723018 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942723018 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/CORTEXM0DS.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/CORTEXM0DS.sv" { { "Info" "ISGN_ENTITY_NAME" "1 CORTEXM0DS " "Found entity 1: CORTEXM0DS" { } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 27 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942723022 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942723022 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/cortexm0ds_logic.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/cortexm0ds_logic.sv" { { "Info" "ISGN_ENTITY_NAME" "1 cortexm0ds_logic " "Found entity 1: cortexm0ds_logic" { } { { "behavioural/cortexm0ds_logic.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/cortexm0ds_logic.sv" 27 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942723071 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942723071 ""}
+{ "Warning" "WVRFX_L3_VERI_MIXED_BLOCKING_NONBLOCKING_ASSIGNMENT" "de1_soc_wrapper.sv(64) " "Verilog HDL information at de1_soc_wrapper.sv(64): always construct contains both blocking and non-blocking assignments" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 64 0 0 } } } 0 10268 "Verilog HDL information at %1!s!: always construct contains both blocking and non-blocking assignments" 1 0 "Analysis & Synthesis" 0 -1 1600942723074 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/de1_soc_wrapper.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/de1_soc_wrapper.sv" { { "Info" "ISGN_ENTITY_NAME" "1 de1_soc_wrapper " "Found entity 1: de1_soc_wrapper" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 8 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942723075 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942723075 ""}
+{ "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "Green_Data razzle.sv(44) " "Verilog HDL Implicit Net warning at razzle.sv(44): created implicit net for \"Green_Data\"" { } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 44 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942723075 ""}
+{ "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "Blue_Data razzle.sv(45) " "Verilog HDL Implicit Net warning at razzle.sv(45): created implicit net for \"Blue_Data\"" { } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 45 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942723075 ""}
+{ "Info" "ISGN_START_ELABORATION_TOP" "de1_soc_wrapper " "Elaborating entity \"de1_soc_wrapper\" for the top level hierarchy" { } { } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Analysis & Synthesis" 0 -1 1600942723482 ""}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 26 de1_soc_wrapper.sv(75) " "Verilog HDL assignment warning at de1_soc_wrapper.sv(75): truncated value with size 32 to match size of target (26)" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 75 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942723485 "|de1_soc_wrapper"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "8 7 de1_soc_wrapper.sv(87) " "Verilog HDL assignment warning at de1_soc_wrapper.sv(87): truncated value with size 8 to match size of target (7)" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 87 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942723485 "|de1_soc_wrapper"}
+{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "LEDR de1_soc_wrapper.sv(15) " "Output port \"LEDR\" at de1_soc_wrapper.sv(15) has no driver" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Analysis & Synthesis" 0 -1 1600942723486 "|de1_soc_wrapper"}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "arm_soc arm_soc:soc_inst " "Elaborating entity \"arm_soc\" for hierarchy \"arm_soc:soc_inst\"" { } { { "behavioural/de1_soc_wrapper.sv" "soc_inst" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 42 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942723506 ""}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "CORTEXM0DS arm_soc:soc_inst\|CORTEXM0DS:m0_1 " "Elaborating entity \"CORTEXM0DS\" for hierarchy \"arm_soc:soc_inst\|CORTEXM0DS:m0_1\"" { } { { "behavioural/arm_soc.sv" "m0_1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 56 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942723522 ""}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_msp CORTEXM0DS.sv(76) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(76): object \"cm0_msp\" assigned a value but never read" { } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 76 0 0 } } } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600942723524 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_psp CORTEXM0DS.sv(77) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(77): object \"cm0_psp\" assigned a value but never read" { } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 77 0 0 } } } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600942723524 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_pc CORTEXM0DS.sv(79) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(79): object \"cm0_pc\" assigned a value but never read" { } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 79 0 0 } } } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600942723524 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_xpsr CORTEXM0DS.sv(80) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(80): object \"cm0_xpsr\" assigned a value but never read" { } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 80 0 0 } } } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600942723524 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_control CORTEXM0DS.sv(81) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(81): object \"cm0_control\" assigned a value but never read" { } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 81 0 0 } } } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600942723524 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_primask CORTEXM0DS.sv(82) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(82): object \"cm0_primask\" assigned a value but never read" { } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 82 0 0 } } } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600942723525 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cortexm0ds_logic arm_soc:soc_inst\|CORTEXM0DS:m0_1\|cortexm0ds_logic:u_logic " "Elaborating entity \"cortexm0ds_logic\" for hierarchy \"arm_soc:soc_inst\|CORTEXM0DS:m0_1\|cortexm0ds_logic:u_logic\"" { } { { "behavioural/CORTEXM0DS.sv" "u_logic" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 144 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942723525 ""}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "N4i2z4 cortexm0ds_logic.sv(1133) " "Verilog HDL or VHDL warning at cortexm0ds_logic.sv(1133): object \"N4i2z4\" assigned a value but never read" { } { { "behavioural/cortexm0ds_logic.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/cortexm0ds_logic.sv" 1133 0 0 } } } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600942723553 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic"}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "L5i2z4 cortexm0ds_logic.sv(1133) " "Verilog HDL or VHDL warning at cortexm0ds_logic.sv(1133): object \"L5i2z4\" assigned a value but never read" { } { { "behavioural/cortexm0ds_logic.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/cortexm0ds_logic.sv" 1133 0 0 } } } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600942723553 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic"}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ahb_interconnect arm_soc:soc_inst\|ahb_interconnect:interconnect_1 " "Elaborating entity \"ahb_interconnect\" for hierarchy \"arm_soc:soc_inst\|ahb_interconnect:interconnect_1\"" { } { { "behavioural/arm_soc.sv" "interconnect_1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 68 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942723559 ""}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 3 ahb_interconnect.sv(39) " "Verilog HDL assignment warning at ahb_interconnect.sv(39): truncated value with size 32 to match size of target (3)" { } { { "behavioural/ahb_interconnect.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv" 39 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942723561 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 3 ahb_interconnect.sv(41) " "Verilog HDL assignment warning at ahb_interconnect.sv(41): truncated value with size 32 to match size of target (3)" { } { { "behavioural/ahb_interconnect.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv" 41 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942723561 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 3 ahb_interconnect.sv(43) " "Verilog HDL assignment warning at ahb_interconnect.sv(43): truncated value with size 32 to match size of target (3)" { } { { "behavioural/ahb_interconnect.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv" 43 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942723561 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1"}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ahb_ram arm_soc:soc_inst\|ahb_ram:ram_1 " "Elaborating entity \"ahb_ram\" for hierarchy \"arm_soc:soc_inst\|ahb_ram:ram_1\"" { } { { "behavioural/arm_soc.sv" "ram_1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 79 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942723564 ""}
+{ "Warning" "WVRFX_VERI_2111_UNCONVERTED" "199 0 4095 ahb_ram.sv(69) " "Verilog HDL warning at ahb_ram.sv(69): number of words (199) in memory file does not match the number of elements in the address range \[0:4095\]" { } { { "behavioural/ahb_ram.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_ram.sv" 69 0 0 } } } 0 10850 "Verilog HDL warning at %4!s!: number of words (%1!d!) in memory file does not match the number of elements in the address range \[%2!d!:%3!d!\]" 0 0 "Analysis & Synthesis" 0 -1 1600942723596 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_ram:ram_1"}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ahb_switches arm_soc:soc_inst\|ahb_switches:switches_1 " "Elaborating entity \"ahb_switches\" for hierarchy \"arm_soc:soc_inst\|ahb_switches:switches_1\"" { } { { "behavioural/arm_soc.sv" "switches_1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 89 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942723981 ""}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ahb_pixel_memory arm_soc:soc_inst\|ahb_pixel_memory:pix1 " "Elaborating entity \"ahb_pixel_memory\" for hierarchy \"arm_soc:soc_inst\|ahb_pixel_memory:pix1\"" { } { { "behavioural/arm_soc.sv" "pix1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 95 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942723984 ""}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "read_enable ahb_pixel_memory.sv(62) " "Verilog HDL or VHDL warning at ahb_pixel_memory.sv(62): object \"read_enable\" assigned a value but never read" { } { { "behavioural/ahb_pixel_memory.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv" 62 0 0 } } } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600942724116 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 ahb_pixel_memory.sv(94) " "Verilog HDL assignment warning at ahb_pixel_memory.sv(94): truncated value with size 32 to match size of target (1)" { } { { "behavioural/ahb_pixel_memory.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv" 94 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942724127 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 19 ahb_pixel_memory.sv(98) " "Verilog HDL assignment warning at ahb_pixel_memory.sv(98): truncated value with size 32 to match size of target (19)" { } { { "behavioural/ahb_pixel_memory.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv" 98 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942724128 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1"}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "razzle razzle:raz_inst " "Elaborating entity \"razzle\" for hierarchy \"razzle:raz_inst\"" { } { { "behavioural/de1_soc_wrapper.sv" "raz_inst" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 49 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942724315 ""}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 8 razzle.sv(34) " "Verilog HDL assignment warning at razzle.sv(34): truncated value with size 32 to match size of target (8)" { } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 34 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942724317 "|de1_soc_wrapper|razzle:raz_inst"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 8 razzle.sv(35) " "Verilog HDL assignment warning at razzle.sv(35): truncated value with size 32 to match size of target (8)" { } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 35 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942724317 "|de1_soc_wrapper|razzle:raz_inst"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 8 razzle.sv(36) " "Verilog HDL assignment warning at razzle.sv(36): truncated value with size 32 to match size of target (8)" { } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 36 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942724317 "|de1_soc_wrapper|razzle:raz_inst"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "10 1 razzle.sv(43) " "Verilog HDL assignment warning at razzle.sv(43): truncated value with size 10 to match size of target (1)" { } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 43 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942724317 "|de1_soc_wrapper|razzle:raz_inst"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "11 10 razzle.sv(55) " "Verilog HDL assignment warning at razzle.sv(55): truncated value with size 11 to match size of target (10)" { } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 55 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942724317 "|de1_soc_wrapper|razzle:raz_inst"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "11 9 razzle.sv(56) " "Verilog HDL assignment warning at razzle.sv(56): truncated value with size 11 to match size of target (9)" { } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 56 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942724317 "|de1_soc_wrapper|razzle:raz_inst"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 11 razzle.sv(95) " "Verilog HDL assignment warning at razzle.sv(95): truncated value with size 32 to match size of target (11)" { } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 95 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942724317 "|de1_soc_wrapper|razzle:raz_inst"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 11 razzle.sv(112) " "Verilog HDL assignment warning at razzle.sv(112): truncated value with size 32 to match size of target (11)" { } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 112 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942724317 "|de1_soc_wrapper|razzle:raz_inst"}
+{ "Info" "IOPT_INFERENCING_SUMMARY" "2 " "Inferred 2 megafunctions from design logic" { { "Info" "IINFER_ALTSYNCRAM_INFERRED" "arm_soc:soc_inst\|ahb_pixel_memory:pix1\|memory_rtl_0 " "Inferred altsyncram megafunction from the following design logic: \"arm_soc:soc_inst\|ahb_pixel_memory:pix1\|memory_rtl_0\" " { { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OPERATION_MODE DUAL_PORT " "Parameter OPERATION_MODE set to DUAL_PORT" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTH_A 1 " "Parameter WIDTH_A set to 1" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTHAD_A 19 " "Parameter WIDTHAD_A set to 19" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "NUMWORDS_A 307200 " "Parameter NUMWORDS_A set to 307200" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTH_B 1 " "Parameter WIDTH_B set to 1" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTHAD_B 19 " "Parameter WIDTHAD_B set to 19" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "NUMWORDS_B 307200 " "Parameter NUMWORDS_B set to 307200" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_ACLR_A NONE " "Parameter ADDRESS_ACLR_A set to NONE" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OUTDATA_REG_B UNREGISTERED " "Parameter OUTDATA_REG_B set to UNREGISTERED" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_ACLR_B NONE " "Parameter ADDRESS_ACLR_B set to NONE" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OUTDATA_ACLR_B NONE " "Parameter OUTDATA_ACLR_B set to NONE" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_REG_B CLOCK0 " "Parameter ADDRESS_REG_B set to CLOCK0" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "INDATA_ACLR_A NONE " "Parameter INDATA_ACLR_A set to NONE" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WRCONTROL_ACLR_A NONE " "Parameter WRCONTROL_ACLR_A set to NONE" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "READ_DURING_WRITE_MODE_MIXED_PORTS OLD_DATA " "Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} } { } 0 276029 "Inferred altsyncram megafunction from the following design logic: \"%1!s!\" " 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "IINFER_ALTSYNCRAM_INFERRED" "arm_soc:soc_inst\|ahb_ram:ram_1\|memory_rtl_0 " "Inferred altsyncram megafunction from the following design logic: \"arm_soc:soc_inst\|ahb_ram:ram_1\|memory_rtl_0\" " { { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OPERATION_MODE DUAL_PORT " "Parameter OPERATION_MODE set to DUAL_PORT" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTH_A 32 " "Parameter WIDTH_A set to 32" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTHAD_A 12 " "Parameter WIDTHAD_A set to 12" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "NUMWORDS_A 4096 " "Parameter NUMWORDS_A set to 4096" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTH_B 32 " "Parameter WIDTH_B set to 32" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTHAD_B 12 " "Parameter WIDTHAD_B set to 12" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "NUMWORDS_B 4096 " "Parameter NUMWORDS_B set to 4096" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_ACLR_A NONE " "Parameter ADDRESS_ACLR_A set to NONE" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OUTDATA_REG_B UNREGISTERED " "Parameter OUTDATA_REG_B set to UNREGISTERED" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_ACLR_B NONE " "Parameter ADDRESS_ACLR_B set to NONE" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OUTDATA_ACLR_B NONE " "Parameter OUTDATA_ACLR_B set to NONE" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_REG_B CLOCK0 " "Parameter ADDRESS_REG_B set to CLOCK0" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "INDATA_ACLR_A NONE " "Parameter INDATA_ACLR_A set to NONE" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WRCONTROL_ACLR_A NONE " "Parameter WRCONTROL_ACLR_A set to NONE" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "INIT_FILE db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif " "Parameter INIT_FILE set to db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "READ_DURING_WRITE_MODE_MIXED_PORTS OLD_DATA " "Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1600942728516 ""} } { } 0 276029 "Inferred altsyncram megafunction from the following design logic: \"%1!s!\" " 0 0 "Design Software" 0 -1 1600942728516 ""} } { } 0 19000 "Inferred %1!d! megafunctions from design logic" 0 0 "Analysis & Synthesis" 0 -1 1600942728516 ""}
+{ "Info" "ISGN_ELABORATION_HEADER" "arm_soc:soc_inst\|ahb_pixel_memory:pix1\|altsyncram:memory_rtl_0 " "Elaborated megafunction instantiation \"arm_soc:soc_inst\|ahb_pixel_memory:pix1\|altsyncram:memory_rtl_0\"" { } { } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942728702 ""}
+{ "Info" "ISGN_MEGAFN_PARAM_TOP" "arm_soc:soc_inst\|ahb_pixel_memory:pix1\|altsyncram:memory_rtl_0 " "Instantiated megafunction \"arm_soc:soc_inst\|ahb_pixel_memory:pix1\|altsyncram:memory_rtl_0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "OPERATION_MODE DUAL_PORT " "Parameter \"OPERATION_MODE\" = \"DUAL_PORT\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942728702 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTH_A 1 " "Parameter \"WIDTH_A\" = \"1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942728702 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTHAD_A 19 " "Parameter \"WIDTHAD_A\" = \"19\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942728702 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "NUMWORDS_A 307200 " "Parameter \"NUMWORDS_A\" = \"307200\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942728702 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTH_B 1 " "Parameter \"WIDTH_B\" = \"1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942728702 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTHAD_B 19 " "Parameter \"WIDTHAD_B\" = \"19\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942728702 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "NUMWORDS_B 307200 " "Parameter \"NUMWORDS_B\" = \"307200\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942728702 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_ACLR_A NONE " "Parameter \"ADDRESS_ACLR_A\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942728702 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "OUTDATA_REG_B UNREGISTERED " "Parameter \"OUTDATA_REG_B\" = \"UNREGISTERED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942728702 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_ACLR_B NONE " "Parameter \"ADDRESS_ACLR_B\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942728702 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "OUTDATA_ACLR_B NONE " "Parameter \"OUTDATA_ACLR_B\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942728702 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_REG_B CLOCK0 " "Parameter \"ADDRESS_REG_B\" = \"CLOCK0\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942728702 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INDATA_ACLR_A NONE " "Parameter \"INDATA_ACLR_A\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942728702 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WRCONTROL_ACLR_A NONE " "Parameter \"WRCONTROL_ACLR_A\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942728702 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "READ_DURING_WRITE_MODE_MIXED_PORTS OLD_DATA " "Parameter \"READ_DURING_WRITE_MODE_MIXED_PORTS\" = \"OLD_DATA\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942728702 ""} } { } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Analysis & Synthesis" 0 -1 1600942728702 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_efn1.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/altsyncram_efn1.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_efn1 " "Found entity 1: altsyncram_efn1" { } { { "db/altsyncram_efn1.tdf" "" { Text "/home/ks6n19/Documents/project/db/altsyncram_efn1.tdf" 32 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942728783 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942728783 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/decode_3na.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/decode_3na.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 decode_3na " "Found entity 1: decode_3na" { } { { "db/decode_3na.tdf" "" { Text "/home/ks6n19/Documents/project/db/decode_3na.tdf" 23 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942728889 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942728889 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/mux_chb.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/mux_chb.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 mux_chb " "Found entity 1: mux_chb" { } { { "db/mux_chb.tdf" "" { Text "/home/ks6n19/Documents/project/db/mux_chb.tdf" 23 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942728971 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942728971 ""}
+{ "Info" "ISGN_ELABORATION_HEADER" "arm_soc:soc_inst\|ahb_ram:ram_1\|altsyncram:memory_rtl_0 " "Elaborated megafunction instantiation \"arm_soc:soc_inst\|ahb_ram:ram_1\|altsyncram:memory_rtl_0\"" { } { } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942729007 ""}
+{ "Info" "ISGN_MEGAFN_PARAM_TOP" "arm_soc:soc_inst\|ahb_ram:ram_1\|altsyncram:memory_rtl_0 " "Instantiated megafunction \"arm_soc:soc_inst\|ahb_ram:ram_1\|altsyncram:memory_rtl_0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "OPERATION_MODE DUAL_PORT " "Parameter \"OPERATION_MODE\" = \"DUAL_PORT\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942729007 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTH_A 32 " "Parameter \"WIDTH_A\" = \"32\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942729007 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTHAD_A 12 " "Parameter \"WIDTHAD_A\" = \"12\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942729007 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "NUMWORDS_A 4096 " "Parameter \"NUMWORDS_A\" = \"4096\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942729007 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTH_B 32 " "Parameter \"WIDTH_B\" = \"32\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942729007 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTHAD_B 12 " "Parameter \"WIDTHAD_B\" = \"12\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942729007 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "NUMWORDS_B 4096 " "Parameter \"NUMWORDS_B\" = \"4096\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942729007 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_ACLR_A NONE " "Parameter \"ADDRESS_ACLR_A\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942729007 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "OUTDATA_REG_B UNREGISTERED " "Parameter \"OUTDATA_REG_B\" = \"UNREGISTERED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942729007 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_ACLR_B NONE " "Parameter \"ADDRESS_ACLR_B\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942729007 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "OUTDATA_ACLR_B NONE " "Parameter \"OUTDATA_ACLR_B\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942729007 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_REG_B CLOCK0 " "Parameter \"ADDRESS_REG_B\" = \"CLOCK0\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942729007 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INDATA_ACLR_A NONE " "Parameter \"INDATA_ACLR_A\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942729007 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WRCONTROL_ACLR_A NONE " "Parameter \"WRCONTROL_ACLR_A\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942729007 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INIT_FILE db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif " "Parameter \"INIT_FILE\" = \"db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942729007 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "READ_DURING_WRITE_MODE_MIXED_PORTS OLD_DATA " "Parameter \"READ_DURING_WRITE_MODE_MIXED_PORTS\" = \"OLD_DATA\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1600942729007 ""} } { } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Analysis & Synthesis" 0 -1 1600942729007 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_nms1.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/altsyncram_nms1.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_nms1 " "Found entity 1: altsyncram_nms1" { } { { "db/altsyncram_nms1.tdf" "" { Text "/home/ks6n19/Documents/project/db/altsyncram_nms1.tdf" 28 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942729084 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942729084 ""}
+{ "Warning" "WCDB_CDB_RAM_MIF_CONTAIN_DONT_CARE" "/home/ks6n19/Documents/project/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif " "Memory Initialization File or Hexadecimal (Intel-Format) File \"/home/ks6n19/Documents/project/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif\" contains \"don't care\" values -- overwriting them with 0s" { } { { "altsyncram.tdf" "" { Text "/srv/intelFPGA/16.1/quartus/libraries/megafunctions/altsyncram.tdf" 792 4 0 } } } 0 127007 "Memory Initialization File or Hexadecimal (Intel-Format) File \"%1!s!\" contains \"don't care\" values -- overwriting them with 0s" 0 0 "Analysis & Synthesis" 0 -1 1600942729114 ""}
+{ "Warning" "WCDB_CDB_RAM_MIF_CONTAIN_DONT_CARE" "/home/ks6n19/Documents/project/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif " "Memory Initialization File or Hexadecimal (Intel-Format) File \"/home/ks6n19/Documents/project/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif\" contains \"don't care\" values -- overwriting them with 0s" { } { { "altsyncram.tdf" "" { Text "/srv/intelFPGA/16.1/quartus/libraries/megafunctions/altsyncram.tdf" 792 4 0 } } } 0 127007 "Memory Initialization File or Hexadecimal (Intel-Format) File \"%1!s!\" contains \"don't care\" values -- overwriting them with 0s" 0 0 "Analysis & Synthesis" 0 -1 1600942729118 ""}
+{ "Warning" "WSGN_CONNECTIVITY_WARNINGS" "1 " "1 hierarchies have connectivity warnings - see the Connectivity Checks report folder" { } { } 0 12241 "%1!d! hierarchies have connectivity warnings - see the Connectivity Checks report folder" 0 0 "Analysis & Synthesis" 0 -1 1600942729551 ""}
+{ "Warning" "WMLS_MLS_STUCK_PIN_HDR" "" "Output pins are stuck at VCC or GND" { { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[0\] GND " "Pin \"LEDR\[0\]\" is stuck at GND" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|LEDR[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[1\] GND " "Pin \"LEDR\[1\]\" is stuck at GND" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|LEDR[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[2\] GND " "Pin \"LEDR\[2\]\" is stuck at GND" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|LEDR[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[3\] GND " "Pin \"LEDR\[3\]\" is stuck at GND" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|LEDR[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[4\] GND " "Pin \"LEDR\[4\]\" is stuck at GND" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|LEDR[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[5\] GND " "Pin \"LEDR\[5\]\" is stuck at GND" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|LEDR[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[6\] GND " "Pin \"LEDR\[6\]\" is stuck at GND" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|LEDR[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[7\] GND " "Pin \"LEDR\[7\]\" is stuck at GND" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|LEDR[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[8\] GND " "Pin \"LEDR\[8\]\" is stuck at GND" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|LEDR[8]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[9\] GND " "Pin \"LEDR\[9\]\" is stuck at GND" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|LEDR[9]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX0\[0\] VCC " "Pin \"HEX0\[0\]\" is stuck at VCC" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 16 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX0[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX0\[1\] VCC " "Pin \"HEX0\[1\]\" is stuck at VCC" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 16 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX0[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX0\[5\] VCC " "Pin \"HEX0\[5\]\" is stuck at VCC" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 16 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX0[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[1\] VCC " "Pin \"HEX1\[1\]\" is stuck at VCC" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX1[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[2\] VCC " "Pin \"HEX1\[2\]\" is stuck at VCC" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX1[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[3\] VCC " "Pin \"HEX1\[3\]\" is stuck at VCC" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX1[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[4\] VCC " "Pin \"HEX1\[4\]\" is stuck at VCC" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX1[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[5\] VCC " "Pin \"HEX1\[5\]\" is stuck at VCC" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX1[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[6\] VCC " "Pin \"HEX1\[6\]\" is stuck at VCC" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX1[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[0\] VCC " "Pin \"HEX2\[0\]\" is stuck at VCC" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX2[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[1\] VCC " "Pin \"HEX2\[1\]\" is stuck at VCC" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX2[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[2\] VCC " "Pin \"HEX2\[2\]\" is stuck at VCC" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX2[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[3\] VCC " "Pin \"HEX2\[3\]\" is stuck at VCC" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX2[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[5\] VCC " "Pin \"HEX2\[5\]\" is stuck at VCC" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX2[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[0\] VCC " "Pin \"HEX3\[0\]\" is stuck at VCC" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 19 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX3[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[1\] VCC " "Pin \"HEX3\[1\]\" is stuck at VCC" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 19 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX3[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[2\] VCC " "Pin \"HEX3\[2\]\" is stuck at VCC" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 19 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX3[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[6\] VCC " "Pin \"HEX3\[6\]\" is stuck at VCC" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 19 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|HEX3[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[0\] GND " "Pin \"VGA_G\[0\]\" is stuck at GND" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|VGA_G[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[1\] GND " "Pin \"VGA_G\[1\]\" is stuck at GND" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|VGA_G[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[2\] GND " "Pin \"VGA_G\[2\]\" is stuck at GND" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|VGA_G[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[3\] GND " "Pin \"VGA_G\[3\]\" is stuck at GND" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|VGA_G[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[4\] GND " "Pin \"VGA_G\[4\]\" is stuck at GND" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|VGA_G[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[5\] GND " "Pin \"VGA_G\[5\]\" is stuck at GND" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|VGA_G[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[6\] GND " "Pin \"VGA_G\[6\]\" is stuck at GND" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|VGA_G[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[7\] GND " "Pin \"VGA_G\[7\]\" is stuck at GND" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|VGA_G[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[0\] GND " "Pin \"VGA_B\[0\]\" is stuck at GND" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|VGA_B[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[1\] GND " "Pin \"VGA_B\[1\]\" is stuck at GND" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|VGA_B[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[2\] GND " "Pin \"VGA_B\[2\]\" is stuck at GND" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|VGA_B[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[3\] GND " "Pin \"VGA_B\[3\]\" is stuck at GND" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|VGA_B[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[4\] GND " "Pin \"VGA_B\[4\]\" is stuck at GND" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|VGA_B[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[5\] GND " "Pin \"VGA_B\[5\]\" is stuck at GND" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|VGA_B[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[6\] GND " "Pin \"VGA_B\[6\]\" is stuck at GND" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|VGA_B[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[7\] GND " "Pin \"VGA_B\[7\]\" is stuck at GND" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1600942732803 "|de1_soc_wrapper|VGA_B[7]"} } { } 0 13024 "Output pins are stuck at VCC or GND" 0 0 "Analysis & Synthesis" 0 -1 1600942732803 ""}
+{ "Info" "ISUTIL_TIMING_DRIVEN_SYNTHESIS_RUNNING" "" "Timing-Driven Synthesis is running" { } { } 0 286030 "Timing-Driven Synthesis is running" 0 0 "Analysis & Synthesis" 0 -1 1600942733024 ""}
+{ "Info" "ISCL_SCL_LOST_FANOUT_MSG_HDR" "17 " "17 registers lost all their fanouts during netlist optimizations." { } { } 0 17049 "%1!d! registers lost all their fanouts during netlist optimizations." 0 0 "Analysis & Synthesis" 0 -1 1600942739907 ""}
+{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "/home/ks6n19/Documents/project/output_files/de1_soc_wrapper.map.smsg " "Generated suppressed messages file /home/ks6n19/Documents/project/output_files/de1_soc_wrapper.map.smsg" { } { } 0 144001 "Generated suppressed messages file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942740055 ""}
+{ "Info" "IBPM_HARD_BLOCK_PARTITION_CREATED" "hard_block:auto_generated_inst " "Generating hard_block partition \"hard_block:auto_generated_inst\"" { { "Info" "IBPM_HARD_BLOCK_PARTITION_NODE" "0 0 0 0 0 " "Adding 0 node(s), including 0 DDIO, 0 PLL, 0 transceiver and 0 LCELL" { } { } 0 16011 "Adding %1!d! node(s), including %2!d! DDIO, %3!d! PLL, %4!d! transceiver and %5!d! LCELL" 0 0 "Design Software" 0 -1 1600942740418 ""} } { } 0 16010 "Generating hard_block partition \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942740418 ""}
+{ "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN_HDR" "1 " "Design contains 1 input pin(s) that do not drive logic" { { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "KEY\[3\] " "No output dependent on input pin \"KEY\[3\]\"" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 13 0 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Design Software" 0 -1 1600942740767 "|de1_soc_wrapper|KEY[3]"} } { } 0 21074 "Design contains %1!d! input pin(s) that do not drive logic" 0 0 "Analysis & Synthesis" 0 -1 1600942740767 ""}
+{ "Info" "ICUT_CUT_TM_SUMMARY" "3988 " "Implemented 3988 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "15 " "Implemented 15 input pins" { } { } 0 21058 "Implemented %1!d! input pins" 0 0 "Design Software" 0 -1 1600942740780 ""} { "Info" "ICUT_CUT_TM_OPINS" "66 " "Implemented 66 output pins" { } { } 0 21059 "Implemented %1!d! output pins" 0 0 "Design Software" 0 -1 1600942740780 ""} { "Info" "ICUT_CUT_TM_LCELLS" "3837 " "Implemented 3837 logic cells" { } { } 0 21061 "Implemented %1!d! logic cells" 0 0 "Design Software" 0 -1 1600942740780 ""} { "Info" "ICUT_CUT_TM_RAMS" "70 " "Implemented 70 RAM segments" { } { } 0 21064 "Implemented %1!d! RAM segments" 0 0 "Design Software" 0 -1 1600942740780 ""} } { } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Analysis & Synthesis" 0 -1 1600942740780 ""}
+{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 79 s Quartus Prime " "Quartus Prime Analysis & Synthesis was successful. 0 errors, 79 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1276 " "Peak virtual memory: 1276 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1600942740817 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Sep 24 11:19:00 2020 " "Processing ended: Thu Sep 24 11:19:00 2020" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1600942740817 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:27 " "Elapsed time: 00:00:27" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1600942740817 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:42 " "Total CPU time (on all processors): 00:00:42" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1600942740817 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942740817 ""}
diff --git a/db/de1_soc_wrapper.map.rdb b/db/de1_soc_wrapper.map.rdb
new file mode 100644
index 0000000000000000000000000000000000000000..861499598c7df1a139451bcf9091d5d5a9077d25
Binary files /dev/null and b/db/de1_soc_wrapper.map.rdb differ
diff --git a/db/de1_soc_wrapper.map_bb.cdb b/db/de1_soc_wrapper.map_bb.cdb
new file mode 100644
index 0000000000000000000000000000000000000000..780ea26913c633a17f93a90d36711af592bc09f5
Binary files /dev/null and b/db/de1_soc_wrapper.map_bb.cdb differ
diff --git a/db/de1_soc_wrapper.map_bb.hdb b/db/de1_soc_wrapper.map_bb.hdb
new file mode 100644
index 0000000000000000000000000000000000000000..04da0d4df06e7a80ebf09468e062fba53e49ec5e
Binary files /dev/null and b/db/de1_soc_wrapper.map_bb.hdb differ
diff --git a/db/de1_soc_wrapper.npp.qmsg b/db/de1_soc_wrapper.npp.qmsg
new file mode 100644
index 0000000000000000000000000000000000000000..abd37abca83c9895e60f86fa8efed2106d44e72a
--- /dev/null
+++ b/db/de1_soc_wrapper.npp.qmsg
@@ -0,0 +1,5 @@
+{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1600945782458 ""}
+{ "Info" "IQEXE_START_BANNER_PRODUCT" "Netlist Viewers Preprocess Quartus Prime " "Running Quartus Prime Netlist Viewers Preprocess" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition " "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1600945782461 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Sep 24 12:09:42 2020 " "Processing started: Thu Sep 24 12:09:42 2020" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1600945782461 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Netlist Viewers Preprocess" 0 -1 1600945782461 ""}
+{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_npp project24_09 -c de1_soc_wrapper --netlist_type=sgate " "Command: quartus_npp project24_09 -c de1_soc_wrapper --netlist_type=sgate" { } { } 0 0 "Command: %1!s!" 0 0 "Netlist Viewers Preprocess" 0 -1 1600945782461 ""}
+{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." { } { } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Netlist Viewers Preprocess" 0 -1 1600945782744 ""}
+{ "Info" "IQEXE_ERROR_COUNT" "Netlist Viewers Preprocess 0 s 1 Quartus Prime " "Quartus Prime Netlist Viewers Preprocess was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "917 " "Peak virtual memory: 917 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1600945783239 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Sep 24 12:09:43 2020 " "Processing ended: Thu Sep 24 12:09:43 2020" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1600945783239 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Elapsed time: 00:00:01" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1600945783239 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Total CPU time (on all processors): 00:00:01" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1600945783239 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Netlist Viewers Preprocess" 0 -1 1600945783239 ""}
diff --git a/db/de1_soc_wrapper.pre_map.hdb b/db/de1_soc_wrapper.pre_map.hdb
new file mode 100644
index 0000000000000000000000000000000000000000..497d65efb9f7ce1863e7b3e2970ab1ea4b05bbb7
Binary files /dev/null and b/db/de1_soc_wrapper.pre_map.hdb differ
diff --git a/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif b/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif
new file mode 100644
index 0000000000000000000000000000000000000000..f0dc0cd3b887e2515682fa6fa2569ae197722985
--- /dev/null
+++ b/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif
@@ -0,0 +1,4107 @@
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+ 10 : 00000000000000000000000000000000;
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+ 7 : 00000000000000000000000000000000;
+ 6 : 00000000000000000000000011111101;
+ 5 : 00000000000000000000000011111001;
+ 4 : 00000000000000000000000011110101;
+ 3 : 00000000000000000000000011110001;
+ 2 : 00000000000000000000000011101101;
+ 1 : 00000000000000000000000011000001;
+ 0 : 00000000000000000100000000000000;
+END;
diff --git a/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl_old.mif b/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl_old.mif
new file mode 100644
index 0000000000000000000000000000000000000000..f0dc0cd3b887e2515682fa6fa2569ae197722985
--- /dev/null
+++ b/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl_old.mif
@@ -0,0 +1,4107 @@
+-- begin_signature
+-- ahb_ram
+-- end_signature
+WIDTH=32;
+DEPTH=4096;
+
+ADDRESS_RADIX=UNS;
+DATA_RADIX=BIN;
+
+CONTENT BEGIN
+ 4095 : XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
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+ 4093 : XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
+ 4092 : XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
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+ 4088 : XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
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+ 4085 : XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
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+ 4083 : XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
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+ 3858 : XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
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diff --git a/db/de1_soc_wrapper.root_partition.map.reg_db.cdb b/db/de1_soc_wrapper.root_partition.map.reg_db.cdb
new file mode 100644
index 0000000000000000000000000000000000000000..2dff706b095b2086ec73ea662ea1db9c8d59e5ad
Binary files /dev/null and b/db/de1_soc_wrapper.root_partition.map.reg_db.cdb differ
diff --git a/db/de1_soc_wrapper.routing.rdb b/db/de1_soc_wrapper.routing.rdb
new file mode 100644
index 0000000000000000000000000000000000000000..2fb090c1e6356304c23329e2d45a55e2575303ff
Binary files /dev/null and b/db/de1_soc_wrapper.routing.rdb differ
diff --git a/db/de1_soc_wrapper.rtlv.hdb b/db/de1_soc_wrapper.rtlv.hdb
new file mode 100644
index 0000000000000000000000000000000000000000..cb77e2ba359eb182b995d88927c0ad77a71bd466
Binary files /dev/null and b/db/de1_soc_wrapper.rtlv.hdb differ
diff --git a/db/de1_soc_wrapper.rtlv_sg.cdb b/db/de1_soc_wrapper.rtlv_sg.cdb
new file mode 100644
index 0000000000000000000000000000000000000000..3ea3326838fad6faac6e72942969a8c4017ea8fe
Binary files /dev/null and b/db/de1_soc_wrapper.rtlv_sg.cdb differ
diff --git a/db/de1_soc_wrapper.rtlv_sg_swap.cdb b/db/de1_soc_wrapper.rtlv_sg_swap.cdb
new file mode 100644
index 0000000000000000000000000000000000000000..7a0019dd27b49f120524f7d629f7449bed39fb68
Binary files /dev/null and b/db/de1_soc_wrapper.rtlv_sg_swap.cdb differ
diff --git a/db/de1_soc_wrapper.sgate.nvd b/db/de1_soc_wrapper.sgate.nvd
new file mode 100644
index 0000000000000000000000000000000000000000..97eede71b6145f0052cde2dd1c335e39a1fe5f26
Binary files /dev/null and b/db/de1_soc_wrapper.sgate.nvd differ
diff --git a/db/de1_soc_wrapper.sgate_sm.nvd b/db/de1_soc_wrapper.sgate_sm.nvd
new file mode 100644
index 0000000000000000000000000000000000000000..88eaa3513d06ae427ecdd8a655ebb01616d8e6a5
Binary files /dev/null and b/db/de1_soc_wrapper.sgate_sm.nvd differ
diff --git a/db/de1_soc_wrapper.sld_design_entry_dsc.sci b/db/de1_soc_wrapper.sld_design_entry_dsc.sci
new file mode 100644
index 0000000000000000000000000000000000000000..3dd3ad2c2539a24d5e1c82f9f21c0ec357f60366
Binary files /dev/null and b/db/de1_soc_wrapper.sld_design_entry_dsc.sci differ
diff --git a/db/de1_soc_wrapper.smart_action.txt b/db/de1_soc_wrapper.smart_action.txt
new file mode 100644
index 0000000000000000000000000000000000000000..c8e8a135c9291129f28f1fcaa018fa29a7cc96fe
--- /dev/null
+++ b/db/de1_soc_wrapper.smart_action.txt
@@ -0,0 +1 @@
+DONE
diff --git a/db/de1_soc_wrapper.sta.qmsg b/db/de1_soc_wrapper.sta.qmsg
new file mode 100644
index 0000000000000000000000000000000000000000..6b9ffb0d9daee368ea2d641bbffc5b2fc5cce45d
--- /dev/null
+++ b/db/de1_soc_wrapper.sta.qmsg
@@ -0,0 +1,52 @@
+{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1600942879279 ""}
+{ "Info" "IQEXE_START_BANNER_PRODUCT" "TimeQuest Timing Analyzer Quartus Prime " "Running Quartus Prime TimeQuest Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition " "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1600942879281 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Sep 24 11:21:18 2020 " "Processing started: Thu Sep 24 11:21:18 2020" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1600942879281 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942879281 ""}
+{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sta project24_09 -c de1_soc_wrapper " "Command: quartus_sta project24_09 -c de1_soc_wrapper" { } { } 0 0 "Command: %1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942879281 ""}
+{ "Info" "0" "" "qsta_default_script.tcl version: #1" { } { } 0 0 "qsta_default_script.tcl version: #1" 0 0 "TimeQuest Timing Analyzer" 0 0 1600942879574 ""}
+{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." { } { } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942880404 ""}
+{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "16 24 " "Parallel compilation is enabled and will use 16 of the 24 processors detected" { } { } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942880405 ""}
+{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942880458 ""}
+{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942880458 ""}
+{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "de1_soc_wrapper.sdc " "Synopsys Design Constraints File file not found: 'de1_soc_wrapper.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." { } { } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942881460 ""}
+{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "base clocks \"derive_clocks -period 1.0\" " "No user constrained base clocks found in the design. Calling \"derive_clocks -period 1.0\"" { } { } 0 332142 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942881461 ""}
+{ "Info" "ISTA_DERIVE_CLOCKS_INFO" "Deriving Clocks " "Deriving Clocks" { { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name CLOCK_50 CLOCK_50 " "create_clock -period 1.000 -name CLOCK_50 CLOCK_50" { } { } 0 332105 "%1!s!" 0 0 "Design Software" 0 -1 1600942881486 ""} } { } 0 332105 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942881486 ""}
+{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" { } { } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942881512 ""}
+{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942881512 ""}
+{ "Info" "0" "" "Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" { } { } 0 0 "Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" 0 0 "TimeQuest Timing Analyzer" 0 0 1600942881514 ""}
+{ "Info" "0" "" "Analyzing Slow 1100mV 85C Model" { } { } 0 0 "Analyzing Slow 1100mV 85C Model" 0 0 "TimeQuest Timing Analyzer" 0 0 1600942881533 ""}
+{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." { } { } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Design Software" 0 -1 1600942882580 ""} } { } 1 332148 "Timing requirements not met" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942882580 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "setup -12.117 " "Worst-case setup slack is -12.117" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942882589 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942882589 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -12.117 -23738.417 CLOCK_50 " " -12.117 -23738.417 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942882589 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942882589 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.360 " "Worst-case hold slack is 0.360" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942882645 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942882645 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.360 0.000 CLOCK_50 " " 0.360 0.000 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942882645 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942882645 ""}
+{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942882653 ""}
+{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942882661 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.636 " "Worst-case minimum pulse width slack is -2.636" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942882671 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942882671 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -2.636 -9178.515 CLOCK_50 " " -2.636 -9178.515 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942882671 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942882671 ""}
+{ "Info" "0" "" "Analyzing Slow 1100mV 0C Model" { } { } 0 0 "Analyzing Slow 1100mV 0C Model" 0 0 "TimeQuest Timing Analyzer" 0 0 1600942882711 ""}
+{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942882765 ""}
+{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942884841 ""}
+{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942885167 ""}
+{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." { } { } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Design Software" 0 -1 1600942885298 ""} } { } 1 332148 "Timing requirements not met" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942885298 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "setup -11.922 " "Worst-case setup slack is -11.922" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942885305 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942885305 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -11.922 -23014.909 CLOCK_50 " " -11.922 -23014.909 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942885305 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942885305 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.320 " "Worst-case hold slack is 0.320" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942885353 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942885353 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.320 0.000 CLOCK_50 " " 0.320 0.000 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942885353 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942885353 ""}
+{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942885360 ""}
+{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942885367 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.636 " "Worst-case minimum pulse width slack is -2.636" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942885377 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942885377 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -2.636 -9227.462 CLOCK_50 " " -2.636 -9227.462 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942885377 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942885377 ""}
+{ "Info" "0" "" "Analyzing Fast 1100mV 85C Model" { } { } 0 0 "Analyzing Fast 1100mV 85C Model" 0 0 "TimeQuest Timing Analyzer" 0 0 1600942885410 ""}
+{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942885618 ""}
+{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942887492 ""}
+{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942887829 ""}
+{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." { } { } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Design Software" 0 -1 1600942887874 ""} } { } 1 332148 "Timing requirements not met" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942887874 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "setup -7.015 " "Worst-case setup slack is -7.015" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942887883 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942887883 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -7.015 -13385.378 CLOCK_50 " " -7.015 -13385.378 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942887883 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942887883 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.180 " "Worst-case hold slack is 0.180" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942887933 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942887933 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.180 0.000 CLOCK_50 " " 0.180 0.000 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942887933 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942887933 ""}
+{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942887941 ""}
+{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942887948 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.636 " "Worst-case minimum pulse width slack is -2.636" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942887957 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942887957 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -2.636 -8567.649 CLOCK_50 " " -2.636 -8567.649 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942887957 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942887957 ""}
+{ "Info" "0" "" "Analyzing Fast 1100mV 0C Model" { } { } 0 0 "Analyzing Fast 1100mV 0C Model" 0 0 "TimeQuest Timing Analyzer" 0 0 1600942887993 ""}
+{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942888348 ""}
+{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." { } { } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Design Software" 0 -1 1600942888393 ""} } { } 1 332148 "Timing requirements not met" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942888393 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "setup -6.180 " "Worst-case setup slack is -6.180" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942888402 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942888402 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -6.180 -11655.282 CLOCK_50 " " -6.180 -11655.282 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942888402 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942888402 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.172 " "Worst-case hold slack is 0.172" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942888451 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942888451 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.172 0.000 CLOCK_50 " " 0.172 0.000 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942888451 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942888451 ""}
+{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942888473 ""}
+{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942888481 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.636 " "Worst-case minimum pulse width slack is -2.636" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942888491 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942888491 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -2.636 -8570.738 CLOCK_50 " " -2.636 -8570.738 CLOCK_50 " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1600942888491 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942888491 ""}
+{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "setup " "Design is not fully constrained for setup requirements" { } { } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942890628 ""}
+{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "hold " "Design is not fully constrained for hold requirements" { } { } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942890631 ""}
+{ "Info" "IQEXE_ERROR_COUNT" "TimeQuest Timing Analyzer 0 s 6 s Quartus Prime " "Quartus Prime TimeQuest Timing Analyzer was successful. 0 errors, 6 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1570 " "Peak virtual memory: 1570 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1600942890789 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Sep 24 11:21:30 2020 " "Processing ended: Thu Sep 24 11:21:30 2020" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1600942890789 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:12 " "Elapsed time: 00:00:12" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1600942890789 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:30 " "Total CPU time (on all processors): 00:00:30" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1600942890789 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1600942890789 ""}
diff --git a/db/de1_soc_wrapper.sta.rdb b/db/de1_soc_wrapper.sta.rdb
new file mode 100644
index 0000000000000000000000000000000000000000..f32b1012396bbbadf622561b1271bbea20c56056
Binary files /dev/null and b/db/de1_soc_wrapper.sta.rdb differ
diff --git a/db/de1_soc_wrapper.sta_cmp.6_slow_1100mv_85c.tdb b/db/de1_soc_wrapper.sta_cmp.6_slow_1100mv_85c.tdb
new file mode 100644
index 0000000000000000000000000000000000000000..1a4a45436cfbffccef13648b38986f2890bcce6e
Binary files /dev/null and b/db/de1_soc_wrapper.sta_cmp.6_slow_1100mv_85c.tdb differ
diff --git a/db/de1_soc_wrapper.tis_db_list.ddb b/db/de1_soc_wrapper.tis_db_list.ddb
new file mode 100644
index 0000000000000000000000000000000000000000..219c1f43aac19cadc920736f88af2158d34b9171
Binary files /dev/null and b/db/de1_soc_wrapper.tis_db_list.ddb differ
diff --git a/db/de1_soc_wrapper.tiscmp.fast_1100mv_0c.ddb b/db/de1_soc_wrapper.tiscmp.fast_1100mv_0c.ddb
new file mode 100644
index 0000000000000000000000000000000000000000..e3e2a90b5be27b34b7a49e877528c6336f57d43a
Binary files /dev/null and b/db/de1_soc_wrapper.tiscmp.fast_1100mv_0c.ddb differ
diff --git a/db/de1_soc_wrapper.tiscmp.fast_1100mv_85c.ddb b/db/de1_soc_wrapper.tiscmp.fast_1100mv_85c.ddb
new file mode 100644
index 0000000000000000000000000000000000000000..5abf09f33889a2549402979632d194f4b9290404
Binary files /dev/null and b/db/de1_soc_wrapper.tiscmp.fast_1100mv_85c.ddb differ
diff --git a/db/de1_soc_wrapper.tiscmp.slow_1100mv_0c.ddb b/db/de1_soc_wrapper.tiscmp.slow_1100mv_0c.ddb
new file mode 100644
index 0000000000000000000000000000000000000000..1c7c4265ad7e3bef73eeb02792edd2647b6f29c8
Binary files /dev/null and b/db/de1_soc_wrapper.tiscmp.slow_1100mv_0c.ddb differ
diff --git a/db/de1_soc_wrapper.tiscmp.slow_1100mv_85c.ddb b/db/de1_soc_wrapper.tiscmp.slow_1100mv_85c.ddb
new file mode 100644
index 0000000000000000000000000000000000000000..cf06cd6f21a6d78ad91b45ce2b54e3f135ae9e4f
Binary files /dev/null and b/db/de1_soc_wrapper.tiscmp.slow_1100mv_85c.ddb differ
diff --git a/db/de1_soc_wrapper.tmw_info b/db/de1_soc_wrapper.tmw_info
new file mode 100644
index 0000000000000000000000000000000000000000..01188ba7a9c5e3209cfc8524c25c8264c9976c6f
--- /dev/null
+++ b/db/de1_soc_wrapper.tmw_info
@@ -0,0 +1,7 @@
+start_full_compilation:s:00:03:02
+start_analysis_synthesis:s:00:00:28-start_full_compilation
+start_analysis_elaboration:s-start_full_compilation
+start_fitter:s:00:02:07-start_full_compilation
+start_assembler:s:00:00:11-start_full_compilation
+start_timing_analyzer:s:00:00:13-start_full_compilation
+start_eda_netlist_writer:s:00:00:03-start_full_compilation
diff --git a/db/de1_soc_wrapper.vpr.ammdb b/db/de1_soc_wrapper.vpr.ammdb
new file mode 100644
index 0000000000000000000000000000000000000000..c828a874bc0284b4dedd690030dc535d016a9d54
Binary files /dev/null and b/db/de1_soc_wrapper.vpr.ammdb differ
diff --git a/db/de1_soc_wrapper_partition_pins.json b/db/de1_soc_wrapper_partition_pins.json
index c52cc7bc6e88958e8693effb0130ebc06f91ecff..100d8fab287af52ba1d0126ca0fff63dabb310b9 100644
--- a/db/de1_soc_wrapper_partition_pins.json
+++ b/db/de1_soc_wrapper_partition_pins.json
@@ -136,11 +136,11 @@
"strict" : false
},
{
- "name" : "SW[8]",
+ "name" : "SW[0]",
"strict" : false
},
{
- "name" : "SW[0]",
+ "name" : "SW[8]",
"strict" : false
},
{
diff --git a/db/mux_chb.tdf b/db/mux_chb.tdf
new file mode 100644
index 0000000000000000000000000000000000000000..56ba4df733daf6c01f871bd6ac53bb77bce21cdc
--- /dev/null
+++ b/db/mux_chb.tdf
@@ -0,0 +1,166 @@
+--lpm_mux CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" DEVICE_FAMILY="Cyclone V" LPM_SIZE=38 LPM_WIDTH=1 LPM_WIDTHS=6 data result sel
+--VERSION_BEGIN 16.1 cbx_lpm_mux 2017:01:11:18:30:33:SJ cbx_mgl 2017:01:11:19:37:47:SJ VERSION_END
+
+
+-- Copyright (C) 2017 Intel Corporation. All rights reserved.
+-- Your use of Intel Corporation's design tools, logic functions
+-- and other software and tools, and its AMPP partner logic
+-- functions, and any output files from any of the foregoing
+-- (including device programming or simulation files), and any
+-- associated documentation or information are expressly subject
+-- to the terms and conditions of the Intel Program License
+-- Subscription Agreement, the Intel Quartus Prime License Agreement,
+-- the Intel MegaCore Function License Agreement, or other
+-- applicable license agreement, including, without limitation,
+-- that your use is for the sole purpose of programming logic
+-- devices manufactured by Intel and sold by Intel or its
+-- authorized distributors. Please refer to the applicable
+-- agreement for further details.
+
+
+
+--synthesis_resources = lut 21
+SUBDESIGN mux_chb
+(
+ data[37..0] : input;
+ result[0..0] : output;
+ sel[5..0] : input;
+)
+VARIABLE
+ l1_w0_n0_mux_dataout : WIRE;
+ l1_w0_n10_mux_dataout : WIRE;
+ l1_w0_n11_mux_dataout : WIRE;
+ l1_w0_n12_mux_dataout : WIRE;
+ l1_w0_n13_mux_dataout : WIRE;
+ l1_w0_n14_mux_dataout : WIRE;
+ l1_w0_n15_mux_dataout : WIRE;
+ l1_w0_n16_mux_dataout : WIRE;
+ l1_w0_n17_mux_dataout : WIRE;
+ l1_w0_n18_mux_dataout : WIRE;
+ l1_w0_n19_mux_dataout : WIRE;
+ l1_w0_n1_mux_dataout : WIRE;
+ l1_w0_n20_mux_dataout : WIRE;
+ l1_w0_n21_mux_dataout : WIRE;
+ l1_w0_n22_mux_dataout : WIRE;
+ l1_w0_n23_mux_dataout : WIRE;
+ l1_w0_n24_mux_dataout : WIRE;
+ l1_w0_n25_mux_dataout : WIRE;
+ l1_w0_n26_mux_dataout : WIRE;
+ l1_w0_n27_mux_dataout : WIRE;
+ l1_w0_n28_mux_dataout : WIRE;
+ l1_w0_n29_mux_dataout : WIRE;
+ l1_w0_n2_mux_dataout : WIRE;
+ l1_w0_n30_mux_dataout : WIRE;
+ l1_w0_n31_mux_dataout : WIRE;
+ l1_w0_n3_mux_dataout : WIRE;
+ l1_w0_n4_mux_dataout : WIRE;
+ l1_w0_n5_mux_dataout : WIRE;
+ l1_w0_n6_mux_dataout : WIRE;
+ l1_w0_n7_mux_dataout : WIRE;
+ l1_w0_n8_mux_dataout : WIRE;
+ l1_w0_n9_mux_dataout : WIRE;
+ l2_w0_n0_mux_dataout : WIRE;
+ l2_w0_n10_mux_dataout : WIRE;
+ l2_w0_n11_mux_dataout : WIRE;
+ l2_w0_n12_mux_dataout : WIRE;
+ l2_w0_n13_mux_dataout : WIRE;
+ l2_w0_n14_mux_dataout : WIRE;
+ l2_w0_n15_mux_dataout : WIRE;
+ l2_w0_n1_mux_dataout : WIRE;
+ l2_w0_n2_mux_dataout : WIRE;
+ l2_w0_n3_mux_dataout : WIRE;
+ l2_w0_n4_mux_dataout : WIRE;
+ l2_w0_n5_mux_dataout : WIRE;
+ l2_w0_n6_mux_dataout : WIRE;
+ l2_w0_n7_mux_dataout : WIRE;
+ l2_w0_n8_mux_dataout : WIRE;
+ l2_w0_n9_mux_dataout : WIRE;
+ l3_w0_n0_mux_dataout : WIRE;
+ l3_w0_n1_mux_dataout : WIRE;
+ l3_w0_n2_mux_dataout : WIRE;
+ l3_w0_n3_mux_dataout : WIRE;
+ l3_w0_n4_mux_dataout : WIRE;
+ l3_w0_n5_mux_dataout : WIRE;
+ l3_w0_n6_mux_dataout : WIRE;
+ l3_w0_n7_mux_dataout : WIRE;
+ l4_w0_n0_mux_dataout : WIRE;
+ l4_w0_n1_mux_dataout : WIRE;
+ l4_w0_n2_mux_dataout : WIRE;
+ l4_w0_n3_mux_dataout : WIRE;
+ l5_w0_n0_mux_dataout : WIRE;
+ l5_w0_n1_mux_dataout : WIRE;
+ l6_w0_n0_mux_dataout : WIRE;
+ data_wire[125..0] : WIRE;
+ result_wire_ext[0..0] : WIRE;
+ sel_wire[35..0] : WIRE;
+
+BEGIN
+ l1_w0_n0_mux_dataout = sel_wire[0..0] & data_wire[1..1] # !(sel_wire[0..0]) & data_wire[0..0];
+ l1_w0_n10_mux_dataout = sel_wire[0..0] & data_wire[21..21] # !(sel_wire[0..0]) & data_wire[20..20];
+ l1_w0_n11_mux_dataout = sel_wire[0..0] & data_wire[23..23] # !(sel_wire[0..0]) & data_wire[22..22];
+ l1_w0_n12_mux_dataout = sel_wire[0..0] & data_wire[25..25] # !(sel_wire[0..0]) & data_wire[24..24];
+ l1_w0_n13_mux_dataout = sel_wire[0..0] & data_wire[27..27] # !(sel_wire[0..0]) & data_wire[26..26];
+ l1_w0_n14_mux_dataout = sel_wire[0..0] & data_wire[29..29] # !(sel_wire[0..0]) & data_wire[28..28];
+ l1_w0_n15_mux_dataout = sel_wire[0..0] & data_wire[31..31] # !(sel_wire[0..0]) & data_wire[30..30];
+ l1_w0_n16_mux_dataout = sel_wire[0..0] & data_wire[33..33] # !(sel_wire[0..0]) & data_wire[32..32];
+ l1_w0_n17_mux_dataout = sel_wire[0..0] & data_wire[35..35] # !(sel_wire[0..0]) & data_wire[34..34];
+ l1_w0_n18_mux_dataout = sel_wire[0..0] & data_wire[37..37] # !(sel_wire[0..0]) & data_wire[36..36];
+ l1_w0_n19_mux_dataout = sel_wire[0..0] & data_wire[39..39] # !(sel_wire[0..0]) & data_wire[38..38];
+ l1_w0_n1_mux_dataout = sel_wire[0..0] & data_wire[3..3] # !(sel_wire[0..0]) & data_wire[2..2];
+ l1_w0_n20_mux_dataout = sel_wire[0..0] & data_wire[41..41] # !(sel_wire[0..0]) & data_wire[40..40];
+ l1_w0_n21_mux_dataout = sel_wire[0..0] & data_wire[43..43] # !(sel_wire[0..0]) & data_wire[42..42];
+ l1_w0_n22_mux_dataout = sel_wire[0..0] & data_wire[45..45] # !(sel_wire[0..0]) & data_wire[44..44];
+ l1_w0_n23_mux_dataout = sel_wire[0..0] & data_wire[47..47] # !(sel_wire[0..0]) & data_wire[46..46];
+ l1_w0_n24_mux_dataout = sel_wire[0..0] & data_wire[49..49] # !(sel_wire[0..0]) & data_wire[48..48];
+ l1_w0_n25_mux_dataout = sel_wire[0..0] & data_wire[51..51] # !(sel_wire[0..0]) & data_wire[50..50];
+ l1_w0_n26_mux_dataout = sel_wire[0..0] & data_wire[53..53] # !(sel_wire[0..0]) & data_wire[52..52];
+ l1_w0_n27_mux_dataout = sel_wire[0..0] & data_wire[55..55] # !(sel_wire[0..0]) & data_wire[54..54];
+ l1_w0_n28_mux_dataout = sel_wire[0..0] & data_wire[57..57] # !(sel_wire[0..0]) & data_wire[56..56];
+ l1_w0_n29_mux_dataout = sel_wire[0..0] & data_wire[59..59] # !(sel_wire[0..0]) & data_wire[58..58];
+ l1_w0_n2_mux_dataout = sel_wire[0..0] & data_wire[5..5] # !(sel_wire[0..0]) & data_wire[4..4];
+ l1_w0_n30_mux_dataout = sel_wire[0..0] & data_wire[61..61] # !(sel_wire[0..0]) & data_wire[60..60];
+ l1_w0_n31_mux_dataout = sel_wire[0..0] & data_wire[63..63] # !(sel_wire[0..0]) & data_wire[62..62];
+ l1_w0_n3_mux_dataout = sel_wire[0..0] & data_wire[7..7] # !(sel_wire[0..0]) & data_wire[6..6];
+ l1_w0_n4_mux_dataout = sel_wire[0..0] & data_wire[9..9] # !(sel_wire[0..0]) & data_wire[8..8];
+ l1_w0_n5_mux_dataout = sel_wire[0..0] & data_wire[11..11] # !(sel_wire[0..0]) & data_wire[10..10];
+ l1_w0_n6_mux_dataout = sel_wire[0..0] & data_wire[13..13] # !(sel_wire[0..0]) & data_wire[12..12];
+ l1_w0_n7_mux_dataout = sel_wire[0..0] & data_wire[15..15] # !(sel_wire[0..0]) & data_wire[14..14];
+ l1_w0_n8_mux_dataout = sel_wire[0..0] & data_wire[17..17] # !(sel_wire[0..0]) & data_wire[16..16];
+ l1_w0_n9_mux_dataout = sel_wire[0..0] & data_wire[19..19] # !(sel_wire[0..0]) & data_wire[18..18];
+ l2_w0_n0_mux_dataout = sel_wire[7..7] & data_wire[65..65] # !(sel_wire[7..7]) & data_wire[64..64];
+ l2_w0_n10_mux_dataout = sel_wire[7..7] & data_wire[85..85] # !(sel_wire[7..7]) & data_wire[84..84];
+ l2_w0_n11_mux_dataout = sel_wire[7..7] & data_wire[87..87] # !(sel_wire[7..7]) & data_wire[86..86];
+ l2_w0_n12_mux_dataout = sel_wire[7..7] & data_wire[89..89] # !(sel_wire[7..7]) & data_wire[88..88];
+ l2_w0_n13_mux_dataout = sel_wire[7..7] & data_wire[91..91] # !(sel_wire[7..7]) & data_wire[90..90];
+ l2_w0_n14_mux_dataout = sel_wire[7..7] & data_wire[93..93] # !(sel_wire[7..7]) & data_wire[92..92];
+ l2_w0_n15_mux_dataout = sel_wire[7..7] & data_wire[95..95] # !(sel_wire[7..7]) & data_wire[94..94];
+ l2_w0_n1_mux_dataout = sel_wire[7..7] & data_wire[67..67] # !(sel_wire[7..7]) & data_wire[66..66];
+ l2_w0_n2_mux_dataout = sel_wire[7..7] & data_wire[69..69] # !(sel_wire[7..7]) & data_wire[68..68];
+ l2_w0_n3_mux_dataout = sel_wire[7..7] & data_wire[71..71] # !(sel_wire[7..7]) & data_wire[70..70];
+ l2_w0_n4_mux_dataout = sel_wire[7..7] & data_wire[73..73] # !(sel_wire[7..7]) & data_wire[72..72];
+ l2_w0_n5_mux_dataout = sel_wire[7..7] & data_wire[75..75] # !(sel_wire[7..7]) & data_wire[74..74];
+ l2_w0_n6_mux_dataout = sel_wire[7..7] & data_wire[77..77] # !(sel_wire[7..7]) & data_wire[76..76];
+ l2_w0_n7_mux_dataout = sel_wire[7..7] & data_wire[79..79] # !(sel_wire[7..7]) & data_wire[78..78];
+ l2_w0_n8_mux_dataout = sel_wire[7..7] & data_wire[81..81] # !(sel_wire[7..7]) & data_wire[80..80];
+ l2_w0_n9_mux_dataout = sel_wire[7..7] & data_wire[83..83] # !(sel_wire[7..7]) & data_wire[82..82];
+ l3_w0_n0_mux_dataout = sel_wire[14..14] & data_wire[97..97] # !(sel_wire[14..14]) & data_wire[96..96];
+ l3_w0_n1_mux_dataout = sel_wire[14..14] & data_wire[99..99] # !(sel_wire[14..14]) & data_wire[98..98];
+ l3_w0_n2_mux_dataout = sel_wire[14..14] & data_wire[101..101] # !(sel_wire[14..14]) & data_wire[100..100];
+ l3_w0_n3_mux_dataout = sel_wire[14..14] & data_wire[103..103] # !(sel_wire[14..14]) & data_wire[102..102];
+ l3_w0_n4_mux_dataout = sel_wire[14..14] & data_wire[105..105] # !(sel_wire[14..14]) & data_wire[104..104];
+ l3_w0_n5_mux_dataout = sel_wire[14..14] & data_wire[107..107] # !(sel_wire[14..14]) & data_wire[106..106];
+ l3_w0_n6_mux_dataout = sel_wire[14..14] & data_wire[109..109] # !(sel_wire[14..14]) & data_wire[108..108];
+ l3_w0_n7_mux_dataout = sel_wire[14..14] & data_wire[111..111] # !(sel_wire[14..14]) & data_wire[110..110];
+ l4_w0_n0_mux_dataout = sel_wire[21..21] & data_wire[113..113] # !(sel_wire[21..21]) & data_wire[112..112];
+ l4_w0_n1_mux_dataout = sel_wire[21..21] & data_wire[115..115] # !(sel_wire[21..21]) & data_wire[114..114];
+ l4_w0_n2_mux_dataout = sel_wire[21..21] & data_wire[117..117] # !(sel_wire[21..21]) & data_wire[116..116];
+ l4_w0_n3_mux_dataout = sel_wire[21..21] & data_wire[119..119] # !(sel_wire[21..21]) & data_wire[118..118];
+ l5_w0_n0_mux_dataout = sel_wire[28..28] & data_wire[121..121] # !(sel_wire[28..28]) & data_wire[120..120];
+ l5_w0_n1_mux_dataout = sel_wire[28..28] & data_wire[123..123] # !(sel_wire[28..28]) & data_wire[122..122];
+ l6_w0_n0_mux_dataout = sel_wire[35..35] & data_wire[125..125] # !(sel_wire[35..35]) & data_wire[124..124];
+ data_wire[] = ( l5_w0_n1_mux_dataout, l5_w0_n0_mux_dataout, l4_w0_n3_mux_dataout, l4_w0_n2_mux_dataout, l4_w0_n1_mux_dataout, l4_w0_n0_mux_dataout, l3_w0_n7_mux_dataout, l3_w0_n6_mux_dataout, l3_w0_n5_mux_dataout, l3_w0_n4_mux_dataout, l3_w0_n3_mux_dataout, l3_w0_n2_mux_dataout, l3_w0_n1_mux_dataout, l3_w0_n0_mux_dataout, l2_w0_n15_mux_dataout, l2_w0_n14_mux_dataout, l2_w0_n13_mux_dataout, l2_w0_n12_mux_dataout, l2_w0_n11_mux_dataout, l2_w0_n10_mux_dataout, l2_w0_n9_mux_dataout, l2_w0_n8_mux_dataout, l2_w0_n7_mux_dataout, l2_w0_n6_mux_dataout, l2_w0_n5_mux_dataout, l2_w0_n4_mux_dataout, l2_w0_n3_mux_dataout, l2_w0_n2_mux_dataout, l2_w0_n1_mux_dataout, l2_w0_n0_mux_dataout, l1_w0_n31_mux_dataout, l1_w0_n30_mux_dataout, l1_w0_n29_mux_dataout, l1_w0_n28_mux_dataout, l1_w0_n27_mux_dataout, l1_w0_n26_mux_dataout, l1_w0_n25_mux_dataout, l1_w0_n24_mux_dataout, l1_w0_n23_mux_dataout, l1_w0_n22_mux_dataout, l1_w0_n21_mux_dataout, l1_w0_n20_mux_dataout, l1_w0_n19_mux_dataout, l1_w0_n18_mux_dataout, l1_w0_n17_mux_dataout, l1_w0_n16_mux_dataout, l1_w0_n15_mux_dataout, l1_w0_n14_mux_dataout, l1_w0_n13_mux_dataout, l1_w0_n12_mux_dataout, l1_w0_n11_mux_dataout, l1_w0_n10_mux_dataout, l1_w0_n9_mux_dataout, l1_w0_n8_mux_dataout, l1_w0_n7_mux_dataout, l1_w0_n6_mux_dataout, l1_w0_n5_mux_dataout, l1_w0_n4_mux_dataout, l1_w0_n3_mux_dataout, l1_w0_n2_mux_dataout, l1_w0_n1_mux_dataout, l1_w0_n0_mux_dataout, B"00000000000000000000000000", data[]);
+ result[] = result_wire_ext[];
+ result_wire_ext[] = ( l6_w0_n0_mux_dataout);
+ sel_wire[] = ( sel[5..5], B"000000", sel[4..4], B"000000", sel[3..3], B"000000", sel[2..2], B"000000", sel[1..1], B"000000", sel[0..0]);
+END;
+--VALID FILE
diff --git a/db/prev_cmp_project24_09.qmsg b/db/prev_cmp_project24_09.qmsg
new file mode 100644
index 0000000000000000000000000000000000000000..2fbaecc94eec0f25fedb847c573967d42ab03647
--- /dev/null
+++ b/db/prev_cmp_project24_09.qmsg
@@ -0,0 +1,47 @@
+{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1600942639243 ""}
+{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus Prime " "Running Quartus Prime Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition " "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1600942639246 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Sep 24 11:17:19 2020 " "Processing started: Thu Sep 24 11:17:19 2020" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1600942639246 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942639246 ""}
+{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off project24_09 -c de1_soc_wrapper " "Command: quartus_map --read_settings_files=on --write_settings_files=off project24_09 -c de1_soc_wrapper" { } { } 0 0 "Command: %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942639246 ""}
+{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." { } { } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Analysis & Synthesis" 0 -1 1600942639730 ""}
+{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "16 24 " "Parallel compilation is enabled and will use 16 of the 24 processors detected" { } { } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Analysis & Synthesis" 0 -1 1600942639730 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/razzle.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/razzle.sv" { { "Info" "ISGN_ENTITY_NAME" "1 razzle " "Found entity 1: razzle" { } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 8 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942649104 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942649104 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/ahb_interconnect.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/ahb_interconnect.sv" { { "Info" "ISGN_ENTITY_NAME" "1 ahb_interconnect " "Found entity 1: ahb_interconnect" { } { { "behavioural/ahb_interconnect.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942649107 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942649107 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/ahb_pixel_memory.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/ahb_pixel_memory.sv" { { "Info" "ISGN_ENTITY_NAME" "1 ahb_pixel_memory " "Found entity 1: ahb_pixel_memory" { } { { "behavioural/ahb_pixel_memory.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv" 23 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942649111 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942649111 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/ahb_ram.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/ahb_ram.sv" { { "Info" "ISGN_ENTITY_NAME" "1 ahb_ram " "Found entity 1: ahb_ram" { } { { "behavioural/ahb_ram.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_ram.sv" 24 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942649114 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942649114 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/ahb_switches.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/ahb_switches.sv" { { "Info" "ISGN_ENTITY_NAME" "1 ahb_switches " "Found entity 1: ahb_switches" { } { { "behavioural/ahb_switches.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_switches.sv" 32 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942649118 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942649118 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/arm_soc.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/arm_soc.sv" { { "Info" "ISGN_ENTITY_NAME" "1 arm_soc " "Found entity 1: arm_soc" { } { { "behavioural/arm_soc.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 4 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942649121 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942649121 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/CORTEXM0DS.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/CORTEXM0DS.sv" { { "Info" "ISGN_ENTITY_NAME" "1 CORTEXM0DS " "Found entity 1: CORTEXM0DS" { } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 27 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942649125 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942649125 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/cortexm0ds_logic.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/cortexm0ds_logic.sv" { { "Info" "ISGN_ENTITY_NAME" "1 cortexm0ds_logic " "Found entity 1: cortexm0ds_logic" { } { { "behavioural/cortexm0ds_logic.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/cortexm0ds_logic.sv" 27 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942649170 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942649170 ""}
+{ "Warning" "WVRFX_L3_VERI_MIXED_BLOCKING_NONBLOCKING_ASSIGNMENT" "de1_soc_wrapper.sv(64) " "Verilog HDL information at de1_soc_wrapper.sv(64): always construct contains both blocking and non-blocking assignments" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 64 0 0 } } } 0 10268 "Verilog HDL information at %1!s!: always construct contains both blocking and non-blocking assignments" 1 0 "Analysis & Synthesis" 0 -1 1600942649179 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/de1_soc_wrapper.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/de1_soc_wrapper.sv" { { "Info" "ISGN_ENTITY_NAME" "1 de1_soc_wrapper " "Found entity 1: de1_soc_wrapper" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 8 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1600942649182 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942649182 ""}
+{ "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "Green_Data razzle.sv(44) " "Verilog HDL Implicit Net warning at razzle.sv(44): created implicit net for \"Green_Data\"" { } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 44 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942649182 ""}
+{ "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "Blue_Data razzle.sv(45) " "Verilog HDL Implicit Net warning at razzle.sv(45): created implicit net for \"Blue_Data\"" { } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 45 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942649182 ""}
+{ "Info" "ISGN_START_ELABORATION_TOP" "de1_soc_wrapper " "Elaborating entity \"de1_soc_wrapper\" for the top level hierarchy" { } { } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Analysis & Synthesis" 0 -1 1600942649411 ""}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 26 de1_soc_wrapper.sv(75) " "Verilog HDL assignment warning at de1_soc_wrapper.sv(75): truncated value with size 32 to match size of target (26)" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 75 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942649413 "|de1_soc_wrapper"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "8 7 de1_soc_wrapper.sv(87) " "Verilog HDL assignment warning at de1_soc_wrapper.sv(87): truncated value with size 8 to match size of target (7)" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 87 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942649414 "|de1_soc_wrapper"}
+{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "LEDR de1_soc_wrapper.sv(15) " "Output port \"LEDR\" at de1_soc_wrapper.sv(15) has no driver" { } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 0 0 } } } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Analysis & Synthesis" 0 -1 1600942649414 "|de1_soc_wrapper"}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "arm_soc arm_soc:soc_inst " "Elaborating entity \"arm_soc\" for hierarchy \"arm_soc:soc_inst\"" { } { { "behavioural/de1_soc_wrapper.sv" "soc_inst" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 42 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942649434 ""}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "CORTEXM0DS arm_soc:soc_inst\|CORTEXM0DS:m0_1 " "Elaborating entity \"CORTEXM0DS\" for hierarchy \"arm_soc:soc_inst\|CORTEXM0DS:m0_1\"" { } { { "behavioural/arm_soc.sv" "m0_1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 56 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942649451 ""}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_msp CORTEXM0DS.sv(76) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(76): object \"cm0_msp\" assigned a value but never read" { } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 76 0 0 } } } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600942649453 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_psp CORTEXM0DS.sv(77) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(77): object \"cm0_psp\" assigned a value but never read" { } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 77 0 0 } } } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600942649453 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_pc CORTEXM0DS.sv(79) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(79): object \"cm0_pc\" assigned a value but never read" { } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 79 0 0 } } } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600942649453 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_xpsr CORTEXM0DS.sv(80) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(80): object \"cm0_xpsr\" assigned a value but never read" { } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 80 0 0 } } } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600942649453 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_control CORTEXM0DS.sv(81) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(81): object \"cm0_control\" assigned a value but never read" { } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 81 0 0 } } } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600942649453 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_primask CORTEXM0DS.sv(82) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(82): object \"cm0_primask\" assigned a value but never read" { } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 82 0 0 } } } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600942649453 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cortexm0ds_logic arm_soc:soc_inst\|CORTEXM0DS:m0_1\|cortexm0ds_logic:u_logic " "Elaborating entity \"cortexm0ds_logic\" for hierarchy \"arm_soc:soc_inst\|CORTEXM0DS:m0_1\|cortexm0ds_logic:u_logic\"" { } { { "behavioural/CORTEXM0DS.sv" "u_logic" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 144 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942649454 ""}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "N4i2z4 cortexm0ds_logic.sv(1133) " "Verilog HDL or VHDL warning at cortexm0ds_logic.sv(1133): object \"N4i2z4\" assigned a value but never read" { } { { "behavioural/cortexm0ds_logic.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/cortexm0ds_logic.sv" 1133 0 0 } } } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600942649481 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic"}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "L5i2z4 cortexm0ds_logic.sv(1133) " "Verilog HDL or VHDL warning at cortexm0ds_logic.sv(1133): object \"L5i2z4\" assigned a value but never read" { } { { "behavioural/cortexm0ds_logic.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/cortexm0ds_logic.sv" 1133 0 0 } } } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600942649481 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic"}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ahb_interconnect arm_soc:soc_inst\|ahb_interconnect:interconnect_1 " "Elaborating entity \"ahb_interconnect\" for hierarchy \"arm_soc:soc_inst\|ahb_interconnect:interconnect_1\"" { } { { "behavioural/arm_soc.sv" "interconnect_1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 68 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942649485 ""}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 3 ahb_interconnect.sv(39) " "Verilog HDL assignment warning at ahb_interconnect.sv(39): truncated value with size 32 to match size of target (3)" { } { { "behavioural/ahb_interconnect.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv" 39 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942649490 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 3 ahb_interconnect.sv(41) " "Verilog HDL assignment warning at ahb_interconnect.sv(41): truncated value with size 32 to match size of target (3)" { } { { "behavioural/ahb_interconnect.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv" 41 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942649491 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 3 ahb_interconnect.sv(43) " "Verilog HDL assignment warning at ahb_interconnect.sv(43): truncated value with size 32 to match size of target (3)" { } { { "behavioural/ahb_interconnect.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv" 43 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942649491 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1"}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ahb_ram arm_soc:soc_inst\|ahb_ram:ram_1 " "Elaborating entity \"ahb_ram\" for hierarchy \"arm_soc:soc_inst\|ahb_ram:ram_1\"" { } { { "behavioural/arm_soc.sv" "ram_1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 79 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942649492 ""}
+{ "Warning" "WVRFX_VERI_2111_UNCONVERTED" "199 0 4095 ahb_ram.sv(69) " "Verilog HDL warning at ahb_ram.sv(69): number of words (199) in memory file does not match the number of elements in the address range \[0:4095\]" { } { { "behavioural/ahb_ram.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_ram.sv" 69 0 0 } } } 0 10850 "Verilog HDL warning at %4!s!: number of words (%1!d!) in memory file does not match the number of elements in the address range \[%2!d!:%3!d!\]" 0 0 "Analysis & Synthesis" 0 -1 1600942649524 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_ram:ram_1"}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ahb_switches arm_soc:soc_inst\|ahb_switches:switches_1 " "Elaborating entity \"ahb_switches\" for hierarchy \"arm_soc:soc_inst\|ahb_switches:switches_1\"" { } { { "behavioural/arm_soc.sv" "switches_1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 89 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942649889 ""}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ahb_pixel_memory arm_soc:soc_inst\|ahb_pixel_memory:pix1 " "Elaborating entity \"ahb_pixel_memory\" for hierarchy \"arm_soc:soc_inst\|ahb_pixel_memory:pix1\"" { } { { "behavioural/arm_soc.sv" "pix1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 95 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942649891 ""}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "read_enable ahb_pixel_memory.sv(62) " "Verilog HDL or VHDL warning at ahb_pixel_memory.sv(62): object \"read_enable\" assigned a value but never read" { } { { "behavioural/ahb_pixel_memory.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv" 62 0 0 } } } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1600942650016 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 ahb_pixel_memory.sv(94) " "Verilog HDL assignment warning at ahb_pixel_memory.sv(94): truncated value with size 32 to match size of target (1)" { } { { "behavioural/ahb_pixel_memory.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv" 94 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942650026 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 19 ahb_pixel_memory.sv(98) " "Verilog HDL assignment warning at ahb_pixel_memory.sv(98): truncated value with size 32 to match size of target (19)" { } { { "behavioural/ahb_pixel_memory.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv" 98 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1600942650027 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1"}
+{ "Error" "EVRFX_VERI_PROCEDURAL_ASSIGNMENT" "ahb_pixel_memory.sv(103) " "Verilog HDL unsupported feature error at ahb_pixel_memory.sv(103): Procedural Continuous Assignment to register is not supported" { } { { "behavioural/ahb_pixel_memory.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv" 103 0 0 } } } 0 10043 "Verilog HDL unsupported feature error at %1!s!: Procedural Continuous Assignment to register is not supported" 0 0 "Analysis & Synthesis" 0 -1 1600942650027 ""}
+{ "Error" "ESGN_USER_HIER_ELABORATION_FAILURE" "arm_soc:soc_inst\|ahb_pixel_memory:pix1 " "Can't elaborate user hierarchy \"arm_soc:soc_inst\|ahb_pixel_memory:pix1\"" { } { { "behavioural/arm_soc.sv" "pix1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 95 0 0 } } } 0 12152 "Can't elaborate user hierarchy \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1600942650066 ""}
+{ "Error" "EQEXE_ERROR_COUNT" "Analysis & Synthesis 2 s 21 s Quartus Prime " "Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 21 warnings" { { "Error" "EQEXE_END_PEAK_VSIZE_MEMORY" "1140 " "Peak virtual memory: 1140 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1600942650169 ""} { "Error" "EQEXE_END_BANNER_TIME" "Thu Sep 24 11:17:30 2020 " "Processing ended: Thu Sep 24 11:17:30 2020" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1600942650169 ""} { "Error" "EQEXE_ELAPSED_TIME" "00:00:11 " "Elapsed time: 00:00:11" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1600942650169 ""} { "Error" "EQEXE_ELAPSED_CPU_TIME" "00:00:26 " "Total CPU time (on all processors): 00:00:26" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1600942650169 ""} } { } 0 0 "%6!s! %1!s! was unsuccessful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942650169 ""}
+{ "Error" "EFLOW_ERROR_COUNT" "Full Compilation 4 s 21 s " "Quartus Prime Full Compilation was unsuccessful. 4 errors, 21 warnings" { } { } 0 293001 "Quartus Prime %1!s! was unsuccessful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Analysis & Synthesis" 0 -1 1600942650355 ""}
diff --git a/db/project24_09.map_bb.logdb b/db/project24_09.map_bb.logdb
new file mode 100644
index 0000000000000000000000000000000000000000..626799f0f85326a8c1fc522db584e86cdfccd51f
--- /dev/null
+++ b/db/project24_09.map_bb.logdb
@@ -0,0 +1 @@
+v1
diff --git a/de1_soc_wrapper.qsf b/de1_soc_wrapper.qsf
index 36c51b9bd7e2a4b7acfc5aa1a351357dc9068fbe..c36c9d96f39f3c871613c58cf8111d31632c9f1e 100644
--- a/de1_soc_wrapper.qsf
+++ b/de1_soc_wrapper.qsf
@@ -56,9 +56,9 @@ set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 256
-set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (SystemVerilog)"
+set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (Verilog)"
set_global_assignment -name EDA_TIME_SCALE "1 ps" -section_id eda_simulation
-set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "SYSTEMVERILOG HDL" -section_id eda_simulation
+set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "VERILOG HDL" -section_id eda_simulation
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
diff --git a/de1_soc_wrapper.qws b/de1_soc_wrapper.qws
index d00c0289013881d1417ad0fed3eaf5ffa0a0cd3a..efbb83b6eb0f8fb2ed108a9b65533a7edae3f999 100644
Binary files a/de1_soc_wrapper.qws and b/de1_soc_wrapper.qws differ
diff --git a/incremental_db/README b/incremental_db/README
new file mode 100644
index 0000000000000000000000000000000000000000..9f62dcda0512fec7b5b55c11a13d70f91548996f
--- /dev/null
+++ b/incremental_db/README
@@ -0,0 +1,11 @@
+This folder contains data for incremental compilation.
+
+The compiled_partitions sub-folder contains previous compilation results for each partition.
+As long as this folder is preserved, incremental compilation results from earlier compiles
+can be re-used. To perform a clean compilation from source files for all partitions, both
+the db and incremental_db folder should be removed.
+
+The imported_partitions sub-folder contains the last imported QXP for each imported partition.
+As long as this folder is preserved, imported partitions will be automatically re-imported
+when the db or incremental_db/compiled_partitions folders are removed.
+
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.db_info b/incremental_db/compiled_partitions/de1_soc_wrapper.db_info
new file mode 100644
index 0000000000000000000000000000000000000000..366970d8f60ca9d7c2924991d63d03a61f341e9e
--- /dev/null
+++ b/incremental_db/compiled_partitions/de1_soc_wrapper.db_info
@@ -0,0 +1,3 @@
+Quartus_Version = Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
+Version_Index = 419482368
+Creation_Time = Thu Sep 24 10:53:32 2020
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.ammdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.ammdb
new file mode 100644
index 0000000000000000000000000000000000000000..100ca5ed0f91ff51284fb5e52e53cf70609096de
Binary files /dev/null and b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.ammdb differ
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.cdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.cdb
new file mode 100644
index 0000000000000000000000000000000000000000..d5f265cbf7a582b2d1c7973ab2343e7e6e5e75bb
Binary files /dev/null and b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.cdb differ
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.dfp b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.dfp
new file mode 100644
index 0000000000000000000000000000000000000000..b1c67d625638bb473b681fa4acb00be38889ece3
Binary files /dev/null and b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.dfp differ
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.hbdb.cdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.hbdb.cdb
new file mode 100644
index 0000000000000000000000000000000000000000..2758a06332af5a8ef59a8fe185f3debe8bde21dc
Binary files /dev/null and b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.hbdb.cdb differ
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.hbdb.hdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.hbdb.hdb
new file mode 100644
index 0000000000000000000000000000000000000000..70c84c9cd241e22c4d942f49113c05d1410c7603
Binary files /dev/null and b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.hbdb.hdb differ
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.hbdb.sig b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.hbdb.sig
new file mode 100644
index 0000000000000000000000000000000000000000..af9b8e9aa113827749627f5921914b7bff5208a3
--- /dev/null
+++ b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.hbdb.sig
@@ -0,0 +1 @@
+7aee213afbf8301ed5eefc8c827f49a3
\ No newline at end of file
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.hdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.hdb
new file mode 100644
index 0000000000000000000000000000000000000000..8ca1b3674c063f49283ce35c298e3921ec31db06
Binary files /dev/null and b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.hdb differ
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.logdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.logdb
new file mode 100644
index 0000000000000000000000000000000000000000..626799f0f85326a8c1fc522db584e86cdfccd51f
--- /dev/null
+++ b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.logdb
@@ -0,0 +1 @@
+v1
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.rcfdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.rcfdb
new file mode 100644
index 0000000000000000000000000000000000000000..4e409e4bb8976d040ad2c9edefe3c366760a33c3
Binary files /dev/null and b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.rcfdb differ
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.cdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.cdb
new file mode 100644
index 0000000000000000000000000000000000000000..cfa80f0e197e4dc3fd115c6455d3c4e53b6f4518
Binary files /dev/null and b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.cdb differ
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.dpi b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.dpi
new file mode 100644
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diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.hbdb.hdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.hbdb.hdb
new file mode 100644
index 0000000000000000000000000000000000000000..4ba8650f390d08cf2044165376742426a5ef0833
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diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.hbdb.sig b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.hbdb.sig
new file mode 100644
index 0000000000000000000000000000000000000000..af9b8e9aa113827749627f5921914b7bff5208a3
--- /dev/null
+++ b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.hbdb.sig
@@ -0,0 +1 @@
+7aee213afbf8301ed5eefc8c827f49a3
\ No newline at end of file
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.hdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.hdb
new file mode 100644
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diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.kpt b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.kpt
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diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.olf.cdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.olf.cdb
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diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.olm.cdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.olm.cdb
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diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.oln.cdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.oln.cdb
new file mode 100644
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diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.opi b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.opi
new file mode 100644
index 0000000000000000000000000000000000000000..56a6051ca2b02b04ef92d5150c9ef600403cb1de
--- /dev/null
+++ b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.opi
@@ -0,0 +1 @@
+1
\ No newline at end of file
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new file mode 100644
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new file mode 100644
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diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.rrp.cdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.rrp.cdb
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diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.rrp.hbdb.cdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.rrp.hbdb.cdb
new file mode 100644
index 0000000000000000000000000000000000000000..be8ef78bc6f337314ca7c221690ee26ef47562b7
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new file mode 100644
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diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.rrp.hdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.rrp.hdb
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diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.rrp.kpt b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.rrp.kpt
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diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.rrp.hdb b/incremental_db/compiled_partitions/de1_soc_wrapper.rrp.hdb
new file mode 100644
index 0000000000000000000000000000000000000000..304b4aad5e6bef43b88f01d1852f24e28b6ebcb9
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diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.rrs.cdb b/incremental_db/compiled_partitions/de1_soc_wrapper.rrs.cdb
new file mode 100644
index 0000000000000000000000000000000000000000..a6c764c448977063f943c56c05bc81861621d944
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diff --git a/output_files/de1_soc_wrapper.asm.rpt b/output_files/de1_soc_wrapper.asm.rpt
new file mode 100644
index 0000000000000000000000000000000000000000..e630645bae88de4953fbbf73a47bcb28de15a2da
--- /dev/null
+++ b/output_files/de1_soc_wrapper.asm.rpt
@@ -0,0 +1,92 @@
+Assembler report for de1_soc_wrapper
+Thu Sep 24 11:21:17 2020
+Quartus Prime Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
+
+
+---------------------
+; Table of Contents ;
+---------------------
+ 1. Legal Notice
+ 2. Assembler Summary
+ 3. Assembler Settings
+ 4. Assembler Generated Files
+ 5. Assembler Device Options: de1_soc_wrapper.sof
+ 6. Assembler Messages
+
+
+
+----------------
+; Legal Notice ;
+----------------
+Copyright (C) 2017 Intel Corporation. All rights reserved.
+Your use of Intel Corporation's design tools, logic functions
+and other software and tools, and its AMPP partner logic
+functions, and any output files from any of the foregoing
+(including device programming or simulation files), and any
+associated documentation or information are expressly subject
+to the terms and conditions of the Intel Program License
+Subscription Agreement, the Intel Quartus Prime License Agreement,
+the Intel MegaCore Function License Agreement, or other
+applicable license agreement, including, without limitation,
+that your use is for the sole purpose of programming logic
+devices manufactured by Intel and sold by Intel or its
+authorized distributors. Please refer to the applicable
+agreement for further details.
+
+
+
++---------------------------------------------------------------+
+; Assembler Summary ;
++-----------------------+---------------------------------------+
+; Assembler Status ; Successful - Thu Sep 24 11:21:17 2020 ;
+; Revision Name ; de1_soc_wrapper ;
+; Top-level Entity Name ; de1_soc_wrapper ;
+; Family ; Cyclone V ;
+; Device ; 5CSEMA5F31C6 ;
++-----------------------+---------------------------------------+
+
+
++----------------------------------+
+; Assembler Settings ;
++--------+---------+---------------+
+; Option ; Setting ; Default Value ;
++--------+---------+---------------+
+
+
++---------------------------+
+; Assembler Generated Files ;
++---------------------------+
+; File Name ;
++---------------------------+
+; de1_soc_wrapper.sof ;
++---------------------------+
+
+
++-----------------------------------------------+
+; Assembler Device Options: de1_soc_wrapper.sof ;
++----------------+------------------------------+
+; Option ; Setting ;
++----------------+------------------------------+
+; Device ; 5CSEMA5F31C6 ;
+; JTAG usercode ; 0x02172EEB ;
+; Checksum ; 0x02172EEB ;
++----------------+------------------------------+
+
+
++--------------------+
+; Assembler Messages ;
++--------------------+
+Info: *******************************************************************
+Info: Running Quartus Prime Assembler
+ Info: Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
+ Info: Processing started: Thu Sep 24 11:21:08 2020
+Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper
+Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
+Info (115030): Assembler is generating device programming files
+Info: Quartus Prime Assembler was successful. 0 errors, 1 warning
+ Info: Peak virtual memory: 1108 megabytes
+ Info: Processing ended: Thu Sep 24 11:21:17 2020
+ Info: Elapsed time: 00:00:09
+ Info: Total CPU time (on all processors): 00:00:09
+
+
diff --git a/output_files/de1_soc_wrapper.done b/output_files/de1_soc_wrapper.done
new file mode 100644
index 0000000000000000000000000000000000000000..99ecef0528348d908abde279871e0bd3e0797f27
--- /dev/null
+++ b/output_files/de1_soc_wrapper.done
@@ -0,0 +1 @@
+Thu Sep 24 12:09:43 2020
diff --git a/output_files/de1_soc_wrapper.eda.rpt b/output_files/de1_soc_wrapper.eda.rpt
new file mode 100644
index 0000000000000000000000000000000000000000..bdcbaf444a3f7e30e6e831fecc6e369d8d3d8727
--- /dev/null
+++ b/output_files/de1_soc_wrapper.eda.rpt
@@ -0,0 +1,96 @@
+EDA Netlist Writer report for de1_soc_wrapper
+Thu Sep 24 11:21:34 2020
+Quartus Prime Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
+
+
+---------------------
+; Table of Contents ;
+---------------------
+ 1. Legal Notice
+ 2. EDA Netlist Writer Summary
+ 3. Simulation Settings
+ 4. Simulation Generated Files
+ 5. EDA Netlist Writer Messages
+
+
+
+----------------
+; Legal Notice ;
+----------------
+Copyright (C) 2017 Intel Corporation. All rights reserved.
+Your use of Intel Corporation's design tools, logic functions
+and other software and tools, and its AMPP partner logic
+functions, and any output files from any of the foregoing
+(including device programming or simulation files), and any
+associated documentation or information are expressly subject
+to the terms and conditions of the Intel Program License
+Subscription Agreement, the Intel Quartus Prime License Agreement,
+the Intel MegaCore Function License Agreement, or other
+applicable license agreement, including, without limitation,
+that your use is for the sole purpose of programming logic
+devices manufactured by Intel and sold by Intel or its
+authorized distributors. Please refer to the applicable
+agreement for further details.
+
+
+
++-------------------------------------------------------------------+
+; EDA Netlist Writer Summary ;
++---------------------------+---------------------------------------+
+; EDA Netlist Writer Status ; Successful - Thu Sep 24 11:21:34 2020 ;
+; Revision Name ; de1_soc_wrapper ;
+; Top-level Entity Name ; de1_soc_wrapper ;
+; Family ; Cyclone V ;
+; Simulation Files Creation ; Successful ;
++---------------------------+---------------------------------------+
+
+
++-------------------------------------------------------------------------------------------------------------------------------+
+; Simulation Settings ;
++---------------------------------------------------------------------------------------------------+---------------------------+
+; Option ; Setting ;
++---------------------------------------------------------------------------------------------------+---------------------------+
+; Tool Name ; ModelSim-Altera (Verilog) ;
+; Generate functional simulation netlist ; Off ;
+; Time scale ; 1 ps ;
+; Truncate long hierarchy paths ; Off ;
+; Map illegal HDL characters ; Off ;
+; Flatten buses into individual nodes ; Off ;
+; Maintain hierarchy ; Off ;
+; Bring out device-wide set/reset signals as ports ; Off ;
+; Enable glitch filtering ; Off ;
+; Do not write top level VHDL entity ; Off ;
+; Disable detection of setup and hold time violations in the input registers of bi-directional pins ; Off ;
+; Architecture name in VHDL output netlist ; structure ;
+; Generate third-party EDA tool command script for RTL functional simulation ; Off ;
+; Generate third-party EDA tool command script for gate-level simulation ; Off ;
++---------------------------------------------------------------------------------------------------+---------------------------+
+
+
++-----------------------------------------------------------------------+
+; Simulation Generated Files ;
++-----------------------------------------------------------------------+
+; Generated Files ;
++-----------------------------------------------------------------------+
+; /home/ks6n19/Documents/project/simulation/modelsim/de1_soc_wrapper.vo ;
++-----------------------------------------------------------------------+
+
+
++-----------------------------+
+; EDA Netlist Writer Messages ;
++-----------------------------+
+Info: *******************************************************************
+Info: Running Quartus Prime EDA Netlist Writer
+ Info: Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
+ Info: Processing started: Thu Sep 24 11:21:31 2020
+Info: Command: quartus_eda --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper
+Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
+Warning (10905): Generated the EDA functional simulation netlist because it is the only supported netlist type for this device.
+Info (204019): Generated file de1_soc_wrapper.vo in folder "/home/ks6n19/Documents/project/simulation/modelsim/" for EDA simulation tool
+Info: Quartus Prime EDA Netlist Writer was successful. 0 errors, 2 warnings
+ Info: Peak virtual memory: 1316 megabytes
+ Info: Processing ended: Thu Sep 24 11:21:34 2020
+ Info: Elapsed time: 00:00:03
+ Info: Total CPU time (on all processors): 00:00:03
+
+
diff --git a/output_files/de1_soc_wrapper.fit.rpt b/output_files/de1_soc_wrapper.fit.rpt
new file mode 100644
index 0000000000000000000000000000000000000000..fef31e85cb2fe373721ce644e3be3bac78d059d6
--- /dev/null
+++ b/output_files/de1_soc_wrapper.fit.rpt
@@ -0,0 +1,2644 @@
+Fitter report for de1_soc_wrapper
+Thu Sep 24 11:21:05 2020
+Quartus Prime Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
+
+
+---------------------
+; Table of Contents ;
+---------------------
+ 1. Legal Notice
+ 2. Fitter Summary
+ 3. Fitter Settings
+ 4. Parallel Compilation
+ 5. Fitter Netlist Optimizations
+ 6. Incremental Compilation Preservation Summary
+ 7. Incremental Compilation Partition Settings
+ 8. Incremental Compilation Placement Preservation
+ 9. Pin-Out File
+ 10. Fitter Resource Usage Summary
+ 11. Fitter Partition Statistics
+ 12. Input Pins
+ 13. Output Pins
+ 14. I/O Bank Usage
+ 15. All Package Pins
+ 16. I/O Assignment Warnings
+ 17. Fitter Resource Utilization by Entity
+ 18. Delay Chain Summary
+ 19. Pad To Core Delay Chain Fanout
+ 20. Control Signals
+ 21. Global & Other Fast Signals
+ 22. Non-Global High Fan-Out Signals
+ 23. Fitter RAM Summary
+ 24. Routing Usage Summary
+ 25. I/O Rules Summary
+ 26. I/O Rules Details
+ 27. I/O Rules Matrix
+ 28. Fitter Device Options
+ 29. Operating Settings and Conditions
+ 30. Estimated Delay Added for Hold Timing Summary
+ 31. Estimated Delay Added for Hold Timing Details
+ 32. Fitter Messages
+
+
+
+----------------
+; Legal Notice ;
+----------------
+Copyright (C) 2017 Intel Corporation. All rights reserved.
+Your use of Intel Corporation's design tools, logic functions
+and other software and tools, and its AMPP partner logic
+functions, and any output files from any of the foregoing
+(including device programming or simulation files), and any
+associated documentation or information are expressly subject
+to the terms and conditions of the Intel Program License
+Subscription Agreement, the Intel Quartus Prime License Agreement,
+the Intel MegaCore Function License Agreement, or other
+applicable license agreement, including, without limitation,
+that your use is for the sole purpose of programming logic
+devices manufactured by Intel and sold by Intel or its
+authorized distributors. Please refer to the applicable
+agreement for further details.
+
+
+
++-----------------------------------------------------------------------------------+
+; Fitter Summary ;
++---------------------------------+-------------------------------------------------+
+; Fitter Status ; Successful - Thu Sep 24 11:21:05 2020 ;
+; Quartus Prime Version ; 16.1.2 Build 203 01/18/2017 SJ Standard Edition ;
+; Revision Name ; de1_soc_wrapper ;
+; Top-level Entity Name ; de1_soc_wrapper ;
+; Family ; Cyclone V ;
+; Device ; 5CSEMA5F31C6 ;
+; Timing Models ; Final ;
+; Logic utilization (in ALMs) ; 2,040 / 32,070 ( 6 % ) ;
+; Total registers ; 1256 ;
+; Total pins ; 81 / 457 ( 18 % ) ;
+; Total virtual pins ; 0 ;
+; Total block memory bits ; 438,272 / 4,065,280 ( 11 % ) ;
+; Total RAM Blocks ; 54 / 397 ( 14 % ) ;
+; Total DSP Blocks ; 0 / 87 ( 0 % ) ;
+; Total HSSI RX PCSs ; 0 ;
+; Total HSSI PMA RX Deserializers ; 0 ;
+; Total HSSI TX PCSs ; 0 ;
+; Total HSSI PMA TX Serializers ; 0 ;
+; Total PLLs ; 0 / 6 ( 0 % ) ;
+; Total DLLs ; 0 / 4 ( 0 % ) ;
++---------------------------------+-------------------------------------------------+
+
+
++------------------------------------------------------------------------------------------------------------------------------------------------------------+
+; Fitter Settings ;
++----------------------------------------------------------------------------+---------------------------------------+---------------------------------------+
+; Option ; Setting ; Default Value ;
++----------------------------------------------------------------------------+---------------------------------------+---------------------------------------+
+; Device ; 5CSEMA5F31C6 ; ;
+; Minimum Core Junction Temperature ; 0 ; ;
+; Maximum Core Junction Temperature ; 85 ; ;
+; Use smart compilation ; Off ; Off ;
+; Enable parallel Assembler and TimeQuest Timing Analyzer during compilation ; On ; On ;
+; Enable compact report table ; Off ; Off ;
+; Router Timing Optimization Level ; Normal ; Normal ;
+; Perform Clocking Topology Analysis During Routing ; Off ; Off ;
+; Placement Effort Multiplier ; 1.0 ; 1.0 ;
+; Device initialization clock source ; INIT_INTOSC ; INIT_INTOSC ;
+; Optimize Hold Timing ; All Paths ; All Paths ;
+; Optimize Multi-Corner Timing ; On ; On ;
+; Auto RAM to MLAB Conversion ; On ; On ;
+; Equivalent RAM and MLAB Power Up ; Auto ; Auto ;
+; Equivalent RAM and MLAB Paused Read Capabilities ; Care ; Care ;
+; PowerPlay Power Optimization During Fitting ; Normal compilation ; Normal compilation ;
+; SSN Optimization ; Off ; Off ;
+; Optimize Timing ; Normal compilation ; Normal compilation ;
+; Optimize Timing for ECOs ; Off ; Off ;
+; Regenerate Full Fit Report During ECO Compiles ; Off ; Off ;
+; Optimize IOC Register Placement for Timing ; Normal ; Normal ;
+; Final Placement Optimizations ; Automatically ; Automatically ;
+; Fitter Aggressive Routability Optimizations ; Automatically ; Automatically ;
+; Fitter Initial Placement Seed ; 1 ; 1 ;
+; Periphery to Core Placement and Routing Optimization ; Off ; Off ;
+; Weak Pull-Up Resistor ; Off ; Off ;
+; Enable Bus-Hold Circuitry ; Off ; Off ;
+; Auto Packed Registers ; Auto ; Auto ;
+; Auto Delay Chains ; On ; On ;
+; Auto Delay Chains for High Fanout Input Pins ; Off ; Off ;
+; Treat Bidirectional Pin as Output Pin ; Off ; Off ;
+; Perform Physical Synthesis for Combinational Logic for Fitting ; Off ; Off ;
+; Perform Physical Synthesis for Combinational Logic for Performance ; Off ; Off ;
+; Perform Register Duplication for Performance ; Off ; Off ;
+; Perform Register Retiming for Performance ; Off ; Off ;
+; Perform Asynchronous Signal Pipelining ; Off ; Off ;
+; Fitter Effort ; Auto Fit ; Auto Fit ;
+; Physical Synthesis Effort Level ; Normal ; Normal ;
+; Logic Cell Insertion - Logic Duplication ; Auto ; Auto ;
+; Auto Register Duplication ; Auto ; Auto ;
+; Auto Global Clock ; On ; On ;
+; Auto Global Register Control Signals ; On ; On ;
+; Reserve all unused pins ; As input tri-stated with weak pull-up ; As input tri-stated with weak pull-up ;
+; Synchronizer Identification ; Auto ; Auto ;
+; Enable Beneficial Skew Optimization ; On ; On ;
+; Optimize Design for Metastability ; On ; On ;
+; Active Serial clock source ; FREQ_100MHz ; FREQ_100MHz ;
+; Force Fitter to Avoid Periphery Placement Warnings ; Off ; Off ;
+; Clamping Diode ; Off ; Off ;
+; Enable input tri-state on active configuration pins in user mode ; Off ; Off ;
+; Advanced Physical Optimization ; On ; On ;
++----------------------------------------------------------------------------+---------------------------------------+---------------------------------------+
+
+
++------------------------------------------+
+; Parallel Compilation ;
++----------------------------+-------------+
+; Processors ; Number ;
++----------------------------+-------------+
+; Number detected on machine ; 24 ;
+; Maximum allowed ; 16 ;
+; ; ;
+; Average used ; 1.31 ;
+; Maximum used ; 16 ;
+; ; ;
+; Usage by Processor ; % Time Used ;
+; Processor 1 ; 100.0% ;
+; Processor 2 ; 2.6% ;
+; Processor 3 ; 2.5% ;
+; Processor 4 ; 2.4% ;
+; Processor 5 ; 2.1% ;
+; Processor 6 ; 2.1% ;
+; Processor 7 ; 2.0% ;
+; Processor 8 ; 2.0% ;
+; Processor 9 ; 1.9% ;
+; Processor 10 ; 1.9% ;
+; Processor 11 ; 1.9% ;
+; Processor 12 ; 1.9% ;
+; Processor 13 ; 1.9% ;
+; Processor 14 ; 1.9% ;
+; Processor 15 ; 1.9% ;
+; Processor 16 ; 1.9% ;
++----------------------------+-------------+
+
+
++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+; Fitter Netlist Optimizations ;
++----------------------------------------------------------------------------------------------------------------+------------+---------------------------------------------------+----------------------------+-----------+----------------+--------------------------------------------------------------------------------------------------------------------------+------------------+-----------------------+
+; Node ; Action ; Operation ; Reason ; Node Port ; Node Port Name ; Destination Node ; Destination Port ; Destination Port Name ;
++----------------------------------------------------------------------------------------------------------------+------------+---------------------------------------------------+----------------------------+-----------+----------------+--------------------------------------------------------------------------------------------------------------------------+------------------+-----------------------+
+; CLOCK_50~inputCLKENA0 ; Created ; Placement ; Fitter Periphery Placement ; ; ; ; ; ;
+; KEY[2]~inputCLKENA0 ; Created ; Placement ; Fitter Periphery Placement ; ; ; ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|A4t2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|A4t2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aez2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aez2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|An63z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|An63z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|An83z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|An83z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Anq2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Anq2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ark2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ark2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aru2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aru2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Auk2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Auk2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ay53z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ay53z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aze3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aze3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B1a3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B1a3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B5e3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B5e3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B6j2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B6j2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bjd3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bjd3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bk13z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bk13z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bk23z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bk23z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C3z2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C3z2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C4b3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C4b3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C5v2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C5v2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C183z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C183z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cam2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cam2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cc53z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cc53z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ccg3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ccg3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ccq2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ccq2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cgt2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cgt2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cgu2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cgu2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ch03z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ch03z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cmn2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cmn2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cy33z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cy33z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cyq2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cyq2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D1p2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D1p2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D7k2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D7k2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D603z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D603z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D923z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D923z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dcs2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dcs2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ddi3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ddi3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Df83z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Df83z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dq73z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dq73z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dq83z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dq83z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dtj2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dtj2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Duu2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Duu2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Duv2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Duv2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dy23z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dy23z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|E1r2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|E1r2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|E153z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|E153z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|E913z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|E913z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Efp2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Efp2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Eif3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Eif3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ek03z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ek03z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Emi2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Emi2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Eqq2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Eqq2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Euh3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Euh3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Exd3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Exd3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Eyg3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Eyg3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Eyr2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Eyr2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|F4c3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|F4c3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|F8u2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|F8u2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fed3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fed3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ffj2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ffj2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ffs2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ffs2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fhx2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fhx2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fn13z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fn13z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Foe3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Foe3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fre3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fre3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ftf3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ftf3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fxv2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fxv2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G0w2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G0w2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G1s2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G1s2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G4r2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G4r2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G6d3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G6d3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G493z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G493z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gf43z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gf43z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gfq2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gfq2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ggk2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ggk2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Glj2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Glj2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gmm2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gmm2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gto2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gto2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gza3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gza3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H2m2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H2m2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H3d3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H3d3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H8l2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H8l2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H9i2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H9i2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H133z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H133z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H783z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H783z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H903z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H903z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hi83z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hi83z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hmv2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hmv2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hn03z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hn03z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hnr2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hnr2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hq33z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hq33z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hqg3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hqg3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ht53z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ht53z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hub3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hub3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hyy2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hyy2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hzj2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hzj2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I0e3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I0e3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I2t2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I2t2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I6z2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I6z2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I463z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I463z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|If33z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|If33z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Igl2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Igl2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ikz2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ikz2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Imt2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Imt2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Imu2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Imu2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Isi2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Isi2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|It63z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|It63z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Iwp2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Iwp2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ixn2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ixn2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ixt2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ixt2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J5m2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J5m2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J7b3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J7b3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J9d3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J9d3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ji43z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ji43z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jky2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jky2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jl93z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jl93z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jlo2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jlo2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Joi3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Joi3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jsc3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jsc3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jw73z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jw73z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jwf3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jwf3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K1z2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K1z2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K7g3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K7g3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K9z2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K9z2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K423z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K423z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kev2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kev2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kf23z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kf23z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kss2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kss2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kt43z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kt43z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kwo2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kwo2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kyi2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kyi2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L8t2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L8t2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L733z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L733z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L753z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L753z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lhd3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lhd3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ll83z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ll83z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Llq2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Llq2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lny2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lny2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lpu2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lpu2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M1j2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M1j2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M2b3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M2b3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M3e3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M3e3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M5f3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M5f3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M413z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M413z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mcc3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mcc3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mhn2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mhn2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mof3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mof3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mt13z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mt13z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|N7c3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|N7c3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|N8i3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|N8i3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Na63z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Na63z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Na73z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Na73z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Naq2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Naq2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nbx2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nbx2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Neu2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Neu2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nf03z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nf03z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Noo2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Noo2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nqy2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nqy2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nqz2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nqz2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nsk2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nsk2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nz83z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nz83z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O403z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O403z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O723z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O723z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Oas2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Oas2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ogo2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ogo2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ohv2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ohv2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Okn2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Okn2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Olg3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Olg3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Otr2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Otr2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ovc3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ovc3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ow43z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ow43z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|P2a3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|P2a3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pa33z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pa33z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pab3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pab3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pap2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pap2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pcd3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pcd3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pdi2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pdi2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pfz2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pfz2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Po53z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Po53z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Po63z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Po63z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Po83z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Po83z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Psn2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Psn2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Psv2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Psv2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pty2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pty2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Q2q2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Q2q2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Q6u2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Q6u2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Q273z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Q273z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qa43z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qa43z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qdj2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qdj2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qji3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qji3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ql13z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ql13z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ql23z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ql23z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qz33z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qz33z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qz43z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qz43z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qzq2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qzq2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|R1w2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|R1w2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rbo2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rbo2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rd63z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rd63z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rds2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rds2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rhi2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rhi2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rhu2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rhu2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rix2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rix2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rni2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rni2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ro43z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ro43z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rr83z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rr83z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rr93z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rr93z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rsa3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rsa3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|S2p2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|S2p2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|S2r2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|S2r2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sa13z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sa13z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sg83z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sg83z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sgj2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sgj2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sgp2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sgp2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sjj2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sjj2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Snd3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Snd3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Svk2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Svk2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Szr2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Szr2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T7d3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T7d3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T8f3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T8f3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T253z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T253z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tch3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tch3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Td33z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Td33z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tdp2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tdp2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tel2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tel2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tiz2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tiz2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tki2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tki2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|To33z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|To33z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tqc3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tqc3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Trq2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Trq2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Twz2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Twz2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Txj2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Txj2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tyd3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tyd3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tyx2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tyx2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U4z2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U4z2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U5q2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U5q2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U9e3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U9e3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U9u2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U9u2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U573z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U573z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uaj2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uaj2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ufx2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ufx2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ug63z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ug63z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uj93z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uj93z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ujo2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ujo2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Unm2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Unm2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Usl2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Usl2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uu73z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uu73z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uu83z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uu83z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uuf3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uuf3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uyv2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uyv2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|V3m2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|V3m2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|V233z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|V233z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vac3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vac3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vfd3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vfd3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vhk2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vhk2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Viy2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Viy2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vr43z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vr43z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vu93z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vu93z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vve3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vve3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|W0b3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|W0b3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|W4y2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|W4y2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wa03z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wa03z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wai2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wai2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wbf3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wbf3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wce3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wce3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wj83z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wj83z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wnh3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wnh3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wo03z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wo03z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wor2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wor2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wqd3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wqd3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wu53z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wu53z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wuq2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wuq2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wzy2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wzy2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|X6m2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|X6m2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xdb3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xdb3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xly2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xly2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xmf3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xmf3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xx93z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xx93z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xyh3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xyh3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Y1u2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Y1u2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Y9l2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Y9l2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yaz2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yaz2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yg23z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yg23z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yj43z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yj43z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ywi2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ywi2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yx63z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yx63z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yx73z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yx73z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yx83z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yx83z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z0g3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z0g3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z2h3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z2h3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z8s2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z8s2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z863z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z863z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zb83z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zb83z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zcn2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zcn2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zgr2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zgr2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zjg3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zjg3z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zjq2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zjq2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zpj2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zpj2z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zu23z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zu23z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zu43z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zu43z4~DUPLICATE ; ; ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|address_reg_b[0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|address_reg_b[0]~DUPLICATE ; ; ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|address_reg_b[1] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|address_reg_b[1]~DUPLICATE ; ; ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|address_reg_b[2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|address_reg_b[2]~DUPLICATE ; ; ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|address_reg_b[3] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|address_reg_b[3]~DUPLICATE ; ; ;
+; arm_soc:soc_inst|ahb_ram:ram_1|write_cycle ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; arm_soc:soc_inst|ahb_ram:ram_1|write_cycle~DUPLICATE ; ; ;
+; razzle:raz_inst|H_count[0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; razzle:raz_inst|H_count[0]~DUPLICATE ; ; ;
+; razzle:raz_inst|H_count[1] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; razzle:raz_inst|H_count[1]~DUPLICATE ; ; ;
++----------------------------------------------------------------------------------------------------------------+------------+---------------------------------------------------+----------------------------+-----------+----------------+--------------------------------------------------------------------------------------------------------------------------+------------------+-----------------------+
+
+
++---------------------------------------------------------------------------------------------------+
+; Incremental Compilation Preservation Summary ;
++---------------------+---------------------+----------------------------+--------------------------+
+; Type ; Total [A + B] ; From Design Partitions [A] ; From Rapid Recompile [B] ;
++---------------------+---------------------+----------------------------+--------------------------+
+; Placement (by node) ; ; ; ;
+; -- Requested ; 0.00 % ( 0 / 4359 ) ; 0.00 % ( 0 / 4359 ) ; 0.00 % ( 0 / 4359 ) ;
+; -- Achieved ; 0.00 % ( 0 / 4359 ) ; 0.00 % ( 0 / 4359 ) ; 0.00 % ( 0 / 4359 ) ;
+; ; ; ; ;
+; Routing (by net) ; ; ; ;
+; -- Requested ; 0.00 % ( 0 / 0 ) ; 0.00 % ( 0 / 0 ) ; 0.00 % ( 0 / 0 ) ;
+; -- Achieved ; 0.00 % ( 0 / 0 ) ; 0.00 % ( 0 / 0 ) ; 0.00 % ( 0 / 0 ) ;
++---------------------+---------------------+----------------------------+--------------------------+
+
+
++----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+; Incremental Compilation Partition Settings ;
++--------------------------------+----------------+-------------------+-------------------------+------------------------+------------------------------+--------------------------------+
+; Partition Name ; Partition Type ; Netlist Type Used ; Preservation Level Used ; Netlist Type Requested ; Preservation Level Requested ; Contents ;
++--------------------------------+----------------+-------------------+-------------------------+------------------------+------------------------------+--------------------------------+
+; Top ; User-created ; Source File ; N/A ; Source File ; N/A ; ;
+; hard_block:auto_generated_inst ; Auto-generated ; Source File ; N/A ; Source File ; N/A ; hard_block:auto_generated_inst ;
++--------------------------------+----------------+-------------------+-------------------------+------------------------+------------------------------+--------------------------------+
+
+
++------------------------------------------------------------------------------------------------------------------------------------+
+; Incremental Compilation Placement Preservation ;
++--------------------------------+-----------------------+-------------------------+-------------------+---------------------+-------+
+; Partition Name ; Preservation Achieved ; Preservation Level Used ; Netlist Type Used ; Preservation Method ; Notes ;
++--------------------------------+-----------------------+-------------------------+-------------------+---------------------+-------+
+; Top ; 0.00 % ( 0 / 4359 ) ; N/A ; Source File ; N/A ; ;
+; hard_block:auto_generated_inst ; 0.00 % ( 0 / 0 ) ; N/A ; Source File ; N/A ; ;
++--------------------------------+-----------------------+-------------------------+-------------------+---------------------+-------+
+
+
++--------------+
+; Pin-Out File ;
++--------------+
+The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1_soc_wrapper.pin.
+
+
++---------------------------------------------------------------------------------------------+
+; Fitter Resource Usage Summary ;
++-------------------------------------------------------------+-----------------------+-------+
+; Resource ; Usage ; % ;
++-------------------------------------------------------------+-----------------------+-------+
+; Logic utilization (ALMs needed / total ALMs on device) ; 2,040 / 32,070 ; 6 % ;
+; ALMs needed [=A-B+C] ; 2,040 ; ;
+; [A] ALMs used in final placement [=a+b+c+d] ; 2,259 / 32,070 ; 7 % ;
+; [a] ALMs used for LUT logic and registers ; 219 ; ;
+; [b] ALMs used for LUT logic ; 1,784 ; ;
+; [c] ALMs used for registers ; 256 ; ;
+; [d] ALMs used for memory (up to half of total ALMs) ; 0 ; ;
+; [B] Estimate of ALMs recoverable by dense packing ; 261 / 32,070 ; < 1 % ;
+; [C] Estimate of ALMs unavailable [=a+b+c+d] ; 42 / 32,070 ; < 1 % ;
+; [a] Due to location constrained logic ; 0 ; ;
+; [b] Due to LAB-wide signal conflicts ; 2 ; ;
+; [c] Due to LAB input limits ; 40 ; ;
+; [d] Due to virtual I/Os ; 0 ; ;
+; ; ; ;
+; Difficulty packing design ; Low ; ;
+; ; ; ;
+; Total LABs: partially or completely used ; 276 / 3,207 ; 9 % ;
+; -- Logic LABs ; 276 ; ;
+; -- Memory LABs (up to half of total LABs) ; 0 ; ;
+; ; ; ;
+; Combinational ALUT usage for logic ; 3,176 ; ;
+; -- 7 input functions ; 36 ; ;
+; -- 6 input functions ; 1,022 ; ;
+; -- 5 input functions ; 744 ; ;
+; -- 4 input functions ; 688 ; ;
+; -- <=3 input functions ; 686 ; ;
+; Combinational ALUT usage for route-throughs ; 53 ; ;
+; ; ; ;
+; Dedicated logic registers ; 1,256 ; ;
+; -- By type: ; ; ;
+; -- Primary logic registers ; 950 / 64,140 ; 1 % ;
+; -- Secondary logic registers ; 306 / 64,140 ; < 1 % ;
+; -- By function: ; ; ;
+; -- Design implementation registers ; 950 ; ;
+; -- Routing optimization registers ; 306 ; ;
+; ; ; ;
+; Virtual pins ; 0 ; ;
+; I/O pins ; 81 / 457 ; 18 % ;
+; -- Clock pins ; 5 / 8 ; 63 % ;
+; -- Dedicated input pins ; 0 / 21 ; 0 % ;
+; ; ; ;
+; Hard processor system peripheral utilization ; ; ;
+; -- Boot from FPGA ; 0 / 1 ( 0 % ) ; ;
+; -- Clock resets ; 0 / 1 ( 0 % ) ; ;
+; -- Cross trigger ; 0 / 1 ( 0 % ) ; ;
+; -- S2F AXI ; 0 / 1 ( 0 % ) ; ;
+; -- F2S AXI ; 0 / 1 ( 0 % ) ; ;
+; -- AXI Lightweight ; 0 / 1 ( 0 % ) ; ;
+; -- SDRAM ; 0 / 1 ( 0 % ) ; ;
+; -- Interrupts ; 0 / 1 ( 0 % ) ; ;
+; -- JTAG ; 0 / 1 ( 0 % ) ; ;
+; -- Loan I/O ; 0 / 1 ( 0 % ) ; ;
+; -- MPU event standby ; 0 / 1 ( 0 % ) ; ;
+; -- MPU general purpose ; 0 / 1 ( 0 % ) ; ;
+; -- STM event ; 0 / 1 ( 0 % ) ; ;
+; -- TPIU trace ; 0 / 1 ( 0 % ) ; ;
+; -- DMA ; 0 / 1 ( 0 % ) ; ;
+; -- CAN ; 0 / 2 ( 0 % ) ; ;
+; -- EMAC ; 0 / 2 ( 0 % ) ; ;
+; -- I2C ; 0 / 4 ( 0 % ) ; ;
+; -- NAND Flash ; 0 / 1 ( 0 % ) ; ;
+; -- QSPI ; 0 / 1 ( 0 % ) ; ;
+; -- SDMMC ; 0 / 1 ( 0 % ) ; ;
+; -- SPI Master ; 0 / 2 ( 0 % ) ; ;
+; -- SPI Slave ; 0 / 2 ( 0 % ) ; ;
+; -- UART ; 0 / 2 ( 0 % ) ; ;
+; -- USB ; 0 / 2 ( 0 % ) ; ;
+; ; ; ;
+; M10K blocks ; 54 / 397 ; 14 % ;
+; Total MLAB memory bits ; 0 ; ;
+; Total block memory bits ; 438,272 / 4,065,280 ; 11 % ;
+; Total block memory implementation bits ; 552,960 / 4,065,280 ; 14 % ;
+; ; ; ;
+; Total DSP Blocks ; 0 / 87 ; 0 % ;
+; ; ; ;
+; Fractional PLLs ; 0 / 6 ; 0 % ;
+; Global signals ; 2 ; ;
+; -- Global clocks ; 2 / 16 ; 13 % ;
+; -- Quadrant clocks ; 0 / 66 ; 0 % ;
+; -- Horizontal periphery clocks ; 0 / 18 ; 0 % ;
+; SERDES Transmitters ; 0 / 100 ; 0 % ;
+; SERDES Receivers ; 0 / 100 ; 0 % ;
+; JTAGs ; 0 / 1 ; 0 % ;
+; ASMI blocks ; 0 / 1 ; 0 % ;
+; CRC blocks ; 0 / 1 ; 0 % ;
+; Remote update blocks ; 0 / 1 ; 0 % ;
+; Oscillator blocks ; 0 / 1 ; 0 % ;
+; Impedance control blocks ; 0 / 4 ; 0 % ;
+; Hard Memory Controllers ; 0 / 2 ; 0 % ;
+; Average interconnect usage (total/H/V) ; 2.8% / 3.0% / 2.5% ; ;
+; Peak interconnect usage (total/H/V) ; 32.7% / 34.8% / 28.2% ; ;
+; Maximum fan-out ; 1310 ; ;
+; Highest non-global fan-out ; 605 ; ;
+; Total fan-out ; 20789 ; ;
+; Average fan-out ; 4.42 ; ;
++-------------------------------------------------------------+-----------------------+-------+
+
+
++----------------------------------------------------------------------------------------------------------------------+
+; Fitter Partition Statistics ;
++-------------------------------------------------------------+-----------------------+--------------------------------+
+; Statistic ; Top ; hard_block:auto_generated_inst ;
++-------------------------------------------------------------+-----------------------+--------------------------------+
+; Logic utilization (ALMs needed / total ALMs on device) ; 2040 / 32070 ( 6 % ) ; 0 / 32070 ( 0 % ) ;
+; ALMs needed [=A-B+C] ; 2040 ; 0 ;
+; [A] ALMs used in final placement [=a+b+c+d] ; 2259 / 32070 ( 7 % ) ; 0 / 32070 ( 0 % ) ;
+; [a] ALMs used for LUT logic and registers ; 219 ; 0 ;
+; [b] ALMs used for LUT logic ; 1784 ; 0 ;
+; [c] ALMs used for registers ; 256 ; 0 ;
+; [d] ALMs used for memory (up to half of total ALMs) ; 0 ; 0 ;
+; [B] Estimate of ALMs recoverable by dense packing ; 261 / 32070 ( < 1 % ) ; 0 / 32070 ( 0 % ) ;
+; [C] Estimate of ALMs unavailable [=a+b+c+d] ; 42 / 32070 ( < 1 % ) ; 0 / 32070 ( 0 % ) ;
+; [a] Due to location constrained logic ; 0 ; 0 ;
+; [b] Due to LAB-wide signal conflicts ; 2 ; 0 ;
+; [c] Due to LAB input limits ; 40 ; 0 ;
+; [d] Due to virtual I/Os ; 0 ; 0 ;
+; ; ; ;
+; Difficulty packing design ; Low ; Low ;
+; ; ; ;
+; Total LABs: partially or completely used ; 276 / 3207 ( 9 % ) ; 0 / 3207 ( 0 % ) ;
+; -- Logic LABs ; 276 ; 0 ;
+; -- Memory LABs (up to half of total LABs) ; 0 ; 0 ;
+; ; ; ;
+; Combinational ALUT usage for logic ; 3176 ; 0 ;
+; -- 7 input functions ; 36 ; 0 ;
+; -- 6 input functions ; 1022 ; 0 ;
+; -- 5 input functions ; 744 ; 0 ;
+; -- 4 input functions ; 688 ; 0 ;
+; -- <=3 input functions ; 686 ; 0 ;
+; Combinational ALUT usage for route-throughs ; 53 ; 0 ;
+; Memory ALUT usage ; 0 ; 0 ;
+; -- 64-address deep ; 0 ; 0 ;
+; -- 32-address deep ; 0 ; 0 ;
+; ; ; ;
+; Dedicated logic registers ; 0 ; 0 ;
+; -- By type: ; ; ;
+; -- Primary logic registers ; 950 / 64140 ( 1 % ) ; 0 / 64140 ( 0 % ) ;
+; -- Secondary logic registers ; 306 / 64140 ( < 1 % ) ; 0 / 64140 ( 0 % ) ;
+; -- By function: ; ; ;
+; -- Design implementation registers ; 950 ; 0 ;
+; -- Routing optimization registers ; 306 ; 0 ;
+; ; ; ;
+; ; ; ;
+; Virtual pins ; 0 ; 0 ;
+; I/O pins ; 81 ; 0 ;
+; I/O registers ; 0 ; 0 ;
+; Total block memory bits ; 438272 ; 0 ;
+; Total block memory implementation bits ; 552960 ; 0 ;
+; M10K block ; 54 / 397 ( 13 % ) ; 0 / 397 ( 0 % ) ;
+; Clock enable block ; 2 / 116 ( 1 % ) ; 0 / 116 ( 0 % ) ;
+; ; ; ;
+; Connections ; ; ;
+; -- Input Connections ; 0 ; 0 ;
+; -- Registered Input Connections ; 0 ; 0 ;
+; -- Output Connections ; 0 ; 0 ;
+; -- Registered Output Connections ; 0 ; 0 ;
+; ; ; ;
+; Internal Connections ; ; ;
+; -- Total Connections ; 21778 ; 0 ;
+; -- Registered Connections ; 7517 ; 0 ;
+; ; ; ;
+; External Connections ; ; ;
+; -- Top ; 0 ; 0 ;
+; -- hard_block:auto_generated_inst ; 0 ; 0 ;
+; ; ; ;
+; Partition Interface ; ; ;
+; -- Input Ports ; 15 ; 0 ;
+; -- Output Ports ; 66 ; 0 ;
+; -- Bidir Ports ; 0 ; 0 ;
+; ; ; ;
+; Registered Ports ; ; ;
+; -- Registered Input Ports ; 0 ; 0 ;
+; -- Registered Output Ports ; 0 ; 0 ;
+; ; ; ;
+; Port Connectivity ; ; ;
+; -- Input Ports driven by GND ; 0 ; 0 ;
+; -- Output Ports driven by GND ; 0 ; 0 ;
+; -- Input Ports driven by VCC ; 0 ; 0 ;
+; -- Output Ports driven by VCC ; 0 ; 0 ;
+; -- Input Ports with no Source ; 0 ; 0 ;
+; -- Output Ports with no Source ; 0 ; 0 ;
+; -- Input Ports with no Fanout ; 0 ; 0 ;
+; -- Output Ports with no Fanout ; 0 ; 0 ;
++-------------------------------------------------------------+-----------------------+--------------------------------+
+
+
++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+; Input Pins ;
++----------+-------+----------+--------------+--------------+--------------+-----------------------+--------------------+--------+----------------+-----------------+----------+--------------+--------------+-------------+---------------------------+----------------------+-----------+
+; Name ; Pin # ; I/O Bank ; X coordinate ; Y coordinate ; Z coordinate ; Combinational Fan-Out ; Registered Fan-Out ; Global ; Input Register ; PCI I/O Enabled ; Bus Hold ; Weak Pull Up ; I/O Standard ; Termination ; Termination Control Block ; Location assigned by ; Slew Rate ;
++----------+-------+----------+--------------+--------------+--------------+-----------------------+--------------------+--------+----------------+-----------------+----------+--------------+--------------+-------------+---------------------------+----------------------+-----------+
+; CLOCK_50 ; AB27 ; 5B ; 89 ; 23 ; 20 ; 1310 ; 0 ; yes ; no ; no ; no ; Off ; 2.5 V ; Off ; -- ; Fitter ; no ;
+; KEY[0] ; AG5 ; 3A ; 14 ; 0 ; 34 ; 3 ; 0 ; no ; no ; no ; no ; Off ; 2.5 V ; Off ; -- ; Fitter ; no ;
+; KEY[1] ; AH9 ; 3B ; 18 ; 0 ; 91 ; 3 ; 0 ; no ; no ; no ; no ; Off ; 2.5 V ; Off ; -- ; Fitter ; no ;
+; KEY[2] ; Y27 ; 5B ; 89 ; 25 ; 20 ; 1245 ; 0 ; yes ; no ; no ; no ; Off ; 2.5 V ; Off ; -- ; Fitter ; no ;
+; KEY[3] ; Y26 ; 5B ; 89 ; 25 ; 3 ; 0 ; 0 ; no ; no ; no ; no ; Off ; 2.5 V ; Off ; -- ; Fitter ; no ;
+; SW[0] ; AG12 ; 3B ; 26 ; 0 ; 40 ; 2 ; 0 ; no ; no ; no ; no ; Off ; 2.5 V ; Off ; -- ; Fitter ; no ;
+; SW[1] ; AC12 ; 3A ; 16 ; 0 ; 0 ; 2 ; 0 ; no ; no ; no ; no ; Off ; 2.5 V ; Off ; -- ; Fitter ; no ;
+; SW[2] ; AG10 ; 3B ; 18 ; 0 ; 74 ; 2 ; 0 ; no ; no ; no ; no ; Off ; 2.5 V ; Off ; -- ; Fitter ; no ;
+; SW[3] ; AJ5 ; 3B ; 24 ; 0 ; 34 ; 2 ; 0 ; no ; no ; no ; no ; Off ; 2.5 V ; Off ; -- ; Fitter ; no ;
+; SW[4] ; AK3 ; 3B ; 20 ; 0 ; 51 ; 2 ; 0 ; no ; no ; no ; no ; Off ; 2.5 V ; Off ; -- ; Fitter ; no ;
+; SW[5] ; AD12 ; 3A ; 16 ; 0 ; 17 ; 2 ; 0 ; no ; no ; no ; no ; Off ; 2.5 V ; Off ; -- ; Fitter ; no ;
+; SW[6] ; AK4 ; 3B ; 22 ; 0 ; 51 ; 2 ; 0 ; no ; no ; no ; no ; Off ; 2.5 V ; Off ; -- ; Fitter ; no ;
+; SW[7] ; AK2 ; 3B ; 20 ; 0 ; 34 ; 2 ; 0 ; no ; no ; no ; no ; Off ; 2.5 V ; Off ; -- ; Fitter ; no ;
+; SW[8] ; AK7 ; 3B ; 28 ; 0 ; 34 ; 2 ; 0 ; no ; no ; no ; no ; Off ; 2.5 V ; Off ; -- ; Fitter ; no ;
+; SW[9] ; AH8 ; 3B ; 32 ; 0 ; 51 ; 2 ; 0 ; no ; no ; no ; no ; Off ; 2.5 V ; Off ; -- ; Fitter ; no ;
++----------+-------+----------+--------------+--------------+--------------+-----------------------+--------------------+--------+----------------+-----------------+----------+--------------+--------------+-------------+---------------------------+----------------------+-----------+
+
+
++--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+; Output Pins ;
++-------------+-------+----------+--------------+--------------+--------------+-----------------+------------------------+-----------+-----------------+------------+---------------+----------+--------------+--------------+------------------+-----------------------------------+---------------------------+----------------------------+-----------------------------+---------------------+-----------------------------+----------------------+----------------------+---------------------+
+; Name ; Pin # ; I/O Bank ; X coordinate ; Y coordinate ; Z coordinate ; Output Register ; Output Enable Register ; Slew Rate ; PCI I/O Enabled ; Open Drain ; TRI Primitive ; Bus Hold ; Weak Pull Up ; I/O Standard ; Current Strength ; Termination ; Termination Control Block ; Output Buffer Pre-emphasis ; Voltage Output Differential ; Output Buffer Delay ; Output Buffer Delay Control ; Location assigned by ; Output Enable Source ; Output Enable Group ;
++-------------+-------+----------+--------------+--------------+--------------+-----------------+------------------------+-----------+-----------------+------------+---------------+----------+--------------+--------------+------------------+-----------------------------------+---------------------------+----------------------------+-----------------------------+---------------------+-----------------------------+----------------------+----------------------+---------------------+
+; HEX0[0] ; AB13 ; 3B ; 20 ; 0 ; 17 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; HEX0[1] ; E6 ; 8A ; 4 ; 81 ; 51 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; HEX0[2] ; W16 ; 4A ; 52 ; 0 ; 17 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; HEX0[3] ; AA16 ; 4A ; 56 ; 0 ; 0 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; HEX0[4] ; AB17 ; 4A ; 56 ; 0 ; 17 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; HEX0[5] ; J14 ; 8A ; 32 ; 81 ; 17 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; HEX0[6] ; AE16 ; 4A ; 52 ; 0 ; 34 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; HEX1[0] ; AJ7 ; 3B ; 26 ; 0 ; 91 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; HEX1[1] ; AB28 ; 5B ; 89 ; 21 ; 37 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; HEX1[2] ; V16 ; 4A ; 52 ; 0 ; 0 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; HEX1[3] ; G11 ; 8A ; 10 ; 81 ; 57 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; HEX1[4] ; AG8 ; 3A ; 8 ; 0 ; 51 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; HEX1[5] ; AB30 ; 5B ; 89 ; 21 ; 3 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; HEX1[6] ; AJ9 ; 3B ; 30 ; 0 ; 34 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; HEX2[0] ; AD11 ; 3A ; 2 ; 0 ; 40 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; HEX2[1] ; AE17 ; 4A ; 50 ; 0 ; 40 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; HEX2[2] ; E12 ; 8A ; 22 ; 81 ; 0 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; HEX2[3] ; H7 ; 8A ; 16 ; 81 ; 17 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; HEX2[4] ; AC29 ; 5B ; 89 ; 20 ; 94 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; HEX2[5] ; Y17 ; 4A ; 68 ; 0 ; 0 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; HEX2[6] ; AC28 ; 5B ; 89 ; 20 ; 77 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; HEX3[0] ; AG27 ; 5A ; 89 ; 4 ; 77 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; HEX3[1] ; AF13 ; 3B ; 22 ; 0 ; 17 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; HEX3[2] ; AD20 ; 4A ; 82 ; 0 ; 40 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; HEX3[3] ; AK11 ; 3B ; 34 ; 0 ; 57 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; HEX3[4] ; AK8 ; 3B ; 28 ; 0 ; 51 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; HEX3[5] ; AJ10 ; 3B ; 34 ; 0 ; 91 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; HEX3[6] ; AA30 ; 5B ; 89 ; 21 ; 20 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; LEDR[0] ; H8 ; 8A ; 24 ; 81 ; 0 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; LEDR[1] ; G7 ; 8A ; 2 ; 81 ; 74 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; LEDR[2] ; A8 ; 8A ; 34 ; 81 ; 91 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; LEDR[3] ; AH23 ; 4A ; 70 ; 0 ; 34 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; LEDR[4] ; AD29 ; 5B ; 89 ; 23 ; 54 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; LEDR[5] ; AA21 ; 4A ; 88 ; 0 ; 1 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; LEDR[6] ; AG1 ; 3A ; 10 ; 0 ; 40 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; LEDR[7] ; AK16 ; 4A ; 54 ; 0 ; 51 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; LEDR[8] ; Y21 ; 5A ; 89 ; 6 ; 20 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; LEDR[9] ; A5 ; 8A ; 26 ; 81 ; 91 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; VGA_BLANK_N ; AF15 ; 3B ; 32 ; 0 ; 17 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; VGA_B[0] ; AB15 ; 3B ; 28 ; 0 ; 0 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; VGA_B[1] ; D4 ; 8A ; 10 ; 81 ; 91 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; VGA_B[2] ; AF9 ; 3A ; 8 ; 0 ; 34 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; VGA_B[3] ; D5 ; 8A ; 20 ; 81 ; 34 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; VGA_B[4] ; AH30 ; 5A ; 89 ; 16 ; 37 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; VGA_B[5] ; AE13 ; 3B ; 22 ; 0 ; 0 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; VGA_B[6] ; E4 ; 8A ; 10 ; 81 ; 74 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; VGA_B[7] ; E2 ; 8A ; 8 ; 81 ; 51 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; VGA_CLK ; AF16 ; 4A ; 52 ; 0 ; 51 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; VGA_G[0] ; Y18 ; 4A ; 72 ; 0 ; 0 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; VGA_G[1] ; AH17 ; 4A ; 56 ; 0 ; 34 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; VGA_G[2] ; AE18 ; 4A ; 66 ; 0 ; 40 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; VGA_G[3] ; C7 ; 8A ; 32 ; 81 ; 34 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; VGA_G[4] ; Y24 ; 5A ; 89 ; 13 ; 20 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; VGA_G[5] ; AK9 ; 3B ; 30 ; 0 ; 51 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; VGA_G[6] ; H14 ; 8A ; 28 ; 81 ; 0 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; VGA_G[7] ; AH22 ; 4A ; 66 ; 0 ; 91 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; VGA_HS ; AK12 ; 3B ; 36 ; 0 ; 34 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; VGA_R[0] ; AH14 ; 3B ; 30 ; 0 ; 17 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; VGA_R[1] ; AB12 ; 3A ; 12 ; 0 ; 17 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; VGA_R[2] ; AH13 ; 3B ; 30 ; 0 ; 0 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; VGA_R[3] ; AG6 ; 3A ; 12 ; 0 ; 51 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; VGA_R[4] ; AJ4 ; 3B ; 22 ; 0 ; 34 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; VGA_R[5] ; AJ1 ; 3A ; 14 ; 0 ; 0 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; VGA_R[6] ; AK6 ; 3B ; 24 ; 0 ; 51 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; VGA_R[7] ; AA13 ; 3B ; 20 ; 0 ; 0 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
+; VGA_VS ; AF14 ; 3B ; 32 ; 0 ; 0 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ;
++-------------+-------+----------+--------------+--------------+--------------+-----------------+------------------------+-----------+-----------------+------------+---------------+----------+--------------+--------------+------------------+-----------------------------------+---------------------------+----------------------------+-----------------------------+---------------------+-----------------------------+----------------------+----------------------+---------------------+
+
+
++----------------------------------------------------------------------------+
+; I/O Bank Usage ;
++----------+------------------+---------------+--------------+---------------+
+; I/O Bank ; Usage ; VCCIO Voltage ; VREF Voltage ; VCCPD Voltage ;
++----------+------------------+---------------+--------------+---------------+
+; B2L ; 0 / 0 ( -- ) ; -- ; -- ; -- ;
+; B1L ; 0 / 0 ( -- ) ; -- ; -- ; -- ;
+; 3A ; 10 / 32 ( 31 % ) ; 2.5V ; -- ; 2.5V ;
+; 3B ; 27 / 48 ( 56 % ) ; 2.5V ; -- ; 2.5V ;
+; 4A ; 16 / 80 ( 20 % ) ; 2.5V ; -- ; 2.5V ;
+; 5A ; 4 / 32 ( 13 % ) ; 2.5V ; -- ; 2.5V ;
+; 5B ; 9 / 16 ( 56 % ) ; 2.5V ; -- ; 2.5V ;
+; 6B ; 0 / 44 ( 0 % ) ; 2.5V ; -- ; 2.5V ;
+; 6A ; 0 / 56 ( 0 % ) ; 2.5V ; -- ; 2.5V ;
+; 7A ; 0 / 19 ( 0 % ) ; 2.5V ; -- ; 2.5V ;
+; 7B ; 0 / 22 ( 0 % ) ; 2.5V ; -- ; 2.5V ;
+; 7C ; 0 / 12 ( 0 % ) ; 2.5V ; -- ; 2.5V ;
+; 7D ; 0 / 14 ( 0 % ) ; 2.5V ; -- ; 2.5V ;
+; 8A ; 15 / 80 ( 19 % ) ; 2.5V ; -- ; 2.5V ;
++----------+------------------+---------------+--------------+---------------+
+
+
++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+; All Package Pins ;
++----------+------------+----------------+---------------------------------+--------+--------------+---------------------+--------------+-----------------+----------+--------------+
+; Location ; Pad Number ; I/O Bank ; Pin Name/Usage ; Dir. ; I/O Standard ; Voltage ; I/O Type ; User Assignment ; Bus Hold ; Weak Pull Up ;
++----------+------------+----------------+---------------------------------+--------+--------------+---------------------+--------------+-----------------+----------+--------------+
+; A2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; A3 ; 493 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; A4 ; 491 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; A5 ; 489 ; 8A ; LEDR[9] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; A6 ; 487 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; A7 ; ; 8A ; VCCIO8A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; A8 ; 473 ; 8A ; LEDR[2] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; A9 ; 471 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; A10 ; 465 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; A11 ; 463 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; A12 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; A13 ; 461 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; A14 ; 455 ; 7D ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; A15 ; 447 ; 7D ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; A16 ; 439 ; 7C ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; A17 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; A18 ; 425 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; A19 ; 423 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; A20 ; 415 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; A21 ; 411 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; A22 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; A23 ; 395 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; A24 ; 391 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; A25 ; 389 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; A26 ; 382 ; 7A ; ^GND ; ; ; ; -- ; ; -- ; -- ;
+; A27 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; A28 ; 380 ; 7A ; ^HPS_TRST ; ; ; ; -- ; ; -- ; -- ;
+; A29 ; 378 ; 7A ; ^HPS_TMS ; ; ; ; -- ; ; -- ; -- ;
+; AA1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AA2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AA3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AA4 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AA5 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; AA6 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AA7 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
+; AA8 ; ; -- ; VCCA_FPLL ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AA9 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AA10 ; ; 3A ; VCCPD3A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AA11 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AA12 ; 74 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AA13 ; 90 ; 3B ; VGA_R[7] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AA14 ; 122 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AA15 ; 120 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AA16 ; 146 ; 4A ; HEX0[3] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AA17 ; ; 4A ; VCCIO4A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AA18 ; 168 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AA19 ; 176 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AA20 ; 200 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AA21 ; 210 ; 4A ; LEDR[5] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AA22 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AA23 ; ; -- ; VCCPGM ; power ; ; 1.8V/2.5V/3.0V/3.3V ; -- ; ; -- ; -- ;
+; AA24 ; 228 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; AA25 ; 224 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; AA26 ; 252 ; 5B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; AA27 ; ; 5B ; VCCIO5B ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AA28 ; 251 ; 5B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; AA29 ; ; 5B ; VREFB5BN0 ; power ; ; ; -- ; ; -- ; -- ;
+; AA30 ; 250 ; 5B ; HEX3[6] ; output ; 2.5 V ; ; Row I/O ; N ; no ; Off ;
+; AB1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AB2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AB3 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
+; AB4 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
+; AB5 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AB6 ; ; -- ; VCCA_FPLL ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AB7 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AB8 ; 43 ; 3A ; ^nCSO, DATA4 ; ; ; ; Weak Pull Up ; ; -- ; On ;
+; AB9 ; 42 ; 3A ; #TDO ; output ; ; ; -- ; ; -- ; -- ;
+; AB10 ; ; -- ; VCCPGM ; power ; ; 1.8V/2.5V/3.0V/3.3V ; -- ; ; -- ; -- ;
+; AB11 ; ; -- ; VCC_AUX ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AB12 ; 72 ; 3A ; VGA_R[1] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AB13 ; 88 ; 3B ; HEX0[0] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AB14 ; ; 3B ; VCCIO3B ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AB15 ; 106 ; 3B ; VGA_B[0] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AB16 ; ; -- ; VCC_AUX ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AB17 ; 144 ; 4A ; HEX0[4] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AB18 ; ; 3B, 4A ; VCCPD3B4A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AB19 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AB20 ; ; 3B, 4A ; VCCPD3B4A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AB21 ; 208 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AB22 ; 225 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; AB23 ; 227 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; AB24 ; ; 5A ; VCCIO5A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AB25 ; 230 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; AB26 ; 226 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; AB27 ; 254 ; 5B ; CLOCK_50 ; input ; 2.5 V ; ; Row I/O ; N ; no ; Off ;
+; AB28 ; 249 ; 5B ; HEX1[1] ; output ; 2.5 V ; ; Row I/O ; N ; no ; Off ;
+; AB29 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AB30 ; 248 ; 5B ; HEX1[5] ; output ; 2.5 V ; ; Row I/O ; N ; no ; Off ;
+; AC1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AC2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AC3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AC4 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AC5 ; 46 ; 3A ; #TCK ; input ; ; ; -- ; ; -- ; -- ;
+; AC6 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AC7 ; 45 ; 3A ; ^AS_DATA3, DATA3 ; ; ; ; Weak Pull Up ; ; -- ; On ;
+; AC8 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AC9 ; 58 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AC10 ; ; 3A ; VCCPD3A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AC11 ; ; 3A ; VCCIO3A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AC12 ; 82 ; 3A ; SW[1] ; input ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AC13 ; ; 3B, 4A ; VCCPD3B4A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AC14 ; 104 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AC15 ; ; 3B, 4A ; VCCPD3B4A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AC16 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AC17 ; ; 3B, 4A ; VCCPD3B4A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AC18 ; 162 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AC19 ; ; 3B, 4A ; VCCPD3B4A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AC20 ; 186 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AC21 ; ; 4A ; VCCIO4A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AC22 ; 207 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AC23 ; 205 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AC24 ; ; 5A ; VREFB5AN0 ; power ; ; ; -- ; ; -- ; -- ;
+; AC25 ; 215 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; AC26 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AC27 ; 242 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; AC28 ; 245 ; 5B ; HEX2[6] ; output ; 2.5 V ; ; Row I/O ; N ; no ; Off ;
+; AC29 ; 247 ; 5B ; HEX2[4] ; output ; 2.5 V ; ; Row I/O ; N ; no ; Off ;
+; AC30 ; 259 ; 5B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; AD1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AD2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AD3 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
+; AD4 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
+; AD5 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AD6 ; ; 3A ; VREFB3AN0 ; power ; ; ; -- ; ; -- ; -- ;
+; AD7 ; 62 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AD8 ; ; 3A ; VCCIO3A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AD9 ; 55 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AD10 ; 56 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AD11 ; 54 ; 3A ; HEX2[0] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AD12 ; 80 ; 3A ; SW[5] ; input ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AD13 ; ; 3B ; VCCIO3B ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AD14 ; 98 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AD15 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
+; AD16 ; ; 3B, 4A ; VCCPD3B4A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AD17 ; 160 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AD18 ; ; 4A ; VCCIO4A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AD19 ; 184 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AD20 ; 199 ; 4A ; HEX3[2] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AD21 ; 197 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AD22 ; ; -- ; VCC_AUX ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AD23 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AD24 ; 211 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AD25 ; 213 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; AD26 ; 240 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; AD27 ; 222 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; AD28 ; ; 5A ; VCCIO5A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AD29 ; 255 ; 5B ; LEDR[4] ; output ; 2.5 V ; ; Row I/O ; N ; no ; Off ;
+; AD30 ; 257 ; 5B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; AE1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AE2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AE3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AE4 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AE5 ; 49 ; 3A ; ^AS_DATA1, DATA1 ; ; ; ; Weak Pull Up ; ; -- ; On ;
+; AE6 ; 51 ; 3A ; ^AS_DATA0, ASDO, DATA0 ; ; ; ; Weak Pull Up ; ; -- ; On ;
+; AE7 ; 60 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AE8 ; 47 ; 3A ; ^AS_DATA2, DATA2 ; ; ; ; Weak Pull Up ; ; -- ; On ;
+; AE9 ; 53 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AE10 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AE11 ; 59 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AE12 ; 52 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AE13 ; 95 ; 3B ; VGA_B[5] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AE14 ; 96 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AE15 ; ; 3B ; VCCIO3B ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AE16 ; 139 ; 4A ; HEX0[6] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AE17 ; 135 ; 4A ; HEX2[1] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AE18 ; 167 ; 4A ; VGA_G[2] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AE19 ; 165 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AE20 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AE21 ; ; 3B, 4A ; VCCPD3B4A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AE22 ; 191 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AE23 ; 189 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AE24 ; 209 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AE25 ; ; 4A ; VCCIO4A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AE26 ; 220 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; AE27 ; 229 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; AE28 ; 231 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; AE29 ; 253 ; 5B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; AE30 ; ; 5B ; VCCIO5B ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AF1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AF2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AF3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AF4 ; 66 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AF5 ; 64 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AF6 ; 75 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AF7 ; ; 3A ; VCCIO3A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AF8 ; 70 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AF9 ; 67 ; 3A ; VGA_B[2] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AF10 ; 57 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AF11 ; 87 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AF12 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AF13 ; 93 ; 3B ; HEX3[1] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AF14 ; 114 ; 3B ; VGA_VS ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AF15 ; 112 ; 3B ; VGA_BLANK_N ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AF16 ; 137 ; 4A ; VGA_CLK ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AF17 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AF18 ; 133 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AF19 ; 159 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AF20 ; 175 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AF21 ; 173 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AF22 ; ; 4A ; VCCIO4A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AF23 ; 183 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AF24 ; 181 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AF25 ; 206 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AF26 ; 204 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AF27 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AF28 ; 235 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; AF29 ; 237 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; AF30 ; 239 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; AG1 ; 71 ; 3A ; LEDR[6] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AG2 ; 83 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AG3 ; 63 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AG4 ; ; 3A ; VCCIO3A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AG5 ; 78 ; 3A ; KEY[0] ; input ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AG6 ; 73 ; 3A ; VGA_R[3] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AG7 ; 68 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AG8 ; 65 ; 3A ; HEX1[4] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AG9 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AG10 ; 86 ; 3B ; SW[2] ; input ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AG11 ; 85 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AG12 ; 103 ; 3B ; SW[0] ; input ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AG13 ; 101 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AG14 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AG15 ; 127 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AG16 ; 134 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AG17 ; 132 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AG18 ; 150 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AG19 ; ; 4A ; VCCIO4A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AG20 ; 157 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AG21 ; 143 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AG22 ; 166 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AG23 ; 163 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AG24 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AG25 ; 190 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AG26 ; 203 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AG27 ; 212 ; 5A ; HEX3[0] ; output ; 2.5 V ; ; Row I/O ; N ; no ; Off ;
+; AG28 ; 233 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; AG29 ; ; 5A ; VCCIO5A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AG30 ; 243 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; AH1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AH2 ; 69 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AH3 ; 81 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AH4 ; 61 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AH5 ; 76 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AH6 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AH7 ; 115 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AH8 ; 113 ; 3B ; SW[9] ; input ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AH9 ; 84 ; 3B ; KEY[1] ; input ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AH10 ; 118 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AH11 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AH12 ; 126 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AH13 ; 111 ; 3B ; VGA_R[2] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AH14 ; 109 ; 3B ; VGA_R[0] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AH15 ; 125 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AH16 ; ; 4A ; VCCIO4A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AH17 ; 147 ; 4A ; VGA_G[1] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AH18 ; 145 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AH19 ; 148 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AH20 ; 141 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AH21 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AH22 ; 164 ; 4A ; VGA_G[7] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AH23 ; 174 ; 4A ; LEDR[3] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AH24 ; 161 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AH25 ; 188 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AH26 ; ; 4A ; VCCIO4A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AH27 ; 201 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AH28 ; 214 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; AH29 ; 218 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; AH30 ; 241 ; 5A ; VGA_B[4] ; output ; 2.5 V ; ; Row I/O ; N ; no ; Off ;
+; AJ1 ; 79 ; 3A ; VGA_R[5] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AJ2 ; 77 ; 3A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AJ3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AJ4 ; 94 ; 3B ; VGA_R[4] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AJ5 ; 99 ; 3B ; SW[3] ; input ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AJ6 ; 102 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AJ7 ; 100 ; 3B ; HEX1[0] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AJ8 ; ; 3B ; VCCIO3B ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AJ9 ; 110 ; 3B ; HEX1[6] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AJ10 ; 116 ; 3B ; HEX3[5] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AJ11 ; 119 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AJ12 ; 124 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AJ13 ; ; 3B ; VCCIO3B ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AJ14 ; 131 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AJ15 ; ; 3B ; VREFB3BN0 ; power ; ; ; -- ; ; -- ; -- ;
+; AJ16 ; 142 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AJ17 ; 151 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AJ18 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AJ19 ; 155 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AJ20 ; 158 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AJ21 ; 156 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AJ22 ; 172 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AJ23 ; ; 4A ; VCCIO4A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AJ24 ; 182 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AJ25 ; 180 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AJ26 ; 187 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AJ27 ; 195 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AJ28 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AJ29 ; 216 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; AJ30 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AK2 ; 91 ; 3B ; SW[7] ; input ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AK3 ; 89 ; 3B ; SW[4] ; input ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AK4 ; 92 ; 3B ; SW[6] ; input ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AK5 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AK6 ; 97 ; 3B ; VGA_R[6] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AK7 ; 107 ; 3B ; SW[8] ; input ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AK8 ; 105 ; 3B ; HEX3[4] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AK9 ; 108 ; 3B ; VGA_G[5] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AK10 ; ; 3B ; VCCIO3B ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AK11 ; 117 ; 3B ; HEX3[3] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AK12 ; 123 ; 3B ; VGA_HS ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AK13 ; 121 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AK14 ; 129 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AK15 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AK16 ; 140 ; 4A ; LEDR[7] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; AK17 ; ; 4A ; VREFB4AN0 ; power ; ; ; -- ; ; -- ; -- ;
+; AK18 ; 149 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AK19 ; 153 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AK20 ; ; 4A ; VCCIO4A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; AK21 ; 171 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AK22 ; 169 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AK23 ; 179 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AK24 ; 177 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AK25 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; AK26 ; 185 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AK27 ; 193 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AK28 ; 198 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; AK29 ; 196 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; B1 ; 509 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; B2 ; 507 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; B3 ; 513 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; B4 ; ; 8A ; VCCIO8A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; B5 ; 512 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; B6 ; 510 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; B7 ; 477 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; B8 ; 481 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; B9 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; B10 ; ; 8A ; VREFB8AN0 ; power ; ; ; -- ; ; -- ; -- ;
+; B11 ; 469 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; B12 ; 464 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; B13 ; 459 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; B14 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; B15 ; 451 ; 7D ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; B16 ; 441 ; 7C ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; B17 ; 431 ; 7C ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; B18 ; 418 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; B19 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; B20 ; 417 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; B21 ; 413 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; B22 ; 399 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; B23 ; 397 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; B24 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; B25 ; 387 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; B26 ; 386 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; B27 ; 381 ; 7A ; ^HPS_TDI ; ; ; ; -- ; ; -- ; -- ;
+; B28 ; 376 ; 7A ; ^HPS_TDO ; ; ; ; -- ; ; -- ; -- ;
+; B29 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; B30 ; 365 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; C1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; C2 ; 517 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; C3 ; 511 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; C4 ; 501 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; C5 ; 497 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; C6 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; C7 ; 475 ; 8A ; VGA_G[3] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; C8 ; 479 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; C9 ; 485 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; C10 ; 483 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; C11 ; ; 8A ; VCCIO8A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; C12 ; 467 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; C13 ; 462 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; C14 ; 448 ; 7D ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; C15 ; 453 ; 7D ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; C16 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; C17 ; 433 ; 7C ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; C18 ; 435 ; 7C ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; C19 ; 427 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; C20 ; 421 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; C21 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; C22 ; 396 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; C23 ; 401 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; C24 ; 393 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; C25 ; 388 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; C26 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; C27 ; 374 ; 7A ; ^HPS_nRST ; ; ; ; -- ; ; -- ; -- ;
+; C28 ; 369 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; C29 ; 367 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; C30 ; 363 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; D1 ; 529 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; D2 ; 515 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; D3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; D4 ; 521 ; 8A ; VGA_B[1] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; D5 ; 499 ; 8A ; VGA_B[3] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; D6 ; 495 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; D7 ; 505 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; D8 ; ; 8A ; VCCIO8A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; D9 ; 480 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; D10 ; 472 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; D11 ; 470 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; D12 ; 496 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; D13 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; D14 ; 446 ; 7D ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; D15 ; 449 ; 7D ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; D16 ; 445 ; 7D ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; D17 ; 440 ; 7C ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; D18 ; ; 7C ; VCCIO7C_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; D19 ; 426 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; D20 ; 420 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; D21 ; 419 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; D22 ; 402 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; D23 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; D24 ; 404 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; D25 ; 384 ; 7A ; ^HPS_CLK1 ; ; ; ; -- ; ; -- ; -- ;
+; D26 ; 373 ; 7A ; ^GND ; ; ; ; -- ; ; -- ; -- ;
+; D27 ; 371 ; 6A ; HPS_RZQ_0 ; ; ; ; -- ; ; no ; On ;
+; D28 ; ; 6A ; VCCIO6A_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; D29 ; 361 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; D30 ; 359 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; E1 ; 527 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; E2 ; 525 ; 8A ; VGA_B[7] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; E3 ; 523 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; E4 ; 519 ; 8A ; VGA_B[6] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; E5 ; ; 8A ; VCCIO8A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; E6 ; 533 ; 8A ; HEX0[1] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; E7 ; 531 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; E8 ; 503 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; E9 ; 478 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; E10 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; E11 ; 504 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; E12 ; 494 ; 8A ; HEX2[2] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; E13 ; 488 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; E14 ; 454 ; 7D ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; E15 ; ; 7D ; VCCIO7D_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; E16 ; 443 ; 7D ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; E17 ; 438 ; 7C ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; E18 ; 437 ; 7C ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; E19 ; 424 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; E20 ; ; 7B ; VCCIO7B_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; E21 ; 412 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; E22 ; ; 7A, 7B, 7C, 7D ; VREFB7A7B7C7DN0_HPS ; power ; ; ; -- ; ; -- ; -- ;
+; E23 ; 394 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; E24 ; 403 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; E25 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; E26 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
+; E27 ; 357 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; E28 ; 351 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; E29 ; 353 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; E30 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; F1 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
+; F2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; F3 ; 539 ; 9A ; ^CONF_DONE ; ; ; ; -- ; ; -- ; -- ;
+; F4 ; 541 ; 9A ; ^nSTATUS ; ; ; ; -- ; ; -- ; -- ;
+; F5 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; F6 ; 537 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; F7 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; F8 ; 536 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; F9 ; 534 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; F10 ; 528 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; F11 ; 502 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; F12 ; ; 8A ; VCCIO8A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; F13 ; 486 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; F14 ; 468 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; F15 ; 466 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; F16 ; 442 ; 7D ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; F17 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; F18 ; 430 ; 7C ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; F19 ; 410 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; F20 ; 407 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; F21 ; 409 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; F22 ; ; 7A ; VCCIO7A_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; F23 ; 375 ; 7A ; ^HPS_nPOR ; ; ; ; -- ; ; -- ; -- ;
+; F24 ; 383 ; 7A ; ^HPS_PORSEL ; ; ; ; -- ; ; -- ; -- ;
+; F25 ; 385 ; 7A ; ^HPS_CLK2 ; ; ; ; -- ; ; -- ; -- ;
+; F26 ; 341 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; F27 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; F28 ; 345 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; F29 ; 349 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; F30 ; 347 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; G1 ; ; ; GND ; ; ; ; -- ; ; -- ; -- ;
+; G2 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
+; G3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; G4 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; G5 ; 542 ; 9A ; ^nCE ; ; ; ; -- ; ; -- ; -- ;
+; G6 ; 543 ; 9A ; ^MSEL2 ; ; ; ; -- ; ; -- ; -- ;
+; G7 ; 535 ; 8A ; LEDR[1] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; G8 ; 492 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; G9 ; ; 8A ; VCCIO8A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; G10 ; 526 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; G11 ; 520 ; 8A ; HEX1[3] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; G12 ; 518 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; G13 ; 484 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; G14 ; ; 8A ; VCCIO8A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; G15 ; 460 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; G16 ; 444 ; 7D ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; G17 ; 436 ; 7C ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; G18 ; 432 ; 7C ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; G19 ; ; 7B ; VCCIO7B_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; G20 ; 416 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; G21 ; 392 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; G22 ; 400 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; G23 ; 377 ; 7A ; ^VCCRSTCLK_HPS ; ; ; ; -- ; ; -- ; -- ;
+; G24 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; G25 ; 370 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; G26 ; 362 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; G27 ; 339 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; -- ; -- ;
+; G28 ; 335 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; G29 ; ; 6A ; VCCIO6A_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; G30 ; 343 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; H1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; H2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; H3 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
+; H4 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
+; H5 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; H6 ; ; 8A ; VCCIO8A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; H7 ; 508 ; 8A ; HEX2[3] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; H8 ; 490 ; 8A ; LEDR[0] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; H9 ; ; -- ; VCCBAT ; power ; ; 1.2V ; -- ; ; -- ; -- ;
+; H10 ; ; -- ; VCC_AUX ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; H11 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; H12 ; 500 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; H13 ; 498 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; H14 ; 482 ; 8A ; VGA_G[6] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; H15 ; 458 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; H16 ; ; 7D ; VCCIO7D_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; H17 ; 434 ; 7C ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; H18 ; 422 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; H19 ; 406 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; H20 ; 398 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; H21 ; ; 7A ; VCCIO7A_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; H22 ; 379 ; 7A ; ^HPS_TCK ; ; ; ; -- ; ; -- ; -- ;
+; H23 ; 390 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; H24 ; 364 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; H25 ; 368 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; H26 ; ; 6A ; VCCIO6A_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; H27 ; 360 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; H28 ; 333 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; H29 ; 331 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; H30 ; 337 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; J1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; J2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; J3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; J4 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; J5 ; 545 ; 9A ; ^nCONFIG ; ; ; ; -- ; ; -- ; -- ;
+; J6 ; 547 ; 9A ; ^GND ; ; ; ; -- ; ; -- ; -- ;
+; J7 ; 506 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; J8 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; J9 ; 532 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; J10 ; 530 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; J11 ; ; -- ; VCCPGM ; power ; ; 1.8V/2.5V/3.0V/3.3V ; -- ; ; -- ; -- ;
+; J12 ; 516 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; J13 ; ; 8A ; VCCIO8A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; J14 ; 476 ; 8A ; HEX0[5] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; J15 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
+; J16 ; ; -- ; VCC_AUX ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; J17 ; ; 7C ; VCCPD7C_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; J18 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; J19 ; 408 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; J20 ; ; -- ; VCCRSTCLK_HPS ; power ; ; 1.8V/2.5V/3.0V/3.3V ; -- ; ; -- ; -- ;
+; J21 ; ; -- ; VCC_AUX_SHARED ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; J22 ; 372 ; 7A ; ^GND ; ; ; ; -- ; ; -- ; -- ;
+; J23 ; 354 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; J24 ; 352 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; J25 ; 344 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; J26 ; 323 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; J27 ; 346 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; J28 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; J29 ; 327 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; J30 ; 329 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; K1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; K2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; K3 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
+; K4 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
+; K5 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; K6 ; 540 ; 9A ; ^MSEL1 ; ; ; ; -- ; ; -- ; -- ;
+; K7 ; 522 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; K8 ; 524 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; K9 ; ; -- ; VCCA_FPLL ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; K10 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; K11 ; ; 8A ; VCCPD8A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; K12 ; 514 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; K13 ; ; 8A ; VCCPD8A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; K14 ; 474 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; K15 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; K16 ; ; 7D ; VCCPD7D_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; K17 ; 414 ; 7B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; K18 ; ; 7B ; VCCPD7B_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; K19 ; ; 7A ; VCCPD7A_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; K20 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; K21 ; 366 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; K22 ; 336 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; K23 ; 338 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; K24 ; ; 6A ; VCCIO6A_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; K25 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; K26 ; 322 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; K27 ; 319 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; K28 ; 325 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; K29 ; 321 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; K30 ; ; 6A ; VCCIO6A_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; L1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; L2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; L3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; L4 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; L5 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; L6 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; L7 ; 544 ; 9A ; ^MSEL3 ; ; ; ; -- ; ; -- ; -- ;
+; L8 ; 538 ; 9A ; ^MSEL0 ; ; ; ; -- ; ; -- ; -- ;
+; L9 ; 546 ; 9A ; ^MSEL4 ; ; ; ; -- ; ; -- ; -- ;
+; L10 ; ; 8A ; VCCPD8A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; L11 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; L12 ; ; 8A ; VCCPD8A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; L13 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; L14 ; ; 8A ; VCCPD8A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; L15 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; L16 ; ; -- ; VCC_HPS ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; L17 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; L18 ; ; -- ; VCC_HPS ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; L19 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; L20 ; ; -- ; VCC_HPS ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; L21 ; ; -- ; VCCPLL_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; L22 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; L23 ; 350 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; L24 ; 328 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; L25 ; 330 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; L26 ; 320 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; L27 ; ; 6A ; VCCIO6A_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; L28 ; 313 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; L29 ; 315 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; L30 ; 317 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; M1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; M2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; M3 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
+; M4 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
+; M5 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; M6 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; M7 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; M8 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; M9 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; M10 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; M11 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; M12 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; M13 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; M14 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; M15 ; ; -- ; VCC_HPS ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; M16 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; M17 ; 450 ; 7D ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; M18 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; M19 ; 334 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; M20 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; M21 ; ; 6A, 6B ; VCCPD6A6B_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; M22 ; 308 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; M23 ; 348 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; M24 ; ; 6A ; VCCIO6A_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; M25 ; 324 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; M26 ; 314 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; M27 ; 312 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; M28 ; 309 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; M29 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; M30 ; 311 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; N1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; N2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; N3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; N4 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; N5 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; N6 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; N7 ; ; -- ; VCCA_FPLL ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; N8 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; N9 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; N10 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; N11 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; N12 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; N13 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; N14 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; N15 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; N16 ; 452 ; 7D ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; N17 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; N18 ; 332 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; N19 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; N20 ; ; -- ; VCC_HPS ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; N21 ; ; 6A ; VCCIO6A_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; N22 ; ; 6A, 6B ; VCCPD6A6B_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; N23 ; 310 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; N24 ; 318 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; N25 ; 316 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; N26 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; N27 ; 297 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; N28 ; 303 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; N29 ; 305 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; N30 ; 307 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; P1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; P2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; P3 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
+; P4 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
+; P5 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; P6 ; ; -- ; VCCA_FPLL ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; P7 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; P8 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; P9 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; P10 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; P11 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; P12 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; P13 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; P14 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; P15 ; ; -- ; VCC_HPS ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; P16 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; P17 ; ; -- ; VCC_HPS ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; P18 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; P19 ; ; -- ; VCC_HPS ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; P20 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; P21 ; ; 6A, 6B ; VCCPD6A6B_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; P22 ; 294 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; P23 ; ; 6B ; VCCIO6B_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; P24 ; 290 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; P25 ; 288 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; P26 ; 298 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; P27 ; 296 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; P28 ; ; 6B ; VCCIO6B_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; P29 ; 299 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; P30 ; 301 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; R1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; R2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; R3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; R4 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; R5 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; R6 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; R7 ; ; -- ; VCCA_FPLL ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; R8 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; R9 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; R10 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; R11 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; R12 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; R13 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; R14 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; R15 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; R16 ; ; -- ; VCC_HPS ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; R17 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; R18 ; 302 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; R19 ; 300 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; R20 ; ; 6A, 6B ; VCCPD6A6B_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; R21 ; 286 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; R22 ; 284 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; R23 ; ; 6A, 6B ; VCCPD6A6B_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; R24 ; 272 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; R25 ; ; 6B ; VCCIO6B_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; R26 ; 280 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; R27 ; 282 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; R28 ; 293 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; R29 ; 295 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; R30 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; T1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; T2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; T3 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
+; T4 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
+; T5 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; T6 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; T7 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; T8 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; T9 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; T10 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; T11 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; T12 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; T13 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; T14 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; T15 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; T16 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; T17 ; ; -- ; VCC_HPS ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; T18 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; T19 ; ; -- ; VCC_HPS ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; T20 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; T21 ; 278 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; T22 ; ; 6B ; VCCIO6B_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; T23 ; 270 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; T24 ; 268 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; T25 ; 266 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; T26 ; 304 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; T27 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; T28 ; 287 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; T29 ; 289 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; T30 ; 291 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; U1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; U2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; U3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; U4 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; U5 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; U6 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; U7 ; 50 ; 3A ; ^DCLK ; ; ; ; Weak Pull Up ; ; -- ; On ;
+; U8 ; 48 ; 3A ; #TDI ; input ; ; ; -- ; ; -- ; -- ;
+; U9 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; U10 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; U11 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; U12 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; U13 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; U14 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; U15 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; U16 ; ; -- ; VCC_HPS ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; U17 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; U18 ; ; -- ; VCC_HPS ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; U19 ; ; 6B ; VCCIO6B_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; U20 ; 276 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; U21 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; U22 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; U23 ; ; 5B ; VCCPD5B ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; U24 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; U25 ; 264 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; U26 ; 306 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; U27 ; 273 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; U28 ; 285 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; U29 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; U30 ; 283 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; -- ; -- ;
+; V1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; V2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; V3 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
+; V4 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
+; V5 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; V6 ; ; -- ; VCCA_FPLL ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; V7 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; V8 ; ; -- ; VCCA_FPLL ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; V9 ; 44 ; 3A ; #TMS ; input ; ; ; -- ; ; -- ; -- ;
+; V10 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; V11 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; V12 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; V13 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; V14 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; V15 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; V16 ; 138 ; 4A ; HEX1[2] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; V17 ; 154 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; V18 ; 194 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; V19 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; V20 ; 292 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; V21 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; V22 ; ; 5A ; VCCPD5A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; V23 ; 236 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; V24 ; ; 5A ; VCCPD5A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; V25 ; 246 ; 5B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; V26 ; ; 6B ; VCCIO6B_HPS ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; V27 ; 265 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; V28 ; 271 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; V29 ; 275 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; V30 ; 281 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; W1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; W2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; W3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; W4 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; W5 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; W6 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; W7 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; W8 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; W9 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; W10 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; W11 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; W12 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; W13 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; W14 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; W15 ; 130 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; W16 ; 136 ; 4A ; HEX0[2] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; W17 ; 152 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; W18 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; W19 ; 192 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; W20 ; 217 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; W21 ; 221 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; W22 ; 223 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; W23 ; ; 5A ; VCCIO5A ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; W24 ; 238 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; W25 ; 244 ; 5B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; W26 ; 274 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; W27 ; 261 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; W28 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; W29 ; 279 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; W30 ; 277 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; Y1 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; Y2 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; Y3 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
+; Y4 ; ; ; DNU ; ; ; ; -- ; ; -- ; -- ;
+; Y5 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; Y6 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; Y7 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; Y8 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; Y9 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; Y10 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; Y11 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; Y12 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; Y13 ; ; -- ; VCC ; power ; ; 1.1V ; -- ; ; -- ; -- ;
+; Y14 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; Y15 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; Y16 ; 128 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; Y17 ; 170 ; 4A ; HEX2[5] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; Y18 ; 178 ; 4A ; VGA_G[0] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ;
+; Y19 ; 202 ; 4A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ;
+; Y20 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; Y21 ; 219 ; 5A ; LEDR[8] ; output ; 2.5 V ; ; Row I/O ; N ; no ; Off ;
+; Y22 ; ; -- ; VCCA_FPLL ; power ; ; 2.5V ; -- ; ; -- ; -- ;
+; Y23 ; 232 ; 5A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; Y24 ; 234 ; 5A ; VGA_G[4] ; output ; 2.5 V ; ; Row I/O ; N ; no ; Off ;
+; Y25 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
+; Y26 ; 256 ; 5B ; KEY[3] ; input ; 2.5 V ; ; Row I/O ; N ; no ; Off ;
+; Y27 ; 258 ; 5B ; KEY[2] ; input ; 2.5 V ; ; Row I/O ; N ; no ; Off ;
+; Y28 ; 269 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; Y29 ; 263 ; 6B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ;
+; Y30 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ;
++----------+------------+----------------+---------------------------------+--------+--------------+---------------------+--------------+-----------------+----------+--------------+
+Note: Pin directions (input, output or bidir) are based on device operating in user mode.
+
+
++---------------------------------------------+
+; I/O Assignment Warnings ;
++-------------+-------------------------------+
+; Pin Name ; Reason ;
++-------------+-------------------------------+
+; KEY[3] ; Incomplete set of assignments ;
+; LEDR[0] ; Incomplete set of assignments ;
+; LEDR[1] ; Incomplete set of assignments ;
+; LEDR[2] ; Incomplete set of assignments ;
+; LEDR[3] ; Incomplete set of assignments ;
+; LEDR[4] ; Incomplete set of assignments ;
+; LEDR[5] ; Incomplete set of assignments ;
+; LEDR[6] ; Incomplete set of assignments ;
+; LEDR[7] ; Incomplete set of assignments ;
+; LEDR[8] ; Incomplete set of assignments ;
+; LEDR[9] ; Incomplete set of assignments ;
+; HEX0[0] ; Incomplete set of assignments ;
+; HEX0[1] ; Incomplete set of assignments ;
+; HEX0[2] ; Incomplete set of assignments ;
+; HEX0[3] ; Incomplete set of assignments ;
+; HEX0[4] ; Incomplete set of assignments ;
+; HEX0[5] ; Incomplete set of assignments ;
+; HEX0[6] ; Incomplete set of assignments ;
+; HEX1[0] ; Incomplete set of assignments ;
+; HEX1[1] ; Incomplete set of assignments ;
+; HEX1[2] ; Incomplete set of assignments ;
+; HEX1[3] ; Incomplete set of assignments ;
+; HEX1[4] ; Incomplete set of assignments ;
+; HEX1[5] ; Incomplete set of assignments ;
+; HEX1[6] ; Incomplete set of assignments ;
+; HEX2[0] ; Incomplete set of assignments ;
+; HEX2[1] ; Incomplete set of assignments ;
+; HEX2[2] ; Incomplete set of assignments ;
+; HEX2[3] ; Incomplete set of assignments ;
+; HEX2[4] ; Incomplete set of assignments ;
+; HEX2[5] ; Incomplete set of assignments ;
+; HEX2[6] ; Incomplete set of assignments ;
+; HEX3[0] ; Incomplete set of assignments ;
+; HEX3[1] ; Incomplete set of assignments ;
+; HEX3[2] ; Incomplete set of assignments ;
+; HEX3[3] ; Incomplete set of assignments ;
+; HEX3[4] ; Incomplete set of assignments ;
+; HEX3[5] ; Incomplete set of assignments ;
+; HEX3[6] ; Incomplete set of assignments ;
+; VGA_R[0] ; Incomplete set of assignments ;
+; VGA_R[1] ; Incomplete set of assignments ;
+; VGA_R[2] ; Incomplete set of assignments ;
+; VGA_R[3] ; Incomplete set of assignments ;
+; VGA_R[4] ; Incomplete set of assignments ;
+; VGA_R[5] ; Incomplete set of assignments ;
+; VGA_R[6] ; Incomplete set of assignments ;
+; VGA_R[7] ; Incomplete set of assignments ;
+; VGA_G[0] ; Incomplete set of assignments ;
+; VGA_G[1] ; Incomplete set of assignments ;
+; VGA_G[2] ; Incomplete set of assignments ;
+; VGA_G[3] ; Incomplete set of assignments ;
+; VGA_G[4] ; Incomplete set of assignments ;
+; VGA_G[5] ; Incomplete set of assignments ;
+; VGA_G[6] ; Incomplete set of assignments ;
+; VGA_G[7] ; Incomplete set of assignments ;
+; VGA_B[0] ; Incomplete set of assignments ;
+; VGA_B[1] ; Incomplete set of assignments ;
+; VGA_B[2] ; Incomplete set of assignments ;
+; VGA_B[3] ; Incomplete set of assignments ;
+; VGA_B[4] ; Incomplete set of assignments ;
+; VGA_B[5] ; Incomplete set of assignments ;
+; VGA_B[6] ; Incomplete set of assignments ;
+; VGA_B[7] ; Incomplete set of assignments ;
+; VGA_HS ; Incomplete set of assignments ;
+; VGA_VS ; Incomplete set of assignments ;
+; VGA_CLK ; Incomplete set of assignments ;
+; VGA_BLANK_N ; Incomplete set of assignments ;
+; CLOCK_50 ; Incomplete set of assignments ;
+; KEY[2] ; Incomplete set of assignments ;
+; SW[7] ; Incomplete set of assignments ;
+; KEY[1] ; Incomplete set of assignments ;
+; KEY[0] ; Incomplete set of assignments ;
+; SW[2] ; Incomplete set of assignments ;
+; SW[9] ; Incomplete set of assignments ;
+; SW[1] ; Incomplete set of assignments ;
+; SW[4] ; Incomplete set of assignments ;
+; SW[3] ; Incomplete set of assignments ;
+; SW[5] ; Incomplete set of assignments ;
+; SW[0] ; Incomplete set of assignments ;
+; SW[8] ; Incomplete set of assignments ;
+; SW[6] ; Incomplete set of assignments ;
+; KEY[3] ; Missing location assignment ;
+; LEDR[0] ; Missing location assignment ;
+; LEDR[1] ; Missing location assignment ;
+; LEDR[2] ; Missing location assignment ;
+; LEDR[3] ; Missing location assignment ;
+; LEDR[4] ; Missing location assignment ;
+; LEDR[5] ; Missing location assignment ;
+; LEDR[6] ; Missing location assignment ;
+; LEDR[7] ; Missing location assignment ;
+; LEDR[8] ; Missing location assignment ;
+; LEDR[9] ; Missing location assignment ;
+; HEX0[0] ; Missing location assignment ;
+; HEX0[1] ; Missing location assignment ;
+; HEX0[2] ; Missing location assignment ;
+; HEX0[3] ; Missing location assignment ;
+; HEX0[4] ; Missing location assignment ;
+; HEX0[5] ; Missing location assignment ;
+; HEX0[6] ; Missing location assignment ;
+; HEX1[0] ; Missing location assignment ;
+; HEX1[1] ; Missing location assignment ;
+; HEX1[2] ; Missing location assignment ;
+; HEX1[3] ; Missing location assignment ;
+; HEX1[4] ; Missing location assignment ;
+; HEX1[5] ; Missing location assignment ;
+; HEX1[6] ; Missing location assignment ;
+; HEX2[0] ; Missing location assignment ;
+; HEX2[1] ; Missing location assignment ;
+; HEX2[2] ; Missing location assignment ;
+; HEX2[3] ; Missing location assignment ;
+; HEX2[4] ; Missing location assignment ;
+; HEX2[5] ; Missing location assignment ;
+; HEX2[6] ; Missing location assignment ;
+; HEX3[0] ; Missing location assignment ;
+; HEX3[1] ; Missing location assignment ;
+; HEX3[2] ; Missing location assignment ;
+; HEX3[3] ; Missing location assignment ;
+; HEX3[4] ; Missing location assignment ;
+; HEX3[5] ; Missing location assignment ;
+; HEX3[6] ; Missing location assignment ;
+; VGA_R[0] ; Missing location assignment ;
+; VGA_R[1] ; Missing location assignment ;
+; VGA_R[2] ; Missing location assignment ;
+; VGA_R[3] ; Missing location assignment ;
+; VGA_R[4] ; Missing location assignment ;
+; VGA_R[5] ; Missing location assignment ;
+; VGA_R[6] ; Missing location assignment ;
+; VGA_R[7] ; Missing location assignment ;
+; VGA_G[0] ; Missing location assignment ;
+; VGA_G[1] ; Missing location assignment ;
+; VGA_G[2] ; Missing location assignment ;
+; VGA_G[3] ; Missing location assignment ;
+; VGA_G[4] ; Missing location assignment ;
+; VGA_G[5] ; Missing location assignment ;
+; VGA_G[6] ; Missing location assignment ;
+; VGA_G[7] ; Missing location assignment ;
+; VGA_B[0] ; Missing location assignment ;
+; VGA_B[1] ; Missing location assignment ;
+; VGA_B[2] ; Missing location assignment ;
+; VGA_B[3] ; Missing location assignment ;
+; VGA_B[4] ; Missing location assignment ;
+; VGA_B[5] ; Missing location assignment ;
+; VGA_B[6] ; Missing location assignment ;
+; VGA_B[7] ; Missing location assignment ;
+; VGA_HS ; Missing location assignment ;
+; VGA_VS ; Missing location assignment ;
+; VGA_CLK ; Missing location assignment ;
+; VGA_BLANK_N ; Missing location assignment ;
+; CLOCK_50 ; Missing location assignment ;
+; KEY[2] ; Missing location assignment ;
+; SW[7] ; Missing location assignment ;
+; KEY[1] ; Missing location assignment ;
+; KEY[0] ; Missing location assignment ;
+; SW[2] ; Missing location assignment ;
+; SW[9] ; Missing location assignment ;
+; SW[1] ; Missing location assignment ;
+; SW[4] ; Missing location assignment ;
+; SW[3] ; Missing location assignment ;
+; SW[5] ; Missing location assignment ;
+; SW[0] ; Missing location assignment ;
+; SW[8] ; Missing location assignment ;
+; SW[6] ; Missing location assignment ;
++-------------+-------------------------------+
+
+
++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+; Fitter Resource Utilization by Entity ;
++----------------------------------------------+----------------------+----------------------------------+---------------------------------------------------+----------------------------------+----------------------+---------------------+---------------------------+---------------+-------------------+-------+------------+------+--------------+-----------------------------------------------------------------------------------------------------------------------------------+------------------+--------------+
+; Compilation Hierarchy Node ; ALMs needed [=A-B+C] ; [A] ALMs used in final placement ; [B] Estimate of ALMs recoverable by dense packing ; [C] Estimate of ALMs unavailable ; ALMs used for memory ; Combinational ALUTs ; Dedicated Logic Registers ; I/O Registers ; Block Memory Bits ; M10Ks ; DSP Blocks ; Pins ; Virtual Pins ; Full Hierarchy Name ; Entity Name ; Library Name ;
++----------------------------------------------+----------------------+----------------------------------+---------------------------------------------------+----------------------------------+----------------------+---------------------+---------------------------+---------------+-------------------+-------+------------+------+--------------+-----------------------------------------------------------------------------------------------------------------------------------+------------------+--------------+
+; |de1_soc_wrapper ; 2039.5 (14.0) ; 2258.5 (14.5) ; 260.5 (0.5) ; 41.5 (0.0) ; 0.0 (0.0) ; 3176 (29) ; 1256 (28) ; 0 (0) ; 438272 ; 54 ; 0 ; 81 ; 0 ; |de1_soc_wrapper ; de1_soc_wrapper ; work ;
+; |arm_soc:soc_inst| ; 1986.2 (0.0) ; 2205.0 (0.0) ; 259.5 (0.0) ; 40.6 (0.0) ; 0.0 (0.0) ; 3087 (0) ; 1200 (0) ; 0 (0) ; 438272 ; 54 ; 0 ; 0 ; 0 ; |de1_soc_wrapper|arm_soc:soc_inst ; arm_soc ; work ;
+; |CORTEXM0DS:m0_1| ; 1880.3 (0.0) ; 2091.9 (0.0) ; 252.0 (0.0) ; 40.4 (0.0) ; 0.0 (0.0) ; 2912 (0) ; 1121 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; |de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1 ; CORTEXM0DS ; work ;
+; |cortexm0ds_logic:u_logic| ; 1880.3 (1880.3) ; 2091.9 (2091.9) ; 252.0 (252.0) ; 40.4 (40.4) ; 0.0 (0.0) ; 2912 (2912) ; 1121 (1121) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; |de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic ; cortexm0ds_logic ; work ;
+; |ahb_interconnect:interconnect_1| ; 17.8 (17.8) ; 23.3 (23.3) ; 5.4 (5.4) ; 0.0 (0.0) ; 0.0 (0.0) ; 43 (43) ; 3 (3) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1 ; ahb_interconnect ; work ;
+; |ahb_pixel_memory:pix1| ; 45.8 (10.9) ; 45.7 (10.9) ; 0.0 (0.0) ; 0.1 (0.0) ; 0.0 (0.0) ; 69 (13) ; 30 (20) ; 0 (0) ; 307200 ; 38 ; 0 ; 0 ; 0 ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1 ; ahb_pixel_memory ; work ;
+; |altsyncram:memory_rtl_0| ; 35.0 (0.0) ; 34.8 (0.0) ; 0.0 (0.0) ; 0.1 (0.0) ; 0.0 (0.0) ; 56 (0) ; 10 (0) ; 0 (0) ; 307200 ; 38 ; 0 ; 0 ; 0 ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0 ; altsyncram ; work ;
+; |altsyncram_efn1:auto_generated| ; 35.0 (1.5) ; 34.8 (1.8) ; 0.0 (0.3) ; 0.1 (0.0) ; 0.0 (0.0) ; 56 (0) ; 10 (10) ; 0 (0) ; 307200 ; 38 ; 0 ; 0 ; 0 ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated ; altsyncram_efn1 ; work ;
+; |decode_3na:decode2| ; 22.0 (22.0) ; 22.0 (22.0) ; 0.0 (0.0) ; 0.0 (0.0) ; 0.0 (0.0) ; 45 (45) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2 ; decode_3na ; work ;
+; |mux_chb:mux3| ; 11.1 (11.1) ; 11.0 (11.0) ; 0.0 (0.0) ; 0.1 (0.1) ; 0.0 (0.0) ; 11 (11) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|mux_chb:mux3 ; mux_chb ; work ;
+; |ahb_ram:ram_1| ; 29.6 (29.6) ; 30.3 (30.3) ; 0.8 (0.8) ; 0.1 (0.1) ; 0.0 (0.0) ; 52 (52) ; 19 (19) ; 0 (0) ; 131072 ; 16 ; 0 ; 0 ; 0 ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_ram:ram_1 ; ahb_ram ; work ;
+; |altsyncram:memory_rtl_0| ; 0.0 (0.0) ; 0.0 (0.0) ; 0.0 (0.0) ; 0.0 (0.0) ; 0.0 (0.0) ; 0 (0) ; 0 (0) ; 0 (0) ; 131072 ; 16 ; 0 ; 0 ; 0 ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0 ; altsyncram ; work ;
+; |altsyncram_nms1:auto_generated| ; 0.0 (0.0) ; 0.0 (0.0) ; 0.0 (0.0) ; 0.0 (0.0) ; 0.0 (0.0) ; 0 (0) ; 0 (0) ; 0 (0) ; 131072 ; 16 ; 0 ; 0 ; 0 ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated ; altsyncram_nms1 ; work ;
+; |ahb_switches:switches_1| ; 11.7 (11.7) ; 13.8 (13.8) ; 2.2 (2.2) ; 0.0 (0.0) ; 0.0 (0.0) ; 11 (11) ; 27 (27) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_switches:switches_1 ; ahb_switches ; work ;
+; |razzle:raz_inst| ; 39.4 (39.4) ; 39.0 (39.0) ; 0.5 (0.5) ; 0.9 (0.9) ; 0.0 (0.0) ; 60 (60) ; 28 (28) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; |de1_soc_wrapper|razzle:raz_inst ; razzle ; work ;
++----------------------------------------------+----------------------+----------------------------------+---------------------------------------------------+----------------------------------+----------------------+---------------------+---------------------------+---------------+-------------------+-------+------------+------+--------------+-----------------------------------------------------------------------------------------------------------------------------------+------------------+--------------+
+Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.
+
+
++----------------------------------------------------------------------------------------------------------------------------+
+; Delay Chain Summary ;
++-------------+----------+----+------+------+----+------+-------+--------+------------------------+--------------------------+
+; Name ; Pin Type ; D1 ; D3_0 ; D3_1 ; D4 ; D5 ; D5 OE ; D5 OCT ; T11 (Postamble Gating) ; T11 (Postamble Ungating) ;
++-------------+----------+----+------+------+----+------+-------+--------+------------------------+--------------------------+
+; KEY[3] ; Input ; -- ; -- ; -- ; -- ; -- ; -- ; -- ; -- ; -- ;
+; LEDR[0] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; LEDR[1] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; LEDR[2] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; LEDR[3] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; LEDR[4] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; LEDR[5] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; LEDR[6] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; LEDR[7] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; LEDR[8] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; LEDR[9] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; HEX0[0] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; HEX0[1] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; HEX0[2] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; HEX0[3] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; HEX0[4] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; HEX0[5] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; HEX0[6] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; HEX1[0] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; HEX1[1] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; HEX1[2] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; HEX1[3] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; HEX1[4] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; HEX1[5] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; HEX1[6] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; HEX2[0] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; HEX2[1] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; HEX2[2] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; HEX2[3] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; HEX2[4] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; HEX2[5] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; HEX2[6] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; HEX3[0] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; HEX3[1] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; HEX3[2] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; HEX3[3] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; HEX3[4] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; HEX3[5] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; HEX3[6] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; VGA_R[0] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; VGA_R[1] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; VGA_R[2] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; VGA_R[3] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; VGA_R[4] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; VGA_R[5] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; VGA_R[6] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; VGA_R[7] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; VGA_G[0] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; VGA_G[1] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; VGA_G[2] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; VGA_G[3] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; VGA_G[4] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; VGA_G[5] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; VGA_G[6] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; VGA_G[7] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; VGA_B[0] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; VGA_B[1] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; VGA_B[2] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; VGA_B[3] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; VGA_B[4] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; VGA_B[5] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; VGA_B[6] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; VGA_B[7] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; VGA_HS ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; VGA_VS ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; VGA_CLK ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; VGA_BLANK_N ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
+; CLOCK_50 ; Input ; -- ; (0) ; -- ; -- ; -- ; -- ; -- ; -- ; -- ;
+; KEY[2] ; Input ; -- ; (0) ; -- ; -- ; -- ; -- ; -- ; -- ; -- ;
+; SW[7] ; Input ; -- ; (0) ; -- ; -- ; -- ; -- ; -- ; -- ; -- ;
+; KEY[1] ; Input ; -- ; (0) ; -- ; -- ; -- ; -- ; -- ; -- ; -- ;
+; KEY[0] ; Input ; -- ; -- ; (0) ; -- ; -- ; -- ; -- ; -- ; -- ;
+; SW[2] ; Input ; -- ; -- ; (0) ; -- ; -- ; -- ; -- ; -- ; -- ;
+; SW[9] ; Input ; -- ; (0) ; -- ; -- ; -- ; -- ; -- ; -- ; -- ;
+; SW[1] ; Input ; -- ; (0) ; -- ; -- ; -- ; -- ; -- ; -- ; -- ;
+; SW[4] ; Input ; -- ; (0) ; -- ; -- ; -- ; -- ; -- ; -- ; -- ;
+; SW[3] ; Input ; -- ; -- ; (0) ; -- ; -- ; -- ; -- ; -- ; -- ;
+; SW[5] ; Input ; -- ; -- ; (0) ; -- ; -- ; -- ; -- ; -- ; -- ;
+; SW[0] ; Input ; -- ; (0) ; -- ; -- ; -- ; -- ; -- ; -- ; -- ;
+; SW[8] ; Input ; -- ; (0) ; -- ; -- ; -- ; -- ; -- ; -- ; -- ;
+; SW[6] ; Input ; -- ; (0) ; (0) ; -- ; -- ; -- ; -- ; -- ; -- ;
++-------------+----------+----+------+------+----+------+-------+--------+------------------------+--------------------------+
+
+
++---------------------------------------------------------------------------------------------------------+
+; Pad To Core Delay Chain Fanout ;
++---------------------------------------------------------------------------+-------------------+---------+
+; Source Pin / Fanout ; Pad To Core Index ; Setting ;
++---------------------------------------------------------------------------+-------------------+---------+
+; KEY[3] ; ; ;
+; CLOCK_50 ; ; ;
+; KEY[2] ; ; ;
+; - razzle:raz_inst|VGA_HS~0 ; 0 ; 0 ;
+; SW[7] ; ; ;
+; - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][7] ; 0 ; 0 ;
+; - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][7] ; 0 ; 0 ;
+; KEY[1] ; ; ;
+; - arm_soc:soc_inst|ahb_switches:switches_1|always0~0 ; 0 ; 0 ;
+; - arm_soc:soc_inst|ahb_switches:switches_1|DataValid~0 ; 0 ; 0 ;
+; - arm_soc:soc_inst|ahb_switches:switches_1|last_buttons[1]~0 ; 0 ; 0 ;
+; KEY[0] ; ; ;
+; - arm_soc:soc_inst|ahb_switches:switches_1|always0~1 ; 1 ; 0 ;
+; - arm_soc:soc_inst|ahb_switches:switches_1|DataValid~1 ; 1 ; 0 ;
+; - arm_soc:soc_inst|ahb_switches:switches_1|last_buttons[0]~1 ; 1 ; 0 ;
+; SW[2] ; ; ;
+; - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][2] ; 1 ; 0 ;
+; - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][2]~feeder ; 1 ; 0 ;
+; SW[9] ; ; ;
+; - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][9] ; 0 ; 0 ;
+; - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][9] ; 0 ; 0 ;
+; SW[1] ; ; ;
+; - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][1] ; 0 ; 0 ;
+; - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][1] ; 0 ; 0 ;
+; SW[4] ; ; ;
+; - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][4] ; 0 ; 0 ;
+; - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][4] ; 0 ; 0 ;
+; SW[3] ; ; ;
+; - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][3] ; 1 ; 0 ;
+; - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][3] ; 1 ; 0 ;
+; SW[5] ; ; ;
+; - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][5] ; 1 ; 0 ;
+; - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][5] ; 1 ; 0 ;
+; SW[0] ; ; ;
+; - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][0] ; 0 ; 0 ;
+; - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][0] ; 0 ; 0 ;
+; SW[8] ; ; ;
+; - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][8] ; 0 ; 0 ;
+; - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][8] ; 0 ; 0 ;
+; SW[6] ; ; ;
+; - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][6] ; 1 ; 0 ;
+; - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][6]~feeder ; 0 ; 0 ;
++---------------------------------------------------------------------------+-------------------+---------+
+
+
++-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+; Control Signals ;
++------------------------------------------------------------------------------------------------------------------------------------+----------------------+---------+--------------+--------+----------------------+------------------+---------------------------+
+; Name ; Location ; Fan-Out ; Usage ; Global ; Global Resource Used ; Global Line Name ; Enable Signal Source Name ;
++------------------------------------------------------------------------------------------------------------------------------------+----------------------+---------+--------------+--------+----------------------+------------------+---------------------------+
+; CLOCK_50 ; PIN_AB27 ; 1310 ; Clock ; yes ; Global Clock ; GCLK8 ; -- ;
+; KEY[2] ; PIN_Y27 ; 1244 ; Async. clear ; yes ; Global Clock ; GCLK10 ; -- ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ax1wx4~0 ; LABCELL_X50_Y11_N24 ; 42 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bpsvx4~0 ; LABCELL_X24_Y6_N33 ; 19 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C5ovx4 ; MLABCELL_X25_Y10_N51 ; 25 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dv1wx4~0 ; LABCELL_X46_Y8_N3 ; 42 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Edovx4 ; MLABCELL_X25_Y8_N33 ; 11 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fw1wx4~1 ; LABCELL_X50_Y8_N39 ; 46 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G02wx4 ; LABCELL_X45_Y7_N36 ; 48 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hfyvx4~2 ; MLABCELL_X52_Y8_N54 ; 45 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hx1wx4~1 ; MLABCELL_X52_Y8_N12 ; 44 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I2uvx4~0 ; LABCELL_X22_Y12_N36 ; 4 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J5vvx4 ; LABCELL_X30_Y7_N48 ; 3 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K6yvx4~10 ; MLABCELL_X28_Y4_N30 ; 7 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kv1wx4~0 ; LABCELL_X48_Y8_N45 ; 47 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L0uvx4 ; MLABCELL_X25_Y12_N18 ; 11 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Meyvx4 ; LABCELL_X50_Y8_N42 ; 41 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mw1wx4~1 ; LABCELL_X51_Y9_N24 ; 42 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pu1wx4 ; LABCELL_X51_Y8_N30 ; 40 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qztvx4 ; LABCELL_X24_Y12_N45 ; 9 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rfpvx4~5 ; LABCELL_X31_Y4_N36 ; 6 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rv1wx4~1 ; LABCELL_X50_Y8_N21 ; 44 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T5tvx4 ; MLABCELL_X28_Y9_N21 ; 2 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tw1wx4~1 ; LABCELL_X50_Y8_N30 ; 41 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U1uvx4 ; LABCELL_X24_Y10_N33 ; 3 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U5qvx4 ; MLABCELL_X21_Y5_N42 ; 4 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vytvx4 ; MLABCELL_X25_Y12_N51 ; 9 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|W2uvx4 ; LABCELL_X24_Y12_N54 ; 4 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wcyvx4~3 ; MLABCELL_X52_Y8_N36 ; 49 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wu1wx4~1 ; LABCELL_X50_Y8_N57 ; 41 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yafwx4~5 ; LABCELL_X30_Y4_N45 ; 7 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ydyvx4 ; LABCELL_X50_Y9_N33 ; 46 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yv1wx4~1 ; LABCELL_X50_Y8_N12 ; 44 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z0uvx4 ; LABCELL_X24_Y12_N24 ; 15 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z9zvx4~0 ; LABCELL_X33_Y11_N48 ; 2 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_interconnect:interconnect_1|HREADY~0 ; LABCELL_X33_Y9_N48 ; 64 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2699w[3]~1 ; LABCELL_X35_Y17_N48 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2716w[3]~1 ; LABCELL_X35_Y17_N21 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2726w[3]~0 ; LABCELL_X35_Y17_N54 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2736w[3]~0 ; LABCELL_X35_Y17_N27 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2746w[3]~1 ; LABCELL_X27_Y14_N51 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2756w[3]~1 ; LABCELL_X29_Y15_N33 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2766w[3]~1 ; LABCELL_X29_Y15_N3 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2776w[3]~1 ; LABCELL_X35_Y17_N30 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2799w[3]~0 ; LABCELL_X35_Y17_N51 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2810w[3]~0 ; LABCELL_X35_Y17_N24 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2820w[3]~0 ; LABCELL_X35_Y17_N57 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2830w[3]~0 ; LABCELL_X35_Y17_N18 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2840w[3]~0 ; LABCELL_X29_Y15_N6 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2850w[3]~0 ; LABCELL_X29_Y15_N30 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2860w[3]~0 ; LABCELL_X29_Y15_N36 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2870w[3]~0 ; LABCELL_X35_Y17_N45 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2892w[3]~0 ; LABCELL_X35_Y17_N12 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2903w[3]~0 ; LABCELL_X35_Y17_N6 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2913w[3]~0 ; LABCELL_X35_Y17_N15 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2923w[3]~0 ; LABCELL_X35_Y17_N36 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2933w[3]~0 ; LABCELL_X29_Y15_N51 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2943w[3]~0 ; LABCELL_X29_Y15_N42 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2953w[3]~0 ; LABCELL_X29_Y15_N39 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2963w[3]~0 ; LABCELL_X35_Y17_N33 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2985w[3]~0 ; LABCELL_X35_Y17_N0 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode2996w[3]~0 ; LABCELL_X35_Y17_N9 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3006w[3]~0 ; LABCELL_X35_Y17_N3 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3016w[3]~0 ; LABCELL_X35_Y17_N39 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3026w[3]~0 ; LABCELL_X29_Y15_N21 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3036w[3]~0 ; LABCELL_X29_Y15_N45 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3046w[3]~0 ; LABCELL_X29_Y15_N0 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3056w[3]~0 ; LABCELL_X35_Y17_N42 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3078w[3]~0 ; LABCELL_X22_Y11_N42 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3089w[3]~0 ; LABCELL_X22_Y11_N51 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3099w[3]~1 ; LABCELL_X22_Y11_N33 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3109w[3]~0 ; LABCELL_X22_Y11_N48 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3119w[3]~0 ; LABCELL_X29_Y15_N27 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2|w_anode3129w[3]~0 ; LABCELL_X22_Y11_N30 ; 1 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|always0~0 ; LABCELL_X19_Y5_N6 ; 20 ; Sync. clear ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_ram:ram_1|always1~0 ; LABCELL_X18_Y5_N18 ; 30 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_ram:ram_1|write_cycle ; FF_X19_Y5_N17 ; 15 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_ram:ram_1|write_cycle~DUPLICATE ; FF_X19_Y5_N16 ; 46 ; Write enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_switches:switches_1|always0~0 ; LABCELL_X22_Y11_N24 ; 10 ; Clock enable ; no ; -- ; -- ; -- ;
+; arm_soc:soc_inst|ahb_switches:switches_1|always0~1 ; LABCELL_X22_Y11_N9 ; 10 ; Clock enable ; no ; -- ; -- ; -- ;
+; razzle:raz_inst|Equal0~4 ; LABCELL_X33_Y15_N45 ; 11 ; Sync. load ; no ; -- ; -- ; -- ;
+; razzle:raz_inst|LessThan0~3 ; LABCELL_X35_Y15_N42 ; 22 ; Sync. clear ; no ; -- ; -- ; -- ;
+; razzle:raz_inst|VGA_HS~0 ; LABCELL_X33_Y15_N42 ; 2 ; Clock enable ; no ; -- ; -- ; -- ;
+; razzle:raz_inst|always0~14 ; LABCELL_X33_Y15_N6 ; 11 ; Sync. clear ; no ; -- ; -- ; -- ;
+; tick_count[0] ; FF_X52_Y4_N14 ; 30 ; Clock enable ; no ; -- ; -- ; -- ;
++------------------------------------------------------------------------------------------------------------------------------------+----------------------+---------+--------------+--------+----------------------+------------------+---------------------------+
+
+
++-----------------------------------------------------------------------------------------------------+
+; Global & Other Fast Signals ;
++----------+----------+---------+----------------------+------------------+---------------------------+
+; Name ; Location ; Fan-Out ; Global Resource Used ; Global Line Name ; Enable Signal Source Name ;
++----------+----------+---------+----------------------+------------------+---------------------------+
+; CLOCK_50 ; PIN_AB27 ; 1310 ; Global Clock ; GCLK8 ; -- ;
+; KEY[2] ; PIN_Y27 ; 1244 ; Global Clock ; GCLK10 ; -- ;
++----------+----------+---------+----------------------+------------------+---------------------------+
+
+
++--------------------------------------------------------------------------------+
+; Non-Global High Fan-Out Signals ;
++----------------------------------------------------------------------+---------+
+; Name ; Fan-Out ;
++----------------------------------------------------------------------+---------+
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|hwdata_o~5 ; 605 ;
++----------------------------------------------------------------------+---------+
+
+
++--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+; Fitter RAM Summary ;
++----------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+--------------+------------------------+-------------------------+------------------------+-------------------------+--------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+---------------------+-------------+------------+--------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------+-----------------+-----------------+----------+------------------------+-----------------------+
+; Name ; Type ; Mode ; Clock Mode ; Port A Depth ; Port A Width ; Port B Depth ; Port B Width ; Port A Input Registers ; Port A Output Registers ; Port B Input Registers ; Port B Output Registers ; Size ; Implementation Port A Depth ; Implementation Port A Width ; Implementation Port B Depth ; Implementation Port B Width ; Implementation Bits ; M10K blocks ; MLAB cells ; MIF ; Location ; Mixed Width RDW Mode ; Port A RDW Mode ; Port B RDW Mode ; ECC Mode ; ECC Pipeline Registers ; Fits in MLABs ;
++----------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+--------------+------------------------+-------------------------+------------------------+-------------------------+--------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+---------------------+-------------+------------+--------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------+-----------------+-----------------+----------+------------------------+-----------------------+
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 307200 ; 1 ; 307200 ; 1 ; yes ; no ; yes ; no ; 307200 ; 307200 ; 1 ; 307200 ; 1 ; 307200 ; 38 ; 0 ; None ; M10K_X14_Y14_N0, M10K_X14_Y13_N0, M10K_X26_Y12_N0, M10K_X26_Y11_N0, M10K_X26_Y10_N0, M10K_X41_Y15_N0, M10K_X26_Y20_N0, M10K_X41_Y12_N0, M10K_X41_Y20_N0, M10K_X38_Y20_N0, M10K_X38_Y12_N0, M10K_X26_Y18_N0, M10K_X26_Y19_N0, M10K_X41_Y21_N0, M10K_X41_Y13_N0, M10K_X41_Y16_N0, M10K_X41_Y19_N0, M10K_X41_Y14_N0, M10K_X26_Y13_N0, M10K_X38_Y14_N0, M10K_X26_Y16_N0, M10K_X38_Y17_N0, M10K_X38_Y18_N0, M10K_X26_Y14_N0, M10K_X26_Y21_N0, M10K_X14_Y15_N0, M10K_X14_Y16_N0, M10K_X38_Y15_N0, M10K_X14_Y17_N0, M10K_X26_Y15_N0, M10K_X38_Y13_N0, M10K_X26_Y17_N0, M10K_X38_Y16_N0, M10K_X38_Y19_N0, M10K_X14_Y19_N0, M10K_X41_Y17_N0, M10K_X38_Y21_N0, M10K_X41_Y18_N0 ; Old data ; New data ; New data ; Off ; No ; No - Address Too Wide ;
+; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 4096 ; 32 ; 4096 ; 32 ; yes ; no ; yes ; no ; 131072 ; 4096 ; 32 ; 4096 ; 32 ; 131072 ; 16 ; 0 ; db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif ; M10K_X26_Y7_N0, M10K_X14_Y9_N0, M10K_X26_Y3_N0, M10K_X26_Y8_N0, M10K_X26_Y5_N0, M10K_X14_Y3_N0, M10K_X26_Y6_N0, M10K_X14_Y4_N0, M10K_X26_Y9_N0, M10K_X5_Y5_N0, M10K_X14_Y7_N0, M10K_X14_Y5_N0, M10K_X26_Y4_N0, M10K_X14_Y2_N0, M10K_X14_Y6_N0, M10K_X14_Y8_N0 ; Old data ; New data ; New data ; Off ; No ; No - Address Too Wide ;
++----------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+--------------+------------------------+-------------------------+------------------------+-------------------------+--------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+---------------------+-------------+------------+--------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------+-----------------+-----------------+----------+------------------------+-----------------------+
+Note: Fitter may spread logical memories into multiple blocks to improve timing. The actual required RAM blocks can be found in the Fitter Resource Usage section.
+
+
++-----------------------------------------------------------------------+
+; Routing Usage Summary ;
++---------------------------------------------+-------------------------+
+; Routing Resource Type ; Usage ;
++---------------------------------------------+-------------------------+
+; Block interconnects ; 9,669 / 289,320 ( 3 % ) ;
+; C12 interconnects ; 124 / 13,420 ( < 1 % ) ;
+; C2 interconnects ; 3,308 / 119,108 ( 3 % ) ;
+; C4 interconnects ; 1,600 / 56,300 ( 3 % ) ;
+; DQS bus muxes ; 0 / 25 ( 0 % ) ;
+; DQS-18 I/O buses ; 0 / 25 ( 0 % ) ;
+; DQS-9 I/O buses ; 0 / 25 ( 0 % ) ;
+; Direct links ; 524 / 289,320 ( < 1 % ) ;
+; Global clocks ; 2 / 16 ( 13 % ) ;
+; HPS SDRAM PLL inputs ; 0 / 1 ( 0 % ) ;
+; HPS SDRAM PLL outputs ; 0 / 1 ( 0 % ) ;
+; HPS_INTERFACE_BOOT_FROM_FPGA_INPUTs ; 0 / 9 ( 0 % ) ;
+; HPS_INTERFACE_CLOCKS_RESETS_INPUTs ; 0 / 7 ( 0 % ) ;
+; HPS_INTERFACE_CLOCKS_RESETS_OUTPUTs ; 0 / 6 ( 0 % ) ;
+; HPS_INTERFACE_CROSS_TRIGGER_INPUTs ; 0 / 18 ( 0 % ) ;
+; HPS_INTERFACE_CROSS_TRIGGER_OUTPUTs ; 0 / 24 ( 0 % ) ;
+; HPS_INTERFACE_DBG_APB_INPUTs ; 0 / 37 ( 0 % ) ;
+; HPS_INTERFACE_DBG_APB_OUTPUTs ; 0 / 55 ( 0 % ) ;
+; HPS_INTERFACE_DMA_INPUTs ; 0 / 16 ( 0 % ) ;
+; HPS_INTERFACE_DMA_OUTPUTs ; 0 / 8 ( 0 % ) ;
+; HPS_INTERFACE_FPGA2HPS_INPUTs ; 0 / 287 ( 0 % ) ;
+; HPS_INTERFACE_FPGA2HPS_OUTPUTs ; 0 / 154 ( 0 % ) ;
+; HPS_INTERFACE_FPGA2SDRAM_INPUTs ; 0 / 852 ( 0 % ) ;
+; HPS_INTERFACE_FPGA2SDRAM_OUTPUTs ; 0 / 408 ( 0 % ) ;
+; HPS_INTERFACE_HPS2FPGA_INPUTs ; 0 / 165 ( 0 % ) ;
+; HPS_INTERFACE_HPS2FPGA_LIGHT_WEIGHT_INPUTs ; 0 / 67 ( 0 % ) ;
+; HPS_INTERFACE_HPS2FPGA_LIGHT_WEIGHT_OUTPUTs ; 0 / 156 ( 0 % ) ;
+; HPS_INTERFACE_HPS2FPGA_OUTPUTs ; 0 / 282 ( 0 % ) ;
+; HPS_INTERFACE_INTERRUPTS_INPUTs ; 0 / 64 ( 0 % ) ;
+; HPS_INTERFACE_INTERRUPTS_OUTPUTs ; 0 / 42 ( 0 % ) ;
+; HPS_INTERFACE_JTAG_OUTPUTs ; 0 / 5 ( 0 % ) ;
+; HPS_INTERFACE_LOAN_IO_INPUTs ; 0 / 142 ( 0 % ) ;
+; HPS_INTERFACE_LOAN_IO_OUTPUTs ; 0 / 85 ( 0 % ) ;
+; HPS_INTERFACE_MPU_EVENT_STANDBY_INPUTs ; 0 / 1 ( 0 % ) ;
+; HPS_INTERFACE_MPU_EVENT_STANDBY_OUTPUTs ; 0 / 5 ( 0 % ) ;
+; HPS_INTERFACE_MPU_GENERAL_PURPOSE_INPUTs ; 0 / 32 ( 0 % ) ;
+; HPS_INTERFACE_MPU_GENERAL_PURPOSE_OUTPUTs ; 0 / 32 ( 0 % ) ;
+; HPS_INTERFACE_PERIPHERAL_CAN_INPUTs ; 0 / 2 ( 0 % ) ;
+; HPS_INTERFACE_PERIPHERAL_CAN_OUTPUTs ; 0 / 2 ( 0 % ) ;
+; HPS_INTERFACE_PERIPHERAL_EMAC_INPUTs ; 0 / 32 ( 0 % ) ;
+; HPS_INTERFACE_PERIPHERAL_EMAC_OUTPUTs ; 0 / 34 ( 0 % ) ;
+; HPS_INTERFACE_PERIPHERAL_I2C_INPUTs ; 0 / 8 ( 0 % ) ;
+; HPS_INTERFACE_PERIPHERAL_I2C_OUTPUTs ; 0 / 8 ( 0 % ) ;
+; HPS_INTERFACE_PERIPHERAL_NAND_INPUTs ; 0 / 12 ( 0 % ) ;
+; HPS_INTERFACE_PERIPHERAL_NAND_OUTPUTs ; 0 / 18 ( 0 % ) ;
+; HPS_INTERFACE_PERIPHERAL_QSPI_INPUTs ; 0 / 4 ( 0 % ) ;
+; HPS_INTERFACE_PERIPHERAL_QSPI_OUTPUTs ; 0 / 13 ( 0 % ) ;
+; HPS_INTERFACE_PERIPHERAL_SDMMC_INPUTs ; 0 / 13 ( 0 % ) ;
+; HPS_INTERFACE_PERIPHERAL_SDMMC_OUTPUTs ; 0 / 22 ( 0 % ) ;
+; HPS_INTERFACE_PERIPHERAL_SPI_MASTER_INPUTs ; 0 / 4 ( 0 % ) ;
+; HPS_INTERFACE_PERIPHERAL_SPI_MASTER_OUTPUTs ; 0 / 14 ( 0 % ) ;
+; HPS_INTERFACE_PERIPHERAL_SPI_SLAVE_INPUTs ; 0 / 6 ( 0 % ) ;
+; HPS_INTERFACE_PERIPHERAL_SPI_SLAVE_OUTPUTs ; 0 / 4 ( 0 % ) ;
+; HPS_INTERFACE_PERIPHERAL_UART_INPUTs ; 0 / 10 ( 0 % ) ;
+; HPS_INTERFACE_PERIPHERAL_UART_OUTPUTs ; 0 / 10 ( 0 % ) ;
+; HPS_INTERFACE_PERIPHERAL_USB_INPUTs ; 0 / 22 ( 0 % ) ;
+; HPS_INTERFACE_PERIPHERAL_USB_OUTPUTs ; 0 / 34 ( 0 % ) ;
+; HPS_INTERFACE_STM_EVENT_INPUTs ; 0 / 28 ( 0 % ) ;
+; HPS_INTERFACE_TEST_INPUTs ; 0 / 610 ( 0 % ) ;
+; HPS_INTERFACE_TEST_OUTPUTs ; 0 / 513 ( 0 % ) ;
+; HPS_INTERFACE_TPIU_TRACE_INPUTs ; 0 / 2 ( 0 % ) ;
+; HPS_INTERFACE_TPIU_TRACE_OUTPUTs ; 0 / 33 ( 0 % ) ;
+; Horizontal periphery clocks ; 0 / 72 ( 0 % ) ;
+; Local interconnects ; 1,793 / 84,580 ( 2 % ) ;
+; Quadrant clocks ; 0 / 66 ( 0 % ) ;
+; R14 interconnects ; 431 / 12,676 ( 3 % ) ;
+; R14/C12 interconnect drivers ; 501 / 20,720 ( 2 % ) ;
+; R3 interconnects ; 3,850 / 130,992 ( 3 % ) ;
+; R6 interconnects ; 7,282 / 266,960 ( 3 % ) ;
+; Spine clocks ; 10 / 360 ( 3 % ) ;
+; Wire stub REs ; 0 / 15,858 ( 0 % ) ;
++---------------------------------------------+-------------------------+
+
+
++------------------------------------------+
+; I/O Rules Summary ;
++----------------------------------+-------+
+; I/O Rules Statistic ; Total ;
++----------------------------------+-------+
+; Total I/O Rules ; 28 ;
+; Number of I/O Rules Passed ; 6 ;
+; Number of I/O Rules Failed ; 0 ;
+; Number of I/O Rules Unchecked ; 0 ;
+; Number of I/O Rules Inapplicable ; 22 ;
++----------------------------------+-------+
+
+
++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+; I/O Rules Details ;
++--------------+-----------+-----------------------------------+------------------------------------------------------------------------------------+----------+--------------------------------------------------------------------------+---------------------+-------------------+
+; Status ; ID ; Category ; Rule Description ; Severity ; Information ; Area ; Extra Information ;
++--------------+-----------+-----------------------------------+------------------------------------------------------------------------------------+----------+--------------------------------------------------------------------------+---------------------+-------------------+
+; Inapplicable ; IO_000002 ; Capacity Checks ; Number of clocks in an I/O bank should not exceed the number of clocks available. ; Critical ; No Global Signal assignments found. ; I/O ; ;
+; Inapplicable ; IO_000003 ; Capacity Checks ; Number of pins in a Vrefgroup should not exceed the number of locations available. ; Critical ; No Location assignments found. ; I/O ; ;
+; Inapplicable ; IO_000001 ; Capacity Checks ; Number of pins in an I/O bank should not exceed the number of locations available. ; Critical ; No Location assignments found. ; I/O ; ;
+; Inapplicable ; IO_000004 ; Voltage Compatibility Checks ; The I/O bank should support the requested VCCIO. ; Critical ; No IOBANK_VCCIO assignments found. ; I/O ; ;
+; Inapplicable ; IO_000005 ; Voltage Compatibility Checks ; The I/O bank should not have competing VREF values. ; Critical ; No VREF I/O Standard assignments found. ; I/O ; ;
+; Pass ; IO_000006 ; Voltage Compatibility Checks ; The I/O bank should not have competing VCCIO values. ; Critical ; 0 such failures found. ; I/O ; ;
+; Inapplicable ; IO_000007 ; Valid Location Checks ; Checks for unavailable locations. ; Critical ; No Location assignments found. ; I/O ; ;
+; Inapplicable ; IO_000008 ; Valid Location Checks ; Checks for reserved locations. ; Critical ; No reserved LogicLock region found. ; I/O ; ;
+; Inapplicable ; IO_000022 ; I/O Properties Checks for One I/O ; The I/O standard should support the requested Bus Hold value. ; Critical ; No Enable Bus-Hold Circuitry assignments found. ; I/O ; ;
+; Inapplicable ; IO_000021 ; I/O Properties Checks for One I/O ; The I/O standard should support the requested Weak Pull Up value. ; Critical ; No Weak Pull-Up Resistor assignments found. ; I/O ; ;
+; Inapplicable ; IO_000046 ; I/O Properties Checks for One I/O ; The location should support the requested Slew Rate value. ; Critical ; No Slew Rate assignments found. ; I/O ; ;
+; Inapplicable ; IO_000023 ; I/O Properties Checks for One I/O ; The I/O standard should support the Open Drain value. ; Critical ; No open drain assignments found. ; I/O ; ;
+; Pass ; IO_000024 ; I/O Properties Checks for One I/O ; The I/O direction should support the On Chip Termination value. ; Critical ; 0 such failures found. ; I/O ; ;
+; Inapplicable ; IO_000026 ; I/O Properties Checks for One I/O ; On Chip Termination and Current Strength should not be used at the same time. ; Critical ; No Current Strength assignments found. ; I/O ; ;
+; Inapplicable ; IO_000027 ; I/O Properties Checks for One I/O ; Weak Pull Up and Bus Hold should not be used at the same time. ; Critical ; No Enable Bus-Hold Circuitry or Weak Pull-Up Resistor assignments found. ; I/O ; ;
+; Inapplicable ; IO_000045 ; I/O Properties Checks for One I/O ; The I/O standard should support the requested Slew Rate value. ; Critical ; No Slew Rate assignments found. ; I/O ; ;
+; Inapplicable ; IO_000047 ; I/O Properties Checks for One I/O ; On Chip Termination and Slew Rate should not be used at the same time. ; Critical ; No Slew Rate assignments found. ; I/O ; ;
+; Inapplicable ; IO_000020 ; I/O Properties Checks for One I/O ; The I/O standard should support the requested PCI Clamp Diode. ; Critical ; No Clamping Diode assignments found. ; I/O ; ;
+; Pass ; IO_000019 ; I/O Properties Checks for One I/O ; The I/O standard should support the requested On Chip Termination value. ; Critical ; 0 such failures found. ; I/O ; ;
+; Inapplicable ; IO_000018 ; I/O Properties Checks for One I/O ; The I/O standard should support the requested Current Strength. ; Critical ; No Current Strength assignments found. ; I/O ; ;
+; Inapplicable ; IO_000015 ; I/O Properties Checks for One I/O ; The location should support the requested PCI Clamp Diode. ; Critical ; No Clamping Diode assignments found. ; I/O ; ;
+; Inapplicable ; IO_000014 ; I/O Properties Checks for One I/O ; The location should support the requested Weak Pull Up value. ; Critical ; No Weak Pull-Up Resistor assignments found. ; I/O ; ;
+; Inapplicable ; IO_000013 ; I/O Properties Checks for One I/O ; The location should support the requested Bus Hold value. ; Critical ; No Enable Bus-Hold Circuitry assignments found. ; I/O ; ;
+; Pass ; IO_000012 ; I/O Properties Checks for One I/O ; The location should support the requested On Chip Termination value. ; Critical ; 0 such failures found. ; I/O ; ;
+; Inapplicable ; IO_000011 ; I/O Properties Checks for One I/O ; The location should support the requested Current Strength. ; Critical ; No Current Strength assignments found. ; I/O ; ;
+; Pass ; IO_000010 ; I/O Properties Checks for One I/O ; The location should support the requested I/O direction. ; Critical ; 0 such failures found. ; I/O ; ;
+; Pass ; IO_000009 ; I/O Properties Checks for One I/O ; The location should support the requested I/O standard. ; Critical ; 0 such failures found. ; I/O ; ;
+; Inapplicable ; IO_000034 ; SI Related Distance Checks ; Single-ended outputs should be 0 LAB row(s) away from a differential I/O. ; High ; No Differential I/O Standard assignments found. ; I/O ; ;
+; ---- ; ---- ; Disclaimer ; OCT rules are checked but not reported. ; None ; ---- ; On Chip Termination ; ;
++--------------+-----------+-----------------------------------+------------------------------------------------------------------------------------+----------+--------------------------------------------------------------------------+---------------------+-------------------+
+
+
++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+; I/O Rules Matrix ;
++--------------------+--------------+--------------+--------------+--------------+--------------+-----------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+-----------+-----------+--------------+
+; Pin/Rules ; IO_000002 ; IO_000003 ; IO_000001 ; IO_000004 ; IO_000005 ; IO_000006 ; IO_000007 ; IO_000008 ; IO_000022 ; IO_000021 ; IO_000046 ; IO_000023 ; IO_000024 ; IO_000026 ; IO_000027 ; IO_000045 ; IO_000047 ; IO_000020 ; IO_000019 ; IO_000018 ; IO_000015 ; IO_000014 ; IO_000013 ; IO_000012 ; IO_000011 ; IO_000010 ; IO_000009 ; IO_000034 ;
++--------------------+--------------+--------------+--------------+--------------+--------------+-----------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+-----------+-----------+--------------+
+; Total Pass ; 0 ; 0 ; 0 ; 0 ; 0 ; 81 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 66 ; 0 ; 0 ; 0 ; 0 ; 0 ; 66 ; 0 ; 0 ; 0 ; 0 ; 66 ; 0 ; 81 ; 81 ; 0 ;
+; Total Unchecked ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
+; Total Inapplicable ; 81 ; 81 ; 81 ; 81 ; 81 ; 0 ; 81 ; 81 ; 81 ; 81 ; 81 ; 81 ; 15 ; 81 ; 81 ; 81 ; 81 ; 81 ; 15 ; 81 ; 81 ; 81 ; 81 ; 15 ; 81 ; 0 ; 0 ; 81 ;
+; Total Fail ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ;
+; KEY[3] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; LEDR[0] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; LEDR[1] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; LEDR[2] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; LEDR[3] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; LEDR[4] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; LEDR[5] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; LEDR[6] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; LEDR[7] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; LEDR[8] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; LEDR[9] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; HEX0[0] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; HEX0[1] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; HEX0[2] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; HEX0[3] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; HEX0[4] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; HEX0[5] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; HEX0[6] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; HEX1[0] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; HEX1[1] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; HEX1[2] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; HEX1[3] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; HEX1[4] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; HEX1[5] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; HEX1[6] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; HEX2[0] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; HEX2[1] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; HEX2[2] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; HEX2[3] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; HEX2[4] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; HEX2[5] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; HEX2[6] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; HEX3[0] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; HEX3[1] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; HEX3[2] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; HEX3[3] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; HEX3[4] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; HEX3[5] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; HEX3[6] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; VGA_R[0] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; VGA_R[1] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; VGA_R[2] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; VGA_R[3] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; VGA_R[4] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; VGA_R[5] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; VGA_R[6] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; VGA_R[7] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; VGA_G[0] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; VGA_G[1] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; VGA_G[2] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; VGA_G[3] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; VGA_G[4] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; VGA_G[5] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; VGA_G[6] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; VGA_G[7] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; VGA_B[0] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; VGA_B[1] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; VGA_B[2] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; VGA_B[3] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; VGA_B[4] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; VGA_B[5] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; VGA_B[6] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; VGA_B[7] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; VGA_HS ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; VGA_VS ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; VGA_CLK ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; VGA_BLANK_N ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; CLOCK_50 ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; KEY[2] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; SW[7] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; KEY[1] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; KEY[0] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; SW[2] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; SW[9] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; SW[1] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; SW[4] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; SW[3] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; SW[5] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; SW[0] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; SW[8] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ;
+; SW[6] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ;
++--------------------+--------------+--------------+--------------+--------------+--------------+-----------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+-----------+-----------+--------------+
+
+
++------------------------------------------------------------------------------------------------+
+; Fitter Device Options ;
++------------------------------------------------------------------+-----------------------------+
+; Option ; Setting ;
++------------------------------------------------------------------+-----------------------------+
+; Enable user-supplied start-up clock (CLKUSR) ; Off ;
+; Enable device-wide reset (DEV_CLRn) ; Off ;
+; Enable device-wide output enable (DEV_OE) ; Off ;
+; Enable INIT_DONE output ; Off ;
+; Configuration scheme ; Passive Serial ;
+; Enable Error Detection CRC_ERROR pin ; Off ;
+; Enable CvP_CONFDONE pin ; Off ;
+; Enable open drain on CRC_ERROR pin ; On ;
+; Enable open drain on CvP_CONFDONE pin ; On ;
+; Enable open drain on INIT_DONE pin ; On ;
+; Enable open drain on Partial Reconfiguration pins ; Off ;
+; Enable open drain on nCEO pin ; On ;
+; Enable Partial Reconfiguration pins ; Off ;
+; Enable input tri-state on active configuration pins in user mode ; Off ;
+; Enable internal scrubbing ; Off ;
+; Active Serial clock source ; 100 MHz Internal Oscillator ;
+; Device initialization clock source ; Internal Oscillator ;
+; Configuration via Protocol ; Off ;
+; Configuration Voltage Level ; Auto ;
+; Force Configuration Voltage Level ; Off ;
+; Enable nCEO output ; Off ;
+; Data[15..8] ; Unreserved ;
+; Data[7..5] ; Unreserved ;
+; Base pin-out file on sameframe device ; Off ;
++------------------------------------------------------------------+-----------------------------+
+
+
++------------------------------------+
+; Operating Settings and Conditions ;
++---------------------------+--------+
+; Setting ; Value ;
++---------------------------+--------+
+; Nominal Core Voltage ; 1.10 V ;
+; Low Junction Temperature ; 0 �C ;
+; High Junction Temperature ; 85 �C ;
++---------------------------+--------+
+
+
++------------------------------------------------------------+
+; Estimated Delay Added for Hold Timing Summary ;
++-----------------+----------------------+-------------------+
+; Source Clock(s) ; Destination Clock(s) ; Delay Added in ns ;
++-----------------+----------------------+-------------------+
+; CLOCK_50 ; CLOCK_50 ; 35.4 ;
++-----------------+----------------------+-------------------+
+Note: For more information on problematic transfers, consider running the Fitter again with the Optimize hold timing option (Settings Menu) turned off.
+This will disable optimization of problematic paths and expose them for further analysis using the TimeQuest Timing Analyzer.
+
+
++-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+; Estimated Delay Added for Hold Timing Details ;
++-----------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------+-------------------+
+; Source Register ; Destination Register ; Delay Added in ns ;
++-----------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------+-------------------+
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Y9t2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gji2z4 ; 0.650 ;
+; arm_soc:soc_inst|ahb_ram:ram_1|write_cycle ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a9~porta_address_reg0 ; 0.495 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wai2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.468 ;
+; arm_soc:soc_inst|ahb_ram:ram_1|saved_word_address[11] ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a9~porta_address_reg0 ; 0.429 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J7b3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z8b3z4 ; 0.420 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ywi2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Owq2z4 ; 0.390 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tna3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|S3i3z4 ; 0.353 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U7w2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Owq2z4 ; 0.353 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U5a3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rsa3z4 ; 0.352 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mww2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hyy2z4 ; 0.351 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gmd3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wce3z4 ; 0.339 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vaw2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a9~porta_address_reg0 ; 0.334 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|A4t2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tki2z4 ; 0.326 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T5g3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K7g3z4 ; 0.322 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qfa3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C4b3z4 ; 0.319 ;
+; tick_count[25] ; heartbeat ; 0.317 ;
+; arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][6] ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I3y2z4 ; 0.313 ;
+; arm_soc:soc_inst|ahb_switches:switches_1|read_enable ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I3y2z4 ; 0.313 ;
+; arm_soc:soc_inst|ahb_switches:switches_1|half_word_address[1] ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I3y2z4 ; 0.313 ;
+; arm_soc:soc_inst|ahb_switches:switches_1|half_word_address[0] ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I3y2z4 ; 0.313 ;
+; arm_soc:soc_inst|ahb_interconnect:interconnect_1|mux_sel[1] ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I3y2z4 ; 0.313 ;
+; arm_soc:soc_inst|ahb_ram:ram_1|read_cycle ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I3y2z4 ; 0.313 ;
+; arm_soc:soc_inst|ahb_interconnect:interconnect_1|mux_sel[2] ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I3y2z4 ; 0.313 ;
+; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a6~portb_address_reg0 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I3y2z4 ; 0.313 ;
+; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[0] ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I3y2z4 ; 0.313 ;
+; arm_soc:soc_inst|ahb_interconnect:interconnect_1|mux_sel[0] ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I3y2z4 ; 0.313 ;
+; arm_soc:soc_inst|ahb_ram:ram_1|saved_word_address[10] ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a9~porta_address_reg0 ; 0.311 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jlo2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ujo2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fio2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uu73z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ll63z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jw83z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lpt2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vhk2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ggk2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kjk2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|An73z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rd63z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zkk2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aru2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wbk2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[3] ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rht2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uyu2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wj63z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vuo2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rro2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uu83z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ft73z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wnt2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gto2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fxu2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cc63z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Isi2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Koj2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xti2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ll73z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cgt2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Glj2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yfn2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vu93z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mhn2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Psv2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gf73z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ajn2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Po83z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fwj2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Txj2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dtj2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Duu2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ug63z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dq73z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ruj2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ukt2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lpu2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fzl2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yx63z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|V3m2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T0m2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yb93z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H783z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H2m2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hbv2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ii63z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Skm2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gmm2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rr73z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Imt2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ejm2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rvu2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Unm2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gju2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Y1u2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|E1r2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ka93z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|S2r2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T9v2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kw63z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T583z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 0.305 ;
++-----------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------+-------------------+
+Note: This table only shows the top 100 path(s) that have the largest delay added for hold.
+
+
++-----------------+
+; Fitter Messages ;
++-----------------+
+Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
+Info (20030): Parallel compilation is enabled and will use 16 of the 24 processors detected
+Info (119006): Selected device 5CSEMA5F31C6 for design "de1_soc_wrapper"
+Info (21077): Low junction temperature is 0 degrees C
+Info (21077): High junction temperature is 85 degrees C
+Info (171003): Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time
+Warning (15714): Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details
+Info (176045): Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements.
+Critical Warning (169085): No exact pin location assignment(s) for 81 pins of 81 total pins. For the list of pins please refer to the I/O Assignment Warnings table in the fitter report.
+Info (184020): Starting Fitter periphery placement operations
+Info (11178): Promoted 1 clock (1 global)
+ Info (11162): CLOCK_50~inputCLKENA0 with 1020 fanout uses global clock CLKCTRL_G8
+Info (11191): Automatically promoted 1 clock (1 global)
+ Info (11162): KEY[2]~inputCLKENA0 with 942 fanout uses global clock CLKCTRL_G10
+Info (184021): Fitter periphery placement operations ending: elapsed time is 00:00:00
+Info (176233): Starting register packing
+Critical Warning (332012): Synopsys Design Constraints File file not found: 'de1_soc_wrapper.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design.
+Info (332144): No user constrained base clocks found in the design
+Info (332143): No user constrained clock uncertainty found in the design. Calling "derive_clock_uncertainty"
+Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
+Info (332130): Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time.
+Info (176235): Finished register packing
+ Extra Info (176219): No registers were packed into other blocks
+Info (11798): Fitter preparation operations ending: elapsed time is 00:00:15
+Info (170189): Fitter placement preparation operations beginning
+Info (14951): The Fitter is using Advanced Physical Optimization.
+Info (170190): Fitter placement preparation operations ending: elapsed time is 00:00:17
+Info (170191): Fitter placement operations beginning
+Info (170137): Fitter placement was successful
+Info (170192): Fitter placement operations ending: elapsed time is 00:00:11
+Info (170193): Fitter routing operations beginning
+Info (170195): Router estimated average interconnect usage is 2% of the available device resources
+ Info (170196): Router estimated peak interconnect usage is 27% of the available device resources in the region that extends from location X22_Y0 to location X32_Y10
+Info (170199): The Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time.
+ Info (170201): Optimizations that may affect the design's routability were skipped
+Info (170194): Fitter routing operations ending: elapsed time is 00:00:32
+Info (11888): Total time spent on timing analysis during the Fitter is 5.94 seconds.
+Info (334003): Started post-fitting delay annotation
+Info (334004): Delay annotation completed successfully
+Info (334003): Started post-fitting delay annotation
+Info (334004): Delay annotation completed successfully
+Info (11801): Fitter post-fit operations ending: elapsed time is 00:00:10
+Info: Quartus Prime Fitter was successful. 0 errors, 4 warnings
+ Info: Peak virtual memory: 2652 megabytes
+ Info: Processing ended: Thu Sep 24 11:21:06 2020
+ Info: Elapsed time: 00:02:05
+ Info: Total CPU time (on all processors): 00:12:16
+
+
diff --git a/output_files/de1_soc_wrapper.fit.summary b/output_files/de1_soc_wrapper.fit.summary
new file mode 100644
index 0000000000000000000000000000000000000000..c6b37de4f9b43e4cae2bb8f4f402d6fcb25ef688
--- /dev/null
+++ b/output_files/de1_soc_wrapper.fit.summary
@@ -0,0 +1,20 @@
+Fitter Status : Successful - Thu Sep 24 11:21:05 2020
+Quartus Prime Version : 16.1.2 Build 203 01/18/2017 SJ Standard Edition
+Revision Name : de1_soc_wrapper
+Top-level Entity Name : de1_soc_wrapper
+Family : Cyclone V
+Device : 5CSEMA5F31C6
+Timing Models : Final
+Logic utilization (in ALMs) : 2,040 / 32,070 ( 6 % )
+Total registers : 1256
+Total pins : 81 / 457 ( 18 % )
+Total virtual pins : 0
+Total block memory bits : 438,272 / 4,065,280 ( 11 % )
+Total RAM Blocks : 54 / 397 ( 14 % )
+Total DSP Blocks : 0 / 87 ( 0 % )
+Total HSSI RX PCSs : 0
+Total HSSI PMA RX Deserializers : 0
+Total HSSI TX PCSs : 0
+Total HSSI PMA TX Serializers : 0
+Total PLLs : 0 / 6 ( 0 % )
+Total DLLs : 0 / 4 ( 0 % )
diff --git a/output_files/de1_soc_wrapper.flow.rpt b/output_files/de1_soc_wrapper.flow.rpt
new file mode 100644
index 0000000000000000000000000000000000000000..2136c6cb73d725d1b2f24983cea0769c2a13761f
--- /dev/null
+++ b/output_files/de1_soc_wrapper.flow.rpt
@@ -0,0 +1,132 @@
+Flow report for de1_soc_wrapper
+Thu Sep 24 11:21:34 2020
+Quartus Prime Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
+
+
+---------------------
+; Table of Contents ;
+---------------------
+ 1. Legal Notice
+ 2. Flow Summary
+ 3. Flow Settings
+ 4. Flow Non-Default Global Settings
+ 5. Flow Elapsed Time
+ 6. Flow OS Summary
+ 7. Flow Log
+ 8. Flow Messages
+ 9. Flow Suppressed Messages
+
+
+
+----------------
+; Legal Notice ;
+----------------
+Copyright (C) 2017 Intel Corporation. All rights reserved.
+Your use of Intel Corporation's design tools, logic functions
+and other software and tools, and its AMPP partner logic
+functions, and any output files from any of the foregoing
+(including device programming or simulation files), and any
+associated documentation or information are expressly subject
+to the terms and conditions of the Intel Program License
+Subscription Agreement, the Intel Quartus Prime License Agreement,
+the Intel MegaCore Function License Agreement, or other
+applicable license agreement, including, without limitation,
+that your use is for the sole purpose of programming logic
+devices manufactured by Intel and sold by Intel or its
+authorized distributors. Please refer to the applicable
+agreement for further details.
+
+
+
++-----------------------------------------------------------------------------------+
+; Flow Summary ;
++---------------------------------+-------------------------------------------------+
+; Flow Status ; Successful - Thu Sep 24 11:21:34 2020 ;
+; Quartus Prime Version ; 16.1.2 Build 203 01/18/2017 SJ Standard Edition ;
+; Revision Name ; de1_soc_wrapper ;
+; Top-level Entity Name ; de1_soc_wrapper ;
+; Family ; Cyclone V ;
+; Device ; 5CSEMA5F31C6 ;
+; Timing Models ; Final ;
+; Logic utilization (in ALMs) ; 2,040 / 32,070 ( 6 % ) ;
+; Total registers ; 1256 ;
+; Total pins ; 81 / 457 ( 18 % ) ;
+; Total virtual pins ; 0 ;
+; Total block memory bits ; 438,272 / 4,065,280 ( 11 % ) ;
+; Total DSP Blocks ; 0 / 87 ( 0 % ) ;
+; Total HSSI RX PCSs ; 0 ;
+; Total HSSI PMA RX Deserializers ; 0 ;
+; Total HSSI TX PCSs ; 0 ;
+; Total HSSI PMA TX Serializers ; 0 ;
+; Total PLLs ; 0 / 6 ( 0 % ) ;
+; Total DLLs ; 0 / 4 ( 0 % ) ;
++---------------------------------+-------------------------------------------------+
+
+
++-----------------------------------------+
+; Flow Settings ;
++-------------------+---------------------+
+; Option ; Setting ;
++-------------------+---------------------+
+; Start date & time ; 09/24/2020 11:18:33 ;
+; Main task ; Compilation ;
+; Revision Name ; de1_soc_wrapper ;
++-------------------+---------------------+
+
+
++-----------------------------------------------------------------------------------------------------------------------------+
+; Flow Non-Default Global Settings ;
++-------------------------------------+----------------------------------------+---------------+-------------+----------------+
+; Assignment Name ; Value ; Default Value ; Entity Name ; Section Id ;
++-------------------------------------+----------------------------------------+---------------+-------------+----------------+
+; COMPILER_SIGNATURE_ID ; 345050572627.160094271348685 ; -- ; -- ; -- ;
+; EDA_OUTPUT_DATA_FORMAT ; Verilog Hdl ; -- ; -- ; eda_simulation ;
+; EDA_SIMULATION_TOOL ; ModelSim-Altera (Verilog) ; <None> ; -- ; -- ;
+; EDA_TIME_SCALE ; 1 ps ; -- ; -- ; eda_simulation ;
+; MAX_CORE_JUNCTION_TEMP ; 85 ; -- ; -- ; -- ;
+; MIN_CORE_JUNCTION_TEMP ; 0 ; -- ; -- ; -- ;
+; PARTITION_COLOR ; -- (Not supported for targeted family) ; -- ; -- ; Top ;
+; PARTITION_FITTER_PRESERVATION_LEVEL ; -- (Not supported for targeted family) ; -- ; -- ; Top ;
+; PARTITION_NETLIST_TYPE ; -- (Not supported for targeted family) ; -- ; -- ; Top ;
+; PROJECT_OUTPUT_DIRECTORY ; output_files ; -- ; -- ; -- ;
++-------------------------------------+----------------------------------------+---------------+-------------+----------------+
+
+
++-------------------------------------------------------------------------------------------------------------------------------+
+; Flow Elapsed Time ;
++---------------------------+--------------+-------------------------+---------------------+------------------------------------+
+; Module Name ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ;
++---------------------------+--------------+-------------------------+---------------------+------------------------------------+
+; Analysis & Synthesis ; 00:00:27 ; 1.0 ; 1275 MB ; 00:00:41 ;
+; Fitter ; 00:02:04 ; 1.3 ; 2652 MB ; 00:12:15 ;
+; Assembler ; 00:00:09 ; 1.0 ; 1108 MB ; 00:00:09 ;
+; TimeQuest Timing Analyzer ; 00:00:12 ; 3.3 ; 1570 MB ; 00:00:30 ;
+; EDA Netlist Writer ; 00:00:03 ; 1.0 ; 1316 MB ; 00:00:02 ;
+; Total ; 00:02:55 ; -- ; -- ; 00:13:37 ;
++---------------------------+--------------+-------------------------+---------------------+------------------------------------+
+
+
++--------------------------------------------------------------------------------------+
+; Flow OS Summary ;
++---------------------------+------------------+---------+------------+----------------+
+; Module Name ; Machine Hostname ; OS Name ; OS Version ; Processor type ;
++---------------------------+------------------+---------+------------+----------------+
+; Analysis & Synthesis ; srv02749 ; Red Hat ; Red Hat ; x86_64 ;
+; Fitter ; srv02749 ; Red Hat ; Red Hat ; x86_64 ;
+; Assembler ; srv02749 ; Red Hat ; Red Hat ; x86_64 ;
+; TimeQuest Timing Analyzer ; srv02749 ; Red Hat ; Red Hat ; x86_64 ;
+; EDA Netlist Writer ; srv02749 ; Red Hat ; Red Hat ; x86_64 ;
++---------------------------+------------------+---------+------------+----------------+
+
+
+------------
+; Flow Log ;
+------------
+quartus_map --read_settings_files=on --write_settings_files=off project24_09 -c de1_soc_wrapper
+quartus_fit --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper
+quartus_asm --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper
+quartus_sta project24_09 -c de1_soc_wrapper
+quartus_eda --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper
+
+
+
diff --git a/output_files/de1_soc_wrapper.jdi b/output_files/de1_soc_wrapper.jdi
new file mode 100644
index 0000000000000000000000000000000000000000..b6668f277a42bb1ad2e7aca3763580ce491c14fc
--- /dev/null
+++ b/output_files/de1_soc_wrapper.jdi
@@ -0,0 +1,8 @@
+<sld_project_info>
+ <project>
+ <hash md5_digest_80b="4f3d6b7f0e221599f8fd"/>
+ </project>
+ <file_info>
+ <file device="5CSEMA5F31C6" path="de1_soc_wrapper.sof" usercode="0xFFFFFFFF"/>
+ </file_info>
+</sld_project_info>
diff --git a/output_files/de1_soc_wrapper.map.rpt b/output_files/de1_soc_wrapper.map.rpt
new file mode 100644
index 0000000000000000000000000000000000000000..ef0fe77a96943b6ec1697af8d7fd6dc2c9e0acb7
--- /dev/null
+++ b/output_files/de1_soc_wrapper.map.rpt
@@ -0,0 +1,1012 @@
+Analysis & Synthesis report for de1_soc_wrapper
+Thu Sep 24 11:19:00 2020
+Quartus Prime Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
+
+
+---------------------
+; Table of Contents ;
+---------------------
+ 1. Legal Notice
+ 2. Analysis & Synthesis Summary
+ 3. Analysis & Synthesis Settings
+ 4. Parallel Compilation
+ 5. Analysis & Synthesis Source Files Read
+ 6. Analysis & Synthesis Resource Usage Summary
+ 7. Analysis & Synthesis Resource Utilization by Entity
+ 8. Analysis & Synthesis RAM Summary
+ 9. Registers Removed During Synthesis
+ 10. General Register Statistics
+ 11. Inverted Register Statistics
+ 12. Registers Packed Into Inferred Megafunctions
+ 13. Multiplexer Restructuring Statistics (Restructuring Performed)
+ 14. Source assignments for arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated
+ 15. Source assignments for arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated
+ 16. Parameter Settings for User Entity Instance: arm_soc:soc_inst|ahb_interconnect:interconnect_1
+ 17. Parameter Settings for User Entity Instance: arm_soc:soc_inst|ahb_ram:ram_1
+ 18. Parameter Settings for Inferred Entity Instance: arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0
+ 19. Parameter Settings for Inferred Entity Instance: arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0
+ 20. altsyncram Parameter Settings by Entity Instance
+ 21. Port Connectivity Checks: "razzle:raz_inst"
+ 22. Port Connectivity Checks: "arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic"
+ 23. Port Connectivity Checks: "arm_soc:soc_inst|CORTEXM0DS:m0_1"
+ 24. Port Connectivity Checks: "arm_soc:soc_inst"
+ 25. Post-Synthesis Netlist Statistics for Top Partition
+ 26. Elapsed Time Per Partition
+ 27. Analysis & Synthesis Messages
+ 28. Analysis & Synthesis Suppressed Messages
+
+
+
+----------------
+; Legal Notice ;
+----------------
+Copyright (C) 2017 Intel Corporation. All rights reserved.
+Your use of Intel Corporation's design tools, logic functions
+and other software and tools, and its AMPP partner logic
+functions, and any output files from any of the foregoing
+(including device programming or simulation files), and any
+associated documentation or information are expressly subject
+to the terms and conditions of the Intel Program License
+Subscription Agreement, the Intel Quartus Prime License Agreement,
+the Intel MegaCore Function License Agreement, or other
+applicable license agreement, including, without limitation,
+that your use is for the sole purpose of programming logic
+devices manufactured by Intel and sold by Intel or its
+authorized distributors. Please refer to the applicable
+agreement for further details.
+
+
+
++-----------------------------------------------------------------------------------+
+; Analysis & Synthesis Summary ;
++---------------------------------+-------------------------------------------------+
+; Analysis & Synthesis Status ; Successful - Thu Sep 24 11:19:00 2020 ;
+; Quartus Prime Version ; 16.1.2 Build 203 01/18/2017 SJ Standard Edition ;
+; Revision Name ; de1_soc_wrapper ;
+; Top-level Entity Name ; de1_soc_wrapper ;
+; Family ; Cyclone V ;
+; Logic utilization (in ALMs) ; N/A ;
+; Total registers ; 950 ;
+; Total pins ; 81 ;
+; Total virtual pins ; 0 ;
+; Total block memory bits ; 438,272 ;
+; Total DSP Blocks ; 0 ;
+; Total HSSI RX PCSs ; 0 ;
+; Total HSSI PMA RX Deserializers ; 0 ;
+; Total HSSI TX PCSs ; 0 ;
+; Total HSSI PMA TX Serializers ; 0 ;
+; Total PLLs ; 0 ;
+; Total DLLs ; 0 ;
++---------------------------------+-------------------------------------------------+
+
+
++---------------------------------------------------------------------------------------------------------------------------+
+; Analysis & Synthesis Settings ;
++---------------------------------------------------------------------------------+--------------------+--------------------+
+; Option ; Setting ; Default Value ;
++---------------------------------------------------------------------------------+--------------------+--------------------+
+; Device ; 5CSEMA5F31C6 ; ;
+; Top-level entity name ; de1_soc_wrapper ; de1_soc_wrapper ;
+; Family name ; Cyclone V ; Cyclone V ;
+; Use smart compilation ; Off ; Off ;
+; Enable parallel Assembler and TimeQuest Timing Analyzer during compilation ; On ; On ;
+; Enable compact report table ; Off ; Off ;
+; Restructure Multiplexers ; Auto ; Auto ;
+; MLAB Add Timing Constraints For Mixed-Port Feed-Through Mode Setting Don't Care ; Off ; Off ;
+; Create Debugging Nodes for IP Cores ; Off ; Off ;
+; Preserve fewer node names ; On ; On ;
+; OpenCore Plus hardware evaluation ; Enable ; Enable ;
+; Verilog Version ; Verilog_2001 ; Verilog_2001 ;
+; VHDL Version ; VHDL_1993 ; VHDL_1993 ;
+; State Machine Processing ; Auto ; Auto ;
+; Safe State Machine ; Off ; Off ;
+; Extract Verilog State Machines ; On ; On ;
+; Extract VHDL State Machines ; On ; On ;
+; Ignore Verilog initial constructs ; Off ; Off ;
+; Iteration limit for constant Verilog loops ; 5000 ; 5000 ;
+; Iteration limit for non-constant Verilog loops ; 250 ; 250 ;
+; Add Pass-Through Logic to Inferred RAMs ; On ; On ;
+; Infer RAMs from Raw Logic ; On ; On ;
+; Parallel Synthesis ; On ; On ;
+; DSP Block Balancing ; Auto ; Auto ;
+; NOT Gate Push-Back ; On ; On ;
+; Power-Up Don't Care ; On ; On ;
+; Remove Redundant Logic Cells ; Off ; Off ;
+; Remove Duplicate Registers ; On ; On ;
+; Ignore CARRY Buffers ; Off ; Off ;
+; Ignore CASCADE Buffers ; Off ; Off ;
+; Ignore GLOBAL Buffers ; Off ; Off ;
+; Ignore ROW GLOBAL Buffers ; Off ; Off ;
+; Ignore LCELL Buffers ; Off ; Off ;
+; Ignore SOFT Buffers ; On ; On ;
+; Limit AHDL Integers to 32 Bits ; Off ; Off ;
+; Optimization Technique ; Balanced ; Balanced ;
+; Carry Chain Length ; 70 ; 70 ;
+; Auto Carry Chains ; On ; On ;
+; Auto Open-Drain Pins ; On ; On ;
+; Perform WYSIWYG Primitive Resynthesis ; Off ; Off ;
+; Auto ROM Replacement ; On ; On ;
+; Auto RAM Replacement ; On ; On ;
+; Auto DSP Block Replacement ; On ; On ;
+; Auto Shift Register Replacement ; Auto ; Auto ;
+; Allow Shift Register Merging across Hierarchies ; Auto ; Auto ;
+; Auto Clock Enable Replacement ; On ; On ;
+; Strict RAM Replacement ; Off ; Off ;
+; Allow Synchronous Control Signals ; On ; On ;
+; Force Use of Synchronous Clear Signals ; Off ; Off ;
+; Auto Resource Sharing ; Off ; Off ;
+; Allow Any RAM Size For Recognition ; Off ; Off ;
+; Allow Any ROM Size For Recognition ; Off ; Off ;
+; Allow Any Shift Register Size For Recognition ; Off ; Off ;
+; Use LogicLock Constraints during Resource Balancing ; On ; On ;
+; Ignore translate_off and synthesis_off directives ; Off ; Off ;
+; Timing-Driven Synthesis ; On ; On ;
+; Report Parameter Settings ; On ; On ;
+; Report Source Assignments ; On ; On ;
+; Report Connectivity Checks ; On ; On ;
+; Ignore Maximum Fan-Out Assignments ; Off ; Off ;
+; Synchronization Register Chain Length ; 3 ; 3 ;
+; PowerPlay Power Optimization During Synthesis ; Normal compilation ; Normal compilation ;
+; HDL message level ; Level2 ; Level2 ;
+; Suppress Register Optimization Related Messages ; Off ; Off ;
+; Number of Removed Registers Reported in Synthesis Report ; 5000 ; 5000 ;
+; Number of Swept Nodes Reported in Synthesis Report ; 5000 ; 5000 ;
+; Number of Inverted Registers Reported in Synthesis Report ; 100 ; 100 ;
+; Clock MUX Protection ; On ; On ;
+; Auto Gated Clock Conversion ; Off ; Off ;
+; Block Design Naming ; Auto ; Auto ;
+; SDC constraint protection ; Off ; Off ;
+; Synthesis Effort ; Auto ; Auto ;
+; Shift Register Replacement - Allow Asynchronous Clear Signal ; On ; On ;
+; Pre-Mapping Resynthesis Optimization ; Off ; Off ;
+; Analysis & Synthesis Message Level ; Medium ; Medium ;
+; Disable Register Merging Across Hierarchies ; Auto ; Auto ;
+; Resource Aware Inference For Block RAM ; On ; On ;
+; Automatic Parallel Synthesis ; On ; On ;
+; Partial Reconfiguration Bitstream ID ; Off ; Off ;
++---------------------------------------------------------------------------------+--------------------+--------------------+
+
+
++------------------------------------------+
+; Parallel Compilation ;
++----------------------------+-------------+
+; Processors ; Number ;
++----------------------------+-------------+
+; Number detected on machine ; 24 ;
+; Maximum allowed ; 16 ;
+; ; ;
+; Average used ; 1.00 ;
+; Maximum used ; 16 ;
+; ; ;
+; Usage by Processor ; % Time Used ;
+; Processor 1 ; 100.0% ;
+; Processor 2 ; 0.1% ;
+; Processor 3 ; 0.0% ;
+; Processor 4 ; 0.0% ;
+; Processor 5 ; 0.0% ;
+; Processor 6 ; 0.0% ;
+; Processor 7 ; 0.0% ;
+; Processor 8 ; 0.0% ;
+; Processor 9 ; 0.0% ;
+; Processor 10 ; 0.0% ;
+; Processor 11 ; 0.0% ;
+; Processor 12 ; 0.0% ;
+; Processor 13 ; 0.0% ;
+; Processor 14 ; 0.0% ;
+; Processors 15-16 ; 0.0% ;
++----------------------------+-------------+
+
+
++------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+; Analysis & Synthesis Source Files Read ;
++--------------------------------------------------+-----------------+-------------------------------------------------------+---------------------------------------------------------------------------------+---------+
+; File Name with User-Entered Path ; Used in Netlist ; File Type ; File Name with Absolute Path ; Library ;
++--------------------------------------------------+-----------------+-------------------------------------------------------+---------------------------------------------------------------------------------+---------+
+; behavioural/razzle.sv ; yes ; User SystemVerilog HDL File ; /home/ks6n19/Documents/project/behavioural/razzle.sv ; ;
+; behavioural/ahb_interconnect.sv ; yes ; User SystemVerilog HDL File ; /home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv ; ;
+; behavioural/ahb_pixel_memory.sv ; yes ; User SystemVerilog HDL File ; /home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv ; ;
+; behavioural/ahb_ram.sv ; yes ; User SystemVerilog HDL File ; /home/ks6n19/Documents/project/behavioural/ahb_ram.sv ; ;
+; behavioural/ahb_switches.sv ; yes ; User SystemVerilog HDL File ; /home/ks6n19/Documents/project/behavioural/ahb_switches.sv ; ;
+; behavioural/arm_soc.sv ; yes ; User SystemVerilog HDL File ; /home/ks6n19/Documents/project/behavioural/arm_soc.sv ; ;
+; behavioural/CORTEXM0DS.sv ; yes ; User SystemVerilog HDL File ; /home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv ; ;
+; behavioural/cortexm0ds_logic.sv ; yes ; User SystemVerilog HDL File ; /home/ks6n19/Documents/project/behavioural/cortexm0ds_logic.sv ; ;
+; behavioural/de1_soc_wrapper.sv ; yes ; User SystemVerilog HDL File ; /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv ; ;
+; behavioural/code.hex ; yes ; Auto-Found Hexadecimal (Intel-Format) File ; /home/ks6n19/Documents/project/behavioural/code.hex ; ;
+; altsyncram.tdf ; yes ; Megafunction ; /srv/intelFPGA/16.1/quartus/libraries/megafunctions/altsyncram.tdf ; ;
+; stratix_ram_block.inc ; yes ; Megafunction ; /srv/intelFPGA/16.1/quartus/libraries/megafunctions/stratix_ram_block.inc ; ;
+; lpm_mux.inc ; yes ; Megafunction ; /srv/intelFPGA/16.1/quartus/libraries/megafunctions/lpm_mux.inc ; ;
+; lpm_decode.inc ; yes ; Megafunction ; /srv/intelFPGA/16.1/quartus/libraries/megafunctions/lpm_decode.inc ; ;
+; aglobal161.inc ; yes ; Megafunction ; /srv/intelFPGA/16.1/quartus/libraries/megafunctions/aglobal161.inc ; ;
+; a_rdenreg.inc ; yes ; Megafunction ; /srv/intelFPGA/16.1/quartus/libraries/megafunctions/a_rdenreg.inc ; ;
+; altrom.inc ; yes ; Megafunction ; /srv/intelFPGA/16.1/quartus/libraries/megafunctions/altrom.inc ; ;
+; altram.inc ; yes ; Megafunction ; /srv/intelFPGA/16.1/quartus/libraries/megafunctions/altram.inc ; ;
+; altdpram.inc ; yes ; Megafunction ; /srv/intelFPGA/16.1/quartus/libraries/megafunctions/altdpram.inc ; ;
+; db/altsyncram_efn1.tdf ; yes ; Auto-Generated Megafunction ; /home/ks6n19/Documents/project/db/altsyncram_efn1.tdf ; ;
+; db/decode_3na.tdf ; yes ; Auto-Generated Megafunction ; /home/ks6n19/Documents/project/db/decode_3na.tdf ; ;
+; db/mux_chb.tdf ; yes ; Auto-Generated Megafunction ; /home/ks6n19/Documents/project/db/mux_chb.tdf ; ;
+; db/altsyncram_nms1.tdf ; yes ; Auto-Generated Megafunction ; /home/ks6n19/Documents/project/db/altsyncram_nms1.tdf ; ;
+; db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif ; yes ; Auto-Generated Auto-Found Memory Initialization File ; /home/ks6n19/Documents/project/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif ; ;
++--------------------------------------------------+-----------------+-------------------------------------------------------+---------------------------------------------------------------------------------+---------+
+
+
++--------------------------------------------------------------+
+; Analysis & Synthesis Resource Usage Summary ;
++---------------------------------------------+----------------+
+; Resource ; Usage ;
++---------------------------------------------+----------------+
+; Estimate of Logic utilization (ALMs needed) ; 2146 ;
+; ; ;
+; Combinational ALUT usage for logic ; 3174 ;
+; -- 7 input functions ; 36 ;
+; -- 6 input functions ; 1022 ;
+; -- 5 input functions ; 744 ;
+; -- 4 input functions ; 688 ;
+; -- <=3 input functions ; 684 ;
+; ; ;
+; Dedicated logic registers ; 950 ;
+; ; ;
+; I/O pins ; 81 ;
+; Total MLAB memory bits ; 0 ;
+; Total block memory bits ; 438272 ;
+; ; ;
+; Total DSP Blocks ; 0 ;
+; ; ;
+; Maximum fan-out node ; CLOCK_50~input ;
+; Maximum fan-out ; 1020 ;
+; Total fan-out ; 19817 ;
+; Average fan-out ; 4.55 ;
++---------------------------------------------+----------------+
+
+
++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+; Analysis & Synthesis Resource Utilization by Entity ;
++----------------------------------------------+---------------------+---------------------------+-------------------+------------+------+--------------+-----------------------------------------------------------------------------------------------------------------------------------+------------------+--------------+
+; Compilation Hierarchy Node ; Combinational ALUTs ; Dedicated Logic Registers ; Block Memory Bits ; DSP Blocks ; Pins ; Virtual Pins ; Full Hierarchy Name ; Entity Name ; Library Name ;
++----------------------------------------------+---------------------+---------------------------+-------------------+------------+------+--------------+-----------------------------------------------------------------------------------------------------------------------------------+------------------+--------------+
+; |de1_soc_wrapper ; 3174 (27) ; 950 (28) ; 438272 ; 0 ; 81 ; 0 ; |de1_soc_wrapper ; de1_soc_wrapper ; work ;
+; |arm_soc:soc_inst| ; 3087 (0) ; 896 (0) ; 438272 ; 0 ; 0 ; 0 ; |de1_soc_wrapper|arm_soc:soc_inst ; arm_soc ; work ;
+; |CORTEXM0DS:m0_1| ; 2912 (0) ; 822 (0) ; 0 ; 0 ; 0 ; 0 ; |de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1 ; CORTEXM0DS ; work ;
+; |cortexm0ds_logic:u_logic| ; 2912 (2912) ; 822 (822) ; 0 ; 0 ; 0 ; 0 ; |de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic ; cortexm0ds_logic ; work ;
+; |ahb_interconnect:interconnect_1| ; 43 (43) ; 3 (3) ; 0 ; 0 ; 0 ; 0 ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1 ; ahb_interconnect ; work ;
+; |ahb_pixel_memory:pix1| ; 69 (13) ; 26 (20) ; 307200 ; 0 ; 0 ; 0 ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1 ; ahb_pixel_memory ; work ;
+; |altsyncram:memory_rtl_0| ; 56 (0) ; 6 (0) ; 307200 ; 0 ; 0 ; 0 ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0 ; altsyncram ; work ;
+; |altsyncram_efn1:auto_generated| ; 56 (0) ; 6 (6) ; 307200 ; 0 ; 0 ; 0 ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated ; altsyncram_efn1 ; work ;
+; |decode_3na:decode2| ; 45 (45) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|decode_3na:decode2 ; decode_3na ; work ;
+; |mux_chb:mux3| ; 11 (11) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|mux_chb:mux3 ; mux_chb ; work ;
+; |ahb_ram:ram_1| ; 52 (52) ; 18 (18) ; 131072 ; 0 ; 0 ; 0 ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_ram:ram_1 ; ahb_ram ; work ;
+; |altsyncram:memory_rtl_0| ; 0 (0) ; 0 (0) ; 131072 ; 0 ; 0 ; 0 ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0 ; altsyncram ; work ;
+; |altsyncram_nms1:auto_generated| ; 0 (0) ; 0 (0) ; 131072 ; 0 ; 0 ; 0 ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated ; altsyncram_nms1 ; work ;
+; |ahb_switches:switches_1| ; 11 (11) ; 27 (27) ; 0 ; 0 ; 0 ; 0 ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_switches:switches_1 ; ahb_switches ; work ;
+; |razzle:raz_inst| ; 60 (60) ; 26 (26) ; 0 ; 0 ; 0 ; 0 ; |de1_soc_wrapper|razzle:raz_inst ; razzle ; work ;
++----------------------------------------------+---------------------+---------------------------+-------------------+------------+------+--------------+-----------------------------------------------------------------------------------------------------------------------------------+------------------+--------------+
+Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.
+
+
++------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+; Analysis & Synthesis RAM Summary ;
++----------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+--------+--------------------------------------------------+
+; Name ; Type ; Mode ; Port A Depth ; Port A Width ; Port B Depth ; Port B Width ; Size ; MIF ;
++----------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+--------+--------------------------------------------------+
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; 307200 ; 1 ; 307200 ; 1 ; 307200 ; None ;
+; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; 4096 ; 32 ; 4096 ; 32 ; 131072 ; db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif ;
++----------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+--------+--------------------------------------------------+
+
+
++-----------------------------------------------------------------------------------------------------------+
+; Registers Removed During Synthesis ;
++------------------------------------------------------------------+----------------------------------------+
+; Register name ; Reason for Removal ;
++------------------------------------------------------------------+----------------------------------------+
+; arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][15] ; Stuck at GND due to stuck port data_in ;
+; arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][14] ; Stuck at GND due to stuck port data_in ;
+; arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][13] ; Stuck at GND due to stuck port data_in ;
+; arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][12] ; Stuck at GND due to stuck port data_in ;
+; arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][11] ; Stuck at GND due to stuck port data_in ;
+; arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][10] ; Stuck at GND due to stuck port data_in ;
+; arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][15] ; Stuck at GND due to stuck port data_in ;
+; arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][14] ; Stuck at GND due to stuck port data_in ;
+; arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][13] ; Stuck at GND due to stuck port data_in ;
+; arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][12] ; Stuck at GND due to stuck port data_in ;
+; arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][11] ; Stuck at GND due to stuck port data_in ;
+; arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][10] ; Stuck at GND due to stuck port data_in ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zqb3z4 ; Lost fanout ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|E9c3z4 ; Lost fanout ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yvb3z4 ; Lost fanout ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qsb3z4 ; Lost fanout ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rnb3z4 ; Lost fanout ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|W5c3z4 ; Lost fanout ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O2c3z4 ; Lost fanout ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gzb3z4 ; Lost fanout ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C7f3z4 ; Lost fanout ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Q0f3z4 ; Lost fanout ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qnn2z4 ; Lost fanout ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jje3z4 ; Lost fanout ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|W8r2z4 ; Lost fanout ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Etq2z4 ; Lost fanout ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Q4h3z4 ; Lost fanout ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I6h3z4 ; Lost fanout ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mvi2z4 ; Lost fanout ;
+; razzle:raz_inst|clock_enable ; Merged with tick_count[0] ;
+; Total Number of Removed Registers = 30 ; ;
++------------------------------------------------------------------+----------------------------------------+
+
+
++------------------------------------------------------+
+; General Register Statistics ;
++----------------------------------------------+-------+
+; Statistic ; Value ;
++----------------------------------------------+-------+
+; Total registers ; 950 ;
+; Number of registers using Synchronous Clear ; 42 ;
+; Number of registers using Synchronous Load ; 11 ;
+; Number of registers using Asynchronous Clear ; 942 ;
+; Number of registers using Asynchronous Load ; 0 ;
+; Number of registers using Clock Enable ; 689 ;
+; Number of registers using Preset ; 0 ;
++----------------------------------------------+-------+
+
+
++----------------------------------------------------------------------------+
+; Inverted Register Statistics ;
++------------------------------------------------------------------+---------+
+; Inverted Register ; Fan out ;
++------------------------------------------------------------------+---------+
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O5t2z4 ; 123 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G0w2z4 ; 23 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|R1w2z4 ; 32 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H9i2z4 ; 61 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hyy2z4 ; 59 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qdj2z4 ; 28 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U2x2z4 ; 62 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zoy2z4 ; 40 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nqy2z4 ; 44 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xly2z4 ; 16 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lny2z4 ; 21 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Omk2z4 ; 5 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J0l2z4 ; 5 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jux2z4 ; 5 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vvx2z4 ; 5 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Swy2z4 ; 67 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qem2z4 ; 44 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4 ; 51 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pty2z4 ; 45 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dvy2z4 ; 54 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Viy2z4 ; 13 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yzi2z4 ; 15 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rxl2z4 ; 14 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jky2z4 ; 22 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|W7z2z4 ; 8 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K9z2z4 ; 7 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I6z2z4 ; 10 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cyq2z4 ; 22 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Auk2z4 ; 11 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K1z2z4 ; 11 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C3z2z4 ; 13 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I2t2z4 ; 15 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wai2z4 ; 16 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Igi2z4 ; 4 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pdi2z4 ; 73 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jw73z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T1d3z4 ; 188 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H3d3z4 ; 189 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Svk2z4 ; 205 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yaz2z4 ; 205 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Art2z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J0v2z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kiq2z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ql13z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gfq2z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I443z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zu23z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rd53z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vgq2z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hak2z4 ; 4 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Skh3z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Djh3z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M1j2z4 ; 53 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hmh3z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wnh3z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|An63z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yx83z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fgm2z4 ; 228 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wzy2z4 ; 239 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rni2z4 ; 229 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sjj2z4 ; 241 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|S8k2z4 ; 4 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fzl2z4 ; 17 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U4z2z4 ; 4 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qi03z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ug63z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fwj2z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Txj2z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dq73z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ruj2z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ukt2z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dtj2z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Duu2z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wlz2z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cy33z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L753z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kf13z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|To23z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Iwp2z4 ; 4 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qzq2z4 ; 20 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zcn2z4 ; 15 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qz33z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z853z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yg13z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hq23z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ii63z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Skm2z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gmm2z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Unm2z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rr73z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Imt2z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ejm2z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rvu2z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ek03z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Knz2z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kw63z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|E1r2z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ka93z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T583z4 ; 2 ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G4r2z4 ; 2 ;
+; Total number of inverted registers = 704* ; ;
++------------------------------------------------------------------+---------+
+* Table truncated at 100 items. To change the number of inverted registers reported, set the "Number of Inverted Registers Reported" option under Assignments->Settings->Analysis and Synthesis Settings->More Settings
+
+
++---------------------------------------------------------------------------------------------------------------------+
+; Registers Packed Into Inferred Megafunctions ;
++--------------------------------------------------------+-----------------------------------------------------+------+
+; Register Name ; Megafunction ; Type ;
++--------------------------------------------------------+-----------------------------------------------------+------+
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|pixel ; arm_soc:soc_inst|ahb_pixel_memory:pix1|memory_rtl_0 ; RAM ;
+; arm_soc:soc_inst|ahb_ram:ram_1|data_from_memory[0..31] ; arm_soc:soc_inst|ahb_ram:ram_1|memory_rtl_0 ; RAM ;
++--------------------------------------------------------+-----------------------------------------------------+------+
+
+
++--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+; Multiplexer Restructuring Statistics (Restructuring Performed) ;
++--------------------+-----------+---------------+----------------------+------------------------+------------+------------------------------------------------------------------------------+
+; Multiplexer Inputs ; Bus Width ; Baseline Area ; Area if Restructured ; Saving if Restructured ; Registered ; Example Multiplexer Output ;
++--------------------+-----------+---------------+----------------------+------------------------+------------+------------------------------------------------------------------------------+
+; 3:1 ; 8 bits ; 16 LEs ; 16 LEs ; 0 LEs ; No ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_ram:ram_1|data_to_memory[7] ;
+; 3:1 ; 8 bits ; 16 LEs ; 16 LEs ; 0 LEs ; No ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_ram:ram_1|data_to_memory[13] ;
+; 3:1 ; 8 bits ; 16 LEs ; 16 LEs ; 0 LEs ; No ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_ram:ram_1|data_to_memory[16] ;
+; 3:1 ; 8 bits ; 16 LEs ; 16 LEs ; 0 LEs ; No ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_ram:ram_1|data_to_memory[31] ;
+; 3:1 ; 11 bits ; 22 LEs ; 22 LEs ; 0 LEs ; No ; |de1_soc_wrapper|razzle:raz_inst|V_count ;
+; 5:1 ; 6 bits ; 18 LEs ; 18 LEs ; 0 LEs ; No ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1|HRDATA[11] ;
+; 5:1 ; 6 bits ; 18 LEs ; 18 LEs ; 0 LEs ; No ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1|HRDATA[29] ;
+; 7:1 ; 2 bits ; 8 LEs ; 8 LEs ; 0 LEs ; No ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1|HRDATA[8] ;
+; 7:1 ; 2 bits ; 8 LEs ; 8 LEs ; 0 LEs ; No ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1|HRDATA[24] ;
+; 7:1 ; 6 bits ; 24 LEs ; 24 LEs ; 0 LEs ; No ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1|HRDATA[7] ;
+; 7:1 ; 8 bits ; 32 LEs ; 32 LEs ; 0 LEs ; No ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1|HRDATA[20] ;
+; 9:1 ; 2 bits ; 12 LEs ; 10 LEs ; 2 LEs ; No ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1|HRDATA[1] ;
++--------------------+-----------+---------------+----------------------+------------------------+------------+------------------------------------------------------------------------------+
+
+
++----------------------------------------------------------------------------------------------------------------------+
+; Source assignments for arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated ;
++---------------------------------+--------------------+------+--------------------------------------------------------+
+; Assignment ; Value ; From ; To ;
++---------------------------------+--------------------+------+--------------------------------------------------------+
+; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
++---------------------------------+--------------------+------+--------------------------------------------------------+
+
+
++--------------------------------------------------------------------------------------------------------------+
+; Source assignments for arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated ;
++---------------------------------+--------------------+------+------------------------------------------------+
+; Assignment ; Value ; From ; To ;
++---------------------------------+--------------------+------+------------------------------------------------+
+; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; - ; - ;
++---------------------------------+--------------------+------+------------------------------------------------+
+
+
++-----------------------------------------------------------------------------------------------+
+; Parameter Settings for User Entity Instance: arm_soc:soc_inst|ahb_interconnect:interconnect_1 ;
++----------------+-------+----------------------------------------------------------------------+
+; Parameter Name ; Value ; Type ;
++----------------+-------+----------------------------------------------------------------------+
+; num_slaves ; 3 ; Signed Integer ;
++----------------+-------+----------------------------------------------------------------------+
+Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+
+
++-----------------------------------------------------------------------------+
+; Parameter Settings for User Entity Instance: arm_soc:soc_inst|ahb_ram:ram_1 ;
++----------------+-------+----------------------------------------------------+
+; Parameter Name ; Value ; Type ;
++----------------+-------+----------------------------------------------------+
+; MEMWIDTH ; 14 ; Signed Integer ;
++----------------+-------+----------------------------------------------------+
+Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+
+
++-----------------------------------------------------------------------------------------------------------------+
+; Parameter Settings for Inferred Entity Instance: arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0 ;
++------------------------------------+----------------------+-----------------------------------------------------+
+; Parameter Name ; Value ; Type ;
++------------------------------------+----------------------+-----------------------------------------------------+
+; BYTE_SIZE_BLOCK ; 8 ; Untyped ;
+; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
+; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
+; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
+; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
+; WIDTH_BYTEENA ; 1 ; Untyped ;
+; OPERATION_MODE ; DUAL_PORT ; Untyped ;
+; WIDTH_A ; 1 ; Untyped ;
+; WIDTHAD_A ; 19 ; Untyped ;
+; NUMWORDS_A ; 307200 ; Untyped ;
+; OUTDATA_REG_A ; UNREGISTERED ; Untyped ;
+; ADDRESS_ACLR_A ; NONE ; Untyped ;
+; OUTDATA_ACLR_A ; NONE ; Untyped ;
+; WRCONTROL_ACLR_A ; NONE ; Untyped ;
+; INDATA_ACLR_A ; NONE ; Untyped ;
+; BYTEENA_ACLR_A ; NONE ; Untyped ;
+; WIDTH_B ; 1 ; Untyped ;
+; WIDTHAD_B ; 19 ; Untyped ;
+; NUMWORDS_B ; 307200 ; Untyped ;
+; INDATA_REG_B ; CLOCK1 ; Untyped ;
+; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ;
+; RDCONTROL_REG_B ; CLOCK1 ; Untyped ;
+; ADDRESS_REG_B ; CLOCK0 ; Untyped ;
+; OUTDATA_REG_B ; UNREGISTERED ; Untyped ;
+; BYTEENA_REG_B ; CLOCK1 ; Untyped ;
+; INDATA_ACLR_B ; NONE ; Untyped ;
+; WRCONTROL_ACLR_B ; NONE ; Untyped ;
+; ADDRESS_ACLR_B ; NONE ; Untyped ;
+; OUTDATA_ACLR_B ; NONE ; Untyped ;
+; RDCONTROL_ACLR_B ; NONE ; Untyped ;
+; BYTEENA_ACLR_B ; NONE ; Untyped ;
+; WIDTH_BYTEENA_A ; 1 ; Untyped ;
+; WIDTH_BYTEENA_B ; 1 ; Untyped ;
+; RAM_BLOCK_TYPE ; AUTO ; Untyped ;
+; BYTE_SIZE ; 8 ; Untyped ;
+; READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA ; Untyped ;
+; READ_DURING_WRITE_MODE_PORT_A ; NEW_DATA_NO_NBE_READ ; Untyped ;
+; READ_DURING_WRITE_MODE_PORT_B ; NEW_DATA_NO_NBE_READ ; Untyped ;
+; INIT_FILE ; UNUSED ; Untyped ;
+; INIT_FILE_LAYOUT ; PORT_A ; Untyped ;
+; MAXIMUM_DEPTH ; 0 ; Untyped ;
+; CLOCK_ENABLE_INPUT_A ; NORMAL ; Untyped ;
+; CLOCK_ENABLE_INPUT_B ; NORMAL ; Untyped ;
+; CLOCK_ENABLE_OUTPUT_A ; NORMAL ; Untyped ;
+; CLOCK_ENABLE_OUTPUT_B ; NORMAL ; Untyped ;
+; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ;
+; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ;
+; ENABLE_ECC ; FALSE ; Untyped ;
+; ECC_PIPELINE_STAGE_ENABLED ; FALSE ; Untyped ;
+; WIDTH_ECCSTATUS ; 3 ; Untyped ;
+; DEVICE_FAMILY ; Cyclone V ; Untyped ;
+; CBXI_PARAMETER ; altsyncram_efn1 ; Untyped ;
++------------------------------------+----------------------+-----------------------------------------------------+
+Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+
+
++---------------------------------------------------------------------------------------------------------+
+; Parameter Settings for Inferred Entity Instance: arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0 ;
++------------------------------------+--------------------------------------------------+-----------------+
+; Parameter Name ; Value ; Type ;
++------------------------------------+--------------------------------------------------+-----------------+
+; BYTE_SIZE_BLOCK ; 8 ; Untyped ;
+; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
+; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
+; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
+; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
+; WIDTH_BYTEENA ; 1 ; Untyped ;
+; OPERATION_MODE ; DUAL_PORT ; Untyped ;
+; WIDTH_A ; 32 ; Untyped ;
+; WIDTHAD_A ; 12 ; Untyped ;
+; NUMWORDS_A ; 4096 ; Untyped ;
+; OUTDATA_REG_A ; UNREGISTERED ; Untyped ;
+; ADDRESS_ACLR_A ; NONE ; Untyped ;
+; OUTDATA_ACLR_A ; NONE ; Untyped ;
+; WRCONTROL_ACLR_A ; NONE ; Untyped ;
+; INDATA_ACLR_A ; NONE ; Untyped ;
+; BYTEENA_ACLR_A ; NONE ; Untyped ;
+; WIDTH_B ; 32 ; Untyped ;
+; WIDTHAD_B ; 12 ; Untyped ;
+; NUMWORDS_B ; 4096 ; Untyped ;
+; INDATA_REG_B ; CLOCK1 ; Untyped ;
+; WRCONTROL_WRADDRESS_REG_B ; CLOCK1 ; Untyped ;
+; RDCONTROL_REG_B ; CLOCK1 ; Untyped ;
+; ADDRESS_REG_B ; CLOCK0 ; Untyped ;
+; OUTDATA_REG_B ; UNREGISTERED ; Untyped ;
+; BYTEENA_REG_B ; CLOCK1 ; Untyped ;
+; INDATA_ACLR_B ; NONE ; Untyped ;
+; WRCONTROL_ACLR_B ; NONE ; Untyped ;
+; ADDRESS_ACLR_B ; NONE ; Untyped ;
+; OUTDATA_ACLR_B ; NONE ; Untyped ;
+; RDCONTROL_ACLR_B ; NONE ; Untyped ;
+; BYTEENA_ACLR_B ; NONE ; Untyped ;
+; WIDTH_BYTEENA_A ; 1 ; Untyped ;
+; WIDTH_BYTEENA_B ; 1 ; Untyped ;
+; RAM_BLOCK_TYPE ; AUTO ; Untyped ;
+; BYTE_SIZE ; 8 ; Untyped ;
+; READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA ; Untyped ;
+; READ_DURING_WRITE_MODE_PORT_A ; NEW_DATA_NO_NBE_READ ; Untyped ;
+; READ_DURING_WRITE_MODE_PORT_B ; NEW_DATA_NO_NBE_READ ; Untyped ;
+; INIT_FILE ; db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif ; Untyped ;
+; INIT_FILE_LAYOUT ; PORT_A ; Untyped ;
+; MAXIMUM_DEPTH ; 0 ; Untyped ;
+; CLOCK_ENABLE_INPUT_A ; NORMAL ; Untyped ;
+; CLOCK_ENABLE_INPUT_B ; NORMAL ; Untyped ;
+; CLOCK_ENABLE_OUTPUT_A ; NORMAL ; Untyped ;
+; CLOCK_ENABLE_OUTPUT_B ; NORMAL ; Untyped ;
+; CLOCK_ENABLE_CORE_A ; USE_INPUT_CLKEN ; Untyped ;
+; CLOCK_ENABLE_CORE_B ; USE_INPUT_CLKEN ; Untyped ;
+; ENABLE_ECC ; FALSE ; Untyped ;
+; ECC_PIPELINE_STAGE_ENABLED ; FALSE ; Untyped ;
+; WIDTH_ECCSTATUS ; 3 ; Untyped ;
+; DEVICE_FAMILY ; Cyclone V ; Untyped ;
+; CBXI_PARAMETER ; altsyncram_nms1 ; Untyped ;
++------------------------------------+--------------------------------------------------+-----------------+
+Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+
+
++------------------------------------------------------------------------------------------------------------+
+; altsyncram Parameter Settings by Entity Instance ;
++-------------------------------------------+----------------------------------------------------------------+
+; Name ; Value ;
++-------------------------------------------+----------------------------------------------------------------+
+; Number of entity instances ; 2 ;
+; Entity Instance ; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0 ;
+; -- OPERATION_MODE ; DUAL_PORT ;
+; -- WIDTH_A ; 1 ;
+; -- NUMWORDS_A ; 307200 ;
+; -- OUTDATA_REG_A ; UNREGISTERED ;
+; -- WIDTH_B ; 1 ;
+; -- NUMWORDS_B ; 307200 ;
+; -- ADDRESS_REG_B ; CLOCK0 ;
+; -- OUTDATA_REG_B ; UNREGISTERED ;
+; -- RAM_BLOCK_TYPE ; AUTO ;
+; -- READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA ;
+; Entity Instance ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0 ;
+; -- OPERATION_MODE ; DUAL_PORT ;
+; -- WIDTH_A ; 32 ;
+; -- NUMWORDS_A ; 4096 ;
+; -- OUTDATA_REG_A ; UNREGISTERED ;
+; -- WIDTH_B ; 32 ;
+; -- NUMWORDS_B ; 4096 ;
+; -- ADDRESS_REG_B ; CLOCK0 ;
+; -- OUTDATA_REG_B ; UNREGISTERED ;
+; -- RAM_BLOCK_TYPE ; AUTO ;
+; -- READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA ;
++-------------------------------------------+----------------------------------------------------------------+
+
+
++---------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+; Port Connectivity Checks: "razzle:raz_inst" ;
++-------+-------+----------+------------------------------------------------------------------------------------------------------------------------------------------------+
+; Port ; Type ; Severity ; Details ;
++-------+-------+----------+------------------------------------------------------------------------------------------------------------------------------------------------+
+; pixel ; Input ; Warning ; Input port expression (1 bits) is smaller than the input port (10 bits) it drives. Extra input bit(s) "pixel[9..1]" will be connected to GND. ;
++-------+-------+----------+------------------------------------------------------------------------------------------------------------------------------------------------+
+
+
++-------------------------------------------------------------------------------------------------------------------------+
+; Port Connectivity Checks: "arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic" ;
++---------------+--------+----------+-------------------------------------------------------------------------------------+
+; Port ; Type ; Severity ; Details ;
++---------------+--------+----------+-------------------------------------------------------------------------------------+
+; vis_r0_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+; vis_r1_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+; vis_r2_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+; vis_r3_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+; vis_r4_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+; vis_r5_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+; vis_r6_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+; vis_r7_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+; vis_r8_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+; vis_r9_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+; vis_r10_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+; vis_r11_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+; vis_r12_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+; vis_msp_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+; vis_psp_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+; vis_r14_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+; vis_pc_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+; vis_apsr_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+; vis_tbit_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+; vis_ipsr_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+; vis_control_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+; vis_primask_o ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
++---------------+--------+----------+-------------------------------------------------------------------------------------+
+
+
++-----------------------------------------------------------------------------------------------------------------------+
+; Port Connectivity Checks: "arm_soc:soc_inst|CORTEXM0DS:m0_1" ;
++-------------+--------+----------+-------------------------------------------------------------------------------------+
+; Port ; Type ; Severity ; Details ;
++-------------+--------+----------+-------------------------------------------------------------------------------------+
+; HBURST ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+; HMASTLOCK ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+; HPROT ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+; HRESP ; Input ; Info ; Stuck at GND ;
+; NMI ; Input ; Info ; Stuck at GND ;
+; IRQ ; Input ; Info ; Stuck at GND ;
+; TXEV ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+; RXEV ; Input ; Info ; Stuck at GND ;
+; SYSRESETREQ ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+; SLEEPING ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
++-------------+--------+----------+-------------------------------------------------------------------------------------+
+
+
++----------------------------------------------------+
+; Port Connectivity Checks: "arm_soc:soc_inst" ;
++------------------+-------+----------+--------------+
+; Port ; Type ; Severity ; Details ;
++------------------+-------+----------+--------------+
+; Switches[15..10] ; Input ; Info ; Stuck at GND ;
++------------------+-------+----------+--------------+
+
+
++-----------------------------------------------------+
+; Post-Synthesis Netlist Statistics for Top Partition ;
++-----------------------+-----------------------------+
+; Type ; Count ;
++-----------------------+-----------------------------+
+; arriav_ff ; 950 ;
+; CLR ; 235 ;
+; CLR SCLR ; 20 ;
+; ENA ; 2 ;
+; ENA CLR ; 665 ;
+; ENA CLR SCLR ; 11 ;
+; ENA CLR SCLR SLD ; 11 ;
+; plain ; 6 ;
+; arriav_lcell_comb ; 3179 ;
+; arith ; 173 ;
+; 0 data inputs ; 1 ;
+; 1 data inputs ; 127 ;
+; 2 data inputs ; 12 ;
+; 4 data inputs ; 2 ;
+; 5 data inputs ; 31 ;
+; extend ; 36 ;
+; 7 data inputs ; 36 ;
+; normal ; 2958 ;
+; 0 data inputs ; 2 ;
+; 1 data inputs ; 19 ;
+; 2 data inputs ; 228 ;
+; 3 data inputs ; 288 ;
+; 4 data inputs ; 686 ;
+; 5 data inputs ; 713 ;
+; 6 data inputs ; 1022 ;
+; shared ; 12 ;
+; 0 data inputs ; 1 ;
+; 1 data inputs ; 2 ;
+; 2 data inputs ; 8 ;
+; 3 data inputs ; 1 ;
+; boundary_port ; 81 ;
+; stratixv_ram_block ; 70 ;
+; ; ;
+; Max LUT depth ; 14.00 ;
+; Average LUT depth ; 9.86 ;
++-----------------------+-----------------------------+
+
+
++-------------------------------+
+; Elapsed Time Per Partition ;
++----------------+--------------+
+; Partition Name ; Elapsed Time ;
++----------------+--------------+
+; Top ; 00:00:14 ;
++----------------+--------------+
+
+
++-------------------------------+
+; Analysis & Synthesis Messages ;
++-------------------------------+
+Info: *******************************************************************
+Info: Running Quartus Prime Analysis & Synthesis
+ Info: Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
+ Info: Processing started: Thu Sep 24 11:18:33 2020
+Info: Command: quartus_map --read_settings_files=on --write_settings_files=off project24_09 -c de1_soc_wrapper
+Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
+Info (20030): Parallel compilation is enabled and will use 16 of the 24 processors detected
+Info (12021): Found 1 design units, including 1 entities, in source file behavioural/razzle.sv
+ Info (12023): Found entity 1: razzle File: /home/ks6n19/Documents/project/behavioural/razzle.sv Line: 8
+Info (12021): Found 1 design units, including 1 entities, in source file behavioural/ahb_interconnect.sv
+ Info (12023): Found entity 1: ahb_interconnect File: /home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv Line: 1
+Info (12021): Found 1 design units, including 1 entities, in source file behavioural/ahb_pixel_memory.sv
+ Info (12023): Found entity 1: ahb_pixel_memory File: /home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv Line: 23
+Info (12021): Found 1 design units, including 1 entities, in source file behavioural/ahb_ram.sv
+ Info (12023): Found entity 1: ahb_ram File: /home/ks6n19/Documents/project/behavioural/ahb_ram.sv Line: 24
+Info (12021): Found 1 design units, including 1 entities, in source file behavioural/ahb_switches.sv
+ Info (12023): Found entity 1: ahb_switches File: /home/ks6n19/Documents/project/behavioural/ahb_switches.sv Line: 32
+Info (12021): Found 1 design units, including 1 entities, in source file behavioural/arm_soc.sv
+ Info (12023): Found entity 1: arm_soc File: /home/ks6n19/Documents/project/behavioural/arm_soc.sv Line: 4
+Info (12021): Found 1 design units, including 1 entities, in source file behavioural/CORTEXM0DS.sv
+ Info (12023): Found entity 1: CORTEXM0DS File: /home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv Line: 27
+Info (12021): Found 1 design units, including 1 entities, in source file behavioural/cortexm0ds_logic.sv
+ Info (12023): Found entity 1: cortexm0ds_logic File: /home/ks6n19/Documents/project/behavioural/cortexm0ds_logic.sv Line: 27
+Info (12021): Found 1 design units, including 1 entities, in source file behavioural/de1_soc_wrapper.sv
+ Info (12023): Found entity 1: de1_soc_wrapper File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 8
+Warning (10236): Verilog HDL Implicit Net warning at razzle.sv(44): created implicit net for "Green_Data" File: /home/ks6n19/Documents/project/behavioural/razzle.sv Line: 44
+Warning (10236): Verilog HDL Implicit Net warning at razzle.sv(45): created implicit net for "Blue_Data" File: /home/ks6n19/Documents/project/behavioural/razzle.sv Line: 45
+Info (12127): Elaborating entity "de1_soc_wrapper" for the top level hierarchy
+Warning (10230): Verilog HDL assignment warning at de1_soc_wrapper.sv(75): truncated value with size 32 to match size of target (26) File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 75
+Warning (10230): Verilog HDL assignment warning at de1_soc_wrapper.sv(87): truncated value with size 8 to match size of target (7) File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 87
+Warning (10034): Output port "LEDR" at de1_soc_wrapper.sv(15) has no driver File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 15
+Info (12128): Elaborating entity "arm_soc" for hierarchy "arm_soc:soc_inst" File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 42
+Info (12128): Elaborating entity "CORTEXM0DS" for hierarchy "arm_soc:soc_inst|CORTEXM0DS:m0_1" File: /home/ks6n19/Documents/project/behavioural/arm_soc.sv Line: 56
+Warning (10036): Verilog HDL or VHDL warning at CORTEXM0DS.sv(76): object "cm0_msp" assigned a value but never read File: /home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv Line: 76
+Warning (10036): Verilog HDL or VHDL warning at CORTEXM0DS.sv(77): object "cm0_psp" assigned a value but never read File: /home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv Line: 77
+Warning (10036): Verilog HDL or VHDL warning at CORTEXM0DS.sv(79): object "cm0_pc" assigned a value but never read File: /home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv Line: 79
+Warning (10036): Verilog HDL or VHDL warning at CORTEXM0DS.sv(80): object "cm0_xpsr" assigned a value but never read File: /home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv Line: 80
+Warning (10036): Verilog HDL or VHDL warning at CORTEXM0DS.sv(81): object "cm0_control" assigned a value but never read File: /home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv Line: 81
+Warning (10036): Verilog HDL or VHDL warning at CORTEXM0DS.sv(82): object "cm0_primask" assigned a value but never read File: /home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv Line: 82
+Info (12128): Elaborating entity "cortexm0ds_logic" for hierarchy "arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic" File: /home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv Line: 144
+Warning (10036): Verilog HDL or VHDL warning at cortexm0ds_logic.sv(1133): object "N4i2z4" assigned a value but never read File: /home/ks6n19/Documents/project/behavioural/cortexm0ds_logic.sv Line: 1133
+Warning (10036): Verilog HDL or VHDL warning at cortexm0ds_logic.sv(1133): object "L5i2z4" assigned a value but never read File: /home/ks6n19/Documents/project/behavioural/cortexm0ds_logic.sv Line: 1133
+Info (12128): Elaborating entity "ahb_interconnect" for hierarchy "arm_soc:soc_inst|ahb_interconnect:interconnect_1" File: /home/ks6n19/Documents/project/behavioural/arm_soc.sv Line: 68
+Warning (10230): Verilog HDL assignment warning at ahb_interconnect.sv(39): truncated value with size 32 to match size of target (3) File: /home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv Line: 39
+Warning (10230): Verilog HDL assignment warning at ahb_interconnect.sv(41): truncated value with size 32 to match size of target (3) File: /home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv Line: 41
+Warning (10230): Verilog HDL assignment warning at ahb_interconnect.sv(43): truncated value with size 32 to match size of target (3) File: /home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv Line: 43
+Info (12128): Elaborating entity "ahb_ram" for hierarchy "arm_soc:soc_inst|ahb_ram:ram_1" File: /home/ks6n19/Documents/project/behavioural/arm_soc.sv Line: 79
+Warning (10850): Verilog HDL warning at ahb_ram.sv(69): number of words (199) in memory file does not match the number of elements in the address range [0:4095] File: /home/ks6n19/Documents/project/behavioural/ahb_ram.sv Line: 69
+Info (12128): Elaborating entity "ahb_switches" for hierarchy "arm_soc:soc_inst|ahb_switches:switches_1" File: /home/ks6n19/Documents/project/behavioural/arm_soc.sv Line: 89
+Info (12128): Elaborating entity "ahb_pixel_memory" for hierarchy "arm_soc:soc_inst|ahb_pixel_memory:pix1" File: /home/ks6n19/Documents/project/behavioural/arm_soc.sv Line: 95
+Warning (10036): Verilog HDL or VHDL warning at ahb_pixel_memory.sv(62): object "read_enable" assigned a value but never read File: /home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv Line: 62
+Warning (10230): Verilog HDL assignment warning at ahb_pixel_memory.sv(94): truncated value with size 32 to match size of target (1) File: /home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv Line: 94
+Warning (10230): Verilog HDL assignment warning at ahb_pixel_memory.sv(98): truncated value with size 32 to match size of target (19) File: /home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv Line: 98
+Info (12128): Elaborating entity "razzle" for hierarchy "razzle:raz_inst" File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 49
+Warning (10230): Verilog HDL assignment warning at razzle.sv(34): truncated value with size 32 to match size of target (8) File: /home/ks6n19/Documents/project/behavioural/razzle.sv Line: 34
+Warning (10230): Verilog HDL assignment warning at razzle.sv(35): truncated value with size 32 to match size of target (8) File: /home/ks6n19/Documents/project/behavioural/razzle.sv Line: 35
+Warning (10230): Verilog HDL assignment warning at razzle.sv(36): truncated value with size 32 to match size of target (8) File: /home/ks6n19/Documents/project/behavioural/razzle.sv Line: 36
+Warning (10230): Verilog HDL assignment warning at razzle.sv(43): truncated value with size 10 to match size of target (1) File: /home/ks6n19/Documents/project/behavioural/razzle.sv Line: 43
+Warning (10230): Verilog HDL assignment warning at razzle.sv(55): truncated value with size 11 to match size of target (10) File: /home/ks6n19/Documents/project/behavioural/razzle.sv Line: 55
+Warning (10230): Verilog HDL assignment warning at razzle.sv(56): truncated value with size 11 to match size of target (9) File: /home/ks6n19/Documents/project/behavioural/razzle.sv Line: 56
+Warning (10230): Verilog HDL assignment warning at razzle.sv(95): truncated value with size 32 to match size of target (11) File: /home/ks6n19/Documents/project/behavioural/razzle.sv Line: 95
+Warning (10230): Verilog HDL assignment warning at razzle.sv(112): truncated value with size 32 to match size of target (11) File: /home/ks6n19/Documents/project/behavioural/razzle.sv Line: 112
+Info (19000): Inferred 2 megafunctions from design logic
+ Info (276029): Inferred altsyncram megafunction from the following design logic: "arm_soc:soc_inst|ahb_pixel_memory:pix1|memory_rtl_0"
+ Info (286033): Parameter OPERATION_MODE set to DUAL_PORT
+ Info (286033): Parameter WIDTH_A set to 1
+ Info (286033): Parameter WIDTHAD_A set to 19
+ Info (286033): Parameter NUMWORDS_A set to 307200
+ Info (286033): Parameter WIDTH_B set to 1
+ Info (286033): Parameter WIDTHAD_B set to 19
+ Info (286033): Parameter NUMWORDS_B set to 307200
+ Info (286033): Parameter ADDRESS_ACLR_A set to NONE
+ Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED
+ Info (286033): Parameter ADDRESS_ACLR_B set to NONE
+ Info (286033): Parameter OUTDATA_ACLR_B set to NONE
+ Info (286033): Parameter ADDRESS_REG_B set to CLOCK0
+ Info (286033): Parameter INDATA_ACLR_A set to NONE
+ Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
+ Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA
+ Info (276029): Inferred altsyncram megafunction from the following design logic: "arm_soc:soc_inst|ahb_ram:ram_1|memory_rtl_0"
+ Info (286033): Parameter OPERATION_MODE set to DUAL_PORT
+ Info (286033): Parameter WIDTH_A set to 32
+ Info (286033): Parameter WIDTHAD_A set to 12
+ Info (286033): Parameter NUMWORDS_A set to 4096
+ Info (286033): Parameter WIDTH_B set to 32
+ Info (286033): Parameter WIDTHAD_B set to 12
+ Info (286033): Parameter NUMWORDS_B set to 4096
+ Info (286033): Parameter ADDRESS_ACLR_A set to NONE
+ Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED
+ Info (286033): Parameter ADDRESS_ACLR_B set to NONE
+ Info (286033): Parameter OUTDATA_ACLR_B set to NONE
+ Info (286033): Parameter ADDRESS_REG_B set to CLOCK0
+ Info (286033): Parameter INDATA_ACLR_A set to NONE
+ Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
+ Info (286033): Parameter INIT_FILE set to db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif
+ Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA
+Info (12130): Elaborated megafunction instantiation "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0"
+Info (12133): Instantiated megafunction "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0" with the following parameter:
+ Info (12134): Parameter "OPERATION_MODE" = "DUAL_PORT"
+ Info (12134): Parameter "WIDTH_A" = "1"
+ Info (12134): Parameter "WIDTHAD_A" = "19"
+ Info (12134): Parameter "NUMWORDS_A" = "307200"
+ Info (12134): Parameter "WIDTH_B" = "1"
+ Info (12134): Parameter "WIDTHAD_B" = "19"
+ Info (12134): Parameter "NUMWORDS_B" = "307200"
+ Info (12134): Parameter "ADDRESS_ACLR_A" = "NONE"
+ Info (12134): Parameter "OUTDATA_REG_B" = "UNREGISTERED"
+ Info (12134): Parameter "ADDRESS_ACLR_B" = "NONE"
+ Info (12134): Parameter "OUTDATA_ACLR_B" = "NONE"
+ Info (12134): Parameter "ADDRESS_REG_B" = "CLOCK0"
+ Info (12134): Parameter "INDATA_ACLR_A" = "NONE"
+ Info (12134): Parameter "WRCONTROL_ACLR_A" = "NONE"
+ Info (12134): Parameter "READ_DURING_WRITE_MODE_MIXED_PORTS" = "OLD_DATA"
+Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_efn1.tdf
+ Info (12023): Found entity 1: altsyncram_efn1 File: /home/ks6n19/Documents/project/db/altsyncram_efn1.tdf Line: 32
+Info (12021): Found 1 design units, including 1 entities, in source file db/decode_3na.tdf
+ Info (12023): Found entity 1: decode_3na File: /home/ks6n19/Documents/project/db/decode_3na.tdf Line: 23
+Info (12021): Found 1 design units, including 1 entities, in source file db/mux_chb.tdf
+ Info (12023): Found entity 1: mux_chb File: /home/ks6n19/Documents/project/db/mux_chb.tdf Line: 23
+Info (12130): Elaborated megafunction instantiation "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0"
+Info (12133): Instantiated megafunction "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0" with the following parameter:
+ Info (12134): Parameter "OPERATION_MODE" = "DUAL_PORT"
+ Info (12134): Parameter "WIDTH_A" = "32"
+ Info (12134): Parameter "WIDTHAD_A" = "12"
+ Info (12134): Parameter "NUMWORDS_A" = "4096"
+ Info (12134): Parameter "WIDTH_B" = "32"
+ Info (12134): Parameter "WIDTHAD_B" = "12"
+ Info (12134): Parameter "NUMWORDS_B" = "4096"
+ Info (12134): Parameter "ADDRESS_ACLR_A" = "NONE"
+ Info (12134): Parameter "OUTDATA_REG_B" = "UNREGISTERED"
+ Info (12134): Parameter "ADDRESS_ACLR_B" = "NONE"
+ Info (12134): Parameter "OUTDATA_ACLR_B" = "NONE"
+ Info (12134): Parameter "ADDRESS_REG_B" = "CLOCK0"
+ Info (12134): Parameter "INDATA_ACLR_A" = "NONE"
+ Info (12134): Parameter "WRCONTROL_ACLR_A" = "NONE"
+ Info (12134): Parameter "INIT_FILE" = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif"
+ Info (12134): Parameter "READ_DURING_WRITE_MODE_MIXED_PORTS" = "OLD_DATA"
+Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_nms1.tdf
+ Info (12023): Found entity 1: altsyncram_nms1 File: /home/ks6n19/Documents/project/db/altsyncram_nms1.tdf Line: 28
+Warning (127007): Memory Initialization File or Hexadecimal (Intel-Format) File "/home/ks6n19/Documents/project/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif" contains "don't care" values -- overwriting them with 0s File: /srv/intelFPGA/16.1/quartus/libraries/megafunctions/altsyncram.tdf Line: 792
+Warning (127007): Memory Initialization File or Hexadecimal (Intel-Format) File "/home/ks6n19/Documents/project/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif" contains "don't care" values -- overwriting them with 0s File: /srv/intelFPGA/16.1/quartus/libraries/megafunctions/altsyncram.tdf Line: 792
+Warning (12241): 1 hierarchies have connectivity warnings - see the Connectivity Checks report folder
+Warning (13024): Output pins are stuck at VCC or GND
+ Warning (13410): Pin "LEDR[0]" is stuck at GND File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 15
+ Warning (13410): Pin "LEDR[1]" is stuck at GND File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 15
+ Warning (13410): Pin "LEDR[2]" is stuck at GND File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 15
+ Warning (13410): Pin "LEDR[3]" is stuck at GND File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 15
+ Warning (13410): Pin "LEDR[4]" is stuck at GND File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 15
+ Warning (13410): Pin "LEDR[5]" is stuck at GND File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 15
+ Warning (13410): Pin "LEDR[6]" is stuck at GND File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 15
+ Warning (13410): Pin "LEDR[7]" is stuck at GND File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 15
+ Warning (13410): Pin "LEDR[8]" is stuck at GND File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 15
+ Warning (13410): Pin "LEDR[9]" is stuck at GND File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 15
+ Warning (13410): Pin "HEX0[0]" is stuck at VCC File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 16
+ Warning (13410): Pin "HEX0[1]" is stuck at VCC File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 16
+ Warning (13410): Pin "HEX0[5]" is stuck at VCC File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 16
+ Warning (13410): Pin "HEX1[1]" is stuck at VCC File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 17
+ Warning (13410): Pin "HEX1[2]" is stuck at VCC File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 17
+ Warning (13410): Pin "HEX1[3]" is stuck at VCC File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 17
+ Warning (13410): Pin "HEX1[4]" is stuck at VCC File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 17
+ Warning (13410): Pin "HEX1[5]" is stuck at VCC File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 17
+ Warning (13410): Pin "HEX1[6]" is stuck at VCC File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 17
+ Warning (13410): Pin "HEX2[0]" is stuck at VCC File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 18
+ Warning (13410): Pin "HEX2[1]" is stuck at VCC File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 18
+ Warning (13410): Pin "HEX2[2]" is stuck at VCC File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 18
+ Warning (13410): Pin "HEX2[3]" is stuck at VCC File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 18
+ Warning (13410): Pin "HEX2[5]" is stuck at VCC File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 18
+ Warning (13410): Pin "HEX3[0]" is stuck at VCC File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 19
+ Warning (13410): Pin "HEX3[1]" is stuck at VCC File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 19
+ Warning (13410): Pin "HEX3[2]" is stuck at VCC File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 19
+ Warning (13410): Pin "HEX3[6]" is stuck at VCC File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 19
+ Warning (13410): Pin "VGA_G[0]" is stuck at GND File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 20
+ Warning (13410): Pin "VGA_G[1]" is stuck at GND File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 20
+ Warning (13410): Pin "VGA_G[2]" is stuck at GND File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 20
+ Warning (13410): Pin "VGA_G[3]" is stuck at GND File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 20
+ Warning (13410): Pin "VGA_G[4]" is stuck at GND File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 20
+ Warning (13410): Pin "VGA_G[5]" is stuck at GND File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 20
+ Warning (13410): Pin "VGA_G[6]" is stuck at GND File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 20
+ Warning (13410): Pin "VGA_G[7]" is stuck at GND File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 20
+ Warning (13410): Pin "VGA_B[0]" is stuck at GND File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 20
+ Warning (13410): Pin "VGA_B[1]" is stuck at GND File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 20
+ Warning (13410): Pin "VGA_B[2]" is stuck at GND File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 20
+ Warning (13410): Pin "VGA_B[3]" is stuck at GND File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 20
+ Warning (13410): Pin "VGA_B[4]" is stuck at GND File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 20
+ Warning (13410): Pin "VGA_B[5]" is stuck at GND File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 20
+ Warning (13410): Pin "VGA_B[6]" is stuck at GND File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 20
+ Warning (13410): Pin "VGA_B[7]" is stuck at GND File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 20
+Info (286030): Timing-Driven Synthesis is running
+Info (17049): 17 registers lost all their fanouts during netlist optimizations.
+Info (144001): Generated suppressed messages file /home/ks6n19/Documents/project/output_files/de1_soc_wrapper.map.smsg
+Info (16010): Generating hard_block partition "hard_block:auto_generated_inst"
+ Info (16011): Adding 0 node(s), including 0 DDIO, 0 PLL, 0 transceiver and 0 LCELL
+Warning (21074): Design contains 1 input pin(s) that do not drive logic
+ Warning (15610): No output dependent on input pin "KEY[3]" File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 13
+Info (21057): Implemented 3988 device resources after synthesis - the final resource count might be different
+ Info (21058): Implemented 15 input pins
+ Info (21059): Implemented 66 output pins
+ Info (21061): Implemented 3837 logic cells
+ Info (21064): Implemented 70 RAM segments
+Info: Quartus Prime Analysis & Synthesis was successful. 0 errors, 79 warnings
+ Info: Peak virtual memory: 1276 megabytes
+ Info: Processing ended: Thu Sep 24 11:19:00 2020
+ Info: Elapsed time: 00:00:27
+ Info: Total CPU time (on all processors): 00:00:42
+
+
++------------------------------------------+
+; Analysis & Synthesis Suppressed Messages ;
++------------------------------------------+
+The suppressed messages can be found in /home/ks6n19/Documents/project/output_files/de1_soc_wrapper.map.smsg.
+
+
diff --git a/output_files/de1_soc_wrapper.map.smsg b/output_files/de1_soc_wrapper.map.smsg
new file mode 100644
index 0000000000000000000000000000000000000000..37644580e675ec693dde070c11c98fd7a69e39e6
--- /dev/null
+++ b/output_files/de1_soc_wrapper.map.smsg
@@ -0,0 +1 @@
+Warning (10268): Verilog HDL information at de1_soc_wrapper.sv(64): always construct contains both blocking and non-blocking assignments File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 64
diff --git a/output_files/de1_soc_wrapper.map.summary b/output_files/de1_soc_wrapper.map.summary
new file mode 100644
index 0000000000000000000000000000000000000000..abf6da532ef559d822c1ebdab3c15fea402affd7
--- /dev/null
+++ b/output_files/de1_soc_wrapper.map.summary
@@ -0,0 +1,17 @@
+Analysis & Synthesis Status : Successful - Thu Sep 24 11:19:00 2020
+Quartus Prime Version : 16.1.2 Build 203 01/18/2017 SJ Standard Edition
+Revision Name : de1_soc_wrapper
+Top-level Entity Name : de1_soc_wrapper
+Family : Cyclone V
+Logic utilization (in ALMs) : N/A
+Total registers : 950
+Total pins : 81
+Total virtual pins : 0
+Total block memory bits : 438,272
+Total DSP Blocks : 0
+Total HSSI RX PCSs : 0
+Total HSSI PMA RX Deserializers : 0
+Total HSSI TX PCSs : 0
+Total HSSI PMA TX Serializers : 0
+Total PLLs : 0
+Total DLLs : 0
diff --git a/output_files/de1_soc_wrapper.pin b/output_files/de1_soc_wrapper.pin
new file mode 100644
index 0000000000000000000000000000000000000000..982825e8c2720708940615a9982d831cca78c2d0
--- /dev/null
+++ b/output_files/de1_soc_wrapper.pin
@@ -0,0 +1,977 @@
+ -- Copyright (C) 2017 Intel Corporation. All rights reserved.
+ -- Your use of Intel Corporation's design tools, logic functions
+ -- and other software and tools, and its AMPP partner logic
+ -- functions, and any output files from any of the foregoing
+ -- (including device programming or simulation files), and any
+ -- associated documentation or information are expressly subject
+ -- to the terms and conditions of the Intel Program License
+ -- Subscription Agreement, the Intel Quartus Prime License Agreement,
+ -- the Intel MegaCore Function License Agreement, or other
+ -- applicable license agreement, including, without limitation,
+ -- that your use is for the sole purpose of programming logic
+ -- devices manufactured by Intel and sold by Intel or its
+ -- authorized distributors. Please refer to the applicable
+ -- agreement for further details.
+ --
+ -- This is a Quartus Prime output file. It is for reporting purposes only, and is
+ -- not intended for use as a Quartus Prime input file. This file cannot be used
+ -- to make Quartus Prime pin assignments - for instructions on how to make pin
+ -- assignments, please see Quartus Prime help.
+ ---------------------------------------------------------------------------------
+
+
+
+ ---------------------------------------------------------------------------------
+ -- NC : No Connect. This pin has no internal connection to the device.
+ -- DNU : Do Not Use. This pin MUST NOT be connected.
+ -- VCCPGM : Dedicated power pin for configuration, which MUST be connected to 1.8V, 2.5V, 3.0V or 3.3V depending on the requirements of the configuration device.
+ -- VCCINT : Dedicated power pin, which MUST be connected to VCC (1.1V).
+ -- VCCIO : Dedicated power pin, which MUST be connected to VCC
+ -- of its bank.
+ -- Bank 3A: 2.5V
+ -- Bank 3B: 2.5V
+ -- Bank 4A: 2.5V
+ -- Bank 5A: 2.5V
+ -- Bank 5B: 2.5V
+ -- Bank 6B: 2.5V
+ -- Bank 6A: 2.5V
+ -- Bank 7A: 2.5V
+ -- Bank 7B: 2.5V
+ -- Bank 7C: 2.5V
+ -- Bank 7D: 2.5V
+ -- Bank 8A: 2.5V
+ -- Bank 9A: Dedicated configuration pins only, no VCCIO required.
+ -- RREF : External reference resistor for the quad, MUST be connected to
+ -- GND via a 2k Ohm resistor.
+ -- GND : Dedicated ground pin. Dedicated GND pins MUST be connected to GND.
+ -- It can also be used to report unused dedicated pins. The connection
+ -- on the board for unused dedicated pins depends on whether this will
+ -- be used in a future design. One example is device migration. When
+ -- using device migration, refer to the device pin-tables. If it is a
+ -- GND pin in the pin table or if it will not be used in a future design
+ -- for another purpose the it MUST be connected to GND. If it is an unused
+ -- dedicated pin, then it can be connected to a valid signal on the board
+ -- (low, high, or toggling) if that signal is required for a different
+ -- revision of the design.
+ -- GND+ : Unused input pin. It can also be used to report unused dual-purpose pins.
+ -- This pin should be connected to GND. It may also be connected to a
+ -- valid signal on the board (low, high, or toggling) if that signal
+ -- is required for a different revision of the design.
+ -- GND* : Unused I/O pin. Connect each pin marked GND* directly to GND
+ -- or leave it unconnected.
+ -- RESERVED : Unused I/O pin, which MUST be left unconnected.
+ -- RESERVED_INPUT : Pin is tri-stated and should be connected to the board.
+ -- RESERVED_INPUT_WITH_WEAK_PULLUP : Pin is tri-stated with internal weak pull-up resistor.
+ -- RESERVED_INPUT_WITH_BUS_HOLD : Pin is tri-stated with bus-hold circuitry.
+ -- RESERVED_OUTPUT_DRIVEN_HIGH : Pin is output driven high.
+ -- GXB_NC : Unused GXB Transmitter or dedicated clock output pin. This pin
+ -- must not be connected.
+ ---------------------------------------------------------------------------------
+
+
+
+ ---------------------------------------------------------------------------------
+ -- Pin directions (input, output or bidir) are based on device operating in user mode.
+ ---------------------------------------------------------------------------------
+
+Quartus Prime Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
+CHIP "de1_soc_wrapper" ASSIGNED TO AN: 5CSEMA5F31C6
+
+Pin Name/Usage : Location : Dir. : I/O Standard : Voltage : I/O Bank : User Assignment
+-------------------------------------------------------------------------------------------------------------
+GND : A2 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : A3 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : A4 : : : : 8A :
+LEDR[9] : A5 : output : 2.5 V : : 8A : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : A6 : : : : 8A :
+VCCIO8A : A7 : power : : 2.5V : 8A :
+LEDR[2] : A8 : output : 2.5 V : : 8A : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : A9 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : A10 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : A11 : : : : 8A :
+GND : A12 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : A13 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : A14 : : : : 7D :
+RESERVED_INPUT_WITH_WEAK_PULLUP : A15 : : : : 7D :
+RESERVED_INPUT_WITH_WEAK_PULLUP : A16 : : : : 7C :
+GND : A17 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : A18 : : : : 7B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : A19 : : : : 7B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : A20 : : : : 7B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : A21 : : : : 7B :
+GND : A22 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : A23 : : : : 7A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : A24 : : : : 7A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : A25 : : : : 7A :
+GND : A26 : : : : 7A :
+GND : A27 : gnd : : : :
+HPS_TRST : A28 : : : : 7A :
+HPS_TMS : A29 : : : : 7A :
+GND : AA1 : gnd : : : :
+GND : AA2 : gnd : : : :
+GND : AA3 : gnd : : : :
+GND : AA4 : gnd : : : :
+VCC : AA5 : power : : 1.1V : :
+GND : AA6 : gnd : : : :
+DNU : AA7 : : : : :
+VCCA_FPLL : AA8 : power : : 2.5V : :
+GND : AA9 : gnd : : : :
+VCCPD3A : AA10 : power : : 2.5V : 3A :
+GND : AA11 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AA12 : : : : 3A :
+VGA_R[7] : AA13 : output : 2.5 V : : 3B : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : AA14 : : : : 3B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AA15 : : : : 3B :
+HEX0[3] : AA16 : output : 2.5 V : : 4A : N
+VCCIO4A : AA17 : power : : 2.5V : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AA18 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AA19 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AA20 : : : : 4A :
+LEDR[5] : AA21 : output : 2.5 V : : 4A : N
+GND : AA22 : gnd : : : :
+VCCPGM : AA23 : power : : 1.8V/2.5V/3.0V/3.3V : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AA24 : : : : 5A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AA25 : : : : 5A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AA26 : : : : 5B :
+VCCIO5B : AA27 : power : : 2.5V : 5B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AA28 : : : : 5B :
+VREFB5BN0 : AA29 : power : : : 5B :
+HEX3[6] : AA30 : output : 2.5 V : : 5B : N
+GND : AB1 : gnd : : : :
+GND : AB2 : gnd : : : :
+DNU : AB3 : : : : :
+DNU : AB4 : : : : :
+GND : AB5 : gnd : : : :
+VCCA_FPLL : AB6 : power : : 2.5V : :
+GND : AB7 : gnd : : : :
+nCSO, DATA4 : AB8 : : : : 3A :
+TDO : AB9 : output : : : 3A :
+VCCPGM : AB10 : power : : 1.8V/2.5V/3.0V/3.3V : :
+VCC_AUX : AB11 : power : : 2.5V : :
+VGA_R[1] : AB12 : output : 2.5 V : : 3A : N
+HEX0[0] : AB13 : output : 2.5 V : : 3B : N
+VCCIO3B : AB14 : power : : 2.5V : 3B :
+VGA_B[0] : AB15 : output : 2.5 V : : 3B : N
+VCC_AUX : AB16 : power : : 2.5V : :
+HEX0[4] : AB17 : output : 2.5 V : : 4A : N
+VCCPD3B4A : AB18 : power : : 2.5V : 3B, 4A :
+GND : AB19 : gnd : : : :
+VCCPD3B4A : AB20 : power : : 2.5V : 3B, 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AB21 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AB22 : : : : 5A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AB23 : : : : 5A :
+VCCIO5A : AB24 : power : : 2.5V : 5A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AB25 : : : : 5A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AB26 : : : : 5A :
+CLOCK_50 : AB27 : input : 2.5 V : : 5B : N
+HEX1[1] : AB28 : output : 2.5 V : : 5B : N
+GND : AB29 : gnd : : : :
+HEX1[5] : AB30 : output : 2.5 V : : 5B : N
+GND : AC1 : gnd : : : :
+GND : AC2 : gnd : : : :
+GND : AC3 : gnd : : : :
+GND : AC4 : gnd : : : :
+TCK : AC5 : input : : : 3A :
+GND : AC6 : gnd : : : :
+AS_DATA3, DATA3 : AC7 : : : : 3A :
+GND : AC8 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AC9 : : : : 3A :
+VCCPD3A : AC10 : power : : 2.5V : 3A :
+VCCIO3A : AC11 : power : : 2.5V : 3A :
+SW[1] : AC12 : input : 2.5 V : : 3A : N
+VCCPD3B4A : AC13 : power : : 2.5V : 3B, 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AC14 : : : : 3B :
+VCCPD3B4A : AC15 : power : : 2.5V : 3B, 4A :
+GND : AC16 : gnd : : : :
+VCCPD3B4A : AC17 : power : : 2.5V : 3B, 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AC18 : : : : 4A :
+VCCPD3B4A : AC19 : power : : 2.5V : 3B, 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AC20 : : : : 4A :
+VCCIO4A : AC21 : power : : 2.5V : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AC22 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AC23 : : : : 4A :
+VREFB5AN0 : AC24 : power : : : 5A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AC25 : : : : 5A :
+GND : AC26 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AC27 : : : : 5A :
+HEX2[6] : AC28 : output : 2.5 V : : 5B : N
+HEX2[4] : AC29 : output : 2.5 V : : 5B : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : AC30 : : : : 5B :
+GND : AD1 : gnd : : : :
+GND : AD2 : gnd : : : :
+DNU : AD3 : : : : :
+DNU : AD4 : : : : :
+GND : AD5 : gnd : : : :
+VREFB3AN0 : AD6 : power : : : 3A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AD7 : : : : 3A :
+VCCIO3A : AD8 : power : : 2.5V : 3A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AD9 : : : : 3A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AD10 : : : : 3A :
+HEX2[0] : AD11 : output : 2.5 V : : 3A : N
+SW[5] : AD12 : input : 2.5 V : : 3A : N
+VCCIO3B : AD13 : power : : 2.5V : 3B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AD14 : : : : 3B :
+DNU : AD15 : : : : :
+VCCPD3B4A : AD16 : power : : 2.5V : 3B, 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AD17 : : : : 4A :
+VCCIO4A : AD18 : power : : 2.5V : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AD19 : : : : 4A :
+HEX3[2] : AD20 : output : 2.5 V : : 4A : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : AD21 : : : : 4A :
+VCC_AUX : AD22 : power : : 2.5V : :
+GND : AD23 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AD24 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AD25 : : : : 5A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AD26 : : : : 5A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AD27 : : : : 5A :
+VCCIO5A : AD28 : power : : 2.5V : 5A :
+LEDR[4] : AD29 : output : 2.5 V : : 5B : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : AD30 : : : : 5B :
+GND : AE1 : gnd : : : :
+GND : AE2 : gnd : : : :
+GND : AE3 : gnd : : : :
+GND : AE4 : gnd : : : :
+AS_DATA1, DATA1 : AE5 : : : : 3A :
+AS_DATA0, ASDO, DATA0 : AE6 : : : : 3A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AE7 : : : : 3A :
+AS_DATA2, DATA2 : AE8 : : : : 3A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AE9 : : : : 3A :
+GND : AE10 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AE11 : : : : 3A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AE12 : : : : 3A :
+VGA_B[5] : AE13 : output : 2.5 V : : 3B : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : AE14 : : : : 3B :
+VCCIO3B : AE15 : power : : 2.5V : 3B :
+HEX0[6] : AE16 : output : 2.5 V : : 4A : N
+HEX2[1] : AE17 : output : 2.5 V : : 4A : N
+VGA_G[2] : AE18 : output : 2.5 V : : 4A : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : AE19 : : : : 4A :
+GND : AE20 : gnd : : : :
+VCCPD3B4A : AE21 : power : : 2.5V : 3B, 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AE22 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AE23 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AE24 : : : : 4A :
+VCCIO4A : AE25 : power : : 2.5V : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AE26 : : : : 5A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AE27 : : : : 5A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AE28 : : : : 5A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AE29 : : : : 5B :
+VCCIO5B : AE30 : power : : 2.5V : 5B :
+GND : AF1 : gnd : : : :
+GND : AF2 : gnd : : : :
+GND : AF3 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AF4 : : : : 3A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AF5 : : : : 3A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AF6 : : : : 3A :
+VCCIO3A : AF7 : power : : 2.5V : 3A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AF8 : : : : 3A :
+VGA_B[2] : AF9 : output : 2.5 V : : 3A : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : AF10 : : : : 3A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AF11 : : : : 3B :
+GND : AF12 : gnd : : : :
+HEX3[1] : AF13 : output : 2.5 V : : 3B : N
+VGA_VS : AF14 : output : 2.5 V : : 3B : N
+VGA_BLANK_N : AF15 : output : 2.5 V : : 3B : N
+VGA_CLK : AF16 : output : 2.5 V : : 4A : N
+GND : AF17 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AF18 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AF19 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AF20 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AF21 : : : : 4A :
+VCCIO4A : AF22 : power : : 2.5V : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AF23 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AF24 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AF25 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AF26 : : : : 4A :
+GND : AF27 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AF28 : : : : 5A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AF29 : : : : 5A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AF30 : : : : 5A :
+LEDR[6] : AG1 : output : 2.5 V : : 3A : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : AG2 : : : : 3A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AG3 : : : : 3A :
+VCCIO3A : AG4 : power : : 2.5V : 3A :
+KEY[0] : AG5 : input : 2.5 V : : 3A : N
+VGA_R[3] : AG6 : output : 2.5 V : : 3A : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : AG7 : : : : 3A :
+HEX1[4] : AG8 : output : 2.5 V : : 3A : N
+GND : AG9 : gnd : : : :
+SW[2] : AG10 : input : 2.5 V : : 3B : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : AG11 : : : : 3B :
+SW[0] : AG12 : input : 2.5 V : : 3B : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : AG13 : : : : 3B :
+GND : AG14 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AG15 : : : : 3B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AG16 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AG17 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AG18 : : : : 4A :
+VCCIO4A : AG19 : power : : 2.5V : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AG20 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AG21 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AG22 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AG23 : : : : 4A :
+GND : AG24 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AG25 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AG26 : : : : 4A :
+HEX3[0] : AG27 : output : 2.5 V : : 5A : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : AG28 : : : : 5A :
+VCCIO5A : AG29 : power : : 2.5V : 5A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AG30 : : : : 5A :
+GND : AH1 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AH2 : : : : 3A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AH3 : : : : 3A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AH4 : : : : 3A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AH5 : : : : 3A :
+GND : AH6 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AH7 : : : : 3B :
+SW[9] : AH8 : input : 2.5 V : : 3B : N
+KEY[1] : AH9 : input : 2.5 V : : 3B : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : AH10 : : : : 3B :
+GND : AH11 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AH12 : : : : 3B :
+VGA_R[2] : AH13 : output : 2.5 V : : 3B : N
+VGA_R[0] : AH14 : output : 2.5 V : : 3B : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : AH15 : : : : 3B :
+VCCIO4A : AH16 : power : : 2.5V : 4A :
+VGA_G[1] : AH17 : output : 2.5 V : : 4A : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : AH18 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AH19 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AH20 : : : : 4A :
+GND : AH21 : gnd : : : :
+VGA_G[7] : AH22 : output : 2.5 V : : 4A : N
+LEDR[3] : AH23 : output : 2.5 V : : 4A : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : AH24 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AH25 : : : : 4A :
+VCCIO4A : AH26 : power : : 2.5V : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AH27 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AH28 : : : : 5A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AH29 : : : : 5A :
+VGA_B[4] : AH30 : output : 2.5 V : : 5A : N
+VGA_R[5] : AJ1 : output : 2.5 V : : 3A : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : AJ2 : : : : 3A :
+GND : AJ3 : gnd : : : :
+VGA_R[4] : AJ4 : output : 2.5 V : : 3B : N
+SW[3] : AJ5 : input : 2.5 V : : 3B : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : AJ6 : : : : 3B :
+HEX1[0] : AJ7 : output : 2.5 V : : 3B : N
+VCCIO3B : AJ8 : power : : 2.5V : 3B :
+HEX1[6] : AJ9 : output : 2.5 V : : 3B : N
+HEX3[5] : AJ10 : output : 2.5 V : : 3B : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : AJ11 : : : : 3B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AJ12 : : : : 3B :
+VCCIO3B : AJ13 : power : : 2.5V : 3B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AJ14 : : : : 3B :
+VREFB3BN0 : AJ15 : power : : : 3B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AJ16 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AJ17 : : : : 4A :
+GND : AJ18 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AJ19 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AJ20 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AJ21 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AJ22 : : : : 4A :
+VCCIO4A : AJ23 : power : : 2.5V : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AJ24 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AJ25 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AJ26 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AJ27 : : : : 4A :
+GND : AJ28 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AJ29 : : : : 5A :
+GND : AJ30 : gnd : : : :
+SW[7] : AK2 : input : 2.5 V : : 3B : N
+SW[4] : AK3 : input : 2.5 V : : 3B : N
+SW[6] : AK4 : input : 2.5 V : : 3B : N
+GND : AK5 : gnd : : : :
+VGA_R[6] : AK6 : output : 2.5 V : : 3B : N
+SW[8] : AK7 : input : 2.5 V : : 3B : N
+HEX3[4] : AK8 : output : 2.5 V : : 3B : N
+VGA_G[5] : AK9 : output : 2.5 V : : 3B : N
+VCCIO3B : AK10 : power : : 2.5V : 3B :
+HEX3[3] : AK11 : output : 2.5 V : : 3B : N
+VGA_HS : AK12 : output : 2.5 V : : 3B : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : AK13 : : : : 3B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AK14 : : : : 3B :
+GND : AK15 : gnd : : : :
+LEDR[7] : AK16 : output : 2.5 V : : 4A : N
+VREFB4AN0 : AK17 : power : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AK18 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AK19 : : : : 4A :
+VCCIO4A : AK20 : power : : 2.5V : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AK21 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AK22 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AK23 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AK24 : : : : 4A :
+GND : AK25 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AK26 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AK27 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AK28 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : AK29 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : B1 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : B2 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : B3 : : : : 8A :
+VCCIO8A : B4 : power : : 2.5V : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : B5 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : B6 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : B7 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : B8 : : : : 8A :
+GND : B9 : gnd : : : :
+VREFB8AN0 : B10 : power : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : B11 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : B12 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : B13 : : : : 8A :
+GND : B14 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : B15 : : : : 7D :
+RESERVED_INPUT_WITH_WEAK_PULLUP : B16 : : : : 7C :
+RESERVED_INPUT_WITH_WEAK_PULLUP : B17 : : : : 7C :
+RESERVED_INPUT_WITH_WEAK_PULLUP : B18 : : : : 7B :
+GND : B19 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : B20 : : : : 7B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : B21 : : : : 7B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : B22 : : : : 7A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : B23 : : : : 7A :
+GND : B24 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : B25 : : : : 7A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : B26 : : : : 7A :
+HPS_TDI : B27 : : : : 7A :
+HPS_TDO : B28 : : : : 7A :
+GND : B29 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : B30 : : : : 6A :
+GND : C1 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : C2 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : C3 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : C4 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : C5 : : : : 8A :
+GND : C6 : gnd : : : :
+VGA_G[3] : C7 : output : 2.5 V : : 8A : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : C8 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : C9 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : C10 : : : : 8A :
+VCCIO8A : C11 : power : : 2.5V : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : C12 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : C13 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : C14 : : : : 7D :
+RESERVED_INPUT_WITH_WEAK_PULLUP : C15 : : : : 7D :
+GND : C16 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : C17 : : : : 7C :
+RESERVED_INPUT_WITH_WEAK_PULLUP : C18 : : : : 7C :
+RESERVED_INPUT_WITH_WEAK_PULLUP : C19 : : : : 7B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : C20 : : : : 7B :
+GND : C21 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : C22 : : : : 7A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : C23 : : : : 7A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : C24 : : : : 7A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : C25 : : : : 7A :
+GND : C26 : gnd : : : :
+HPS_nRST : C27 : : : : 7A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : C28 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : C29 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : C30 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : D1 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : D2 : : : : 8A :
+GND : D3 : gnd : : : :
+VGA_B[1] : D4 : output : 2.5 V : : 8A : N
+VGA_B[3] : D5 : output : 2.5 V : : 8A : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : D6 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : D7 : : : : 8A :
+VCCIO8A : D8 : power : : 2.5V : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : D9 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : D10 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : D11 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : D12 : : : : 8A :
+GND : D13 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : D14 : : : : 7D :
+RESERVED_INPUT_WITH_WEAK_PULLUP : D15 : : : : 7D :
+RESERVED_INPUT_WITH_WEAK_PULLUP : D16 : : : : 7D :
+RESERVED_INPUT_WITH_WEAK_PULLUP : D17 : : : : 7C :
+VCCIO7C_HPS : D18 : power : : 2.5V : 7C :
+RESERVED_INPUT_WITH_WEAK_PULLUP : D19 : : : : 7B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : D20 : : : : 7B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : D21 : : : : 7B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : D22 : : : : 7A :
+GND : D23 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : D24 : : : : 7A :
+HPS_CLK1 : D25 : : : : 7A :
+GND : D26 : : : : 7A :
+HPS_RZQ_0 : D27 : : : : 6A :
+VCCIO6A_HPS : D28 : power : : 2.5V : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : D29 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : D30 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : E1 : : : : 8A :
+VGA_B[7] : E2 : output : 2.5 V : : 8A : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : E3 : : : : 8A :
+VGA_B[6] : E4 : output : 2.5 V : : 8A : N
+VCCIO8A : E5 : power : : 2.5V : 8A :
+HEX0[1] : E6 : output : 2.5 V : : 8A : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : E7 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : E8 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : E9 : : : : 8A :
+GND : E10 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : E11 : : : : 8A :
+HEX2[2] : E12 : output : 2.5 V : : 8A : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : E13 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : E14 : : : : 7D :
+VCCIO7D_HPS : E15 : power : : 2.5V : 7D :
+RESERVED_INPUT_WITH_WEAK_PULLUP : E16 : : : : 7D :
+RESERVED_INPUT_WITH_WEAK_PULLUP : E17 : : : : 7C :
+RESERVED_INPUT_WITH_WEAK_PULLUP : E18 : : : : 7C :
+RESERVED_INPUT_WITH_WEAK_PULLUP : E19 : : : : 7B :
+VCCIO7B_HPS : E20 : power : : 2.5V : 7B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : E21 : : : : 7B :
+VREFB7A7B7C7DN0_HPS : E22 : power : : : 7A, 7B, 7C, 7D :
+RESERVED_INPUT_WITH_WEAK_PULLUP : E23 : : : : 7A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : E24 : : : : 7A :
+GND : E25 : gnd : : : :
+DNU : E26 : : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : E27 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : E28 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : E29 : : : : 6A :
+GND : E30 : gnd : : : :
+DNU : F1 : : : : :
+GND : F2 : gnd : : : :
+CONF_DONE : F3 : : : : 9A :
+nSTATUS : F4 : : : : 9A :
+GND : F5 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : F6 : : : : 8A :
+GND : F7 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : F8 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : F9 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : F10 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : F11 : : : : 8A :
+VCCIO8A : F12 : power : : 2.5V : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : F13 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : F14 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : F15 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : F16 : : : : 7D :
+GND : F17 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : F18 : : : : 7C :
+RESERVED_INPUT_WITH_WEAK_PULLUP : F19 : : : : 7B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : F20 : : : : 7B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : F21 : : : : 7B :
+VCCIO7A_HPS : F22 : power : : 2.5V : 7A :
+HPS_nPOR : F23 : : : : 7A :
+HPS_PORSEL : F24 : : : : 7A :
+HPS_CLK2 : F25 : : : : 7A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : F26 : : : : 6A :
+GND : F27 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : F28 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : F29 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : F30 : : : : 6A :
+GND : G1 : : : : :
+DNU : G2 : : : : :
+GND : G3 : gnd : : : :
+GND : G4 : gnd : : : :
+nCE : G5 : : : : 9A :
+MSEL2 : G6 : : : : 9A :
+LEDR[1] : G7 : output : 2.5 V : : 8A : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : G8 : : : : 8A :
+VCCIO8A : G9 : power : : 2.5V : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : G10 : : : : 8A :
+HEX1[3] : G11 : output : 2.5 V : : 8A : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : G12 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : G13 : : : : 8A :
+VCCIO8A : G14 : power : : 2.5V : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : G15 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : G16 : : : : 7D :
+RESERVED_INPUT_WITH_WEAK_PULLUP : G17 : : : : 7C :
+RESERVED_INPUT_WITH_WEAK_PULLUP : G18 : : : : 7C :
+VCCIO7B_HPS : G19 : power : : 2.5V : 7B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : G20 : : : : 7B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : G21 : : : : 7A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : G22 : : : : 7A :
+VCCRSTCLK_HPS : G23 : : : : 7A :
+GND : G24 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : G25 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : G26 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : G27 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : G28 : : : : 6A :
+VCCIO6A_HPS : G29 : power : : 2.5V : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : G30 : : : : 6A :
+GND : H1 : gnd : : : :
+GND : H2 : gnd : : : :
+DNU : H3 : : : : :
+DNU : H4 : : : : :
+GND : H5 : gnd : : : :
+VCCIO8A : H6 : power : : 2.5V : 8A :
+HEX2[3] : H7 : output : 2.5 V : : 8A : N
+LEDR[0] : H8 : output : 2.5 V : : 8A : N
+VCCBAT : H9 : power : : 1.2V : :
+VCC_AUX : H10 : power : : 2.5V : :
+GND : H11 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : H12 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : H13 : : : : 8A :
+VGA_G[6] : H14 : output : 2.5 V : : 8A : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : H15 : : : : 8A :
+VCCIO7D_HPS : H16 : power : : 2.5V : 7D :
+RESERVED_INPUT_WITH_WEAK_PULLUP : H17 : : : : 7C :
+RESERVED_INPUT_WITH_WEAK_PULLUP : H18 : : : : 7B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : H19 : : : : 7B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : H20 : : : : 7A :
+VCCIO7A_HPS : H21 : power : : 2.5V : 7A :
+HPS_TCK : H22 : : : : 7A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : H23 : : : : 7A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : H24 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : H25 : : : : 6A :
+VCCIO6A_HPS : H26 : power : : 2.5V : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : H27 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : H28 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : H29 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : H30 : : : : 6A :
+GND : J1 : gnd : : : :
+GND : J2 : gnd : : : :
+GND : J3 : gnd : : : :
+GND : J4 : gnd : : : :
+nCONFIG : J5 : : : : 9A :
+GND : J6 : : : : 9A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : J7 : : : : 8A :
+GND : J8 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : J9 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : J10 : : : : 8A :
+VCCPGM : J11 : power : : 1.8V/2.5V/3.0V/3.3V : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : J12 : : : : 8A :
+VCCIO8A : J13 : power : : 2.5V : 8A :
+HEX0[5] : J14 : output : 2.5 V : : 8A : N
+DNU : J15 : : : : :
+VCC_AUX : J16 : power : : 2.5V : :
+VCCPD7C_HPS : J17 : power : : 2.5V : 7C :
+GND : J18 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : J19 : : : : 7B :
+VCCRSTCLK_HPS : J20 : power : : 1.8V/2.5V/3.0V/3.3V : :
+VCC_AUX_SHARED : J21 : power : : 2.5V : :
+GND : J22 : : : : 7A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : J23 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : J24 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : J25 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : J26 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : J27 : : : : 6A :
+GND : J28 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : J29 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : J30 : : : : 6A :
+GND : K1 : gnd : : : :
+GND : K2 : gnd : : : :
+DNU : K3 : : : : :
+DNU : K4 : : : : :
+GND : K5 : gnd : : : :
+MSEL1 : K6 : : : : 9A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : K7 : : : : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : K8 : : : : 8A :
+VCCA_FPLL : K9 : power : : 2.5V : :
+GND : K10 : gnd : : : :
+VCCPD8A : K11 : power : : 2.5V : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : K12 : : : : 8A :
+VCCPD8A : K13 : power : : 2.5V : 8A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : K14 : : : : 8A :
+GND : K15 : gnd : : : :
+VCCPD7D_HPS : K16 : power : : 2.5V : 7D :
+RESERVED_INPUT_WITH_WEAK_PULLUP : K17 : : : : 7B :
+VCCPD7B_HPS : K18 : power : : 2.5V : 7B :
+VCCPD7A_HPS : K19 : power : : 2.5V : 7A :
+GND : K20 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : K21 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : K22 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : K23 : : : : 6A :
+VCCIO6A_HPS : K24 : power : : 2.5V : 6A :
+GND : K25 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : K26 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : K27 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : K28 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : K29 : : : : 6A :
+VCCIO6A_HPS : K30 : power : : 2.5V : 6A :
+GND : L1 : gnd : : : :
+GND : L2 : gnd : : : :
+GND : L3 : gnd : : : :
+GND : L4 : gnd : : : :
+VCC : L5 : power : : 1.1V : :
+GND : L6 : gnd : : : :
+MSEL3 : L7 : : : : 9A :
+MSEL0 : L8 : : : : 9A :
+MSEL4 : L9 : : : : 9A :
+VCCPD8A : L10 : power : : 2.5V : 8A :
+GND : L11 : gnd : : : :
+VCCPD8A : L12 : power : : 2.5V : 8A :
+GND : L13 : gnd : : : :
+VCCPD8A : L14 : power : : 2.5V : 8A :
+GND : L15 : gnd : : : :
+VCC_HPS : L16 : power : : 1.1V : :
+GND : L17 : gnd : : : :
+VCC_HPS : L18 : power : : 1.1V : :
+GND : L19 : gnd : : : :
+VCC_HPS : L20 : power : : 1.1V : :
+VCCPLL_HPS : L21 : power : : 2.5V : :
+GND : L22 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : L23 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : L24 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : L25 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : L26 : : : : 6A :
+VCCIO6A_HPS : L27 : power : : 2.5V : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : L28 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : L29 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : L30 : : : : 6A :
+GND : M1 : gnd : : : :
+GND : M2 : gnd : : : :
+DNU : M3 : : : : :
+DNU : M4 : : : : :
+GND : M5 : gnd : : : :
+VCC : M6 : power : : 1.1V : :
+GND : M7 : gnd : : : :
+GND : M8 : gnd : : : :
+VCC : M9 : power : : 1.1V : :
+GND : M10 : gnd : : : :
+VCC : M11 : power : : 1.1V : :
+GND : M12 : gnd : : : :
+VCC : M13 : power : : 1.1V : :
+GND : M14 : gnd : : : :
+VCC_HPS : M15 : power : : 1.1V : :
+GND : M16 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : M17 : : : : 7D :
+GND : M18 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : M19 : : : : 6A :
+GND : M20 : gnd : : : :
+VCCPD6A6B_HPS : M21 : power : : 2.5V : 6A, 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : M22 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : M23 : : : : 6A :
+VCCIO6A_HPS : M24 : power : : 2.5V : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : M25 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : M26 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : M27 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : M28 : : : : 6A :
+GND : M29 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : M30 : : : : 6A :
+GND : N1 : gnd : : : :
+GND : N2 : gnd : : : :
+GND : N3 : gnd : : : :
+GND : N4 : gnd : : : :
+VCC : N5 : power : : 1.1V : :
+GND : N6 : gnd : : : :
+VCCA_FPLL : N7 : power : : 2.5V : :
+GND : N8 : gnd : : : :
+GND : N9 : gnd : : : :
+VCC : N10 : power : : 1.1V : :
+GND : N11 : gnd : : : :
+VCC : N12 : power : : 1.1V : :
+GND : N13 : gnd : : : :
+VCC : N14 : power : : 1.1V : :
+GND : N15 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : N16 : : : : 7D :
+GND : N17 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : N18 : : : : 6A :
+GND : N19 : gnd : : : :
+VCC_HPS : N20 : power : : 1.1V : :
+VCCIO6A_HPS : N21 : power : : 2.5V : 6A :
+VCCPD6A6B_HPS : N22 : power : : 2.5V : 6A, 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : N23 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : N24 : : : : 6A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : N25 : : : : 6A :
+GND : N26 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : N27 : : : : 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : N28 : : : : 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : N29 : : : : 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : N30 : : : : 6B :
+GND : P1 : gnd : : : :
+GND : P2 : gnd : : : :
+DNU : P3 : : : : :
+DNU : P4 : : : : :
+GND : P5 : gnd : : : :
+VCCA_FPLL : P6 : power : : 2.5V : :
+GND : P7 : gnd : : : :
+GND : P8 : gnd : : : :
+GND : P9 : gnd : : : :
+GND : P10 : gnd : : : :
+VCC : P11 : power : : 1.1V : :
+GND : P12 : gnd : : : :
+VCC : P13 : power : : 1.1V : :
+GND : P14 : gnd : : : :
+VCC_HPS : P15 : power : : 1.1V : :
+GND : P16 : gnd : : : :
+VCC_HPS : P17 : power : : 1.1V : :
+GND : P18 : gnd : : : :
+VCC_HPS : P19 : power : : 1.1V : :
+GND : P20 : gnd : : : :
+VCCPD6A6B_HPS : P21 : power : : 2.5V : 6A, 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : P22 : : : : 6B :
+VCCIO6B_HPS : P23 : power : : 2.5V : 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : P24 : : : : 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : P25 : : : : 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : P26 : : : : 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : P27 : : : : 6B :
+VCCIO6B_HPS : P28 : power : : 2.5V : 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : P29 : : : : 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : P30 : : : : 6B :
+GND : R1 : gnd : : : :
+GND : R2 : gnd : : : :
+GND : R3 : gnd : : : :
+GND : R4 : gnd : : : :
+VCC : R5 : power : : 1.1V : :
+GND : R6 : gnd : : : :
+VCCA_FPLL : R7 : power : : 2.5V : :
+GND : R8 : gnd : : : :
+GND : R9 : gnd : : : :
+VCC : R10 : power : : 1.1V : :
+GND : R11 : gnd : : : :
+VCC : R12 : power : : 1.1V : :
+GND : R13 : gnd : : : :
+VCC : R14 : power : : 1.1V : :
+GND : R15 : gnd : : : :
+VCC_HPS : R16 : power : : 1.1V : :
+GND : R17 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : R18 : : : : 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : R19 : : : : 6B :
+VCCPD6A6B_HPS : R20 : power : : 2.5V : 6A, 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : R21 : : : : 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : R22 : : : : 6B :
+VCCPD6A6B_HPS : R23 : power : : 2.5V : 6A, 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : R24 : : : : 6B :
+VCCIO6B_HPS : R25 : power : : 2.5V : 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : R26 : : : : 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : R27 : : : : 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : R28 : : : : 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : R29 : : : : 6B :
+GND : R30 : gnd : : : :
+GND : T1 : gnd : : : :
+GND : T2 : gnd : : : :
+DNU : T3 : : : : :
+DNU : T4 : : : : :
+GND : T5 : gnd : : : :
+VCC : T6 : power : : 1.1V : :
+GND : T7 : gnd : : : :
+GND : T8 : gnd : : : :
+GND : T9 : gnd : : : :
+GND : T10 : gnd : : : :
+VCC : T11 : power : : 1.1V : :
+GND : T12 : gnd : : : :
+VCC : T13 : power : : 1.1V : :
+GND : T14 : gnd : : : :
+GND : T15 : gnd : : : :
+GND : T16 : gnd : : : :
+VCC_HPS : T17 : power : : 1.1V : :
+GND : T18 : gnd : : : :
+VCC_HPS : T19 : power : : 1.1V : :
+GND : T20 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : T21 : : : : 6B :
+VCCIO6B_HPS : T22 : power : : 2.5V : 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : T23 : : : : 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : T24 : : : : 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : T25 : : : : 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : T26 : : : : 6B :
+GND : T27 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : T28 : : : : 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : T29 : : : : 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : T30 : : : : 6B :
+GND : U1 : gnd : : : :
+GND : U2 : gnd : : : :
+GND : U3 : gnd : : : :
+GND : U4 : gnd : : : :
+VCC : U5 : power : : 1.1V : :
+GND : U6 : gnd : : : :
+DCLK : U7 : : : : 3A :
+TDI : U8 : input : : : 3A :
+GND : U9 : gnd : : : :
+VCC : U10 : power : : 1.1V : :
+GND : U11 : gnd : : : :
+VCC : U12 : power : : 1.1V : :
+GND : U13 : gnd : : : :
+VCC : U14 : power : : 1.1V : :
+GND : U15 : gnd : : : :
+VCC_HPS : U16 : power : : 1.1V : :
+GND : U17 : gnd : : : :
+VCC_HPS : U18 : power : : 1.1V : :
+VCCIO6B_HPS : U19 : power : : 2.5V : 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : U20 : : : : 6B :
+VCC : U21 : power : : 1.1V : :
+GND : U22 : gnd : : : :
+VCCPD5B : U23 : power : : 2.5V : 5B :
+GND : U24 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : U25 : : : : 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : U26 : : : : 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : U27 : : : : 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : U28 : : : : 6B :
+GND : U29 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : U30 : : : : 6B :
+GND : V1 : gnd : : : :
+GND : V2 : gnd : : : :
+DNU : V3 : : : : :
+DNU : V4 : : : : :
+GND : V5 : gnd : : : :
+VCCA_FPLL : V6 : power : : 2.5V : :
+GND : V7 : gnd : : : :
+VCCA_FPLL : V8 : power : : 2.5V : :
+TMS : V9 : input : : : 3A :
+GND : V10 : gnd : : : :
+VCC : V11 : power : : 1.1V : :
+GND : V12 : gnd : : : :
+VCC : V13 : power : : 1.1V : :
+GND : V14 : gnd : : : :
+VCC : V15 : power : : 1.1V : :
+HEX1[2] : V16 : output : 2.5 V : : 4A : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : V17 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : V18 : : : : 4A :
+GND : V19 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : V20 : : : : 6B :
+GND : V21 : gnd : : : :
+VCCPD5A : V22 : power : : 2.5V : 5A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : V23 : : : : 5A :
+VCCPD5A : V24 : power : : 2.5V : 5A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : V25 : : : : 5B :
+VCCIO6B_HPS : V26 : power : : 2.5V : 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : V27 : : : : 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : V28 : : : : 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : V29 : : : : 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : V30 : : : : 6B :
+GND : W1 : gnd : : : :
+GND : W2 : gnd : : : :
+GND : W3 : gnd : : : :
+GND : W4 : gnd : : : :
+VCC : W5 : power : : 1.1V : :
+GND : W6 : gnd : : : :
+GND : W7 : gnd : : : :
+GND : W8 : gnd : : : :
+GND : W9 : gnd : : : :
+VCC : W10 : power : : 1.1V : :
+GND : W11 : gnd : : : :
+VCC : W12 : power : : 1.1V : :
+GND : W13 : gnd : : : :
+VCC : W14 : power : : 1.1V : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : W15 : : : : 3B :
+HEX0[2] : W16 : output : 2.5 V : : 4A : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : W17 : : : : 4A :
+GND : W18 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : W19 : : : : 4A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : W20 : : : : 5A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : W21 : : : : 5A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : W22 : : : : 5A :
+VCCIO5A : W23 : power : : 2.5V : 5A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : W24 : : : : 5A :
+RESERVED_INPUT_WITH_WEAK_PULLUP : W25 : : : : 5B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : W26 : : : : 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : W27 : : : : 6B :
+GND : W28 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : W29 : : : : 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : W30 : : : : 6B :
+GND : Y1 : gnd : : : :
+GND : Y2 : gnd : : : :
+DNU : Y3 : : : : :
+DNU : Y4 : : : : :
+GND : Y5 : gnd : : : :
+VCC : Y6 : power : : 1.1V : :
+GND : Y7 : gnd : : : :
+GND : Y8 : gnd : : : :
+VCC : Y9 : power : : 1.1V : :
+GND : Y10 : gnd : : : :
+VCC : Y11 : power : : 1.1V : :
+GND : Y12 : gnd : : : :
+VCC : Y13 : power : : 1.1V : :
+GND : Y14 : gnd : : : :
+GND : Y15 : gnd : : : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : Y16 : : : : 3B :
+HEX2[5] : Y17 : output : 2.5 V : : 4A : N
+VGA_G[0] : Y18 : output : 2.5 V : : 4A : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : Y19 : : : : 4A :
+GND : Y20 : gnd : : : :
+LEDR[8] : Y21 : output : 2.5 V : : 5A : N
+VCCA_FPLL : Y22 : power : : 2.5V : :
+RESERVED_INPUT_WITH_WEAK_PULLUP : Y23 : : : : 5A :
+VGA_G[4] : Y24 : output : 2.5 V : : 5A : N
+GND : Y25 : gnd : : : :
+KEY[3] : Y26 : input : 2.5 V : : 5B : N
+KEY[2] : Y27 : input : 2.5 V : : 5B : N
+RESERVED_INPUT_WITH_WEAK_PULLUP : Y28 : : : : 6B :
+RESERVED_INPUT_WITH_WEAK_PULLUP : Y29 : : : : 6B :
+GND : Y30 : gnd : : : :
diff --git a/output_files/de1_soc_wrapper.sld b/output_files/de1_soc_wrapper.sld
new file mode 100644
index 0000000000000000000000000000000000000000..f7d3ed7cc6abd95c50005b31855c0eec845cbeed
--- /dev/null
+++ b/output_files/de1_soc_wrapper.sld
@@ -0,0 +1 @@
+<sld_project_info/>
diff --git a/output_files/de1_soc_wrapper.sof b/output_files/de1_soc_wrapper.sof
new file mode 100644
index 0000000000000000000000000000000000000000..e39618132809e86a144907ea8f473e6c8f1094a0
Binary files /dev/null and b/output_files/de1_soc_wrapper.sof differ
diff --git a/output_files/de1_soc_wrapper.sta.rpt b/output_files/de1_soc_wrapper.sta.rpt
new file mode 100644
index 0000000000000000000000000000000000000000..bb1c2dbcd90d83f6b5d09f00397413f99b183cb1
--- /dev/null
+++ b/output_files/de1_soc_wrapper.sta.rpt
@@ -0,0 +1,1006 @@
+TimeQuest Timing Analyzer report for de1_soc_wrapper
+Thu Sep 24 11:21:30 2020
+Quartus Prime Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
+
+
+---------------------
+; Table of Contents ;
+---------------------
+ 1. Legal Notice
+ 2. TimeQuest Timing Analyzer Summary
+ 3. Parallel Compilation
+ 4. Clocks
+ 5. Slow 1100mV 85C Model Fmax Summary
+ 6. Timing Closure Recommendations
+ 7. Slow 1100mV 85C Model Setup Summary
+ 8. Slow 1100mV 85C Model Hold Summary
+ 9. Slow 1100mV 85C Model Recovery Summary
+ 10. Slow 1100mV 85C Model Removal Summary
+ 11. Slow 1100mV 85C Model Minimum Pulse Width Summary
+ 12. Slow 1100mV 85C Model Metastability Summary
+ 13. Slow 1100mV 0C Model Fmax Summary
+ 14. Slow 1100mV 0C Model Setup Summary
+ 15. Slow 1100mV 0C Model Hold Summary
+ 16. Slow 1100mV 0C Model Recovery Summary
+ 17. Slow 1100mV 0C Model Removal Summary
+ 18. Slow 1100mV 0C Model Minimum Pulse Width Summary
+ 19. Slow 1100mV 0C Model Metastability Summary
+ 20. Fast 1100mV 85C Model Setup Summary
+ 21. Fast 1100mV 85C Model Hold Summary
+ 22. Fast 1100mV 85C Model Recovery Summary
+ 23. Fast 1100mV 85C Model Removal Summary
+ 24. Fast 1100mV 85C Model Minimum Pulse Width Summary
+ 25. Fast 1100mV 85C Model Metastability Summary
+ 26. Fast 1100mV 0C Model Setup Summary
+ 27. Fast 1100mV 0C Model Hold Summary
+ 28. Fast 1100mV 0C Model Recovery Summary
+ 29. Fast 1100mV 0C Model Removal Summary
+ 30. Fast 1100mV 0C Model Minimum Pulse Width Summary
+ 31. Fast 1100mV 0C Model Metastability Summary
+ 32. Multicorner Timing Analysis Summary
+ 33. Board Trace Model Assignments
+ 34. Input Transition Times
+ 35. Signal Integrity Metrics (Slow 1100mv 0c Model)
+ 36. Signal Integrity Metrics (Slow 1100mv 85c Model)
+ 37. Signal Integrity Metrics (Fast 1100mv 0c Model)
+ 38. Signal Integrity Metrics (Fast 1100mv 85c Model)
+ 39. Setup Transfers
+ 40. Hold Transfers
+ 41. Report TCCS
+ 42. Report RSKM
+ 43. Unconstrained Paths Summary
+ 44. Clock Status Summary
+ 45. Unconstrained Input Ports
+ 46. Unconstrained Output Ports
+ 47. Unconstrained Input Ports
+ 48. Unconstrained Output Ports
+ 49. TimeQuest Timing Analyzer Messages
+
+
+
+----------------
+; Legal Notice ;
+----------------
+Copyright (C) 2017 Intel Corporation. All rights reserved.
+Your use of Intel Corporation's design tools, logic functions
+and other software and tools, and its AMPP partner logic
+functions, and any output files from any of the foregoing
+(including device programming or simulation files), and any
+associated documentation or information are expressly subject
+to the terms and conditions of the Intel Program License
+Subscription Agreement, the Intel Quartus Prime License Agreement,
+the Intel MegaCore Function License Agreement, or other
+applicable license agreement, including, without limitation,
+that your use is for the sole purpose of programming logic
+devices manufactured by Intel and sold by Intel or its
+authorized distributors. Please refer to the applicable
+agreement for further details.
+
+
+
++---------------------------------------------------------------------------------+
+; TimeQuest Timing Analyzer Summary ;
++-----------------------+---------------------------------------------------------+
+; Quartus Prime Version ; Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition ;
+; Timing Analyzer ; TimeQuest ;
+; Revision Name ; de1_soc_wrapper ;
+; Device Family ; Cyclone V ;
+; Device Name ; 5CSEMA5F31C6 ;
+; Timing Models ; Final ;
+; Delay Model ; Combined ;
+; Rise/Fall Delays ; Enabled ;
++-----------------------+---------------------------------------------------------+
+
+
++------------------------------------------+
+; Parallel Compilation ;
++----------------------------+-------------+
+; Processors ; Number ;
++----------------------------+-------------+
+; Number detected on machine ; 24 ;
+; Maximum allowed ; 16 ;
+; ; ;
+; Average used ; 3.26 ;
+; Maximum used ; 16 ;
+; ; ;
+; Usage by Processor ; % Time Used ;
+; Processor 1 ; 100.0% ;
+; Processor 2 ; 25.0% ;
+; Processor 3 ; 24.8% ;
+; Processor 4 ; 24.7% ;
+; Processor 5 ; 12.6% ;
+; Processor 6 ; 12.6% ;
+; Processor 7 ; 12.6% ;
+; Processor 8 ; 12.6% ;
+; Processor 9 ; 12.6% ;
+; Processor 10 ; 12.6% ;
+; Processor 11 ; 12.6% ;
+; Processor 12 ; 12.6% ;
+; Processor 13 ; 12.6% ;
+; Processor 14 ; 12.6% ;
+; Processor 15 ; 12.6% ;
+; Processor 16 ; 12.6% ;
++----------------------------+-------------+
+
+
++--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+; Clocks ;
++------------+------+--------+------------+-------+-------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+--------+--------------+
+; Clock Name ; Type ; Period ; Frequency ; Rise ; Fall ; Duty Cycle ; Divide by ; Multiply by ; Phase ; Offset ; Edge List ; Edge Shift ; Inverted ; Master ; Source ; Targets ;
++------------+------+--------+------------+-------+-------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+--------+--------------+
+; CLOCK_50 ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { CLOCK_50 } ;
++------------+------+--------+------------+-------+-------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+--------+--------------+
+
+
++-------------------------------------------------+
+; Slow 1100mV 85C Model Fmax Summary ;
++-----------+-----------------+------------+------+
+; Fmax ; Restricted Fmax ; Clock Name ; Note ;
++-----------+-----------------+------------+------+
+; 76.24 MHz ; 76.24 MHz ; CLOCK_50 ; ;
++-----------+-----------------+------------+------+
+This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods. FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock. Paths of different clocks, including generated clocks, are ignored. For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.
+
+
+----------------------------------
+; Timing Closure Recommendations ;
+----------------------------------
+HTML report is unavailable in plain text report export.
+
+
++-------------------------------------+
+; Slow 1100mV 85C Model Setup Summary ;
++----------+---------+----------------+
+; Clock ; Slack ; End Point TNS ;
++----------+---------+----------------+
+; CLOCK_50 ; -12.117 ; -23738.417 ;
++----------+---------+----------------+
+
+
++------------------------------------+
+; Slow 1100mV 85C Model Hold Summary ;
++----------+-------+-----------------+
+; Clock ; Slack ; End Point TNS ;
++----------+-------+-----------------+
+; CLOCK_50 ; 0.360 ; 0.000 ;
++----------+-------+-----------------+
+
+
+------------------------------------------
+; Slow 1100mV 85C Model Recovery Summary ;
+------------------------------------------
+No paths to report.
+
+
+-----------------------------------------
+; Slow 1100mV 85C Model Removal Summary ;
+-----------------------------------------
+No paths to report.
+
+
++---------------------------------------------------+
+; Slow 1100mV 85C Model Minimum Pulse Width Summary ;
++----------+--------+-------------------------------+
+; Clock ; Slack ; End Point TNS ;
++----------+--------+-------------------------------+
+; CLOCK_50 ; -2.636 ; -9178.515 ;
++----------+--------+-------------------------------+
+
+
+-----------------------------------------------
+; Slow 1100mV 85C Model Metastability Summary ;
+-----------------------------------------------
+No synchronizer chains to report.
+
+
++-------------------------------------------------+
+; Slow 1100mV 0C Model Fmax Summary ;
++-----------+-----------------+------------+------+
+; Fmax ; Restricted Fmax ; Clock Name ; Note ;
++-----------+-----------------+------------+------+
+; 77.39 MHz ; 77.39 MHz ; CLOCK_50 ; ;
++-----------+-----------------+------------+------+
+This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods. FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock. Paths of different clocks, including generated clocks, are ignored. For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.
+
+
++------------------------------------+
+; Slow 1100mV 0C Model Setup Summary ;
++----------+---------+---------------+
+; Clock ; Slack ; End Point TNS ;
++----------+---------+---------------+
+; CLOCK_50 ; -11.922 ; -23014.909 ;
++----------+---------+---------------+
+
+
++-----------------------------------+
+; Slow 1100mV 0C Model Hold Summary ;
++----------+-------+----------------+
+; Clock ; Slack ; End Point TNS ;
++----------+-------+----------------+
+; CLOCK_50 ; 0.320 ; 0.000 ;
++----------+-------+----------------+
+
+
+-----------------------------------------
+; Slow 1100mV 0C Model Recovery Summary ;
+-----------------------------------------
+No paths to report.
+
+
+----------------------------------------
+; Slow 1100mV 0C Model Removal Summary ;
+----------------------------------------
+No paths to report.
+
+
++--------------------------------------------------+
+; Slow 1100mV 0C Model Minimum Pulse Width Summary ;
++----------+--------+------------------------------+
+; Clock ; Slack ; End Point TNS ;
++----------+--------+------------------------------+
+; CLOCK_50 ; -2.636 ; -9227.462 ;
++----------+--------+------------------------------+
+
+
+----------------------------------------------
+; Slow 1100mV 0C Model Metastability Summary ;
+----------------------------------------------
+No synchronizer chains to report.
+
+
++-------------------------------------+
+; Fast 1100mV 85C Model Setup Summary ;
++----------+--------+-----------------+
+; Clock ; Slack ; End Point TNS ;
++----------+--------+-----------------+
+; CLOCK_50 ; -7.015 ; -13385.378 ;
++----------+--------+-----------------+
+
+
++------------------------------------+
+; Fast 1100mV 85C Model Hold Summary ;
++----------+-------+-----------------+
+; Clock ; Slack ; End Point TNS ;
++----------+-------+-----------------+
+; CLOCK_50 ; 0.180 ; 0.000 ;
++----------+-------+-----------------+
+
+
+------------------------------------------
+; Fast 1100mV 85C Model Recovery Summary ;
+------------------------------------------
+No paths to report.
+
+
+-----------------------------------------
+; Fast 1100mV 85C Model Removal Summary ;
+-----------------------------------------
+No paths to report.
+
+
++---------------------------------------------------+
+; Fast 1100mV 85C Model Minimum Pulse Width Summary ;
++----------+--------+-------------------------------+
+; Clock ; Slack ; End Point TNS ;
++----------+--------+-------------------------------+
+; CLOCK_50 ; -2.636 ; -8567.649 ;
++----------+--------+-------------------------------+
+
+
+-----------------------------------------------
+; Fast 1100mV 85C Model Metastability Summary ;
+-----------------------------------------------
+No synchronizer chains to report.
+
+
++------------------------------------+
+; Fast 1100mV 0C Model Setup Summary ;
++----------+--------+----------------+
+; Clock ; Slack ; End Point TNS ;
++----------+--------+----------------+
+; CLOCK_50 ; -6.180 ; -11655.282 ;
++----------+--------+----------------+
+
+
++-----------------------------------+
+; Fast 1100mV 0C Model Hold Summary ;
++----------+-------+----------------+
+; Clock ; Slack ; End Point TNS ;
++----------+-------+----------------+
+; CLOCK_50 ; 0.172 ; 0.000 ;
++----------+-------+----------------+
+
+
+-----------------------------------------
+; Fast 1100mV 0C Model Recovery Summary ;
+-----------------------------------------
+No paths to report.
+
+
+----------------------------------------
+; Fast 1100mV 0C Model Removal Summary ;
+----------------------------------------
+No paths to report.
+
+
++--------------------------------------------------+
+; Fast 1100mV 0C Model Minimum Pulse Width Summary ;
++----------+--------+------------------------------+
+; Clock ; Slack ; End Point TNS ;
++----------+--------+------------------------------+
+; CLOCK_50 ; -2.636 ; -8570.738 ;
++----------+--------+------------------------------+
+
+
+----------------------------------------------
+; Fast 1100mV 0C Model Metastability Summary ;
+----------------------------------------------
+No synchronizer chains to report.
+
+
++----------------------------------------------------------------------------------+
+; Multicorner Timing Analysis Summary ;
++------------------+------------+-------+----------+---------+---------------------+
+; Clock ; Setup ; Hold ; Recovery ; Removal ; Minimum Pulse Width ;
++------------------+------------+-------+----------+---------+---------------------+
+; Worst-case Slack ; -12.117 ; 0.172 ; N/A ; N/A ; -2.636 ;
+; CLOCK_50 ; -12.117 ; 0.172 ; N/A ; N/A ; -2.636 ;
+; Design-wide TNS ; -23738.417 ; 0.0 ; 0.0 ; 0.0 ; -9227.462 ;
+; CLOCK_50 ; -23738.417 ; 0.000 ; N/A ; N/A ; -9227.462 ;
++------------------+------------+-------+----------+---------+---------------------+
+
+
++----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+; Board Trace Model Assignments ;
++-------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+
+; Pin ; I/O Standard ; Near Tline Length ; Near Tline L per Length ; Near Tline C per Length ; Near Series R ; Near Differential R ; Near Pull-up R ; Near Pull-down R ; Near C ; Far Tline Length ; Far Tline L per Length ; Far Tline C per Length ; Far Series R ; Far Pull-up R ; Far Pull-down R ; Far C ; Termination Voltage ; Far Differential R ; EBD File Name ; EBD Signal Name ; EBD Far-end ;
++-------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+
+; LEDR[0] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; LEDR[1] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; LEDR[2] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; LEDR[3] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; LEDR[4] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; LEDR[5] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; LEDR[6] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; LEDR[7] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; LEDR[8] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; LEDR[9] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; HEX0[0] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; HEX0[1] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; HEX0[2] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; HEX0[3] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; HEX0[4] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; HEX0[5] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; HEX0[6] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; HEX1[0] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; HEX1[1] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; HEX1[2] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; HEX1[3] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; HEX1[4] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; HEX1[5] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; HEX1[6] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; HEX2[0] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; HEX2[1] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; HEX2[2] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; HEX2[3] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; HEX2[4] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; HEX2[5] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; HEX2[6] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; HEX3[0] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; HEX3[1] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; HEX3[2] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; HEX3[3] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; HEX3[4] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; HEX3[5] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; HEX3[6] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; VGA_R[0] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; VGA_R[1] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; VGA_R[2] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; VGA_R[3] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; VGA_R[4] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; VGA_R[5] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; VGA_R[6] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; VGA_R[7] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; VGA_G[0] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; VGA_G[1] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; VGA_G[2] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; VGA_G[3] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; VGA_G[4] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; VGA_G[5] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; VGA_G[6] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; VGA_G[7] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; VGA_B[0] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; VGA_B[1] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; VGA_B[2] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; VGA_B[3] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; VGA_B[4] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; VGA_B[5] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; VGA_B[6] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; VGA_B[7] ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; VGA_HS ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; VGA_VS ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; VGA_CLK ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
+; VGA_BLANK_N ; 2.5 V ; 0 in ; 0 H/in ; 0 F/in ; short ; - ; open ; open ; open ; 0 in ; 0 H/in ; 0 F/in ; short ; open ; open ; open ; 0 V ; - ; n/a ; n/a ; n/a ;
++-------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+
+
+
++-------------------------------------------------------------+
+; Input Transition Times ;
++----------+--------------+-----------------+-----------------+
+; Pin ; I/O Standard ; 10-90 Rise Time ; 90-10 Fall Time ;
++----------+--------------+-----------------+-----------------+
+; KEY[3] ; 2.5 V ; 2000 ps ; 2000 ps ;
+; CLOCK_50 ; 2.5 V ; 2000 ps ; 2000 ps ;
+; KEY[2] ; 2.5 V ; 2000 ps ; 2000 ps ;
+; SW[7] ; 2.5 V ; 2000 ps ; 2000 ps ;
+; KEY[1] ; 2.5 V ; 2000 ps ; 2000 ps ;
+; KEY[0] ; 2.5 V ; 2000 ps ; 2000 ps ;
+; SW[2] ; 2.5 V ; 2000 ps ; 2000 ps ;
+; SW[9] ; 2.5 V ; 2000 ps ; 2000 ps ;
+; SW[1] ; 2.5 V ; 2000 ps ; 2000 ps ;
+; SW[4] ; 2.5 V ; 2000 ps ; 2000 ps ;
+; SW[3] ; 2.5 V ; 2000 ps ; 2000 ps ;
+; SW[5] ; 2.5 V ; 2000 ps ; 2000 ps ;
+; SW[0] ; 2.5 V ; 2000 ps ; 2000 ps ;
+; SW[8] ; 2.5 V ; 2000 ps ; 2000 ps ;
+; SW[6] ; 2.5 V ; 2000 ps ; 2000 ps ;
++----------+--------------+-----------------+-----------------+
+
+
++------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+; Signal Integrity Metrics (Slow 1100mv 0c Model) ;
++-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
+; Pin ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
++-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
+; LEDR[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ;
+; LEDR[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0568 V ; 0.173 V ; 0.113 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0568 V ; 0.173 V ; 0.113 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ;
+; LEDR[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ;
+; LEDR[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0568 V ; 0.173 V ; 0.113 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0568 V ; 0.173 V ; 0.113 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ;
+; LEDR[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ;
+; LEDR[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ;
+; LEDR[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ;
+; LEDR[7] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ;
+; LEDR[8] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.07e-07 V ; 2.36 V ; -0.0231 V ; 0.14 V ; 0.089 V ; 4.52e-10 s ; 4.35e-10 s ; No ; Yes ; 2.32 V ; 3.07e-07 V ; 2.36 V ; -0.0231 V ; 0.14 V ; 0.089 V ; 4.52e-10 s ; 4.35e-10 s ; No ; Yes ;
+; LEDR[9] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ;
+; HEX0[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.07e-07 V ; 2.36 V ; -0.0231 V ; 0.14 V ; 0.089 V ; 4.52e-10 s ; 4.35e-10 s ; No ; Yes ; 2.32 V ; 3.07e-07 V ; 2.36 V ; -0.0231 V ; 0.14 V ; 0.089 V ; 4.52e-10 s ; 4.35e-10 s ; No ; Yes ;
+; HEX0[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ;
+; HEX0[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.07e-07 V ; 2.36 V ; -0.0231 V ; 0.14 V ; 0.089 V ; 4.52e-10 s ; 4.35e-10 s ; No ; Yes ; 2.32 V ; 3.07e-07 V ; 2.36 V ; -0.0231 V ; 0.14 V ; 0.089 V ; 4.52e-10 s ; 4.35e-10 s ; No ; Yes ;
+; HEX0[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ;
+; HEX0[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.07e-07 V ; 2.36 V ; -0.0231 V ; 0.14 V ; 0.089 V ; 4.52e-10 s ; 4.35e-10 s ; No ; Yes ; 2.32 V ; 3.07e-07 V ; 2.36 V ; -0.0231 V ; 0.14 V ; 0.089 V ; 4.52e-10 s ; 4.35e-10 s ; No ; Yes ;
+; HEX0[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.07e-07 V ; 2.36 V ; -0.0231 V ; 0.14 V ; 0.089 V ; 4.52e-10 s ; 4.35e-10 s ; No ; Yes ; 2.32 V ; 3.07e-07 V ; 2.36 V ; -0.0231 V ; 0.14 V ; 0.089 V ; 4.52e-10 s ; 4.35e-10 s ; No ; Yes ;
+; HEX0[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0568 V ; 0.173 V ; 0.113 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0568 V ; 0.173 V ; 0.113 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ;
+; HEX1[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ;
+; HEX1[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0568 V ; 0.173 V ; 0.113 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0568 V ; 0.173 V ; 0.113 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ;
+; HEX1[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ;
+; HEX1[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.07e-07 V ; 2.36 V ; -0.0231 V ; 0.14 V ; 0.089 V ; 4.52e-10 s ; 4.35e-10 s ; No ; Yes ; 2.32 V ; 3.07e-07 V ; 2.36 V ; -0.0231 V ; 0.14 V ; 0.089 V ; 4.52e-10 s ; 4.35e-10 s ; No ; Yes ;
+; HEX1[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ;
+; HEX1[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ;
+; HEX1[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0568 V ; 0.173 V ; 0.113 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0568 V ; 0.173 V ; 0.113 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ;
+; HEX2[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ;
+; HEX2[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ;
+; HEX2[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ;
+; HEX2[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.07e-07 V ; 2.36 V ; -0.0231 V ; 0.14 V ; 0.089 V ; 4.52e-10 s ; 4.35e-10 s ; No ; Yes ; 2.32 V ; 3.07e-07 V ; 2.36 V ; -0.0231 V ; 0.14 V ; 0.089 V ; 4.52e-10 s ; 4.35e-10 s ; No ; Yes ;
+; HEX2[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ;
+; HEX2[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ;
+; HEX2[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0568 V ; 0.173 V ; 0.113 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0568 V ; 0.173 V ; 0.113 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ;
+; HEX3[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0568 V ; 0.173 V ; 0.113 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0568 V ; 0.173 V ; 0.113 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ;
+; HEX3[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.07e-07 V ; 2.36 V ; -0.0231 V ; 0.14 V ; 0.089 V ; 4.52e-10 s ; 4.35e-10 s ; No ; Yes ; 2.32 V ; 3.07e-07 V ; 2.36 V ; -0.0231 V ; 0.14 V ; 0.089 V ; 4.52e-10 s ; 4.35e-10 s ; No ; Yes ;
+; HEX3[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ;
+; HEX3[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.07e-07 V ; 2.36 V ; -0.0231 V ; 0.14 V ; 0.089 V ; 4.52e-10 s ; 4.35e-10 s ; No ; Yes ; 2.32 V ; 3.07e-07 V ; 2.36 V ; -0.0231 V ; 0.14 V ; 0.089 V ; 4.52e-10 s ; 4.35e-10 s ; No ; Yes ;
+; HEX3[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ;
+; HEX3[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ;
+; HEX3[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.07e-07 V ; 2.36 V ; -0.0231 V ; 0.14 V ; 0.089 V ; 4.52e-10 s ; 4.35e-10 s ; No ; Yes ; 2.32 V ; 3.07e-07 V ; 2.36 V ; -0.0231 V ; 0.14 V ; 0.089 V ; 4.52e-10 s ; 4.35e-10 s ; No ; Yes ;
+; VGA_R[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.07e-07 V ; 2.36 V ; -0.0231 V ; 0.14 V ; 0.089 V ; 4.52e-10 s ; 4.35e-10 s ; No ; Yes ; 2.32 V ; 3.07e-07 V ; 2.36 V ; -0.0231 V ; 0.14 V ; 0.089 V ; 4.52e-10 s ; 4.35e-10 s ; No ; Yes ;
+; VGA_R[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.07e-07 V ; 2.36 V ; -0.0231 V ; 0.14 V ; 0.089 V ; 4.52e-10 s ; 4.35e-10 s ; No ; Yes ; 2.32 V ; 3.07e-07 V ; 2.36 V ; -0.0231 V ; 0.14 V ; 0.089 V ; 4.52e-10 s ; 4.35e-10 s ; No ; Yes ;
+; VGA_R[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ;
+; VGA_R[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ;
+; VGA_R[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0568 V ; 0.173 V ; 0.113 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0568 V ; 0.173 V ; 0.113 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ;
+; VGA_R[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ;
+; VGA_R[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ;
+; VGA_R[7] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ;
+; VGA_G[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ;
+; VGA_G[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0568 V ; 0.173 V ; 0.113 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0568 V ; 0.173 V ; 0.113 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ;
+; VGA_G[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ;
+; VGA_G[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0568 V ; 0.173 V ; 0.113 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0568 V ; 0.173 V ; 0.113 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ;
+; VGA_G[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.07e-07 V ; 2.36 V ; -0.0231 V ; 0.14 V ; 0.089 V ; 4.52e-10 s ; 4.35e-10 s ; No ; Yes ; 2.32 V ; 3.07e-07 V ; 2.36 V ; -0.0231 V ; 0.14 V ; 0.089 V ; 4.52e-10 s ; 4.35e-10 s ; No ; Yes ;
+; VGA_G[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ;
+; VGA_G[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ;
+; VGA_G[7] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ;
+; VGA_B[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ;
+; VGA_B[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ;
+; VGA_B[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0568 V ; 0.173 V ; 0.113 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0568 V ; 0.173 V ; 0.113 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ;
+; VGA_B[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0568 V ; 0.173 V ; 0.113 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0568 V ; 0.173 V ; 0.113 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ;
+; VGA_B[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0568 V ; 0.173 V ; 0.113 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0568 V ; 0.173 V ; 0.113 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ;
+; VGA_B[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ;
+; VGA_B[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0568 V ; 0.173 V ; 0.113 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0568 V ; 0.173 V ; 0.113 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ;
+; VGA_B[7] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ;
+; VGA_HS ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0568 V ; 0.173 V ; 0.113 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0568 V ; 0.173 V ; 0.113 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ;
+; VGA_VS ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ; 2.32 V ; 3.6e-07 V ; 2.41 V ; -0.0463 V ; 0.201 V ; 0.131 V ; 4.61e-10 s ; 4.53e-10 s ; No ; Yes ;
+; VGA_CLK ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ; 2.32 V ; 3.52e-07 V ; 2.42 V ; -0.0557 V ; 0.175 V ; 0.114 V ; 4.5e-10 s ; 4.35e-10 s ; No ; No ;
+; VGA_BLANK_N ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.07e-07 V ; 2.36 V ; -0.0231 V ; 0.14 V ; 0.089 V ; 4.52e-10 s ; 4.35e-10 s ; No ; Yes ; 2.32 V ; 3.07e-07 V ; 2.36 V ; -0.0231 V ; 0.14 V ; 0.089 V ; 4.52e-10 s ; 4.35e-10 s ; No ; Yes ;
++-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
+
+
++------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+; Signal Integrity Metrics (Slow 1100mv 85c Model) ;
++-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
+; Pin ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
++-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
+; LEDR[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ;
+; LEDR[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.0374 V ; 0.189 V ; 0.158 V ; 4.66e-10 s ; 4.67e-10 s ; No ; Yes ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.0374 V ; 0.189 V ; 0.158 V ; 4.66e-10 s ; 4.67e-10 s ; No ; Yes ;
+; LEDR[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ;
+; LEDR[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.0374 V ; 0.189 V ; 0.158 V ; 4.66e-10 s ; 4.67e-10 s ; No ; Yes ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.0374 V ; 0.189 V ; 0.158 V ; 4.66e-10 s ; 4.67e-10 s ; No ; Yes ;
+; LEDR[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ;
+; LEDR[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ;
+; LEDR[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ;
+; LEDR[7] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ;
+; LEDR[8] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.49e-05 V ; 2.34 V ; -0.0118 V ; 0.182 V ; 0.051 V ; 4.81e-10 s ; 4.83e-10 s ; Yes ; Yes ; 2.32 V ; 3.49e-05 V ; 2.34 V ; -0.0118 V ; 0.182 V ; 0.051 V ; 4.81e-10 s ; 4.83e-10 s ; Yes ; Yes ;
+; LEDR[9] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ;
+; HEX0[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.49e-05 V ; 2.34 V ; -0.0118 V ; 0.182 V ; 0.051 V ; 4.81e-10 s ; 4.83e-10 s ; Yes ; Yes ; 2.32 V ; 3.49e-05 V ; 2.34 V ; -0.0118 V ; 0.182 V ; 0.051 V ; 4.81e-10 s ; 4.83e-10 s ; Yes ; Yes ;
+; HEX0[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ;
+; HEX0[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.49e-05 V ; 2.34 V ; -0.0118 V ; 0.182 V ; 0.051 V ; 4.81e-10 s ; 4.83e-10 s ; Yes ; Yes ; 2.32 V ; 3.49e-05 V ; 2.34 V ; -0.0118 V ; 0.182 V ; 0.051 V ; 4.81e-10 s ; 4.83e-10 s ; Yes ; Yes ;
+; HEX0[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ;
+; HEX0[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.49e-05 V ; 2.34 V ; -0.0118 V ; 0.182 V ; 0.051 V ; 4.81e-10 s ; 4.83e-10 s ; Yes ; Yes ; 2.32 V ; 3.49e-05 V ; 2.34 V ; -0.0118 V ; 0.182 V ; 0.051 V ; 4.81e-10 s ; 4.83e-10 s ; Yes ; Yes ;
+; HEX0[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.49e-05 V ; 2.34 V ; -0.0118 V ; 0.182 V ; 0.051 V ; 4.81e-10 s ; 4.83e-10 s ; Yes ; Yes ; 2.32 V ; 3.49e-05 V ; 2.34 V ; -0.0118 V ; 0.182 V ; 0.051 V ; 4.81e-10 s ; 4.83e-10 s ; Yes ; Yes ;
+; HEX0[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.0374 V ; 0.189 V ; 0.158 V ; 4.66e-10 s ; 4.67e-10 s ; No ; Yes ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.0374 V ; 0.189 V ; 0.158 V ; 4.66e-10 s ; 4.67e-10 s ; No ; Yes ;
+; HEX1[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ;
+; HEX1[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.0374 V ; 0.189 V ; 0.158 V ; 4.66e-10 s ; 4.67e-10 s ; No ; Yes ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.0374 V ; 0.189 V ; 0.158 V ; 4.66e-10 s ; 4.67e-10 s ; No ; Yes ;
+; HEX1[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ;
+; HEX1[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.49e-05 V ; 2.34 V ; -0.0118 V ; 0.182 V ; 0.051 V ; 4.81e-10 s ; 4.83e-10 s ; Yes ; Yes ; 2.32 V ; 3.49e-05 V ; 2.34 V ; -0.0118 V ; 0.182 V ; 0.051 V ; 4.81e-10 s ; 4.83e-10 s ; Yes ; Yes ;
+; HEX1[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ;
+; HEX1[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ;
+; HEX1[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.0374 V ; 0.189 V ; 0.158 V ; 4.66e-10 s ; 4.67e-10 s ; No ; Yes ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.0374 V ; 0.189 V ; 0.158 V ; 4.66e-10 s ; 4.67e-10 s ; No ; Yes ;
+; HEX2[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ;
+; HEX2[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ;
+; HEX2[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ;
+; HEX2[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.49e-05 V ; 2.34 V ; -0.0118 V ; 0.182 V ; 0.051 V ; 4.81e-10 s ; 4.83e-10 s ; Yes ; Yes ; 2.32 V ; 3.49e-05 V ; 2.34 V ; -0.0118 V ; 0.182 V ; 0.051 V ; 4.81e-10 s ; 4.83e-10 s ; Yes ; Yes ;
+; HEX2[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ;
+; HEX2[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ;
+; HEX2[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.0374 V ; 0.189 V ; 0.158 V ; 4.66e-10 s ; 4.67e-10 s ; No ; Yes ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.0374 V ; 0.189 V ; 0.158 V ; 4.66e-10 s ; 4.67e-10 s ; No ; Yes ;
+; HEX3[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.0374 V ; 0.189 V ; 0.158 V ; 4.66e-10 s ; 4.67e-10 s ; No ; Yes ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.0374 V ; 0.189 V ; 0.158 V ; 4.66e-10 s ; 4.67e-10 s ; No ; Yes ;
+; HEX3[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.49e-05 V ; 2.34 V ; -0.0118 V ; 0.182 V ; 0.051 V ; 4.81e-10 s ; 4.83e-10 s ; Yes ; Yes ; 2.32 V ; 3.49e-05 V ; 2.34 V ; -0.0118 V ; 0.182 V ; 0.051 V ; 4.81e-10 s ; 4.83e-10 s ; Yes ; Yes ;
+; HEX3[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ;
+; HEX3[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.49e-05 V ; 2.34 V ; -0.0118 V ; 0.182 V ; 0.051 V ; 4.81e-10 s ; 4.83e-10 s ; Yes ; Yes ; 2.32 V ; 3.49e-05 V ; 2.34 V ; -0.0118 V ; 0.182 V ; 0.051 V ; 4.81e-10 s ; 4.83e-10 s ; Yes ; Yes ;
+; HEX3[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ;
+; HEX3[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ;
+; HEX3[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.49e-05 V ; 2.34 V ; -0.0118 V ; 0.182 V ; 0.051 V ; 4.81e-10 s ; 4.83e-10 s ; Yes ; Yes ; 2.32 V ; 3.49e-05 V ; 2.34 V ; -0.0118 V ; 0.182 V ; 0.051 V ; 4.81e-10 s ; 4.83e-10 s ; Yes ; Yes ;
+; VGA_R[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.49e-05 V ; 2.34 V ; -0.0118 V ; 0.182 V ; 0.051 V ; 4.81e-10 s ; 4.83e-10 s ; Yes ; Yes ; 2.32 V ; 3.49e-05 V ; 2.34 V ; -0.0118 V ; 0.182 V ; 0.051 V ; 4.81e-10 s ; 4.83e-10 s ; Yes ; Yes ;
+; VGA_R[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.49e-05 V ; 2.34 V ; -0.0118 V ; 0.182 V ; 0.051 V ; 4.81e-10 s ; 4.83e-10 s ; Yes ; Yes ; 2.32 V ; 3.49e-05 V ; 2.34 V ; -0.0118 V ; 0.182 V ; 0.051 V ; 4.81e-10 s ; 4.83e-10 s ; Yes ; Yes ;
+; VGA_R[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ;
+; VGA_R[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ;
+; VGA_R[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.0374 V ; 0.189 V ; 0.158 V ; 4.66e-10 s ; 4.67e-10 s ; No ; Yes ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.0374 V ; 0.189 V ; 0.158 V ; 4.66e-10 s ; 4.67e-10 s ; No ; Yes ;
+; VGA_R[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ;
+; VGA_R[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ;
+; VGA_R[7] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ;
+; VGA_G[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ;
+; VGA_G[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.0374 V ; 0.189 V ; 0.158 V ; 4.66e-10 s ; 4.67e-10 s ; No ; Yes ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.0374 V ; 0.189 V ; 0.158 V ; 4.66e-10 s ; 4.67e-10 s ; No ; Yes ;
+; VGA_G[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ;
+; VGA_G[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.0374 V ; 0.189 V ; 0.158 V ; 4.66e-10 s ; 4.67e-10 s ; No ; Yes ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.0374 V ; 0.189 V ; 0.158 V ; 4.66e-10 s ; 4.67e-10 s ; No ; Yes ;
+; VGA_G[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.49e-05 V ; 2.34 V ; -0.0118 V ; 0.182 V ; 0.051 V ; 4.81e-10 s ; 4.83e-10 s ; Yes ; Yes ; 2.32 V ; 3.49e-05 V ; 2.34 V ; -0.0118 V ; 0.182 V ; 0.051 V ; 4.81e-10 s ; 4.83e-10 s ; Yes ; Yes ;
+; VGA_G[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ;
+; VGA_G[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ;
+; VGA_G[7] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ;
+; VGA_B[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ;
+; VGA_B[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ;
+; VGA_B[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.0374 V ; 0.189 V ; 0.158 V ; 4.66e-10 s ; 4.67e-10 s ; No ; Yes ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.0374 V ; 0.189 V ; 0.158 V ; 4.66e-10 s ; 4.67e-10 s ; No ; Yes ;
+; VGA_B[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.0374 V ; 0.189 V ; 0.158 V ; 4.66e-10 s ; 4.67e-10 s ; No ; Yes ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.0374 V ; 0.189 V ; 0.158 V ; 4.66e-10 s ; 4.67e-10 s ; No ; Yes ;
+; VGA_B[4] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.0374 V ; 0.189 V ; 0.158 V ; 4.66e-10 s ; 4.67e-10 s ; No ; Yes ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.0374 V ; 0.189 V ; 0.158 V ; 4.66e-10 s ; 4.67e-10 s ; No ; Yes ;
+; VGA_B[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ;
+; VGA_B[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.0374 V ; 0.189 V ; 0.158 V ; 4.66e-10 s ; 4.67e-10 s ; No ; Yes ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.0374 V ; 0.189 V ; 0.158 V ; 4.66e-10 s ; 4.67e-10 s ; No ; Yes ;
+; VGA_B[7] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ;
+; VGA_HS ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.0374 V ; 0.189 V ; 0.158 V ; 4.66e-10 s ; 4.67e-10 s ; No ; Yes ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.0374 V ; 0.189 V ; 0.158 V ; 4.66e-10 s ; 4.67e-10 s ; No ; Yes ;
+; VGA_VS ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ; 2.32 V ; 3.96e-05 V ; 2.38 V ; -0.0306 V ; 0.23 V ; 0.206 V ; 4.83e-10 s ; 5.01e-10 s ; No ; Yes ;
+; VGA_CLK ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ; 2.32 V ; 3.88e-05 V ; 2.39 V ; -0.037 V ; 0.188 V ; 0.158 V ; 4.67e-10 s ; 4.67e-10 s ; No ; Yes ;
+; VGA_BLANK_N ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 3.49e-05 V ; 2.34 V ; -0.0118 V ; 0.182 V ; 0.051 V ; 4.81e-10 s ; 4.83e-10 s ; Yes ; Yes ; 2.32 V ; 3.49e-05 V ; 2.34 V ; -0.0118 V ; 0.182 V ; 0.051 V ; 4.81e-10 s ; 4.83e-10 s ; Yes ; Yes ;
++-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
+
+
++------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+; Signal Integrity Metrics (Fast 1100mv 0c Model) ;
++-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
+; Pin ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
++-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
+; LEDR[0] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ;
+; LEDR[1] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ;
+; LEDR[2] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ;
+; LEDR[3] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ;
+; LEDR[4] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ;
+; LEDR[5] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ;
+; LEDR[6] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ;
+; LEDR[7] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ;
+; LEDR[8] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ;
+; LEDR[9] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ;
+; HEX0[0] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ;
+; HEX0[1] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ;
+; HEX0[2] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ;
+; HEX0[3] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ;
+; HEX0[4] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ;
+; HEX0[5] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ;
+; HEX0[6] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ;
+; HEX1[0] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ;
+; HEX1[1] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ;
+; HEX1[2] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ;
+; HEX1[3] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ;
+; HEX1[4] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ;
+; HEX1[5] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ;
+; HEX1[6] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ;
+; HEX2[0] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ;
+; HEX2[1] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ;
+; HEX2[2] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ;
+; HEX2[3] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ;
+; HEX2[4] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ;
+; HEX2[5] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ;
+; HEX2[6] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ;
+; HEX3[0] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ;
+; HEX3[1] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ;
+; HEX3[2] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ;
+; HEX3[3] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ;
+; HEX3[4] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ;
+; HEX3[5] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ;
+; HEX3[6] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ;
+; VGA_R[0] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ;
+; VGA_R[1] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ;
+; VGA_R[2] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ;
+; VGA_R[3] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ;
+; VGA_R[4] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ;
+; VGA_R[5] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ;
+; VGA_R[6] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ;
+; VGA_R[7] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ;
+; VGA_G[0] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ;
+; VGA_G[1] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ;
+; VGA_G[2] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ;
+; VGA_G[3] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ;
+; VGA_G[4] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ;
+; VGA_G[5] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ;
+; VGA_G[6] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ;
+; VGA_G[7] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ;
+; VGA_B[0] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ;
+; VGA_B[1] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ;
+; VGA_B[2] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ;
+; VGA_B[3] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ;
+; VGA_B[4] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ;
+; VGA_B[5] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ;
+; VGA_B[6] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ;
+; VGA_B[7] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ;
+; VGA_HS ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ;
+; VGA_VS ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ;
+; VGA_CLK ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ;
+; VGA_BLANK_N ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ;
++-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
+
+
++------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+; Signal Integrity Metrics (Fast 1100mv 85c Model) ;
++-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
+; Pin ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
++-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
+; LEDR[0] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ;
+; LEDR[1] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ;
+; LEDR[2] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ;
+; LEDR[3] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ;
+; LEDR[4] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ;
+; LEDR[5] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ;
+; LEDR[6] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ;
+; LEDR[7] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ;
+; LEDR[8] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ;
+; LEDR[9] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ;
+; HEX0[0] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ;
+; HEX0[1] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ;
+; HEX0[2] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ;
+; HEX0[3] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ;
+; HEX0[4] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ;
+; HEX0[5] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ;
+; HEX0[6] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ;
+; HEX1[0] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ;
+; HEX1[1] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ;
+; HEX1[2] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ;
+; HEX1[3] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ;
+; HEX1[4] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ;
+; HEX1[5] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ;
+; HEX1[6] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ;
+; HEX2[0] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ;
+; HEX2[1] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ;
+; HEX2[2] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ;
+; HEX2[3] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ;
+; HEX2[4] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ;
+; HEX2[5] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ;
+; HEX2[6] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ;
+; HEX3[0] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ;
+; HEX3[1] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ;
+; HEX3[2] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ;
+; HEX3[3] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ;
+; HEX3[4] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ;
+; HEX3[5] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ;
+; HEX3[6] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ;
+; VGA_R[0] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ;
+; VGA_R[1] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ;
+; VGA_R[2] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ;
+; VGA_R[3] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ;
+; VGA_R[4] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ;
+; VGA_R[5] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ;
+; VGA_R[6] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ;
+; VGA_R[7] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ;
+; VGA_G[0] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ;
+; VGA_G[1] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ;
+; VGA_G[2] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ;
+; VGA_G[3] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ;
+; VGA_G[4] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ;
+; VGA_G[5] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ;
+; VGA_G[6] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ;
+; VGA_G[7] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ;
+; VGA_B[0] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ;
+; VGA_B[1] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ;
+; VGA_B[2] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ;
+; VGA_B[3] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ;
+; VGA_B[4] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ;
+; VGA_B[5] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ;
+; VGA_B[6] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ;
+; VGA_B[7] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ;
+; VGA_HS ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ;
+; VGA_VS ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ;
+; VGA_CLK ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ;
+; VGA_BLANK_N ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ;
++-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
+
+
++-------------------------------------------------------------------+
+; Setup Transfers ;
++------------+----------+----------+----------+----------+----------+
+; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
++------------+----------+----------+----------+----------+----------+
+; CLOCK_50 ; CLOCK_50 ; 81578657 ; 0 ; 0 ; 0 ;
++------------+----------+----------+----------+----------+----------+
+Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.
+
+
++-------------------------------------------------------------------+
+; Hold Transfers ;
++------------+----------+----------+----------+----------+----------+
+; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
++------------+----------+----------+----------+----------+----------+
+; CLOCK_50 ; CLOCK_50 ; 81578657 ; 0 ; 0 ; 0 ;
++------------+----------+----------+----------+----------+----------+
+Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.
+
+
+---------------
+; Report TCCS ;
+---------------
+No dedicated SERDES Transmitter circuitry present in device or used in design
+
+
+---------------
+; Report RSKM ;
+---------------
+No non-DPA dedicated SERDES Receiver circuitry present in device or used in design
+
+
++------------------------------------------------+
+; Unconstrained Paths Summary ;
++---------------------------------+-------+------+
+; Property ; Setup ; Hold ;
++---------------------------------+-------+------+
+; Illegal Clocks ; 0 ; 0 ;
+; Unconstrained Clocks ; 0 ; 0 ;
+; Unconstrained Input Ports ; 13 ; 13 ;
+; Unconstrained Input Port Paths ; 1290 ; 1290 ;
+; Unconstrained Output Ports ; 22 ; 22 ;
+; Unconstrained Output Port Paths ; 723 ; 723 ;
++---------------------------------+-------+------+
+
+
++------------------------------------------+
+; Clock Status Summary ;
++----------+----------+------+-------------+
+; Target ; Clock ; Type ; Status ;
++----------+----------+------+-------------+
+; CLOCK_50 ; CLOCK_50 ; Base ; Constrained ;
++----------+----------+------+-------------+
+
+
++---------------------------------------------------------------------------------------------------+
+; Unconstrained Input Ports ;
++------------+--------------------------------------------------------------------------------------+
+; Input Port ; Comment ;
++------------+--------------------------------------------------------------------------------------+
+; KEY[0] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; KEY[1] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; KEY[2] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; SW[0] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; SW[1] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; SW[2] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; SW[3] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; SW[4] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; SW[5] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; SW[6] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; SW[7] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; SW[8] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; SW[9] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
++------------+--------------------------------------------------------------------------------------+
+
+
++-----------------------------------------------------------------------------------------------------+
+; Unconstrained Output Ports ;
++-------------+---------------------------------------------------------------------------------------+
+; Output Port ; Comment ;
++-------------+---------------------------------------------------------------------------------------+
+; HEX0[2] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; HEX0[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; HEX0[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; HEX0[6] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; HEX1[0] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; HEX2[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; HEX2[6] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; HEX3[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; HEX3[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; HEX3[5] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; VGA_BLANK_N ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; VGA_CLK ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; VGA_HS ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; VGA_R[0] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; VGA_R[1] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; VGA_R[2] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; VGA_R[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; VGA_R[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; VGA_R[5] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; VGA_R[6] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; VGA_R[7] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; VGA_VS ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
++-------------+---------------------------------------------------------------------------------------+
+
+
++---------------------------------------------------------------------------------------------------+
+; Unconstrained Input Ports ;
++------------+--------------------------------------------------------------------------------------+
+; Input Port ; Comment ;
++------------+--------------------------------------------------------------------------------------+
+; KEY[0] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; KEY[1] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; KEY[2] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; SW[0] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; SW[1] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; SW[2] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; SW[3] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; SW[4] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; SW[5] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; SW[6] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; SW[7] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; SW[8] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; SW[9] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ;
++------------+--------------------------------------------------------------------------------------+
+
+
++-----------------------------------------------------------------------------------------------------+
+; Unconstrained Output Ports ;
++-------------+---------------------------------------------------------------------------------------+
+; Output Port ; Comment ;
++-------------+---------------------------------------------------------------------------------------+
+; HEX0[2] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; HEX0[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; HEX0[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; HEX0[6] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; HEX1[0] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; HEX2[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; HEX2[6] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; HEX3[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; HEX3[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; HEX3[5] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; VGA_BLANK_N ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; VGA_CLK ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; VGA_HS ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; VGA_R[0] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; VGA_R[1] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; VGA_R[2] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; VGA_R[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; VGA_R[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; VGA_R[5] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; VGA_R[6] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; VGA_R[7] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
+; VGA_VS ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ;
++-------------+---------------------------------------------------------------------------------------+
+
+
++------------------------------------+
+; TimeQuest Timing Analyzer Messages ;
++------------------------------------+
+Info: *******************************************************************
+Info: Running Quartus Prime TimeQuest Timing Analyzer
+ Info: Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
+ Info: Processing started: Thu Sep 24 11:21:18 2020
+Info: Command: quartus_sta project24_09 -c de1_soc_wrapper
+Info: qsta_default_script.tcl version: #1
+Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
+Info (20030): Parallel compilation is enabled and will use 16 of the 24 processors detected
+Info (21077): Low junction temperature is 0 degrees C
+Info (21077): High junction temperature is 85 degrees C
+Critical Warning (332012): Synopsys Design Constraints File file not found: 'de1_soc_wrapper.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design.
+Info (332142): No user constrained base clocks found in the design. Calling "derive_clocks -period 1.0"
+Info (332105): Deriving Clocks
+ Info (332105): create_clock -period 1.000 -name CLOCK_50 CLOCK_50
+Info (332143): No user constrained clock uncertainty found in the design. Calling "derive_clock_uncertainty"
+Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
+Info: Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON
+Info: Analyzing Slow 1100mV 85C Model
+Critical Warning (332148): Timing requirements not met
+ Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer.
+Info (332146): Worst-case setup slack is -12.117
+ Info (332119): Slack End Point TNS Clock
+ Info (332119): ========= =================== =====================
+ Info (332119): -12.117 -23738.417 CLOCK_50
+Info (332146): Worst-case hold slack is 0.360
+ Info (332119): Slack End Point TNS Clock
+ Info (332119): ========= =================== =====================
+ Info (332119): 0.360 0.000 CLOCK_50
+Info (332140): No Recovery paths to report
+Info (332140): No Removal paths to report
+Info (332146): Worst-case minimum pulse width slack is -2.636
+ Info (332119): Slack End Point TNS Clock
+ Info (332119): ========= =================== =====================
+ Info (332119): -2.636 -9178.515 CLOCK_50
+Info: Analyzing Slow 1100mV 0C Model
+Info (334003): Started post-fitting delay annotation
+Info (334004): Delay annotation completed successfully
+Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
+Critical Warning (332148): Timing requirements not met
+ Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer.
+Info (332146): Worst-case setup slack is -11.922
+ Info (332119): Slack End Point TNS Clock
+ Info (332119): ========= =================== =====================
+ Info (332119): -11.922 -23014.909 CLOCK_50
+Info (332146): Worst-case hold slack is 0.320
+ Info (332119): Slack End Point TNS Clock
+ Info (332119): ========= =================== =====================
+ Info (332119): 0.320 0.000 CLOCK_50
+Info (332140): No Recovery paths to report
+Info (332140): No Removal paths to report
+Info (332146): Worst-case minimum pulse width slack is -2.636
+ Info (332119): Slack End Point TNS Clock
+ Info (332119): ========= =================== =====================
+ Info (332119): -2.636 -9227.462 CLOCK_50
+Info: Analyzing Fast 1100mV 85C Model
+Info (334003): Started post-fitting delay annotation
+Info (334004): Delay annotation completed successfully
+Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
+Critical Warning (332148): Timing requirements not met
+ Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer.
+Info (332146): Worst-case setup slack is -7.015
+ Info (332119): Slack End Point TNS Clock
+ Info (332119): ========= =================== =====================
+ Info (332119): -7.015 -13385.378 CLOCK_50
+Info (332146): Worst-case hold slack is 0.180
+ Info (332119): Slack End Point TNS Clock
+ Info (332119): ========= =================== =====================
+ Info (332119): 0.180 0.000 CLOCK_50
+Info (332140): No Recovery paths to report
+Info (332140): No Removal paths to report
+Info (332146): Worst-case minimum pulse width slack is -2.636
+ Info (332119): Slack End Point TNS Clock
+ Info (332119): ========= =================== =====================
+ Info (332119): -2.636 -8567.649 CLOCK_50
+Info: Analyzing Fast 1100mV 0C Model
+Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
+Critical Warning (332148): Timing requirements not met
+ Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer.
+Info (332146): Worst-case setup slack is -6.180
+ Info (332119): Slack End Point TNS Clock
+ Info (332119): ========= =================== =====================
+ Info (332119): -6.180 -11655.282 CLOCK_50
+Info (332146): Worst-case hold slack is 0.172
+ Info (332119): Slack End Point TNS Clock
+ Info (332119): ========= =================== =====================
+ Info (332119): 0.172 0.000 CLOCK_50
+Info (332140): No Recovery paths to report
+Info (332140): No Removal paths to report
+Info (332146): Worst-case minimum pulse width slack is -2.636
+ Info (332119): Slack End Point TNS Clock
+ Info (332119): ========= =================== =====================
+ Info (332119): -2.636 -8570.738 CLOCK_50
+Info (332102): Design is not fully constrained for setup requirements
+Info (332102): Design is not fully constrained for hold requirements
+Info: Quartus Prime TimeQuest Timing Analyzer was successful. 0 errors, 6 warnings
+ Info: Peak virtual memory: 1570 megabytes
+ Info: Processing ended: Thu Sep 24 11:21:30 2020
+ Info: Elapsed time: 00:00:12
+ Info: Total CPU time (on all processors): 00:00:30
+
+
diff --git a/output_files/de1_soc_wrapper.sta.summary b/output_files/de1_soc_wrapper.sta.summary
new file mode 100644
index 0000000000000000000000000000000000000000..6291c8ce221745ac4dd97785fae51738a9dcb422
--- /dev/null
+++ b/output_files/de1_soc_wrapper.sta.summary
@@ -0,0 +1,53 @@
+------------------------------------------------------------
+TimeQuest Timing Analyzer Summary
+------------------------------------------------------------
+
+Type : Slow 1100mV 85C Model Setup 'CLOCK_50'
+Slack : -12.117
+TNS : -23738.417
+
+Type : Slow 1100mV 85C Model Hold 'CLOCK_50'
+Slack : 0.360
+TNS : 0.000
+
+Type : Slow 1100mV 85C Model Minimum Pulse Width 'CLOCK_50'
+Slack : -2.636
+TNS : -9178.515
+
+Type : Slow 1100mV 0C Model Setup 'CLOCK_50'
+Slack : -11.922
+TNS : -23014.909
+
+Type : Slow 1100mV 0C Model Hold 'CLOCK_50'
+Slack : 0.320
+TNS : 0.000
+
+Type : Slow 1100mV 0C Model Minimum Pulse Width 'CLOCK_50'
+Slack : -2.636
+TNS : -9227.462
+
+Type : Fast 1100mV 85C Model Setup 'CLOCK_50'
+Slack : -7.015
+TNS : -13385.378
+
+Type : Fast 1100mV 85C Model Hold 'CLOCK_50'
+Slack : 0.180
+TNS : 0.000
+
+Type : Fast 1100mV 85C Model Minimum Pulse Width 'CLOCK_50'
+Slack : -2.636
+TNS : -8567.649
+
+Type : Fast 1100mV 0C Model Setup 'CLOCK_50'
+Slack : -6.180
+TNS : -11655.282
+
+Type : Fast 1100mV 0C Model Hold 'CLOCK_50'
+Slack : 0.172
+TNS : 0.000
+
+Type : Fast 1100mV 0C Model Minimum Pulse Width 'CLOCK_50'
+Slack : -2.636
+TNS : -8570.738
+
+------------------------------------------------------------
diff --git a/project24_09.qpf b/project24_09.qpf
new file mode 100644
index 0000000000000000000000000000000000000000..7b72bc73d9e604eb0a62fdf335941b46fb53d9b4
--- /dev/null
+++ b/project24_09.qpf
@@ -0,0 +1,31 @@
+# -------------------------------------------------------------------------- #
+#
+# Copyright (C) 2017 Intel Corporation. All rights reserved.
+# Your use of Intel Corporation's design tools, logic functions
+# and other software and tools, and its AMPP partner logic
+# functions, and any output files from any of the foregoing
+# (including device programming or simulation files), and any
+# associated documentation or information are expressly subject
+# to the terms and conditions of the Intel Program License
+# Subscription Agreement, the Intel Quartus Prime License Agreement,
+# the Intel MegaCore Function License Agreement, or other
+# applicable license agreement, including, without limitation,
+# that your use is for the sole purpose of programming logic
+# devices manufactured by Intel and sold by Intel or its
+# authorized distributors. Please refer to the applicable
+# agreement for further details.
+#
+# -------------------------------------------------------------------------- #
+#
+# Quartus Prime
+# Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
+# Date created = 10:53:10 September 24, 2020
+#
+# -------------------------------------------------------------------------- #
+
+QUARTUS_VERSION = "16.1"
+DATE = "10:53:10 September 24, 2020"
+
+# Revisions
+
+PROJECT_REVISION = "de1_soc_wrapper"
diff --git a/simulation/modelsim/de1_soc_wrapper.sft b/simulation/modelsim/de1_soc_wrapper.sft
index a65a21971c01c89db73582698aea780bda1e4b7e..06a2ca45cb4b6dd110fa5ca7c4585e6bd0d35e20 100644
--- a/simulation/modelsim/de1_soc_wrapper.sft
+++ b/simulation/modelsim/de1_soc_wrapper.sft
@@ -1 +1 @@
-set tool_name "ModelSim-Altera (SystemVerilog)"
+set tool_name "ModelSim-Altera (Verilog)"
diff --git a/simulation/modelsim/de1_soc_wrapper.vo b/simulation/modelsim/de1_soc_wrapper.vo
new file mode 100644
index 0000000000000000000000000000000000000000..9e0ef17390d499301fc4f256eb01f8dc66b3fa9d
--- /dev/null
+++ b/simulation/modelsim/de1_soc_wrapper.vo
@@ -0,0 +1,115731 @@
+// Copyright (C) 2017 Intel Corporation. All rights reserved.
+// Your use of Intel Corporation's design tools, logic functions
+// and other software and tools, and its AMPP partner logic
+// functions, and any output files from any of the foregoing
+// (including device programming or simulation files), and any
+// associated documentation or information are expressly subject
+// to the terms and conditions of the Intel Program License
+// Subscription Agreement, the Intel Quartus Prime License Agreement,
+// the Intel MegaCore Function License Agreement, or other
+// applicable license agreement, including, without limitation,
+// that your use is for the sole purpose of programming logic
+// devices manufactured by Intel and sold by Intel or its
+// authorized distributors. Please refer to the applicable
+// agreement for further details.
+
+// VENDOR "Altera"
+// PROGRAM "Quartus Prime"
+// VERSION "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition"
+
+// DATE "09/24/2020 11:21:33"
+
+//
+// Device: Altera 5CSEMA5F31C6 Package FBGA896
+//
+
+//
+// This Verilog file should be used for ModelSim-Altera (Verilog) only
+//
+
+`timescale 1 ps/ 1 ps
+
+module de1_soc_wrapper (
+ CLOCK_50,
+ SW,
+ KEY,
+ LEDR,
+ HEX0,
+ HEX1,
+ HEX2,
+ HEX3,
+ VGA_R,
+ VGA_G,
+ VGA_B,
+ VGA_HS,
+ VGA_VS,
+ VGA_CLK,
+ VGA_BLANK_N);
+input CLOCK_50;
+input [9:0] SW;
+input [3:0] KEY;
+output [9:0] LEDR;
+output [6:0] HEX0;
+output [6:0] HEX1;
+output [6:0] HEX2;
+output [6:0] HEX3;
+output [7:0] VGA_R;
+output [7:0] VGA_G;
+output [7:0] VGA_B;
+output VGA_HS;
+output VGA_VS;
+output VGA_CLK;
+output VGA_BLANK_N;
+
+// Design Ports Information
+// KEY[3] => Location: PIN_Y26, I/O Standard: 2.5 V, Current Strength: Default
+// LEDR[0] => Location: PIN_H8, I/O Standard: 2.5 V, Current Strength: Default
+// LEDR[1] => Location: PIN_G7, I/O Standard: 2.5 V, Current Strength: Default
+// LEDR[2] => Location: PIN_A8, I/O Standard: 2.5 V, Current Strength: Default
+// LEDR[3] => Location: PIN_AH23, I/O Standard: 2.5 V, Current Strength: Default
+// LEDR[4] => Location: PIN_AD29, I/O Standard: 2.5 V, Current Strength: Default
+// LEDR[5] => Location: PIN_AA21, I/O Standard: 2.5 V, Current Strength: Default
+// LEDR[6] => Location: PIN_AG1, I/O Standard: 2.5 V, Current Strength: Default
+// LEDR[7] => Location: PIN_AK16, I/O Standard: 2.5 V, Current Strength: Default
+// LEDR[8] => Location: PIN_Y21, I/O Standard: 2.5 V, Current Strength: Default
+// LEDR[9] => Location: PIN_A5, I/O Standard: 2.5 V, Current Strength: Default
+// HEX0[0] => Location: PIN_AB13, I/O Standard: 2.5 V, Current Strength: Default
+// HEX0[1] => Location: PIN_E6, I/O Standard: 2.5 V, Current Strength: Default
+// HEX0[2] => Location: PIN_W16, I/O Standard: 2.5 V, Current Strength: Default
+// HEX0[3] => Location: PIN_AA16, I/O Standard: 2.5 V, Current Strength: Default
+// HEX0[4] => Location: PIN_AB17, I/O Standard: 2.5 V, Current Strength: Default
+// HEX0[5] => Location: PIN_J14, I/O Standard: 2.5 V, Current Strength: Default
+// HEX0[6] => Location: PIN_AE16, I/O Standard: 2.5 V, Current Strength: Default
+// HEX1[0] => Location: PIN_AJ7, I/O Standard: 2.5 V, Current Strength: Default
+// HEX1[1] => Location: PIN_AB28, I/O Standard: 2.5 V, Current Strength: Default
+// HEX1[2] => Location: PIN_V16, I/O Standard: 2.5 V, Current Strength: Default
+// HEX1[3] => Location: PIN_G11, I/O Standard: 2.5 V, Current Strength: Default
+// HEX1[4] => Location: PIN_AG8, I/O Standard: 2.5 V, Current Strength: Default
+// HEX1[5] => Location: PIN_AB30, I/O Standard: 2.5 V, Current Strength: Default
+// HEX1[6] => Location: PIN_AJ9, I/O Standard: 2.5 V, Current Strength: Default
+// HEX2[0] => Location: PIN_AD11, I/O Standard: 2.5 V, Current Strength: Default
+// HEX2[1] => Location: PIN_AE17, I/O Standard: 2.5 V, Current Strength: Default
+// HEX2[2] => Location: PIN_E12, I/O Standard: 2.5 V, Current Strength: Default
+// HEX2[3] => Location: PIN_H7, I/O Standard: 2.5 V, Current Strength: Default
+// HEX2[4] => Location: PIN_AC29, I/O Standard: 2.5 V, Current Strength: Default
+// HEX2[5] => Location: PIN_Y17, I/O Standard: 2.5 V, Current Strength: Default
+// HEX2[6] => Location: PIN_AC28, I/O Standard: 2.5 V, Current Strength: Default
+// HEX3[0] => Location: PIN_AG27, I/O Standard: 2.5 V, Current Strength: Default
+// HEX3[1] => Location: PIN_AF13, I/O Standard: 2.5 V, Current Strength: Default
+// HEX3[2] => Location: PIN_AD20, I/O Standard: 2.5 V, Current Strength: Default
+// HEX3[3] => Location: PIN_AK11, I/O Standard: 2.5 V, Current Strength: Default
+// HEX3[4] => Location: PIN_AK8, I/O Standard: 2.5 V, Current Strength: Default
+// HEX3[5] => Location: PIN_AJ10, I/O Standard: 2.5 V, Current Strength: Default
+// HEX3[6] => Location: PIN_AA30, I/O Standard: 2.5 V, Current Strength: Default
+// VGA_R[0] => Location: PIN_AH14, I/O Standard: 2.5 V, Current Strength: Default
+// VGA_R[1] => Location: PIN_AB12, I/O Standard: 2.5 V, Current Strength: Default
+// VGA_R[2] => Location: PIN_AH13, I/O Standard: 2.5 V, Current Strength: Default
+// VGA_R[3] => Location: PIN_AG6, I/O Standard: 2.5 V, Current Strength: Default
+// VGA_R[4] => Location: PIN_AJ4, I/O Standard: 2.5 V, Current Strength: Default
+// VGA_R[5] => Location: PIN_AJ1, I/O Standard: 2.5 V, Current Strength: Default
+// VGA_R[6] => Location: PIN_AK6, I/O Standard: 2.5 V, Current Strength: Default
+// VGA_R[7] => Location: PIN_AA13, I/O Standard: 2.5 V, Current Strength: Default
+// VGA_G[0] => Location: PIN_Y18, I/O Standard: 2.5 V, Current Strength: Default
+// VGA_G[1] => Location: PIN_AH17, I/O Standard: 2.5 V, Current Strength: Default
+// VGA_G[2] => Location: PIN_AE18, I/O Standard: 2.5 V, Current Strength: Default
+// VGA_G[3] => Location: PIN_C7, I/O Standard: 2.5 V, Current Strength: Default
+// VGA_G[4] => Location: PIN_Y24, I/O Standard: 2.5 V, Current Strength: Default
+// VGA_G[5] => Location: PIN_AK9, I/O Standard: 2.5 V, Current Strength: Default
+// VGA_G[6] => Location: PIN_H14, I/O Standard: 2.5 V, Current Strength: Default
+// VGA_G[7] => Location: PIN_AH22, I/O Standard: 2.5 V, Current Strength: Default
+// VGA_B[0] => Location: PIN_AB15, I/O Standard: 2.5 V, Current Strength: Default
+// VGA_B[1] => Location: PIN_D4, I/O Standard: 2.5 V, Current Strength: Default
+// VGA_B[2] => Location: PIN_AF9, I/O Standard: 2.5 V, Current Strength: Default
+// VGA_B[3] => Location: PIN_D5, I/O Standard: 2.5 V, Current Strength: Default
+// VGA_B[4] => Location: PIN_AH30, I/O Standard: 2.5 V, Current Strength: Default
+// VGA_B[5] => Location: PIN_AE13, I/O Standard: 2.5 V, Current Strength: Default
+// VGA_B[6] => Location: PIN_E4, I/O Standard: 2.5 V, Current Strength: Default
+// VGA_B[7] => Location: PIN_E2, I/O Standard: 2.5 V, Current Strength: Default
+// VGA_HS => Location: PIN_AK12, I/O Standard: 2.5 V, Current Strength: Default
+// VGA_VS => Location: PIN_AF14, I/O Standard: 2.5 V, Current Strength: Default
+// VGA_CLK => Location: PIN_AF16, I/O Standard: 2.5 V, Current Strength: Default
+// VGA_BLANK_N => Location: PIN_AF15, I/O Standard: 2.5 V, Current Strength: Default
+// CLOCK_50 => Location: PIN_AB27, I/O Standard: 2.5 V, Current Strength: Default
+// KEY[2] => Location: PIN_Y27, I/O Standard: 2.5 V, Current Strength: Default
+// SW[7] => Location: PIN_AK2, I/O Standard: 2.5 V, Current Strength: Default
+// KEY[1] => Location: PIN_AH9, I/O Standard: 2.5 V, Current Strength: Default
+// KEY[0] => Location: PIN_AG5, I/O Standard: 2.5 V, Current Strength: Default
+// SW[2] => Location: PIN_AG10, I/O Standard: 2.5 V, Current Strength: Default
+// SW[9] => Location: PIN_AH8, I/O Standard: 2.5 V, Current Strength: Default
+// SW[1] => Location: PIN_AC12, I/O Standard: 2.5 V, Current Strength: Default
+// SW[4] => Location: PIN_AK3, I/O Standard: 2.5 V, Current Strength: Default
+// SW[3] => Location: PIN_AJ5, I/O Standard: 2.5 V, Current Strength: Default
+// SW[5] => Location: PIN_AD12, I/O Standard: 2.5 V, Current Strength: Default
+// SW[0] => Location: PIN_AG12, I/O Standard: 2.5 V, Current Strength: Default
+// SW[8] => Location: PIN_AK7, I/O Standard: 2.5 V, Current Strength: Default
+// SW[6] => Location: PIN_AK4, I/O Standard: 2.5 V, Current Strength: Default
+
+
+wire gnd;
+wire vcc;
+wire unknown;
+
+assign gnd = 1'b0;
+assign vcc = 1'b1;
+assign unknown = 1'bx;
+
+tri1 devclrn;
+tri1 devpor;
+tri1 devoe;
+wire \KEY[3]~input_o ;
+wire \~QUARTUS_CREATED_GND~I_combout ;
+wire \CLOCK_50~input_o ;
+wire \CLOCK_50~inputCLKENA0_outclk ;
+wire \tick_count[0]~0_combout ;
+wire \KEY[2]~input_o ;
+wire \KEY[2]~inputCLKENA0_outclk ;
+wire \Add0~97_sumout ;
+wire \Add0~98 ;
+wire \Add0~93_sumout ;
+wire \Add0~94 ;
+wire \Add0~89_sumout ;
+wire \Add0~90 ;
+wire \Add0~85_sumout ;
+wire \Add0~86 ;
+wire \Add0~81_sumout ;
+wire \Add0~82 ;
+wire \Add0~77_sumout ;
+wire \Add0~78 ;
+wire \Add0~73_sumout ;
+wire \Add0~74 ;
+wire \Add0~69_sumout ;
+wire \Add0~70 ;
+wire \Add0~65_sumout ;
+wire \Add0~66 ;
+wire \Add0~61_sumout ;
+wire \Add0~62 ;
+wire \Add0~57_sumout ;
+wire \Add0~58 ;
+wire \Add0~53_sumout ;
+wire \Add0~54 ;
+wire \Add0~49_sumout ;
+wire \Add0~50 ;
+wire \Add0~45_sumout ;
+wire \Add0~46 ;
+wire \Add0~41_sumout ;
+wire \Add0~42 ;
+wire \Add0~37_sumout ;
+wire \Add0~38 ;
+wire \Add0~33_sumout ;
+wire \Add0~34 ;
+wire \Add0~29_sumout ;
+wire \Add0~30 ;
+wire \Add0~25_sumout ;
+wire \Add0~26 ;
+wire \Add0~21_sumout ;
+wire \Add0~22 ;
+wire \Add0~17_sumout ;
+wire \Add0~18 ;
+wire \Add0~13_sumout ;
+wire \Add0~14 ;
+wire \Add0~5_sumout ;
+wire \Add0~6 ;
+wire \Add0~9_sumout ;
+wire \Add0~10 ;
+wire \Add0~1_sumout ;
+wire \heartbeat~0_combout ;
+wire \heartbeat~q ;
+wire \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|M66wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Jppvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tki2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ptgwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ilpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Itgwx4~0_combout ;
+wire \soc_inst|interconnect_1|HRDATA[25]~1_combout ;
+wire \soc_inst|m0_1|u_logic|Orewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sy52z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Huqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Kzxvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Nsk2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ju5wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Vbovx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y9t2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Y9t2z4~q ;
+wire \soc_inst|m0_1|u_logic|Hdh2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wq5wx4~combout ;
+wire \soc_inst|m0_1|u_logic|G2lwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Howvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G2lwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Rbi3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Wmc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wdqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|A4t2z4~q ;
+wire \soc_inst|m0_1|u_logic|Mhc2z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Mhc2z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Mhc2z4~4_combout ;
+wire \soc_inst|m0_1|u_logic|O9qvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rsqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ag4wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wkxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mtqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sy2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bpzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|P03wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Og4wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mtqvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Nxqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H1rvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S5pvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Yghvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tyx2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ibrwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hxx2z4~q ;
+wire \soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|B8c2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vaw2z4~q ;
+wire \soc_inst|m0_1|u_logic|Bpsvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xnrvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jvqvx4~1_combout ;
+wire \soc_inst|ram_1|write_cycle~q ;
+wire \soc_inst|m0_1|u_logic|Wpsvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I1c2z4~combout ;
+wire \soc_inst|m0_1|u_logic|C9yvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ncqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|P1c2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z7fwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G0c2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zzb2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jyb2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xhiwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jyb2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Jyb2z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|O092z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K1z2z4~q ;
+wire \soc_inst|m0_1|u_logic|Bxcwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lu6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Slnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Edovx4~combout ;
+wire \soc_inst|m0_1|u_logic|T1y2z4~q ;
+wire \soc_inst|m0_1|u_logic|Jcw2z4~q ;
+wire \soc_inst|m0_1|u_logic|Llnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Llnvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Socwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lhyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qxc2z4~combout ;
+wire \soc_inst|m0_1|u_logic|Lhyvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ps3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|X8zvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Evcwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Evcwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|T3ovx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H4ovx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fzcwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wzawx4~combout ;
+wire \soc_inst|m0_1|u_logic|Glnwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fuhwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|L8t2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qaqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|E6nwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G36wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qfdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mn3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ucqvx4~combout ;
+wire \soc_inst|m0_1|u_logic|X77wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Una2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C5c2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|C5c2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H0zvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z6c2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C5c2z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Hdh2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ppsvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ppsvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ppsvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ppsvx4~combout ;
+wire \soc_inst|m0_1|u_logic|S6ovx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xhxvx4~combout ;
+wire \soc_inst|m0_1|u_logic|X5gwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|D4mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|J4pvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|J4pvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|X4pvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Z1ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ahwvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C2yvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ohwvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Z3yvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ukpvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Rmpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rngwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Rmpvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wvewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H5fwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Icyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zpqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lwqvx4~0_combout ;
+wire \soc_inst|switches_1|read_enable~0_combout ;
+wire \soc_inst|switches_1|read_enable~q ;
+wire \soc_inst|interconnect_1|HRDATA[1]~37_combout ;
+wire \soc_inst|m0_1|u_logic|Evcwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Wa7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G97wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Donvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Donvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|G97wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Donvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|J3iwx4~0_combout ;
+wire \soc_inst|ram_1|memory.raddr_a[0]~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bnnvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Viy2z4~q ;
+wire \soc_inst|m0_1|u_logic|Vapvx4~combout ;
+wire \SW[2]~input_o ;
+wire \soc_inst|switches_1|switch_store[0][2]~feeder_combout ;
+wire \KEY[0]~input_o ;
+wire \soc_inst|switches_1|last_buttons[0]~1_combout ;
+wire \soc_inst|switches_1|always0~1_combout ;
+wire \soc_inst|switches_1|switch_store[0][2]~q ;
+wire \soc_inst|m0_1|u_logic|Bpzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|hsize_o~0_combout ;
+wire \soc_inst|switches_1|half_word_address~0_combout ;
+wire \soc_inst|ram_1|byte2~0_combout ;
+wire \soc_inst|interconnect_1|HRDATA[20]~7_combout ;
+wire \SW[5]~input_o ;
+wire \KEY[1]~input_o ;
+wire \soc_inst|switches_1|last_buttons[1]~0_combout ;
+wire \soc_inst|switches_1|always0~0_combout ;
+wire \soc_inst|switches_1|switch_store[1][5]~q ;
+wire \soc_inst|m0_1|u_logic|W28wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Egkwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Df3wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Df3wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Qp3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jp3wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Xiwvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Csewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|V1yvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|J5vvx4~combout ;
+wire \soc_inst|m0_1|u_logic|U5qvx4~combout ;
+wire \soc_inst|m0_1|u_logic|W0pvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Xwawx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Xwawx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xwawx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Xwawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qtrwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dplwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cllwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qsewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|P7wvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qslwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fyrwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fyrwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Surwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dghvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gvrwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|P0pvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qnkvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qnkvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Efp2z4~q ;
+wire \soc_inst|m0_1|u_logic|Cxc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kuc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vwc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Awc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Awc2z4~1_combout ;
+wire \soc_inst|switches_1|DataValid~1_combout ;
+wire \soc_inst|interconnect_1|HRDATA[1]~20_combout ;
+wire \SW[0]~input_o ;
+wire \soc_inst|switches_1|switch_store[0][0]~q ;
+wire \SW[3]~input_o ;
+wire \soc_inst|switches_1|switch_store[1][3]~q ;
+wire \soc_inst|m0_1|u_logic|Gzvvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Gzvvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gzvvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Pgnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I793z4~q ;
+wire \soc_inst|m0_1|u_logic|Fskvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|U593z4~q ;
+wire \soc_inst|m0_1|u_logic|Ut0xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oi2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cr0xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oi2wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|A4c2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zy2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jq2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nz2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fh2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xx2wx4~combout ;
+wire \soc_inst|m0_1|u_logic|It2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fh2wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Op2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fh2wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Fh2wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Fh2wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|L53wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|B73wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Hw2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|L53wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|L53wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|L53wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ey2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ru2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bt2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fh2wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Xc2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ge2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yafwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Yafwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yafwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Nkpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|J7swx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pkxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yafwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Yafwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Qllwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nqy2z4~q ;
+wire \soc_inst|m0_1|u_logic|M4fwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rjrwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mkrwx4~combout ;
+wire \soc_inst|m0_1|u_logic|J3xvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Yafwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Sjj2z4~q ;
+wire \soc_inst|m0_1|u_logic|My6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vnxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K6yvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K6yvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|K6yvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|K6yvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|K6yvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|X8kwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K6yvx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|K6yvx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|I2mwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K6yvx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Zzfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tuwvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T1xvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K6yvx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|K6yvx4~9_combout ;
+wire \soc_inst|m0_1|u_logic|K6yvx4~10_combout ;
+wire \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Qj2wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qj2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jucwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ro0xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qj2wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Fw0xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ax0xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vi2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vi2wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ge2wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ge2wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|R1d2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Keiwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Celwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Celwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fbfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fbfwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|E4iwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Enrwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|V2iwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Herwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Herwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Vb2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xr0xx4~combout ;
+wire \soc_inst|m0_1|u_logic|If2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vb2wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ob2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ob2wx4~combout ;
+wire \soc_inst|m0_1|u_logic|P3mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vhwvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vhwvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|K8wvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K8wvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|K8wvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Oowvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ejwvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R8wvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R8wvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|F9wvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|P3mvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Auk2z4~q ;
+wire \soc_inst|m0_1|u_logic|Yg2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xly2z4~q ;
+wire \soc_inst|m0_1|u_logic|D6yvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D6yvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|V8yvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D6yvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|H3d3z4~q ;
+wire \soc_inst|m0_1|u_logic|Yg2wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Xc2wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Mw1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wu1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G02wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Uwyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q77wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cuyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yyyvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Cuyvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Cuyvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Cuyvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|C1zvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Akewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M1j2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M1j2z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|M1j2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|M1j2z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|M1j2z4~q ;
+wire \soc_inst|m0_1|u_logic|G02wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Mcz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Yv1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fw1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yv1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wd13z4~q ;
+wire \soc_inst|m0_1|u_logic|If2wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|If2wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ydyvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Fn23z4~q ;
+wire \soc_inst|m0_1|u_logic|Sj62z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Pl62z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fw1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ow33z4~q ;
+wire \soc_inst|m0_1|u_logic|Mw1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|X553z4~q ;
+wire \soc_inst|m0_1|u_logic|Sj62z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ue9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wu1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ikz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wzy2z4~q ;
+wire \soc_inst|m0_1|u_logic|Meyvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Sj62z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Sj62z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Hx1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hx1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Grl2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ax1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Spl2z4~q ;
+wire \soc_inst|m0_1|u_logic|Bywwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rv1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rv1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Psu2z4~q ;
+wire \soc_inst|m0_1|u_logic|Kv1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qml2z4~q ;
+wire \soc_inst|m0_1|u_logic|Bywwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Hfyvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hfyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hfyvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Gjt2z4~q ;
+wire \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Wcyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wcyvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wcyvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Wcyvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Po73z4~q ;
+wire \soc_inst|m0_1|u_logic|Bywwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Tw1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tw1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Gf63z4~q ;
+wire \soc_inst|m0_1|u_logic|Dv1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Eol2z4~q ;
+wire \soc_inst|m0_1|u_logic|Bywwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bywwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Yonvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Shyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pmgwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ez8wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Elnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|J6i2z4~q ;
+wire \soc_inst|m0_1|u_logic|Xknvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kop2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add2~54 ;
+wire \soc_inst|m0_1|u_logic|Add2~50 ;
+wire \soc_inst|m0_1|u_logic|Add2~45_sumout ;
+wire \soc_inst|m0_1|u_logic|Bfhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mddwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Mddwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jfdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kcdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kcdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|W19wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pm9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Y29wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Kzbwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W4dwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y5dwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W4dwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|D1awx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|U2s2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|U2s2z4~q ;
+wire \soc_inst|m0_1|u_logic|Cy43z4~q ;
+wire \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Vf5wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|L763z4~q ;
+wire \soc_inst|m0_1|u_logic|To33z4~q ;
+wire \soc_inst|m0_1|u_logic|Vf5wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Kf23z4~q ;
+wire \soc_inst|m0_1|u_logic|W5s2z4~q ;
+wire \soc_inst|m0_1|u_logic|Vf5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rpe3z4~q ;
+wire \soc_inst|m0_1|u_logic|Hue3z4~q ;
+wire \soc_inst|m0_1|u_logic|Fre3z4~q ;
+wire \soc_inst|m0_1|u_logic|N71xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y21xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vf5wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|I4s2z4~q ;
+wire \soc_inst|m0_1|u_logic|Vf5wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Dq83z4~q ;
+wire \soc_inst|m0_1|u_logic|Duv2z4~q ;
+wire \soc_inst|m0_1|u_logic|Vf5wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Pu1wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Tse3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ug73z4~q ;
+wire \soc_inst|m0_1|u_logic|Cxc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Vf5wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|S61xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vf5wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Vf5wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Kzbwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|I2t2z4~q ;
+wire \soc_inst|m0_1|u_logic|Lk9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wxp2z4~q ;
+wire \soc_inst|m0_1|u_logic|C3w2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|B2uvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wfuwx4~combout ;
+wire \soc_inst|m0_1|u_logic|K7pwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Z0uvx4~combout ;
+wire \soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|H6tvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T4uvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Txtvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ab9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|A1yvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mnpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fmqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dsqvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Irqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Irqvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fmqvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hhpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gxxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ljpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xipvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Onqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yplwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vopvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fmqvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Fmqvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Rfpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rfpvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ffxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rfpvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Rfpvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Rfpvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|G27wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ae6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bkxvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Bkxvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|U9swx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S8swx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bkxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bkxvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Rfpvx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Fzl2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ejawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zgr2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Cc73z4~q ;
+wire \soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Sa23z4~q ;
+wire \soc_inst|m0_1|u_logic|Ze1wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Qc1xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z9dwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jk0xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xkfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kryvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Aj0xx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ujqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gjqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xdnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Thm2z4~q ;
+wire \soc_inst|m0_1|u_logic|G5qvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kfd2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dfd2z4~combout ;
+wire \soc_inst|m0_1|u_logic|Qobwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R29wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|E1bvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Zznvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vxnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q8rwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R7iwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fhc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zqpvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Zqpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zqpvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|P37wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wxcwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|P37wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zqpvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|K0qvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Wspvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Lqpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G4r2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|K0u2z4~q ;
+wire \soc_inst|m0_1|u_logic|T583z4~q ;
+wire \soc_inst|m0_1|u_logic|Kw63z4~q ;
+wire \soc_inst|m0_1|u_logic|Ixxwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|S2r2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|T9v2z4~q ;
+wire \soc_inst|m0_1|u_logic|E1r2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ka93z4~q ;
+wire \soc_inst|m0_1|u_logic|Ixxwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ixxwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Svxwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vy7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S1ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W6iwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Tecwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Z4bwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Z4bwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I4dwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Afcwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ydcwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q ;
+wire \soc_inst|interconnect_1|HRDATA[8]~5_combout ;
+wire \soc_inst|interconnect_1|HRDATA[7]~9_combout ;
+wire \soc_inst|interconnect_1|HRDATA[7]~10_combout ;
+wire \SW[4]~input_o ;
+wire \soc_inst|switches_1|switch_store[0][4]~q ;
+wire \soc_inst|interconnect_1|HRDATA[4]~23_combout ;
+wire \soc_inst|m0_1|u_logic|Mis2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T2owx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qwowx4~combout ;
+wire \soc_inst|m0_1|u_logic|Vytvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Mis2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ts5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D9ovx4~combout ;
+wire \soc_inst|m0_1|u_logic|R1w2z4~q ;
+wire \soc_inst|m0_1|u_logic|Trq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ijcwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C8rwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|V9iwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lcowx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G0w2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qppvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Muawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|U09wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Otcwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fuawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fuawx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Lz8wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qppvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|D31wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ixh3z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Ixh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Tvh3z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Tvh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Nn0wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|G123z4~q ;
+wire \soc_inst|m0_1|u_logic|Ecp2z4~q ;
+wire \soc_inst|m0_1|u_logic|Nn0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M0i3z4~q ;
+wire \soc_inst|m0_1|u_logic|Nr2xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Fjlwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wai2z4~q ;
+wire \soc_inst|m0_1|u_logic|Glj2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Glj2z4~q ;
+wire \soc_inst|m0_1|u_logic|O3ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O3ivx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|V1l2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ta1xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|U71xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nd3wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|T253z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ld1xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sd1xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nd3wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Lpu2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Cgt2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Nd3wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Ll73z4~q ;
+wire \soc_inst|m0_1|u_logic|X2j2z4~q ;
+wire \soc_inst|m0_1|u_logic|Xti2z4~q ;
+wire \soc_inst|m0_1|u_logic|Nd3wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Nd3wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Pfz2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ehz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Yd03z4~q ;
+wire \soc_inst|m0_1|u_logic|Nd3wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Koj2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Koj2z4~q ;
+wire \soc_inst|m0_1|u_logic|Kt33z4~q ;
+wire \soc_inst|m0_1|u_logic|V41xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ab1xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nd3wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Sa13z4~q ;
+wire \soc_inst|m0_1|u_logic|Jc1xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y91xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Isi2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Nd3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nd3wx4~combout ;
+wire \soc_inst|m0_1|u_logic|H9iwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S8ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H9iwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Djywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lstwx4~0_combout ;
+wire \SW[7]~input_o ;
+wire \soc_inst|switches_1|switch_store[0][7]~q ;
+wire \soc_inst|ram_1|data_to_memory[7]~4_combout ;
+wire \soc_inst|ram_1|memory.raddr_a[6]~6_combout ;
+wire \soc_inst|ram_1|memory.raddr_a[7]~7_combout ;
+wire \soc_inst|ram_1|memory.raddr_a[8]~8_combout ;
+wire \soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add3~46 ;
+wire \soc_inst|m0_1|u_logic|Add3~42 ;
+wire \soc_inst|m0_1|u_logic|Add3~38 ;
+wire \soc_inst|m0_1|u_logic|Add3~81_sumout ;
+wire \soc_inst|m0_1|u_logic|Wzivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wce3z4~q ;
+wire \soc_inst|m0_1|u_logic|Hvivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rkd3z4~q ;
+wire \soc_inst|m0_1|u_logic|R99wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lsd3z4~q ;
+wire \soc_inst|m0_1|u_logic|Tyd3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Pvd3z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Pvd3z4~q ;
+wire \soc_inst|m0_1|u_logic|Gm1wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Aud3z4~q ;
+wire \soc_inst|m0_1|u_logic|Gm1wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Gm1wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Snd3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hpd3z4~q ;
+wire \soc_inst|m0_1|u_logic|Gm1wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|F8e3z4~q ;
+wire \soc_inst|m0_1|u_logic|Q6e3z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Q6e3z4~q ;
+wire \soc_inst|m0_1|u_logic|Gm1wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Wqd3z4~q ;
+wire \soc_inst|m0_1|u_logic|Exd3z4~q ;
+wire \soc_inst|m0_1|u_logic|Gm1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uo5xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I0e3z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|I0e3z4~q ;
+wire \soc_inst|m0_1|u_logic|X1e3z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|X1e3z4~q ;
+wire \soc_inst|m0_1|u_logic|Gm1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|M3e3z4~q ;
+wire \soc_inst|m0_1|u_logic|Gm1wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Gm1wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|R99wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xk1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xk1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gm1wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Aj1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|S3cwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rds2z4~q ;
+wire \soc_inst|m0_1|u_logic|D432z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oas2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hc23z4~q ;
+wire \soc_inst|m0_1|u_logic|Zh5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ql33z4~q ;
+wire \soc_inst|m0_1|u_logic|I463z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Zh5wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|B613z4~q ;
+wire \soc_inst|m0_1|u_logic|H903z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Zh5wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Z8s2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Z8s2z4~q ;
+wire \soc_inst|m0_1|u_logic|Zh5wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|K7s2z4~q ;
+wire \soc_inst|m0_1|u_logic|Zu43z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Zu43z4~q ;
+wire \soc_inst|m0_1|u_logic|Zh5wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Zh5wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Zh5wx4~9_combout ;
+wire \soc_inst|m0_1|u_logic|Do1wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Do1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Do1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~114 ;
+wire \soc_inst|m0_1|u_logic|Add5~105_sumout ;
+wire \soc_inst|m0_1|u_logic|Glnwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Pn1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Arv2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rhu2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Zh5wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|An83z4~q ;
+wire \soc_inst|m0_1|u_logic|Rd73z4~q ;
+wire \soc_inst|m0_1|u_logic|Gt93z4~q ;
+wire \soc_inst|m0_1|u_logic|Zh5wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Zh5wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|S3cwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~106 ;
+wire \soc_inst|m0_1|u_logic|Add5~45_sumout ;
+wire \soc_inst|m0_1|u_logic|Aj1wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Nlnwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ecowx4~combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout ;
+wire \soc_inst|m0_1|u_logic|C5ovx4~combout ;
+wire \soc_inst|m0_1|u_logic|L8m2z4~q ;
+wire \soc_inst|m0_1|u_logic|G6owx4~combout ;
+wire \soc_inst|m0_1|u_logic|Rilwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|A5uvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T5tvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Tna3z4~q ;
+wire \soc_inst|m0_1|u_logic|Aea3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Aea3z4~q ;
+wire \soc_inst|m0_1|u_logic|Nfb3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nfb3z4~q ;
+wire \soc_inst|m0_1|u_logic|Taa3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Taa3z4~q ;
+wire \soc_inst|m0_1|u_logic|Gza3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~94_cout ;
+wire \soc_inst|m0_1|u_logic|Add0~33_sumout ;
+wire \soc_inst|m0_1|u_logic|C4b3z4~q ;
+wire \soc_inst|m0_1|u_logic|Qfa3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qfa3z4~q ;
+wire \soc_inst|m0_1|u_logic|Xsmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add0~34 ;
+wire \soc_inst|m0_1|u_logic|Add0~21_sumout ;
+wire \soc_inst|m0_1|u_logic|Gha3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gha3z4~q ;
+wire \soc_inst|m0_1|u_logic|Qsmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M2b3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~22 ;
+wire \soc_inst|m0_1|u_logic|Add0~57_sumout ;
+wire \soc_inst|m0_1|u_logic|W0b3z4~q ;
+wire \soc_inst|m0_1|u_logic|hwdata_o~20_combout ;
+wire \soc_inst|m0_1|u_logic|Wia3z4~q ;
+wire \soc_inst|m0_1|u_logic|Jsmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W0b3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add0~58 ;
+wire \soc_inst|m0_1|u_logic|Add0~41_sumout ;
+wire \soc_inst|m0_1|u_logic|Csmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add0~42 ;
+wire \soc_inst|m0_1|u_logic|Add0~65_sumout ;
+wire \soc_inst|m0_1|u_logic|Mka3z4~q ;
+wire \soc_inst|m0_1|u_logic|Vrmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qxa3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~66 ;
+wire \soc_inst|m0_1|u_logic|Add0~89_sumout ;
+wire \soc_inst|m0_1|u_logic|Qtzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oszvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Luzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Luzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Omyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Omyvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Pcd3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pcd3z4~q ;
+wire \soc_inst|m0_1|u_logic|Rsa3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|U5a3z4~q ;
+wire \soc_inst|m0_1|u_logic|M5tvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Txa2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yz4wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Zyhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rym2z4~q ;
+wire \soc_inst|m0_1|u_logic|Zyovx4~combout ;
+wire \soc_inst|m0_1|u_logic|Tqc3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tqc3z4~q ;
+wire \soc_inst|m0_1|u_logic|M1pwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kss2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|E0uvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Qztvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Kss2z4~q ;
+wire \soc_inst|m0_1|u_logic|M1pwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M1pwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|M1pwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|M1pwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Nl43z4~q ;
+wire \soc_inst|m0_1|u_logic|Arn2z4~q ;
+wire \soc_inst|m0_1|u_logic|St0wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|K103z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|K103z4~q ;
+wire \soc_inst|m0_1|u_logic|Ey03z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Ey03z4~q ;
+wire \soc_inst|m0_1|u_logic|St0wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|V223z4~q ;
+wire \soc_inst|m0_1|u_logic|Eun2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Eun2z4~q ;
+wire \soc_inst|m0_1|u_logic|St0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ixn2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Jq1xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Psn2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|S2r2z4~q ;
+wire \soc_inst|m0_1|u_logic|Bdwwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|E1r2z4~q ;
+wire \soc_inst|m0_1|u_logic|Bdwwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|G4r2z4~q ;
+wire \soc_inst|m0_1|u_logic|Bdwwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bdwwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Bdwwx4~combout ;
+wire \soc_inst|m0_1|u_logic|I30wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|K4mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K4mvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Jw93z4~q ;
+wire \soc_inst|m0_1|u_logic|X6m2z4~q ;
+wire \soc_inst|m0_1|u_logic|Gf43z4~q ;
+wire \soc_inst|m0_1|u_logic|Po53z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|D7bwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X533z4~q ;
+wire \soc_inst|m0_1|u_logic|Ow13z4~q ;
+wire \soc_inst|m0_1|u_logic|D7bwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|J5m2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|J5m2z4~q ;
+wire \soc_inst|m0_1|u_logic|A9bwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bv03z4~q ;
+wire \soc_inst|m0_1|u_logic|Hyz2z4~q ;
+wire \soc_inst|m0_1|u_logic|D7bwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|D7bwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Aqnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O2bwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I30wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|If33z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ay53z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|W21wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|S6nwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Imnwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Qs7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qs7wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|F8iwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pmnwx4~combout ;
+wire \soc_inst|m0_1|u_logic|E5awx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add2~74 ;
+wire \soc_inst|m0_1|u_logic|Add2~70 ;
+wire \soc_inst|m0_1|u_logic|Add2~65_sumout ;
+wire \soc_inst|m0_1|u_logic|Ldhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M9awx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Vgg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Hk0wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Eyg3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Xi2xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Olg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Wrg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Hk0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sog3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ccg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Nag3z4~q ;
+wire \soc_inst|m0_1|u_logic|Dng3z4~q ;
+wire \soc_inst|m0_1|u_logic|Dmvwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hqg3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Gfg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Rdg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Dmvwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Dmvwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Kig3z4~q ;
+wire \soc_inst|m0_1|u_logic|Xu82z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Avg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ltg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Xu82z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Eyg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Zjg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Xu82z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Uw82z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xu82z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Fj0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sknwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sknwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Yilwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sknwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Zetwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Xuxwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Mouwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T2owx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add3~82 ;
+wire \soc_inst|m0_1|u_logic|Add3~77_sumout ;
+wire \soc_inst|m0_1|u_logic|M413z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|S703z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|S703z4~q ;
+wire \soc_inst|m0_1|u_logic|U9a2z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Zgr2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rba2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bk33z4~q ;
+wire \soc_inst|m0_1|u_logic|U9a2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kt43z4~q ;
+wire \soc_inst|m0_1|u_logic|T263z4~q ;
+wire \soc_inst|m0_1|u_logic|U9a2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|U9a2z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ll83z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Cgu2z4~q ;
+wire \soc_inst|m0_1|u_logic|H2wwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Kfr2z4~q ;
+wire \soc_inst|m0_1|u_logic|H2wwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vdr2z4~q ;
+wire \soc_inst|m0_1|u_logic|Lpv2z4~q ;
+wire \soc_inst|m0_1|u_logic|H2wwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Rr93z4~q ;
+wire \soc_inst|m0_1|u_logic|Gcr2z4~q ;
+wire \soc_inst|m0_1|u_logic|H2wwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|H2wwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Pg1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cqovx4~combout ;
+wire \soc_inst|ram_1|memory.raddr_a[10]~10_combout ;
+wire \soc_inst|m0_1|u_logic|Add3~78 ;
+wire \soc_inst|m0_1|u_logic|Add3~105_sumout ;
+wire \soc_inst|m0_1|u_logic|Z0g3z4~q ;
+wire \soc_inst|m0_1|u_logic|Hnr2z4~q ;
+wire \soc_inst|m0_1|u_logic|Na73z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hc1wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|D923z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Mi33z4~q ;
+wire \soc_inst|m0_1|u_logic|Wj83z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Wj83z4~q ;
+wire \soc_inst|m0_1|u_logic|Hc1wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Hc1wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|O2g3z4~q ;
+wire \soc_inst|m0_1|u_logic|X94xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kzf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Wnv2z4~q ;
+wire \soc_inst|m0_1|u_logic|Hc1wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Vxf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Vr43z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hc1wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Lqr2z4~q ;
+wire \soc_inst|m0_1|u_logic|Neu2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hc1wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|E163z4~q ;
+wire \soc_inst|m0_1|u_logic|Cq93z4~q ;
+wire \soc_inst|m0_1|u_logic|Hc1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wor2z4~q ;
+wire \soc_inst|m0_1|u_logic|Hc1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hc1wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Hc1wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ciawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ciawx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|B91wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~46 ;
+wire \soc_inst|m0_1|u_logic|Add5~14 ;
+wire \soc_inst|m0_1|u_logic|Add5~17_sumout ;
+wire \soc_inst|m0_1|u_logic|B91wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ya1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ya1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B91wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vr43z4~q ;
+wire \soc_inst|m0_1|u_logic|I3a2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I3a2z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|D923z4~q ;
+wire \soc_inst|m0_1|u_logic|I3a2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Z0g3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|F5a2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I3a2z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Wor2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Zkuwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Na73z4~q ;
+wire \soc_inst|m0_1|u_logic|Zkuwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hnr2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Zkuwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Neu2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wj83z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Zkuwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Zkuwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ra1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|haddr_o~5_combout ;
+wire \soc_inst|ram_1|memory.raddr_a[11]~11_combout ;
+wire \soc_inst|ram_1|byte3~0_combout ;
+wire \soc_inst|m0_1|u_logic|O3awx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kih2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ehcwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rmawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mdzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ducvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Whh2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wqm2z4~q ;
+wire \soc_inst|m0_1|u_logic|R6v2z4~q ;
+wire \soc_inst|m0_1|u_logic|Svqwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ixt2z4~q ;
+wire \soc_inst|m0_1|u_logic|R283z4~q ;
+wire \soc_inst|m0_1|u_logic|Svqwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ksm2z4~q ;
+wire \soc_inst|m0_1|u_logic|It63z4~q ;
+wire \soc_inst|m0_1|u_logic|Svqwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G493z4~q ;
+wire \soc_inst|m0_1|u_logic|Ipm2z4~q ;
+wire \soc_inst|m0_1|u_logic|Svqwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Svqwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Wyt2z4~q ;
+wire \soc_inst|m0_1|u_logic|F483z4~q ;
+wire \soc_inst|m0_1|u_logic|Qxuwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Gip2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Gip2z4~q ;
+wire \soc_inst|m0_1|u_logic|F8v2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qxuwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|W893z4~q ;
+wire \soc_inst|m0_1|u_logic|Sgp2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qxuwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wu63z4~q ;
+wire \soc_inst|m0_1|u_logic|Ujp2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qxuwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qxuwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Rw7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rw7wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Otr2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Rvv2z4~q ;
+wire \soc_inst|m0_1|u_logic|Lr9wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Asr2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qyc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Lr9wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Imu2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rr83z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Lr9wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ii73z4~q ;
+wire \soc_inst|m0_1|u_logic|Cvr2z4~q ;
+wire \soc_inst|m0_1|u_logic|Lr9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lr9wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Fkdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rhu2z4~q ;
+wire \soc_inst|m0_1|u_logic|An83z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Pjqwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Pjqwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Z8s2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Pjqwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Oas2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pjqwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pjqwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Nodwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nodwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|I7owx4~combout ;
+wire \soc_inst|m0_1|u_logic|I2twx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qfc3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qfc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Pguvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y1ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hub3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ihlwx4~0_combout ;
+wire \soc_inst|switches_1|switch_store[0][3]~q ;
+wire \soc_inst|ram_1|data_to_memory[3]~20_combout ;
+wire \soc_inst|m0_1|u_logic|Ny3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Knvvx4~0_combout ;
+wire \soc_inst|ram_1|data_to_memory[27]~19_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ;
+wire \soc_inst|interconnect_1|HRDATA[3]~26_combout ;
+wire \soc_inst|m0_1|u_logic|Ihlwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ihlwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ihlwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Qfzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qfzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hrcvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Qdtwx4~combout ;
+wire \soc_inst|m0_1|u_logic|C3z2z4~q ;
+wire \soc_inst|m0_1|u_logic|T7cwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Phlwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T31xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C5v2z4~q ;
+wire \soc_inst|m0_1|u_logic|Tvt2z4~q ;
+wire \soc_inst|m0_1|u_logic|R91xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Eacwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C183z4~q ;
+wire \soc_inst|m0_1|u_logic|Joi3z4~q ;
+wire \soc_inst|m0_1|u_logic|Umi3z4~q ;
+wire \soc_inst|m0_1|u_logic|Tr63z4~q ;
+wire \soc_inst|m0_1|u_logic|Eacwx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Eacwx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Vmj2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Vmj2z4~q ;
+wire \soc_inst|m0_1|u_logic|Eacwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Jq13z4~q ;
+wire \soc_inst|m0_1|u_logic|F9j2z4~q ;
+wire \soc_inst|m0_1|u_logic|Eacwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|B943z4~q ;
+wire \soc_inst|m0_1|u_logic|Zpj2z4~q ;
+wire \soc_inst|m0_1|u_logic|Eacwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Sz23z4~q ;
+wire \soc_inst|m0_1|u_logic|Ki53z4~q ;
+wire \soc_inst|m0_1|u_logic|Eacwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Qji3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Fli3z4~q ;
+wire \soc_inst|m0_1|u_logic|Eacwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Eacwx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Eacwx4~9_combout ;
+wire \soc_inst|m0_1|u_logic|Rih2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add3~62 ;
+wire \soc_inst|m0_1|u_logic|Add3~58 ;
+wire \soc_inst|m0_1|u_logic|Add3~102 ;
+wire \soc_inst|m0_1|u_logic|Add3~113_sumout ;
+wire \soc_inst|m0_1|u_logic|Y92wx4~combout ;
+wire \soc_inst|m0_1|u_logic|B6j2z4~q ;
+wire \soc_inst|m0_1|u_logic|K8ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B6j2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Qji3z4~q ;
+wire \soc_inst|m0_1|u_logic|P582z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|P582z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|P582z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M782z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|P582z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Gtnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q9cwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ancvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Add5~126 ;
+wire \soc_inst|m0_1|u_logic|Add5~121_sumout ;
+wire \soc_inst|m0_1|u_logic|Yqzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R3uvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rbmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|V3o2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Owgvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ywi2z4~q ;
+wire \soc_inst|m0_1|u_logic|Q6mwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R6n2z4~q ;
+wire \soc_inst|m0_1|u_logic|T83xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dq53z4~q ;
+wire \soc_inst|m0_1|u_logic|L733z4~q ;
+wire \soc_inst|m0_1|u_logic|Wa0wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ug43z4~q ;
+wire \soc_inst|m0_1|u_logic|J0n2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|J0n2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wa0wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Pw03z4~q ;
+wire \soc_inst|m0_1|u_logic|Vzz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wa0wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Y1n2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wa0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Cy13z4~q ;
+wire \soc_inst|m0_1|u_logic|N3n2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wa0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wa0wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Wa0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ;
+wire \soc_inst|m0_1|u_logic|K3uvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W2uvx4~combout ;
+wire \soc_inst|m0_1|u_logic|X9n2z4~q ;
+wire \soc_inst|m0_1|u_logic|Yhnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add2~114 ;
+wire \soc_inst|m0_1|u_logic|Add2~78 ;
+wire \soc_inst|m0_1|u_logic|Add2~30 ;
+wire \soc_inst|m0_1|u_logic|Add2~22 ;
+wire \soc_inst|m0_1|u_logic|Add2~10 ;
+wire \soc_inst|m0_1|u_logic|Add2~13_sumout ;
+wire \soc_inst|m0_1|u_logic|Mhhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mhhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Mhhvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Vvx2z4~q ;
+wire \soc_inst|m0_1|u_logic|Yhnvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Cqo2z4~q ;
+wire \soc_inst|m0_1|u_logic|Dq73z4~q ;
+wire \soc_inst|m0_1|u_logic|Duuwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ruj2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ug63z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Duuwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Fwj2z4~q ;
+wire \soc_inst|m0_1|u_logic|Duuwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Duu2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Dtj2z4~q ;
+wire \soc_inst|m0_1|u_logic|Duuwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Duuwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Rvu2z4~q ;
+wire \soc_inst|m0_1|u_logic|Cawwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Unm2z4~q ;
+wire \soc_inst|m0_1|u_logic|Gmm2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Gmm2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Cawwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ii63z4~q ;
+wire \soc_inst|m0_1|u_logic|Skm2z4~q ;
+wire \soc_inst|m0_1|u_logic|Cawwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Imt2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Rr73z4~q ;
+wire \soc_inst|m0_1|u_logic|Cawwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Cawwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Jiowx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gto2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Fxu2z4~q ;
+wire \soc_inst|m0_1|u_logic|Saqwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Uu83z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Rro2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Rro2z4~q ;
+wire \soc_inst|m0_1|u_logic|Saqwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wnt2z4~q ;
+wire \soc_inst|m0_1|u_logic|Saqwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Wj63z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Wj63z4~q ;
+wire \soc_inst|m0_1|u_logic|Vuo2z4~q ;
+wire \soc_inst|m0_1|u_logic|Saqwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Saqwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Kepwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kepwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qmdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xmdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xmdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|J7ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|I2uvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B1a3z4~q ;
+wire \soc_inst|m0_1|u_logic|Repwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jxs2z4~q ;
+wire \soc_inst|m0_1|u_logic|Aqp2z4~q ;
+wire \soc_inst|m0_1|u_logic|Repwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Lns2z4~q ;
+wire \soc_inst|m0_1|u_logic|L0uvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Q6l2z4~q ;
+wire \soc_inst|m0_1|u_logic|Repwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ncpwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|A9iwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mof3z4~q ;
+wire \soc_inst|m0_1|u_logic|Xmf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Icxwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Bqf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ldf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Icxwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Aff3z4~q ;
+wire \soc_inst|m0_1|u_logic|Icxwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wbf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Orj2z4~q ;
+wire \soc_inst|m0_1|u_logic|Icxwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Icxwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Md93z4~q ;
+wire \soc_inst|m0_1|u_logic|G4qwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Vcv2z4~q ;
+wire \soc_inst|m0_1|u_logic|G4qwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Mz63z4~q ;
+wire \soc_inst|m0_1|u_logic|G4qwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M3u2z4~q ;
+wire \soc_inst|m0_1|u_logic|G4qwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|G4qwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Asdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nvdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Asdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Lpt2z4~q ;
+wire \soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Eruwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Jw83z4~q ;
+wire \soc_inst|m0_1|u_logic|Fio2z4~q ;
+wire \soc_inst|m0_1|u_logic|Eruwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ujo2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Ujo2z4~q ;
+wire \soc_inst|m0_1|u_logic|Uyu2z4~q ;
+wire \soc_inst|m0_1|u_logic|Eruwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ll63z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Ll63z4~q ;
+wire \soc_inst|m0_1|u_logic|Jlo2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Eruwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Eruwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Kjk2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Zkk2z4~q ;
+wire \soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|F8wwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rht2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rd63z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Rd63z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|An73z4~q ;
+wire \soc_inst|m0_1|u_logic|F8wwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|F8wwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Beowx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|V0k2z4~q ;
+wire \soc_inst|m0_1|u_logic|K2k2z4~q ;
+wire \soc_inst|m0_1|u_logic|Y1v2z4~q ;
+wire \soc_inst|m0_1|u_logic|Nz83z4~q ;
+wire \soc_inst|m0_1|u_logic|Feqwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pst2z4~q ;
+wire \soc_inst|m0_1|u_logic|Z3k2z4~q ;
+wire \soc_inst|m0_1|u_logic|Po63z4~q ;
+wire \soc_inst|m0_1|u_logic|Yx73z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Feqwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Feqwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Vgq2z4~q ;
+wire \soc_inst|m0_1|u_logic|J0v2z4~q ;
+wire \soc_inst|m0_1|u_logic|Yx83z4~q ;
+wire \soc_inst|m0_1|u_logic|Fexwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kiq2z4~q ;
+wire \soc_inst|m0_1|u_logic|An63z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Art2z4~q ;
+wire \soc_inst|m0_1|u_logic|Jw73z4~q ;
+wire \soc_inst|m0_1|u_logic|Fexwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fexwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Zudwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zudwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Bus2z4~q ;
+wire \soc_inst|m0_1|u_logic|Avowx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G8n2z4~q ;
+wire \soc_inst|m0_1|u_logic|Dks2z4~q ;
+wire \soc_inst|m0_1|u_logic|Avowx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Avowx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ddi3z4~q ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout ;
+wire \soc_inst|m0_1|u_logic|I1h3z4~q ;
+wire \soc_inst|m0_1|u_logic|F473z4~q ;
+wire \soc_inst|m0_1|u_logic|Fi93z4~q ;
+wire \soc_inst|m0_1|u_logic|St0wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Tvn2z4~q ;
+wire \soc_inst|m0_1|u_logic|Od83z4~q ;
+wire \soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ohv2z4~q ;
+wire \soc_inst|m0_1|u_logic|St0wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|St0wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|St0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout ;
+wire \soc_inst|m0_1|u_logic|Xyn2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~2 ;
+wire \soc_inst|m0_1|u_logic|Add0~73_sumout ;
+wire \soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Sg83z4~q ;
+wire \soc_inst|m0_1|u_logic|Z52xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cao2z4~q ;
+wire \soc_inst|m0_1|u_logic|J773z4~q ;
+wire \soc_inst|m0_1|u_logic|Jl93z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|W21wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|W21wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|W21wx4~combout ;
+wire \soc_inst|m0_1|u_logic|O24wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gdo2z4~q ;
+wire \soc_inst|m0_1|u_logic|Womvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xeo2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~74 ;
+wire \soc_inst|m0_1|u_logic|Add0~29_sumout ;
+wire \soc_inst|m0_1|u_logic|Add3~85_sumout ;
+wire \soc_inst|m0_1|u_logic|Gdawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K423z4~q ;
+wire \soc_inst|m0_1|u_logic|Ozo2z4~q ;
+wire \soc_inst|m0_1|u_logic|Yw0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S2p2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|M92xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lw53z4~q ;
+wire \soc_inst|m0_1|u_logic|Td33z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Yw0wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Tz03z4~q ;
+wire \soc_inst|m0_1|u_logic|Z203z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Z203z4~q ;
+wire \soc_inst|m0_1|u_logic|Yw0wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Zxo2z4~q ;
+wire \soc_inst|m0_1|u_logic|Yw0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Cn43z4~q ;
+wire \soc_inst|m0_1|u_logic|Kwo2z4~q ;
+wire \soc_inst|m0_1|u_logic|Yw0wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Yw0wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Gdawx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add3~93_sumout ;
+wire \soc_inst|m0_1|u_logic|Add3~106 ;
+wire \soc_inst|m0_1|u_logic|Add3~97_sumout ;
+wire \soc_inst|m0_1|u_logic|haddr_o~4_combout ;
+wire \soc_inst|m0_1|u_logic|Pdjvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|J7q2z4~q ;
+wire \soc_inst|m0_1|u_logic|Psh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Mi23z4~q ;
+wire \soc_inst|m0_1|u_logic|Ft83z4~q ;
+wire \soc_inst|m0_1|u_logic|Vr33z4~q ;
+wire \soc_inst|m0_1|u_logic|Z62wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Naq2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Wj73z4~q ;
+wire \soc_inst|m0_1|u_logic|Z62wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Z62wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Fxv2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Arh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Z62wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Wnu2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rdq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Z62wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Na63z4~q ;
+wire \soc_inst|m0_1|u_logic|Z62wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|E153z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Lph3z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Lph3z4~q ;
+wire \soc_inst|m0_1|u_logic|Z62wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Euh3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|T04xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ccq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Z62wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z62wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Z62wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ns9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ns9wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|N72wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mgawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|J61wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|J61wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O51wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M41wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wqd3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ai9wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Snd3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ai9wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|B5e3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ai9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I0e3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ai9wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ai9wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Sndwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C0ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sndwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Tkdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Godwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tkdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|J9d3z4~q ;
+wire \soc_inst|m0_1|u_logic|Xdb3z4~q ;
+wire \soc_inst|m0_1|u_logic|J7b3z4~q ;
+wire \soc_inst|m0_1|u_logic|Gcb3z4~q ;
+wire \soc_inst|m0_1|u_logic|Pab3z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Pab3z4~q ;
+wire \soc_inst|m0_1|u_logic|Jkc3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jkc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Jruvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|D1ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F4c3z4~q ;
+wire \soc_inst|m0_1|u_logic|Wkpwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wkpwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wkpwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Wkpwx4~3_combout ;
+wire \SW[6]~input_o ;
+wire \soc_inst|switches_1|switch_store[0][6]~feeder_combout ;
+wire \soc_inst|switches_1|switch_store[0][6]~q ;
+wire \soc_inst|interconnect_1|HRDATA[6]~36_combout ;
+wire \soc_inst|m0_1|u_logic|O9iwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O9iwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|X61wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X61wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|M41wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Y873z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Y873z4~q ;
+wire \soc_inst|m0_1|u_logic|F4q2z4~q ;
+wire \soc_inst|m0_1|u_logic|O723z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|O723z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Gq43z4~q ;
+wire \soc_inst|m0_1|u_logic|S71wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Pz53z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Pz53z4~q ;
+wire \soc_inst|m0_1|u_logic|S71wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|S71wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Mgawx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~18 ;
+wire \soc_inst|m0_1|u_logic|Add5~62 ;
+wire \soc_inst|m0_1|u_logic|Add5~65_sumout ;
+wire \soc_inst|m0_1|u_logic|Q52wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q52wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|E0d3z4~q ;
+wire \soc_inst|m0_1|u_logic|Naq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ey9wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ey9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ey9wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Fxv2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ccq2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ey9wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ey9wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Euh3z4~q ;
+wire \soc_inst|m0_1|u_logic|E153z4~q ;
+wire \soc_inst|m0_1|u_logic|Na63z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Du9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Du9wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Aw9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Du9wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Du9wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|P82wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|haddr_o~3_combout ;
+wire \soc_inst|m0_1|u_logic|Zcivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y8q2z4~q ;
+wire \soc_inst|m0_1|u_logic|If33z4~q ;
+wire \soc_inst|m0_1|u_logic|Z523z4~q ;
+wire \soc_inst|m0_1|u_logic|Kq92z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rbo2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ay53z4~q ;
+wire \soc_inst|m0_1|u_logic|Ro43z4~q ;
+wire \soc_inst|m0_1|u_logic|Kq92z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O403z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|I113z4~q ;
+wire \soc_inst|m0_1|u_logic|Kq92z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Hs92z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kq92z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|U11wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~66 ;
+wire \soc_inst|m0_1|u_logic|Add5~70 ;
+wire \soc_inst|m0_1|u_logic|Add5~73_sumout ;
+wire \soc_inst|m0_1|u_logic|Bv0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Tmjvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H4p2z4~q ;
+wire \soc_inst|m0_1|u_logic|U9u2z4~q ;
+wire \soc_inst|m0_1|u_logic|Df83z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|U573z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Xcuwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kwo2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Djv2z4~q ;
+wire \soc_inst|m0_1|u_logic|Uj93z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Xcuwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xcuwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Yj92z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S2p2z4~q ;
+wire \soc_inst|m0_1|u_logic|D1p2z4~q ;
+wire \soc_inst|m0_1|u_logic|Vl92z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K423z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Td33z4~q ;
+wire \soc_inst|m0_1|u_logic|Yj92z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Yj92z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Yj92z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Hy0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fx0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Iv0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Iv0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Df83z4~q ;
+wire \soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Yw0wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Uj93z4~q ;
+wire \soc_inst|m0_1|u_logic|U573z4~q ;
+wire \soc_inst|m0_1|u_logic|Yw0wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Yw0wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Yw0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout ;
+wire \soc_inst|m0_1|u_logic|B2i3z4~q ;
+wire \soc_inst|m0_1|u_logic|Pomvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S3i3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~30 ;
+wire \soc_inst|m0_1|u_logic|Add0~17_sumout ;
+wire \soc_inst|m0_1|u_logic|Iomvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O0o2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~18 ;
+wire \soc_inst|m0_1|u_logic|Add0~54 ;
+wire \soc_inst|m0_1|u_logic|Add0~45_sumout ;
+wire \soc_inst|m0_1|u_logic|Unmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z2h3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~46 ;
+wire \soc_inst|m0_1|u_logic|Add0~69_sumout ;
+wire \soc_inst|m0_1|u_logic|Llq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Poq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ce0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rz13z4~q ;
+wire \soc_inst|m0_1|u_logic|Eqq2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ce0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ji43z4~q ;
+wire \soc_inst|m0_1|u_logic|Anq2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ce0wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Tch3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|D03xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|A933z4~q ;
+wire \soc_inst|m0_1|u_logic|Sr53z4~q ;
+wire \soc_inst|m0_1|u_logic|Ce0wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|P9h3z4~q ;
+wire \soc_inst|m0_1|u_logic|A8h3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ce0wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Ce0wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|B5u2z4~q ;
+wire \soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ce0wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Ka83z4~q ;
+wire \soc_inst|m0_1|u_logic|B173z4~q ;
+wire \soc_inst|m0_1|u_logic|Bf93z4~q ;
+wire \soc_inst|m0_1|u_logic|Ce0wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Ebh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ce0wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Ce0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout ;
+wire \soc_inst|m0_1|u_logic|Ieh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Nnmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ogo2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~70 ;
+wire \soc_inst|m0_1|u_logic|Add0~85_sumout ;
+wire \soc_inst|m0_1|u_logic|Cma3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cma3z4~q ;
+wire \soc_inst|m0_1|u_logic|Gnmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ddi3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Y7iwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y7iwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Y7iwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|E9zvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|E9zvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|E1ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|E1ewx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kqdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wwdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Z78wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ycu2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Ycu2z4~q ;
+wire \soc_inst|m0_1|u_logic|Hi83z4~q ;
+wire \soc_inst|m0_1|u_logic|Hmqwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|B1q2z4~q ;
+wire \soc_inst|m0_1|u_logic|Hmv2z4~q ;
+wire \soc_inst|m0_1|u_logic|Hmqwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hmqwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mzp2z4~q ;
+wire \soc_inst|m0_1|u_logic|No93z4~q ;
+wire \soc_inst|m0_1|u_logic|Hmqwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hmqwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Mydwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C0ewx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zndwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vzdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vzdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zndwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Djdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wwdwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Mydwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Yxdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|D9uwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Anq2z4~q ;
+wire \soc_inst|m0_1|u_logic|D9uwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kev2z4~q ;
+wire \soc_inst|m0_1|u_logic|D9uwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Eqq2z4~q ;
+wire \soc_inst|m0_1|u_logic|D9uwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D9uwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Qtdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qtdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Tq7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Godwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|S08wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wwdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z78wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Z78wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Qmdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Djdwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Widwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jiowx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|B28wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fkdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fq7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Djdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Djdwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Z78wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Nvdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Uvdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kqdwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Dqdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xtdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xtdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kqdwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|U18wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yvtwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fwtwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xs7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xs7wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kqdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Z78wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Z78wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Beowx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Q7ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q7ewx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kvtwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Gftwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kw7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kw7wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Iutwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cuxwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hr7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X7ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|A6ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gftwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|F5ewx4~combout ;
+wire \soc_inst|m0_1|u_logic|W3ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W3ewx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Z78wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Wpcvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Nz73z4~q ;
+wire \soc_inst|m0_1|u_logic|Igl2z4~q ;
+wire \soc_inst|m0_1|u_logic|C193z4~q ;
+wire \soc_inst|m0_1|u_logic|Eq63z4~q ;
+wire \soc_inst|m0_1|u_logic|Kqzvx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Eut2z4~q ;
+wire \soc_inst|m0_1|u_logic|Kqzvx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Kqzvx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Edl2z4~q ;
+wire \soc_inst|m0_1|u_logic|Kqzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|M743z4~q ;
+wire \soc_inst|m0_1|u_logic|Pbl2z4~q ;
+wire \soc_inst|m0_1|u_logic|Kqzvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Vg53z4~q ;
+wire \soc_inst|m0_1|u_logic|Dy23z4~q ;
+wire \soc_inst|m0_1|u_logic|Kqzvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Csz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Xhl2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wo03z4~q ;
+wire \soc_inst|m0_1|u_logic|Kqzvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Tel2z4~q ;
+wire \soc_inst|m0_1|u_logic|Uo13z4~q ;
+wire \soc_inst|m0_1|u_logic|Kqzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kqzvx4~combout ;
+wire \soc_inst|m0_1|u_logic|J4awx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~122 ;
+wire \soc_inst|m0_1|u_logic|Add5~58 ;
+wire \soc_inst|m0_1|u_logic|Add5~5_sumout ;
+wire \soc_inst|m0_1|u_logic|Dih2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ovcvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Add5~118 ;
+wire \soc_inst|m0_1|u_logic|Add5~9_sumout ;
+wire \soc_inst|m0_1|u_logic|Szr2z4~q ;
+wire \soc_inst|m0_1|u_logic|Eyr2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qwr2z4~q ;
+wire \soc_inst|m0_1|u_logic|Hp9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z863z4~q ;
+wire \soc_inst|m0_1|u_logic|Qz43z4~q ;
+wire \soc_inst|m0_1|u_logic|Kn9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kc03z4~q ;
+wire \soc_inst|m0_1|u_logic|E913z4~q ;
+wire \soc_inst|m0_1|u_logic|Kn9wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Yg23z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hq33z4~q ;
+wire \soc_inst|m0_1|u_logic|Kn9wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kn9wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|F32wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K9z2z4~q ;
+wire \soc_inst|m0_1|u_logic|Tuawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tuawx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hnbwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qzq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Z4bwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hnbwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~30 ;
+wire \soc_inst|m0_1|u_logic|Add5~94 ;
+wire \soc_inst|m0_1|u_logic|Add5~102 ;
+wire \soc_inst|m0_1|u_logic|Add5~34 ;
+wire \soc_inst|m0_1|u_logic|Add5~98 ;
+wire \soc_inst|m0_1|u_logic|Add5~110 ;
+wire \soc_inst|m0_1|u_logic|Add5~38 ;
+wire \soc_inst|m0_1|u_logic|Add5~82 ;
+wire \soc_inst|m0_1|u_logic|Add5~41_sumout ;
+wire \soc_inst|m0_1|u_logic|Do8wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jf92z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ixn2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wu53z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Md92z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ec33z4~q ;
+wire \soc_inst|m0_1|u_logic|Md92z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Md92z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Md92z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Qs0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~74 ;
+wire \soc_inst|m0_1|u_logic|Add5~21_sumout ;
+wire \soc_inst|m0_1|u_logic|U6awx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|U6awx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Oaawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xyh3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Zb83z4~q ;
+wire \soc_inst|m0_1|u_logic|Q273z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Qg93z4~q ;
+wire \soc_inst|m0_1|u_logic|Nn0wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Q6u2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Zfv2z4~q ;
+wire \soc_inst|m0_1|u_logic|Nn0wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Nn0wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Oaawx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Yj43z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|A792z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xyh3z4~q ;
+wire \soc_inst|m0_1|u_logic|X892z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pa33z4~q ;
+wire \soc_inst|m0_1|u_logic|A792z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|A792z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|A792z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Wo0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~22 ;
+wire \soc_inst|m0_1|u_logic|Add5~50 ;
+wire \soc_inst|m0_1|u_logic|Add5~54 ;
+wire \soc_inst|m0_1|u_logic|Add5~25_sumout ;
+wire \soc_inst|m0_1|u_logic|Do8wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~69_sumout ;
+wire \soc_inst|m0_1|u_logic|Do8wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~49_sumout ;
+wire \soc_inst|m0_1|u_logic|Do8wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Do8wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Phh2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sa13z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Bk23z4~q ;
+wire \soc_inst|m0_1|u_logic|H972z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Pfz2z4~q ;
+wire \soc_inst|m0_1|u_logic|H972z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|T253z4~q ;
+wire \soc_inst|m0_1|u_logic|H972z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Eb72z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H972z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|A67wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zwcvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Add5~10 ;
+wire \soc_inst|m0_1|u_logic|Add5~77_sumout ;
+wire \soc_inst|m0_1|u_logic|Add5~81_sumout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~0_combout ;
+wire \soc_inst|interconnect_1|HRDATA[11]~3_combout ;
+wire \soc_inst|ram_1|data_to_memory[12]~13_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ;
+wire \soc_inst|ram_1|data_to_memory[28]~14_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ;
+wire \soc_inst|interconnect_1|HRDATA[12]~22_combout ;
+wire \soc_inst|m0_1|u_logic|Xrmwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xrmwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Dpc3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dpc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Bsvwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xrmwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|B2uvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|U1uvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Adt2z4~q ;
+wire \soc_inst|m0_1|u_logic|Oxuvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R1ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ipb3z4~q ;
+wire \soc_inst|m0_1|u_logic|Fhc3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fhc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Dewwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dewwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Gtmwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gtmwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Gtmwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Z2h3z4~DUPLICATE_q ;
+wire \soc_inst|switches_1|switch_store[1][4]~q ;
+wire \soc_inst|m0_1|u_logic|Sjvwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ntmwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ntmwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wzpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lsmwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lsmwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wzpvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|D47wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zxpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Phh2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|S17wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rhnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rhnvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Idk2z4~q ;
+wire \soc_inst|m0_1|u_logic|Mnawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C3qvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~15_combout ;
+wire \soc_inst|m0_1|u_logic|Ox1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Nf1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rjzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Ox1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wsawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Cr1wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|G6d3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G6d3z4~q ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ;
+wire \soc_inst|m0_1|u_logic|Kxe3z4~q ;
+wire \soc_inst|m0_1|u_logic|Aze3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~10 ;
+wire \soc_inst|m0_1|u_logic|Add0~77_sumout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout ;
+wire \soc_inst|m0_1|u_logic|W3f3z4~q ;
+wire \soc_inst|m0_1|u_logic|Armvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M5f3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~78 ;
+wire \soc_inst|m0_1|u_logic|Add0~25_sumout ;
+wire \soc_inst|m0_1|u_logic|Tqmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Aze3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Mxa2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I0ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y9l2z4~q ;
+wire \soc_inst|m0_1|u_logic|Vve3z4~q ;
+wire \soc_inst|m0_1|u_logic|Vve3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Khfwx4~0_combout ;
+wire \soc_inst|interconnect_1|HRDATA[8]~15_combout ;
+wire \SW[9]~input_o ;
+wire \soc_inst|switches_1|switch_store[0][9]~q ;
+wire \soc_inst|interconnect_1|HRDATA[9]~16_combout ;
+wire \soc_inst|m0_1|u_logic|Khfwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Khfwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Khfwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Vq1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vq1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Vq1wx4~combout ;
+wire \soc_inst|m0_1|u_logic|G6d3z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|G6d3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ffbwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cr1wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Cr1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uozvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Uozvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|L9zvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|L9zvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|L9zvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|L9zvx4~combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~13_combout ;
+wire \soc_inst|m0_1|u_logic|Z80wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Z80wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~19_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~21_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~20_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~18_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~9_combout ;
+wire \soc_inst|m0_1|u_logic|Ri0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ri0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Znzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G79wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G79wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Dv8wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G79wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|G79wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|G79wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|G79wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|G79wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|G79wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~10_combout ;
+wire \soc_inst|m0_1|u_logic|Ee8wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ee8wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ee8wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ee8wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~11_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~12_combout ;
+wire \soc_inst|m0_1|u_logic|Nyawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~17_combout ;
+wire \soc_inst|m0_1|u_logic|Wccwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fyzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~14_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~16_combout ;
+wire \soc_inst|m0_1|u_logic|Z78wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|S9zvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R38wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R38wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qb3wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Z9zvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Igi2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rhi2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add2~14 ;
+wire \soc_inst|m0_1|u_logic|Add2~1_sumout ;
+wire \soc_inst|m0_1|u_logic|Tvhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tvhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Tvhvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Omk2z4~q ;
+wire \soc_inst|m0_1|u_logic|Velvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Velvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Vr23z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Vr23z4~q ;
+wire \soc_inst|m0_1|u_logic|Mi13z4~q ;
+wire \soc_inst|m0_1|u_logic|Ec62z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Na53z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Na53z4~q ;
+wire \soc_inst|m0_1|u_logic|E143z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|E143z4~q ;
+wire \soc_inst|m0_1|u_logic|Ec62z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|N8i3z4~q ;
+wire \soc_inst|m0_1|u_logic|Be62z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cai3z4~q ;
+wire \soc_inst|m0_1|u_logic|J5i3z4~q ;
+wire \soc_inst|m0_1|u_logic|Y6i3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ec62z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ec62z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Q8zvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C8zvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F6zvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F6zvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ft73z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Ft73z4~q ;
+wire \soc_inst|m0_1|u_logic|O7zvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Gto2z4~q ;
+wire \soc_inst|m0_1|u_logic|O7zvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|O7zvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|O7zvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|O7zvx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|O7zvx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|N8i3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Uu83z4~q ;
+wire \soc_inst|m0_1|u_logic|O7zvx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|O7zvx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|O7zvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O7zvx4~combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o~2_combout ;
+wire \soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Tyywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Uqi2z4~q ;
+wire \soc_inst|m0_1|u_logic|Hzywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o~18_combout ;
+wire \soc_inst|m0_1|u_logic|Hzj2z4~q ;
+wire \soc_inst|m0_1|u_logic|M5mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S5b3z4~q ;
+wire \soc_inst|m0_1|u_logic|hwdata_o~10_combout ;
+wire \soc_inst|m0_1|u_logic|Ynvvx4~combout ;
+wire \soc_inst|m0_1|u_logic|M5mvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Bec3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bec3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ckuvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F2ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pxb3z4~q ;
+wire \soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|D0wwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D0wwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|I90xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Iuuvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K1ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Uic3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uic3z4~q ;
+wire \soc_inst|m0_1|u_logic|Bmb3z4~q ;
+wire \soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Wzvwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wzvwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Jjuwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Douvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W0ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X0c3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ylc3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ylc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Z4l2z4~q ;
+wire \soc_inst|m0_1|u_logic|H8l2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|A50xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ayzwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Jjuwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|K9ovx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T2ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gxk2z4~q ;
+wire \soc_inst|m0_1|u_logic|Mcc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Mcc3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mcc3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Zad3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ruvvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M2ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|G10xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ztc3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ztc3z4~q ;
+wire \soc_inst|m0_1|u_logic|G10xx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fb0xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S00xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I90xx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Tb0xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B90xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cjuwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wvzwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Pwywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qrp2z4~q ;
+wire \soc_inst|m0_1|u_logic|Hdzwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Usl2z4~q ;
+wire \soc_inst|m0_1|u_logic|N10xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F40xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Adzwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wvzwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I90xx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|A6zwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wuq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Yauvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gzhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Tqzwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jsa2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Syhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lul2z4~q ;
+wire \soc_inst|m0_1|u_logic|Jsc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Jsc3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Tqc3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Cps2z4~q ;
+wire \soc_inst|m0_1|u_logic|Uls2z4~q ;
+wire \soc_inst|m0_1|u_logic|Xwvwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xwvwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Arzwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Vgs2z4~q ;
+wire \soc_inst|m0_1|u_logic|Tib3z4~q ;
+wire \soc_inst|m0_1|u_logic|Dizwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kizwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fczwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K9vvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uzhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ble3z4~q ;
+wire \soc_inst|m0_1|u_logic|Lee3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lee3z4~q ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ;
+wire \soc_inst|m0_1|u_logic|Wva2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B0ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ipn2z4~q ;
+wire \soc_inst|m0_1|u_logic|Nnc3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nnc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Azs2z4~q ;
+wire \soc_inst|m0_1|u_logic|Svs2z4~q ;
+wire \soc_inst|m0_1|u_logic|Gyvwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gyvwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|B6pwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H2f3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H2f3z4~q ;
+wire \soc_inst|m0_1|u_logic|T8f3z4~q ;
+wire \soc_inst|m0_1|u_logic|Mhvvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|P0ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Tqs2z4~q ;
+wire \soc_inst|m0_1|u_logic|Kkb3z4~q ;
+wire \soc_inst|m0_1|u_logic|Whzwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Whzwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fjzwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qlzwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yizwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mczwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B6pwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|B6pwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Iazwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|J7zwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ihzwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Clzwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T5zwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B6pwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|H6zwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ozywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|J0zwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vzywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kbzwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Jzzwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qzzwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Czzwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R4zwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vzywx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Gvywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|E5owx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C0zwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X2rvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pjyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ahowx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tgowx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tlyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tlyvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rkyvx4~0_combout ;
+wire \soc_inst|ram_1|data_to_memory[8]~28_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8 ;
+wire \SW[8]~input_o ;
+wire \soc_inst|switches_1|switch_store[0][8]~q ;
+wire \soc_inst|interconnect_1|HRDATA[8]~33_combout ;
+wire \soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hmyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hmyvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hmyvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|O3pvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O3pvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rqzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R293z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|R293z4~q ;
+wire \soc_inst|m0_1|u_logic|Zpj2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Mnvwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|C5v2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Mnvwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|C183z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Mnvwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Mnvwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mnvwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Mrdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mrdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Jymwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jymwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|N7c3z4~q ;
+wire \soc_inst|m0_1|u_logic|Cymwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cymwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Cymwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Cymwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Qe0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qe0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Je0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mc0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Mc0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tch3z4~q ;
+wire \soc_inst|m0_1|u_logic|Iq82z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lo82z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Lo82z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ji43z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Lo82z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lo82z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Lf0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~26 ;
+wire \soc_inst|m0_1|u_logic|Add5~2 ;
+wire \soc_inst|m0_1|u_logic|Add5~125_sumout ;
+wire \soc_inst|m0_1|u_logic|Add2~62 ;
+wire \soc_inst|m0_1|u_logic|Add2~106 ;
+wire \soc_inst|m0_1|u_logic|Add2~117_sumout ;
+wire \soc_inst|m0_1|u_logic|Zdhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oa3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oa3wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Oa3wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Zdhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kaf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add2~118 ;
+wire \soc_inst|m0_1|u_logic|Add2~113_sumout ;
+wire \soc_inst|m0_1|u_logic|Duhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Duhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xyk2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~114 ;
+wire \soc_inst|m0_1|u_logic|Add3~109_sumout ;
+wire \soc_inst|m0_1|u_logic|Y1pvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Vjnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vjnvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Q7j2z4~q ;
+wire \soc_inst|m0_1|u_logic|Dy23z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Py72z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wo03z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Py72z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Py72z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|M082z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Py72z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Nozvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Locvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Add5~57_sumout ;
+wire \soc_inst|m0_1|u_logic|Xmzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xmzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|N3v2z4~q ;
+wire \soc_inst|m0_1|u_logic|U7uwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|U7uwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|U7uwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Uvdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gvdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M5ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pgfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pgfwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ppzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ppzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Oihvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Add2~77_sumout ;
+wire \soc_inst|m0_1|u_logic|Oihvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Oihvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zpx2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~110 ;
+wire \soc_inst|m0_1|u_logic|Add3~73_sumout ;
+wire \soc_inst|m0_1|u_logic|Rnovx4~combout ;
+wire \soc_inst|m0_1|u_logic|C1lvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lgi3z4~q ;
+wire \soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ow23z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Ow23z4~q ;
+wire \soc_inst|m0_1|u_logic|Fn13z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Fn13z4~q ;
+wire \soc_inst|m0_1|u_logic|Ds72z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|X543z4~q ;
+wire \soc_inst|m0_1|u_logic|Ds72z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hn03z4~q ;
+wire \soc_inst|m0_1|u_logic|Nqz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ds72z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|O5k2z4~q ;
+wire \soc_inst|m0_1|u_logic|Au72z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ds72z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Hlzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rjzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Uhzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Uhzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gf53z4~q ;
+wire \soc_inst|m0_1|u_logic|Djzvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Fn13z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Djzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Djzvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Yx73z4~q ;
+wire \soc_inst|m0_1|u_logic|Djzvx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Po63z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Djzvx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Djzvx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Djzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Nqz2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|D7k2z4~q ;
+wire \soc_inst|m0_1|u_logic|Djzvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Djzvx4~combout ;
+wire \soc_inst|m0_1|u_logic|H3awx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~6 ;
+wire \soc_inst|m0_1|u_logic|Add5~89_sumout ;
+wire \soc_inst|m0_1|u_logic|Zbbwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cfzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cfzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Pdbwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hmh3z4~q ;
+wire \soc_inst|m0_1|u_logic|An63z4~q ;
+wire \soc_inst|m0_1|u_logic|Yx83z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Pdbwx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Pdbwx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Rd53z4~q ;
+wire \soc_inst|m0_1|u_logic|Pdbwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|I443z4~q ;
+wire \soc_inst|m0_1|u_logic|Gfq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pdbwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Pdbwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Ql13z4~q ;
+wire \soc_inst|m0_1|u_logic|Pdbwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Skh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Djh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Pdbwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Pdbwx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Pdbwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Yih2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~90 ;
+wire \soc_inst|m0_1|u_logic|Add5~86 ;
+wire \soc_inst|m0_1|u_logic|Add5~117_sumout ;
+wire \soc_inst|m0_1|u_logic|Mdzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fdzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jlo2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Jlo2z4~q ;
+wire \soc_inst|m0_1|u_logic|Bk13z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Rtpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T243z4~q ;
+wire \soc_inst|m0_1|u_logic|Rtpvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Kt23z4~q ;
+wire \soc_inst|m0_1|u_logic|Rtpvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ujo2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Rtpvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Yoz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Noo2z4~q ;
+wire \soc_inst|m0_1|u_logic|Sl03z4~q ;
+wire \soc_inst|m0_1|u_logic|Rtpvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Uu73z4~q ;
+wire \soc_inst|m0_1|u_logic|Ymo2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rtpvx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Rtpvx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Rtpvx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Rtpvx4~combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o~12_combout ;
+wire \soc_inst|ram_1|data_to_memory[29]~22_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout ;
+wire \soc_inst|ram_1|data_to_memory[13]~21_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ;
+wire \soc_inst|m0_1|u_logic|Hxmwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hxmwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Mb1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mb1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add2~82 ;
+wire \soc_inst|m0_1|u_logic|Add2~109_sumout ;
+wire \soc_inst|m0_1|u_logic|Nehvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Nehvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tme3z4~q ;
+wire \soc_inst|m0_1|u_logic|A9jvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Slr2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ty92z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|U5q2z4~q ;
+wire \soc_inst|m0_1|u_logic|D603z4~q ;
+wire \soc_inst|m0_1|u_logic|X213z4~q ;
+wire \soc_inst|m0_1|u_logic|Ww92z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ww92z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O723z4~q ;
+wire \soc_inst|m0_1|u_logic|Xg33z4~q ;
+wire \soc_inst|m0_1|u_logic|Ww92z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ww92z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|C61wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~61_sumout ;
+wire \soc_inst|m0_1|u_logic|Add2~110 ;
+wire \soc_inst|m0_1|u_logic|Add2~101_sumout ;
+wire \soc_inst|m0_1|u_logic|Rix2z4~q ;
+wire \soc_inst|m0_1|u_logic|Xjhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xjhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add3~98 ;
+wire \soc_inst|m0_1|u_logic|Add3~94 ;
+wire \soc_inst|m0_1|u_logic|Add3~90 ;
+wire \soc_inst|m0_1|u_logic|Add3~86 ;
+wire \soc_inst|m0_1|u_logic|Add3~70 ;
+wire \soc_inst|m0_1|u_logic|Add3~66 ;
+wire \soc_inst|m0_1|u_logic|Add3~61_sumout ;
+wire \soc_inst|m0_1|u_logic|Ug0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|M0kvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tzg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Hk0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ccg3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hk0wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Hk0wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Hk0wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Hk0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Wh0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bh0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ia0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Tj0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tj0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Bh0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Pwg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Hqg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Hk0wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Hk0wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Hk0wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|M9awx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~53_sumout ;
+wire \soc_inst|m0_1|u_logic|Tjlwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ldhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|B9g3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add2~66 ;
+wire \soc_inst|m0_1|u_logic|Add2~61_sumout ;
+wire \soc_inst|m0_1|u_logic|Gehvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gehvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Foe3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~57_sumout ;
+wire \soc_inst|m0_1|u_logic|Fc0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|B5kvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|L733z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Zh82z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zh82z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zh82z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|C5n2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wj82z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zh82z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|N90wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|J70wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|J70wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ba0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ba0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|J70wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|V883z4~q ;
+wire \soc_inst|m0_1|u_logic|Wa0wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Wa0wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Wa0wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|E5awx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~1_sumout ;
+wire \soc_inst|m0_1|u_logic|Add2~105_sumout ;
+wire \soc_inst|m0_1|u_logic|Vihvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vihvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Nox2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~101_sumout ;
+wire \soc_inst|m0_1|u_logic|C70wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Q9kvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zfh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Bf9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M4j2z4~q ;
+wire \soc_inst|m0_1|u_logic|Eif3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Pgf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Bc82z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tjf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ilf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Bc82z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ftf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Qrf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Bc82z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Uuf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Bc82z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Bc82z4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Ntnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D6cwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Va3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fa2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fpi2z4~q ;
+wire \soc_inst|m0_1|u_logic|R6cwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S652z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wbf3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|W852z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xmf3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|G752z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|P852z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R6cwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Mof3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|R6cwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|I852z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M352z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ftf3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|T352z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uuf3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|C552z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O452z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R6cwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Eif3z4~q ;
+wire \soc_inst|m0_1|u_logic|R6cwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|R6cwx4~5_combout ;
+wire \soc_inst|ram_1|data_to_memory[23]~0_combout ;
+wire \soc_inst|m0_1|u_logic|V4ovx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vfd3z4~q ;
+wire \soc_inst|m0_1|u_logic|R6xwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R6xwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|R6xwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Jca3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jca3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~86 ;
+wire \soc_inst|m0_1|u_logic|Add0~5_sumout ;
+wire \soc_inst|m0_1|u_logic|Zmmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uei3z4~q ;
+wire \soc_inst|switches_1|switch_store[1][7]~q ;
+wire \soc_inst|ram_1|data_to_memory[23]~3_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23 ;
+wire \soc_inst|interconnect_1|HRDATA[23]~8_combout ;
+wire \soc_inst|m0_1|u_logic|Walwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Walwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|U72wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jwf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add2~102 ;
+wire \soc_inst|m0_1|u_logic|Add2~97_sumout ;
+wire \soc_inst|m0_1|u_logic|Sdhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Sdhvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Sdhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add2~98 ;
+wire \soc_inst|m0_1|u_logic|Add2~93_sumout ;
+wire \soc_inst|m0_1|u_logic|Qjhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I21wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I21wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Qjhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Dkx2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~89_sumout ;
+wire \soc_inst|m0_1|u_logic|Vpovx4~combout ;
+wire \soc_inst|m0_1|u_logic|Eijvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ym93z4~q ;
+wire \soc_inst|m0_1|u_logic|W21wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Skv2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Skv2z4~q ;
+wire \soc_inst|m0_1|u_logic|Jbu2z4~q ;
+wire \soc_inst|m0_1|u_logic|W21wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|J5o2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ro43z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|W21wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|N8o2z4~q ;
+wire \soc_inst|m0_1|u_logic|W21wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|O403z4~q ;
+wire \soc_inst|m0_1|u_logic|W21wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|W21wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Kfawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kfawx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|G11wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|G11wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qz0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qz0wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Qz0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y6o2z4~q ;
+wire \soc_inst|m0_1|u_logic|Nrvwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Nrvwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jl93z4~q ;
+wire \soc_inst|m0_1|u_logic|Nrvwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Nrvwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Nrvwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Yxdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X0ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X0ewx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|C9a3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~26 ;
+wire \soc_inst|m0_1|u_logic|Add0~13_sumout ;
+wire \soc_inst|m0_1|u_logic|Mqmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zva3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~14 ;
+wire \soc_inst|m0_1|u_logic|Add0~49_sumout ;
+wire \soc_inst|m0_1|u_logic|Bge3z4~q ;
+wire \soc_inst|m0_1|u_logic|Fqmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|She3z4~q ;
+wire \soc_inst|m0_1|u_logic|Whlwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Whlwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Whlwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Whlwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|L6nwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Wjyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|U0vvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Amyvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Amyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Amyvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ykyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|U0vvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|U0vvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|I30wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|H2m2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hbv2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ebbwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|T0m2z4~q ;
+wire \soc_inst|m0_1|u_logic|Yb93z4~q ;
+wire \soc_inst|m0_1|u_logic|Ebbwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Y1u2z4~q ;
+wire \soc_inst|m0_1|u_logic|H783z4~q ;
+wire \soc_inst|m0_1|u_logic|Ebbwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Yx63z4~q ;
+wire \soc_inst|m0_1|u_logic|V3m2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ebbwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ebbwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Jmdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jmdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Q6twx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q6twx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rhfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rhfwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rhfwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Mx0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mx0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Add2~94 ;
+wire \soc_inst|m0_1|u_logic|Add2~89_sumout ;
+wire \soc_inst|m0_1|u_logic|Jjhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jjhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Plx2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add2~90 ;
+wire \soc_inst|m0_1|u_logic|Add2~73_sumout ;
+wire \soc_inst|m0_1|u_logic|Cjhvx4~0_combout ;
+wire \soc_inst|switches_1|switch_store[1][2]~q ;
+wire \soc_inst|ram_1|data_to_memory[18]~6_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout ;
+wire \soc_inst|ram_1|data_to_memory[10]~5_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18 ;
+wire \soc_inst|interconnect_1|HRDATA[18]~13_combout ;
+wire \soc_inst|m0_1|u_logic|Ajmwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ajmwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ajmwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Qkmwx4~0_combout ;
+wire \soc_inst|interconnect_1|HRDATA[10]~12_combout ;
+wire \soc_inst|m0_1|u_logic|Qkmwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qkmwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Qkmwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Et0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Et0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Cjhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Bnx2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~69_sumout ;
+wire \soc_inst|m0_1|u_logic|Fq0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Irjvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W5p2z4~q ;
+wire \soc_inst|m0_1|u_logic|St0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wu53z4~q ;
+wire \soc_inst|m0_1|u_logic|St0wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|St0wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Ecawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ecawx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Cs0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Cs0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mq0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Mq0wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Mq0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Psn2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ohv2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|H1qwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F8u2z4~q ;
+wire \soc_inst|m0_1|u_logic|H1qwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|H1qwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Eudwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Eudwx4~1_combout ;
+wire \soc_inst|ram_1|data_to_memory[30]~29_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ;
+wire \soc_inst|m0_1|u_logic|Qapwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D7iwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D7iwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zuzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zuzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Oszvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Mvm2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ytm2z4~q ;
+wire \soc_inst|m0_1|u_logic|G493z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Qowwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|It63z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ixt2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Qowwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qowwx4~combout ;
+wire \soc_inst|m0_1|u_logic|H133z4~q ;
+wire \soc_inst|m0_1|u_logic|Yr13z4~q ;
+wire \soc_inst|m0_1|u_logic|Lq03z4~q ;
+wire \soc_inst|m0_1|u_logic|Uvzvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Zj53z4~q ;
+wire \soc_inst|m0_1|u_logic|Rtz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qa43z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Uvzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Uvzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uvzvx4~combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o~4_combout ;
+wire \soc_inst|m0_1|u_logic|J7b3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|J7b3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ormvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z8b3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~90 ;
+wire \soc_inst|m0_1|u_logic|Add0~9_sumout ;
+wire \soc_inst|m0_1|u_logic|Hrmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dhb3z4~q ;
+wire \soc_inst|m0_1|u_logic|Oytvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Oytvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Oytvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Oytvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|K7g3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Oytvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oytvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Etmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F2o2z4~q ;
+wire \soc_inst|m0_1|u_logic|Mxtvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Add0~53_sumout ;
+wire \soc_inst|m0_1|u_logic|Bomvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jpa3z4~q ;
+wire \soc_inst|m0_1|u_logic|Rilwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rilwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ll1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ll1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Aj1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ibe3z4~q ;
+wire \soc_inst|m0_1|u_logic|Cc9wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|U9e3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ge9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cc9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tyd3z4~q ;
+wire \soc_inst|m0_1|u_logic|Exd3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Cc9wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Cc9wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Qk1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Owovx4~combout ;
+wire \soc_inst|ram_1|memory.raddr_a[9]~9_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout ;
+wire \soc_inst|interconnect_1|HRDATA[7]~11_combout ;
+wire \soc_inst|m0_1|u_logic|Wywwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wywwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wywwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Wywwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|G9lwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R5zvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R5zvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|R5zvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Po7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fc7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fc7wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Cb3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gci2z4~q ;
+wire \soc_inst|m0_1|u_logic|Y5zvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y5zvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Y5zvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|J3qvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cc63z4~q ;
+wire \soc_inst|m0_1|u_logic|Isi2z4~q ;
+wire \soc_inst|m0_1|u_logic|N3ywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Glj2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Lpu2z4~q ;
+wire \soc_inst|m0_1|u_logic|N3ywx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Cgt2z4~q ;
+wire \soc_inst|m0_1|u_logic|N3ywx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|N3ywx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|N3ywx4~combout ;
+wire \soc_inst|m0_1|u_logic|U2ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M7qwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mjlwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mjlwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Bo0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bo0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Zjq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add2~69_sumout ;
+wire \soc_inst|m0_1|u_logic|Ithvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ithvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add3~65_sumout ;
+wire \soc_inst|m0_1|u_logic|Ql0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Xvjvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|L7p2z4~q ;
+wire \soc_inst|m0_1|u_logic|Nn0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ht53z4~q ;
+wire \soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Nn0wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Yj43z4~q ;
+wire \soc_inst|m0_1|u_logic|A9p2z4~q ;
+wire \soc_inst|m0_1|u_logic|Nn0wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Nn0wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Nn0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Un0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xl0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xl0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q6u2z4~q ;
+wire \soc_inst|m0_1|u_logic|Q273z4~q ;
+wire \soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Bjxwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Pap2z4~q ;
+wire \soc_inst|m0_1|u_logic|Bjxwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bjxwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Jtdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jtdwx4~1_combout ;
+wire \SW[1]~input_o ;
+wire \soc_inst|switches_1|switch_store[1][1]~q ;
+wire \soc_inst|m0_1|u_logic|Mbtwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bgfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bgfwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|C2rvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C2rvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|C2rvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Qppvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ukt2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ug63z4~q ;
+wire \soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|V7ywx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Txj2z4~q ;
+wire \soc_inst|m0_1|u_logic|Duu2z4~q ;
+wire \soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|V7ywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|V7ywx4~combout ;
+wire \soc_inst|m0_1|u_logic|A7ywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D5ywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F7qwx4~combout ;
+wire \soc_inst|ram_1|data_to_memory[26]~8_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 ;
+wire \soc_inst|m0_1|u_logic|T7qwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jkmwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jkmwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Yjzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yjzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hihvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Add2~29_sumout ;
+wire \soc_inst|m0_1|u_logic|Hihvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hihvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lrx2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~74 ;
+wire \soc_inst|m0_1|u_logic|Add3~21_sumout ;
+wire \soc_inst|m0_1|u_logic|Nhzvx4~combout ;
+wire \soc_inst|m0_1|u_logic|R5lvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S8k2z4~q ;
+wire \soc_inst|m0_1|u_logic|Fm72z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wnh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Fm72z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Zu23z4~q ;
+wire \soc_inst|m0_1|u_logic|Ql13z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Fm72z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Co72z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fm72z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Lsnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add3~22 ;
+wire \soc_inst|m0_1|u_logic|Add3~17_sumout ;
+wire \soc_inst|m0_1|u_logic|Vezvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Galvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hak2z4~q ;
+wire \soc_inst|m0_1|u_logic|Aez2z4~q ;
+wire \soc_inst|m0_1|u_logic|Zu33z4~q ;
+wire \soc_inst|m0_1|u_logic|I453z4~q ;
+wire \soc_inst|m0_1|u_logic|Tf72z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ql23z4~q ;
+wire \soc_inst|m0_1|u_logic|Hc13z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Hc13z4~q ;
+wire \soc_inst|m0_1|u_logic|Tf72z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Tiz2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Nf03z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Tf72z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Rek2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qh72z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tf72z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Esnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sscvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Add5~85_sumout ;
+wire \soc_inst|m0_1|u_logic|C3qvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Vhk2z4~q ;
+wire \soc_inst|m0_1|u_logic|Izpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ggk2z4~q ;
+wire \soc_inst|m0_1|u_logic|Izpvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Nf03z4~q ;
+wire \soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Tiz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Izpvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Rd63z4~q ;
+wire \soc_inst|m0_1|u_logic|Izpvx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Aru2z4~q ;
+wire \soc_inst|m0_1|u_logic|Izpvx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Izpvx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Izpvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Izpvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Izpvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Sx3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Imvvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T5mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T5mvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wbk2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wwywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I6pwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|N4rvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mbnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gtp2z4~q ;
+wire \soc_inst|m0_1|u_logic|L8mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cam2z4~q ;
+wire \soc_inst|m0_1|u_logic|Kwa2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nzhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oar2z4~q ;
+wire \soc_inst|m0_1|u_logic|Zxvwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zxvwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Arzwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pazwx4~combout ;
+wire \soc_inst|m0_1|u_logic|G2zwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G2zwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|W5rvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Fbnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Owq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Leuvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Leuvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Pamvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Bjkvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bjkvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ovc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Nl53z4~q ;
+wire \soc_inst|m0_1|u_logic|Ec43z4~q ;
+wire \soc_inst|m0_1|u_logic|Qw62z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wmp2z4~q ;
+wire \soc_inst|m0_1|u_logic|Mt13z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|V233z4~q ;
+wire \soc_inst|m0_1|u_logic|Qw62z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ny62z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zr03z4~q ;
+wire \soc_inst|m0_1|u_logic|Fvz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qw62z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Qw62z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Mpnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~109_sumout ;
+wire \soc_inst|m0_1|u_logic|Vcuvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vcuvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Yxzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ilp2z4~q ;
+wire \soc_inst|m0_1|u_logic|Eo5wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Mt13z4~q ;
+wire \soc_inst|m0_1|u_logic|V233z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Eo5wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Eo5wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Sgp2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Eo5wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Eo5wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Eo5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Eo5wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout ;
+wire \soc_inst|m0_1|u_logic|D4g3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D4g3z4~q ;
+wire \soc_inst|m0_1|u_logic|Geuwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jjuwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|U5pwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kzqvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Viuwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B6pwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Kzqvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Kzqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T5g3z4~q ;
+wire \soc_inst|interconnect_1|HRDATA[13]~27_combout ;
+wire \soc_inst|m0_1|u_logic|Twmwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Twmwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Twmwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Bspvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bspvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xowwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xowwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xowwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ok7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mj7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jl7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Et7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nu7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mj7wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Dtpvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Dtpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~78 ;
+wire \soc_inst|m0_1|u_logic|Add5~129_sumout ;
+wire \soc_inst|m0_1|u_logic|Dtpvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zei2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zei2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zei2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qynvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qynvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Vxnvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~134_cout ;
+wire \soc_inst|m0_1|u_logic|Add5~29_sumout ;
+wire \soc_inst|m0_1|u_logic|G5qvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|G5qvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ejm2z4~q ;
+wire \soc_inst|m0_1|u_logic|Gmm2z4~q ;
+wire \soc_inst|m0_1|u_logic|Unm2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Q8ywx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Imt2z4~q ;
+wire \soc_inst|m0_1|u_logic|Q8ywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q8ywx4~combout ;
+wire \soc_inst|m0_1|u_logic|W4ywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mzxwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oldwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M2b3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Mbt2z4~q ;
+wire \soc_inst|m0_1|u_logic|Yrqwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ojmwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ojmwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ojmwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Wn1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wn1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add2~46 ;
+wire \soc_inst|m0_1|u_logic|Add2~41_sumout ;
+wire \soc_inst|m0_1|u_logic|Lkhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Lkhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ufx2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add2~42 ;
+wire \soc_inst|m0_1|u_logic|Add2~85_sumout ;
+wire \soc_inst|m0_1|u_logic|Uehvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Uehvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gmd3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add2~86 ;
+wire \soc_inst|m0_1|u_logic|Add2~81_sumout ;
+wire \soc_inst|m0_1|u_logic|Fhx2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ekhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uf1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uf1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ekhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|L4jvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dkr2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ze1wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Ze1wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Ejawx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~13_sumout ;
+wire \soc_inst|m0_1|u_logic|Nf1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qd1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qd1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Oir2z4~q ;
+wire \soc_inst|m0_1|u_logic|Dy4xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cgu2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ze1wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ze1wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ze1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|M413z4~q ;
+wire \soc_inst|m0_1|u_logic|Ze1wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ll83z4~q ;
+wire \soc_inst|m0_1|u_logic|Ze1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ze1wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Ze1wx4~combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout ;
+wire \soc_inst|m0_1|u_logic|L7a3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~50 ;
+wire \soc_inst|m0_1|u_logic|Add0~37_sumout ;
+wire \soc_inst|m0_1|u_logic|Ypmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Iua3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~38 ;
+wire \soc_inst|m0_1|u_logic|Add0~61_sumout ;
+wire \soc_inst|m0_1|u_logic|Rpmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K7g3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~62 ;
+wire \soc_inst|m0_1|u_logic|Add0~81_sumout ;
+wire \soc_inst|m0_1|u_logic|Kpmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rsa3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~82 ;
+wire \soc_inst|m0_1|u_logic|Add0~1_sumout ;
+wire \soc_inst|m0_1|u_logic|D4a3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D4a3z4~q ;
+wire \soc_inst|m0_1|u_logic|Dpmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ara3z4~q ;
+wire \soc_inst|m0_1|u_logic|Wjxwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wjxwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wjxwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Wjxwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Wjxwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o~0_combout ;
+wire \soc_inst|ram_1|data_to_memory[31]~1_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout ;
+wire \soc_inst|interconnect_1|HRDATA[15]~4_combout ;
+wire \soc_inst|m0_1|u_logic|U9lwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|U9lwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Mtwwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zz1wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Zz1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|K22wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|K22wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zz1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hq33z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|E913z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|P12wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Imu2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|P12wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Eyr2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Otr2z4~q ;
+wire \soc_inst|m0_1|u_logic|P12wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|P12wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|P12wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rr83z4~q ;
+wire \soc_inst|m0_1|u_logic|Qz43z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Yg23z4~q ;
+wire \soc_inst|m0_1|u_logic|P12wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Z863z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|P12wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|P12wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|P12wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Lk9wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~42 ;
+wire \soc_inst|m0_1|u_logic|Add5~113_sumout ;
+wire \soc_inst|m0_1|u_logic|Bfhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|V4d3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~41_sumout ;
+wire \soc_inst|m0_1|u_logic|Xxovx4~combout ;
+wire \soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Dmivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dmivx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|G1s2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rds2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Dcs2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ria2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H903z4~q ;
+wire \soc_inst|m0_1|u_logic|Uga2z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Uga2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|I463z4~q ;
+wire \soc_inst|m0_1|u_logic|Uga2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uga2z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Hxnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add3~37_sumout ;
+wire \soc_inst|m0_1|u_logic|Jxovx4~combout ;
+wire \soc_inst|m0_1|u_logic|Qknvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ffs2z4~q ;
+wire \soc_inst|m0_1|u_logic|F4nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F4nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|K3l2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ux4wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|P2a3z4~q ;
+wire \soc_inst|m0_1|u_logic|Inb2z4~combout ;
+wire \soc_inst|m0_1|u_logic|Vsywx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Vsywx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Bjd3z4~q ;
+wire \soc_inst|m0_1|u_logic|Vsywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vsywx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|T7d3z4~q ;
+wire \soc_inst|m0_1|u_logic|Vsywx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Vsywx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Vsywx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Xtywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ypa2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|N8b2z4~combout ;
+wire \soc_inst|m0_1|u_logic|Ypa2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C34wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C34wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Cr0xx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|F5mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q5vvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kofwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bk4wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Si4wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pd4wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pd4wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|H9i2z4~q ;
+wire \soc_inst|m0_1|u_logic|Lny2z4~q ;
+wire \soc_inst|m0_1|u_logic|W7hwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Poa2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ik4wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qdj2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ik4wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Pd4wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Q5vvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Q7mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|U7w2z4~q ;
+wire \soc_inst|m0_1|u_logic|Kkrvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Arzwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Kkrvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kkrvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Kkrvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Kkrvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Kkrvx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Kkrvx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Kyi2z4~q ;
+wire \soc_inst|m0_1|u_logic|Vcnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kyi2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|C9rvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kfpvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kfpvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Kfpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kfpvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Kfpvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Jipvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kfpvx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Zz8wx4~combout ;
+wire \soc_inst|m0_1|u_logic|J00wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gpcwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gpcwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|J00wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|C00wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bn53z4~q ;
+wire \soc_inst|m0_1|u_logic|U5r2z4~q ;
+wire \soc_inst|m0_1|u_logic|Twz2z4~q ;
+wire \soc_inst|m0_1|u_logic|J433z4~q ;
+wire \soc_inst|m0_1|u_logic|Av13z4~q ;
+wire \soc_inst|m0_1|u_logic|Nt03z4~q ;
+wire \soc_inst|m0_1|u_logic|Am5wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|I7r2z4~q ;
+wire \soc_inst|m0_1|u_logic|Sd43z4~q ;
+wire \soc_inst|m0_1|u_logic|Am5wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Am5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Am5wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|H0dwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O0dwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xucwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~97_sumout ;
+wire \soc_inst|m0_1|u_logic|Add2~26 ;
+wire \soc_inst|m0_1|u_logic|Add2~18 ;
+wire \soc_inst|m0_1|u_logic|Add2~33_sumout ;
+wire \soc_inst|m0_1|u_logic|Ulhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ulhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|R8x2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~30 ;
+wire \soc_inst|m0_1|u_logic|Add3~26 ;
+wire \soc_inst|m0_1|u_logic|Add3~34 ;
+wire \soc_inst|m0_1|u_logic|Add3~54 ;
+wire \soc_inst|m0_1|u_logic|Add3~49_sumout ;
+wire \soc_inst|m0_1|u_logic|S4qvx4~combout ;
+wire \soc_inst|ram_1|memory.raddr_a[5]~5_combout ;
+wire \soc_inst|ram_1|data_to_memory[19]~18_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19 ;
+wire \soc_inst|interconnect_1|HRDATA[19]~25_combout ;
+wire \soc_inst|m0_1|u_logic|Jky2z4~q ;
+wire \soc_inst|m0_1|u_logic|E7nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vphvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oiw2z4~q ;
+wire \soc_inst|m0_1|u_logic|E7nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|E7nvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Fjswx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Emewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wvswx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fjswx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|T1d3z4~q ;
+wire \soc_inst|m0_1|u_logic|L61xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ek03z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hq23z4~q ;
+wire \soc_inst|m0_1|u_logic|Z853z4~q ;
+wire \soc_inst|m0_1|u_logic|Knz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Zhyvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Zhyvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qz33z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Qz33z4~q ;
+wire \soc_inst|m0_1|u_logic|Yg13z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Yg13z4~q ;
+wire \soc_inst|m0_1|u_logic|Zhyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zhyvx4~combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o~5_combout ;
+wire \soc_inst|ram_1|data_to_memory[0]~27_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout ;
+wire \soc_inst|interconnect_1|HRDATA[0]~32_combout ;
+wire \soc_inst|m0_1|u_logic|Qdnvx4~0_combout ;
+wire \soc_inst|ram_1|data_to_memory[16]~25_combout ;
+wire \soc_inst|m0_1|u_logic|Ny3wx4~1_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24 ;
+wire \soc_inst|ram_1|data_to_memory[24]~26_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout ;
+wire \soc_inst|switches_1|switch_store[1][0]~q ;
+wire \soc_inst|interconnect_1|HRDATA[16]~30_combout ;
+wire \soc_inst|m0_1|u_logic|Qqhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ydw2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qdnvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qdnvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Yzi2z4~q ;
+wire \soc_inst|m0_1|u_logic|A2iwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|A2iwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Mvc2z4~combout ;
+wire \soc_inst|m0_1|u_logic|Kuc2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qa43z4~q ;
+wire \soc_inst|m0_1|u_logic|Qp62z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H133z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Qp62z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qp62z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Nr62z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qp62z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Euzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add3~53_sumout ;
+wire \soc_inst|m0_1|u_logic|Hszvx4~combout ;
+wire \soc_inst|ram_1|memory.raddr_a[4]~4_combout ;
+wire \soc_inst|ram_1|data_to_memory[20]~16_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout ;
+wire \soc_inst|ram_1|data_to_memory[4]~15_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 ;
+wire \soc_inst|m0_1|u_logic|Ophvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ckw2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pxrvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X6nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X6nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ctrwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ctrwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kghvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I6z2z4~q ;
+wire \soc_inst|m0_1|u_logic|Dghvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|W7z2z4~q ;
+wire \soc_inst|m0_1|u_logic|Uz9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uz9wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~37_sumout ;
+wire \soc_inst|m0_1|u_logic|Add2~34 ;
+wire \soc_inst|m0_1|u_logic|Add2~38 ;
+wire \soc_inst|m0_1|u_logic|Add2~57_sumout ;
+wire \soc_inst|m0_1|u_logic|Nbx2z4~q ;
+wire \soc_inst|m0_1|u_logic|Glhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Glhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add2~58 ;
+wire \soc_inst|m0_1|u_logic|Add2~53_sumout ;
+wire \soc_inst|m0_1|u_logic|Zkhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|W4zvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W4zvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zkhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ycx2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~50 ;
+wire \soc_inst|m0_1|u_logic|Add3~45_sumout ;
+wire \soc_inst|m0_1|u_logic|Z6ovx4~combout ;
+wire \soc_inst|m0_1|u_logic|Nlovx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Nlovx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Nlovx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Nlovx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Nlovx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Nlovx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Nlovx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Nlovx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nlovx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Jknvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lz93z4~q ;
+wire \soc_inst|m0_1|u_logic|N1uvx4~combout ;
+wire \soc_inst|m0_1|u_logic|H8l2z4~q ;
+wire \soc_inst|m0_1|u_logic|S9ywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S9ywx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|S9ywx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Otxwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Palwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kswwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ttwwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B8nwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B8nwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Aihvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Add2~21_sumout ;
+wire \soc_inst|m0_1|u_logic|Aihvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Aihvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xsx2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~18 ;
+wire \soc_inst|m0_1|u_logic|Add3~13_sumout ;
+wire \soc_inst|m0_1|u_logic|V2qvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Khnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Khnvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ohh3z4~q ;
+wire \soc_inst|m0_1|u_logic|N662z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Noo2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Bk13z4~q ;
+wire \soc_inst|m0_1|u_logic|N662z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|K862z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cc53z4~q ;
+wire \soc_inst|m0_1|u_logic|N662z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|N662z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Xrnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add3~14 ;
+wire \soc_inst|m0_1|u_logic|Add3~9_sumout ;
+wire \soc_inst|m0_1|u_logic|S6ovx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|S6ovx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Nmnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mjl2z4~q ;
+wire \soc_inst|m0_1|u_logic|B7owx4~combout ;
+wire \soc_inst|m0_1|u_logic|Pjyvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Pjyvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|F9pvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F9pvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kkyvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ocnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|X7mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X7mvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|I6w2z4~q ;
+wire \soc_inst|m0_1|u_logic|F5mvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|F5mvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|U5x2z4~q ;
+wire \soc_inst|m0_1|u_logic|Lefwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add2~37_sumout ;
+wire \soc_inst|m0_1|u_logic|Nlhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nlhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Cax2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~33_sumout ;
+wire \soc_inst|m0_1|u_logic|Rxzvx4~combout ;
+wire \soc_inst|ram_1|memory.raddr_a[3]~3_combout ;
+wire \soc_inst|ram_1|data_to_memory[22]~31_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout ;
+wire \soc_inst|ram_1|data_to_memory[6]~32_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22 ;
+wire \soc_inst|switches_1|switch_store[1][6]~q ;
+wire \soc_inst|interconnect_1|HRDATA[22]~35_combout ;
+wire \soc_inst|m0_1|u_logic|J6nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Aphvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Enw2z4~q ;
+wire \soc_inst|m0_1|u_logic|C9rvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|C9rvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|C9rvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|C9rvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Add1~6 ;
+wire \soc_inst|m0_1|u_logic|Add1~9_sumout ;
+wire \soc_inst|m0_1|u_logic|W4y2z4~q ;
+wire \soc_inst|m0_1|u_logic|Kanvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W4y2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add1~10 ;
+wire \soc_inst|m0_1|u_logic|Add1~21_sumout ;
+wire \soc_inst|m0_1|u_logic|Danvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K6y2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add1~2 ;
+wire \soc_inst|m0_1|u_logic|Add1~17_sumout ;
+wire \soc_inst|m0_1|u_logic|U8nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bdm2z4~q ;
+wire \soc_inst|m0_1|u_logic|Oylwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add1~22 ;
+wire \soc_inst|m0_1|u_logic|Add1~25_sumout ;
+wire \soc_inst|m0_1|u_logic|W9nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y7y2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add1~26 ;
+wire \soc_inst|m0_1|u_logic|Add1~29_sumout ;
+wire \soc_inst|m0_1|u_logic|P9nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M9y2z4~q ;
+wire \soc_inst|m0_1|u_logic|Oylwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add1~34_cout ;
+wire \soc_inst|m0_1|u_logic|Add1~5_sumout ;
+wire \soc_inst|m0_1|u_logic|Ranvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I3y2z4~q ;
+wire \soc_inst|m0_1|u_logic|J6nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|J6nvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Zoy2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ho3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Df3wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Df3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Df3wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Wpkwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Df3wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Df3wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Df3wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Df3wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Df3wx4~9_combout ;
+wire \soc_inst|m0_1|u_logic|R1pvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mekvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mekvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xx93z4~q ;
+wire \soc_inst|m0_1|u_logic|C372z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C372z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|C372z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Z472z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C372z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Tpnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add3~25_sumout ;
+wire \soc_inst|m0_1|u_logic|Yuovx4~combout ;
+wire \soc_inst|ram_1|memory.raddr_a[2]~2_combout ;
+wire \soc_inst|ram_1|data_to_memory[21]~24_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21 ;
+wire \soc_inst|interconnect_1|HRDATA[21]~29_combout ;
+wire \soc_inst|m0_1|u_logic|Hphvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qlw2z4~q ;
+wire \soc_inst|m0_1|u_logic|Q6nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Q6nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q6nvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Jvxvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Vnqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bsy2z4~q ;
+wire \soc_inst|m0_1|u_logic|Y7xvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Gqxvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Irxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zpxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hnxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zcn2z4~q ;
+wire \soc_inst|m0_1|u_logic|Mmxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sbxvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Sbxvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Gokwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sbxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sbxvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Uup2z4~q ;
+wire \soc_inst|m0_1|u_logic|H2m2z4~q ;
+wire \soc_inst|m0_1|u_logic|Fzxwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H783z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Yx63z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Fzxwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fzxwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Wxxwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y9nwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kkyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zluvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zluvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zluvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|U9mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uaj2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rryvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Upyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R3mwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pet2z4~q ;
+wire \soc_inst|m0_1|u_logic|Nen2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nen2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Nen2z4~q ;
+wire \soc_inst|m0_1|u_logic|Cr1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Okn2z4~q ;
+wire \soc_inst|m0_1|u_logic|X563z4~q ;
+wire \soc_inst|m0_1|u_logic|Vu93z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Mhn2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Yfn2z4~q ;
+wire \soc_inst|m0_1|u_logic|Psv2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Q1ywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gf73z4~q ;
+wire \soc_inst|m0_1|u_logic|Po83z4~q ;
+wire \soc_inst|m0_1|u_logic|Gju2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ajn2z4~q ;
+wire \soc_inst|m0_1|u_logic|Q1ywx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Q1ywx4~combout ;
+wire \soc_inst|m0_1|u_logic|Wa03z4~q ;
+wire \soc_inst|m0_1|u_logic|Fn33z4~q ;
+wire \soc_inst|m0_1|u_logic|Q713z4~q ;
+wire \soc_inst|m0_1|u_logic|Wd23z4~q ;
+wire \soc_inst|m0_1|u_logic|Sh5wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ow43z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Cmn2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Sh5wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Sh5wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Sh5wx4~0_combout ;
+wire \soc_inst|ram_1|data_to_memory[2]~7_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ;
+wire \soc_inst|interconnect_1|HRDATA[2]~14_combout ;
+wire \soc_inst|m0_1|u_logic|L7nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cqhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ahw2z4~q ;
+wire \soc_inst|m0_1|u_logic|L7nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|L7nvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|L4bwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S4bwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q3bwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~33_sumout ;
+wire \soc_inst|m0_1|u_logic|Add2~17_sumout ;
+wire \soc_inst|m0_1|u_logic|Bmhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bmhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|G7x2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~29_sumout ;
+wire \soc_inst|m0_1|u_logic|Ekovx4~combout ;
+wire \soc_inst|ram_1|saved_word_address[1]~feeder_combout ;
+wire \soc_inst|ram_1|memory.raddr_a[1]~1_combout ;
+wire \soc_inst|ram_1|data_to_memory[17]~10_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ;
+wire \soc_inst|ram_1|data_to_memory[9]~9_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 ;
+wire \soc_inst|m0_1|u_logic|Jqhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mfw2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pqrvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S7nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S7nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rxl2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rblwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rblwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rblwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Fgm2z4~q ;
+wire \soc_inst|m0_1|u_logic|Po83z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ylbwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Psv2z4~q ;
+wire \soc_inst|m0_1|u_logic|Vu93z4~q ;
+wire \soc_inst|m0_1|u_logic|Mhn2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ylbwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ylbwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Cmn2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Xhbwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Xhbwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ow43z4~q ;
+wire \soc_inst|m0_1|u_logic|Xhbwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Xhbwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qrnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Asbvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Add5~101_sumout ;
+wire \soc_inst|m0_1|u_logic|Add2~25_sumout ;
+wire \soc_inst|m0_1|u_logic|Imhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Imhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|J4x2z4~q ;
+wire \soc_inst|m0_1|u_logic|Uzvvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fvovx4~combout ;
+wire \soc_inst|switches_1|half_word_address~2_combout ;
+wire \soc_inst|interconnect_1|HRDATA[1]~19_combout ;
+wire \soc_inst|switches_1|DataValid~0_combout ;
+wire \soc_inst|switches_1|switch_store[0][1]~q ;
+wire \soc_inst|ram_1|data_to_memory[1]~12_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25 ;
+wire \soc_inst|ram_1|data_to_memory[25]~11_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout ;
+wire \soc_inst|interconnect_1|HRDATA[1]~21_combout ;
+wire \soc_inst|m0_1|u_logic|Hcnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dwl2z4~q ;
+wire \soc_inst|m0_1|u_logic|Acnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Sta2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uyv2z4~q ;
+wire \soc_inst|m0_1|u_logic|Zx3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H6mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|S4pwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X2rvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|X2rvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Tbnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lbn2z4~q ;
+wire \soc_inst|m0_1|u_logic|Z4xvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z4xvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Z4xvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|I6xvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z4xvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Tzxwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pkwwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vr7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R7iwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O3pvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ojnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ojnvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ojnvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Z7i2z4~q ;
+wire \soc_inst|m0_1|u_logic|Iwp2z4~q ;
+wire \soc_inst|m0_1|u_logic|D4mvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|D4mvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Oxnvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ek03z4~q ;
+wire \soc_inst|m0_1|u_logic|Oxnvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Qz33z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Oxnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oxnvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|N5qvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S6ovx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Va62z4~combout ;
+wire \soc_inst|m0_1|u_logic|haddr_o[29]~2_combout ;
+wire \soc_inst|m0_1|u_logic|H362z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|htrans_o[1]~0_combout ;
+wire \soc_inst|switches_1|half_word_address~1_combout ;
+wire \soc_inst|switches_1|half_word_address~3_combout ;
+wire \soc_inst|interconnect_1|HRDATA[24]~6_combout ;
+wire \soc_inst|interconnect_1|HRDATA[24]~17_combout ;
+wire \soc_inst|switches_1|switch_store[1][9]~q ;
+wire \soc_inst|interconnect_1|HRDATA[25]~18_combout ;
+wire \soc_inst|m0_1|u_logic|O5nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fohvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Urw2z4~q ;
+wire \soc_inst|m0_1|u_logic|O5nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|O5nvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Pty2z4~q ;
+wire \soc_inst|m0_1|u_logic|Dj6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vskwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H06wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|V76wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|V76wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|D56wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O76wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Yy5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|P0hwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xu5wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Px5wx4~combout ;
+wire \soc_inst|m0_1|u_logic|G27wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Uw5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ry5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mz5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xu5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xu5wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Xu5wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|A76wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W46wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xu5wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ylwwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ylwwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ok7wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Manwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pwdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Glnwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add2~49_sumout ;
+wire \soc_inst|m0_1|u_logic|Skhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Skhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jex2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ohivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Lwbwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|To33z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Oubwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fre3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Oubwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Oubwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oubwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Konvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ksbwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Iu1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uku2z4~q ;
+wire \soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Pybwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Pybwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Duv2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Pybwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Pybwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pybwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Tdg2z4~combout ;
+wire \soc_inst|m0_1|u_logic|Aeg2z4~combout ;
+wire \soc_inst|m0_1|u_logic|Vff2z4~combout ;
+wire \soc_inst|m0_1|u_logic|Jhe2z4~combout ;
+wire \soc_inst|m0_1|u_logic|Qhe2z4~combout ;
+wire \soc_inst|m0_1|u_logic|Hhd2z4~combout ;
+wire \soc_inst|m0_1|u_logic|Ohd2z4~combout ;
+wire \soc_inst|m0_1|u_logic|Mgd2z4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Cgf2z4~combout ;
+wire \soc_inst|m0_1|u_logic|Mgd2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lhyvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Z4qvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z4qvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Cll2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ch03z4~q ;
+wire \soc_inst|m0_1|u_logic|Ht5wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ht5wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ht5wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ht5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ;
+wire \soc_inst|ram_1|data_to_memory[15]~2_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31 ;
+wire \soc_inst|interconnect_1|HRDATA[31]~2_combout ;
+wire \soc_inst|m0_1|u_logic|Hjnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pmhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F1x2z4~q ;
+wire \soc_inst|m0_1|u_logic|G8nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ufy2z4~q ;
+wire \soc_inst|m0_1|u_logic|Hjnvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hjnvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|U2x2z4~q ;
+wire \soc_inst|m0_1|u_logic|Srgwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fzyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mk6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X3xvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X3xvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Pa7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q3xvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q3xvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Na6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|U6wvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|U6wvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|U6wvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|U6wvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|U6wvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|U6wvx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|U6wvx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|U6wvx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|W3mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W3mvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|E4xvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|B3mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wlwvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wlwvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|B3mvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|E4xvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hklwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hklwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Hklwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Jeewx4~combout ;
+wire \soc_inst|m0_1|u_logic|Zmlwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hklwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hklwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Bthvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cyq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Tykwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tykwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kxkwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kxkwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kxkwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Svk2z4~q ;
+wire \soc_inst|m0_1|u_logic|C51xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Po53z4~q ;
+wire \soc_inst|m0_1|u_logic|R40wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|R40wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|R40wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R40wx4~combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ;
+wire \soc_inst|ram_1|data_to_memory[11]~17_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ;
+wire \soc_inst|interconnect_1|HRDATA[11]~24_combout ;
+wire \soc_inst|m0_1|u_logic|Add1~30 ;
+wire \soc_inst|m0_1|u_logic|Add1~13_sumout ;
+wire \soc_inst|m0_1|u_logic|I9nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bby2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add1~14 ;
+wire \soc_inst|m0_1|u_logic|Add1~1_sumout ;
+wire \soc_inst|m0_1|u_logic|B9nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qcy2z4~q ;
+wire \soc_inst|m0_1|u_logic|Knhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mww2z4~q ;
+wire \soc_inst|m0_1|u_logic|Zgsvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hyy2z4~q ;
+wire \soc_inst|m0_1|u_logic|T4nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T4nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ocfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rafwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rni2z4~q ;
+wire \soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|L753z4~q ;
+wire \soc_inst|m0_1|u_logic|Punvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qi03z4~q ;
+wire \soc_inst|m0_1|u_logic|Wlz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Punvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Kf13z4~q ;
+wire \soc_inst|m0_1|u_logic|To23z4~q ;
+wire \soc_inst|m0_1|u_logic|Punvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Punvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Punvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|T50wx4~0_combout ;
+wire \soc_inst|ram_1|byte1~0_combout ;
+wire \soc_inst|ram_1|data_to_memory[14]~30_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30 ;
+wire \soc_inst|interconnect_1|HRDATA[30]~34_combout ;
+wire \soc_inst|m0_1|u_logic|Wmhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qzw2z4~q ;
+wire \soc_inst|m0_1|u_logic|M4nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|N8nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fey2z4~q ;
+wire \soc_inst|m0_1|u_logic|M4nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|M4nvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Mhgwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Iikwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Md6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dc6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dc6wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|R8d2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uijwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qf6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uv6wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Q86wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Q86wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Vsywx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|C6mwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rqywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C6mwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|V5mwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G9w2z4~q ;
+wire \soc_inst|m0_1|u_logic|Xf6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ua6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q86wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gpjwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q86wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Q86wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Q86wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Q86wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Jm6wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Jm6wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Jm6wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Eyhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ad7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|P28wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Jm6wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Hyewx4~combout ;
+wire \soc_inst|m0_1|u_logic|Jm6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jm6wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Jm6wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Xt6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q07wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|X07wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q07wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xt6wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Jm6wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Eyhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Pdi2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add5~93_sumout ;
+wire \soc_inst|m0_1|u_logic|Cxhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cxhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fcj2z4~q ;
+wire \soc_inst|m0_1|u_logic|Vllvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qnyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vllvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|U4z2z4~q ;
+wire \soc_inst|m0_1|u_logic|Htyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cy33z4~q ;
+wire \soc_inst|m0_1|u_logic|Htyvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|L753z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Htyvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Htyvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|R0t2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rexvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Scpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z5pvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|It52z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|It52z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|It52z4~2_combout ;
+wire \soc_inst|ram_1|byte0~0_combout ;
+wire \soc_inst|ram_1|data_to_memory[5]~23_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ;
+wire \soc_inst|switches_1|switch_store[0][5]~q ;
+wire \soc_inst|interconnect_1|HRDATA[5]~28_combout ;
+wire \soc_inst|m0_1|u_logic|Yanvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F0y2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wamvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tdp2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ye4wx4~combout ;
+wire \soc_inst|m0_1|u_logic|S4w2z4~q ;
+wire \soc_inst|m0_1|u_logic|Zdc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Skc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ekc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mhc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mhc2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Dcrwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Dcrwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dcrwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Dcrwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Dcrwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Mac2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kgc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dcrwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Dcrwx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Qaiwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H4nwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Add2~2 ;
+wire \soc_inst|m0_1|u_logic|Add2~5_sumout ;
+wire \soc_inst|m0_1|u_logic|Wthvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wthvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|J0l2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~10 ;
+wire \soc_inst|m0_1|u_logic|Add3~6 ;
+wire \soc_inst|m0_1|u_logic|Add3~1_sumout ;
+wire \soc_inst|m0_1|u_logic|Rbi3z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rbi3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ueovx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qbpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tohvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sow2z4~q ;
+wire \soc_inst|m0_1|u_logic|C6nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|C6nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C6nvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Z5wvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I3mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ndwvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I3mvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ggswx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ggswx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ggswx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Yaz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Q2q2z4~q ;
+wire \soc_inst|m0_1|u_logic|S71wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|S71wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|R21xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hmv2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|S71wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|D603z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|S71wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Hi83z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|S71wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S71wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|S71wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Bq5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Axm2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Axm2z4~q ;
+wire \soc_inst|m0_1|u_logic|Luywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Luywx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Lhd3z4~q ;
+wire \soc_inst|m0_1|u_logic|Luywx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Luywx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Luywx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Fed3z4~q ;
+wire \soc_inst|m0_1|u_logic|Luywx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Luywx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|C6mwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C6mwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Abovx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zlnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nbm2z4~q ;
+wire \soc_inst|m0_1|u_logic|By4wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Y6t2z4~q ;
+wire \soc_inst|m0_1|u_logic|Z0mwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|hprot_o~2_combout ;
+wire \soc_inst|m0_1|u_logic|hprot_o~3_combout ;
+wire \soc_inst|m0_1|u_logic|hprot_o~1_combout ;
+wire \soc_inst|m0_1|u_logic|Jbhwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qx52z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|hprot_o~4_combout ;
+wire \soc_inst|m0_1|u_logic|hprot_o~5_combout ;
+wire \soc_inst|m0_1|u_logic|E7mwx4~combout ;
+wire \soc_inst|ram_1|always1~0_combout ;
+wire \soc_inst|ram_1|write_cycle~0_combout ;
+wire \soc_inst|ram_1|write_cycle~DUPLICATE_q ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ;
+wire \soc_inst|m0_1|u_logic|Rnhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xuw2z4~q ;
+wire \soc_inst|m0_1|u_logic|Oesvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|A5nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|A5nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Swy2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ahhwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I0hwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ugewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~18_combout ;
+wire \soc_inst|m0_1|u_logic|P0hwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~10_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~9_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~11_combout ;
+wire \soc_inst|m0_1|u_logic|Thgwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hahwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mhgwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|P0hwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Bhewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~12_combout ;
+wire \soc_inst|m0_1|u_logic|Kugwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~13_combout ;
+wire \soc_inst|m0_1|u_logic|Ekgwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Poa2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~14_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~15_combout ;
+wire \soc_inst|m0_1|u_logic|Togwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Togwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Togwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Togwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~16_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~17_combout ;
+wire \soc_inst|m0_1|u_logic|I0hwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zygwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tvgwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tvgwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|P0hwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Sgj2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qr42z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qr42z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|I6qvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nfnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|G1mwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|P2mwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|hwrite_o~0_combout ;
+wire \soc_inst|ram_1|read_cycle~0_combout ;
+wire \soc_inst|ram_1|read_cycle~q ;
+wire \soc_inst|interconnect_1|HRDATA[29]~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ajnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dnhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Byw2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ajnvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ajnvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Qem2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qllwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qllwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Qllwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Qllwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Wfhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wfhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wfhvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Fjewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fjewx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ajfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ajfwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zlfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ajfwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Lsfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Infwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lsfwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ajfwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ajfwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Ajfwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Vqfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rvfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|L6gwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rvfwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rvfwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Rvfwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Cyfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B1gwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|K2gwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B1gwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B1gwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ccgwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y9gwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K9gwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D9gwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|E6gwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|E6gwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rvfwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ajfwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ffj2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wdxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Amjwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D5kwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Amjwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Amjwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Amjwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Amjwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Amjwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Tsjwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R3fwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zvjwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|My6wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xujwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|E2kwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Htjwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Htjwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Htjwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Htjwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Qujwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Drjwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Krjwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Amjwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ark2z4~q ;
+wire \soc_inst|m0_1|u_logic|A0zvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hohwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xphwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rmhwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rmhwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Rmhwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rmhwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Rmhwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Rmhwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Fuhwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|K0iwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K0iwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fuhwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fuhwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Fuhwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Fuhwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Sjhwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tghwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fghwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ejhwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ndhwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ndhwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ndhwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ndhwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ndhwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Ndhwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Fij2z4~q ;
+wire \soc_inst|m0_1|u_logic|B1vvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|hprot_o~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mrsvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C4d2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O3d2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mrsvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|G6d2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z5d2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|L5d2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|P7d2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|L7fwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mrsvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Aekwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mrsvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Mrsvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|haddr_o~0_combout ;
+wire \soc_inst|interconnect_1|LessThan0~0_combout ;
+wire \soc_inst|interconnect_1|Equal1~0_combout ;
+wire \soc_inst|switches_1|switch_store[1][8]~q ;
+wire \soc_inst|interconnect_1|HRDATA[24]~31_combout ;
+wire \soc_inst|m0_1|u_logic|Mohvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gqw2z4~q ;
+wire \soc_inst|m0_1|u_logic|V5nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|V5nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|V5nvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Fkkwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fkkwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Pikwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Askwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Mkkwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Mkkwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Lgkwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Unewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Unewx4~combout ;
+wire \soc_inst|m0_1|u_logic|T6kwx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Askwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T6kwx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Q8kwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T6kwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Mkkwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hekwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T6kwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|T6kwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Bbkwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T6kwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|T6kwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|T6kwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T6kwx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Ruhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|M9pvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xdfwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Add2~9_sumout ;
+wire \soc_inst|m0_1|u_logic|Thhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Thhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Thhvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Jux2z4~q ;
+wire \soc_inst|m0_1|u_logic|Msyvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Hvhwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ubjwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ubjwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|S3jwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X2jwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ehjwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ofjwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lhjwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ofjwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Lwiwx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Q2jwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Iyiwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Iyiwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Lwiwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lwiwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Eajwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q9jwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lwiwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Lwiwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Lwiwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|T7jwx4~combout ;
+wire \soc_inst|m0_1|u_logic|R6jwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q6fwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q6fwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Lwiwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Pyiwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pyiwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fvhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Npk2z4~q ;
+wire \soc_inst|m0_1|u_logic|Y8pvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ipsvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Scpvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Scpvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Wfovx4~combout ;
+wire \soc_inst|m0_1|u_logic|Jvqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jnrvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jhy2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pfovx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ynhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Itw2z4~q ;
+wire \soc_inst|m0_1|u_logic|Dcsvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H5nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H5nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Dvy2z4~q ;
+wire \soc_inst|m0_1|u_logic|G27wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Blwvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pw6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pw6wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|H3ivx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|H3ivx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ws3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H3ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Av3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Av3wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Av3wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Av3wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Av3wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Vac3z4~q ;
+wire \soc_inst|m0_1|u_logic|Av3wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Av3wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Av3wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Av3wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Av3wx4~9_combout ;
+wire \soc_inst|m0_1|u_logic|Ny3wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ny3wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ny3wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Ny3wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Av3wx4~10_combout ;
+wire \soc_inst|m0_1|u_logic|Av3wx4~11_combout ;
+wire \soc_inst|m0_1|u_logic|H3ivx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|H3ivx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Gji2z4~q ;
+wire \soc_inst|m0_1|u_logic|Lfewx4~combout ;
+wire \soc_inst|m0_1|u_logic|Pw6wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Pw6wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Fcewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fcewx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Sfewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sfewx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Pw6wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Akewx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Yiewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pw6wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Vz6wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Pw6wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Pcyvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Duc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y1d2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y1d2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Y1d2z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|K1wvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Add3~5_sumout ;
+wire \soc_inst|m0_1|u_logic|haddr_o~1_combout ;
+wire \soc_inst|interconnect_1|LessThan1~0_combout ;
+wire \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0_combout ;
+wire \soc_inst|interconnect_1|HREADY~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cdnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ivewx4~combout ;
+wire \soc_inst|m0_1|u_logic|E7fwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dwewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dwewx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Bvewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Woewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Woewx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Woewx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Woewx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Woewx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Woewx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Woewx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Woewx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Woewx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|E0fwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|E0fwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|E0fwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Woewx4~9_combout ;
+wire \soc_inst|m0_1|u_logic|Qxhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Emi2z4~q ;
+wire \soc_inst|m0_1|u_logic|Xslwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xslwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xslwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Xslwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Xslwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Etlwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ushvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O5t2z4~q ;
+wire \soc_inst|m0_1|u_logic|Sbiwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sbiwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Sbiwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Wkiwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wkiwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wkiwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Wkiwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Wkiwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Wkiwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Idiwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sbiwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ttiwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ttiwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Sbiwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Agiwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yeiwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sbiwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Sbiwx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Mvhvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Aok2z4~q ;
+wire \soc_inst|m0_1|u_logic|G97wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z5pvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Q5c2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z5pvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Z5pvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Z5pvx4~4_combout ;
+wire \running~feeder_combout ;
+wire \running~q ;
+wire \raz_inst|Add1~37_sumout ;
+wire \raz_inst|Add0~25_sumout ;
+wire \raz_inst|H_count[0]~DUPLICATE_q ;
+wire \raz_inst|Add0~26 ;
+wire \raz_inst|Add0~29_sumout ;
+wire \raz_inst|Add0~30 ;
+wire \raz_inst|Add0~21_sumout ;
+wire \raz_inst|Add0~22 ;
+wire \raz_inst|Add0~37_sumout ;
+wire \raz_inst|Add0~38 ;
+wire \raz_inst|Add0~41_sumout ;
+wire \raz_inst|Add0~42 ;
+wire \raz_inst|Add0~33_sumout ;
+wire \raz_inst|Add0~34 ;
+wire \raz_inst|Add0~17_sumout ;
+wire \raz_inst|Add0~18 ;
+wire \raz_inst|Add0~5_sumout ;
+wire \raz_inst|Add0~6 ;
+wire \raz_inst|Add0~9_sumout ;
+wire \raz_inst|Add0~10 ;
+wire \raz_inst|Add0~14 ;
+wire \raz_inst|Add0~1_sumout ;
+wire \raz_inst|H_count[1]~DUPLICATE_q ;
+wire \raz_inst|LessThan0~0_combout ;
+wire \raz_inst|LessThan0~2_combout ;
+wire \raz_inst|LessThan0~1_combout ;
+wire \raz_inst|LessThan0~3_combout ;
+wire \raz_inst|Add0~13_sumout ;
+wire \raz_inst|Add1~2 ;
+wire \raz_inst|Add1~9_sumout ;
+wire \raz_inst|Equal0~3_combout ;
+wire \raz_inst|Equal0~1_combout ;
+wire \raz_inst|Equal0~0_combout ;
+wire \raz_inst|Equal0~4_combout ;
+wire \raz_inst|Add1~10 ;
+wire \raz_inst|Add1~13_sumout ;
+wire \raz_inst|Add1~14 ;
+wire \raz_inst|Add1~17_sumout ;
+wire \raz_inst|Add1~18 ;
+wire \raz_inst|Add1~21_sumout ;
+wire \raz_inst|always0~2_combout ;
+wire \raz_inst|always0~3_combout ;
+wire \raz_inst|always0~4_combout ;
+wire \raz_inst|LessThan4~1_combout ;
+wire \raz_inst|H_count~1_combout ;
+wire \raz_inst|H_count~0_combout ;
+wire \raz_inst|always0~13_combout ;
+wire \raz_inst|always0~14_combout ;
+wire \raz_inst|Add1~38 ;
+wire \raz_inst|Add1~41_sumout ;
+wire \raz_inst|Add1~42 ;
+wire \raz_inst|Add1~25_sumout ;
+wire \raz_inst|Add1~26 ;
+wire \raz_inst|Add1~29_sumout ;
+wire \raz_inst|Add1~30 ;
+wire \raz_inst|Add1~33_sumout ;
+wire \raz_inst|Add1~34 ;
+wire \raz_inst|Add1~5_sumout ;
+wire \raz_inst|Add1~6 ;
+wire \raz_inst|Add1~1_sumout ;
+wire \soc_inst|pix1|Add1~26 ;
+wire \soc_inst|pix1|Add1~27 ;
+wire \soc_inst|pix1|Add1~30 ;
+wire \soc_inst|pix1|Add1~31 ;
+wire \soc_inst|pix1|Add1~34 ;
+wire \soc_inst|pix1|Add1~35 ;
+wire \soc_inst|pix1|Add1~38 ;
+wire \soc_inst|pix1|Add1~39 ;
+wire \soc_inst|pix1|Add1~42 ;
+wire \soc_inst|pix1|Add1~43 ;
+wire \soc_inst|pix1|Add1~46 ;
+wire \soc_inst|pix1|Add1~47 ;
+wire \soc_inst|pix1|Add1~18 ;
+wire \soc_inst|pix1|Add1~19 ;
+wire \soc_inst|pix1|Add1~22 ;
+wire \soc_inst|pix1|Add1~23 ;
+wire \soc_inst|pix1|Add1~13_sumout ;
+wire \soc_inst|pix1|always0~0_combout ;
+wire \soc_inst|pix1|write_enable~q ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0_combout ;
+wire \soc_inst|pix1|Add1~25_sumout ;
+wire \soc_inst|pix1|Add1~29_sumout ;
+wire \soc_inst|pix1|Add1~33_sumout ;
+wire \soc_inst|pix1|Add1~37_sumout ;
+wire \soc_inst|pix1|Add1~41_sumout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37~portbdataout ;
+wire \soc_inst|pix1|Add1~17_sumout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0_combout ;
+wire \soc_inst|pix1|Add1~45_sumout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36~portbdataout ;
+wire \soc_inst|pix1|Add1~21_sumout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout ;
+wire \raz_inst|Red~0_combout ;
+wire \raz_inst|always0~0_combout ;
+wire \raz_inst|LessThan4~0_combout ;
+wire \raz_inst|always0~1_combout ;
+wire \raz_inst|LessThan8~2_combout ;
+wire \raz_inst|LessThan8~3_combout ;
+wire \raz_inst|Equal0~2_combout ;
+wire \raz_inst|LessThan8~1_combout ;
+wire \raz_inst|LessThan8~0_combout ;
+wire \raz_inst|LessThan8~4_combout ;
+wire \raz_inst|video_on_V~q ;
+wire \raz_inst|LessThan7~0_combout ;
+wire \raz_inst|video_on_H~q ;
+wire \raz_inst|VGA_BLANK_N~combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout ;
+wire \soc_inst|pix1|Add1~14 ;
+wire \soc_inst|pix1|Add1~15 ;
+wire \soc_inst|pix1|Add1~9_sumout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~1_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~1_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~1_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2799w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4_combout ;
+wire \soc_inst|pix1|Add1~10 ;
+wire \soc_inst|pix1|Add1~11 ;
+wire \soc_inst|pix1|Add1~5_sumout ;
+wire \soc_inst|pix1|Add1~6 ;
+wire \soc_inst|pix1|Add1~7 ;
+wire \soc_inst|pix1|Add1~1_sumout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3]~DUPLICATE_q ;
+wire \raz_inst|Red~1_combout ;
+wire \raz_inst|always0~6_combout ;
+wire \raz_inst|always0~5_combout ;
+wire \raz_inst|always0~7_combout ;
+wire \raz_inst|VGA_HS~0_combout ;
+wire \raz_inst|VGA_HS~q ;
+wire \raz_inst|always0~9_combout ;
+wire \raz_inst|always0~10_combout ;
+wire \raz_inst|always0~8_combout ;
+wire \raz_inst|always0~11_combout ;
+wire \raz_inst|always0~12_combout ;
+wire \raz_inst|VGA_VS~q ;
+wire [1:0] \soc_inst|switches_1|last_buttons ;
+wire [12:0] \soc_inst|ram_1|saved_word_address ;
+wire [31:0] \soc_inst|m0_1|u_logic|haddr_o ;
+wire [10:0] \raz_inst|H_count ;
+wire [5:0] \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b ;
+wire [18:0] \soc_inst|pix1|word_address ;
+wire [1:0] \soc_inst|switches_1|DataValid ;
+wire [25:0] tick_count;
+wire [2:0] \soc_inst|interconnect_1|mux_sel ;
+wire [3:0] \soc_inst|ram_1|byte_select ;
+wire [1:0] \soc_inst|switches_1|half_word_address ;
+wire [10:0] \raz_inst|V_count ;
+wire [31:0] \soc_inst|m0_1|u_logic|hwdata_o ;
+
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35_PORTBDATAOUT_bus ;
+wire [1:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11_PORTBDATAOUT_bus ;
+wire [0:0] \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15_PORTBDATAOUT_bus ;
+wire [1:0] \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15_PORTBDATAOUT_bus ;
+wire [1:0] \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7_PORTBDATAOUT_bus ;
+wire [1:0] \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10_PORTBDATAOUT_bus ;
+wire [1:0] \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2_PORTBDATAOUT_bus ;
+wire [1:0] \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9_PORTBDATAOUT_bus ;
+wire [1:0] \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1_PORTBDATAOUT_bus ;
+wire [1:0] \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12_PORTBDATAOUT_bus ;
+wire [1:0] \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4_PORTBDATAOUT_bus ;
+wire [1:0] \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11_PORTBDATAOUT_bus ;
+wire [1:0] \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3_PORTBDATAOUT_bus ;
+wire [1:0] \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13_PORTBDATAOUT_bus ;
+wire [1:0] \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5_PORTBDATAOUT_bus ;
+wire [1:0] \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16_PORTBDATAOUT_bus ;
+wire [1:0] \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0_PORTBDATAOUT_bus ;
+wire [1:0] \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14_PORTBDATAOUT_bus ;
+wire [1:0] \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6_PORTBDATAOUT_bus ;
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout = \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15_PORTBDATAOUT_bus [0];
+
+assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15_PORTBDATAOUT_bus [0];
+assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31 = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15_PORTBDATAOUT_bus [1];
+
+assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7_PORTBDATAOUT_bus [0];
+assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23 = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7_PORTBDATAOUT_bus [1];
+
+assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10_PORTBDATAOUT_bus [0];
+assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18 = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10_PORTBDATAOUT_bus [1];
+
+assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2_PORTBDATAOUT_bus [0];
+assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2_PORTBDATAOUT_bus [1];
+
+assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9_PORTBDATAOUT_bus [0];
+assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9_PORTBDATAOUT_bus [1];
+
+assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1_PORTBDATAOUT_bus [0];
+assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25 = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1_PORTBDATAOUT_bus [1];
+
+assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12_PORTBDATAOUT_bus [0];
+assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12_PORTBDATAOUT_bus [1];
+
+assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4_PORTBDATAOUT_bus [0];
+assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4_PORTBDATAOUT_bus [1];
+
+assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11_PORTBDATAOUT_bus [0];
+assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19 = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11_PORTBDATAOUT_bus [1];
+
+assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3_PORTBDATAOUT_bus [0];
+assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3_PORTBDATAOUT_bus [1];
+
+assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13_PORTBDATAOUT_bus [0];
+assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13_PORTBDATAOUT_bus [1];
+
+assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5_PORTBDATAOUT_bus [0];
+assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21 = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5_PORTBDATAOUT_bus [1];
+
+assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16_PORTBDATAOUT_bus [0];
+assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24 = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16_PORTBDATAOUT_bus [1];
+
+assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0_PORTBDATAOUT_bus [0];
+assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8 = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0_PORTBDATAOUT_bus [1];
+
+assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14_PORTBDATAOUT_bus [0];
+assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30 = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14_PORTBDATAOUT_bus [1];
+
+assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6_PORTBDATAOUT_bus [0];
+assign \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22 = \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6_PORTBDATAOUT_bus [1];
+
+// Location: IOOBUF_X24_Y81_N2
+cyclonev_io_obuf \LEDR[0]~output (
+ .i(gnd),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(LEDR[0]),
+ .obar());
+// synopsys translate_off
+defparam \LEDR[0]~output .bus_hold = "false";
+defparam \LEDR[0]~output .open_drain_output = "false";
+defparam \LEDR[0]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X2_Y81_N76
+cyclonev_io_obuf \LEDR[1]~output (
+ .i(gnd),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(LEDR[1]),
+ .obar());
+// synopsys translate_off
+defparam \LEDR[1]~output .bus_hold = "false";
+defparam \LEDR[1]~output .open_drain_output = "false";
+defparam \LEDR[1]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X34_Y81_N93
+cyclonev_io_obuf \LEDR[2]~output (
+ .i(gnd),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(LEDR[2]),
+ .obar());
+// synopsys translate_off
+defparam \LEDR[2]~output .bus_hold = "false";
+defparam \LEDR[2]~output .open_drain_output = "false";
+defparam \LEDR[2]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X70_Y0_N36
+cyclonev_io_obuf \LEDR[3]~output (
+ .i(gnd),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(LEDR[3]),
+ .obar());
+// synopsys translate_off
+defparam \LEDR[3]~output .bus_hold = "false";
+defparam \LEDR[3]~output .open_drain_output = "false";
+defparam \LEDR[3]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X89_Y23_N56
+cyclonev_io_obuf \LEDR[4]~output (
+ .i(gnd),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(LEDR[4]),
+ .obar());
+// synopsys translate_off
+defparam \LEDR[4]~output .bus_hold = "false";
+defparam \LEDR[4]~output .open_drain_output = "false";
+defparam \LEDR[4]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X88_Y0_N3
+cyclonev_io_obuf \LEDR[5]~output (
+ .i(gnd),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(LEDR[5]),
+ .obar());
+// synopsys translate_off
+defparam \LEDR[5]~output .bus_hold = "false";
+defparam \LEDR[5]~output .open_drain_output = "false";
+defparam \LEDR[5]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X10_Y0_N42
+cyclonev_io_obuf \LEDR[6]~output (
+ .i(gnd),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(LEDR[6]),
+ .obar());
+// synopsys translate_off
+defparam \LEDR[6]~output .bus_hold = "false";
+defparam \LEDR[6]~output .open_drain_output = "false";
+defparam \LEDR[6]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X54_Y0_N53
+cyclonev_io_obuf \LEDR[7]~output (
+ .i(gnd),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(LEDR[7]),
+ .obar());
+// synopsys translate_off
+defparam \LEDR[7]~output .bus_hold = "false";
+defparam \LEDR[7]~output .open_drain_output = "false";
+defparam \LEDR[7]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X89_Y6_N22
+cyclonev_io_obuf \LEDR[8]~output (
+ .i(gnd),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(LEDR[8]),
+ .obar());
+// synopsys translate_off
+defparam \LEDR[8]~output .bus_hold = "false";
+defparam \LEDR[8]~output .open_drain_output = "false";
+defparam \LEDR[8]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X26_Y81_N93
+cyclonev_io_obuf \LEDR[9]~output (
+ .i(gnd),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(LEDR[9]),
+ .obar());
+// synopsys translate_off
+defparam \LEDR[9]~output .bus_hold = "false";
+defparam \LEDR[9]~output .open_drain_output = "false";
+defparam \LEDR[9]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X20_Y0_N19
+cyclonev_io_obuf \HEX0[0]~output (
+ .i(vcc),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(HEX0[0]),
+ .obar());
+// synopsys translate_off
+defparam \HEX0[0]~output .bus_hold = "false";
+defparam \HEX0[0]~output .open_drain_output = "false";
+defparam \HEX0[0]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X4_Y81_N53
+cyclonev_io_obuf \HEX0[1]~output (
+ .i(vcc),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(HEX0[1]),
+ .obar());
+// synopsys translate_off
+defparam \HEX0[1]~output .bus_hold = "false";
+defparam \HEX0[1]~output .open_drain_output = "false";
+defparam \HEX0[1]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X52_Y0_N19
+cyclonev_io_obuf \HEX0[2]~output (
+ .i(!\heartbeat~q ),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(HEX0[2]),
+ .obar());
+// synopsys translate_off
+defparam \HEX0[2]~output .bus_hold = "false";
+defparam \HEX0[2]~output .open_drain_output = "false";
+defparam \HEX0[2]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X56_Y0_N2
+cyclonev_io_obuf \HEX0[3]~output (
+ .i(!\heartbeat~q ),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(HEX0[3]),
+ .obar());
+// synopsys translate_off
+defparam \HEX0[3]~output .bus_hold = "false";
+defparam \HEX0[3]~output .open_drain_output = "false";
+defparam \HEX0[3]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X56_Y0_N19
+cyclonev_io_obuf \HEX0[4]~output (
+ .i(!\heartbeat~q ),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(HEX0[4]),
+ .obar());
+// synopsys translate_off
+defparam \HEX0[4]~output .bus_hold = "false";
+defparam \HEX0[4]~output .open_drain_output = "false";
+defparam \HEX0[4]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X32_Y81_N19
+cyclonev_io_obuf \HEX0[5]~output (
+ .i(vcc),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(HEX0[5]),
+ .obar());
+// synopsys translate_off
+defparam \HEX0[5]~output .bus_hold = "false";
+defparam \HEX0[5]~output .open_drain_output = "false";
+defparam \HEX0[5]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X52_Y0_N36
+cyclonev_io_obuf \HEX0[6]~output (
+ .i(!\heartbeat~q ),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(HEX0[6]),
+ .obar());
+// synopsys translate_off
+defparam \HEX0[6]~output .bus_hold = "false";
+defparam \HEX0[6]~output .open_drain_output = "false";
+defparam \HEX0[6]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X26_Y0_N93
+cyclonev_io_obuf \HEX1[0]~output (
+ .i(\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(HEX1[0]),
+ .obar());
+// synopsys translate_off
+defparam \HEX1[0]~output .bus_hold = "false";
+defparam \HEX1[0]~output .open_drain_output = "false";
+defparam \HEX1[0]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X89_Y21_N39
+cyclonev_io_obuf \HEX1[1]~output (
+ .i(vcc),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(HEX1[1]),
+ .obar());
+// synopsys translate_off
+defparam \HEX1[1]~output .bus_hold = "false";
+defparam \HEX1[1]~output .open_drain_output = "false";
+defparam \HEX1[1]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X52_Y0_N2
+cyclonev_io_obuf \HEX1[2]~output (
+ .i(vcc),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(HEX1[2]),
+ .obar());
+// synopsys translate_off
+defparam \HEX1[2]~output .bus_hold = "false";
+defparam \HEX1[2]~output .open_drain_output = "false";
+defparam \HEX1[2]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X10_Y81_N59
+cyclonev_io_obuf \HEX1[3]~output (
+ .i(vcc),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(HEX1[3]),
+ .obar());
+// synopsys translate_off
+defparam \HEX1[3]~output .bus_hold = "false";
+defparam \HEX1[3]~output .open_drain_output = "false";
+defparam \HEX1[3]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X8_Y0_N53
+cyclonev_io_obuf \HEX1[4]~output (
+ .i(vcc),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(HEX1[4]),
+ .obar());
+// synopsys translate_off
+defparam \HEX1[4]~output .bus_hold = "false";
+defparam \HEX1[4]~output .open_drain_output = "false";
+defparam \HEX1[4]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X89_Y21_N5
+cyclonev_io_obuf \HEX1[5]~output (
+ .i(vcc),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(HEX1[5]),
+ .obar());
+// synopsys translate_off
+defparam \HEX1[5]~output .bus_hold = "false";
+defparam \HEX1[5]~output .open_drain_output = "false";
+defparam \HEX1[5]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X30_Y0_N36
+cyclonev_io_obuf \HEX1[6]~output (
+ .i(vcc),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(HEX1[6]),
+ .obar());
+// synopsys translate_off
+defparam \HEX1[6]~output .bus_hold = "false";
+defparam \HEX1[6]~output .open_drain_output = "false";
+defparam \HEX1[6]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X2_Y0_N42
+cyclonev_io_obuf \HEX2[0]~output (
+ .i(vcc),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(HEX2[0]),
+ .obar());
+// synopsys translate_off
+defparam \HEX2[0]~output .bus_hold = "false";
+defparam \HEX2[0]~output .open_drain_output = "false";
+defparam \HEX2[0]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X50_Y0_N42
+cyclonev_io_obuf \HEX2[1]~output (
+ .i(vcc),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(HEX2[1]),
+ .obar());
+// synopsys translate_off
+defparam \HEX2[1]~output .bus_hold = "false";
+defparam \HEX2[1]~output .open_drain_output = "false";
+defparam \HEX2[1]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X22_Y81_N2
+cyclonev_io_obuf \HEX2[2]~output (
+ .i(vcc),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(HEX2[2]),
+ .obar());
+// synopsys translate_off
+defparam \HEX2[2]~output .bus_hold = "false";
+defparam \HEX2[2]~output .open_drain_output = "false";
+defparam \HEX2[2]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X16_Y81_N19
+cyclonev_io_obuf \HEX2[3]~output (
+ .i(vcc),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(HEX2[3]),
+ .obar());
+// synopsys translate_off
+defparam \HEX2[3]~output .bus_hold = "false";
+defparam \HEX2[3]~output .open_drain_output = "false";
+defparam \HEX2[3]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X89_Y20_N96
+cyclonev_io_obuf \HEX2[4]~output (
+ .i(!\running~q ),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(HEX2[4]),
+ .obar());
+// synopsys translate_off
+defparam \HEX2[4]~output .bus_hold = "false";
+defparam \HEX2[4]~output .open_drain_output = "false";
+defparam \HEX2[4]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X68_Y0_N2
+cyclonev_io_obuf \HEX2[5]~output (
+ .i(vcc),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(HEX2[5]),
+ .obar());
+// synopsys translate_off
+defparam \HEX2[5]~output .bus_hold = "false";
+defparam \HEX2[5]~output .open_drain_output = "false";
+defparam \HEX2[5]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X89_Y20_N79
+cyclonev_io_obuf \HEX2[6]~output (
+ .i(!\running~q ),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(HEX2[6]),
+ .obar());
+// synopsys translate_off
+defparam \HEX2[6]~output .bus_hold = "false";
+defparam \HEX2[6]~output .open_drain_output = "false";
+defparam \HEX2[6]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X89_Y4_N79
+cyclonev_io_obuf \HEX3[0]~output (
+ .i(vcc),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(HEX3[0]),
+ .obar());
+// synopsys translate_off
+defparam \HEX3[0]~output .bus_hold = "false";
+defparam \HEX3[0]~output .open_drain_output = "false";
+defparam \HEX3[0]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X22_Y0_N19
+cyclonev_io_obuf \HEX3[1]~output (
+ .i(vcc),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(HEX3[1]),
+ .obar());
+// synopsys translate_off
+defparam \HEX3[1]~output .bus_hold = "false";
+defparam \HEX3[1]~output .open_drain_output = "false";
+defparam \HEX3[1]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X82_Y0_N42
+cyclonev_io_obuf \HEX3[2]~output (
+ .i(vcc),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(HEX3[2]),
+ .obar());
+// synopsys translate_off
+defparam \HEX3[2]~output .bus_hold = "false";
+defparam \HEX3[2]~output .open_drain_output = "false";
+defparam \HEX3[2]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X34_Y0_N59
+cyclonev_io_obuf \HEX3[3]~output (
+ .i(!\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(HEX3[3]),
+ .obar());
+// synopsys translate_off
+defparam \HEX3[3]~output .bus_hold = "false";
+defparam \HEX3[3]~output .open_drain_output = "false";
+defparam \HEX3[3]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X28_Y0_N53
+cyclonev_io_obuf \HEX3[4]~output (
+ .i(!\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(HEX3[4]),
+ .obar());
+// synopsys translate_off
+defparam \HEX3[4]~output .bus_hold = "false";
+defparam \HEX3[4]~output .open_drain_output = "false";
+defparam \HEX3[4]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X34_Y0_N93
+cyclonev_io_obuf \HEX3[5]~output (
+ .i(!\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(HEX3[5]),
+ .obar());
+// synopsys translate_off
+defparam \HEX3[5]~output .bus_hold = "false";
+defparam \HEX3[5]~output .open_drain_output = "false";
+defparam \HEX3[5]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X89_Y21_N22
+cyclonev_io_obuf \HEX3[6]~output (
+ .i(vcc),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(HEX3[6]),
+ .obar());
+// synopsys translate_off
+defparam \HEX3[6]~output .bus_hold = "false";
+defparam \HEX3[6]~output .open_drain_output = "false";
+defparam \HEX3[6]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X30_Y0_N19
+cyclonev_io_obuf \VGA_R[0]~output (
+ .i(\raz_inst|Red~1_combout ),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(VGA_R[0]),
+ .obar());
+// synopsys translate_off
+defparam \VGA_R[0]~output .bus_hold = "false";
+defparam \VGA_R[0]~output .open_drain_output = "false";
+defparam \VGA_R[0]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X12_Y0_N19
+cyclonev_io_obuf \VGA_R[1]~output (
+ .i(\raz_inst|Red~1_combout ),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(VGA_R[1]),
+ .obar());
+// synopsys translate_off
+defparam \VGA_R[1]~output .bus_hold = "false";
+defparam \VGA_R[1]~output .open_drain_output = "false";
+defparam \VGA_R[1]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X30_Y0_N2
+cyclonev_io_obuf \VGA_R[2]~output (
+ .i(\raz_inst|Red~1_combout ),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(VGA_R[2]),
+ .obar());
+// synopsys translate_off
+defparam \VGA_R[2]~output .bus_hold = "false";
+defparam \VGA_R[2]~output .open_drain_output = "false";
+defparam \VGA_R[2]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X12_Y0_N53
+cyclonev_io_obuf \VGA_R[3]~output (
+ .i(\raz_inst|Red~1_combout ),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(VGA_R[3]),
+ .obar());
+// synopsys translate_off
+defparam \VGA_R[3]~output .bus_hold = "false";
+defparam \VGA_R[3]~output .open_drain_output = "false";
+defparam \VGA_R[3]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X22_Y0_N36
+cyclonev_io_obuf \VGA_R[4]~output (
+ .i(\raz_inst|Red~1_combout ),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(VGA_R[4]),
+ .obar());
+// synopsys translate_off
+defparam \VGA_R[4]~output .bus_hold = "false";
+defparam \VGA_R[4]~output .open_drain_output = "false";
+defparam \VGA_R[4]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X14_Y0_N2
+cyclonev_io_obuf \VGA_R[5]~output (
+ .i(\raz_inst|Red~1_combout ),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(VGA_R[5]),
+ .obar());
+// synopsys translate_off
+defparam \VGA_R[5]~output .bus_hold = "false";
+defparam \VGA_R[5]~output .open_drain_output = "false";
+defparam \VGA_R[5]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X24_Y0_N53
+cyclonev_io_obuf \VGA_R[6]~output (
+ .i(\raz_inst|Red~1_combout ),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(VGA_R[6]),
+ .obar());
+// synopsys translate_off
+defparam \VGA_R[6]~output .bus_hold = "false";
+defparam \VGA_R[6]~output .open_drain_output = "false";
+defparam \VGA_R[6]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X20_Y0_N2
+cyclonev_io_obuf \VGA_R[7]~output (
+ .i(\raz_inst|Red~1_combout ),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(VGA_R[7]),
+ .obar());
+// synopsys translate_off
+defparam \VGA_R[7]~output .bus_hold = "false";
+defparam \VGA_R[7]~output .open_drain_output = "false";
+defparam \VGA_R[7]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X72_Y0_N2
+cyclonev_io_obuf \VGA_G[0]~output (
+ .i(gnd),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(VGA_G[0]),
+ .obar());
+// synopsys translate_off
+defparam \VGA_G[0]~output .bus_hold = "false";
+defparam \VGA_G[0]~output .open_drain_output = "false";
+defparam \VGA_G[0]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X56_Y0_N36
+cyclonev_io_obuf \VGA_G[1]~output (
+ .i(gnd),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(VGA_G[1]),
+ .obar());
+// synopsys translate_off
+defparam \VGA_G[1]~output .bus_hold = "false";
+defparam \VGA_G[1]~output .open_drain_output = "false";
+defparam \VGA_G[1]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X66_Y0_N42
+cyclonev_io_obuf \VGA_G[2]~output (
+ .i(gnd),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(VGA_G[2]),
+ .obar());
+// synopsys translate_off
+defparam \VGA_G[2]~output .bus_hold = "false";
+defparam \VGA_G[2]~output .open_drain_output = "false";
+defparam \VGA_G[2]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X32_Y81_N36
+cyclonev_io_obuf \VGA_G[3]~output (
+ .i(gnd),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(VGA_G[3]),
+ .obar());
+// synopsys translate_off
+defparam \VGA_G[3]~output .bus_hold = "false";
+defparam \VGA_G[3]~output .open_drain_output = "false";
+defparam \VGA_G[3]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X89_Y13_N22
+cyclonev_io_obuf \VGA_G[4]~output (
+ .i(gnd),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(VGA_G[4]),
+ .obar());
+// synopsys translate_off
+defparam \VGA_G[4]~output .bus_hold = "false";
+defparam \VGA_G[4]~output .open_drain_output = "false";
+defparam \VGA_G[4]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X30_Y0_N53
+cyclonev_io_obuf \VGA_G[5]~output (
+ .i(gnd),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(VGA_G[5]),
+ .obar());
+// synopsys translate_off
+defparam \VGA_G[5]~output .bus_hold = "false";
+defparam \VGA_G[5]~output .open_drain_output = "false";
+defparam \VGA_G[5]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X28_Y81_N2
+cyclonev_io_obuf \VGA_G[6]~output (
+ .i(gnd),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(VGA_G[6]),
+ .obar());
+// synopsys translate_off
+defparam \VGA_G[6]~output .bus_hold = "false";
+defparam \VGA_G[6]~output .open_drain_output = "false";
+defparam \VGA_G[6]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X66_Y0_N93
+cyclonev_io_obuf \VGA_G[7]~output (
+ .i(gnd),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(VGA_G[7]),
+ .obar());
+// synopsys translate_off
+defparam \VGA_G[7]~output .bus_hold = "false";
+defparam \VGA_G[7]~output .open_drain_output = "false";
+defparam \VGA_G[7]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X28_Y0_N2
+cyclonev_io_obuf \VGA_B[0]~output (
+ .i(gnd),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(VGA_B[0]),
+ .obar());
+// synopsys translate_off
+defparam \VGA_B[0]~output .bus_hold = "false";
+defparam \VGA_B[0]~output .open_drain_output = "false";
+defparam \VGA_B[0]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X10_Y81_N93
+cyclonev_io_obuf \VGA_B[1]~output (
+ .i(gnd),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(VGA_B[1]),
+ .obar());
+// synopsys translate_off
+defparam \VGA_B[1]~output .bus_hold = "false";
+defparam \VGA_B[1]~output .open_drain_output = "false";
+defparam \VGA_B[1]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X8_Y0_N36
+cyclonev_io_obuf \VGA_B[2]~output (
+ .i(gnd),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(VGA_B[2]),
+ .obar());
+// synopsys translate_off
+defparam \VGA_B[2]~output .bus_hold = "false";
+defparam \VGA_B[2]~output .open_drain_output = "false";
+defparam \VGA_B[2]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X20_Y81_N36
+cyclonev_io_obuf \VGA_B[3]~output (
+ .i(gnd),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(VGA_B[3]),
+ .obar());
+// synopsys translate_off
+defparam \VGA_B[3]~output .bus_hold = "false";
+defparam \VGA_B[3]~output .open_drain_output = "false";
+defparam \VGA_B[3]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X89_Y16_N39
+cyclonev_io_obuf \VGA_B[4]~output (
+ .i(gnd),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(VGA_B[4]),
+ .obar());
+// synopsys translate_off
+defparam \VGA_B[4]~output .bus_hold = "false";
+defparam \VGA_B[4]~output .open_drain_output = "false";
+defparam \VGA_B[4]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X22_Y0_N2
+cyclonev_io_obuf \VGA_B[5]~output (
+ .i(gnd),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(VGA_B[5]),
+ .obar());
+// synopsys translate_off
+defparam \VGA_B[5]~output .bus_hold = "false";
+defparam \VGA_B[5]~output .open_drain_output = "false";
+defparam \VGA_B[5]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X10_Y81_N76
+cyclonev_io_obuf \VGA_B[6]~output (
+ .i(gnd),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(VGA_B[6]),
+ .obar());
+// synopsys translate_off
+defparam \VGA_B[6]~output .bus_hold = "false";
+defparam \VGA_B[6]~output .open_drain_output = "false";
+defparam \VGA_B[6]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X8_Y81_N53
+cyclonev_io_obuf \VGA_B[7]~output (
+ .i(gnd),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(VGA_B[7]),
+ .obar());
+// synopsys translate_off
+defparam \VGA_B[7]~output .bus_hold = "false";
+defparam \VGA_B[7]~output .open_drain_output = "false";
+defparam \VGA_B[7]~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X36_Y0_N36
+cyclonev_io_obuf \VGA_HS~output (
+ .i(\raz_inst|VGA_HS~q ),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(VGA_HS),
+ .obar());
+// synopsys translate_off
+defparam \VGA_HS~output .bus_hold = "false";
+defparam \VGA_HS~output .open_drain_output = "false";
+defparam \VGA_HS~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X32_Y0_N2
+cyclonev_io_obuf \VGA_VS~output (
+ .i(\raz_inst|VGA_VS~q ),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(VGA_VS),
+ .obar());
+// synopsys translate_off
+defparam \VGA_VS~output .bus_hold = "false";
+defparam \VGA_VS~output .open_drain_output = "false";
+defparam \VGA_VS~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X52_Y0_N53
+cyclonev_io_obuf \VGA_CLK~output (
+ .i(tick_count[0]),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(VGA_CLK),
+ .obar());
+// synopsys translate_off
+defparam \VGA_CLK~output .bus_hold = "false";
+defparam \VGA_CLK~output .open_drain_output = "false";
+defparam \VGA_CLK~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOOBUF_X32_Y0_N19
+cyclonev_io_obuf \VGA_BLANK_N~output (
+ .i(\raz_inst|VGA_BLANK_N~combout ),
+ .oe(vcc),
+ .dynamicterminationcontrol(gnd),
+ .seriesterminationcontrol(16'b0000000000000000),
+ .parallelterminationcontrol(16'b0000000000000000),
+ .devoe(devoe),
+ .o(VGA_BLANK_N),
+ .obar());
+// synopsys translate_off
+defparam \VGA_BLANK_N~output .bus_hold = "false";
+defparam \VGA_BLANK_N~output .open_drain_output = "false";
+defparam \VGA_BLANK_N~output .shift_series_termination_control = "false";
+// synopsys translate_on
+
+// Location: IOIBUF_X89_Y23_N21
+cyclonev_io_ibuf \CLOCK_50~input (
+ .i(CLOCK_50),
+ .ibar(gnd),
+ .dynamicterminationcontrol(gnd),
+ .o(\CLOCK_50~input_o ));
+// synopsys translate_off
+defparam \CLOCK_50~input .bus_hold = "false";
+defparam \CLOCK_50~input .simulate_z_as = "z";
+// synopsys translate_on
+
+// Location: CLKCTRL_G8
+cyclonev_clkena \CLOCK_50~inputCLKENA0 (
+ .inclk(\CLOCK_50~input_o ),
+ .ena(vcc),
+ .outclk(\CLOCK_50~inputCLKENA0_outclk ),
+ .enaout());
+// synopsys translate_off
+defparam \CLOCK_50~inputCLKENA0 .clock_type = "global clock";
+defparam \CLOCK_50~inputCLKENA0 .disable_mode = "low";
+defparam \CLOCK_50~inputCLKENA0 .ena_register_mode = "always enabled";
+defparam \CLOCK_50~inputCLKENA0 .ena_register_power_up = "high";
+defparam \CLOCK_50~inputCLKENA0 .test_syn = "high";
+// synopsys translate_on
+
+// Location: MLABCELL_X52_Y4_N12
+cyclonev_lcell_comb \tick_count[0]~0 (
+// Equation(s):
+// \tick_count[0]~0_combout = ( !tick_count[0] )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!tick_count[0]),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\tick_count[0]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \tick_count[0]~0 .extended_lut = "off";
+defparam \tick_count[0]~0 .lut_mask = 64'hFFFF0000FFFF0000;
+defparam \tick_count[0]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: IOIBUF_X89_Y25_N21
+cyclonev_io_ibuf \KEY[2]~input (
+ .i(KEY[2]),
+ .ibar(gnd),
+ .dynamicterminationcontrol(gnd),
+ .o(\KEY[2]~input_o ));
+// synopsys translate_off
+defparam \KEY[2]~input .bus_hold = "false";
+defparam \KEY[2]~input .simulate_z_as = "z";
+// synopsys translate_on
+
+// Location: CLKCTRL_G10
+cyclonev_clkena \KEY[2]~inputCLKENA0 (
+ .inclk(\KEY[2]~input_o ),
+ .ena(vcc),
+ .outclk(\KEY[2]~inputCLKENA0_outclk ),
+ .enaout());
+// synopsys translate_off
+defparam \KEY[2]~inputCLKENA0 .clock_type = "global clock";
+defparam \KEY[2]~inputCLKENA0 .disable_mode = "low";
+defparam \KEY[2]~inputCLKENA0 .ena_register_mode = "always enabled";
+defparam \KEY[2]~inputCLKENA0 .ena_register_power_up = "high";
+defparam \KEY[2]~inputCLKENA0 .test_syn = "high";
+// synopsys translate_on
+
+// Location: FF_X52_Y4_N14
+dffeas \tick_count[0] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\tick_count[0]~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(tick_count[0]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \tick_count[0] .is_wysiwyg = "true";
+defparam \tick_count[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X56_Y2_N30
+cyclonev_lcell_comb \Add0~97 (
+// Equation(s):
+// \Add0~97_sumout = SUM(( tick_count[0] ) + ( tick_count[1] ) + ( !VCC ))
+// \Add0~98 = CARRY(( tick_count[0] ) + ( tick_count[1] ) + ( !VCC ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!tick_count[1]),
+ .datad(!tick_count[0]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\Add0~97_sumout ),
+ .cout(\Add0~98 ),
+ .shareout());
+// synopsys translate_off
+defparam \Add0~97 .extended_lut = "off";
+defparam \Add0~97 .lut_mask = 64'h0000F0F0000000FF;
+defparam \Add0~97 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X56_Y2_N31
+dffeas \tick_count[1] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\Add0~97_sumout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(tick_count[1]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \tick_count[1] .is_wysiwyg = "true";
+defparam \tick_count[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X56_Y2_N33
+cyclonev_lcell_comb \Add0~93 (
+// Equation(s):
+// \Add0~93_sumout = SUM(( tick_count[2] ) + ( GND ) + ( \Add0~98 ))
+// \Add0~94 = CARRY(( tick_count[2] ) + ( GND ) + ( \Add0~98 ))
+
+ .dataa(!tick_count[2]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\Add0~98 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\Add0~93_sumout ),
+ .cout(\Add0~94 ),
+ .shareout());
+// synopsys translate_off
+defparam \Add0~93 .extended_lut = "off";
+defparam \Add0~93 .lut_mask = 64'h0000FFFF00005555;
+defparam \Add0~93 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X56_Y2_N35
+dffeas \tick_count[2] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\Add0~93_sumout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(tick_count[2]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \tick_count[2] .is_wysiwyg = "true";
+defparam \tick_count[2] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X56_Y2_N36
+cyclonev_lcell_comb \Add0~89 (
+// Equation(s):
+// \Add0~89_sumout = SUM(( tick_count[3] ) + ( GND ) + ( \Add0~94 ))
+// \Add0~90 = CARRY(( tick_count[3] ) + ( GND ) + ( \Add0~94 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!tick_count[3]),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\Add0~94 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\Add0~89_sumout ),
+ .cout(\Add0~90 ),
+ .shareout());
+// synopsys translate_off
+defparam \Add0~89 .extended_lut = "off";
+defparam \Add0~89 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~89 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X56_Y2_N38
+dffeas \tick_count[3] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\Add0~89_sumout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(tick_count[3]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \tick_count[3] .is_wysiwyg = "true";
+defparam \tick_count[3] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X56_Y2_N39
+cyclonev_lcell_comb \Add0~85 (
+// Equation(s):
+// \Add0~85_sumout = SUM(( tick_count[4] ) + ( GND ) + ( \Add0~90 ))
+// \Add0~86 = CARRY(( tick_count[4] ) + ( GND ) + ( \Add0~90 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!tick_count[4]),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\Add0~90 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\Add0~85_sumout ),
+ .cout(\Add0~86 ),
+ .shareout());
+// synopsys translate_off
+defparam \Add0~85 .extended_lut = "off";
+defparam \Add0~85 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~85 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X56_Y2_N41
+dffeas \tick_count[4] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\Add0~85_sumout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(tick_count[4]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \tick_count[4] .is_wysiwyg = "true";
+defparam \tick_count[4] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X56_Y2_N42
+cyclonev_lcell_comb \Add0~81 (
+// Equation(s):
+// \Add0~81_sumout = SUM(( tick_count[5] ) + ( GND ) + ( \Add0~86 ))
+// \Add0~82 = CARRY(( tick_count[5] ) + ( GND ) + ( \Add0~86 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!tick_count[5]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\Add0~86 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\Add0~81_sumout ),
+ .cout(\Add0~82 ),
+ .shareout());
+// synopsys translate_off
+defparam \Add0~81 .extended_lut = "off";
+defparam \Add0~81 .lut_mask = 64'h0000FFFF000000FF;
+defparam \Add0~81 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X56_Y2_N43
+dffeas \tick_count[5] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\Add0~81_sumout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(tick_count[5]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \tick_count[5] .is_wysiwyg = "true";
+defparam \tick_count[5] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X56_Y2_N45
+cyclonev_lcell_comb \Add0~77 (
+// Equation(s):
+// \Add0~77_sumout = SUM(( tick_count[6] ) + ( GND ) + ( \Add0~82 ))
+// \Add0~78 = CARRY(( tick_count[6] ) + ( GND ) + ( \Add0~82 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!tick_count[6]),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\Add0~82 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\Add0~77_sumout ),
+ .cout(\Add0~78 ),
+ .shareout());
+// synopsys translate_off
+defparam \Add0~77 .extended_lut = "off";
+defparam \Add0~77 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~77 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X56_Y2_N47
+dffeas \tick_count[6] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\Add0~77_sumout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(tick_count[6]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \tick_count[6] .is_wysiwyg = "true";
+defparam \tick_count[6] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X56_Y2_N48
+cyclonev_lcell_comb \Add0~73 (
+// Equation(s):
+// \Add0~73_sumout = SUM(( tick_count[7] ) + ( GND ) + ( \Add0~78 ))
+// \Add0~74 = CARRY(( tick_count[7] ) + ( GND ) + ( \Add0~78 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!tick_count[7]),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\Add0~78 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\Add0~73_sumout ),
+ .cout(\Add0~74 ),
+ .shareout());
+// synopsys translate_off
+defparam \Add0~73 .extended_lut = "off";
+defparam \Add0~73 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~73 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X56_Y2_N50
+dffeas \tick_count[7] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\Add0~73_sumout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(tick_count[7]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \tick_count[7] .is_wysiwyg = "true";
+defparam \tick_count[7] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X56_Y2_N51
+cyclonev_lcell_comb \Add0~69 (
+// Equation(s):
+// \Add0~69_sumout = SUM(( tick_count[8] ) + ( GND ) + ( \Add0~74 ))
+// \Add0~70 = CARRY(( tick_count[8] ) + ( GND ) + ( \Add0~74 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!tick_count[8]),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\Add0~74 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\Add0~69_sumout ),
+ .cout(\Add0~70 ),
+ .shareout());
+// synopsys translate_off
+defparam \Add0~69 .extended_lut = "off";
+defparam \Add0~69 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~69 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X56_Y2_N52
+dffeas \tick_count[8] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\Add0~69_sumout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(tick_count[8]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \tick_count[8] .is_wysiwyg = "true";
+defparam \tick_count[8] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X56_Y2_N54
+cyclonev_lcell_comb \Add0~65 (
+// Equation(s):
+// \Add0~65_sumout = SUM(( tick_count[9] ) + ( GND ) + ( \Add0~70 ))
+// \Add0~66 = CARRY(( tick_count[9] ) + ( GND ) + ( \Add0~70 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!tick_count[9]),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\Add0~70 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\Add0~65_sumout ),
+ .cout(\Add0~66 ),
+ .shareout());
+// synopsys translate_off
+defparam \Add0~65 .extended_lut = "off";
+defparam \Add0~65 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~65 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X56_Y2_N56
+dffeas \tick_count[9] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\Add0~65_sumout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(tick_count[9]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \tick_count[9] .is_wysiwyg = "true";
+defparam \tick_count[9] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X56_Y2_N57
+cyclonev_lcell_comb \Add0~61 (
+// Equation(s):
+// \Add0~61_sumout = SUM(( tick_count[10] ) + ( GND ) + ( \Add0~66 ))
+// \Add0~62 = CARRY(( tick_count[10] ) + ( GND ) + ( \Add0~66 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!tick_count[10]),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\Add0~66 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\Add0~61_sumout ),
+ .cout(\Add0~62 ),
+ .shareout());
+// synopsys translate_off
+defparam \Add0~61 .extended_lut = "off";
+defparam \Add0~61 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~61 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X56_Y2_N59
+dffeas \tick_count[10] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\Add0~61_sumout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(tick_count[10]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \tick_count[10] .is_wysiwyg = "true";
+defparam \tick_count[10] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X56_Y1_N0
+cyclonev_lcell_comb \Add0~57 (
+// Equation(s):
+// \Add0~57_sumout = SUM(( tick_count[11] ) + ( GND ) + ( \Add0~62 ))
+// \Add0~58 = CARRY(( tick_count[11] ) + ( GND ) + ( \Add0~62 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!tick_count[11]),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\Add0~62 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\Add0~57_sumout ),
+ .cout(\Add0~58 ),
+ .shareout());
+// synopsys translate_off
+defparam \Add0~57 .extended_lut = "off";
+defparam \Add0~57 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~57 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X56_Y1_N2
+dffeas \tick_count[11] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\Add0~57_sumout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(tick_count[11]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \tick_count[11] .is_wysiwyg = "true";
+defparam \tick_count[11] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X56_Y1_N3
+cyclonev_lcell_comb \Add0~53 (
+// Equation(s):
+// \Add0~53_sumout = SUM(( tick_count[12] ) + ( GND ) + ( \Add0~58 ))
+// \Add0~54 = CARRY(( tick_count[12] ) + ( GND ) + ( \Add0~58 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!tick_count[12]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\Add0~58 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\Add0~53_sumout ),
+ .cout(\Add0~54 ),
+ .shareout());
+// synopsys translate_off
+defparam \Add0~53 .extended_lut = "off";
+defparam \Add0~53 .lut_mask = 64'h0000FFFF000000FF;
+defparam \Add0~53 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X56_Y1_N5
+dffeas \tick_count[12] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\Add0~53_sumout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(tick_count[12]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \tick_count[12] .is_wysiwyg = "true";
+defparam \tick_count[12] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X56_Y1_N6
+cyclonev_lcell_comb \Add0~49 (
+// Equation(s):
+// \Add0~49_sumout = SUM(( tick_count[13] ) + ( GND ) + ( \Add0~54 ))
+// \Add0~50 = CARRY(( tick_count[13] ) + ( GND ) + ( \Add0~54 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!tick_count[13]),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\Add0~54 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\Add0~49_sumout ),
+ .cout(\Add0~50 ),
+ .shareout());
+// synopsys translate_off
+defparam \Add0~49 .extended_lut = "off";
+defparam \Add0~49 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~49 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X56_Y1_N7
+dffeas \tick_count[13] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\Add0~49_sumout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(tick_count[13]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \tick_count[13] .is_wysiwyg = "true";
+defparam \tick_count[13] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X56_Y1_N9
+cyclonev_lcell_comb \Add0~45 (
+// Equation(s):
+// \Add0~45_sumout = SUM(( tick_count[14] ) + ( GND ) + ( \Add0~50 ))
+// \Add0~46 = CARRY(( tick_count[14] ) + ( GND ) + ( \Add0~50 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!tick_count[14]),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\Add0~50 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\Add0~45_sumout ),
+ .cout(\Add0~46 ),
+ .shareout());
+// synopsys translate_off
+defparam \Add0~45 .extended_lut = "off";
+defparam \Add0~45 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~45 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X56_Y1_N11
+dffeas \tick_count[14] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\Add0~45_sumout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(tick_count[14]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \tick_count[14] .is_wysiwyg = "true";
+defparam \tick_count[14] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X56_Y1_N12
+cyclonev_lcell_comb \Add0~41 (
+// Equation(s):
+// \Add0~41_sumout = SUM(( tick_count[15] ) + ( GND ) + ( \Add0~46 ))
+// \Add0~42 = CARRY(( tick_count[15] ) + ( GND ) + ( \Add0~46 ))
+
+ .dataa(gnd),
+ .datab(!tick_count[15]),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\Add0~46 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\Add0~41_sumout ),
+ .cout(\Add0~42 ),
+ .shareout());
+// synopsys translate_off
+defparam \Add0~41 .extended_lut = "off";
+defparam \Add0~41 .lut_mask = 64'h0000FFFF00003333;
+defparam \Add0~41 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X56_Y1_N14
+dffeas \tick_count[15] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\Add0~41_sumout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(tick_count[15]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \tick_count[15] .is_wysiwyg = "true";
+defparam \tick_count[15] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X56_Y1_N15
+cyclonev_lcell_comb \Add0~37 (
+// Equation(s):
+// \Add0~37_sumout = SUM(( tick_count[16] ) + ( GND ) + ( \Add0~42 ))
+// \Add0~38 = CARRY(( tick_count[16] ) + ( GND ) + ( \Add0~42 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!tick_count[16]),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\Add0~42 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\Add0~37_sumout ),
+ .cout(\Add0~38 ),
+ .shareout());
+// synopsys translate_off
+defparam \Add0~37 .extended_lut = "off";
+defparam \Add0~37 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~37 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X56_Y1_N17
+dffeas \tick_count[16] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\Add0~37_sumout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(tick_count[16]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \tick_count[16] .is_wysiwyg = "true";
+defparam \tick_count[16] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X56_Y1_N18
+cyclonev_lcell_comb \Add0~33 (
+// Equation(s):
+// \Add0~33_sumout = SUM(( tick_count[17] ) + ( GND ) + ( \Add0~38 ))
+// \Add0~34 = CARRY(( tick_count[17] ) + ( GND ) + ( \Add0~38 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!tick_count[17]),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\Add0~38 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\Add0~33_sumout ),
+ .cout(\Add0~34 ),
+ .shareout());
+// synopsys translate_off
+defparam \Add0~33 .extended_lut = "off";
+defparam \Add0~33 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~33 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X56_Y1_N20
+dffeas \tick_count[17] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\Add0~33_sumout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(tick_count[17]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \tick_count[17] .is_wysiwyg = "true";
+defparam \tick_count[17] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X56_Y1_N21
+cyclonev_lcell_comb \Add0~29 (
+// Equation(s):
+// \Add0~29_sumout = SUM(( tick_count[18] ) + ( GND ) + ( \Add0~34 ))
+// \Add0~30 = CARRY(( tick_count[18] ) + ( GND ) + ( \Add0~34 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!tick_count[18]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\Add0~34 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\Add0~29_sumout ),
+ .cout(\Add0~30 ),
+ .shareout());
+// synopsys translate_off
+defparam \Add0~29 .extended_lut = "off";
+defparam \Add0~29 .lut_mask = 64'h0000FFFF000000FF;
+defparam \Add0~29 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X56_Y1_N23
+dffeas \tick_count[18] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\Add0~29_sumout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(tick_count[18]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \tick_count[18] .is_wysiwyg = "true";
+defparam \tick_count[18] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X56_Y1_N24
+cyclonev_lcell_comb \Add0~25 (
+// Equation(s):
+// \Add0~25_sumout = SUM(( tick_count[19] ) + ( GND ) + ( \Add0~30 ))
+// \Add0~26 = CARRY(( tick_count[19] ) + ( GND ) + ( \Add0~30 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!tick_count[19]),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\Add0~30 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\Add0~25_sumout ),
+ .cout(\Add0~26 ),
+ .shareout());
+// synopsys translate_off
+defparam \Add0~25 .extended_lut = "off";
+defparam \Add0~25 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~25 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X56_Y1_N26
+dffeas \tick_count[19] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\Add0~25_sumout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(tick_count[19]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \tick_count[19] .is_wysiwyg = "true";
+defparam \tick_count[19] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X56_Y1_N27
+cyclonev_lcell_comb \Add0~21 (
+// Equation(s):
+// \Add0~21_sumout = SUM(( tick_count[20] ) + ( GND ) + ( \Add0~26 ))
+// \Add0~22 = CARRY(( tick_count[20] ) + ( GND ) + ( \Add0~26 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!tick_count[20]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\Add0~26 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\Add0~21_sumout ),
+ .cout(\Add0~22 ),
+ .shareout());
+// synopsys translate_off
+defparam \Add0~21 .extended_lut = "off";
+defparam \Add0~21 .lut_mask = 64'h0000FFFF000000FF;
+defparam \Add0~21 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X56_Y1_N29
+dffeas \tick_count[20] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\Add0~21_sumout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(tick_count[20]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \tick_count[20] .is_wysiwyg = "true";
+defparam \tick_count[20] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X56_Y1_N30
+cyclonev_lcell_comb \Add0~17 (
+// Equation(s):
+// \Add0~17_sumout = SUM(( tick_count[21] ) + ( GND ) + ( \Add0~22 ))
+// \Add0~18 = CARRY(( tick_count[21] ) + ( GND ) + ( \Add0~22 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!tick_count[21]),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\Add0~22 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\Add0~17_sumout ),
+ .cout(\Add0~18 ),
+ .shareout());
+// synopsys translate_off
+defparam \Add0~17 .extended_lut = "off";
+defparam \Add0~17 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~17 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X56_Y1_N31
+dffeas \tick_count[21] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\Add0~17_sumout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(tick_count[21]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \tick_count[21] .is_wysiwyg = "true";
+defparam \tick_count[21] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X56_Y1_N33
+cyclonev_lcell_comb \Add0~13 (
+// Equation(s):
+// \Add0~13_sumout = SUM(( tick_count[22] ) + ( GND ) + ( \Add0~18 ))
+// \Add0~14 = CARRY(( tick_count[22] ) + ( GND ) + ( \Add0~18 ))
+
+ .dataa(!tick_count[22]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\Add0~18 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\Add0~13_sumout ),
+ .cout(\Add0~14 ),
+ .shareout());
+// synopsys translate_off
+defparam \Add0~13 .extended_lut = "off";
+defparam \Add0~13 .lut_mask = 64'h0000FFFF00005555;
+defparam \Add0~13 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X56_Y1_N35
+dffeas \tick_count[22] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\Add0~13_sumout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(tick_count[22]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \tick_count[22] .is_wysiwyg = "true";
+defparam \tick_count[22] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X56_Y1_N36
+cyclonev_lcell_comb \Add0~5 (
+// Equation(s):
+// \Add0~5_sumout = SUM(( tick_count[23] ) + ( GND ) + ( \Add0~14 ))
+// \Add0~6 = CARRY(( tick_count[23] ) + ( GND ) + ( \Add0~14 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!tick_count[23]),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\Add0~14 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\Add0~5_sumout ),
+ .cout(\Add0~6 ),
+ .shareout());
+// synopsys translate_off
+defparam \Add0~5 .extended_lut = "off";
+defparam \Add0~5 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X56_Y1_N38
+dffeas \tick_count[23] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\Add0~5_sumout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(tick_count[23]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \tick_count[23] .is_wysiwyg = "true";
+defparam \tick_count[23] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X56_Y1_N39
+cyclonev_lcell_comb \Add0~9 (
+// Equation(s):
+// \Add0~9_sumout = SUM(( tick_count[24] ) + ( GND ) + ( \Add0~6 ))
+// \Add0~10 = CARRY(( tick_count[24] ) + ( GND ) + ( \Add0~6 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!tick_count[24]),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\Add0~6 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\Add0~9_sumout ),
+ .cout(\Add0~10 ),
+ .shareout());
+// synopsys translate_off
+defparam \Add0~9 .extended_lut = "off";
+defparam \Add0~9 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~9 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X56_Y1_N41
+dffeas \tick_count[24] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\Add0~9_sumout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(tick_count[24]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \tick_count[24] .is_wysiwyg = "true";
+defparam \tick_count[24] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X56_Y1_N42
+cyclonev_lcell_comb \Add0~1 (
+// Equation(s):
+// \Add0~1_sumout = SUM(( tick_count[25] ) + ( GND ) + ( \Add0~10 ))
+
+ .dataa(gnd),
+ .datab(!tick_count[25]),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\Add0~10 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\Add0~1_sumout ),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \Add0~1 .extended_lut = "off";
+defparam \Add0~1 .lut_mask = 64'h0000FFFF00003333;
+defparam \Add0~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X56_Y1_N43
+dffeas \tick_count[25] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\Add0~1_sumout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(tick_count[25]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \tick_count[25] .is_wysiwyg = "true";
+defparam \tick_count[25] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X56_Y1_N48
+cyclonev_lcell_comb \heartbeat~0 (
+// Equation(s):
+// \heartbeat~0_combout = ( tick_count[25] & ( tick_count[23] ) )
+
+ .dataa(!tick_count[23]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!tick_count[25]),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\heartbeat~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \heartbeat~0 .extended_lut = "off";
+defparam \heartbeat~0 .lut_mask = 64'h0000555500005555;
+defparam \heartbeat~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X56_Y1_N50
+dffeas heartbeat(
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\heartbeat~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\heartbeat~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam heartbeat.is_wysiwyg = "true";
+defparam heartbeat.power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X34_Y7_N34
+dffeas \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Amjwx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y11_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M66wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|M66wx4~combout = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|O5t2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|M66wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M66wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M66wx4 .lut_mask = 64'h00000000F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|M66wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y5_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jppvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jppvx4~0_combout = ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Aok2z4~q & !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jppvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jppvx4~0 .lut_mask = 64'h0F000F0000000000;
+defparam \soc_inst|m0_1|u_logic|Jppvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X35_Y7_N1
+dffeas \soc_inst|m0_1|u_logic|Tki2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Pw6wx4~combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tki2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tki2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y7_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ptgwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ptgwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Fij2z4~q & ( !\soc_inst|m0_1|u_logic|Emi2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ptgwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ptgwx4~0 .lut_mask = 64'hF0F0F0F000000000;
+defparam \soc_inst|m0_1|u_logic|Ptgwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y4_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ilpvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ilpvx4~0_combout = ( \soc_inst|m0_1|u_logic|O5t2z4~q & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Tki2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ilpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ilpvx4~0 .lut_mask = 64'h00000000F000F000;
+defparam \soc_inst|m0_1|u_logic|Ilpvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y4_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Itgwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Itgwx4~0_combout = ( \soc_inst|m0_1|u_logic|Msyvx4~combout & ( !\soc_inst|m0_1|u_logic|Jppvx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|Msyvx4~combout & ( (!\soc_inst|m0_1|u_logic|Jppvx4~0_combout &
+// !\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Itgwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Itgwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Itgwx4~0 .lut_mask = 64'hF000F000F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Itgwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X19_Y5_N25
+dffeas \soc_inst|interconnect_1|mux_sel[2] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|interconnect_1|LessThan1~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|interconnect_1|mux_sel [2]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|mux_sel[2] .is_wysiwyg = "true";
+defparam \soc_inst|interconnect_1|mux_sel[2] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y5_N12
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[25]~1 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[25]~1_combout = ( !\soc_inst|interconnect_1|mux_sel [1] & ( \soc_inst|interconnect_1|mux_sel [2] & ( !\soc_inst|interconnect_1|mux_sel [0] ) ) ) # ( \soc_inst|interconnect_1|mux_sel [1] & (
+// !\soc_inst|interconnect_1|mux_sel [2] & ( !\soc_inst|interconnect_1|mux_sel [0] ) ) ) # ( !\soc_inst|interconnect_1|mux_sel [1] & ( !\soc_inst|interconnect_1|mux_sel [2] & ( \soc_inst|interconnect_1|mux_sel [0] ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|interconnect_1|mux_sel [0]),
+ .datad(gnd),
+ .datae(!\soc_inst|interconnect_1|mux_sel [1]),
+ .dataf(!\soc_inst|interconnect_1|mux_sel [2]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[25]~1 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[25]~1 .lut_mask = 64'h0F0FF0F0F0F00000;
+defparam \soc_inst|interconnect_1|HRDATA[25]~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y7_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Orewx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Orewx4~0_combout = ( !\soc_inst|m0_1|u_logic|Ark2z4~q & ( !\soc_inst|m0_1|u_logic|O5t2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Orewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Orewx4~0 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|Orewx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y5_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sy52z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sy52z4~0_combout = ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Ffj2z4~q & \soc_inst|m0_1|u_logic|Orewx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sy52z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sy52z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sy52z4~0 .lut_mask = 64'h0050005000000000;
+defparam \soc_inst|m0_1|u_logic|Sy52z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y8_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Huqvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Huqvx4~0_combout = ( \soc_inst|m0_1|u_logic|Fij2z4~q & ( \soc_inst|m0_1|u_logic|Sgj2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Huqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Huqvx4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Huqvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X35_Y7_N26
+dffeas \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Ajfwx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y7_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kzxvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kzxvx4~combout = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|O5t2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kzxvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kzxvx4 .lut_mask = 64'h00000000F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Kzxvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X33_Y7_N19
+dffeas \soc_inst|m0_1|u_logic|Nsk2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Ruhvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nsk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nsk2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y8_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ju5wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ju5wx4~combout = ( \soc_inst|m0_1|u_logic|Ark2z4~q & ( !\soc_inst|m0_1|u_logic|O5t2z4~q & ( \soc_inst|m0_1|u_logic|Ffj2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ju5wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ju5wx4 .lut_mask = 64'h00000F0F00000000;
+defparam \soc_inst|m0_1|u_logic|Ju5wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y7_N1
+dffeas \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Bfgwx4~combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y8_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vbovx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vbovx4~0_combout = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Nsk2z4~q & (\soc_inst|m0_1|u_logic|Ju5wx4~combout & !\soc_inst|m0_1|u_logic|Npk2z4~q ))) )
+// )
+
+ .dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vbovx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vbovx4~0 .lut_mask = 64'h0000000002000200;
+defparam \soc_inst|m0_1|u_logic|Vbovx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y8_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y9t2z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y9t2z4~feeder_combout = ( \soc_inst|m0_1|u_logic|hwrite_o~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Y9t2z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y9t2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y9t2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Y9t2z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y8_N49
+dffeas \soc_inst|m0_1|u_logic|Y9t2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Y9t2z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y9t2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y9t2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y9_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hdh2z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hdh2z4~1_combout = ( \soc_inst|m0_1|u_logic|Npk2z4~q & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q & ((!\soc_inst|m0_1|u_logic|Ffj2z4~q ) # (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Ark2z4~q &
+// (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q & \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hdh2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hdh2z4~1 .lut_mask = 64'h0C0C0C0CFC3CFC3C;
+defparam \soc_inst|m0_1|u_logic|Hdh2z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y10_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wq5wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wq5wx4~combout = ( \soc_inst|m0_1|u_logic|Qr42z4~1_combout & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q & \soc_inst|m0_1|u_logic|Hdh2z4~1_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wq5wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wq5wx4 .lut_mask = 64'h0000000000330033;
+defparam \soc_inst|m0_1|u_logic|Wq5wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y9_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G2lwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G2lwx4~0_combout = ( \soc_inst|m0_1|u_logic|Ark2z4~q & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q & (\soc_inst|m0_1|u_logic|Aok2z4~q & \soc_inst|m0_1|u_logic|Ffj2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~q & (
+// (!\soc_inst|m0_1|u_logic|O5t2z4~q & ((\soc_inst|m0_1|u_logic|Ffj2z4~q ) # (\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G2lwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G2lwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G2lwx4~0 .lut_mask = 64'h2A2A2A2A02020202;
+defparam \soc_inst|m0_1|u_logic|G2lwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y3_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Howvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Howvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Tki2z4~q & ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Howvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Howvx4~0 .lut_mask = 64'h0F0F0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|Howvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y9_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G2lwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G2lwx4~combout = ( !\soc_inst|m0_1|u_logic|Howvx4~0_combout & ( !\soc_inst|m0_1|u_logic|G2lwx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|G2lwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G2lwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G2lwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G2lwx4 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|G2lwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X21_Y5_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rbi3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rbi3z4~0_combout = ( \soc_inst|m0_1|u_logic|E7mwx4~combout & ( \soc_inst|interconnect_1|HREADY~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|E7mwx4~combout ),
+ .dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rbi3z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rbi3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rbi3z4~0 .lut_mask = 64'h000000000000FFFF;
+defparam \soc_inst|m0_1|u_logic|Rbi3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y7_N28
+dffeas \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qxhvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y7_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wmc2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wmc2z4~0_combout = ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q & (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Aok2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wmc2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wmc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wmc2z4~0 .lut_mask = 64'h0022002200000000;
+defparam \soc_inst|m0_1|u_logic|Wmc2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y7_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wdqvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wdqvx4~0_combout = (!\soc_inst|m0_1|u_logic|Sgj2z4~q & !\soc_inst|m0_1|u_logic|Fij2z4~q )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wdqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wdqvx4~0 .lut_mask = 64'hAA00AA00AA00AA00;
+defparam \soc_inst|m0_1|u_logic|Wdqvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X35_Y7_N35
+dffeas \soc_inst|m0_1|u_logic|A4t2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Nfnvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|A4t2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|A4t2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|A4t2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y7_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhc2z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mhc2z4~2_combout = ( !\soc_inst|m0_1|u_logic|O5t2z4~q & ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Ffj2z4~q ) # (\soc_inst|m0_1|u_logic|A4t2z4~q ))) ) )
+// ) # ( \soc_inst|m0_1|u_logic|O5t2z4~q & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|A4t2z4~q & (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|O5t2z4~q & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & (((\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ffj2z4~q )) # (\soc_inst|m0_1|u_logic|A4t2z4~q
+// ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mhc2z4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~2 .lut_mask = 64'h4CCC00884C4C0000;
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y7_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhc2z4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mhc2z4~3_combout = ( \soc_inst|m0_1|u_logic|Npk2z4~q & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q & (\soc_inst|m0_1|u_logic|Sgj2z4~q & ((\soc_inst|m0_1|u_logic|Fij2z4~q )))) # (\soc_inst|m0_1|u_logic|Aok2z4~q &
+// (((!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mhc2z4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~3 .lut_mask = 64'h000000000C5C0C5C;
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y7_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhc2z4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mhc2z4~4_combout = ( !\soc_inst|m0_1|u_logic|Mhc2z4~3_combout & ( (!\soc_inst|m0_1|u_logic|Wmc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Mhc2z4~2_combout & ((!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Kzxvx4~combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wmc2z4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Mhc2z4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Mhc2z4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mhc2z4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~4 .lut_mask = 64'hA080A08000000000;
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y7_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O9qvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O9qvx4~0_combout = (!\soc_inst|m0_1|u_logic|Ark2z4~q & \soc_inst|m0_1|u_logic|Emi2z4~q )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O9qvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O9qvx4~0 .lut_mask = 64'h00AA00AA00AA00AA;
+defparam \soc_inst|m0_1|u_logic|O9qvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y4_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rsqvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rsqvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Fij2z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & (
+// !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Fij2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rsqvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rsqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rsqvx4~0 .lut_mask = 64'hFFFFFF0000FF0000;
+defparam \soc_inst|m0_1|u_logic|Rsqvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y9_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ag4wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ag4wx4~0_combout = ( \soc_inst|m0_1|u_logic|Sgj2z4~q & ( !\soc_inst|m0_1|u_logic|Npk2z4~q & ( (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Ju5wx4~combout )) )
+// ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ag4wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ag4wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ag4wx4~0 .lut_mask = 64'h0000000500000000;
+defparam \soc_inst|m0_1|u_logic|Ag4wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y7_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkxvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wkxvx4~0_combout = (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wkxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wkxvx4~0 .lut_mask = 64'hAA00AA00AA00AA00;
+defparam \soc_inst|m0_1|u_logic|Wkxvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mtqvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mtqvx4~0_combout = ( \soc_inst|m0_1|u_logic|Wkxvx4~0_combout & ( ((\soc_inst|m0_1|u_logic|Aok2z4~q & \soc_inst|m0_1|u_logic|Kzxvx4~combout )) # (\soc_inst|m0_1|u_logic|M66wx4~combout ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Wkxvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Aok2z4~q & \soc_inst|m0_1|u_logic|Kzxvx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mtqvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mtqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mtqvx4~0 .lut_mask = 64'h005500550F5F0F5F;
+defparam \soc_inst|m0_1|u_logic|Mtqvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y7_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sy2wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sy2wx4~0_combout = (!\soc_inst|m0_1|u_logic|Aok2z4~q & \soc_inst|m0_1|u_logic|Sgj2z4~q )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sy2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sy2wx4~0 .lut_mask = 64'h00F000F000F000F0;
+defparam \soc_inst|m0_1|u_logic|Sy2wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y10_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bpzvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bpzvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Npk2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bpzvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bpzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bpzvx4~0 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|Bpzvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P03wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P03wx4~0_combout = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout & \soc_inst|m0_1|u_logic|Bpzvx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Bpzvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|P03wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P03wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P03wx4~0 .lut_mask = 64'h00000000000F000F;
+defparam \soc_inst|m0_1|u_logic|P03wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y11_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Og4wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Og4wx4~0_combout = ( \soc_inst|m0_1|u_logic|Huqvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Y6t2z4~q & \soc_inst|m0_1|u_logic|Kzxvx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Og4wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Og4wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Og4wx4~0 .lut_mask = 64'h00000000000F000F;
+defparam \soc_inst|m0_1|u_logic|Og4wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mtqvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mtqvx4~combout = ( !\soc_inst|m0_1|u_logic|Og4wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ag4wx4~0_combout & (!\soc_inst|m0_1|u_logic|Mtqvx4~0_combout & ((!\soc_inst|m0_1|u_logic|P03wx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ag4wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Mtqvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|P03wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Og4wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mtqvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mtqvx4 .lut_mask = 64'h8088808800000000;
+defparam \soc_inst|m0_1|u_logic|Mtqvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y4_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nxqvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nxqvx4~0_combout = ( \soc_inst|m0_1|u_logic|Mtqvx4~combout ) # ( !\soc_inst|m0_1|u_logic|Mtqvx4~combout & ( !\soc_inst|interconnect_1|HREADY~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nxqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nxqvx4~0 .lut_mask = 64'hF0F0F0F0FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Nxqvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y4_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H1rvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H1rvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Nxqvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Rsqvx4~0_combout & \soc_inst|m0_1|u_logic|Nbm2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rsqvx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H1rvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H1rvx4~0 .lut_mask = 64'h0A0A0A0A00000000;
+defparam \soc_inst|m0_1|u_logic|H1rvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y12_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S5pvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S5pvx4~combout = ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout & ( \soc_inst|m0_1|u_logic|Y8pvx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S5pvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S5pvx4 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|S5pvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y6_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yghvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yghvx4~0_combout = ( \soc_inst|m0_1|u_logic|Tyx2z4~q & ( \soc_inst|interconnect_1|HREADY~0_combout & ( ((!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout & !\soc_inst|m0_1|u_logic|S5pvx4~combout )) # (\soc_inst|m0_1|u_logic|Hxx2z4~q ) )
+// ) ) # ( !\soc_inst|m0_1|u_logic|Tyx2z4~q & ( \soc_inst|interconnect_1|HREADY~0_combout & ( (!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout & !\soc_inst|m0_1|u_logic|S5pvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Tyx2z4~q & (
+// !\soc_inst|interconnect_1|HREADY~0_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Tyx2z4~q ),
+ .dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yghvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yghvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yghvx4~0 .lut_mask = 64'h0000FFFF88888F8F;
+defparam \soc_inst|m0_1|u_logic|Yghvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y6_N32
+dffeas \soc_inst|m0_1|u_logic|Tyx2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Yghvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Tyx2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tyx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tyx2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y6_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ibrwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ibrwx4~0_combout = ( \soc_inst|m0_1|u_logic|Y8pvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Hxx2z4~q & (\soc_inst|m0_1|u_logic|Tyx2z4~q & ((\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ) # (\soc_inst|m0_1|u_logic|M9pvx4~0_combout ))))
+// ) ) # ( !\soc_inst|m0_1|u_logic|Y8pvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ) # ((!\soc_inst|m0_1|u_logic|Hxx2z4~q & \soc_inst|m0_1|u_logic|Tyx2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Tyx2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ibrwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ibrwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ibrwx4~0 .lut_mask = 64'hFF22FF2202220222;
+defparam \soc_inst|m0_1|u_logic|Ibrwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X33_Y6_N8
+dffeas \soc_inst|m0_1|u_logic|Hxx2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Ibrwx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Hxx2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hxx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hxx2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X31_Y6_N31
+dffeas \soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Yghvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y6_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B8c2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|B8c2z4~0_combout = ( \soc_inst|m0_1|u_logic|Dcrwx4~6_combout ) # ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout & ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B8c2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B8c2z4~0 .lut_mask = 64'h00FF00FFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|B8c2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y7_N56
+dffeas \soc_inst|m0_1|u_logic|Vaw2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|E7mwx4~combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Vaw2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vaw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vaw2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y6_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bpsvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bpsvx4~0_combout = ( \soc_inst|interconnect_1|HREADY~0_combout & ( \soc_inst|m0_1|u_logic|Vaw2z4~q ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vaw2z4~q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bpsvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bpsvx4~0 .lut_mask = 64'h0000555500005555;
+defparam \soc_inst|m0_1|u_logic|Bpsvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y4_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xnrvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xnrvx4~0_combout = ( \soc_inst|m0_1|u_logic|B8c2z4~0_combout & ( \soc_inst|m0_1|u_logic|Bpsvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Tki2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xnrvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xnrvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xnrvx4~0 .lut_mask = 64'h000000000000A0A0;
+defparam \soc_inst|m0_1|u_logic|Xnrvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y10_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jvqvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jvqvx4~1_combout = ( \soc_inst|m0_1|u_logic|B8c2z4~0_combout & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Hxx2z4~q & (\soc_inst|m0_1|u_logic|Xnrvx4~0_combout & (!\soc_inst|m0_1|u_logic|Nbm2z4~q &
+// \soc_inst|m0_1|u_logic|Ueovx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Xnrvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jvqvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jvqvx4~1 .lut_mask = 64'h0000000000000020;
+defparam \soc_inst|m0_1|u_logic|Jvqvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X19_Y5_N17
+dffeas \soc_inst|ram_1|write_cycle (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|ram_1|write_cycle~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|ram_1|write_cycle~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|write_cycle .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|write_cycle .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y7_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wpsvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wpsvx4~0_combout = ( \soc_inst|m0_1|u_logic|A4t2z4~q & ( (\soc_inst|m0_1|u_logic|O5t2z4~q & ((!\soc_inst|m0_1|u_logic|Ark2z4~q & (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Ark2z4~q &
+// ((\soc_inst|m0_1|u_logic|Npk2z4~q ))))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wpsvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wpsvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wpsvx4~0 .lut_mask = 64'h0000000002130213;
+defparam \soc_inst|m0_1|u_logic|Wpsvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y7_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I1c2z4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|I1c2z4~combout = ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout & ( \soc_inst|m0_1|u_logic|G97wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q & \soc_inst|m0_1|u_logic|Orewx4~0_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|I1c2z4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I1c2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I1c2z4 .lut_mask = 64'h0000000000000C0C;
+defparam \soc_inst|m0_1|u_logic|I1c2z4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y6_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C9yvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C9yvx4~combout = (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Fij2z4~q ))
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C9yvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C9yvx4 .lut_mask = 64'hC000C000C000C000;
+defparam \soc_inst|m0_1|u_logic|C9yvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y6_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ncqvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ncqvx4~0_combout = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Fij2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ncqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ncqvx4~0 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Ncqvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y7_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P1c2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P1c2z4~0_combout = ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout & ( \soc_inst|m0_1|u_logic|Emi2z4~q & ( (\soc_inst|m0_1|u_logic|O5t2z4~q & ((\soc_inst|m0_1|u_logic|Ark2z4~q ) # (\soc_inst|m0_1|u_logic|C9yvx4~combout ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout & ( \soc_inst|m0_1|u_logic|Emi2z4~q & ( (\soc_inst|m0_1|u_logic|C9yvx4~combout & (!\soc_inst|m0_1|u_logic|Ark2z4~q & \soc_inst|m0_1|u_logic|O5t2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Emi2z4~q & ( (\soc_inst|m0_1|u_logic|Ark2z4~q & \soc_inst|m0_1|u_logic|O5t2z4~q ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|P1c2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P1c2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P1c2z4~0 .lut_mask = 64'h0000000F0030003F;
+defparam \soc_inst|m0_1|u_logic|P1c2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y10_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z7fwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z7fwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Tki2z4~q & ( \soc_inst|m0_1|u_logic|O5t2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z7fwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z7fwx4~0 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|Z7fwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y7_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G0c2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G0c2z4~0_combout = ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Aok2z4~q & !\soc_inst|m0_1|u_logic|Sgj2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G0c2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G0c2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G0c2z4~0 .lut_mask = 64'h0A000A0000000000;
+defparam \soc_inst|m0_1|u_logic|G0c2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y8_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zzb2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zzb2z4~0_combout = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zzb2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zzb2z4~0 .lut_mask = 64'hFF00FF00FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Zzb2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y7_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jyb2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jyb2z4~0_combout = ( \soc_inst|m0_1|u_logic|Zzb2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|G0c2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Nsk2z4~q ) # (\soc_inst|m0_1|u_logic|Npk2z4~q
+// )))) ) ) # ( !\soc_inst|m0_1|u_logic|Zzb2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|G0c2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|G0c2z4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jyb2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jyb2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jyb2z4~0 .lut_mask = 64'hBB00BB00BF00BF00;
+defparam \soc_inst|m0_1|u_logic|Jyb2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y7_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xhiwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xhiwx4~0_combout = ( \soc_inst|m0_1|u_logic|Nsk2z4~q & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q & \soc_inst|m0_1|u_logic|Ju5wx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xhiwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xhiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xhiwx4~0 .lut_mask = 64'h00000000000F000F;
+defparam \soc_inst|m0_1|u_logic|Xhiwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y7_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jyb2z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jyb2z4~1_combout = ( !\soc_inst|m0_1|u_logic|Xhiwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Jyb2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Aok2z4~q ) # ((!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nsk2z4~q
+// )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Jyb2z4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xhiwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jyb2z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jyb2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jyb2z4~1 .lut_mask = 64'h00FB00FB00000000;
+defparam \soc_inst|m0_1|u_logic|Jyb2z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y7_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jyb2z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jyb2z4~2_combout = ( !\soc_inst|m0_1|u_logic|P1c2z4~0_combout & ( \soc_inst|m0_1|u_logic|Jyb2z4~1_combout & ( ((!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Npk2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Msyvx4~combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|P1c2z4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Jyb2z4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jyb2z4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jyb2z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jyb2z4~2 .lut_mask = 64'h00000000F7F70000;
+defparam \soc_inst|m0_1|u_logic|Jyb2z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X39_Y11_N23
+dffeas \soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Vllvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y5_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O092z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O092z4~0_combout = ( \soc_inst|m0_1|u_logic|B8c2z4~0_combout & ( (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout & (!\soc_inst|m0_1|u_logic|Hxx2z4~q $ (!\soc_inst|m0_1|u_logic|Fcj2z4~q ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|B8c2z4~0_combout & ( (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout & !\soc_inst|m0_1|u_logic|Fcj2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|O092z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O092z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O092z4~0 .lut_mask = 64'h5500550005500550;
+defparam \soc_inst|m0_1|u_logic|O092z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y5_N47
+dffeas \soc_inst|m0_1|u_logic|K1z2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|I3mvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|K1z2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K1z2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K1z2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y8_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bxcwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bxcwx4~0_combout = ( \soc_inst|m0_1|u_logic|Ffj2z4~q & ( !\soc_inst|m0_1|u_logic|Aok2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bxcwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bxcwx4~0 .lut_mask = 64'h0000FFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Bxcwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y6_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lu6wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lu6wx4~0_combout = ( \soc_inst|m0_1|u_logic|Howvx4~0_combout & ( \soc_inst|m0_1|u_logic|O5t2z4~q & ( (\soc_inst|m0_1|u_logic|Bxcwx4~0_combout & !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lu6wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lu6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lu6wx4~0 .lut_mask = 64'h0000000000005500;
+defparam \soc_inst|m0_1|u_logic|Lu6wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y8_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Slnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Slnvx4~0_combout = ( \soc_inst|m0_1|u_logic|Abovx4~0_combout & ( (\soc_inst|m0_1|u_logic|Ueovx4~0_combout & !\soc_inst|m0_1|u_logic|Nbm2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Slnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Slnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Slnvx4~0 .lut_mask = 64'h000000000F000F00;
+defparam \soc_inst|m0_1|u_logic|Slnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y8_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Edovx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Edovx4~combout = ( \soc_inst|m0_1|u_logic|Xnrvx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Abovx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Hxx2z4~q & \soc_inst|m0_1|u_logic|B8c2z4~0_combout ))) # (\soc_inst|m0_1|u_logic|Nbm2z4~q ) )
+// ) # ( !\soc_inst|m0_1|u_logic|Xnrvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Abovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nbm2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xnrvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Edovx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Edovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Edovx4 .lut_mask = 64'hDDDDDDDDDDFDDDFD;
+defparam \soc_inst|m0_1|u_logic|Edovx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y8_N40
+dffeas \soc_inst|m0_1|u_logic|T1y2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Slnvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Edovx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|T1y2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T1y2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T1y2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X24_Y6_N38
+dffeas \soc_inst|m0_1|u_logic|Jcw2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Jcw2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jcw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jcw2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y6_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Llnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Llnvx4~0_combout = ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout & ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout & ( (\soc_inst|m0_1|u_logic|Jcw2z4~q & ((\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ) #
+// (\soc_inst|m0_1|u_logic|Scpvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout & ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout & ( (\soc_inst|m0_1|u_logic|Jcw2z4~q & ((!\soc_inst|m0_1|u_logic|Scpvx4~2_combout &
+// ((\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Scpvx4~2_combout & (!\soc_inst|m0_1|u_logic|Vaw2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout & ( !\soc_inst|m0_1|u_logic|Pfovx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout & ( !\soc_inst|m0_1|u_logic|Pfovx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout &
+// ((\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Scpvx4~2_combout & (!\soc_inst|m0_1|u_logic|Vaw2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Vaw2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Jcw2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Llnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Llnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Llnvx4~0 .lut_mask = 64'h44EE55FF040E050F;
+defparam \soc_inst|m0_1|u_logic|Llnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y6_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Llnvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Llnvx4~combout = ( \soc_inst|m0_1|u_logic|Llnvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Wfovx4~combout ) # (\soc_inst|m0_1|u_logic|T1y2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|T1y2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Llnvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Llnvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Llnvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Llnvx4 .lut_mask = 64'h00000000FF0FFF0F;
+defparam \soc_inst|m0_1|u_logic|Llnvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X30_Y6_N22
+dffeas \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Llnvx4~combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X36_Y7_N55
+dffeas \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Eyhvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y9_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Socwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Socwx4~0_combout = ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Socwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Socwx4~0 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Socwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y9_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lhyvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lhyvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Socwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q & ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # (!\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lhyvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lhyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lhyvx4~0 .lut_mask = 64'hFC00FC0000000000;
+defparam \soc_inst|m0_1|u_logic|Lhyvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y9_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxc2z4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qxc2z4~combout = ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|O5t2z4~q ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qxc2z4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qxc2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qxc2z4 .lut_mask = 64'h3333333300000000;
+defparam \soc_inst|m0_1|u_logic|Qxc2z4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y9_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lhyvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lhyvx4~1_combout = ( !\soc_inst|m0_1|u_logic|Nsk2z4~q & ( \soc_inst|m0_1|u_logic|Fij2z4~q & ( (!\soc_inst|m0_1|u_logic|Lhyvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ark2z4~q & \soc_inst|m0_1|u_logic|Qxc2z4~combout )) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Nsk2z4~q & ( !\soc_inst|m0_1|u_logic|Fij2z4~q & ( (\soc_inst|m0_1|u_logic|Ffj2z4~q & ((!\soc_inst|m0_1|u_logic|Lhyvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ark2z4~q & \soc_inst|m0_1|u_logic|Qxc2z4~combout )))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Nsk2z4~q & ( !\soc_inst|m0_1|u_logic|Fij2z4~q & ( (!\soc_inst|m0_1|u_logic|Lhyvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ark2z4~q & \soc_inst|m0_1|u_logic|Qxc2z4~combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Lhyvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qxc2z4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lhyvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lhyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lhyvx4~1 .lut_mask = 64'hF0FC5054F0FC0000;
+defparam \soc_inst|m0_1|u_logic|Lhyvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y9_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ps3wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ps3wx4~0_combout = (!\soc_inst|m0_1|u_logic|Aok2z4~q ) # (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ps3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ps3wx4~0 .lut_mask = 64'hFF55FF55FF55FF55;
+defparam \soc_inst|m0_1|u_logic|Ps3wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X36_Y8_N37
+dffeas \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Bthvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y4_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X8zvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|X8zvx4~combout = ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Ffj2z4~q & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q & (!\soc_inst|m0_1|u_logic|Emi2z4~q & \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X8zvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X8zvx4 .lut_mask = 64'h0808000000000000;
+defparam \soc_inst|m0_1|u_logic|X8zvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y6_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Evcwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Evcwx4~0_combout = (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Npk2z4~q & !\soc_inst|m0_1|u_logic|O5t2z4~q )))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Evcwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Evcwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Evcwx4~0 .lut_mask = 64'h0800080008000800;
+defparam \soc_inst|m0_1|u_logic|Evcwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y6_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Evcwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Evcwx4~1_combout = ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Npk2z4~q & (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Aok2z4~q ))
+// ) ) ) # ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q $ (!\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q $ (!\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Evcwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Evcwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Evcwx4~1 .lut_mask = 64'h003C003C00000101;
+defparam \soc_inst|m0_1|u_logic|Evcwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y6_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T3ovx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T3ovx4~0_combout = ( !\soc_inst|m0_1|u_logic|O5t2z4~q & ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q & (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q
+// )) ) ) ) # ( \soc_inst|m0_1|u_logic|O5t2z4~q & ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q & \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~q & (
+// !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q & (((\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|T3ovx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T3ovx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T3ovx4~0 .lut_mask = 64'h0A2A0A0A00220000;
+defparam \soc_inst|m0_1|u_logic|T3ovx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y6_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H4ovx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H4ovx4~0_combout = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Npk2z4~q & (\soc_inst|m0_1|u_logic|Aok2z4~q & !\soc_inst|m0_1|u_logic|Fij2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H4ovx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H4ovx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H4ovx4~0 .lut_mask = 64'h0000000005000500;
+defparam \soc_inst|m0_1|u_logic|H4ovx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y6_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fzcwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fzcwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Npk2z4~q & (\soc_inst|m0_1|u_logic|Aok2z4~q & \soc_inst|m0_1|u_logic|Sgj2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fzcwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fzcwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fzcwx4~0 .lut_mask = 64'h0005000500000000;
+defparam \soc_inst|m0_1|u_logic|Fzcwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y6_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wzawx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wzawx4~combout = ( \soc_inst|m0_1|u_logic|H4ovx4~0_combout & ( \soc_inst|m0_1|u_logic|Fzcwx4~0_combout & ( \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|H4ovx4~0_combout & (
+// \soc_inst|m0_1|u_logic|Fzcwx4~0_combout & ( \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) # ( \soc_inst|m0_1|u_logic|H4ovx4~0_combout & ( !\soc_inst|m0_1|u_logic|Fzcwx4~0_combout & ( \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) # (
+// !\soc_inst|m0_1|u_logic|H4ovx4~0_combout & ( !\soc_inst|m0_1|u_logic|Fzcwx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Evcwx4~0_combout & (!\soc_inst|m0_1|u_logic|Evcwx4~1_combout & !\soc_inst|m0_1|u_logic|T3ovx4~0_combout ))) #
+// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Evcwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Evcwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|T3ovx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|H4ovx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fzcwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wzawx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wzawx4 .lut_mask = 64'hD555555555555555;
+defparam \soc_inst|m0_1|u_logic|Wzawx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Glnwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Glnwx4~0_combout = ( \soc_inst|m0_1|u_logic|Npk2z4~q & ( \soc_inst|m0_1|u_logic|Tki2z4~q & ( (\soc_inst|m0_1|u_logic|Aok2z4~q & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q & (
+// \soc_inst|m0_1|u_logic|Tki2z4~q & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Npk2z4~q & ( !\soc_inst|m0_1|u_logic|Tki2z4~q & ( (\soc_inst|m0_1|u_logic|Aok2z4~q &
+// \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Glnwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Glnwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Glnwx4~0 .lut_mask = 64'h00000505C0C00505;
+defparam \soc_inst|m0_1|u_logic|Glnwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y7_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuhwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fuhwx4~0_combout = ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~0 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y6_N34
+dffeas \soc_inst|m0_1|u_logic|L8t2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cdnvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|L8t2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L8t2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|L8t2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y6_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qaqvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qaqvx4~0_combout = ( \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) # ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|L8t2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qaqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qaqvx4~0 .lut_mask = 64'h00FF00FFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Qaqvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E6nwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|E6nwx4~0_combout = ( \soc_inst|m0_1|u_logic|O5t2z4~q & ( \soc_inst|m0_1|u_logic|Qaqvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|O5t2z4~q & ( !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E6nwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E6nwx4~0 .lut_mask = 64'h0000CCCC0000FFCC;
+defparam \soc_inst|m0_1|u_logic|E6nwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y8_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G36wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G36wx4~0_combout = ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Rexvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Fjewx4~1_combout & !\soc_inst|m0_1|u_logic|Ark2z4~q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Rexvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Fjewx4~1_combout & !\soc_inst|m0_1|u_logic|Ark2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & (
+// !\soc_inst|m0_1|u_logic|Rexvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Fjewx4~1_combout & !\soc_inst|m0_1|u_logic|Ark2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G36wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G36wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G36wx4~0 .lut_mask = 64'h0000505050505050;
+defparam \soc_inst|m0_1|u_logic|G36wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y7_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qfdwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qfdwx4~0_combout = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q & (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qfdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qfdwx4~0 .lut_mask = 64'h0000000000C000C0;
+defparam \soc_inst|m0_1|u_logic|Qfdwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y6_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mn3wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mn3wx4~0_combout = ( \soc_inst|m0_1|u_logic|Qfdwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Pcyvx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mn3wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mn3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mn3wx4~0 .lut_mask = 64'h0000000000550055;
+defparam \soc_inst|m0_1|u_logic|Mn3wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y4_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ucqvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ucqvx4~combout = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ucqvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ucqvx4 .lut_mask = 64'h0000FFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Ucqvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y7_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X77wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|X77wx4~combout = ( \soc_inst|m0_1|u_logic|Fij2z4~q & ( \soc_inst|m0_1|u_logic|Npk2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|X77wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X77wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X77wx4 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|X77wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y7_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Una2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Una2z4~0_combout = ( \soc_inst|m0_1|u_logic|X77wx4~combout & ( (\soc_inst|m0_1|u_logic|O9qvx4~0_combout & (\soc_inst|m0_1|u_logic|Ucqvx4~combout & !\soc_inst|m0_1|u_logic|Sgj2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Una2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Una2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Una2z4~0 .lut_mask = 64'h0000000005000500;
+defparam \soc_inst|m0_1|u_logic|Una2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y5_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C5c2z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C5c2z4~1_combout = ( \soc_inst|m0_1|u_logic|Npk2z4~q & ( \soc_inst|m0_1|u_logic|Orewx4~0_combout & ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q & (
+// \soc_inst|m0_1|u_logic|Orewx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Sgj2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Npk2z4~q & ( !\soc_inst|m0_1|u_logic|Orewx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q & ( !\soc_inst|m0_1|u_logic|Orewx4~0_combout & ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C5c2z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C5c2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C5c2z4~1 .lut_mask = 64'hF0F0F0F000F0F0F0;
+defparam \soc_inst|m0_1|u_logic|C5c2z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y5_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C5c2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C5c2z4~0_combout = ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Socwx4~0_combout & ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) ) ) # ( \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & (
+// !\soc_inst|m0_1|u_logic|Socwx4~0_combout & ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Socwx4~0_combout & ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C5c2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C5c2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C5c2z4~0 .lut_mask = 64'h5555555555550000;
+defparam \soc_inst|m0_1|u_logic|C5c2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y5_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H0zvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H0zvx4~0_combout = ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout & ( \soc_inst|m0_1|u_logic|X77wx4~combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H0zvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H0zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H0zvx4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|H0zvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y5_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z6c2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z6c2z4~0_combout = ( \soc_inst|m0_1|u_logic|Wdqvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Y6t2z4~q & \soc_inst|m0_1|u_logic|Kzxvx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z6c2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z6c2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z6c2z4~0 .lut_mask = 64'h00000000000F000F;
+defparam \soc_inst|m0_1|u_logic|Z6c2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y5_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C5c2z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C5c2z4~2_combout = ( \soc_inst|m0_1|u_logic|Z6c2z4~0_combout & ( !\soc_inst|m0_1|u_logic|C5c2z4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|Z6c2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|C5c2z4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|C5c2z4~1_combout ) # ((\soc_inst|m0_1|u_logic|H0zvx4~0_combout & \soc_inst|m0_1|u_logic|O9qvx4~0_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|C5c2z4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|C5c2z4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|H0zvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Z6c2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C5c2z4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C5c2z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C5c2z4~2 .lut_mask = 64'h888C888CCCCCCCCC;
+defparam \soc_inst|m0_1|u_logic|C5c2z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y9_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hdh2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hdh2z4~0_combout = ( \soc_inst|m0_1|u_logic|Npk2z4~q & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hdh2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hdh2z4~0 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Hdh2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ppsvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ppsvx4~0_combout = ( \soc_inst|m0_1|u_logic|Ucqvx4~combout & ( ((\soc_inst|m0_1|u_logic|Hdh2z4~0_combout & \soc_inst|m0_1|u_logic|Kzxvx4~combout )) # (\soc_inst|m0_1|u_logic|Orewx4~0_combout ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Ucqvx4~combout & ( (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout & \soc_inst|m0_1|u_logic|Kzxvx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ppsvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ppsvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ppsvx4~0 .lut_mask = 64'h0055005533773377;
+defparam \soc_inst|m0_1|u_logic|Ppsvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y11_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ppsvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ppsvx4~1_combout = ( \soc_inst|m0_1|u_logic|Socwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ppsvx4~0_combout & ((!\soc_inst|m0_1|u_logic|M66wx4~combout ) # (!\soc_inst|m0_1|u_logic|Fij2z4~q ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Socwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ppsvx4~0_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ppsvx4~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ppsvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ppsvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ppsvx4~1 .lut_mask = 64'hF0F0F0F0E0E0E0E0;
+defparam \soc_inst|m0_1|u_logic|Ppsvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y7_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ppsvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ppsvx4~2_combout = ( \soc_inst|m0_1|u_logic|Ppsvx4~1_combout & ( \soc_inst|m0_1|u_logic|Amjwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Mn3wx4~0_combout & (!\soc_inst|m0_1|u_logic|Una2z4~0_combout &
+// !\soc_inst|m0_1|u_logic|C5c2z4~2_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mn3wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Una2z4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|C5c2z4~2_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Ppsvx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Amjwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ppsvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ppsvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ppsvx4~2 .lut_mask = 64'h0000000000008080;
+defparam \soc_inst|m0_1|u_logic|Ppsvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y7_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ppsvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ppsvx4~combout = ( \soc_inst|m0_1|u_logic|Rexvx4~0_combout & ( \soc_inst|m0_1|u_logic|Ppsvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|I1c2z4~combout & ((!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) #
+// (\soc_inst|m0_1|u_logic|Jyb2z4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rexvx4~0_combout & ( \soc_inst|m0_1|u_logic|Ppsvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|I1c2z4~combout &
+// \soc_inst|m0_1|u_logic|Jyb2z4~2_combout )) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|I1c2z4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Jyb2z4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ppsvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ppsvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ppsvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ppsvx4 .lut_mask = 64'h00000000CCFCC0F0;
+defparam \soc_inst|m0_1|u_logic|Ppsvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y5_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S6ovx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S6ovx4~0_combout = ( \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Ppsvx4~combout & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q & !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Ppsvx4~combout & ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ppsvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S6ovx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S6ovx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S6ovx4~0 .lut_mask = 64'h00000000FF00AA00;
+defparam \soc_inst|m0_1|u_logic|S6ovx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y4_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xhxvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xhxvx4~combout = ( \soc_inst|m0_1|u_logic|Qem2z4~q & ( \soc_inst|m0_1|u_logic|Tki2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xhxvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xhxvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xhxvx4 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Xhxvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y4_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X5gwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|X5gwx4~0_combout = ( \soc_inst|m0_1|u_logic|Xhxvx4~combout & ( \soc_inst|m0_1|u_logic|Swy2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xhxvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|X5gwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X5gwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X5gwx4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|X5gwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y8_N41
+dffeas \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|O5nvx4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y4_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D4mvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D4mvx4~0_combout = ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Tki2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & (
+// (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & (((!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Tki2z4~q )) # (\soc_inst|m0_1|u_logic|X5gwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q &
+// (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Tki2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|X5gwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|D4mvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D4mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D4mvx4~0 .lut_mask = 64'h0ACE0ACE00CC00CC;
+defparam \soc_inst|m0_1|u_logic|D4mvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y10_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J4pvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|J4pvx4~0_combout = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Npk2z4~q & (!\soc_inst|m0_1|u_logic|Aok2z4~q & ((!\soc_inst|m0_1|u_logic|O5t2z4~q ) #
+// (\soc_inst|m0_1|u_logic|Fij2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Npk2z4~q & (!\soc_inst|m0_1|u_logic|Aok2z4~q & ((!\soc_inst|m0_1|u_logic|O5t2z4~q ) #
+// (\soc_inst|m0_1|u_logic|Fij2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Npk2z4~q & ((!\soc_inst|m0_1|u_logic|O5t2z4~q ) # (\soc_inst|m0_1|u_logic|Fij2z4~q )))
+// ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q ) # (\soc_inst|m0_1|u_logic|Fij2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|J4pvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J4pvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J4pvx4~0 .lut_mask = 64'hFF33551150105010;
+defparam \soc_inst|m0_1|u_logic|J4pvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y12_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J4pvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|J4pvx4~1_combout = ( !\soc_inst|m0_1|u_logic|J4pvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Z5pvx4~4_combout & ( (!\soc_inst|m0_1|u_logic|S5pvx4~combout & !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|J4pvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|J4pvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J4pvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J4pvx4~1 .lut_mask = 64'h8888000000000000;
+defparam \soc_inst|m0_1|u_logic|J4pvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y11_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X4pvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|X4pvx4~combout = ( \soc_inst|m0_1|u_logic|Mtqvx4~combout ) # ( !\soc_inst|m0_1|u_logic|Mtqvx4~combout & ( \soc_inst|m0_1|u_logic|B1vvx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|X4pvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X4pvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X4pvx4 .lut_mask = 64'h00FF00FFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|X4pvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y11_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z1ewx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z1ewx4~0_combout = ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z1ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z1ewx4~0 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|Z1ewx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y5_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ahwvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ahwvx4~0_combout = ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Qem2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ahwvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ahwvx4~0 .lut_mask = 64'h00000000F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Ahwvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y5_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C2yvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C2yvx4~combout = ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C2yvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C2yvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C2yvx4 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|C2yvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y3_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ohwvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ohwvx4~combout = ( \soc_inst|m0_1|u_logic|Ahwvx4~0_combout & ( \soc_inst|m0_1|u_logic|C2yvx4~combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ohwvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ohwvx4 .lut_mask = 64'h000000000000FFFF;
+defparam \soc_inst|m0_1|u_logic|Ohwvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y3_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z3yvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z3yvx4~combout = ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|C2yvx4~combout & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q & \soc_inst|m0_1|u_logic|Tki2z4~q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|C2yvx4~combout & ( (\soc_inst|m0_1|u_logic|Tki2z4~q & (!\soc_inst|m0_1|u_logic|U2x2z4~q $ (!\soc_inst|m0_1|u_logic|Qem2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z3yvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z3yvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z3yvx4 .lut_mask = 64'h0000000006060C0C;
+defparam \soc_inst|m0_1|u_logic|Z3yvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y4_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ukpvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ukpvx4~combout = ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ukpvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ukpvx4 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|Ukpvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y3_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmpvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rmpvx4~0_combout = ( \soc_inst|m0_1|u_logic|U2x2z4~q & ( \soc_inst|m0_1|u_logic|Ukpvx4~combout & ( (!\soc_inst|m0_1|u_logic|Z3yvx4~combout & ((!\soc_inst|m0_1|u_logic|Xhxvx4~combout ) # (\soc_inst|m0_1|u_logic|Swy2z4~q ))) ) ) )
+// # ( !\soc_inst|m0_1|u_logic|U2x2z4~q & ( \soc_inst|m0_1|u_logic|Ukpvx4~combout & ( !\soc_inst|m0_1|u_logic|Z3yvx4~combout ) ) ) # ( \soc_inst|m0_1|u_logic|U2x2z4~q & ( !\soc_inst|m0_1|u_logic|Ukpvx4~combout & ( !\soc_inst|m0_1|u_logic|Z3yvx4~combout
+// ) ) ) # ( !\soc_inst|m0_1|u_logic|U2x2z4~q & ( !\soc_inst|m0_1|u_logic|Ukpvx4~combout & ( !\soc_inst|m0_1|u_logic|Z3yvx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Z3yvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Xhxvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rmpvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rmpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rmpvx4~0 .lut_mask = 64'hCCCCCCCCCCCCCC0C;
+defparam \soc_inst|m0_1|u_logic|Rmpvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y6_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rngwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rngwx4~combout = (!\soc_inst|m0_1|u_logic|O5t2z4~q ) # (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rngwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rngwx4 .lut_mask = 64'hFF0FFF0FFF0FFF0F;
+defparam \soc_inst|m0_1|u_logic|Rngwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y3_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmpvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rmpvx4~1_combout = ( \soc_inst|m0_1|u_logic|Dvy2z4~q & ( (!\soc_inst|m0_1|u_logic|Ohwvx4~combout & (\soc_inst|m0_1|u_logic|Rmpvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Howvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rngwx4~combout
+// )))) ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~q & ( (\soc_inst|m0_1|u_logic|Rmpvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Howvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rngwx4~combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Rmpvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rmpvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rmpvx4~1 .lut_mask = 64'h0C0F0C0F080A080A;
+defparam \soc_inst|m0_1|u_logic|Rmpvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y5_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wvewx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wvewx4~0_combout = ( !\soc_inst|m0_1|u_logic|U2x2z4~q & ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wvewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wvewx4~0 .lut_mask = 64'h0F0F0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|Wvewx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y5_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H5fwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H5fwx4~0_combout = ( \soc_inst|m0_1|u_logic|Swy2z4~q & ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H5fwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H5fwx4~0 .lut_mask = 64'h0000000055555555;
+defparam \soc_inst|m0_1|u_logic|H5fwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y3_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Icyvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Icyvx4~0_combout = ( \soc_inst|m0_1|u_logic|Xhxvx4~combout & ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xhxvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Icyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Icyvx4~0 .lut_mask = 64'h00000000CCCCCCCC;
+defparam \soc_inst|m0_1|u_logic|Icyvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y3_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zpqvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zpqvx4~0_combout = ( \soc_inst|m0_1|u_logic|Ukpvx4~combout & ( (\soc_inst|m0_1|u_logic|Icyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|H5fwx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zpqvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zpqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zpqvx4~0 .lut_mask = 64'h0000000033FF33FF;
+defparam \soc_inst|m0_1|u_logic|Zpqvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y10_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwqvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lwqvx4~0_combout = ( \soc_inst|m0_1|u_logic|Abovx4~0_combout & ( (((!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Xnrvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Hxx2z4~q )) # (\soc_inst|m0_1|u_logic|Nbm2z4~q
+// ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Xnrvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lwqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lwqvx4~0 .lut_mask = 64'h00000000FFF7FFF7;
+defparam \soc_inst|m0_1|u_logic|Lwqvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y5_N45
+cyclonev_lcell_comb \soc_inst|switches_1|read_enable~0 (
+// Equation(s):
+// \soc_inst|switches_1|read_enable~0_combout = ( !\soc_inst|m0_1|u_logic|hwrite_o~0_combout & ( \soc_inst|switches_1|half_word_address~1_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|switches_1|half_word_address~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|switches_1|read_enable~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|switches_1|read_enable~0 .extended_lut = "off";
+defparam \soc_inst|switches_1|read_enable~0 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|switches_1|read_enable~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X18_Y5_N46
+dffeas \soc_inst|switches_1|read_enable (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|switches_1|read_enable~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|switches_1|read_enable~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|read_enable .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|read_enable .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y9_N24
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[1]~37 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[1]~37_combout = ( !\soc_inst|interconnect_1|mux_sel [0] & ( (!\soc_inst|interconnect_1|mux_sel [1]) # (((!\soc_inst|switches_1|read_enable~q ) # ((\soc_inst|switches_1|half_word_address [0]))) #
+// (\soc_inst|interconnect_1|mux_sel [2])) ) ) # ( \soc_inst|interconnect_1|mux_sel [0] & ( (((!\soc_inst|ram_1|read_cycle~q ) # ((!\soc_inst|ram_1|byte_select [0]))) # (\soc_inst|interconnect_1|mux_sel [2])) # (\soc_inst|interconnect_1|mux_sel [1]) ) )
+
+ .dataa(!\soc_inst|interconnect_1|mux_sel [1]),
+ .datab(!\soc_inst|interconnect_1|mux_sel [2]),
+ .datac(!\soc_inst|ram_1|read_cycle~q ),
+ .datad(!\soc_inst|ram_1|byte_select [0]),
+ .datae(!\soc_inst|interconnect_1|mux_sel [0]),
+ .dataf(!\soc_inst|switches_1|half_word_address [0]),
+ .datag(!\soc_inst|switches_1|read_enable~q ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[1]~37_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[1]~37 .extended_lut = "on";
+defparam \soc_inst|interconnect_1|HRDATA[1]~37 .lut_mask = 64'hFBFBFFF7FFFFFFF7;
+defparam \soc_inst|interconnect_1|HRDATA[1]~37 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y6_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Evcwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Evcwx4~2_combout = ( !\soc_inst|m0_1|u_logic|T3ovx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Evcwx4~1_combout & (!\soc_inst|m0_1|u_logic|Evcwx4~0_combout & (!\soc_inst|m0_1|u_logic|Fzcwx4~0_combout &
+// !\soc_inst|m0_1|u_logic|H4ovx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Evcwx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Evcwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Fzcwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|H4ovx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|T3ovx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Evcwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Evcwx4~2 .lut_mask = 64'h8000800000000000;
+defparam \soc_inst|m0_1|u_logic|Evcwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y5_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa7wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wa7wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Sgj2z4~q & ( \soc_inst|m0_1|u_logic|O5t2z4~q & ( (\soc_inst|m0_1|u_logic|Aok2z4~q & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Sgj2z4~q & (
+// !\soc_inst|m0_1|u_logic|O5t2z4~q & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q & ( !\soc_inst|m0_1|u_logic|O5t2z4~q & (
+// (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Aok2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wa7wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wa7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wa7wx4~0 .lut_mask = 64'hC5C5C0C005050000;
+defparam \soc_inst|m0_1|u_logic|Wa7wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y5_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G97wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G97wx4~2_combout = ( \soc_inst|m0_1|u_logic|O5t2z4~q & ( \soc_inst|m0_1|u_logic|Sgj2z4~q ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~q & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Fij2z4~q &
+// \soc_inst|m0_1|u_logic|Sgj2z4~q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G97wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G97wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G97wx4~2 .lut_mask = 64'h0030003000FF00FF;
+defparam \soc_inst|m0_1|u_logic|G97wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y5_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Donvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Donvx4~0_combout = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|O5t2z4~q & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) #
+// (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|O5t2z4~q & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Npk2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|O5t2z4~q & (
+// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|O5t2z4~q & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) #
+// (\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Donvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Donvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Donvx4~0 .lut_mask = 64'h8C8CCCCC8C04CC44;
+defparam \soc_inst|m0_1|u_logic|Donvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y5_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Donvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Donvx4~1_combout = ( \soc_inst|m0_1|u_logic|Sgj2z4~q & ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Npk2z4~q & !\soc_inst|m0_1|u_logic|Fij2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Sgj2z4~q & (
+// !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Npk2z4~q & ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # ((!\soc_inst|m0_1|u_logic|Nsk2z4~q & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q & (
+// !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Npk2z4~q & (\soc_inst|m0_1|u_logic|Fij2z4~q & (!\soc_inst|m0_1|u_logic|Nsk2z4~q & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Donvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Donvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Donvx4~1 .lut_mask = 64'h0010445400004444;
+defparam \soc_inst|m0_1|u_logic|Donvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y5_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G97wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G97wx4~1_combout = ( \soc_inst|m0_1|u_logic|Tki2z4~q & ( \soc_inst|m0_1|u_logic|Fij2z4~q & ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Tki2z4~q & ( \soc_inst|m0_1|u_logic|Fij2z4~q & (
+// (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tki2z4~q & ( !\soc_inst|m0_1|u_logic|Fij2z4~q & (
+// \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Tki2z4~q & ( !\soc_inst|m0_1|u_logic|Fij2z4~q & ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G97wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G97wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G97wx4~1 .lut_mask = 64'h3333333333033333;
+defparam \soc_inst|m0_1|u_logic|G97wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y5_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Donvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Donvx4~2_combout = ( !\soc_inst|m0_1|u_logic|Donvx4~1_combout & ( \soc_inst|m0_1|u_logic|G97wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Wa7wx4~0_combout & \soc_inst|m0_1|u_logic|Donvx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Donvx4~1_combout & ( !\soc_inst|m0_1|u_logic|G97wx4~1_combout & ( (\soc_inst|m0_1|u_logic|G97wx4~0_combout & (!\soc_inst|m0_1|u_logic|Wa7wx4~0_combout & (!\soc_inst|m0_1|u_logic|G97wx4~2_combout &
+// \soc_inst|m0_1|u_logic|Donvx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Wa7wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|G97wx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Donvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Donvx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|G97wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Donvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Donvx4~2 .lut_mask = 64'h0040000000CC0000;
+defparam \soc_inst|m0_1|u_logic|Donvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y3_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J3iwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|J3iwx4~0_combout = ( \soc_inst|m0_1|u_logic|U2x2z4~q & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q & (!\soc_inst|m0_1|u_logic|Rngwx4~combout & \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )) ) ) # ( !\soc_inst|m0_1|u_logic|U2x2z4~q & (
+// (!\soc_inst|m0_1|u_logic|Rngwx4~combout & !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|J3iwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J3iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J3iwx4~0 .lut_mask = 64'hCC00CC0000880088;
+defparam \soc_inst|m0_1|u_logic|J3iwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X19_Y6_N22
+dffeas \soc_inst|ram_1|saved_word_address[0] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Fvovx4~combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|ram_1|always1~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|ram_1|saved_word_address [0]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|saved_word_address[0] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y5_N3
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[0]~0 (
+// Equation(s):
+// \soc_inst|ram_1|memory.raddr_a[0]~0_combout = ( \soc_inst|ram_1|always1~0_combout & ( (!\soc_inst|ram_1|write_cycle~q & ((\soc_inst|m0_1|u_logic|Fvovx4~combout ))) # (\soc_inst|ram_1|write_cycle~q & (\soc_inst|ram_1|saved_word_address [0])) ) ) # (
+// !\soc_inst|ram_1|always1~0_combout & ( \soc_inst|ram_1|saved_word_address [0] ) )
+
+ .dataa(!\soc_inst|ram_1|write_cycle~q ),
+ .datab(!\soc_inst|ram_1|saved_word_address [0]),
+ .datac(!\soc_inst|m0_1|u_logic|Fvovx4~combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|always1~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|memory.raddr_a[0]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory.raddr_a[0]~0 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[0]~0 .lut_mask = 64'h333333331B1B1B1B;
+defparam \soc_inst|ram_1|memory.raddr_a[0]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y6_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bnnvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bnnvx4~combout = ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout & ( \soc_inst|m0_1|u_logic|Dcrwx4~6_combout & ( ((!\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q $ (\soc_inst|m0_1|u_logic|J4x2z4~q )) # (\soc_inst|m0_1|u_logic|Hxx2z4~q ))
+// # (\soc_inst|m0_1|u_logic|Fcj2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout & ( \soc_inst|m0_1|u_logic|Dcrwx4~6_combout & ( ((!\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q $ (\soc_inst|m0_1|u_logic|J4x2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Hxx2z4~q )) # (\soc_inst|m0_1|u_logic|Fcj2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout & ( ((!\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q $ (\soc_inst|m0_1|u_logic|J4x2z4~q
+// )) # (\soc_inst|m0_1|u_logic|Hxx2z4~q )) # (\soc_inst|m0_1|u_logic|Fcj2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bnnvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bnnvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bnnvx4 .lut_mask = 64'hFFFFF77FF77FF77F;
+defparam \soc_inst|m0_1|u_logic|Bnnvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y9_N38
+dffeas \soc_inst|m0_1|u_logic|Viy2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|L7nvx4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Viy2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Viy2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Viy2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y5_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vapvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vapvx4~combout = ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout & ( (\soc_inst|m0_1|u_logic|Vaw2z4~q & (\soc_inst|m0_1|u_logic|Scpvx4~2_combout & ((\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Fcj2z4~q )))) )
+// )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vaw2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vapvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vapvx4 .lut_mask = 64'h0000000001110111;
+defparam \soc_inst|m0_1|u_logic|Vapvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: IOIBUF_X18_Y0_N75
+cyclonev_io_ibuf \SW[2]~input (
+ .i(SW[2]),
+ .ibar(gnd),
+ .dynamicterminationcontrol(gnd),
+ .o(\SW[2]~input_o ));
+// synopsys translate_off
+defparam \SW[2]~input .bus_hold = "false";
+defparam \SW[2]~input .simulate_z_as = "z";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y9_N27
+cyclonev_lcell_comb \soc_inst|switches_1|switch_store[0][2]~feeder (
+// Equation(s):
+// \soc_inst|switches_1|switch_store[0][2]~feeder_combout = ( \SW[2]~input_o )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\SW[2]~input_o ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|switches_1|switch_store[0][2]~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[0][2]~feeder .extended_lut = "off";
+defparam \soc_inst|switches_1|switch_store[0][2]~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|switches_1|switch_store[0][2]~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: IOIBUF_X14_Y0_N35
+cyclonev_io_ibuf \KEY[0]~input (
+ .i(KEY[0]),
+ .ibar(gnd),
+ .dynamicterminationcontrol(gnd),
+ .o(\KEY[0]~input_o ));
+// synopsys translate_off
+defparam \KEY[0]~input .bus_hold = "false";
+defparam \KEY[0]~input .simulate_z_as = "z";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y11_N6
+cyclonev_lcell_comb \soc_inst|switches_1|last_buttons[0]~1 (
+// Equation(s):
+// \soc_inst|switches_1|last_buttons[0]~1_combout = !\KEY[0]~input_o
+
+ .dataa(gnd),
+ .datab(!\KEY[0]~input_o ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|switches_1|last_buttons[0]~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|switches_1|last_buttons[0]~1 .extended_lut = "off";
+defparam \soc_inst|switches_1|last_buttons[0]~1 .lut_mask = 64'hCCCCCCCCCCCCCCCC;
+defparam \soc_inst|switches_1|last_buttons[0]~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X22_Y11_N8
+dffeas \soc_inst|switches_1|last_buttons[0] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|switches_1|last_buttons[0]~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|switches_1|last_buttons [0]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|last_buttons[0] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|last_buttons[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y11_N9
+cyclonev_lcell_comb \soc_inst|switches_1|always0~1 (
+// Equation(s):
+// \soc_inst|switches_1|always0~1_combout = ( !\soc_inst|switches_1|last_buttons [0] & ( !\KEY[0]~input_o ) )
+
+ .dataa(gnd),
+ .datab(!\KEY[0]~input_o ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|switches_1|last_buttons [0]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|switches_1|always0~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|switches_1|always0~1 .extended_lut = "off";
+defparam \soc_inst|switches_1|always0~1 .lut_mask = 64'hCCCCCCCC00000000;
+defparam \soc_inst|switches_1|always0~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X22_Y9_N29
+dffeas \soc_inst|switches_1|switch_store[0][2] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|switches_1|switch_store[0][2]~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|switches_1|always0~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|switches_1|switch_store[0][2]~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[0][2] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[0][2] .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y10_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bpzvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bpzvx4~1_combout = ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Bpzvx4~0_combout & ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Bpzvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bpzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bpzvx4~1 .lut_mask = 64'h000000000F0F0000;
+defparam \soc_inst|m0_1|u_logic|Bpzvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y7_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hsize_o~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hsize_o~0_combout = ( \soc_inst|m0_1|u_logic|Mrsvx4~4_combout & ( !\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) # ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout & ( (\soc_inst|m0_1|u_logic|Qr42z4~1_combout &
+// !\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hsize_o~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hsize_o~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hsize_o~0 .lut_mask = 64'h0F000F00FF00FF00;
+defparam \soc_inst|m0_1|u_logic|hsize_o~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y5_N42
+cyclonev_lcell_comb \soc_inst|switches_1|half_word_address~0 (
+// Equation(s):
+// \soc_inst|switches_1|half_word_address~0_combout = ( !\soc_inst|m0_1|u_logic|It52z4~2_combout & ( \soc_inst|m0_1|u_logic|T50wx4~0_combout & ( \soc_inst|m0_1|u_logic|Qr42z4~1_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|switches_1|half_word_address~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|switches_1|half_word_address~0 .extended_lut = "off";
+defparam \soc_inst|switches_1|half_word_address~0 .lut_mask = 64'h0000000000FF0000;
+defparam \soc_inst|switches_1|half_word_address~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y5_N33
+cyclonev_lcell_comb \soc_inst|ram_1|byte2~0 (
+// Equation(s):
+// \soc_inst|ram_1|byte2~0_combout = ( \soc_inst|m0_1|u_logic|hsize_o~0_combout & ( \soc_inst|switches_1|half_word_address~0_combout & ( (!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout &
+// \soc_inst|m0_1|u_logic|Qr42z4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|hsize_o~0_combout & ( \soc_inst|switches_1|half_word_address~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|hsize_o~0_combout & ( !\soc_inst|switches_1|half_word_address~0_combout
+// ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|hsize_o~0_combout ),
+ .dataf(!\soc_inst|switches_1|half_word_address~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|byte2~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|byte2~0 .extended_lut = "off";
+defparam \soc_inst|ram_1|byte2~0 .lut_mask = 64'hFFFF0000FFFFF2F2;
+defparam \soc_inst|ram_1|byte2~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y5_N34
+dffeas \soc_inst|ram_1|byte_select[2] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|ram_1|byte2~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|ram_1|always1~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|ram_1|byte_select [2]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|byte_select[2] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|byte_select[2] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y9_N15
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[20]~7 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[20]~7_combout = ( \soc_inst|interconnect_1|HRDATA[24]~6_combout & ( ((\soc_inst|ram_1|read_cycle~q & (\soc_inst|ram_1|byte_select [2] & \soc_inst|interconnect_1|mux_sel [0]))) # (\soc_inst|interconnect_1|mux_sel [1]) ) )
+
+ .dataa(!\soc_inst|ram_1|read_cycle~q ),
+ .datab(!\soc_inst|ram_1|byte_select [2]),
+ .datac(!\soc_inst|interconnect_1|mux_sel [1]),
+ .datad(!\soc_inst|interconnect_1|mux_sel [0]),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[24]~6_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[20]~7 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[20]~7 .lut_mask = 64'h000000000F1F0F1F;
+defparam \soc_inst|interconnect_1|HRDATA[20]~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: IOIBUF_X16_Y0_N18
+cyclonev_io_ibuf \SW[5]~input (
+ .i(SW[5]),
+ .ibar(gnd),
+ .dynamicterminationcontrol(gnd),
+ .o(\SW[5]~input_o ));
+// synopsys translate_off
+defparam \SW[5]~input .bus_hold = "false";
+defparam \SW[5]~input .simulate_z_as = "z";
+// synopsys translate_on
+
+// Location: IOIBUF_X18_Y0_N92
+cyclonev_io_ibuf \KEY[1]~input (
+ .i(KEY[1]),
+ .ibar(gnd),
+ .dynamicterminationcontrol(gnd),
+ .o(\KEY[1]~input_o ));
+// synopsys translate_off
+defparam \KEY[1]~input .bus_hold = "false";
+defparam \KEY[1]~input .simulate_z_as = "z";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y11_N27
+cyclonev_lcell_comb \soc_inst|switches_1|last_buttons[1]~0 (
+// Equation(s):
+// \soc_inst|switches_1|last_buttons[1]~0_combout = !\KEY[1]~input_o
+
+ .dataa(gnd),
+ .datab(!\KEY[1]~input_o ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|switches_1|last_buttons[1]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|switches_1|last_buttons[1]~0 .extended_lut = "off";
+defparam \soc_inst|switches_1|last_buttons[1]~0 .lut_mask = 64'hCCCCCCCCCCCCCCCC;
+defparam \soc_inst|switches_1|last_buttons[1]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X22_Y11_N29
+dffeas \soc_inst|switches_1|last_buttons[1] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|switches_1|last_buttons[1]~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|switches_1|last_buttons [1]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|last_buttons[1] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|last_buttons[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y11_N24
+cyclonev_lcell_comb \soc_inst|switches_1|always0~0 (
+// Equation(s):
+// \soc_inst|switches_1|always0~0_combout = (!\KEY[1]~input_o & !\soc_inst|switches_1|last_buttons [1])
+
+ .dataa(gnd),
+ .datab(!\KEY[1]~input_o ),
+ .datac(!\soc_inst|switches_1|last_buttons [1]),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|switches_1|always0~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|switches_1|always0~0 .extended_lut = "off";
+defparam \soc_inst|switches_1|always0~0 .lut_mask = 64'hC0C0C0C0C0C0C0C0;
+defparam \soc_inst|switches_1|always0~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y10_N50
+dffeas \soc_inst|switches_1|switch_store[1][5] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\SW[5]~input_o ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|switches_1|always0~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|switches_1|switch_store[1][5]~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[1][5] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[1][5] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y6_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W28wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|W28wx4~0_combout = ( \soc_inst|m0_1|u_logic|Dvy2z4~q & ( !\soc_inst|m0_1|u_logic|Swy2z4~q ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~q )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|W28wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W28wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W28wx4~0 .lut_mask = 64'hFFFFFFFFF0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|W28wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y8_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Egkwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Egkwx4~0_combout = ( !\soc_inst|m0_1|u_logic|B1vvx4~0_combout & ( !\soc_inst|m0_1|u_logic|O5t2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Egkwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Egkwx4~0 .lut_mask = 64'hF0F0F0F000000000;
+defparam \soc_inst|m0_1|u_logic|Egkwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y9_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Df3wx4~3_combout = ( \soc_inst|m0_1|u_logic|Egkwx4~0_combout & ( \soc_inst|m0_1|u_logic|Ark2z4~q & ( (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout & !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Df3wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Df3wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~3 .lut_mask = 64'h0000000000003030;
+defparam \soc_inst|m0_1|u_logic|Df3wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y9_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Df3wx4~4_combout = ( \soc_inst|m0_1|u_logic|Df3wx4~3_combout & ( !\soc_inst|m0_1|u_logic|Npk2z4~q ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q & (\soc_inst|m0_1|u_logic|Fij2z4~q &
+// \soc_inst|m0_1|u_logic|Orewx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Df3wx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Df3wx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Df3wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~4 .lut_mask = 64'h000A000AAAAAAAAA;
+defparam \soc_inst|m0_1|u_logic|Df3wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y6_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qp3wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qp3wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Npk2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qp3wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qp3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qp3wx4~0 .lut_mask = 64'h0F0F0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|Qp3wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y5_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jp3wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jp3wx4~combout = ( !\soc_inst|m0_1|u_logic|B1vvx4~0_combout & ( \soc_inst|m0_1|u_logic|Aok2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jp3wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jp3wx4 .lut_mask = 64'h0F0F0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|Jp3wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y4_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xiwvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xiwvx4~0_combout = ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|U2x2z4~q & \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xiwvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xiwvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xiwvx4~0 .lut_mask = 64'h000F000F00000000;
+defparam \soc_inst|m0_1|u_logic|Xiwvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y3_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Csewx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Csewx4~0_combout = ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Tki2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Csewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Csewx4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Csewx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y3_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V1yvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|V1yvx4~0_combout = ( \soc_inst|m0_1|u_logic|Csewx4~0_combout & ( \soc_inst|m0_1|u_logic|Qem2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V1yvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V1yvx4~0 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|V1yvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y7_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J5vvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|J5vvx4~combout = (!\soc_inst|m0_1|u_logic|O5t2z4~q & \soc_inst|interconnect_1|HREADY~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datad(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|J5vvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J5vvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J5vvx4 .lut_mask = 64'h00F000F000F000F0;
+defparam \soc_inst|m0_1|u_logic|J5vvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X21_Y5_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U5qvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U5qvx4~combout = ( !\soc_inst|m0_1|u_logic|hprot_o~5_combout & ( \soc_inst|interconnect_1|HREADY~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|hprot_o~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U5qvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U5qvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U5qvx4 .lut_mask = 64'h0F0F0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|U5qvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y4_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W0pvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|W0pvx4~combout = ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout & ( \soc_inst|m0_1|u_logic|Orewx4~0_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|W0pvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W0pvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W0pvx4 .lut_mask = 64'h0000555500005555;
+defparam \soc_inst|m0_1|u_logic|W0pvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y7_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xwawx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xwawx4~2_combout = ( \soc_inst|m0_1|u_logic|Fij2z4~q & ( \soc_inst|m0_1|u_logic|Ark2z4~q & ( ((!\soc_inst|m0_1|u_logic|Npk2z4~q & \soc_inst|m0_1|u_logic|O5t2z4~q )) # (\soc_inst|m0_1|u_logic|Tki2z4~q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Fij2z4~q & ( \soc_inst|m0_1|u_logic|Ark2z4~q & ( ((!\soc_inst|m0_1|u_logic|Npk2z4~q & \soc_inst|m0_1|u_logic|O5t2z4~q )) # (\soc_inst|m0_1|u_logic|Tki2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q & (
+// !\soc_inst|m0_1|u_logic|Ark2z4~q & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q & (\soc_inst|m0_1|u_logic|Npk2z4~q & \soc_inst|m0_1|u_logic|Tki2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xwawx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xwawx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xwawx4~2 .lut_mask = 64'h002200000CFF0CFF;
+defparam \soc_inst|m0_1|u_logic|Xwawx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y7_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xwawx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xwawx4~1_combout = ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Npk2z4~q & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q & (((\soc_inst|m0_1|u_logic|O5t2z4~q & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )))) #
+// (\soc_inst|m0_1|u_logic|Aok2z4~q & (((\soc_inst|m0_1|u_logic|O5t2z4~q & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Fij2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Npk2z4~q & (
+// (\soc_inst|m0_1|u_logic|Aok2z4~q & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Npk2z4~q & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q & (((\soc_inst|m0_1|u_logic|O5t2z4~q &
+// !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Aok2z4~q & (((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Fij2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xwawx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xwawx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xwawx4~1 .lut_mask = 64'h5F1155001F110000;
+defparam \soc_inst|m0_1|u_logic|Xwawx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y7_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xwawx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xwawx4~3_combout = ( \soc_inst|m0_1|u_logic|Fij2z4~q & ( !\soc_inst|m0_1|u_logic|Pdi2z4~q & ( ((\soc_inst|m0_1|u_logic|Aok2z4~q & (!\soc_inst|m0_1|u_logic|Tki2z4~q & \soc_inst|m0_1|u_logic|Nsk2z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Sgj2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q & ( !\soc_inst|m0_1|u_logic|Pdi2z4~q & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q $ (((!\soc_inst|m0_1|u_logic|Tki2z4~q & \soc_inst|m0_1|u_logic|Nsk2z4~q )))) #
+// (\soc_inst|m0_1|u_logic|Sgj2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xwawx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xwawx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xwawx4~3 .lut_mask = 64'hAF6F0F4F00000000;
+defparam \soc_inst|m0_1|u_logic|Xwawx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y7_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xwawx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xwawx4~0_combout = ( \soc_inst|m0_1|u_logic|Xwawx4~1_combout & ( \soc_inst|m0_1|u_logic|Xwawx4~3_combout & ( (((\soc_inst|m0_1|u_logic|Npk2z4~q & \soc_inst|m0_1|u_logic|Xwawx4~2_combout )) # (\soc_inst|m0_1|u_logic|Sgj2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Aok2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xwawx4~1_combout & ( \soc_inst|m0_1|u_logic|Xwawx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q & (((\soc_inst|m0_1|u_logic|Npk2z4~q & \soc_inst|m0_1|u_logic|Xwawx4~2_combout )) #
+// (\soc_inst|m0_1|u_logic|Aok2z4~q ))) # (\soc_inst|m0_1|u_logic|Sgj2z4~q & (((\soc_inst|m0_1|u_logic|Xwawx4~2_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Xwawx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Xwawx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Xwawx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xwawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xwawx4~0 .lut_mask = 64'h00000000307F3F7F;
+defparam \soc_inst|m0_1|u_logic|Xwawx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y6_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qtrwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qtrwx4~0_combout = ( \soc_inst|m0_1|u_logic|E4xvx4~0_combout & ( \soc_inst|m0_1|u_logic|Cyq2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Cyq2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|E4xvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qtrwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qtrwx4~0 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Qtrwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y7_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dplwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dplwx4~0_combout = ( \soc_inst|m0_1|u_logic|Fij2z4~q & ( \soc_inst|m0_1|u_logic|Nsk2z4~q & ( (\soc_inst|m0_1|u_logic|Aok2z4~q & (!\soc_inst|m0_1|u_logic|O5t2z4~q & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Fij2z4~q & ( \soc_inst|m0_1|u_logic|Nsk2z4~q & ( (\soc_inst|m0_1|u_logic|Aok2z4~q & (!\soc_inst|m0_1|u_logic|O5t2z4~q & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Fij2z4~q & (
+// !\soc_inst|m0_1|u_logic|Nsk2z4~q & ( (\soc_inst|m0_1|u_logic|Aok2z4~q & (!\soc_inst|m0_1|u_logic|O5t2z4~q & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q & ( !\soc_inst|m0_1|u_logic|Nsk2z4~q & (
+// (!\soc_inst|m0_1|u_logic|O5t2z4~q & ((!\soc_inst|m0_1|u_logic|Aok2z4~q & ((\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Aok2z4~q & (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dplwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dplwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dplwx4~0 .lut_mask = 64'h40C8404040404040;
+defparam \soc_inst|m0_1|u_logic|Dplwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y4_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cllwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cllwx4~0_combout = ( \soc_inst|m0_1|u_logic|O5t2z4~q & ( (!\soc_inst|m0_1|u_logic|Dplwx4~0_combout & ((!\soc_inst|m0_1|u_logic|C9yvx4~combout ) # (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|O5t2z4~q & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q & !\soc_inst|m0_1|u_logic|Dplwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Dplwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cllwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cllwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cllwx4~0 .lut_mask = 64'hA0A0A0A0F030F030;
+defparam \soc_inst|m0_1|u_logic|Cllwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y5_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qsewx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qsewx4~0_combout = ( !\soc_inst|m0_1|u_logic|Qem2z4~q & ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qsewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qsewx4~0 .lut_mask = 64'hF0F0F0F000000000;
+defparam \soc_inst|m0_1|u_logic|Qsewx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y3_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P7wvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P7wvx4~0_combout = ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Qsewx4~0_combout & \soc_inst|m0_1|u_logic|Wvewx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P7wvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P7wvx4~0 .lut_mask = 64'h0033003300000000;
+defparam \soc_inst|m0_1|u_logic|P7wvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y4_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qslwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qslwx4~0_combout = ( !\soc_inst|m0_1|u_logic|P7wvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ukpvx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qslwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qslwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qslwx4~0 .lut_mask = 64'hFFF0FFF000000000;
+defparam \soc_inst|m0_1|u_logic|Qslwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y3_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fyrwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fyrwx4~0_combout = ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Z3yvx4~combout & ((!\soc_inst|m0_1|u_logic|Ohwvx4~combout ) # (\soc_inst|m0_1|u_logic|Dvy2z4~q ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Howvx4~0_combout & (!\soc_inst|m0_1|u_logic|Z3yvx4~combout & ((!\soc_inst|m0_1|u_logic|Ohwvx4~combout ) # (\soc_inst|m0_1|u_logic|Dvy2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Z3yvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fyrwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fyrwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fyrwx4~0 .lut_mask = 64'h80C080C0A0F0A0F0;
+defparam \soc_inst|m0_1|u_logic|Fyrwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y4_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fyrwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fyrwx4~1_combout = ( \soc_inst|m0_1|u_logic|Ukpvx4~combout & ( (\soc_inst|m0_1|u_logic|Fyrwx4~0_combout & ((!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Swy2z4~q & \soc_inst|m0_1|u_logic|U2x2z4~q )))) )
+// ) # ( !\soc_inst|m0_1|u_logic|Ukpvx4~combout & ( \soc_inst|m0_1|u_logic|Fyrwx4~0_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fyrwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fyrwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fyrwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fyrwx4~1 .lut_mask = 64'h5555555544454445;
+defparam \soc_inst|m0_1|u_logic|Fyrwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y4_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Surwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Surwx4~0_combout = (\soc_inst|m0_1|u_logic|Fyrwx4~1_combout & !\soc_inst|m0_1|u_logic|Ohwvx4~combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Fyrwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Surwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Surwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Surwx4~0 .lut_mask = 64'h0F000F000F000F00;
+defparam \soc_inst|m0_1|u_logic|Surwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y8_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dghvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dghvx4~0_combout = ( \soc_inst|m0_1|u_logic|Surwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Qslwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Surwx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Zoy2z4~q ) # ((!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Qslwx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Qslwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Surwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dghvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dghvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dghvx4~0 .lut_mask = 64'hFFA0FFA0A0A0A0A0;
+defparam \soc_inst|m0_1|u_logic|Dghvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y4_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gvrwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gvrwx4~0_combout = ( \soc_inst|m0_1|u_logic|Fij2z4~q & ( !\soc_inst|m0_1|u_logic|O5t2z4~q ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q & (((\soc_inst|m0_1|u_logic|Aok2z4~q &
+// \soc_inst|m0_1|u_logic|Ffj2z4~q )) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gvrwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gvrwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gvrwx4~0 .lut_mask = 64'h222A222AAAAAAAAA;
+defparam \soc_inst|m0_1|u_logic|Gvrwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y14_N37
+dffeas \soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Wamvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y9_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P0pvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P0pvx4~0_combout = ( \soc_inst|m0_1|u_logic|Aok2z4~q & ( (\soc_inst|m0_1|u_logic|Kzxvx4~combout & \soc_inst|m0_1|u_logic|Df3wx4~9_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P0pvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P0pvx4~0 .lut_mask = 64'h00000000000F000F;
+defparam \soc_inst|m0_1|u_logic|P0pvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y4_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qnkvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qnkvx4~0_combout = ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout & !\soc_inst|m0_1|u_logic|Efp2z4~q )) # (\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ) ) ) # (
+// !\soc_inst|m0_1|u_logic|P0pvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout & !\soc_inst|m0_1|u_logic|Efp2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Efp2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qnkvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qnkvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qnkvx4~0 .lut_mask = 64'hAA00AA00AF0FAF0F;
+defparam \soc_inst|m0_1|u_logic|Qnkvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y4_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qnkvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qnkvx4~1_combout = ( !\soc_inst|m0_1|u_logic|Qnkvx4~0_combout & ( \soc_inst|m0_1|u_logic|Rxzvx4~combout & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout & ((!\soc_inst|m0_1|u_logic|W0pvx4~combout ) #
+// (\soc_inst|m0_1|u_logic|Cax2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qnkvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Rxzvx4~combout & ( (!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # (\soc_inst|m0_1|u_logic|Cax2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Cax2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Qnkvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rxzvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qnkvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qnkvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qnkvx4~1 .lut_mask = 64'hFF0F0000AA0A0000;
+defparam \soc_inst|m0_1|u_logic|Qnkvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X37_Y4_N59
+dffeas \soc_inst|m0_1|u_logic|Efp2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Qnkvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Efp2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Efp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Efp2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y7_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cxc2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cxc2z4~0_combout = ( !\soc_inst|m0_1|u_logic|Ark2z4~q & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Fij2z4~q & \soc_inst|m0_1|u_logic|Sgj2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cxc2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cxc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cxc2z4~0 .lut_mask = 64'h0020002000000000;
+defparam \soc_inst|m0_1|u_logic|Cxc2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y7_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kuc2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kuc2z4~0_combout = ( \soc_inst|m0_1|u_logic|Nsk2z4~q & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q & ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # (\soc_inst|m0_1|u_logic|Fij2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q & (
+// (!\soc_inst|m0_1|u_logic|O5t2z4~q & (\soc_inst|m0_1|u_logic|Fij2z4~q & \soc_inst|m0_1|u_logic|Npk2z4~q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kuc2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kuc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kuc2z4~0 .lut_mask = 64'h000C000CCC0CCC0C;
+defparam \soc_inst|m0_1|u_logic|Kuc2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y7_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vwc2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vwc2z4~0_combout = ( \soc_inst|m0_1|u_logic|O5t2z4~q & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Ark2z4~q & !\soc_inst|m0_1|u_logic|Aok2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~q & (
+// (!\soc_inst|m0_1|u_logic|Ark2z4~q & !\soc_inst|m0_1|u_logic|Aok2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vwc2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vwc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vwc2z4~0 .lut_mask = 64'hF000F00030003000;
+defparam \soc_inst|m0_1|u_logic|Vwc2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y7_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Awc2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Awc2z4~0_combout = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q & ((\soc_inst|m0_1|u_logic|Ark2z4~q ) # (\soc_inst|m0_1|u_logic|Nsk2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q
+// & ( !\soc_inst|m0_1|u_logic|Npk2z4~q ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Awc2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Awc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Awc2z4~0 .lut_mask = 64'hFF00FF003F003F00;
+defparam \soc_inst|m0_1|u_logic|Awc2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y7_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Awc2z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Awc2z4~1_combout = ( \soc_inst|m0_1|u_logic|Nsk2z4~q & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q & !\soc_inst|m0_1|u_logic|Fij2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q &
+// ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # ((\soc_inst|m0_1|u_logic|Sgj2z4~q & !\soc_inst|m0_1|u_logic|Aok2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Awc2z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Awc2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Awc2z4~1 .lut_mask = 64'hD0C0D0C0C0C0C0C0;
+defparam \soc_inst|m0_1|u_logic|Awc2z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y11_N36
+cyclonev_lcell_comb \soc_inst|switches_1|DataValid~1 (
+// Equation(s):
+// \soc_inst|switches_1|DataValid~1_combout = ( \soc_inst|switches_1|DataValid [0] & ( \KEY[0]~input_o & ( (!\soc_inst|switches_1|read_enable~q ) # ((\soc_inst|switches_1|half_word_address [1]) # (\soc_inst|switches_1|half_word_address [0])) ) ) ) # (
+// \soc_inst|switches_1|DataValid [0] & ( !\KEY[0]~input_o & ( (!\soc_inst|switches_1|read_enable~q ) # ((!\soc_inst|switches_1|last_buttons [0]) # ((\soc_inst|switches_1|half_word_address [1]) # (\soc_inst|switches_1|half_word_address [0]))) ) ) ) # (
+// !\soc_inst|switches_1|DataValid [0] & ( !\KEY[0]~input_o & ( !\soc_inst|switches_1|last_buttons [0] ) ) )
+
+ .dataa(!\soc_inst|switches_1|read_enable~q ),
+ .datab(!\soc_inst|switches_1|last_buttons [0]),
+ .datac(!\soc_inst|switches_1|half_word_address [0]),
+ .datad(!\soc_inst|switches_1|half_word_address [1]),
+ .datae(!\soc_inst|switches_1|DataValid [0]),
+ .dataf(!\KEY[0]~input_o ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|switches_1|DataValid~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|switches_1|DataValid~1 .extended_lut = "off";
+defparam \soc_inst|switches_1|DataValid~1 .lut_mask = 64'hCCCCEFFF0000AFFF;
+defparam \soc_inst|switches_1|DataValid~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X22_Y11_N37
+dffeas \soc_inst|switches_1|DataValid[0] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|switches_1|DataValid~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|switches_1|DataValid [0]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|DataValid[0] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|DataValid[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y5_N24
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[1]~20 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[1]~20_combout = ( !\soc_inst|interconnect_1|HRDATA[1]~37_combout & ( \soc_inst|interconnect_1|Equal1~0_combout & ( !\soc_inst|switches_1|half_word_address [1] ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[1]~37_combout & (
+// !\soc_inst|interconnect_1|Equal1~0_combout ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|switches_1|half_word_address [1]),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|interconnect_1|HRDATA[1]~37_combout ),
+ .dataf(!\soc_inst|interconnect_1|Equal1~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[1]~20_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[1]~20 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[1]~20 .lut_mask = 64'hFFFF0000CCCC0000;
+defparam \soc_inst|interconnect_1|HRDATA[1]~20 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: IOIBUF_X26_Y0_N41
+cyclonev_io_ibuf \SW[0]~input (
+ .i(SW[0]),
+ .ibar(gnd),
+ .dynamicterminationcontrol(gnd),
+ .o(\SW[0]~input_o ));
+// synopsys translate_off
+defparam \SW[0]~input .bus_hold = "false";
+defparam \SW[0]~input .simulate_z_as = "z";
+// synopsys translate_on
+
+// Location: FF_X24_Y5_N2
+dffeas \soc_inst|switches_1|switch_store[0][0] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\SW[0]~input_o ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|switches_1|always0~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|switches_1|switch_store[0][0]~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[0][0] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[0][0] .power_up = "low";
+// synopsys translate_on
+
+// Location: IOIBUF_X24_Y0_N35
+cyclonev_io_ibuf \SW[3]~input (
+ .i(SW[3]),
+ .ibar(gnd),
+ .dynamicterminationcontrol(gnd),
+ .o(\SW[3]~input_o ));
+// synopsys translate_off
+defparam \SW[3]~input .bus_hold = "false";
+defparam \SW[3]~input .simulate_z_as = "z";
+// synopsys translate_on
+
+// Location: FF_X29_Y9_N20
+dffeas \soc_inst|switches_1|switch_store[1][3] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\SW[3]~input_o ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|switches_1|always0~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|switches_1|switch_store[1][3]~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[1][3] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[1][3] .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y5_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gzvvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gzvvx4~1_combout = ( \soc_inst|m0_1|u_logic|Jp3wx4~combout & ( ((\soc_inst|m0_1|u_logic|H0zvx4~0_combout & !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Jp3wx4~combout & ( (\soc_inst|m0_1|u_logic|H0zvx4~0_combout & !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|H0zvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gzvvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gzvvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gzvvx4~1 .lut_mask = 64'h330033003F0F3F0F;
+defparam \soc_inst|m0_1|u_logic|Gzvvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y5_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gzvvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gzvvx4~0_combout = ( \soc_inst|m0_1|u_logic|Aok2z4~q & ( \soc_inst|m0_1|u_logic|Npk2z4~q & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q & ((!\soc_inst|m0_1|u_logic|Fij2z4~q & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Fij2z4~q & (!\soc_inst|m0_1|u_logic|O5t2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~q & ( \soc_inst|m0_1|u_logic|Npk2z4~q & ( (\soc_inst|m0_1|u_logic|Fij2z4~q & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) #
+// ((!\soc_inst|m0_1|u_logic|O5t2z4~q & !\soc_inst|m0_1|u_logic|Sgj2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Aok2z4~q & ( !\soc_inst|m0_1|u_logic|Npk2z4~q & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q & (((!\soc_inst|m0_1|u_logic|Sgj2z4~q &
+// \soc_inst|m0_1|u_logic|Fij2z4~q )))) # (\soc_inst|m0_1|u_logic|O5t2z4~q & (\soc_inst|m0_1|u_logic|Ark2z4~q & ((!\soc_inst|m0_1|u_logic|Fij2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~q & ( !\soc_inst|m0_1|u_logic|Npk2z4~q & (
+// (!\soc_inst|m0_1|u_logic|O5t2z4~q & (((!\soc_inst|m0_1|u_logic|Sgj2z4~q & \soc_inst|m0_1|u_logic|Fij2z4~q )))) # (\soc_inst|m0_1|u_logic|O5t2z4~q & (\soc_inst|m0_1|u_logic|Ark2z4~q & ((!\soc_inst|m0_1|u_logic|Fij2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gzvvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gzvvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gzvvx4~0 .lut_mask = 64'h11A011A000ECC0A0;
+defparam \soc_inst|m0_1|u_logic|Gzvvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y5_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gzvvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout = ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout & ((\soc_inst|m0_1|u_logic|Gzvvx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Gzvvx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout & ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) # ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout & ((\soc_inst|m0_1|u_logic|Gzvvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Gzvvx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout & ((\soc_inst|m0_1|u_logic|Gzvvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Gzvvx4~1_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Gzvvx4~1_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Gzvvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gzvvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gzvvx4~2 .lut_mask = 64'h50F050F0F0F050F0;
+defparam \soc_inst|m0_1|u_logic|Gzvvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y6_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pgnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pgnvx4~0_combout = ( \soc_inst|m0_1|u_logic|I793z4~q & ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|S4qvx4~combout & ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) #
+// ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ycx2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I793z4~q & ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout &
+// (!\soc_inst|m0_1|u_logic|S4qvx4~combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ycx2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|I793z4~q & ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ycx2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|I793z4~q & ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ycx2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ycx2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|S4qvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|I793z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pgnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pgnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pgnvx4~0 .lut_mask = 64'h5151FBFB5100FB00;
+defparam \soc_inst|m0_1|u_logic|Pgnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y6_N44
+dffeas \soc_inst|m0_1|u_logic|I793z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Pgnvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|I793z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I793z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I793z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y5_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fskvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fskvx4~0_combout = ( \soc_inst|m0_1|u_logic|U593z4~q & ( \soc_inst|m0_1|u_logic|Hszvx4~combout & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) #
+// ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U593z4~q & ( \soc_inst|m0_1|u_logic|Hszvx4~combout & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout &
+// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|U593z4~q & ( !\soc_inst|m0_1|u_logic|Hszvx4~combout & (
+// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|U593z4~q & ( !\soc_inst|m0_1|u_logic|Hszvx4~combout & (
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|U593z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Hszvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fskvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fskvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fskvx4~0 .lut_mask = 64'h5151FBFB5100FB00;
+defparam \soc_inst|m0_1|u_logic|Fskvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y5_N13
+dffeas \soc_inst|m0_1|u_logic|U593z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Fskvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|U593z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U593z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U593z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y8_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ut0xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ut0xx4~0_combout = ( \soc_inst|m0_1|u_logic|Ffj2z4~q & ( \soc_inst|m0_1|u_logic|Emi2z4~q & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q & (((!\soc_inst|m0_1|u_logic|Aok2z4~q & \soc_inst|m0_1|u_logic|Sgj2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Nsk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~q & ( \soc_inst|m0_1|u_logic|Emi2z4~q & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q & (((!\soc_inst|m0_1|u_logic|Aok2z4~q & \soc_inst|m0_1|u_logic|Sgj2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Nsk2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ffj2z4~q & ( !\soc_inst|m0_1|u_logic|Emi2z4~q & ( \soc_inst|m0_1|u_logic|Sgj2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~q & ( !\soc_inst|m0_1|u_logic|Emi2z4~q & (
+// (!\soc_inst|m0_1|u_logic|Npk2z4~q & (!\soc_inst|m0_1|u_logic|Aok2z4~q & \soc_inst|m0_1|u_logic|Sgj2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ut0xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ut0xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ut0xx4~0 .lut_mask = 64'h008800FF0A8A0A8A;
+defparam \soc_inst|m0_1|u_logic|Ut0xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y8_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oi2wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oi2wx4~0_combout = ( \soc_inst|m0_1|u_logic|Emi2z4~q & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q & (\soc_inst|m0_1|u_logic|Aok2z4~q & (\soc_inst|m0_1|u_logic|Nsk2z4~q & !\soc_inst|m0_1|u_logic|Fij2z4~q ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Emi2z4~q & ( (\soc_inst|m0_1|u_logic|Aok2z4~q & (!\soc_inst|m0_1|u_logic|Fij2z4~q & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # (\soc_inst|m0_1|u_logic|Nsk2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Oi2wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oi2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oi2wx4~0 .lut_mask = 64'h2300230001000100;
+defparam \soc_inst|m0_1|u_logic|Oi2wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y8_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cr0xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cr0xx4~0_combout = ( \soc_inst|m0_1|u_logic|X77wx4~combout & ( (\soc_inst|m0_1|u_logic|O9qvx4~0_combout & !\soc_inst|m0_1|u_logic|Ffj2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cr0xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cr0xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cr0xx4~0 .lut_mask = 64'h000000000F000F00;
+defparam \soc_inst|m0_1|u_logic|Cr0xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y8_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oi2wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oi2wx4~1_combout = ( !\soc_inst|m0_1|u_logic|Cr0xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Oi2wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Tki2z4~q ) # (!\soc_inst|m0_1|u_logic|Ut0xx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ut0xx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Oi2wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Cr0xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oi2wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oi2wx4~1 .lut_mask = 64'hFA00FA0000000000;
+defparam \soc_inst|m0_1|u_logic|Oi2wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y7_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A4c2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|A4c2z4~0_combout = ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Ark2z4~q & \soc_inst|m0_1|u_logic|O5t2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|A4c2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|A4c2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A4c2z4~0 .lut_mask = 64'h000F000F00000000;
+defparam \soc_inst|m0_1|u_logic|A4c2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y8_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zy2wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zy2wx4~0_combout = ( \soc_inst|m0_1|u_logic|Nsk2z4~q & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~q & (\soc_inst|m0_1|u_logic|Orewx4~0_combout & !\soc_inst|m0_1|u_logic|Fij2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q & (
+// (!\soc_inst|m0_1|u_logic|Ffj2z4~q & (\soc_inst|m0_1|u_logic|Orewx4~0_combout & ((!\soc_inst|m0_1|u_logic|Fij2z4~q )))) # (\soc_inst|m0_1|u_logic|Ffj2z4~q & (((\soc_inst|m0_1|u_logic|A4c2z4~0_combout & \soc_inst|m0_1|u_logic|Fij2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|A4c2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zy2wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zy2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zy2wx4~0 .lut_mask = 64'h2205220522002200;
+defparam \soc_inst|m0_1|u_logic|Zy2wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y8_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jq2wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jq2wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q & ((((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|O5t2z4~q ))))) # (\soc_inst|m0_1|u_logic|Aok2z4~q
+// & (((\soc_inst|m0_1|u_logic|Fij2z4~q )) # (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ))) ) ) # ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( (((!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # ((\soc_inst|m0_1|u_logic|O5t2z4~q )))) #
+// (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datag(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jq2wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jq2wx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Jq2wx4~0 .lut_mask = 64'hFF77F5F5F077FFFF;
+defparam \soc_inst|m0_1|u_logic|Jq2wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y8_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nz2wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nz2wx4~0_combout = ( \soc_inst|m0_1|u_logic|O5t2z4~q & ( \soc_inst|m0_1|u_logic|Bpzvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|O5t2z4~q & ( !\soc_inst|m0_1|u_logic|Bpzvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Bpzvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nz2wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nz2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nz2wx4~0 .lut_mask = 64'h000050500000DCDC;
+defparam \soc_inst|m0_1|u_logic|Nz2wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y8_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fh2wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fh2wx4~0_combout = ( \soc_inst|m0_1|u_logic|Nz2wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # (\soc_inst|m0_1|u_logic|Jq2wx4~0_combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Nz2wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Zy2wx4~0_combout & (((!\soc_inst|m0_1|u_logic|Npk2z4~q )) # (\soc_inst|m0_1|u_logic|Jq2wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Zy2wx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # (\soc_inst|m0_1|u_logic|Jq2wx4~0_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Zy2wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Jq2wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nz2wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fh2wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~0 .lut_mask = 64'hF3A2F3A2F300F300;
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y8_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xx2wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xx2wx4~combout = ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Npk2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xx2wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xx2wx4 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|Xx2wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y8_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|It2wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|It2wx4~0_combout = ( \soc_inst|m0_1|u_logic|O9qvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q & (!\soc_inst|m0_1|u_logic|Fij2z4~q & \soc_inst|m0_1|u_logic|Sy2wx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|It2wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|It2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|It2wx4~0 .lut_mask = 64'h0000000000A000A0;
+defparam \soc_inst|m0_1|u_logic|It2wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y8_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fh2wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fh2wx4~1_combout = ( \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~q & (\soc_inst|m0_1|u_logic|Huqvx4~0_combout & ((\soc_inst|m0_1|u_logic|O5t2z4~q )))) # (\soc_inst|m0_1|u_logic|Ffj2z4~q &
+// (((\soc_inst|m0_1|u_logic|Aok2z4~q & !\soc_inst|m0_1|u_logic|O5t2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Ffj2z4~q & (\soc_inst|m0_1|u_logic|Aok2z4~q & !\soc_inst|m0_1|u_logic|O5t2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fh2wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~1 .lut_mask = 64'h0300030003440344;
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y8_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Op2wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Op2wx4~0_combout = ( \soc_inst|m0_1|u_logic|Nsk2z4~q & ( (\soc_inst|m0_1|u_logic|O5t2z4~q & \soc_inst|m0_1|u_logic|Wkxvx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Op2wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Op2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Op2wx4~0 .lut_mask = 64'h00000000000F000F;
+defparam \soc_inst|m0_1|u_logic|Op2wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y8_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fh2wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fh2wx4~2_combout = ( \soc_inst|m0_1|u_logic|Wdxvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q & (((\soc_inst|m0_1|u_logic|Ark2z4~q & \soc_inst|m0_1|u_logic|Hdh2z4~0_combout )) # (\soc_inst|m0_1|u_logic|Nsk2z4~q ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Wdxvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q & (!\soc_inst|m0_1|u_logic|O5t2z4~q & (\soc_inst|m0_1|u_logic|Ark2z4~q & \soc_inst|m0_1|u_logic|Hdh2z4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fh2wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~2 .lut_mask = 64'h00080008444C444C;
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y8_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fh2wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fh2wx4~3_combout = ( !\soc_inst|m0_1|u_logic|Fh2wx4~2_combout & ( (!\soc_inst|m0_1|u_logic|It2wx4~0_combout & (!\soc_inst|m0_1|u_logic|Fh2wx4~1_combout & !\soc_inst|m0_1|u_logic|Op2wx4~0_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|It2wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Fh2wx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Op2wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fh2wx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fh2wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~3 .lut_mask = 64'hC000C00000000000;
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y8_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fh2wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fh2wx4~4_combout = ( \soc_inst|m0_1|u_logic|Fh2wx4~3_combout & ( ((!\soc_inst|m0_1|u_logic|Xx2wx4~combout ) # (\soc_inst|m0_1|u_logic|Aok2z4~q )) # (\soc_inst|m0_1|u_logic|Ffj2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fh2wx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fh2wx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~4 .lut_mask = 64'h00000000F5FFF5FF;
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y8_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L53wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|L53wx4~2_combout = ( \soc_inst|m0_1|u_logic|Socwx4~0_combout & ( \soc_inst|m0_1|u_logic|Huqvx4~0_combout & ( ((\soc_inst|m0_1|u_logic|Bxcwx4~0_combout & \soc_inst|m0_1|u_logic|X77wx4~combout )) #
+// (\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Socwx4~0_combout & ( \soc_inst|m0_1|u_logic|Huqvx4~0_combout & ( \soc_inst|m0_1|u_logic|Wdxvx4~0_combout ) ) ) # ( \soc_inst|m0_1|u_logic|Socwx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Huqvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Bxcwx4~0_combout & \soc_inst|m0_1|u_logic|X77wx4~combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|L53wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L53wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L53wx4~2 .lut_mask = 64'h0000050533333737;
+defparam \soc_inst|m0_1|u_logic|L53wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y7_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B73wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|B73wx4~combout = ( \soc_inst|m0_1|u_logic|Aok2z4~q & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|B73wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B73wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B73wx4 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|B73wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y8_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hw2wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hw2wx4~0_combout = ( \soc_inst|m0_1|u_logic|Aok2z4~q & ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hw2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hw2wx4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Hw2wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y8_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L53wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|L53wx4~0_combout = ( \soc_inst|m0_1|u_logic|Hw2wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q & ((!\soc_inst|m0_1|u_logic|Xx2wx4~combout ) # (\soc_inst|m0_1|u_logic|Nsk2z4~q ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Hw2wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ark2z4~q ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|L53wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L53wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L53wx4~0 .lut_mask = 64'hCCCCCCCCC4C4C4C4;
+defparam \soc_inst|m0_1|u_logic|L53wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y8_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L53wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|L53wx4~1_combout = ( \soc_inst|m0_1|u_logic|L53wx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|B73wx4~combout ) # (!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout )) # (\soc_inst|m0_1|u_logic|Fij2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|L53wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|L53wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L53wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L53wx4~1 .lut_mask = 64'h00000000FFF3FFF3;
+defparam \soc_inst|m0_1|u_logic|L53wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y8_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L53wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|L53wx4~3_combout = ( \soc_inst|m0_1|u_logic|Wkxvx4~0_combout & ( \soc_inst|m0_1|u_logic|L53wx4~1_combout & ( (\soc_inst|m0_1|u_logic|O5t2z4~q & (\soc_inst|m0_1|u_logic|Bxcwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) #
+// (\soc_inst|m0_1|u_logic|L53wx4~2_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wkxvx4~0_combout & ( !\soc_inst|m0_1|u_logic|L53wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q ) # (\soc_inst|m0_1|u_logic|L53wx4~2_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Wkxvx4~0_combout & ( !\soc_inst|m0_1|u_logic|L53wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q ) # (\soc_inst|m0_1|u_logic|L53wx4~2_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|L53wx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|L53wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|L53wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L53wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L53wx4~3 .lut_mask = 64'hFF55FF5500000301;
+defparam \soc_inst|m0_1|u_logic|L53wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y8_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ey2wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ey2wx4~0_combout = ( \soc_inst|m0_1|u_logic|Nsk2z4~q & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q & (\soc_inst|m0_1|u_logic|Fij2z4~q & (\soc_inst|m0_1|u_logic|Aok2z4~q & \soc_inst|m0_1|u_logic|Ark2z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Npk2z4~q & (!\soc_inst|m0_1|u_logic|Fij2z4~q $ ((\soc_inst|m0_1|u_logic|Aok2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q ) # ((\soc_inst|m0_1|u_logic|Fij2z4~q &
+// ((\soc_inst|m0_1|u_logic|Ark2z4~q ) # (\soc_inst|m0_1|u_logic|Npk2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ey2wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ey2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ey2wx4~0 .lut_mask = 64'hF1F3F1F341434143;
+defparam \soc_inst|m0_1|u_logic|Ey2wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y8_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ru2wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ru2wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Zzb2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q & (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Nsk2z4~q & \soc_inst|m0_1|u_logic|O5t2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ru2wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ru2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ru2wx4~0 .lut_mask = 64'h0002000200000000;
+defparam \soc_inst|m0_1|u_logic|Ru2wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y8_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bt2wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bt2wx4~0_combout = ( \soc_inst|m0_1|u_logic|O9qvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & (((\soc_inst|m0_1|u_logic|Nsk2z4~q & \soc_inst|m0_1|u_logic|Hw2wx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Ru2wx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|O9qvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Ru2wx4~0_combout & !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ru2wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bt2wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bt2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bt2wx4~0 .lut_mask = 64'h5050505050705070;
+defparam \soc_inst|m0_1|u_logic|Bt2wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y8_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fh2wx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fh2wx4~5_combout = ( \soc_inst|m0_1|u_logic|Wdxvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Bt2wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Ey2wx4~0_combout &
+// !\soc_inst|m0_1|u_logic|Emi2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Wdxvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Bt2wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ey2wx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ey2wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Bt2wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fh2wx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~5 .lut_mask = 64'hF050F050F040F040;
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y8_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xc2wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xc2wx4~0_combout = ( \soc_inst|m0_1|u_logic|Fh2wx4~5_combout & ( (\soc_inst|interconnect_1|HREADY~0_combout & ((!\soc_inst|m0_1|u_logic|Fh2wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Fh2wx4~4_combout ) #
+// (\soc_inst|m0_1|u_logic|L53wx4~3_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Fh2wx4~5_combout & ( \soc_inst|interconnect_1|HREADY~0_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fh2wx4~0_combout ),
+ .datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Fh2wx4~4_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|L53wx4~3_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fh2wx4~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xc2wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xc2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xc2wx4~0 .lut_mask = 64'h3333333332333233;
+defparam \soc_inst|m0_1|u_logic|Xc2wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y8_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ge2wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ge2wx4~0_combout = ( !\soc_inst|m0_1|u_logic|A0zvx4~0_combout & ( \soc_inst|m0_1|u_logic|Xc2wx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Xc2wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ge2wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ge2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ge2wx4~0 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|Ge2wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y3_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yafwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yafwx4~1_combout = ( \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Tki2z4~q & ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Swy2z4~q )) #
+// (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ))))) ) ) # ( !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Tki2z4~q & ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|Swy2z4~q & !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ))))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yafwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yafwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yafwx4~1 .lut_mask = 64'h1005100510151015;
+defparam \soc_inst|m0_1|u_logic|Yafwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y3_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yafwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yafwx4~0_combout = ( \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Tki2z4~q & (\soc_inst|m0_1|u_logic|U2x2z4~q & ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # (!\soc_inst|m0_1|u_logic|Qem2z4~q )))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Tki2z4~q & \soc_inst|m0_1|u_logic|U2x2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yafwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yafwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yafwx4~0 .lut_mask = 64'h0505050505040504;
+defparam \soc_inst|m0_1|u_logic|Yafwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y3_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yafwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yafwx4~2_combout = ( \soc_inst|m0_1|u_logic|Xhxvx4~combout & ( !\soc_inst|m0_1|u_logic|Yafwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|G27wx4~0_combout & (!\soc_inst|m0_1|u_logic|Yafwx4~1_combout &
+// !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xhxvx4~combout & ( !\soc_inst|m0_1|u_logic|Yafwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Yafwx4~1_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Yafwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Xhxvx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yafwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yafwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yafwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yafwx4~2 .lut_mask = 64'hCCCC808000000000;
+defparam \soc_inst|m0_1|u_logic|Yafwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y6_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nkpvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nkpvx4~0_combout = ( \soc_inst|m0_1|u_logic|Swy2z4~q & ( \soc_inst|m0_1|u_logic|Csewx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nkpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nkpvx4~0 .lut_mask = 64'h000000000000FFFF;
+defparam \soc_inst|m0_1|u_logic|Nkpvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y4_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J7swx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|J7swx4~0_combout = ( \soc_inst|m0_1|u_logic|H5fwx4~0_combout & ( \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|J7swx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J7swx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J7swx4~0 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|J7swx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y6_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pkxvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pkxvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|O5t2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pkxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pkxvx4~0 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|Pkxvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y6_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yafwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yafwx4~3_combout = ( \soc_inst|m0_1|u_logic|Sgj2z4~q & ( \soc_inst|m0_1|u_logic|Pkxvx4~0_combout & ( (\soc_inst|m0_1|u_logic|M66wx4~combout & !\soc_inst|m0_1|u_logic|Emi2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q & (
+// \soc_inst|m0_1|u_logic|Pkxvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Emi2z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|Sgj2z4~q & ( !\soc_inst|m0_1|u_logic|Pkxvx4~0_combout & ( (\soc_inst|m0_1|u_logic|M66wx4~combout & !\soc_inst|m0_1|u_logic|Emi2z4~q ) ) ) )
+// # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q & ( !\soc_inst|m0_1|u_logic|Pkxvx4~0_combout & ( (\soc_inst|m0_1|u_logic|M66wx4~combout & !\soc_inst|m0_1|u_logic|Emi2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yafwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yafwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yafwx4~3 .lut_mask = 64'h44444444CCCC4444;
+defparam \soc_inst|m0_1|u_logic|Yafwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y4_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yafwx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yafwx4~4_combout = ( !\soc_inst|m0_1|u_logic|Yafwx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~q & (((!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout )) # (\soc_inst|m0_1|u_logic|U2x2z4~q ))) # (\soc_inst|m0_1|u_logic|Dvy2z4~q &
+// (!\soc_inst|m0_1|u_logic|J7swx4~0_combout & ((!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ) # (\soc_inst|m0_1|u_logic|U2x2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|J7swx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Yafwx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yafwx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yafwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yafwx4~4 .lut_mask = 64'hF3A2F3A200000000;
+defparam \soc_inst|m0_1|u_logic|Yafwx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y4_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qllwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qllwx4~0_combout = ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qllwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qllwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qllwx4~0 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Qllwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X30_Y6_N5
+dffeas \soc_inst|m0_1|u_logic|Nqy2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|C6nvx4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nqy2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nqy2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y6_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M4fwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|M4fwx4~0_combout = ( \soc_inst|m0_1|u_logic|Zoy2z4~q & ( !\soc_inst|m0_1|u_logic|Nqy2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M4fwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M4fwx4~0 .lut_mask = 64'h00000000F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|M4fwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y4_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rjrwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rjrwx4~0_combout = ( \soc_inst|m0_1|u_logic|M4fwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Pty2z4~q & !\soc_inst|m0_1|u_logic|Dvy2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|M4fwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q &
+// (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Dvy2z4~q )) # (\soc_inst|m0_1|u_logic|Pty2z4~q & ((!\soc_inst|m0_1|u_logic|Dvy2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rjrwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rjrwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rjrwx4~0 .lut_mask = 64'h3344334433003300;
+defparam \soc_inst|m0_1|u_logic|Rjrwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y7_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mkrwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mkrwx4~combout = ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Msyvx4~combout & \soc_inst|m0_1|u_logic|O5t2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mkrwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mkrwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mkrwx4 .lut_mask = 64'h0000000000F000F0;
+defparam \soc_inst|m0_1|u_logic|Mkrwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y4_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J3xvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|J3xvx4~combout = ( \soc_inst|m0_1|u_logic|V1yvx4~0_combout & ( (\soc_inst|m0_1|u_logic|U2x2z4~q & (!\soc_inst|m0_1|u_logic|Mkrwx4~combout & ((!\soc_inst|m0_1|u_logic|Qllwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Rjrwx4~0_combout
+// )))) ) ) # ( !\soc_inst|m0_1|u_logic|V1yvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Mkrwx4~combout & ((!\soc_inst|m0_1|u_logic|Qllwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Rjrwx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qllwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rjrwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Mkrwx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|J3xvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J3xvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J3xvx4 .lut_mask = 64'hFA00FA0032003200;
+defparam \soc_inst|m0_1|u_logic|J3xvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y4_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yafwx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yafwx4~5_combout = ( \soc_inst|m0_1|u_logic|J3xvx4~combout & ( \soc_inst|interconnect_1|HREADY~0_combout & ( (!\soc_inst|m0_1|u_logic|Yafwx4~4_combout ) # ((!\soc_inst|m0_1|u_logic|Yafwx4~2_combout &
+// \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|J3xvx4~combout & ( \soc_inst|interconnect_1|HREADY~0_combout ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Yafwx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yafwx4~4_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|J3xvx4~combout ),
+ .dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yafwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yafwx4~5 .lut_mask = 64'h00000000FFFFFF0C;
+defparam \soc_inst|m0_1|u_logic|Yafwx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y7_N16
+dffeas \soc_inst|m0_1|u_logic|Sjj2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|A2iwx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sjj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sjj2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y4_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|My6wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|My6wx4~0_combout = ( \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Zoy2z4~q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|My6wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|My6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|My6wx4~0 .lut_mask = 64'h000000000C000C00;
+defparam \soc_inst|m0_1|u_logic|My6wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y4_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vnxvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vnxvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q & \soc_inst|m0_1|u_logic|Ohwvx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vnxvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vnxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vnxvx4~0 .lut_mask = 64'h00F000F000000000;
+defparam \soc_inst|m0_1|u_logic|Vnxvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y4_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K6yvx4~0_combout = ( \soc_inst|m0_1|u_logic|P7wvx4~0_combout & ( (\soc_inst|m0_1|u_logic|M4fwx4~0_combout & (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|K6yvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K6yvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~0 .lut_mask = 64'h0000000004000400;
+defparam \soc_inst|m0_1|u_logic|K6yvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y4_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K6yvx4~1_combout = ( \soc_inst|m0_1|u_logic|K6yvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & (((\soc_inst|m0_1|u_logic|My6wx4~0_combout & \soc_inst|m0_1|u_logic|Vnxvx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Dvy2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|K6yvx4~0_combout & ( (\soc_inst|m0_1|u_logic|My6wx4~0_combout & (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Dvy2z4~q &
+// \soc_inst|m0_1|u_logic|Vnxvx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|My6wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Vnxvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|K6yvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|K6yvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K6yvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~1 .lut_mask = 64'h004000400C4C0C4C;
+defparam \soc_inst|m0_1|u_logic|K6yvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y4_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K6yvx4~2_combout = ( \soc_inst|m0_1|u_logic|Swy2z4~q & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~q & ( (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Dvy2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|K6yvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K6yvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~2 .lut_mask = 64'h0F000F000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|K6yvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y4_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K6yvx4~3_combout = ( \soc_inst|m0_1|u_logic|X5gwx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Ark2z4~q & (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout & \soc_inst|m0_1|u_logic|C9yvx4~combout ))) #
+// (\soc_inst|m0_1|u_logic|Xiwvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|X5gwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q & (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout & \soc_inst|m0_1|u_logic|C9yvx4~combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Xiwvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|X5gwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|K6yvx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K6yvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~3 .lut_mask = 64'h000A000A333B333B;
+defparam \soc_inst|m0_1|u_logic|K6yvx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y4_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K6yvx4~4_combout = ( \soc_inst|m0_1|u_logic|U2x2z4~q & ( \soc_inst|m0_1|u_logic|K6yvx4~3_combout & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|U2x2z4~q & (
+// \soc_inst|m0_1|u_logic|K6yvx4~3_combout & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) ) ) # ( \soc_inst|m0_1|u_logic|U2x2z4~q & ( !\soc_inst|m0_1|u_logic|K6yvx4~3_combout & ( (!\soc_inst|m0_1|u_logic|K6yvx4~2_combout &
+// (\soc_inst|m0_1|u_logic|Icyvx4~0_combout & (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|K6yvx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|K6yvx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|K6yvx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K6yvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~4 .lut_mask = 64'h00000020F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|K6yvx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y4_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X8kwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|X8kwx4~0_combout = ( \soc_inst|m0_1|u_logic|Srgwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Rngwx4~combout & !\soc_inst|m0_1|u_logic|Npk2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Srgwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|X8kwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X8kwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X8kwx4~0 .lut_mask = 64'h00000000AA00AA00;
+defparam \soc_inst|m0_1|u_logic|X8kwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y6_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K6yvx4~5_combout = ( \soc_inst|m0_1|u_logic|Rexvx4~0_combout & ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout & \soc_inst|m0_1|u_logic|Orewx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Rexvx4~0_combout & ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout & \soc_inst|m0_1|u_logic|Orewx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rexvx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout & \soc_inst|m0_1|u_logic|Orewx4~0_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|K6yvx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K6yvx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~5 .lut_mask = 64'h0C0C00000C0C0C0C;
+defparam \soc_inst|m0_1|u_logic|K6yvx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y6_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K6yvx4~7_combout = ( \soc_inst|m0_1|u_logic|Ilpvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q & (!\soc_inst|m0_1|u_logic|Npk2z4~q )) # (\soc_inst|m0_1|u_logic|Emi2z4~q & ((\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|K6yvx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K6yvx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~7 .lut_mask = 64'h000000008D8D8D8D;
+defparam \soc_inst|m0_1|u_logic|K6yvx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y6_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I2mwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|I2mwx4~0_combout = ( \soc_inst|m0_1|u_logic|O5t2z4~q & ( (\soc_inst|m0_1|u_logic|Ucqvx4~combout & (\soc_inst|m0_1|u_logic|Jppvx4~0_combout & \soc_inst|m0_1|u_logic|Ark2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~q & (
+// ((\soc_inst|m0_1|u_logic|Ucqvx4~combout & (\soc_inst|m0_1|u_logic|Jppvx4~0_combout & \soc_inst|m0_1|u_logic|Ark2z4~q ))) # (\soc_inst|m0_1|u_logic|Aok2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|I2mwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I2mwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I2mwx4~0 .lut_mask = 64'h5557555700030003;
+defparam \soc_inst|m0_1|u_logic|I2mwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y6_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~8 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K6yvx4~8_combout = ( !\soc_inst|m0_1|u_logic|I2mwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|K6yvx4~7_combout & (((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # (!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Fij2z4~q
+// ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|K6yvx4~7_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|I2mwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|K6yvx4~8_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K6yvx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~8 .lut_mask = 64'hFD00FD0000000000;
+defparam \soc_inst|m0_1|u_logic|K6yvx4~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y8_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zzfwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zzfwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Ark2z4~q & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q & \soc_inst|m0_1|u_logic|Ffj2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zzfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zzfwx4~0 .lut_mask = 64'h0A0A0A0A00000000;
+defparam \soc_inst|m0_1|u_logic|Zzfwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y4_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tuwvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tuwvx4~0_combout = ( \soc_inst|m0_1|u_logic|Orewx4~0_combout & ( (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Fjewx4~1_combout & !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tuwvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tuwvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tuwvx4~0 .lut_mask = 64'h0000000030003000;
+defparam \soc_inst|m0_1|u_logic|Tuwvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y5_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T1xvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T1xvx4~0_combout = ( \soc_inst|m0_1|u_logic|Pkxvx4~0_combout & ( \soc_inst|m0_1|u_logic|Ark2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|T1xvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T1xvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T1xvx4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|T1xvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y4_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K6yvx4~6_combout = ( \soc_inst|m0_1|u_logic|T1xvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Tuwvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Fij2z4~q & (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Fij2z4~q
+// & ((!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ))))) ) ) # ( !\soc_inst|m0_1|u_logic|T1xvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Tuwvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # (!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Tuwvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|K6yvx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K6yvx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~6 .lut_mask = 64'hFA00FA00D800D800;
+defparam \soc_inst|m0_1|u_logic|K6yvx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y4_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~9 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K6yvx4~9_combout = ( \soc_inst|m0_1|u_logic|K6yvx4~6_combout & ( (!\soc_inst|m0_1|u_logic|K6yvx4~5_combout & (\soc_inst|m0_1|u_logic|K6yvx4~8_combout & ((!\soc_inst|m0_1|u_logic|X8kwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|X8kwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|K6yvx4~5_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|K6yvx4~8_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|K6yvx4~6_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|K6yvx4~9_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K6yvx4~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~9 .lut_mask = 64'h0000000000B000B0;
+defparam \soc_inst|m0_1|u_logic|K6yvx4~9 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y4_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~10 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K6yvx4~10_combout = ( \soc_inst|m0_1|u_logic|K6yvx4~9_combout & ( (\soc_inst|interconnect_1|HREADY~0_combout & (((\soc_inst|m0_1|u_logic|Swy2z4~q & \soc_inst|m0_1|u_logic|K6yvx4~1_combout )) #
+// (\soc_inst|m0_1|u_logic|K6yvx4~4_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|K6yvx4~9_combout & ( \soc_inst|interconnect_1|HREADY~0_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|K6yvx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|K6yvx4~4_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|K6yvx4~9_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K6yvx4~10 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~10 .lut_mask = 64'h3333333301330133;
+defparam \soc_inst|m0_1|u_logic|K6yvx4~10 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y9_N25
+dffeas \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Kxkwx4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y8_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qj2wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qj2wx4~1_combout = ( \soc_inst|m0_1|u_logic|Ark2z4~q & ( \soc_inst|m0_1|u_logic|Npk2z4~q & ( ((!\soc_inst|m0_1|u_logic|Ffj2z4~q & \soc_inst|m0_1|u_logic|Fij2z4~q )) # (\soc_inst|m0_1|u_logic|Nsk2z4~q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Ark2z4~q & ( \soc_inst|m0_1|u_logic|Npk2z4~q & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~q & (!\soc_inst|m0_1|u_logic|Nsk2z4~q & \soc_inst|m0_1|u_logic|Fij2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~q & (
+// !\soc_inst|m0_1|u_logic|Npk2z4~q & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q & \soc_inst|m0_1|u_logic|Nsk2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qj2wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qj2wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qj2wx4~1 .lut_mask = 64'h0A0A000000C00FCF;
+defparam \soc_inst|m0_1|u_logic|Qj2wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y8_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qj2wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qj2wx4~0_combout = ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q ) ) # ( !\soc_inst|m0_1|u_logic|Bxcwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q & (((\soc_inst|m0_1|u_logic|Fij2z4~q &
+// !\soc_inst|m0_1|u_logic|Emi2z4~q )) # (\soc_inst|m0_1|u_logic|G97wx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qj2wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qj2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qj2wx4~0 .lut_mask = 64'h20AA20AAAAAAAAAA;
+defparam \soc_inst|m0_1|u_logic|Qj2wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y8_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jucwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jucwx4~0_combout = ( \soc_inst|m0_1|u_logic|O5t2z4~q & ( \soc_inst|m0_1|u_logic|G97wx4~0_combout & ( ((\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Tki2z4~q )) # (\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q
+// ) ) ) ) # ( \soc_inst|m0_1|u_logic|O5t2z4~q & ( !\soc_inst|m0_1|u_logic|G97wx4~0_combout & ( \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jucwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jucwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jucwx4~0 .lut_mask = 64'h0000555500005F55;
+defparam \soc_inst|m0_1|u_logic|Jucwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y8_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ro0xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ro0xx4~0_combout = ( \soc_inst|m0_1|u_logic|Nsk2z4~q & ( (\soc_inst|m0_1|u_logic|Aok2z4~q & (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout & \soc_inst|m0_1|u_logic|Emi2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q & (
+// (\soc_inst|m0_1|u_logic|Aok2z4~q & (\soc_inst|m0_1|u_logic|Emi2z4~q & ((\soc_inst|m0_1|u_logic|O5t2z4~q ) # (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ro0xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ro0xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ro0xx4~0 .lut_mask = 64'h0015001500110011;
+defparam \soc_inst|m0_1|u_logic|Ro0xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y8_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qj2wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qj2wx4~2_combout = ( !\soc_inst|m0_1|u_logic|Jucwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ro0xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Qj2wx4~1_combout & !\soc_inst|m0_1|u_logic|Qj2wx4~0_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Qj2wx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Qj2wx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Jucwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ro0xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qj2wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qj2wx4~2 .lut_mask = 64'hC0C0000000000000;
+defparam \soc_inst|m0_1|u_logic|Qj2wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y8_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fw0xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fw0xx4~0_combout = ( !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q & (!\soc_inst|m0_1|u_logic|Ark2z4~q & \soc_inst|m0_1|u_logic|G97wx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fw0xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fw0xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fw0xx4~0 .lut_mask = 64'h00A000A000000000;
+defparam \soc_inst|m0_1|u_logic|Fw0xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y6_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ax0xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ax0xx4~0_combout = ( \soc_inst|m0_1|u_logic|Fij2z4~q ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q & ( \soc_inst|m0_1|u_logic|Aok2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ax0xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ax0xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ax0xx4~0 .lut_mask = 64'h00FF00FFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ax0xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y8_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vi2wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vi2wx4~0_combout = ( \soc_inst|m0_1|u_logic|Emi2z4~q & ( (\soc_inst|m0_1|u_logic|Npk2z4~q & (\soc_inst|m0_1|u_logic|Fuhwx4~0_combout & !\soc_inst|m0_1|u_logic|Ax0xx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ax0xx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vi2wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vi2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vi2wx4~0 .lut_mask = 64'h0000000005000500;
+defparam \soc_inst|m0_1|u_logic|Vi2wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y8_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vi2wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vi2wx4~1_combout = ( \soc_inst|m0_1|u_logic|Sgj2z4~q & ( (!\soc_inst|m0_1|u_logic|Fw0xx4~0_combout & (!\soc_inst|m0_1|u_logic|Egkwx4~0_combout & !\soc_inst|m0_1|u_logic|Vi2wx4~0_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Sgj2z4~q & ( (!\soc_inst|m0_1|u_logic|Fw0xx4~0_combout & !\soc_inst|m0_1|u_logic|Vi2wx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Fw0xx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Vi2wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vi2wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vi2wx4~1 .lut_mask = 64'hCC00CC00C000C000;
+defparam \soc_inst|m0_1|u_logic|Vi2wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X52_Y8_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ge2wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ge2wx4~1_combout = ( !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout & ( \soc_inst|m0_1|u_logic|Vi2wx4~1_combout & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|Qj2wx4~2_combout & (
+// !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout & ( !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q ) #
+// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ge2wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ge2wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ge2wx4~1 .lut_mask = 64'hFAFAF0F0AAAA0000;
+defparam \soc_inst|m0_1|u_logic|Ge2wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y8_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ge2wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ge2wx4~2_combout = ( !\soc_inst|m0_1|u_logic|Ge2wx4~1_combout & ( (\soc_inst|m0_1|u_logic|Ge2wx4~0_combout & ((\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ge2wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ge2wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ge2wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ge2wx4~2 .lut_mask = 64'h005F005F00000000;
+defparam \soc_inst|m0_1|u_logic|Ge2wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y3_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R1d2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R1d2z4~0_combout = (!\soc_inst|m0_1|u_logic|O5t2z4~q & \soc_inst|m0_1|u_logic|Fij2z4~q )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R1d2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R1d2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R1d2z4~0 .lut_mask = 64'h00F000F000F000F0;
+defparam \soc_inst|m0_1|u_logic|R1d2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y3_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Keiwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Keiwx4~0_combout = ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Rngwx4~combout & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q & !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Keiwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Keiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Keiwx4~0 .lut_mask = 64'hA0A0000000000000;
+defparam \soc_inst|m0_1|u_logic|Keiwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y3_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Celwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Celwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Keiwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Rxl2z4~q ) # ((!\soc_inst|m0_1|u_logic|Yzi2z4~q ) # ((!\soc_inst|m0_1|u_logic|R1d2z4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|R1d2z4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Keiwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Celwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Celwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Celwx4~0 .lut_mask = 64'hFFEFFFEF00000000;
+defparam \soc_inst|m0_1|u_logic|Celwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y3_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Celwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Celwx4~1_combout = ( \soc_inst|m0_1|u_logic|Swy2z4~q & ( (\soc_inst|m0_1|u_logic|Celwx4~0_combout & (((!\soc_inst|m0_1|u_logic|Ocfwx4~0_combout ) # (\soc_inst|m0_1|u_logic|G27wx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~q & ( (!\soc_inst|m0_1|u_logic|Ocfwx4~0_combout & \soc_inst|m0_1|u_logic|Celwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ocfwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Celwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Celwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Celwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Celwx4~1 .lut_mask = 64'h00F000F000F700F7;
+defparam \soc_inst|m0_1|u_logic|Celwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y3_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fbfwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fbfwx4~0_combout = ( \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q & ((\soc_inst|m0_1|u_logic|Fij2z4~q ))) # (\soc_inst|m0_1|u_logic|O5t2z4~q & (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )) ) )
+// # ( !\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|O5t2z4~q & !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fbfwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fbfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fbfwx4~0 .lut_mask = 64'h5050505050FA50FA;
+defparam \soc_inst|m0_1|u_logic|Fbfwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y3_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fbfwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fbfwx4~1_combout = ( \soc_inst|m0_1|u_logic|Qem2z4~q & ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Celwx4~1_combout & (\soc_inst|m0_1|u_logic|Fbfwx4~0_combout &
+// ((\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|U2x2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qem2z4~q & ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Celwx4~1_combout &
+// (\soc_inst|m0_1|u_logic|Fbfwx4~0_combout & \soc_inst|m0_1|u_logic|U2x2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Qem2z4~q & ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Celwx4~1_combout &
+// (\soc_inst|m0_1|u_logic|Fbfwx4~0_combout & ((\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|U2x2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qem2z4~q & ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & (
+// (\soc_inst|m0_1|u_logic|Celwx4~1_combout & (\soc_inst|m0_1|u_logic|Fbfwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|U2x2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Celwx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Fbfwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fbfwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fbfwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fbfwx4~1 .lut_mask = 64'h1101011101010111;
+defparam \soc_inst|m0_1|u_logic|Fbfwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y7_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E4iwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|E4iwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Ocfwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|R1d2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|R1d2z4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ocfwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|E4iwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E4iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E4iwx4~0 .lut_mask = 64'hFCFCFCFC00000000;
+defparam \soc_inst|m0_1|u_logic|E4iwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y3_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Enrwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Enrwx4~0_combout = ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q & (((\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Qem2z4~q &
+// ((!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|U2x2z4~q )) # (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))))) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & (
+// (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|U2x2z4~q & (\soc_inst|m0_1|u_logic|Qem2z4~q )) # (\soc_inst|m0_1|u_logic|U2x2z4~q & (!\soc_inst|m0_1|u_logic|Qem2z4~q & \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )))) #
+// (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Qem2z4~q $ (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Enrwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Enrwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Enrwx4~0 .lut_mask = 64'h0B780B780BF80BF8;
+defparam \soc_inst|m0_1|u_logic|Enrwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y3_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V2iwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|V2iwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Rngwx4~combout & ( !\soc_inst|m0_1|u_logic|Enrwx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Enrwx4~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|V2iwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V2iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V2iwx4~0 .lut_mask = 64'hF0F0F0F000000000;
+defparam \soc_inst|m0_1|u_logic|V2iwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y3_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Herwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Herwx4~0_combout = ( \soc_inst|m0_1|u_logic|J3iwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~q ) # ((\soc_inst|m0_1|u_logic|V2iwx4~0_combout & !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q )) ) ) # (
+// !\soc_inst|m0_1|u_logic|J3iwx4~0_combout & ( (\soc_inst|m0_1|u_logic|V2iwx4~0_combout & !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|V2iwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|J3iwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Herwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Herwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Herwx4~0 .lut_mask = 64'h0F000F00CFCCCFCC;
+defparam \soc_inst|m0_1|u_logic|Herwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y7_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Herwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Herwx4~1_combout = ( \soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Fbfwx4~1_combout & !\soc_inst|m0_1|u_logic|Herwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q & (
+// (\soc_inst|m0_1|u_logic|Fbfwx4~1_combout & (\soc_inst|m0_1|u_logic|E4iwx4~0_combout & !\soc_inst|m0_1|u_logic|Herwx4~0_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Fbfwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|E4iwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Herwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Herwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Herwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Herwx4~1 .lut_mask = 64'h0300030033003300;
+defparam \soc_inst|m0_1|u_logic|Herwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y7_N31
+dffeas \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Herwx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y8_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vb2wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vb2wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout & ( \soc_inst|m0_1|u_logic|Vi2wx4~1_combout & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) ) ) # ( \soc_inst|m0_1|u_logic|Qj2wx4~2_combout & (
+// !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout & ( !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q ) #
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vb2wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vb2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vb2wx4~0 .lut_mask = 64'hFFF0F0F0FF000000;
+defparam \soc_inst|m0_1|u_logic|Vb2wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y8_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xr0xx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xr0xx4~combout = ( \soc_inst|m0_1|u_logic|Hw2wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Ffj2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xr0xx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xr0xx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xr0xx4 .lut_mask = 64'h0000000000F000F0;
+defparam \soc_inst|m0_1|u_logic|Xr0xx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y8_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|If2wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|If2wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Xr0xx4~combout & ( (\soc_inst|m0_1|u_logic|Ge2wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # (\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ge2wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xr0xx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|If2wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|If2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|If2wx4~0 .lut_mask = 64'h00AF00AF00000000;
+defparam \soc_inst|m0_1|u_logic|If2wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y8_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vb2wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vb2wx4~combout = ( \soc_inst|m0_1|u_logic|If2wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Vb2wx4~0_combout & ((\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ) # (\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ))) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Vb2wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|If2wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vb2wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vb2wx4 .lut_mask = 64'h000000000CCC0CCC;
+defparam \soc_inst|m0_1|u_logic|Vb2wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y8_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ob2wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ob2wx4~0_combout = ( \soc_inst|m0_1|u_logic|Vi2wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout & !\soc_inst|m0_1|u_logic|Rni2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout & (
+// (!\soc_inst|m0_1|u_logic|T1d3z4~q ) # ((!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ob2wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ob2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ob2wx4~0 .lut_mask = 64'hEEAAEEAACC00CC00;
+defparam \soc_inst|m0_1|u_logic|Ob2wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y8_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ob2wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ob2wx4~combout = ( \soc_inst|m0_1|u_logic|If2wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ob2wx4~0_combout & ((\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ) # (\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ))) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Ob2wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|If2wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ob2wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ob2wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ob2wx4 .lut_mask = 64'h000000000CCC0CCC;
+defparam \soc_inst|m0_1|u_logic|Ob2wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y5_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P3mvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P3mvx4~0_combout = (!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|O5t2z4~q ) # ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Ilpvx4~0_combout ))))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|P3mvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P3mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P3mvx4~0 .lut_mask = 64'hC0E0C0E0C0E0C0E0;
+defparam \soc_inst|m0_1|u_logic|P3mvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y3_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vhwvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vhwvx4~0_combout = ( \soc_inst|m0_1|u_logic|Pty2z4~q & ( (\soc_inst|m0_1|u_logic|Ohwvx4~combout & !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~q & ( (\soc_inst|m0_1|u_logic|Ohwvx4~combout
+// & (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Swy2z4~q & !\soc_inst|m0_1|u_logic|Dvy2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vhwvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vhwvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vhwvx4~0 .lut_mask = 64'h0400040044444444;
+defparam \soc_inst|m0_1|u_logic|Vhwvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y3_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vhwvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vhwvx4~1_combout = ( !\soc_inst|m0_1|u_logic|Vhwvx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Ukpvx4~combout ) # (!\soc_inst|m0_1|u_logic|V1yvx4~0_combout )) # (\soc_inst|m0_1|u_logic|U2x2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Vhwvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vhwvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vhwvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vhwvx4~1 .lut_mask = 64'hFFF3FFF300000000;
+defparam \soc_inst|m0_1|u_logic|Vhwvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y6_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K8wvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K8wvx4~0_combout = ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|U2x2z4~q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|K8wvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K8wvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K8wvx4~0 .lut_mask = 64'h0003000300000000;
+defparam \soc_inst|m0_1|u_logic|K8wvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y6_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K8wvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K8wvx4~1_combout = ( \soc_inst|m0_1|u_logic|C2yvx4~combout & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Qem2z4~q & (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Dvy2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Qem2z4~q & (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|K8wvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K8wvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K8wvx4~1 .lut_mask = 64'h0000000000190019;
+defparam \soc_inst|m0_1|u_logic|K8wvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y6_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K8wvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K8wvx4~2_combout = ( !\soc_inst|m0_1|u_logic|K8wvx4~1_combout & ( (\soc_inst|m0_1|u_logic|Vhwvx4~1_combout & ((!\soc_inst|m0_1|u_logic|K8wvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Qem2z4~q &
+// \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Vhwvx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|K8wvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|K8wvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|K8wvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K8wvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K8wvx4~2 .lut_mask = 64'h0F010F0100000000;
+defparam \soc_inst|m0_1|u_logic|K8wvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y3_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oowvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oowvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Tki2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Oowvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oowvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oowvx4~0 .lut_mask = 64'h0F0F0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|Oowvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y6_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ejwvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ejwvx4~0_combout = ( \soc_inst|m0_1|u_logic|Howvx4~0_combout & ( \soc_inst|m0_1|u_logic|Oowvx4~0_combout & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Howvx4~0_combout & (
+// \soc_inst|m0_1|u_logic|Oowvx4~0_combout & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) ) ) # ( \soc_inst|m0_1|u_logic|Howvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Oowvx4~0_combout & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Oowvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ejwvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ejwvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ejwvx4~0 .lut_mask = 64'h0000F0F0F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Ejwvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y4_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R8wvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R8wvx4~0_combout = ( \soc_inst|m0_1|u_logic|V1yvx4~0_combout & ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|U2x2z4~q &
+// ((\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|U2x2z4~q & (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|V1yvx4~0_combout & (
+// \soc_inst|m0_1|u_logic|Icyvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q & (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|V1yvx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Icyvx4~0_combout & ( (\soc_inst|m0_1|u_logic|U2x2z4~q & (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R8wvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R8wvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R8wvx4~0 .lut_mask = 64'h0000100000A010A0;
+defparam \soc_inst|m0_1|u_logic|R8wvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y6_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R8wvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R8wvx4~1_combout = ( !\soc_inst|m0_1|u_logic|R8wvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ejwvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Ohwvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Blwvx4~0_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ejwvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Blwvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|R8wvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R8wvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R8wvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R8wvx4~1 .lut_mask = 64'hAA80AA8000000000;
+defparam \soc_inst|m0_1|u_logic|R8wvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y6_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F9wvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|F9wvx4~0_combout = ( \soc_inst|m0_1|u_logic|P7wvx4~0_combout & ( \soc_inst|m0_1|u_logic|R8wvx4~1_combout & ( (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|K8wvx4~2_combout ) #
+// (\soc_inst|m0_1|u_logic|Rxl2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P7wvx4~0_combout & ( \soc_inst|m0_1|u_logic|R8wvx4~1_combout & ( (\soc_inst|m0_1|u_logic|K8wvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Rxl2z4~q ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|P7wvx4~0_combout & ( !\soc_inst|m0_1|u_logic|R8wvx4~1_combout & ( (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|K8wvx4~2_combout ) #
+// (\soc_inst|m0_1|u_logic|Rxl2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P7wvx4~0_combout & ( !\soc_inst|m0_1|u_logic|R8wvx4~1_combout & ( (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|K8wvx4~2_combout ) #
+// (\soc_inst|m0_1|u_logic|Rxl2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|K8wvx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|R8wvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|F9wvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F9wvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F9wvx4~0 .lut_mask = 64'h0077000777770707;
+defparam \soc_inst|m0_1|u_logic|F9wvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y5_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P3mvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P3mvx4~1_combout = ( \soc_inst|m0_1|u_logic|F9wvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout & (((\soc_inst|m0_1|u_logic|U6wvx4~7_combout & !\soc_inst|m0_1|u_logic|P3mvx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Auk2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|F9wvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout & (!\soc_inst|m0_1|u_logic|U6wvx4~7_combout & \soc_inst|m0_1|u_logic|Auk2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|P3mvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|F9wvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|P3mvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P3mvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P3mvx4~1 .lut_mask = 64'h0088008820AA20AA;
+defparam \soc_inst|m0_1|u_logic|P3mvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y5_N44
+dffeas \soc_inst|m0_1|u_logic|Auk2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|P3mvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Auk2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Auk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Auk2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y8_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yg2wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yg2wx4~0_combout = ( \soc_inst|m0_1|u_logic|Oi2wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Xr0xx4~combout & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # (\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Oi2wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Xr0xx4~combout & (\soc_inst|m0_1|u_logic|Auk2z4~q & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # (\soc_inst|m0_1|u_logic|Npk2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Xr0xx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yg2wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yg2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yg2wx4~0 .lut_mask = 64'h0C040C04CC44CC44;
+defparam \soc_inst|m0_1|u_logic|Yg2wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X30_Y6_N32
+dffeas \soc_inst|m0_1|u_logic|Xly2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|X6nvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Xly2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xly2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xly2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y3_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D6yvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D6yvx4~0_combout = ( \soc_inst|m0_1|u_logic|Csewx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Xly2z4~q ) # ((!\soc_inst|m0_1|u_logic|Rxl2z4~q & (\soc_inst|m0_1|u_logic|Dvy2z4~q & \soc_inst|m0_1|u_logic|Ahwvx4~0_combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Csewx4~0_combout & ( (\soc_inst|m0_1|u_logic|Ahwvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Dvy2z4~q & ((!\soc_inst|m0_1|u_logic|Xly2z4~q ))) # (\soc_inst|m0_1|u_logic|Dvy2z4~q & (!\soc_inst|m0_1|u_logic|Rxl2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|D6yvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D6yvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D6yvx4~0 .lut_mask = 64'h00CA00CACCCECCCE;
+defparam \soc_inst|m0_1|u_logic|D6yvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y7_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D6yvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D6yvx4~1_combout = (!\soc_inst|m0_1|u_logic|Nqy2z4~q & (((!\soc_inst|m0_1|u_logic|Auk2z4~q & \soc_inst|m0_1|u_logic|Pcyvx4~combout )) # (\soc_inst|m0_1|u_logic|Icyvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Nqy2z4~q &
+// (!\soc_inst|m0_1|u_logic|Auk2z4~q & ((\soc_inst|m0_1|u_logic|Pcyvx4~combout ))))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|D6yvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D6yvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D6yvx4~1 .lut_mask = 64'h0ACE0ACE0ACE0ACE;
+defparam \soc_inst|m0_1|u_logic|D6yvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y8_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V8yvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|V8yvx4~0_combout = ( \soc_inst|m0_1|u_logic|Auk2z4~q & ( (!\soc_inst|m0_1|u_logic|E4xvx4~0_combout & (((\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|E4xvx4~0_combout & (\soc_inst|m0_1|u_logic|Cyq2z4~q
+// & (\soc_inst|m0_1|u_logic|I6z2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Auk2z4~q & ( (\soc_inst|m0_1|u_logic|Cyq2z4~q & (\soc_inst|m0_1|u_logic|I6z2z4~q & \soc_inst|m0_1|u_logic|E4xvx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Cyq2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|I6z2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|E4xvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|V8yvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V8yvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V8yvx4~0 .lut_mask = 64'h001100110F110F11;
+defparam \soc_inst|m0_1|u_logic|V8yvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y9_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D6yvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D6yvx4~2_combout = ( \soc_inst|m0_1|u_logic|C9yvx4~combout & ( (!\soc_inst|m0_1|u_logic|D6yvx4~0_combout & (!\soc_inst|m0_1|u_logic|D6yvx4~1_combout & (!\soc_inst|m0_1|u_logic|V8yvx4~0_combout &
+// !\soc_inst|m0_1|u_logic|G2lwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|C9yvx4~combout & ( (!\soc_inst|m0_1|u_logic|D6yvx4~0_combout & (!\soc_inst|m0_1|u_logic|D6yvx4~1_combout & !\soc_inst|m0_1|u_logic|G2lwx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|D6yvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|D6yvx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|V8yvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|G2lwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|D6yvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D6yvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D6yvx4~2 .lut_mask = 64'h8800880080008000;
+defparam \soc_inst|m0_1|u_logic|D6yvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y9_N49
+dffeas \soc_inst|m0_1|u_logic|H3d3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|D6yvx4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H3d3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H3d3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y8_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yg2wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yg2wx4~combout = ( \soc_inst|m0_1|u_logic|Vi2wx4~1_combout & ( (\soc_inst|m0_1|u_logic|Yg2wx4~0_combout & ((\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ) # (\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout & ( (\soc_inst|m0_1|u_logic|Yg2wx4~0_combout & (\soc_inst|m0_1|u_logic|H3d3z4~q & ((\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ) # (\soc_inst|m0_1|u_logic|Fgm2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Yg2wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yg2wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yg2wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yg2wx4 .lut_mask = 64'h0111011105550555;
+defparam \soc_inst|m0_1|u_logic|Yg2wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y8_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xc2wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xc2wx4~combout = ( \soc_inst|m0_1|u_logic|Yg2wx4~combout & ( \soc_inst|m0_1|u_logic|Xc2wx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Xc2wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Yg2wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xc2wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xc2wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xc2wx4 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Xc2wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y8_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mw1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mw1wx4~0_combout = ( \soc_inst|m0_1|u_logic|Xc2wx4~combout & ( !\soc_inst|m0_1|u_logic|Ob2wx4~combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Ob2wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xc2wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mw1wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mw1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mw1wx4~0 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Mw1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y8_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wu1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wu1wx4~0_combout = ( \soc_inst|m0_1|u_logic|Mw1wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Vb2wx4~combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Mw1wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wu1wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wu1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wu1wx4~0 .lut_mask = 64'h00000000AAAAAAAA;
+defparam \soc_inst|m0_1|u_logic|Wu1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y8_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G02wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G02wx4~0_combout = ( \soc_inst|m0_1|u_logic|Wu1wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wu1wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G02wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G02wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G02wx4~0 .lut_mask = 64'h00000000AAAAAAAA;
+defparam \soc_inst|m0_1|u_logic|G02wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y9_N8
+dffeas \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|M1j2z4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y7_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uwyvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uwyvx4~0_combout = ( \soc_inst|m0_1|u_logic|Fij2z4~q & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Npk2z4~q & (\soc_inst|m0_1|u_logic|Aok2z4~q & \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Uwyvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uwyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uwyvx4~0 .lut_mask = 64'h0000000000020002;
+defparam \soc_inst|m0_1|u_logic|Uwyvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y8_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q77wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q77wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q77wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q77wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q77wx4~0 .lut_mask = 64'h0F000F0000000000;
+defparam \soc_inst|m0_1|u_logic|Q77wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y7_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cuyvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cuyvx4~0_combout = ( \soc_inst|m0_1|u_logic|Ark2z4~q & ( !\soc_inst|m0_1|u_logic|O5t2z4~q & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q & ((!\soc_inst|m0_1|u_logic|Emi2z4~q ))) # (\soc_inst|m0_1|u_logic|Fij2z4~q &
+// (!\soc_inst|m0_1|u_logic|Sgj2z4~q & \soc_inst|m0_1|u_logic|Emi2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~q & ( !\soc_inst|m0_1|u_logic|O5t2z4~q & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q & (!\soc_inst|m0_1|u_logic|Nsk2z4~q &
+// !\soc_inst|m0_1|u_logic|Sgj2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cuyvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~0 .lut_mask = 64'h8080AA5000000000;
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y7_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yyyvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yyyvx4~combout = ( \soc_inst|m0_1|u_logic|Howvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Npk2z4~q & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yyyvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yyyvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yyyvx4 .lut_mask = 64'h000000000F000F00;
+defparam \soc_inst|m0_1|u_logic|Yyyvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y7_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cuyvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cuyvx4~1_combout = ( \soc_inst|m0_1|u_logic|Yyyvx4~combout & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q & (!\soc_inst|m0_1|u_logic|Cuyvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # (!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ))))
+// ) ) # ( !\soc_inst|m0_1|u_logic|Yyyvx4~combout & ( (!\soc_inst|m0_1|u_logic|Cuyvx4~0_combout & (((!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # (!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout )) # (\soc_inst|m0_1|u_logic|O5t2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Cuyvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Yyyvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cuyvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~1 .lut_mask = 64'hF0D0F0D0A080A080;
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y8_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cuyvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cuyvx4~2_combout = ( \soc_inst|m0_1|u_logic|Q77wx4~0_combout & ( \soc_inst|m0_1|u_logic|Cuyvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Uwyvx4~0_combout & ((!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|H0zvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Q77wx4~0_combout & ( \soc_inst|m0_1|u_logic|Cuyvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|H0zvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|H0zvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Uwyvx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Q77wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Cuyvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cuyvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~2 .lut_mask = 64'h00000000EEEEE0E0;
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y7_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cuyvx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cuyvx4~3_combout = ( !\soc_inst|m0_1|u_logic|Mkrwx4~combout & ( (\soc_inst|m0_1|u_logic|Cuyvx4~2_combout & ((!\soc_inst|m0_1|u_logic|Fzyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ))) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Cuyvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fzyvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Mkrwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cuyvx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~3 .lut_mask = 64'h0F030F0300000000;
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y7_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C1zvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C1zvx4~combout = ( \soc_inst|m0_1|u_logic|J4x2z4~q & ( \soc_inst|m0_1|u_logic|Msyvx4~combout & ( !\soc_inst|m0_1|u_logic|Nen2z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|J4x2z4~q & ( !\soc_inst|m0_1|u_logic|Msyvx4~combout & (
+// !\soc_inst|m0_1|u_logic|Nen2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|J4x2z4~q & ( !\soc_inst|m0_1|u_logic|Msyvx4~combout & ( !\soc_inst|m0_1|u_logic|Nen2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Nen2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C1zvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C1zvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C1zvx4 .lut_mask = 64'hF0F0F0F00000F0F0;
+defparam \soc_inst|m0_1|u_logic|C1zvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y8_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Akewx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Akewx4~0_combout = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Ark2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Akewx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Akewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Akewx4~0 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Akewx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y10_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1j2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|M1j2z4~0_combout = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|C1zvx4~combout ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|C1zvx4~combout ) ) # (
+// \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|C1zvx4~combout & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q & ((!\soc_inst|m0_1|u_logic|O5t2z4~q & ((\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|O5t2z4~q &
+// (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Fij2z4~q & (((!\soc_inst|m0_1|u_logic|O5t2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|C1zvx4~combout & (
+// (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Fij2z4~q & (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|O5t2z4~q )) # (\soc_inst|m0_1|u_logic|Fij2z4~q & ((!\soc_inst|m0_1|u_logic|O5t2z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|C1zvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|M1j2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M1j2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M1j2z4~0 .lut_mask = 64'h30803F88FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|M1j2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y10_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1j2z4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|M1j2z4~3_combout = ( !\soc_inst|m0_1|u_logic|Yzi2z4~q & ( (((\soc_inst|m0_1|u_logic|M1j2z4~0_combout & ((\soc_inst|m0_1|u_logic|Rngwx4~combout ) # (\soc_inst|m0_1|u_logic|Fij2z4~q ))))) ) ) # ( \soc_inst|m0_1|u_logic|Yzi2z4~q &
+// ( (\soc_inst|m0_1|u_logic|M1j2z4~0_combout & (((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Rxl2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|M1j2z4~0_combout ),
+ .datag(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|M1j2z4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M1j2z4~3 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|M1j2z4~3 .lut_mask = 64'h000000003F3FFFDF;
+defparam \soc_inst|m0_1|u_logic|M1j2z4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y10_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1j2z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|M1j2z4~1_combout = ( \soc_inst|m0_1|u_logic|Fij2z4~q & ( \soc_inst|m0_1|u_logic|M1j2z4~3_combout & ( ((!\soc_inst|m0_1|u_logic|Yzi2z4~q & ((!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Akewx4~0_combout
+// )))) # (\soc_inst|m0_1|u_logic|C1zvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q & ( \soc_inst|m0_1|u_logic|M1j2z4~3_combout & ( ((!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Akewx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|C1zvx4~combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|C1zvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Akewx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|M1j2z4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|M1j2z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M1j2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M1j2z4~1 .lut_mask = 64'h00000000FF5FDD5D;
+defparam \soc_inst|m0_1|u_logic|M1j2z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y9_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1j2z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|M1j2z4~2_combout = ( \soc_inst|m0_1|u_logic|M1j2z4~1_combout & ( ((\soc_inst|interconnect_1|HREADY~0_combout & !\soc_inst|m0_1|u_logic|Cuyvx4~3_combout )) # (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ) ) ) # (
+// !\soc_inst|m0_1|u_logic|M1j2z4~1_combout & ( (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q & ((!\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|Cuyvx4~3_combout ))) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Cuyvx4~3_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|M1j2z4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|M1j2z4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M1j2z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M1j2z4~2 .lut_mask = 64'h303330333F333F33;
+defparam \soc_inst|m0_1|u_logic|M1j2z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y9_N7
+dffeas \soc_inst|m0_1|u_logic|M1j2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|M1j2z4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M1j2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M1j2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y7_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G02wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G02wx4~combout = ( \soc_inst|m0_1|u_logic|G02wx4~0_combout & ( !\soc_inst|m0_1|u_logic|M1j2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|G02wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G02wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G02wx4 .lut_mask = 64'h0000FFFF00000000;
+defparam \soc_inst|m0_1|u_logic|G02wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y8_N38
+dffeas \soc_inst|m0_1|u_logic|Mcz2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Mcz2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mcz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mcz2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y8_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yv1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yv1wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Xc2wx4~combout & ( !\soc_inst|m0_1|u_logic|Ob2wx4~combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Ob2wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xc2wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yv1wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yv1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yv1wx4~0 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|Yv1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y8_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fw1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fw1wx4~0_combout = ( \soc_inst|m0_1|u_logic|Vb2wx4~combout & ( !\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fw1wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fw1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fw1wx4~0 .lut_mask = 64'h00000000AAAAAAAA;
+defparam \soc_inst|m0_1|u_logic|Fw1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y8_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yv1wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yv1wx4~1_combout = ( \soc_inst|m0_1|u_logic|Fw1wx4~0_combout & ( \soc_inst|m0_1|u_logic|Yv1wx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Yv1wx4~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fw1wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yv1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yv1wx4~1 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Yv1wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X39_Y6_N14
+dffeas \soc_inst|m0_1|u_logic|Wd13z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wd13z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wd13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wd13z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X52_Y9_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|If2wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|If2wx4~1_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( \soc_inst|m0_1|u_logic|Vi2wx4~1_combout & ( (\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q & ( \soc_inst|m0_1|u_logic|Vi2wx4~1_combout & ( \soc_inst|m0_1|u_logic|Qj2wx4~2_combout ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout & (
+// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Yaz2z4~q & ((\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q & (
+// !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout & ( (\soc_inst|m0_1|u_logic|Qj2wx4~2_combout & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|If2wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|If2wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|If2wx4~1 .lut_mask = 64'h0003000733337777;
+defparam \soc_inst|m0_1|u_logic|If2wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X52_Y8_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|If2wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|If2wx4~2_combout = ( \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|If2wx4~1_combout & ( (\soc_inst|m0_1|u_logic|If2wx4~0_combout & ((\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ) #
+// (\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|If2wx4~1_combout & ( (\soc_inst|m0_1|u_logic|Oi2wx4~1_combout & \soc_inst|m0_1|u_logic|If2wx4~0_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|If2wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|If2wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|If2wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|If2wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|If2wx4~2 .lut_mask = 64'h000000000303030F;
+defparam \soc_inst|m0_1|u_logic|If2wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y9_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ydyvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ydyvx4~combout = (\soc_inst|m0_1|u_logic|Yv1wx4~0_combout & \soc_inst|m0_1|u_logic|If2wx4~2_combout )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Yv1wx4~0_combout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|If2wx4~2_combout ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ydyvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ydyvx4 .lut_mask = 64'h0055005500550055;
+defparam \soc_inst|m0_1|u_logic|Ydyvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y8_N59
+dffeas \soc_inst|m0_1|u_logic|Fn23z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Fn23z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fn23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fn23z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y8_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sj62z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sj62z4~1_combout = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Fn23z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~q & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+// # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Wd13z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~q & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wd13z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fn23z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sj62z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sj62z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sj62z4~1 .lut_mask = 64'h00A0000000C00000;
+defparam \soc_inst|m0_1|u_logic|Sj62z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y9_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pl62z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pl62z4~0_combout = ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|Cll2z4~q & (!\soc_inst|m0_1|u_logic|Sjj2z4~q & (\soc_inst|m0_1|u_logic|M1j2z4~q &
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Cll2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pl62z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pl62z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pl62z4~0 .lut_mask = 64'h0000000008000000;
+defparam \soc_inst|m0_1|u_logic|Pl62z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y8_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fw1wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fw1wx4~1_combout = ( \soc_inst|m0_1|u_logic|Fw1wx4~0_combout & ( \soc_inst|m0_1|u_logic|Mw1wx4~0_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mw1wx4~0_combout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fw1wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fw1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fw1wx4~1 .lut_mask = 64'h0000000055555555;
+defparam \soc_inst|m0_1|u_logic|Fw1wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y10_N32
+dffeas \soc_inst|m0_1|u_logic|Ow33z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ow33z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ow33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ow33z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y9_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mw1wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mw1wx4~1_combout = ( \soc_inst|m0_1|u_logic|Mw1wx4~0_combout & ( \soc_inst|m0_1|u_logic|If2wx4~2_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|If2wx4~2_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Mw1wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mw1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mw1wx4~1 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Mw1wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y8_N23
+dffeas \soc_inst|m0_1|u_logic|X553z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|X553z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X553z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X553z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y8_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sj62z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sj62z4~0_combout = ( !\soc_inst|m0_1|u_logic|X553z4~q & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Rni2z4~q & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) #
+// ( \soc_inst|m0_1|u_logic|X553z4~q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Ow33z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~q & \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|X553z4~q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Ow33z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~q & \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ow33z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|X553z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sj62z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sj62z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sj62z4~0 .lut_mask = 64'h0040004000500000;
+defparam \soc_inst|m0_1|u_logic|Sj62z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y7_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ue9wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ue9wx4~0_combout = ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Rni2z4~q &
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ue9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ue9wx4~0 .lut_mask = 64'h00000000A0000000;
+defparam \soc_inst|m0_1|u_logic|Ue9wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y8_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wu1wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wu1wx4~1_combout = ( \soc_inst|m0_1|u_logic|Wu1wx4~0_combout & ( \soc_inst|m0_1|u_logic|Ge2wx4~2_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wu1wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wu1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wu1wx4~1 .lut_mask = 64'h0000000055555555;
+defparam \soc_inst|m0_1|u_logic|Wu1wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y10_N2
+dffeas \soc_inst|m0_1|u_logic|Ikz2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ikz2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ikz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ikz2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y7_N32
+dffeas \soc_inst|m0_1|u_logic|Wzy2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Herwx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wzy2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wzy2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y8_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Meyvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Meyvx4~combout = ( !\soc_inst|m0_1|u_logic|Vb2wx4~combout & ( (\soc_inst|m0_1|u_logic|Ge2wx4~2_combout & \soc_inst|m0_1|u_logic|Yv1wx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Yv1wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Meyvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Meyvx4 .lut_mask = 64'h000F000F00000000;
+defparam \soc_inst|m0_1|u_logic|Meyvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X36_Y9_N31
+dffeas \soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y10_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sj62z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sj62z4~2_combout = ( !\soc_inst|m0_1|u_logic|Rni2z4~q & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q & ((!\soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE_q ))) #
+// (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Ikz2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ikz2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sj62z4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sj62z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sj62z4~2 .lut_mask = 64'h00000000C8080000;
+defparam \soc_inst|m0_1|u_logic|Sj62z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y8_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sj62z4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sj62z4~3_combout = ( \soc_inst|m0_1|u_logic|Ue9wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Sj62z4~2_combout & ( (\soc_inst|m0_1|u_logic|Mcz2z4~q & (!\soc_inst|m0_1|u_logic|Sj62z4~1_combout &
+// (!\soc_inst|m0_1|u_logic|Pl62z4~0_combout & !\soc_inst|m0_1|u_logic|Sj62z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ue9wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Sj62z4~2_combout & ( (!\soc_inst|m0_1|u_logic|Sj62z4~1_combout &
+// (!\soc_inst|m0_1|u_logic|Pl62z4~0_combout & !\soc_inst|m0_1|u_logic|Sj62z4~0_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mcz2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sj62z4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Pl62z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Sj62z4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sj62z4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sj62z4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sj62z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sj62z4~3 .lut_mask = 64'hC000400000000000;
+defparam \soc_inst|m0_1|u_logic|Sj62z4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y8_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hx1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hx1wx4~0_combout = ( \soc_inst|m0_1|u_logic|Xc2wx4~combout & ( \soc_inst|m0_1|u_logic|Ob2wx4~combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Ob2wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xc2wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hx1wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hx1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hx1wx4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Hx1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X52_Y8_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hx1wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hx1wx4~1_combout = ( \soc_inst|m0_1|u_logic|If2wx4~2_combout & ( \soc_inst|m0_1|u_logic|Hx1wx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Hx1wx4~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|If2wx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hx1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hx1wx4~1 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Hx1wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y9_N8
+dffeas \soc_inst|m0_1|u_logic|Grl2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Grl2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Grl2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Grl2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ax1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ax1wx4~0_combout = ( \soc_inst|m0_1|u_logic|Fw1wx4~0_combout & ( \soc_inst|m0_1|u_logic|Hx1wx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Fw1wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Hx1wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ax1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ax1wx4~0 .lut_mask = 64'h000000000000FFFF;
+defparam \soc_inst|m0_1|u_logic|Ax1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X48_Y9_N14
+dffeas \soc_inst|m0_1|u_logic|Spl2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Spl2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Spl2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Spl2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y9_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bywwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bywwx4~1_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Grl2z4~q & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Spl2z4~q & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Grl2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Spl2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bywwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bywwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bywwx4~1 .lut_mask = 64'h0000000000500044;
+defparam \soc_inst|m0_1|u_logic|Bywwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y8_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rv1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rv1wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Vb2wx4~combout & ( \soc_inst|m0_1|u_logic|Hx1wx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Hx1wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rv1wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rv1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rv1wx4~0 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|Rv1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y8_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rv1wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rv1wx4~1_combout = ( \soc_inst|m0_1|u_logic|Rv1wx4~0_combout & ( \soc_inst|m0_1|u_logic|Ge2wx4~2_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Rv1wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rv1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rv1wx4~1 .lut_mask = 64'h0000000055555555;
+defparam \soc_inst|m0_1|u_logic|Rv1wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y9_N53
+dffeas \soc_inst|m0_1|u_logic|Psu2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Psu2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Psu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Psu2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y8_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kv1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kv1wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Ge2wx4~2_combout & ( \soc_inst|m0_1|u_logic|Rv1wx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Rv1wx4~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kv1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kv1wx4~0 .lut_mask = 64'h0F0F0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|Kv1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y9_N38
+dffeas \soc_inst|m0_1|u_logic|Qml2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Qml2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qml2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qml2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y9_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bywwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bywwx4~3_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Psu2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Qml2z4~q & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Psu2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Qml2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bywwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bywwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bywwx4~3 .lut_mask = 64'h0030002200000000;
+defparam \soc_inst|m0_1|u_logic|Bywwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X52_Y8_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hfyvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hfyvx4~1_combout = ( \soc_inst|m0_1|u_logic|Rni2z4~q & ( \soc_inst|m0_1|u_logic|Qj2wx4~2_combout & ( ((\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|T1d3z4~q )) # (\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ) )
+// ) ) # ( !\soc_inst|m0_1|u_logic|Rni2z4~q & ( \soc_inst|m0_1|u_logic|Qj2wx4~2_combout & ( ((\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|T1d3z4~q )) # (\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Rni2z4~q & ( !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q & (((\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|T1d3z4~q )) # (\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hfyvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hfyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hfyvx4~1 .lut_mask = 64'h000003130F5F0F5F;
+defparam \soc_inst|m0_1|u_logic|Hfyvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X52_Y8_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hfyvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hfyvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Xc2wx4~combout & ( \soc_inst|m0_1|u_logic|If2wx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|If2wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xc2wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hfyvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hfyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hfyvx4~0 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|Hfyvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X52_Y8_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hfyvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hfyvx4~2_combout = ( \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Hfyvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Vb2wx4~combout & (\soc_inst|m0_1|u_logic|Hfyvx4~1_combout &
+// ((\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ) # (\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Hfyvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Vb2wx4~combout &
+// (\soc_inst|m0_1|u_logic|Oi2wx4~1_combout & \soc_inst|m0_1|u_logic|Hfyvx4~1_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hfyvx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Hfyvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hfyvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hfyvx4~2 .lut_mask = 64'h00000000000A002A;
+defparam \soc_inst|m0_1|u_logic|Hfyvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y10_N47
+dffeas \soc_inst|m0_1|u_logic|Gjt2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Gjt2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gjt2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gjt2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y9_N29
+dffeas \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Ggswx4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y9_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wcyvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wcyvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|T1d3z4~q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wcyvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~0 .lut_mask = 64'hFFFC0000FFFC0000;
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X52_Y8_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wcyvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wcyvx4~1_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( (!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q ) # (!\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q & (
+// !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wcyvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~1 .lut_mask = 64'hFF00FF00FA00FA00;
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X52_Y8_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wcyvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wcyvx4~2_combout = ( \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout & ((!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wcyvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~2 .lut_mask = 64'hCCCCCCCCCCC0CCC0;
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X52_Y8_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wcyvx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wcyvx4~3_combout = ( \soc_inst|m0_1|u_logic|Hfyvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Wcyvx4~0_combout & (!\soc_inst|m0_1|u_logic|Wcyvx4~1_combout & !\soc_inst|m0_1|u_logic|Wcyvx4~2_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Wcyvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Wcyvx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wcyvx4~2_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Hfyvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~3 .lut_mask = 64'h00000000C000C000;
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X40_Y8_N29
+dffeas \soc_inst|m0_1|u_logic|Po73z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Po73z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Po73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Po73z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y10_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bywwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bywwx4~2_combout = ( \soc_inst|m0_1|u_logic|Wzy2z4~q & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Po73z4~q & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Wzy2z4~q & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Gjt2z4~q & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Gjt2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Po73z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bywwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bywwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bywwx4~2 .lut_mask = 64'h00000000008800A0;
+defparam \soc_inst|m0_1|u_logic|Bywwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y8_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tw1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tw1wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Xc2wx4~combout & ( \soc_inst|m0_1|u_logic|Ob2wx4~combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Ob2wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xc2wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tw1wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tw1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tw1wx4~0 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|Tw1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y8_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tw1wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tw1wx4~1_combout = ( \soc_inst|m0_1|u_logic|Fw1wx4~0_combout & ( \soc_inst|m0_1|u_logic|Tw1wx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Tw1wx4~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fw1wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tw1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tw1wx4~1 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Tw1wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y10_N32
+dffeas \soc_inst|m0_1|u_logic|Gf63z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Gf63z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gf63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gf63z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y8_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dv1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dv1wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Vb2wx4~combout & ( (\soc_inst|m0_1|u_logic|Tw1wx4~0_combout & !\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Tw1wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dv1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dv1wx4~0 .lut_mask = 64'h3030303000000000;
+defparam \soc_inst|m0_1|u_logic|Dv1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y10_N5
+dffeas \soc_inst|m0_1|u_logic|Eol2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Eol2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eol2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Eol2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y10_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bywwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bywwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Gf63z4~q & ( \soc_inst|m0_1|u_logic|Eol2z4~q & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Wzy2z4~q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Gf63z4~q & ( !\soc_inst|m0_1|u_logic|Eol2z4~q & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Wzy2z4~q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gf63z4~q & ( !\soc_inst|m0_1|u_logic|Eol2z4~q & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Gf63z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Eol2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bywwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bywwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bywwx4~0 .lut_mask = 64'h00A0008000200000;
+defparam \soc_inst|m0_1|u_logic|Bywwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y8_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bywwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bywwx4~combout = ( !\soc_inst|m0_1|u_logic|Bywwx4~2_combout & ( !\soc_inst|m0_1|u_logic|Bywwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Bywwx4~1_combout & !\soc_inst|m0_1|u_logic|Bywwx4~3_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bywwx4~1_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Bywwx4~3_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Bywwx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Bywwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bywwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bywwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bywwx4 .lut_mask = 64'hA0A0000000000000;
+defparam \soc_inst|m0_1|u_logic|Bywwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y8_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yonvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yonvx4~0_combout = ( \soc_inst|m0_1|u_logic|Bywwx4~combout & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|U593z4~q )) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Sj62z4~3_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bywwx4~combout & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|U593z4~q ) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Bywwx4~combout & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|U593z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|I793z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bywwx4~combout & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|U593z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|I793z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|I793z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|U593z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Sj62z4~3_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Bywwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yonvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yonvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yonvx4~0 .lut_mask = 64'hCACACACACFCFCFC0;
+defparam \soc_inst|m0_1|u_logic|Yonvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y10_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Shyvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Shyvx4~0_combout = ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout & ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) # ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|A0zvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|Pcyvx4~combout & \soc_inst|m0_1|u_logic|O5t2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Shyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Shyvx4~0 .lut_mask = 64'h0022AAAA0000AAAA;
+defparam \soc_inst|m0_1|u_logic|Shyvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y10_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pmgwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pmgwx4~0_combout = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pmgwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pmgwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pmgwx4~0 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Pmgwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y10_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ez8wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ez8wx4~0_combout = ( \soc_inst|m0_1|u_logic|Pmgwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|X77wx4~combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pmgwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ez8wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ez8wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ez8wx4~0 .lut_mask = 64'h0000000000A000A0;
+defparam \soc_inst|m0_1|u_logic|Ez8wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y5_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Elnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Elnvx4~0_combout = ( \soc_inst|m0_1|u_logic|J6i2z4~q & ( \soc_inst|m0_1|u_logic|Nlovx4~7_combout & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # ((\soc_inst|m0_1|u_logic|S6ovx4~3_combout &
+// ((\soc_inst|m0_1|u_logic|Fvovx4~combout ) # (\soc_inst|m0_1|u_logic|S4qvx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|J6i2z4~q & ( \soc_inst|m0_1|u_logic|Nlovx4~7_combout & ( (\soc_inst|m0_1|u_logic|S6ovx4~3_combout &
+// ((\soc_inst|m0_1|u_logic|Fvovx4~combout ) # (\soc_inst|m0_1|u_logic|S4qvx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|J6i2z4~q & ( !\soc_inst|m0_1|u_logic|Nlovx4~7_combout & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) #
+// (\soc_inst|m0_1|u_logic|S6ovx4~3_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|J6i2z4~q & ( !\soc_inst|m0_1|u_logic|Nlovx4~7_combout & ( \soc_inst|m0_1|u_logic|S6ovx4~3_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|S4qvx4~combout ),
+ .datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fvovx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Nlovx4~7_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Elnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Elnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Elnvx4~0 .lut_mask = 64'h0F0FCFCF050FCDCF;
+defparam \soc_inst|m0_1|u_logic|Elnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X17_Y5_N19
+dffeas \soc_inst|m0_1|u_logic|J6i2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Elnvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J6i2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J6i2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y5_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xknvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xknvx4~0_combout = ( \soc_inst|m0_1|u_logic|Kop2z4~q & ( \soc_inst|m0_1|u_logic|Nlovx4~7_combout & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # ((\soc_inst|m0_1|u_logic|S6ovx4~3_combout &
+// ((\soc_inst|m0_1|u_logic|Rxzvx4~combout ) # (\soc_inst|m0_1|u_logic|Ekovx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kop2z4~q & ( \soc_inst|m0_1|u_logic|Nlovx4~7_combout & ( (\soc_inst|m0_1|u_logic|S6ovx4~3_combout &
+// ((\soc_inst|m0_1|u_logic|Rxzvx4~combout ) # (\soc_inst|m0_1|u_logic|Ekovx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kop2z4~q & ( !\soc_inst|m0_1|u_logic|Nlovx4~7_combout & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) #
+// (\soc_inst|m0_1|u_logic|S6ovx4~3_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kop2z4~q & ( !\soc_inst|m0_1|u_logic|Nlovx4~7_combout & ( \soc_inst|m0_1|u_logic|S6ovx4~3_combout ) ) )
+
+ .dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ekovx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Rxzvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Nlovx4~7_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xknvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xknvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xknvx4~0 .lut_mask = 64'h0F0FAFAF030FABAF;
+defparam \soc_inst|m0_1|u_logic|Xknvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X17_Y5_N31
+dffeas \soc_inst|m0_1|u_logic|Kop2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Xknvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Kop2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kop2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kop2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y13_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~53 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~53_sumout = SUM(( !\soc_inst|m0_1|u_logic|Ycx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~58 ))
+// \soc_inst|m0_1|u_logic|Add2~54 = CARRY(( !\soc_inst|m0_1|u_logic|Ycx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~58 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ycx2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add2~58 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add2~53_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add2~54 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~53 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~53 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~53 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~49 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~49_sumout = SUM(( !\soc_inst|m0_1|u_logic|Jex2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~54 ))
+// \soc_inst|m0_1|u_logic|Add2~50 = CARRY(( !\soc_inst|m0_1|u_logic|Jex2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~54 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Jex2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add2~54 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add2~49_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add2~50 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~49 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~49 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~49 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y13_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~45 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~45_sumout = SUM(( !\soc_inst|m0_1|u_logic|V4d3z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~50 ))
+// \soc_inst|m0_1|u_logic|Add2~46 = CARRY(( !\soc_inst|m0_1|u_logic|V4d3z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~50 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|V4d3z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add2~50 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add2~45_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add2~46 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~45 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~45 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~45 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y13_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bfhvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Add2~45_sumout )))) #
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & (((\soc_inst|m0_1|u_logic|V4d3z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|V4d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Add2~45_sumout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bfhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bfhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfhvx4~0 .lut_mask = 64'hCF8BCF8B00000000;
+defparam \soc_inst|m0_1|u_logic|Bfhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y7_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mddwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mddwx4~1_combout = ( \soc_inst|m0_1|u_logic|Aok2z4~q & ( (\soc_inst|m0_1|u_logic|Fij2z4~q & !\soc_inst|m0_1|u_logic|Sgj2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~q & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q &
+// ((\soc_inst|m0_1|u_logic|Npk2z4~q ) # (\soc_inst|m0_1|u_logic|Fij2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mddwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mddwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mddwx4~1 .lut_mask = 64'h5F005F0055005500;
+defparam \soc_inst|m0_1|u_logic|Mddwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y6_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mddwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mddwx4~0_combout = ( \soc_inst|m0_1|u_logic|Fij2z4~q & ( \soc_inst|m0_1|u_logic|Mddwx4~1_combout & ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q & (
+// \soc_inst|m0_1|u_logic|Mddwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & (((\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|O5t2z4~q )) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Fij2z4~q & ( !\soc_inst|m0_1|u_logic|Mddwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q & (
+// !\soc_inst|m0_1|u_logic|Mddwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|O5t2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mddwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mddwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mddwx4~0 .lut_mask = 64'h0005050511155555;
+defparam \soc_inst|m0_1|u_logic|Mddwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y7_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jfdwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jfdwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Aok2z4~q & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Npk2z4~q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jfdwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jfdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jfdwx4~0 .lut_mask = 64'h0C000C0000000000;
+defparam \soc_inst|m0_1|u_logic|Jfdwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y7_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kcdwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kcdwx4~0_combout = ( \soc_inst|m0_1|u_logic|Aok2z4~q & ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q & \soc_inst|m0_1|u_logic|Nsk2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~q & (
+// \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q & \soc_inst|m0_1|u_logic|Nsk2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Aok2z4~q & ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q &
+// (((!\soc_inst|m0_1|u_logic|Sgj2z4~q & !\soc_inst|m0_1|u_logic|Npk2z4~q )) # (\soc_inst|m0_1|u_logic|Nsk2z4~q ))) # (\soc_inst|m0_1|u_logic|Emi2z4~q & (((!\soc_inst|m0_1|u_logic|Sgj2z4~q & !\soc_inst|m0_1|u_logic|Npk2z4~q )))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Aok2z4~q & ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q & \soc_inst|m0_1|u_logic|Nsk2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kcdwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kcdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kcdwx4~0 .lut_mask = 64'h2222F22222222222;
+defparam \soc_inst|m0_1|u_logic|Kcdwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y7_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kcdwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout = ( \soc_inst|m0_1|u_logic|Qfdwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Kcdwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q ) # ((!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Jfdwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qfdwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Kcdwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q ) #
+// ((!\soc_inst|m0_1|u_logic|Jfdwx4~0_combout & ((\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Jfdwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kcdwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kcdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kcdwx4~1 .lut_mask = 64'hDFCCCECC00000000;
+defparam \soc_inst|m0_1|u_logic|Kcdwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y6_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W19wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|W19wx4~0_combout = ( \soc_inst|m0_1|u_logic|Kcdwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Mddwx4~0_combout & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Kcdwx4~1_combout & (
+// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W19wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W19wx4~0 .lut_mask = 64'hFF00FF000F000F00;
+defparam \soc_inst|m0_1|u_logic|W19wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y6_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pm9wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pm9wx4~0_combout = ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Aok2z4~q & (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pm9wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pm9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pm9wx4~0 .lut_mask = 64'h0000000020002000;
+defparam \soc_inst|m0_1|u_logic|Pm9wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y5_N43
+dffeas \soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|P3mvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y7_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y29wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y29wx4~combout = ( !\soc_inst|m0_1|u_logic|Pdi2z4~q & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q & (\soc_inst|m0_1|u_logic|Nsk2z4~q & (\soc_inst|m0_1|u_logic|Sgj2z4~q & \soc_inst|m0_1|u_logic|Aok2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y29wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y29wx4 .lut_mask = 64'h0002000200000000;
+defparam \soc_inst|m0_1|u_logic|Y29wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y4_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kzbwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kzbwx4~0_combout = ( \soc_inst|m0_1|u_logic|Y29wx4~combout & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Pm9wx4~0_combout & !\soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Y29wx4~combout & ( (\soc_inst|m0_1|u_logic|Pm9wx4~0_combout & !\soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Pm9wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kzbwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kzbwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kzbwx4~0 .lut_mask = 64'h0F000F00CFCCCFCC;
+defparam \soc_inst|m0_1|u_logic|Kzbwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y4_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W4dwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|W4dwx4~0_combout = ( \soc_inst|m0_1|u_logic|Fij2z4~q & ( \soc_inst|m0_1|u_logic|Npk2z4~q ) ) # ( \soc_inst|m0_1|u_logic|Fij2z4~q & ( !\soc_inst|m0_1|u_logic|Npk2z4~q & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) #
+// (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|W4dwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W4dwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W4dwx4~0 .lut_mask = 64'h0000F0FF0000FFFF;
+defparam \soc_inst|m0_1|u_logic|W4dwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y4_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y5dwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y5dwx4~0_combout = ( !\soc_inst|m0_1|u_logic|O5t2z4~q & ( \soc_inst|m0_1|u_logic|Npk2z4~q & ( (\soc_inst|m0_1|u_logic|Fij2z4~q & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~q & (
+// !\soc_inst|m0_1|u_logic|Npk2z4~q & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & (((!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Fij2z4~q )) # (\soc_inst|m0_1|u_logic|Nsk2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Y5dwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y5dwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y5dwx4~0 .lut_mask = 64'h00DF0000000F0000;
+defparam \soc_inst|m0_1|u_logic|Y5dwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y4_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W4dwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|W4dwx4~1_combout = ( \soc_inst|m0_1|u_logic|O5t2z4~q & ( \soc_inst|m0_1|u_logic|Fij2z4~q & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~q &
+// ( \soc_inst|m0_1|u_logic|Fij2z4~q & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|O5t2z4~q & ( !\soc_inst|m0_1|u_logic|Fij2z4~q & (
+// (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Nsk2z4~q & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|W4dwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W4dwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W4dwx4~1 .lut_mask = 64'h0000030033003300;
+defparam \soc_inst|m0_1|u_logic|W4dwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y4_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D1awx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D1awx4~0_combout = ( \soc_inst|m0_1|u_logic|W4dwx4~1_combout & ( \soc_inst|m0_1|u_logic|Uwyvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|W4dwx4~0_combout ) #
+// ((\soc_inst|m0_1|u_logic|Ucqvx4~combout ) # (\soc_inst|m0_1|u_logic|Y5dwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W4dwx4~1_combout & ( \soc_inst|m0_1|u_logic|Uwyvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q &
+// ((\soc_inst|m0_1|u_logic|Ucqvx4~combout ) # (\soc_inst|m0_1|u_logic|Y5dwx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|W4dwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Uwyvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|W4dwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Y5dwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W4dwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Uwyvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|Y5dwx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|W4dwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Y5dwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|W4dwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Uwyvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|D1awx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D1awx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D1awx4~0 .lut_mask = 64'h0A0A8A8A0AAA8AAA;
+defparam \soc_inst|m0_1|u_logic|D1awx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y8_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U2s2z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U2s2z4~feeder_combout = ( \soc_inst|m0_1|u_logic|Iu1wx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U2s2z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U2s2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U2s2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|U2s2z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y8_N10
+dffeas \soc_inst|m0_1|u_logic|U2s2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|U2s2z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|U2s2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U2s2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U2s2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y7_N8
+dffeas \soc_inst|m0_1|u_logic|Cy43z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Cy43z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cy43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cy43z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y9_N50
+dffeas \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|D6yvx4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y7_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vf5wx4~2_combout = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|T1d3z4~q & ( (!\soc_inst|m0_1|u_logic|U2s2z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q
+// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( (!\soc_inst|m0_1|u_logic|Cy43z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|U2s2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Cy43z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vf5wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~2 .lut_mask = 64'h000000C0000000A0;
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y7_N56
+dffeas \soc_inst|m0_1|u_logic|L763z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|L763z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L763z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|L763z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y4_N43
+dffeas \soc_inst|m0_1|u_logic|To33z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|To33z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|To33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|To33z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y4_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vf5wx4~3_combout = ( \soc_inst|m0_1|u_logic|H3d3z4~q & ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|L763z4~q & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) ) #
+// ( !\soc_inst|m0_1|u_logic|H3d3z4~q & ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|To33z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|L763z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|To33z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vf5wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~3 .lut_mask = 64'h0500040400000000;
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y8_N25
+dffeas \soc_inst|m0_1|u_logic|Kf23z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Kf23z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kf23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kf23z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y8_N32
+dffeas \soc_inst|m0_1|u_logic|W5s2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|W5s2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W5s2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|W5s2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y8_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vf5wx4~0_combout = ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Svk2z4~q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (((\soc_inst|m0_1|u_logic|T1d3z4~q & !\soc_inst|m0_1|u_logic|W5s2z4~q )))) #
+// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Kf23z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Kf23z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|W5s2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vf5wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~0 .lut_mask = 64'h4A40000000000000;
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y4_N29
+dffeas \soc_inst|m0_1|u_logic|Rpe3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rpe3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rpe3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rpe3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y4_N11
+dffeas \soc_inst|m0_1|u_logic|Hue3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Hue3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hue3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hue3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X40_Y4_N8
+dffeas \soc_inst|m0_1|u_logic|Fre3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Fre3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fre3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fre3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y9_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N71xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N71xx4~0_combout = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Svk2z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N71xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N71xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N71xx4~0 .lut_mask = 64'h0000000050005000;
+defparam \soc_inst|m0_1|u_logic|N71xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y9_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y21xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y21xx4~0_combout = ( !\soc_inst|m0_1|u_logic|Svk2z4~q & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|T1d3z4~q & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q
+// ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y21xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y21xx4~0 .lut_mask = 64'h4000400000000000;
+defparam \soc_inst|m0_1|u_logic|Y21xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y4_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vf5wx4~4_combout = ( \soc_inst|m0_1|u_logic|L61xx4~0_combout & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout & ( (\soc_inst|m0_1|u_logic|Hue3z4~q & (\soc_inst|m0_1|u_logic|Fre3z4~q & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Rpe3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L61xx4~0_combout & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout & ( (\soc_inst|m0_1|u_logic|Hue3z4~q & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rpe3z4~q
+// ))) ) ) ) # ( \soc_inst|m0_1|u_logic|L61xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout & ( (\soc_inst|m0_1|u_logic|Fre3z4~q & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rpe3z4~q ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|L61xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rpe3z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rpe3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Hue3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fre3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|N71xx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vf5wx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~4 .lut_mask = 64'hFF550F0533110301;
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y8_N56
+dffeas \soc_inst|m0_1|u_logic|I4s2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|I4s2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I4s2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I4s2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y4_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vf5wx4~1_combout = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q & ( \soc_inst|m0_1|u_logic|T1d3z4~q & ( (\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|I4s2z4~q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q & ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|G1s2z4~q & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|G1s2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|I4s2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vf5wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~1 .lut_mask = 64'h8080000050000000;
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X40_Y8_N50
+dffeas \soc_inst|m0_1|u_logic|Dq83z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Dq83z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dq83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dq83z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X40_Y8_N32
+dffeas \soc_inst|m0_1|u_logic|Duv2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Duv2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Duv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Duv2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y8_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vf5wx4~6_combout = ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|Uku2z4~q ))) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Duv2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Duv2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Uku2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vf5wx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~6 .lut_mask = 64'h0000000000E40000;
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y8_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pu1wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pu1wx4~combout = ( \soc_inst|m0_1|u_logic|G02wx4~0_combout & ( \soc_inst|m0_1|u_logic|M1j2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|G02wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pu1wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pu1wx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Pu1wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y7_N16
+dffeas \soc_inst|m0_1|u_logic|Tse3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Tse3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tse3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tse3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y8_N25
+dffeas \soc_inst|m0_1|u_logic|Ug73z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ug73z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ug73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ug73z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y8_N5
+dffeas \soc_inst|m0_1|u_logic|Cxc3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Cxc3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cxc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cxc3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y8_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vf5wx4~5_combout = ( !\soc_inst|m0_1|u_logic|Ug73z4~q & ( \soc_inst|m0_1|u_logic|Cxc3z4~q & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Svk2z4~q &
+// \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ug73z4~q & ( !\soc_inst|m0_1|u_logic|Cxc3z4~q & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Svk2z4~q &
+// \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ug73z4~q & ( !\soc_inst|m0_1|u_logic|Cxc3z4~q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q $
+// (\soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ug73z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Cxc3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vf5wx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~5 .lut_mask = 64'h0021000100200000;
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y6_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S61xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S61xx4~0_combout = ( \soc_inst|m0_1|u_logic|T1d3z4~q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|H3d3z4~q & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S61xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S61xx4~0 .lut_mask = 64'h0000000000500050;
+defparam \soc_inst|m0_1|u_logic|S61xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y8_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vf5wx4~7_combout = ( !\soc_inst|m0_1|u_logic|Vf5wx4~5_combout & ( \soc_inst|m0_1|u_logic|S61xx4~0_combout & ( (\soc_inst|m0_1|u_logic|Dq83z4~q & (!\soc_inst|m0_1|u_logic|Vf5wx4~6_combout &
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tse3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vf5wx4~5_combout & ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Vf5wx4~6_combout &
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tse3z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Dq83z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Vf5wx4~6_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Tse3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Vf5wx4~5_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vf5wx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~7 .lut_mask = 64'hC0F0000040500000;
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y4_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~8 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vf5wx4~8_combout = ( !\soc_inst|m0_1|u_logic|Vf5wx4~1_combout & ( \soc_inst|m0_1|u_logic|Vf5wx4~7_combout & ( (!\soc_inst|m0_1|u_logic|Vf5wx4~2_combout & (!\soc_inst|m0_1|u_logic|Vf5wx4~3_combout &
+// (!\soc_inst|m0_1|u_logic|Vf5wx4~0_combout & \soc_inst|m0_1|u_logic|Vf5wx4~4_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vf5wx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Vf5wx4~3_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Vf5wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Vf5wx4~4_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Vf5wx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Vf5wx4~7_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vf5wx4~8_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~8 .lut_mask = 64'h0000000000800000;
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y4_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kzbwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kzbwx4~1_combout = ( \soc_inst|m0_1|u_logic|D1awx4~0_combout & ( \soc_inst|m0_1|u_logic|Vf5wx4~8_combout & ( (!\soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Kzbwx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|D1awx4~0_combout & ( \soc_inst|m0_1|u_logic|Vf5wx4~8_combout & ( \soc_inst|m0_1|u_logic|Kzbwx4~0_combout ) ) ) # ( \soc_inst|m0_1|u_logic|D1awx4~0_combout & ( !\soc_inst|m0_1|u_logic|Vf5wx4~8_combout & (
+// (!\soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Kzbwx4~0_combout ) # (\soc_inst|m0_1|u_logic|W19wx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|D1awx4~0_combout & ( !\soc_inst|m0_1|u_logic|Vf5wx4~8_combout & (
+// (\soc_inst|m0_1|u_logic|Kzbwx4~0_combout ) # (\soc_inst|m0_1|u_logic|W19wx4~0_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Kzbwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|D1awx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Vf5wx4~8_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kzbwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kzbwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kzbwx4~1 .lut_mask = 64'h0FFFCFFF00FFCCFF;
+defparam \soc_inst|m0_1|u_logic|Kzbwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y6_N32
+dffeas \soc_inst|m0_1|u_logic|I2t2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|W3mvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|I2t2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I2t2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I2t2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y6_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lk9wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lk9wx4~0_combout = ( \soc_inst|m0_1|u_logic|I2t2z4~q & ( (\soc_inst|m0_1|u_logic|Y29wx4~combout & !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|I2t2z4~q & ( ((\soc_inst|m0_1|u_logic|Y29wx4~combout
+// & !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Pm9wx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Pm9wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|I2t2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lk9wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lk9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lk9wx4~0 .lut_mask = 64'h7373737350505050;
+defparam \soc_inst|m0_1|u_logic|Lk9wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y5_N11
+dffeas \soc_inst|m0_1|u_logic|Wxp2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|U5qvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wxp2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wxp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wxp2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X34_Y5_N17
+dffeas \soc_inst|m0_1|u_logic|C3w2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|U5qvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|C3w2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C3w2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|C3w2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X17_Y5_N49
+dffeas \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Qknvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y12_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B2uvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|B2uvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Kop2z4~q & ( (\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Mjl2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B2uvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B2uvx4~0 .lut_mask = 64'h0F000F0000000000;
+defparam \soc_inst|m0_1|u_logic|B2uvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y12_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wfuwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wfuwx4~combout = ( \soc_inst|m0_1|u_logic|Lz93z4~q & ( \soc_inst|m0_1|u_logic|B2uvx4~0_combout & ( \soc_inst|m0_1|u_logic|J6i2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wfuwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wfuwx4 .lut_mask = 64'h00000000000000FF;
+defparam \soc_inst|m0_1|u_logic|Wfuwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K7pwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K7pwx4~combout = ( \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Lz93z4~q & (!\soc_inst|m0_1|u_logic|Kop2z4~q & (\soc_inst|m0_1|u_logic|J6i2z4~q & \soc_inst|m0_1|u_logic|Mjl2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|K7pwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K7pwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K7pwx4 .lut_mask = 64'h0000000000040004;
+defparam \soc_inst|m0_1|u_logic|K7pwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y12_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z0uvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z0uvx4~combout = ( \soc_inst|m0_1|u_logic|N1uvx4~combout & ( \soc_inst|m0_1|u_logic|K3l2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z0uvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z0uvx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Z0uvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y14_N13
+dffeas \soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y9_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H6tvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H6tvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Ffs2z4~q & ( (\soc_inst|m0_1|u_logic|J6i2z4~q & (\soc_inst|m0_1|u_logic|Mjl2z4~q & (!\soc_inst|m0_1|u_logic|Lz93z4~q & !\soc_inst|m0_1|u_logic|Kop2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H6tvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H6tvx4~0 .lut_mask = 64'h1000100000000000;
+defparam \soc_inst|m0_1|u_logic|H6tvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y9_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T4uvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T4uvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Lz93z4~q & ( (\soc_inst|m0_1|u_logic|Ffs2z4~q & (\soc_inst|m0_1|u_logic|Mjl2z4~q & (!\soc_inst|m0_1|u_logic|J6i2z4~q & \soc_inst|m0_1|u_logic|Kop2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T4uvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T4uvx4~0 .lut_mask = 64'h0010001000000000;
+defparam \soc_inst|m0_1|u_logic|T4uvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y11_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Txtvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Txtvx4~0_combout = (\soc_inst|m0_1|u_logic|K3l2z4~q & \soc_inst|m0_1|u_logic|T4uvx4~0_combout )
+
+ .dataa(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Txtvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Txtvx4~0 .lut_mask = 64'h0505050505050505;
+defparam \soc_inst|m0_1|u_logic|Txtvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y6_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ab9wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ab9wx4~0_combout = ( \soc_inst|m0_1|u_logic|Aok2z4~q & ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q &
+// (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ab9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ab9wx4~0 .lut_mask = 64'h0000008000000000;
+defparam \soc_inst|m0_1|u_logic|Ab9wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y3_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A1yvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|A1yvx4~0_combout = ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Tki2z4~q & ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Qem2z4~q ))) #
+// (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Qem2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|A1yvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|A1yvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A1yvx4~0 .lut_mask = 64'h4401440100000000;
+defparam \soc_inst|m0_1|u_logic|A1yvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y7_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnpvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mnpvx4~0_combout = ( \soc_inst|m0_1|u_logic|U2x2z4~q & ( ((\soc_inst|m0_1|u_logic|Icyvx4~0_combout & !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|A1yvx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|A1yvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mnpvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mnpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mnpvx4~0 .lut_mask = 64'h000000003F333F33;
+defparam \soc_inst|m0_1|u_logic|Mnpvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y7_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fmqvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fmqvx4~0_combout = ( \soc_inst|m0_1|u_logic|Yzi2z4~q & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~q & \soc_inst|m0_1|u_logic|Mnpvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Yzi2z4~q & ( ((!\soc_inst|m0_1|u_logic|Nqy2z4~q &
+// \soc_inst|m0_1|u_logic|Mnpvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Zpqvx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Mnpvx4~0_combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Zpqvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fmqvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~0 .lut_mask = 64'h22FF22FF22222222;
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y4_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dsqvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dsqvx4~combout = ( !\soc_inst|m0_1|u_logic|U2x2z4~q & ( (\soc_inst|m0_1|u_logic|C2yvx4~combout & \soc_inst|m0_1|u_logic|V1yvx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dsqvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dsqvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dsqvx4 .lut_mask = 64'h0505000005050000;
+defparam \soc_inst|m0_1|u_logic|Dsqvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y8_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Irqvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Irqvx4~0_combout = ( \soc_inst|m0_1|u_logic|Huqvx4~0_combout & ( !\soc_inst|m0_1|u_logic|O5t2z4~q ) ) # ( !\soc_inst|m0_1|u_logic|Huqvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q & (\soc_inst|m0_1|u_logic|Ffj2z4~q &
+// !\soc_inst|m0_1|u_logic|G97wx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Irqvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Irqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Irqvx4~0 .lut_mask = 64'h0A000A00AAAAAAAA;
+defparam \soc_inst|m0_1|u_logic|Irqvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y7_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Irqvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Irqvx4~1_combout = ( \soc_inst|m0_1|u_logic|Nbm2z4~q & ( \soc_inst|m0_1|u_logic|Irqvx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Irqvx4~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Irqvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Irqvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Irqvx4~1 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Irqvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y7_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fmqvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fmqvx4~1_combout = ( \soc_inst|m0_1|u_logic|Dsqvx4~combout & ( \soc_inst|m0_1|u_logic|Irqvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Dwl2z4~q ) # (!\soc_inst|m0_1|u_logic|Zoy2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dsqvx4~combout
+// & ( \soc_inst|m0_1|u_logic|Irqvx4~1_combout & ( !\soc_inst|m0_1|u_logic|Dwl2z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|Dsqvx4~combout & ( !\soc_inst|m0_1|u_logic|Irqvx4~1_combout & ( !\soc_inst|m0_1|u_logic|Zoy2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Dwl2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Dsqvx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Irqvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fmqvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~1 .lut_mask = 64'h0000F0F0AAAAFAFA;
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y7_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hhpvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hhpvx4~0_combout = ( \soc_inst|m0_1|u_logic|Fij2z4~q & ( (\soc_inst|m0_1|u_logic|Orewx4~0_combout & (!\soc_inst|m0_1|u_logic|Sgj2z4~q & !\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q )) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q & (
+// (\soc_inst|m0_1|u_logic|Orewx4~0_combout & !\soc_inst|m0_1|u_logic|Sgj2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hhpvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hhpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hhpvx4~0 .lut_mask = 64'h3030300030303000;
+defparam \soc_inst|m0_1|u_logic|Hhpvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y3_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gxxvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gxxvx4~0_combout = ( \soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Rxl2z4~q $ (!\soc_inst|m0_1|u_logic|Yzi2z4~q $ (!\soc_inst|m0_1|u_logic|Xly2z4~q $ (\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ))) ) ) #
+// ( !\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Rxl2z4~q $ (!\soc_inst|m0_1|u_logic|Yzi2z4~q $ (!\soc_inst|m0_1|u_logic|Xly2z4~q $ (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gxxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gxxvx4~0 .lut_mask = 64'h6996699696699669;
+defparam \soc_inst|m0_1|u_logic|Gxxvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y7_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ljpvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ljpvx4~0_combout = ( \soc_inst|m0_1|u_logic|Gxxvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q $ (!\soc_inst|m0_1|u_logic|Nqy2z4~q $ (!\soc_inst|m0_1|u_logic|Zoy2z4~q )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Gxxvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q $ (!\soc_inst|m0_1|u_logic|Nqy2z4~q $ (\soc_inst|m0_1|u_logic|Zoy2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ljpvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ljpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ljpvx4~0 .lut_mask = 64'h5AA55AA5A55AA55A;
+defparam \soc_inst|m0_1|u_logic|Ljpvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y3_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xipvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xipvx4~0_combout = ( \soc_inst|m0_1|u_logic|Csewx4~0_combout & ( \soc_inst|m0_1|u_logic|Dvy2z4~q & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q & (!\soc_inst|m0_1|u_logic|Swy2z4~q & \soc_inst|m0_1|u_logic|Ukpvx4~combout )) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Csewx4~0_combout & ( !\soc_inst|m0_1|u_logic|Dvy2z4~q & ( ((!\soc_inst|m0_1|u_logic|U2x2z4~q & (!\soc_inst|m0_1|u_logic|Swy2z4~q & \soc_inst|m0_1|u_logic|Ukpvx4~combout ))) # (\soc_inst|m0_1|u_logic|Vnxvx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Csewx4~0_combout & ( !\soc_inst|m0_1|u_logic|Dvy2z4~q & ( \soc_inst|m0_1|u_logic|Vnxvx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Vnxvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xipvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xipvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xipvx4~0 .lut_mask = 64'h00FF08FF00000808;
+defparam \soc_inst|m0_1|u_logic|Xipvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y6_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Onqvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Onqvx4~0_combout = ( \soc_inst|m0_1|u_logic|Xipvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Vnqvx4~0_combout $ ((((!\soc_inst|m0_1|u_logic|Ljpvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )) #
+// (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Vnqvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ljpvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xipvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Onqvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Onqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Onqvx4~0 .lut_mask = 64'h0000000039333933;
+defparam \soc_inst|m0_1|u_logic|Onqvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y4_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yplwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yplwx4~0_combout = ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Ark2z4~q & ( (\soc_inst|m0_1|u_logic|Ffj2z4~q & !\soc_inst|m0_1|u_logic|Tki2z4~q ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yplwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yplwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yplwx4~0 .lut_mask = 64'h3030000000000000;
+defparam \soc_inst|m0_1|u_logic|Yplwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y4_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vopvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vopvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Dplwx4~0_combout & ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Yplwx4~0_combout & ((!\soc_inst|m0_1|u_logic|G97wx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dplwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|G97wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Yplwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Dplwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vopvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vopvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vopvx4~0 .lut_mask = 64'hFFCC0000F0C00000;
+defparam \soc_inst|m0_1|u_logic|Vopvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y7_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fmqvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fmqvx4~2_combout = ( \soc_inst|m0_1|u_logic|Vopvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Hhpvx4~0_combout & !\soc_inst|m0_1|u_logic|Onqvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Vopvx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Hhpvx4~0_combout & (!\soc_inst|m0_1|u_logic|Onqvx4~0_combout & (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q $ (\soc_inst|m0_1|u_logic|Fzl2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Hhpvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Onqvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Vopvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fmqvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~2 .lut_mask = 64'h80408040C0C0C0C0;
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y7_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fmqvx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fmqvx4~3_combout = ( !\soc_inst|m0_1|u_logic|Fmqvx4~1_combout & ( \soc_inst|m0_1|u_logic|Fmqvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Fmqvx4~0_combout & ((\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ) #
+// (\soc_inst|m0_1|u_logic|Rxl2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Fmqvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Fmqvx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fmqvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fmqvx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~3 .lut_mask = 64'h0000000050F00000;
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y4_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rfpvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rfpvx4~0_combout = ( \soc_inst|m0_1|u_logic|Rexvx4~0_combout & ( (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Wdxvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Rexvx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|Wdxvx4~0_combout & ((!\soc_inst|m0_1|u_logic|O5t2z4~q ) # (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ))) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rfpvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~0 .lut_mask = 64'h00CF00CF000F000F;
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y7_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rfpvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rfpvx4~2_combout = ( !\soc_inst|m0_1|u_logic|O5t2z4~q & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q & ((!\soc_inst|m0_1|u_logic|Fij2z4~q & ((\soc_inst|m0_1|u_logic|Ark2z4~q ))) # (\soc_inst|m0_1|u_logic|Fij2z4~q &
+// (\soc_inst|m0_1|u_logic|Y6t2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rfpvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~2 .lut_mask = 64'h0145014500000000;
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y7_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ffxvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ffxvx4~0_combout = ( \soc_inst|m0_1|u_logic|C9yvx4~combout & ( (\soc_inst|m0_1|u_logic|O5t2z4~q & (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ffxvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ffxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ffxvx4~0 .lut_mask = 64'h0000000000050005;
+defparam \soc_inst|m0_1|u_logic|Ffxvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y7_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rfpvx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rfpvx4~3_combout = ( \soc_inst|m0_1|u_logic|Npk2z4~q & ( (!\soc_inst|m0_1|u_logic|Ffxvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Npk2z4~q & ( (!\soc_inst|m0_1|u_logic|Rfpvx4~2_combout & (!\soc_inst|m0_1|u_logic|Ffxvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Rfpvx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ffxvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rfpvx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~3 .lut_mask = 64'hC080C080F0A0F0A0;
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y4_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rfpvx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rfpvx4~4_combout = ( \soc_inst|m0_1|u_logic|Rfpvx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Xhxvx4~combout ) #
+// (\soc_inst|m0_1|u_logic|Dvy2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Xhxvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Rfpvx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rfpvx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~4 .lut_mask = 64'h00000000FEFFFEFF;
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y4_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rfpvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rfpvx4~1_combout = ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout & ( (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|O5t2z4~q & (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout & !\soc_inst|m0_1|u_logic|Tki2z4~q ))) )
+// ) # ( !\soc_inst|m0_1|u_logic|Fjewx4~1_combout & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout & ((!\soc_inst|m0_1|u_logic|O5t2z4~q ) # ((\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Tki2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rfpvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~1 .lut_mask = 64'hD0C0D0C010001000;
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y4_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G27wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G27wx4~1_combout = ( !\soc_inst|m0_1|u_logic|Dvy2z4~q & ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G27wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G27wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G27wx4~1 .lut_mask = 64'h0F0F0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|G27wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y4_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ae6wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ae6wx4~0_combout = ( \soc_inst|m0_1|u_logic|Sgj2z4~q & ( (\soc_inst|m0_1|u_logic|Qfdwx4~0_combout & !\soc_inst|m0_1|u_logic|Tki2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ae6wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ae6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ae6wx4~0 .lut_mask = 64'h000000000F000F00;
+defparam \soc_inst|m0_1|u_logic|Ae6wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y4_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bkxvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bkxvx4~1_combout = ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ae6wx4~0_combout & ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Swy2z4~q ))) #
+// (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|G27wx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Wvewx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ae6wx4~0_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|G27wx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ae6wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bkxvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bkxvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bkxvx4~1 .lut_mask = 64'hFF00FF00E400E400;
+defparam \soc_inst|m0_1|u_logic|Bkxvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y4_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bkxvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bkxvx4~2_combout = ( \soc_inst|m0_1|u_logic|Fzyvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Bkxvx4~1_combout & (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|J7swx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Fzyvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Bkxvx4~1_combout & ((!\soc_inst|m0_1|u_logic|J7swx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|J7swx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Bkxvx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fzyvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bkxvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bkxvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bkxvx4~2 .lut_mask = 64'h3232323232003200;
+defparam \soc_inst|m0_1|u_logic|Bkxvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y4_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9swx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U9swx4~0_combout = ( \soc_inst|m0_1|u_logic|Pty2z4~q ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~q & ( ((!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Dvy2z4~q )) # (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|Dvy2z4~q ) # (\soc_inst|m0_1|u_logic|Zoy2z4~q )))) # (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U9swx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U9swx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U9swx4~0 .lut_mask = 64'h7D7F7D7FFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|U9swx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y4_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S8swx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S8swx4~0_combout = ( !\soc_inst|m0_1|u_logic|Qem2z4~q & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q ) # ((!\soc_inst|m0_1|u_logic|U2x2z4~q & (((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )) #
+// (\soc_inst|m0_1|u_logic|U9swx4~0_combout )))) ) ) # ( \soc_inst|m0_1|u_logic|Qem2z4~q & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q ) # ((!\soc_inst|m0_1|u_logic|Swy2z4~q & (((!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Swy2z4~q &
+// (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|U9swx4~0_combout ))))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|U9swx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datag(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S8swx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S8swx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|S8swx4~0 .lut_mask = 64'hFAFAFFFAFABAAABA;
+defparam \soc_inst|m0_1|u_logic|S8swx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y4_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bkxvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bkxvx4~0_combout = ( \soc_inst|m0_1|u_logic|Aok2z4~q & ( (!\soc_inst|m0_1|u_logic|Mkrwx4~combout & (\soc_inst|m0_1|u_logic|O5t2z4~q & ((!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ))))
+// ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~q & ( (!\soc_inst|m0_1|u_logic|Mkrwx4~combout & ((!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Mkrwx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bkxvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bkxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bkxvx4~0 .lut_mask = 64'h8C8C8C8C008C008C;
+defparam \soc_inst|m0_1|u_logic|Bkxvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y4_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bkxvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bkxvx4~combout = ( \soc_inst|m0_1|u_logic|X3xvx4~1_combout & ( \soc_inst|m0_1|u_logic|Bkxvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Bkxvx4~2_combout & ((!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ) #
+// (\soc_inst|m0_1|u_logic|S8swx4~0_combout ))) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Bkxvx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|S8swx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|X3xvx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Bkxvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bkxvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bkxvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bkxvx4 .lut_mask = 64'h0000000000003033;
+defparam \soc_inst|m0_1|u_logic|Bkxvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y4_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rfpvx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rfpvx4~5_combout = ( \soc_inst|interconnect_1|HREADY~0_combout & ( ((!\soc_inst|m0_1|u_logic|Rfpvx4~4_combout ) # ((!\soc_inst|m0_1|u_logic|Bkxvx4~combout ) # (\soc_inst|m0_1|u_logic|Rfpvx4~1_combout ))) #
+// (\soc_inst|m0_1|u_logic|Rfpvx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rfpvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Rfpvx4~4_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Rfpvx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Bkxvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~5 .lut_mask = 64'h00000000FFDFFFDF;
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y7_N13
+dffeas \soc_inst|m0_1|u_logic|Fzl2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Fmqvx4~3_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fzl2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fzl2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y8_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ejawx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ejawx4~0_combout = ( \soc_inst|m0_1|u_logic|Y29wx4~combout & ( (!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout & \soc_inst|m0_1|u_logic|Fzl2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Y29wx4~combout & (
+// !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ejawx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ejawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ejawx4~0 .lut_mask = 64'hF0F0F0F000F000F0;
+defparam \soc_inst|m0_1|u_logic|Ejawx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y6_N13
+dffeas \soc_inst|m0_1|u_logic|Zgr2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Zgr2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zgr2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zgr2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y10_N49
+dffeas \soc_inst|m0_1|u_logic|Cc73z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Cc73z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cc73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cc73z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y10_N28
+dffeas \soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y10_N26
+dffeas \soc_inst|m0_1|u_logic|Sa23z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Sa23z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sa23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sa23z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y10_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ze1wx4~6_combout = ( \soc_inst|m0_1|u_logic|Sa23z4~q & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~q &
+// \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sa23z4~q & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~q &
+// \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sa23z4~q & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~q & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sa23z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ze1wx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~6 .lut_mask = 64'h00C0000000800080;
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y9_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qc1xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qc1xx4~0_combout = ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|T1d3z4~q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Yaz2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qc1xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qc1xx4~0 .lut_mask = 64'h000000000A0A0000;
+defparam \soc_inst|m0_1|u_logic|Qc1xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z9dwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z9dwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Sgj2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z9dwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z9dwx4~0 .lut_mask = 64'h00000000FFFF0000;
+defparam \soc_inst|m0_1|u_logic|Z9dwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y8_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jk0xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jk0xx4~0_combout = ( \soc_inst|m0_1|u_logic|Z9dwx4~0_combout & ( (\soc_inst|m0_1|u_logic|B73wx4~combout & \soc_inst|m0_1|u_logic|Nsk2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jk0xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jk0xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jk0xx4~0 .lut_mask = 64'h0000000005050505;
+defparam \soc_inst|m0_1|u_logic|Jk0xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y3_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xkfwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xkfwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Npk2z4~q & ( !\soc_inst|m0_1|u_logic|O5t2z4~q & ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xkfwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xkfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xkfwx4~0 .lut_mask = 64'h00FF000000000000;
+defparam \soc_inst|m0_1|u_logic|Xkfwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y3_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kryvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kryvx4~0_combout = ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout & ( \soc_inst|m0_1|u_logic|A4c2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~q ) # ((\soc_inst|m0_1|u_logic|Fij2z4~q & \soc_inst|m0_1|u_logic|Xkfwx4~0_combout )) )
+// ) ) # ( !\soc_inst|m0_1|u_logic|Sy2wx4~0_combout & ( \soc_inst|m0_1|u_logic|A4c2z4~0_combout & ( (\soc_inst|m0_1|u_logic|Fij2z4~q & \soc_inst|m0_1|u_logic|Xkfwx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|A4c2z4~0_combout & ( (\soc_inst|m0_1|u_logic|Fij2z4~q & \soc_inst|m0_1|u_logic|Xkfwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sy2wx4~0_combout & ( !\soc_inst|m0_1|u_logic|A4c2z4~0_combout & (
+// (\soc_inst|m0_1|u_logic|Fij2z4~q & \soc_inst|m0_1|u_logic|Xkfwx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Xkfwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|A4c2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kryvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kryvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kryvx4~0 .lut_mask = 64'h111111111111F1F1;
+defparam \soc_inst|m0_1|u_logic|Kryvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y8_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aj0xx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Aj0xx4~combout = ( \soc_inst|m0_1|u_logic|Kryvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Jk0xx4~0_combout & (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ))) #
+// (\soc_inst|m0_1|u_logic|Jk0xx4~0_combout & ((!\soc_inst|m0_1|u_logic|Yg2wx4~combout ) # ((!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Kryvx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|Jk0xx4~0_combout & !\soc_inst|m0_1|u_logic|Yg2wx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Jk0xx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yg2wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Kryvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Aj0xx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Aj0xx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aj0xx4 .lut_mask = 64'h550055005D0C5D0C;
+defparam \soc_inst|m0_1|u_logic|Aj0xx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y8_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ujqvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ujqvx4~0_combout = ( \soc_inst|m0_1|u_logic|Zhyvx4~combout & ( \soc_inst|m0_1|u_logic|Kryvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Z9dwx4~0_combout & (!\soc_inst|m0_1|u_logic|H3d3z4~q & (\soc_inst|m0_1|u_logic|B73wx4~combout &
+// \soc_inst|m0_1|u_logic|Aj0xx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zhyvx4~combout & ( \soc_inst|m0_1|u_logic|Kryvx4~0_combout & ( \soc_inst|m0_1|u_logic|Aj0xx4~combout ) ) ) # ( \soc_inst|m0_1|u_logic|Zhyvx4~combout & (
+// !\soc_inst|m0_1|u_logic|Kryvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Z9dwx4~0_combout & (!\soc_inst|m0_1|u_logic|H3d3z4~q & (\soc_inst|m0_1|u_logic|B73wx4~combout & \soc_inst|m0_1|u_logic|Aj0xx4~combout ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Zhyvx4~combout & ( !\soc_inst|m0_1|u_logic|Kryvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Z9dwx4~0_combout & (!\soc_inst|m0_1|u_logic|H3d3z4~q & (\soc_inst|m0_1|u_logic|B73wx4~combout & \soc_inst|m0_1|u_logic|Aj0xx4~combout )))
+// ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Aj0xx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kryvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ujqvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ujqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ujqvx4~0 .lut_mask = 64'h0004000400FF0004;
+defparam \soc_inst|m0_1|u_logic|Ujqvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y10_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gjqvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gjqvx4~0_combout = (\soc_inst|m0_1|u_logic|Thm2z4~q & !\soc_inst|m0_1|u_logic|Aj0xx4~combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Thm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Aj0xx4~combout ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gjqvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gjqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gjqvx4~0 .lut_mask = 64'h0F000F000F000F00;
+defparam \soc_inst|m0_1|u_logic|Gjqvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y10_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xdnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xdnvx4~0_combout = ( \soc_inst|m0_1|u_logic|Thm2z4~q & ( \soc_inst|m0_1|u_logic|Gjqvx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|Thm2z4~q & ( \soc_inst|m0_1|u_logic|Gjqvx4~0_combout ) ) # ( \soc_inst|m0_1|u_logic|Thm2z4~q & (
+// !\soc_inst|m0_1|u_logic|Gjqvx4~0_combout & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|Ujqvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Thm2z4~q & ( !\soc_inst|m0_1|u_logic|Gjqvx4~0_combout & (
+// (\soc_inst|interconnect_1|HREADY~0_combout & \soc_inst|m0_1|u_logic|Ujqvx4~0_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ujqvx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Thm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Gjqvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xdnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xdnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xdnvx4~0 .lut_mask = 64'h0303CFCFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Xdnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X22_Y10_N1
+dffeas \soc_inst|m0_1|u_logic|Thm2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Xdnvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Thm2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Thm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Thm2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y10_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G5qvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G5qvx4~0_combout = ( \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Ez8wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Thm2z4~q & (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Ez8wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q & (((\soc_inst|m0_1|u_logic|Thm2z4~q &
+// \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Thm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ez8wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G5qvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G5qvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G5qvx4~0 .lut_mask = 64'h000000000A3A0030;
+defparam \soc_inst|m0_1|u_logic|G5qvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y7_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfd2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kfd2z4~0_combout = ( !\soc_inst|m0_1|u_logic|Npk2z4~q & ( (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Nsk2z4~q & (\soc_inst|m0_1|u_logic|Aok2z4~q & \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kfd2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kfd2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kfd2z4~0 .lut_mask = 64'h0004000400000000;
+defparam \soc_inst|m0_1|u_logic|Kfd2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y5_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dfd2z4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dfd2z4~combout = ( \soc_inst|m0_1|u_logic|Pcyvx4~combout & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # ((!\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ) # (\soc_inst|m0_1|u_logic|L8t2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Pcyvx4~combout
+// )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dfd2z4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dfd2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dfd2z4 .lut_mask = 64'hFFFFFFFFFFAFFFAF;
+defparam \soc_inst|m0_1|u_logic|Dfd2z4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y8_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qobwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qobwx4~0_combout = ( \soc_inst|m0_1|u_logic|Q77wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Aok2z4~q & (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Xx2wx4~combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Q77wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qobwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qobwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qobwx4~0 .lut_mask = 64'h0000000000300030;
+defparam \soc_inst|m0_1|u_logic|Qobwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y7_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R29wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R29wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Qobwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qobwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R29wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R29wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R29wx4~0 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|R29wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y9_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E1bvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|E1bvx4~combout = ( \soc_inst|m0_1|u_logic|R29wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Wzawx4~combout $ (((\soc_inst|m0_1|u_logic|W19wx4~0_combout & !\soc_inst|m0_1|u_logic|Zhyvx4~combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|R29wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Wzawx4~combout $ (((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|W19wx4~0_combout & !\soc_inst|m0_1|u_logic|Zhyvx4~combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|R29wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|E1bvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E1bvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E1bvx4 .lut_mask = 64'h4B5A4B5AC3F0C3F0;
+defparam \soc_inst|m0_1|u_logic|E1bvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y7_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zznvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zznvx4~0_combout = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Aok2z4~q & (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zznvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zznvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zznvx4~0 .lut_mask = 64'h0000000000100010;
+defparam \soc_inst|m0_1|u_logic|Zznvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y6_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vxnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vxnvx4~0_combout = ( !\soc_inst|m0_1|u_logic|T3ovx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Fzcwx4~0_combout & ((!\soc_inst|m0_1|u_logic|H4ovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fzcwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|H4ovx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|T3ovx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vxnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vxnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vxnvx4~0 .lut_mask = 64'hF030F03000000000;
+defparam \soc_inst|m0_1|u_logic|Vxnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y13_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q8rwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q8rwx4~0_combout = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # (!\soc_inst|m0_1|u_logic|Aok2z4~q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # ((!\soc_inst|m0_1|u_logic|Tki2z4~q ) # (\soc_inst|m0_1|u_logic|Npk2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q8rwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q8rwx4~0 .lut_mask = 64'hFFAFEEEE00000000;
+defparam \soc_inst|m0_1|u_logic|Q8rwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y13_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R7iwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R7iwx4~1_combout = ( !\soc_inst|m0_1|u_logic|R7iwx4~0_combout & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout & !\soc_inst|m0_1|u_logic|B8nwx4~1_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|R7iwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R7iwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R7iwx4~1 .lut_mask = 64'hAAAA0000A0A00000;
+defparam \soc_inst|m0_1|u_logic|R7iwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y8_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fhc2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fhc2z4~0_combout = ( !\soc_inst|m0_1|u_logic|Npk2z4~q & ( \soc_inst|m0_1|u_logic|Ffj2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fhc2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fhc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fhc2z4~0 .lut_mask = 64'h00000000FFFF0000;
+defparam \soc_inst|m0_1|u_logic|Fhc2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zqpvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zqpvx4~2_combout = ( !\soc_inst|m0_1|u_logic|Akewx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Fhc2z4~0_combout ) # (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fhc2z4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Akewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zqpvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~2 .lut_mask = 64'hFF0FFF0F00000000;
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y11_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zqpvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zqpvx4~0_combout = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & (
+// (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & (((\soc_inst|m0_1|u_logic|Aok2z4~q & \soc_inst|m0_1|u_logic|Ffj2z4~q )) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zqpvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~0 .lut_mask = 64'h5700570055005500;
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y11_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zqpvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zqpvx4~1_combout = ( !\soc_inst|m0_1|u_logic|Zqpvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Xx2wx4~combout ) # ((\soc_inst|m0_1|u_logic|Fij2z4~q & !\soc_inst|m0_1|u_logic|Sy2wx4~0_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Zqpvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zqpvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~1 .lut_mask = 64'hCFCCCFCC00000000;
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y7_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P37wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P37wx4~1_combout = ( !\soc_inst|m0_1|u_logic|Ark2z4~q & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q & (!\soc_inst|m0_1|u_logic|Nsk2z4~q & (!\soc_inst|m0_1|u_logic|Emi2z4~q & (\soc_inst|m0_1|u_logic|Tki2z4~q &
+// \soc_inst|m0_1|u_logic|Aok2z4~q )))) ) ) # ( \soc_inst|m0_1|u_logic|Ark2z4~q & ( ((\soc_inst|m0_1|u_logic|Tki2z4~q & ((!\soc_inst|m0_1|u_logic|X77wx4~combout ) # ((!\soc_inst|m0_1|u_logic|Nsk2z4~q & \soc_inst|m0_1|u_logic|Aok2z4~q ))))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datag(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|P37wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P37wx4~1 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|P37wx4~1 .lut_mask = 64'h000000F0004000FC;
+defparam \soc_inst|m0_1|u_logic|P37wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y8_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wxcwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wxcwx4~0_combout = ( \soc_inst|m0_1|u_logic|Aok2z4~q & ( !\soc_inst|m0_1|u_logic|Fij2z4~q ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wxcwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wxcwx4~0 .lut_mask = 64'h00000000CCCCCCCC;
+defparam \soc_inst|m0_1|u_logic|Wxcwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P37wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P37wx4~0_combout = ( \soc_inst|m0_1|u_logic|Wxcwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout & (!\soc_inst|m0_1|u_logic|P37wx4~1_combout & ((!\soc_inst|m0_1|u_logic|Xx2wx4~combout ) #
+// (!\soc_inst|m0_1|u_logic|Pmgwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Wxcwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|P37wx4~1_combout & ((!\soc_inst|m0_1|u_logic|Xx2wx4~combout ) # (!\soc_inst|m0_1|u_logic|Pmgwx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Pmgwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|P37wx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|P37wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P37wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P37wx4~0 .lut_mask = 64'hFC00FC00A800A800;
+defparam \soc_inst|m0_1|u_logic|P37wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zqpvx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zqpvx4~3_combout = ( \soc_inst|m0_1|u_logic|P37wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Zqpvx4~2_combout & (!\soc_inst|m0_1|u_logic|Tki2z4~q & ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) #
+// (\soc_inst|m0_1|u_logic|Zqpvx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Zqpvx4~2_combout & (((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Zqpvx4~1_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Zqpvx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Zqpvx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|P37wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zqpvx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~3 .lut_mask = 64'h00000000F351F351;
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y8_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K0qvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K0qvx4~combout = ( \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Kryvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q & (
+// \soc_inst|m0_1|u_logic|Kryvx4~0_combout ) ) # ( \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Kryvx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Kryvx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kryvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|K0qvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K0qvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K0qvx4 .lut_mask = 64'hFFFFFFFFFFFFF0F0;
+defparam \soc_inst|m0_1|u_logic|K0qvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y13_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wspvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wspvx4~combout = ( \soc_inst|m0_1|u_logic|K0qvx4~combout & ( \soc_inst|m0_1|u_logic|X4pvx4~combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|K0qvx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wspvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wspvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wspvx4 .lut_mask = 64'h000000000000FFFF;
+defparam \soc_inst|m0_1|u_logic|Wspvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y11_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lqpvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lqpvx4~0_combout = ( \soc_inst|interconnect_1|HREADY~0_combout & ( (!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout ) # (!\soc_inst|m0_1|u_logic|Wspvx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Wspvx4~combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lqpvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lqpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lqpvx4~0 .lut_mask = 64'h00000000FCFCFCFC;
+defparam \soc_inst|m0_1|u_logic|Lqpvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y8_N20
+dffeas \soc_inst|m0_1|u_logic|G4r2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|G4r2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G4r2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G4r2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y8_N47
+dffeas \soc_inst|m0_1|u_logic|K0u2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|K0u2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K0u2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K0u2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y8_N1
+dffeas \soc_inst|m0_1|u_logic|T583z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|T583z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T583z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T583z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y8_N56
+dffeas \soc_inst|m0_1|u_logic|Kw63z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Kw63z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kw63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kw63z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y8_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ixxwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ixxwx4~1_combout = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Svk2z4~q & ( !\soc_inst|m0_1|u_logic|T583z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Svk2z4~q &
+// ( !\soc_inst|m0_1|u_logic|K0u2z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Svk2z4~q & ( !\soc_inst|m0_1|u_logic|Kw63z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Svk2z4~q
+// & ( !\soc_inst|m0_1|u_logic|G4r2z4~DUPLICATE_q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|G4r2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|K0u2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|T583z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Kw63z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ixxwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ixxwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ixxwx4~1 .lut_mask = 64'hAAAAFF00CCCCF0F0;
+defparam \soc_inst|m0_1|u_logic|Ixxwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X39_Y8_N38
+dffeas \soc_inst|m0_1|u_logic|S2r2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|S2r2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S2r2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|S2r2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X40_Y8_N20
+dffeas \soc_inst|m0_1|u_logic|T9v2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|T9v2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T9v2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T9v2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X40_Y6_N5
+dffeas \soc_inst|m0_1|u_logic|E1r2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|E1r2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E1r2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|E1r2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X40_Y8_N8
+dffeas \soc_inst|m0_1|u_logic|Ka93z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ka93z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ka93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ka93z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y8_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ixxwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ixxwx4~0_combout = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Ka93z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (
+// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|E1r2z4~DUPLICATE_q ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|T9v2z4~q ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|S2r2z4~DUPLICATE_q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|S2r2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|T9v2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|E1r2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ka93z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ixxwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ixxwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ixxwx4~0 .lut_mask = 64'hAAAACCCCF0F0FF00;
+defparam \soc_inst|m0_1|u_logic|Ixxwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y8_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ixxwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ixxwx4~combout = ( \soc_inst|m0_1|u_logic|Ixxwx4~1_combout & ( \soc_inst|m0_1|u_logic|Ixxwx4~0_combout & ( \soc_inst|m0_1|u_logic|T1d3z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Ixxwx4~1_combout & (
+// \soc_inst|m0_1|u_logic|Ixxwx4~0_combout & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ixxwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Ixxwx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|T1d3z4~q & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ixxwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ixxwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ixxwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ixxwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ixxwx4 .lut_mask = 64'h00000F00000F0F0F;
+defparam \soc_inst|m0_1|u_logic|Ixxwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y11_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Svxwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Svxwx4~0_combout = ( \soc_inst|m0_1|u_logic|Ixxwx4~combout & ( (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q & (((\soc_inst|m0_1|u_logic|Sy2wx4~0_combout & !\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q )) #
+// (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Ixxwx4~combout & ( (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout & (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ixxwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Svxwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Svxwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Svxwx4~0 .lut_mask = 64'h4040404040CC40CC;
+defparam \soc_inst|m0_1|u_logic|Svxwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y11_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vy7wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vy7wx4~0_combout = ( \soc_inst|m0_1|u_logic|Mzxwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Svxwx4~0_combout $ (((\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ))))) ) ) # ( !\soc_inst|m0_1|u_logic|Mzxwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q $ (\soc_inst|m0_1|u_logic|Svxwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svxwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vy7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vy7wx4~0 .lut_mask = 64'hF00FF00FF807F807;
+defparam \soc_inst|m0_1|u_logic|Vy7wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S1ewx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S1ewx4~0_combout = ( \soc_inst|m0_1|u_logic|Pkwwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S1ewx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S1ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S1ewx4~0 .lut_mask = 64'h0000F0F000000000;
+defparam \soc_inst|m0_1|u_logic|S1ewx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y12_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W6iwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|W6iwx4~combout = ( \soc_inst|m0_1|u_logic|S1ewx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout & \soc_inst|m0_1|u_logic|E6nwx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|S1ewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W6iwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W6iwx4 .lut_mask = 64'h0000000000F000F0;
+defparam \soc_inst|m0_1|u_logic|W6iwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y11_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tecwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tecwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Aok2z4~q &
+// (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tecwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tecwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tecwx4~0 .lut_mask = 64'h0002000000000000;
+defparam \soc_inst|m0_1|u_logic|Tecwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X36_Y8_N14
+dffeas \soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Kghvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4bwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z4bwx4~2_combout = ( !\soc_inst|m0_1|u_logic|Aok2z4~q & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # ((!\soc_inst|m0_1|u_logic|Tki2z4~q &
+// !\soc_inst|m0_1|u_logic|Npk2z4~q )))) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Tki2z4~q & (!\soc_inst|m0_1|u_logic|Npk2z4~q ))))) ) ) # ( \soc_inst|m0_1|u_logic|Aok2z4~q & ( ((!\soc_inst|m0_1|u_logic|Tki2z4~q &
+// (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Fij2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datag(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z4bwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z4bwx4~2 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Z4bwx4~2 .lut_mask = 64'h00EA000C00C00000;
+defparam \soc_inst|m0_1|u_logic|Z4bwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4bwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z4bwx4~0_combout = ( \soc_inst|m0_1|u_logic|Aok2z4~q & ( \soc_inst|m0_1|u_logic|Npk2z4~q & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q & !\soc_inst|m0_1|u_logic|Ffj2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~q & (
+// \soc_inst|m0_1|u_logic|Npk2z4~q & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q & ((!\soc_inst|m0_1|u_logic|Ffj2z4~q ) # (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Aok2z4~q & ( !\soc_inst|m0_1|u_logic|Npk2z4~q & (
+// (!\soc_inst|m0_1|u_logic|O5t2z4~q & !\soc_inst|m0_1|u_logic|Ffj2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~q & ( !\soc_inst|m0_1|u_logic|Npk2z4~q & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q & !\soc_inst|m0_1|u_logic|Ffj2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z4bwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z4bwx4~0 .lut_mask = 64'hF000F000CC44CC00;
+defparam \soc_inst|m0_1|u_logic|Z4bwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y4_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I4dwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|I4dwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Y5dwx4~0_combout & ( \soc_inst|m0_1|u_logic|Uwyvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ucqvx4~combout & ((!\soc_inst|m0_1|u_logic|W4dwx4~1_combout ) #
+// (\soc_inst|m0_1|u_logic|W4dwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y5dwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Uwyvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|W4dwx4~1_combout ) # (\soc_inst|m0_1|u_logic|W4dwx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|W4dwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|W4dwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Y5dwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Uwyvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|I4dwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I4dwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I4dwx4~0 .lut_mask = 64'hF0FF0000A0AA0000;
+defparam \soc_inst|m0_1|u_logic|I4dwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y11_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Afcwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Afcwx4~0_combout = ( \soc_inst|m0_1|u_logic|I4dwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Uup2z4~q & ((\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Z4bwx4~2_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|I4dwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Uup2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Z4bwx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Uup2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|I4dwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Afcwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Afcwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Afcwx4~0 .lut_mask = 64'hF000F00070007000;
+defparam \soc_inst|m0_1|u_logic|Afcwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ydcwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ydcwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Afcwx4~0_combout & ( \soc_inst|m0_1|u_logic|Eo5wx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Tecwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Afcwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Eo5wx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Tecwx4~0_combout & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) # (\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tecwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Afcwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ydcwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ydcwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ydcwx4~0 .lut_mask = 64'h8A0000008A8A0000;
+defparam \soc_inst|m0_1|u_logic|Ydcwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X37_Y4_N58
+dffeas \soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Qnkvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y9_N9
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[8]~5 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[8]~5_combout = ( !\soc_inst|switches_1|half_word_address [1] & ( \soc_inst|switches_1|read_enable~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|switches_1|read_enable~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|switches_1|half_word_address [1]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[8]~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[8]~5 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[8]~5 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|interconnect_1|HRDATA[8]~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y9_N51
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[7]~9 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[7]~9_combout = ( \soc_inst|interconnect_1|HRDATA[8]~5_combout & ( (!\soc_inst|interconnect_1|mux_sel [2] & ((!\soc_inst|interconnect_1|mux_sel [1]) # ((!\soc_inst|switches_1|half_word_address [0] &
+// !\soc_inst|interconnect_1|mux_sel [0])))) ) ) # ( !\soc_inst|interconnect_1|HRDATA[8]~5_combout & ( (!\soc_inst|interconnect_1|mux_sel [2] & !\soc_inst|interconnect_1|mux_sel [1]) ) )
+
+ .dataa(!\soc_inst|interconnect_1|mux_sel [2]),
+ .datab(!\soc_inst|interconnect_1|mux_sel [1]),
+ .datac(!\soc_inst|switches_1|half_word_address [0]),
+ .datad(!\soc_inst|interconnect_1|mux_sel [0]),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[8]~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[7]~9_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[7]~9 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[7]~9 .lut_mask = 64'h88888888A888A888;
+defparam \soc_inst|interconnect_1|HRDATA[7]~9 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y9_N30
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[7]~10 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[7]~10_combout = ( \soc_inst|interconnect_1|HRDATA[7]~9_combout & ( ((\soc_inst|ram_1|read_cycle~q & (\soc_inst|ram_1|byte_select [0] & \soc_inst|interconnect_1|mux_sel [0]))) # (\soc_inst|interconnect_1|mux_sel [1]) ) )
+
+ .dataa(!\soc_inst|ram_1|read_cycle~q ),
+ .datab(!\soc_inst|interconnect_1|mux_sel [1]),
+ .datac(!\soc_inst|ram_1|byte_select [0]),
+ .datad(!\soc_inst|interconnect_1|mux_sel [0]),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[7]~9_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[7]~10_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[7]~10 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[7]~10 .lut_mask = 64'h0000000033373337;
+defparam \soc_inst|interconnect_1|HRDATA[7]~10 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: IOIBUF_X20_Y0_N52
+cyclonev_io_ibuf \SW[4]~input (
+ .i(SW[4]),
+ .ibar(gnd),
+ .dynamicterminationcontrol(gnd),
+ .o(\SW[4]~input_o ));
+// synopsys translate_off
+defparam \SW[4]~input .bus_hold = "false";
+defparam \SW[4]~input .simulate_z_as = "z";
+// synopsys translate_on
+
+// Location: FF_X25_Y9_N35
+dffeas \soc_inst|switches_1|switch_store[0][4] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\SW[4]~input_o ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|switches_1|always0~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|switches_1|switch_store[0][4]~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[0][4] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[0][4] .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y9_N33
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[4]~23 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[4]~23_combout = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout & ( (\soc_inst|interconnect_1|HRDATA[7]~10_combout & ((!\soc_inst|interconnect_1|Equal1~0_combout ) #
+// (\soc_inst|switches_1|switch_store[0][4]~q ))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout & ( (\soc_inst|interconnect_1|Equal1~0_combout & (\soc_inst|interconnect_1|HRDATA[7]~10_combout &
+// \soc_inst|switches_1|switch_store[0][4]~q )) ) )
+
+ .dataa(!\soc_inst|interconnect_1|Equal1~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|interconnect_1|HRDATA[7]~10_combout ),
+ .datad(!\soc_inst|switches_1|switch_store[0][4]~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[4]~23_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[4]~23 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[4]~23 .lut_mask = 64'h000500050A0F0A0F;
+defparam \soc_inst|interconnect_1|HRDATA[4]~23 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y13_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mis2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mis2z4~0_combout = ( !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mis2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mis2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mis2z4~0 .lut_mask = 64'hFFFFFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Mis2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y10_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T2owx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T2owx4~0_combout = ( \soc_inst|m0_1|u_logic|J6i2z4~q & ( \soc_inst|m0_1|u_logic|Kop2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|T2owx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T2owx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T2owx4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|T2owx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qwowx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qwowx4~combout = ( \soc_inst|m0_1|u_logic|T2owx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Mjl2z4~q & \soc_inst|m0_1|u_logic|Lz93z4~q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|T2owx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qwowx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qwowx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qwowx4 .lut_mask = 64'h00000000000C000C;
+defparam \soc_inst|m0_1|u_logic|Qwowx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vytvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vytvx4~combout = (\soc_inst|m0_1|u_logic|Qwowx4~combout & \soc_inst|m0_1|u_logic|K3l2z4~q )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vytvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vytvx4 .lut_mask = 64'h000F000F000F000F;
+defparam \soc_inst|m0_1|u_logic|Vytvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y13_N11
+dffeas \soc_inst|m0_1|u_logic|Mis2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mis2z4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Mis2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mis2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mis2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y9_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ts5wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ts5wx4~0_combout = ( \soc_inst|m0_1|u_logic|Lz93z4~q & ( (!\soc_inst|m0_1|u_logic|Ffs2z4~q & (\soc_inst|m0_1|u_logic|Mjl2z4~q & !\soc_inst|m0_1|u_logic|Kop2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ts5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ts5wx4~0 .lut_mask = 64'h000000000A000A00;
+defparam \soc_inst|m0_1|u_logic|Ts5wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y12_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9ovx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D9ovx4~combout = ( \soc_inst|m0_1|u_logic|K3l2z4~q & ( (!\soc_inst|m0_1|u_logic|J6i2z4~q & \soc_inst|m0_1|u_logic|Ts5wx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D9ovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D9ovx4 .lut_mask = 64'h0000000000AA00AA;
+defparam \soc_inst|m0_1|u_logic|D9ovx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y14_N14
+dffeas \soc_inst|m0_1|u_logic|R1w2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Ocnvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|R1w2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R1w2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|R1w2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X29_Y14_N44
+dffeas \soc_inst|m0_1|u_logic|Trq2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Pamvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Trq2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Trq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Trq2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y6_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ijcwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ijcwx4~0_combout = ( \soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ) # ( !\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Y29wx4~combout & !\soc_inst|m0_1|u_logic|Pm9wx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Pm9wx4~0_combout ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ijcwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ijcwx4~0 .lut_mask = 64'h88888888FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ijcwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C8rwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C8rwx4~0_combout = ( \soc_inst|m0_1|u_logic|Vy7wx4~0_combout & ( (\soc_inst|m0_1|u_logic|E6nwx4~0_combout & (!\soc_inst|m0_1|u_logic|Manwx4~0_combout & !\soc_inst|m0_1|u_logic|Pkwwx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C8rwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C8rwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C8rwx4~0 .lut_mask = 64'h0000000050005000;
+defparam \soc_inst|m0_1|u_logic|C8rwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V9iwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|V9iwx4~0_combout = ( \soc_inst|m0_1|u_logic|C8rwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|E6nwx4~0_combout & \soc_inst|m0_1|u_logic|X77wx4~combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|C8rwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout & \soc_inst|m0_1|u_logic|X77wx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|C8rwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V9iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V9iwx4~0 .lut_mask = 64'h00AA00AAF0FAF0FA;
+defparam \soc_inst|m0_1|u_logic|V9iwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y9_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lcowx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lcowx4~0_combout = ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q & (((\soc_inst|m0_1|u_logic|Aok2z4~q & \soc_inst|m0_1|u_logic|Npk2z4~q )) # (\soc_inst|m0_1|u_logic|Qxc2z4~combout )))
+// ) ) # ( !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Qxc2z4~combout ) # (\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Qxc2z4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lcowx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lcowx4~0 .lut_mask = 64'h50F050F010F010F0;
+defparam \soc_inst|m0_1|u_logic|Lcowx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y14_N38
+dffeas \soc_inst|m0_1|u_logic|G0w2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Acnvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|G0w2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G0w2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G0w2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y11_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qppvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qppvx4~0_combout = ( \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Ez8wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|G0w2z4~q & !\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Ez8wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Nen2z4~q & !\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nen2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ez8wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qppvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qppvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qppvx4~0 .lut_mask = 64'h000000005500C0C0;
+defparam \soc_inst|m0_1|u_logic|Qppvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y4_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Muawx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Muawx4~0_combout = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q & ((!\soc_inst|m0_1|u_logic|Emi2z4~q ) # ((\soc_inst|m0_1|u_logic|O5t2z4~q &
+// \soc_inst|m0_1|u_logic|Nsk2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|O5t2z4~q & (!\soc_inst|m0_1|u_logic|Aok2z4~q & \soc_inst|m0_1|u_logic|Nsk2z4~q )) ) ) )
+// # ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q & ((!\soc_inst|m0_1|u_logic|Emi2z4~q ) # ((\soc_inst|m0_1|u_logic|O5t2z4~q & \soc_inst|m0_1|u_logic|Nsk2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Muawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Muawx4~0 .lut_mask = 64'h0000CC040404CC04;
+defparam \soc_inst|m0_1|u_logic|Muawx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y9_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U09wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U09wx4~0_combout = ( \soc_inst|m0_1|u_logic|W19wx4~0_combout & ( \soc_inst|m0_1|u_logic|Htyvx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q & ((!\soc_inst|m0_1|u_logic|R29wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Yzi2z4~q
+// & \soc_inst|m0_1|u_logic|Y29wx4~combout )))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q & (!\soc_inst|m0_1|u_logic|Yzi2z4~q & ((\soc_inst|m0_1|u_logic|Y29wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W19wx4~0_combout & (
+// \soc_inst|m0_1|u_logic|Htyvx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q & ((!\soc_inst|m0_1|u_logic|R29wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Yzi2z4~q & \soc_inst|m0_1|u_logic|Y29wx4~combout )))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q &
+// (!\soc_inst|m0_1|u_logic|Yzi2z4~q & ((\soc_inst|m0_1|u_logic|Y29wx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|W19wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Htyvx4~3_combout ) ) # ( !\soc_inst|m0_1|u_logic|W19wx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Htyvx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q & ((!\soc_inst|m0_1|u_logic|R29wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Yzi2z4~q & \soc_inst|m0_1|u_logic|Y29wx4~combout )))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q &
+// (!\soc_inst|m0_1|u_logic|Yzi2z4~q & ((\soc_inst|m0_1|u_logic|Y29wx4~combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|R29wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U09wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U09wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U09wx4~0 .lut_mask = 64'hA0ECFFFFA0ECA0EC;
+defparam \soc_inst|m0_1|u_logic|U09wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y10_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Otcwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Otcwx4~0_combout = ( \soc_inst|m0_1|u_logic|Pcyvx4~combout & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) #
+// (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Pcyvx4~combout & ( (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout & (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Otcwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Otcwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Otcwx4~0 .lut_mask = 64'h50005000500F500F;
+defparam \soc_inst|m0_1|u_logic|Otcwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y10_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuawx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fuawx4~0_combout = ( !\soc_inst|m0_1|u_logic|Otcwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Jucwx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Otcwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Jucwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fuawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fuawx4~0 .lut_mask = 64'hFFF5000000000000;
+defparam \soc_inst|m0_1|u_logic|Fuawx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y6_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuawx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fuawx4~1_combout = ( \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout & ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q & (
+// \soc_inst|m0_1|u_logic|Mgd2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Fuawx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fuawx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fuawx4~1 .lut_mask = 64'hCCCC0000FCFCF0F0;
+defparam \soc_inst|m0_1|u_logic|Fuawx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y9_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lz8wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lz8wx4~0_combout = ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( \soc_inst|m0_1|u_logic|X8zvx4~combout & ( (!\soc_inst|m0_1|u_logic|Punvx4~4_combout & (!\soc_inst|m0_1|u_logic|Wzawx4~combout $
+// (!\soc_inst|m0_1|u_logic|U09wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( \soc_inst|m0_1|u_logic|X8zvx4~combout & ( (!\soc_inst|m0_1|u_logic|Punvx4~4_combout & (!\soc_inst|m0_1|u_logic|Wzawx4~combout $
+// (((!\soc_inst|m0_1|u_logic|U09wx4~0_combout ))))) # (\soc_inst|m0_1|u_logic|Punvx4~4_combout & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout & (!\soc_inst|m0_1|u_logic|Wzawx4~combout $ (\soc_inst|m0_1|u_logic|U09wx4~0_combout )))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( !\soc_inst|m0_1|u_logic|X8zvx4~combout & ( !\soc_inst|m0_1|u_logic|Punvx4~4_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( !\soc_inst|m0_1|u_logic|X8zvx4~combout & (
+// (!\soc_inst|m0_1|u_logic|Punvx4~4_combout ) # ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout $ (!\soc_inst|m0_1|u_logic|U09wx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Punvx4~4_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|U09wx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lz8wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lz8wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lz8wx4~0 .lut_mask = 64'hFBFEAAAA62982288;
+defparam \soc_inst|m0_1|u_logic|Lz8wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y9_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qppvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qppvx4~1_combout = ( \soc_inst|m0_1|u_logic|Lz8wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Qppvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Add5~93_sumout ) # (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ))) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Add5~93_sumout ),
+ .datac(!\soc_inst|m0_1|u_logic|Qppvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Lz8wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qppvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qppvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qppvx4~1 .lut_mask = 64'h00000000C0F0C0F0;
+defparam \soc_inst|m0_1|u_logic|Qppvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D31wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D31wx4~0_combout = ( \soc_inst|m0_1|u_logic|Z1ewx4~0_combout & ( \soc_inst|m0_1|u_logic|Pkwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Manwx4~0_combout & (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout &
+// (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout & \soc_inst|m0_1|u_logic|E6nwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z1ewx4~0_combout & ( \soc_inst|m0_1|u_logic|Pkwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Manwx4~0_combout &
+// (\soc_inst|m0_1|u_logic|E6nwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Z1ewx4~0_combout & ( !\soc_inst|m0_1|u_logic|Pkwwx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Manwx4~0_combout & (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout & \soc_inst|m0_1|u_logic|E6nwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z1ewx4~0_combout & ( !\soc_inst|m0_1|u_logic|Pkwwx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Manwx4~0_combout & \soc_inst|m0_1|u_logic|E6nwx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D31wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D31wx4~0 .lut_mask = 64'h00AA000A00A80008;
+defparam \soc_inst|m0_1|u_logic|D31wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y11_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ixh3z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ixh3z4~feeder_combout = ( \soc_inst|m0_1|u_logic|Xl0wx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ixh3z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ixh3z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ixh3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ixh3z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X48_Y11_N29
+dffeas \soc_inst|m0_1|u_logic|Ixh3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Ixh3z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ixh3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ixh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ixh3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y11_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tvh3z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tvh3z4~feeder_combout = ( \soc_inst|m0_1|u_logic|Xl0wx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tvh3z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tvh3z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tvh3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Tvh3z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X48_Y11_N23
+dffeas \soc_inst|m0_1|u_logic|Tvh3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Tvh3z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Tvh3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tvh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tvh3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nn0wx4~4_combout = ( \soc_inst|m0_1|u_logic|Svk2z4~q & ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Ixh3z4~q )) #
+// (\soc_inst|m0_1|u_logic|H3d3z4~q & ((!\soc_inst|m0_1|u_logic|Tvh3z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ixh3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Tvh3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nn0wx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~4 .lut_mask = 64'h000088C000000000;
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y10_N52
+dffeas \soc_inst|m0_1|u_logic|G123z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|G123z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G123z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G123z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y10_N4
+dffeas \soc_inst|m0_1|u_logic|Ecp2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ecp2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ecp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ecp2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y10_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nn0wx4~0_combout = ( !\soc_inst|m0_1|u_logic|G123z4~q & ( \soc_inst|m0_1|u_logic|Ecp2z4~q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|H3d3z4~q &
+// !\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|G123z4~q & ( !\soc_inst|m0_1|u_logic|Ecp2z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|H3d3z4~q &
+// !\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G123z4~q & ( !\soc_inst|m0_1|u_logic|Ecp2z4~q & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q $
+// (!\soc_inst|m0_1|u_logic|Yaz2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|G123z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ecp2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nn0wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~0 .lut_mask = 64'h6000400020000000;
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X39_Y10_N32
+dffeas \soc_inst|m0_1|u_logic|M0i3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|M0i3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M0i3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M0i3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y9_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nr2xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nr2xx4~0_combout = ( !\soc_inst|m0_1|u_logic|M1j2z4~q & ( !\soc_inst|m0_1|u_logic|M0i3z4~q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Svk2z4~q &
+// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|M0i3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nr2xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nr2xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nr2xx4~0 .lut_mask = 64'h2000000000000000;
+defparam \soc_inst|m0_1|u_logic|Nr2xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X39_Y10_N25
+dffeas \soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y11_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fjlwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fjlwx4~0_combout = ( !\soc_inst|m0_1|u_logic|C8rwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Jp3wx4~combout ) # (\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|C8rwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fjlwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fjlwx4~0 .lut_mask = 64'hF0FFF0FF00000000;
+defparam \soc_inst|m0_1|u_logic|Fjlwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y9_N53
+dffeas \soc_inst|m0_1|u_logic|Wai2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xu5wx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wai2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wai2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wai2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y6_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Glj2z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Glj2z4~feeder_combout = ( \soc_inst|m0_1|u_logic|J3qvx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Glj2z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Glj2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Glj2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Glj2z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X50_Y6_N8
+dffeas \soc_inst|m0_1|u_logic|Glj2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Glj2z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Glj2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Glj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Glj2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y7_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3ivx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O3ivx4~0_combout = ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout & ( (!\soc_inst|m0_1|u_logic|J0l2z4~q & \soc_inst|m0_1|u_logic|Orewx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout & ( !\soc_inst|m0_1|u_logic|V1l2z4~q
+// ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|V1l2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|J0l2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|O3ivx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O3ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O3ivx4~0 .lut_mask = 64'hCCCCCCCC00F000F0;
+defparam \soc_inst|m0_1|u_logic|O3ivx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y5_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3ivx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O3ivx4~1_combout = ( !\soc_inst|m0_1|u_logic|O3ivx4~0_combout & ( \soc_inst|m0_1|u_logic|haddr_o~0_combout & ( (!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Gci2z4~q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|O3ivx4~0_combout & ( !\soc_inst|m0_1|u_logic|haddr_o~0_combout & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout & ((!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Gci2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Gci2z4~q ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|O3ivx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|haddr_o~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|O3ivx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O3ivx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O3ivx4~1 .lut_mask = 64'hBB000000BBBB0000;
+defparam \soc_inst|m0_1|u_logic|O3ivx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X40_Y5_N55
+dffeas \soc_inst|m0_1|u_logic|V1l2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|O3ivx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|V1l2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V1l2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|V1l2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y9_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ta1xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ta1xx4~0_combout = ( !\soc_inst|m0_1|u_logic|Svk2z4~q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ta1xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ta1xx4~0 .lut_mask = 64'hC000C00000000000;
+defparam \soc_inst|m0_1|u_logic|Ta1xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y9_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U71xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U71xx4~0_combout = ( !\soc_inst|m0_1|u_logic|Svk2z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U71xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U71xx4~0 .lut_mask = 64'h0300030000000000;
+defparam \soc_inst|m0_1|u_logic|U71xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y6_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nd3wx4~1_combout = ( \soc_inst|m0_1|u_logic|Ta1xx4~0_combout & ( \soc_inst|m0_1|u_logic|U71xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Glj2z4~q ) # (!\soc_inst|m0_1|u_logic|V1l2z4~q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Ta1xx4~0_combout & ( \soc_inst|m0_1|u_logic|U71xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Glj2z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|Ta1xx4~0_combout & ( !\soc_inst|m0_1|u_logic|U71xx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|V1l2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Glj2z4~q ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|V1l2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nd3wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~1 .lut_mask = 64'h0000FF00CCCCFFCC;
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y4_N52
+dffeas \soc_inst|m0_1|u_logic|T253z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|T253z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T253z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T253z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y4_N46
+dffeas \soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y6_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ld1xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ld1xx4~0_combout = ( \soc_inst|m0_1|u_logic|Yaz2z4~q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|H3d3z4~q & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ld1xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ld1xx4~0 .lut_mask = 64'h0000000000C000C0;
+defparam \soc_inst|m0_1|u_logic|Ld1xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y6_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sd1xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sd1xx4~0_combout = ( \soc_inst|m0_1|u_logic|Yaz2z4~q & ( (\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sd1xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sd1xx4~0 .lut_mask = 64'h0000000000300030;
+defparam \soc_inst|m0_1|u_logic|Sd1xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y6_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nd3wx4~3_combout = ( \soc_inst|m0_1|u_logic|Ld1xx4~0_combout & ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|T253z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE_q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Ld1xx4~0_combout & ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout & ( !\soc_inst|m0_1|u_logic|T253z4~DUPLICATE_q ) ) ) # ( \soc_inst|m0_1|u_logic|Ld1xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Sd1xx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|T253z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nd3wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~3 .lut_mask = 64'h0000FF00F0F0FFF0;
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y6_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lpu2z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lpu2z4~feeder_combout = ( \soc_inst|m0_1|u_logic|J3qvx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lpu2z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lpu2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lpu2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Lpu2z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X48_Y6_N31
+dffeas \soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Lpu2z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y7_N26
+dffeas \soc_inst|m0_1|u_logic|Cgt2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Cgt2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cgt2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cgt2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y6_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nd3wx4~6_combout = ( \soc_inst|m0_1|u_logic|Cgt2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|T1d3z4~q & ( (!\soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|H3d3z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q
+// & !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cgt2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|T1d3z4~q & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q &
+// ((!\soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Cgt2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nd3wx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~6 .lut_mask = 64'h000000000E000200;
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y8_N7
+dffeas \soc_inst|m0_1|u_logic|Ll73z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ll73z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ll73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ll73z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y5_N49
+dffeas \soc_inst|m0_1|u_logic|X2j2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|X2j2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X2j2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X2j2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y7_N46
+dffeas \soc_inst|m0_1|u_logic|Xti2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Xti2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xti2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xti2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y8_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nd3wx4~5_combout = ( !\soc_inst|m0_1|u_logic|Cc63z4~q & ( \soc_inst|m0_1|u_logic|Xti2z4~q & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Svk2z4~q &
+// \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Cc63z4~q & ( !\soc_inst|m0_1|u_logic|Xti2z4~q & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Svk2z4~q &
+// \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cc63z4~q & ( !\soc_inst|m0_1|u_logic|Xti2z4~q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q $
+// (\soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Cc63z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Xti2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nd3wx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~5 .lut_mask = 64'h0021000100200000;
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y6_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nd3wx4~7_combout = ( \soc_inst|m0_1|u_logic|X2j2z4~q & ( !\soc_inst|m0_1|u_logic|Nd3wx4~5_combout & ( (!\soc_inst|m0_1|u_logic|Nd3wx4~6_combout & ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ll73z4~q
+// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|X2j2z4~q & ( !\soc_inst|m0_1|u_logic|Nd3wx4~5_combout & ( (!\soc_inst|m0_1|u_logic|Nd3wx4~6_combout & (!\soc_inst|m0_1|u_logic|C51xx4~0_combout & ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Ll73z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nd3wx4~6_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ll73z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|X2j2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Nd3wx4~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nd3wx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~7 .lut_mask = 64'h8088A0AA00000000;
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y4_N13
+dffeas \soc_inst|m0_1|u_logic|Pfz2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Pfz2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pfz2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pfz2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y5_N41
+dffeas \soc_inst|m0_1|u_logic|Ehz2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ehz2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ehz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ehz2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y5_N31
+dffeas \soc_inst|m0_1|u_logic|Yd03z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Yd03z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yd03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yd03z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y6_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nd3wx4~4_combout = ( \soc_inst|m0_1|u_logic|N71xx4~0_combout & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout & ( (\soc_inst|m0_1|u_logic|Pfz2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Ehz2z4~q &
+// ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yd03z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N71xx4~0_combout & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout & ( (\soc_inst|m0_1|u_logic|Pfz2z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yd03z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|N71xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout & ( (\soc_inst|m0_1|u_logic|Ehz2z4~q &
+// ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yd03z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N71xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Yd03z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Pfz2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ehz2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yd03z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|N71xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nd3wx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~4 .lut_mask = 64'hAAFF0A0F22330203;
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y6_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Koj2z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Koj2z4~feeder_combout = ( \soc_inst|m0_1|u_logic|J3qvx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Koj2z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Koj2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Koj2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Koj2z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X50_Y6_N38
+dffeas \soc_inst|m0_1|u_logic|Koj2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Koj2z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Koj2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Koj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Koj2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y7_N11
+dffeas \soc_inst|m0_1|u_logic|Kt33z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Kt33z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kt33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kt33z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y9_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V41xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|V41xx4~0_combout = ( \soc_inst|m0_1|u_logic|T1d3z4~q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|H3d3z4~q & !\soc_inst|m0_1|u_logic|Svk2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V41xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V41xx4~0 .lut_mask = 64'h0000000005000500;
+defparam \soc_inst|m0_1|u_logic|V41xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y9_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ab1xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ab1xx4~0_combout = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ab1xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ab1xx4~0 .lut_mask = 64'h0000000000880088;
+defparam \soc_inst|m0_1|u_logic|Ab1xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y6_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nd3wx4~2_combout = ( \soc_inst|m0_1|u_logic|V41xx4~0_combout & ( \soc_inst|m0_1|u_logic|Ab1xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Koj2z4~q ) # (!\soc_inst|m0_1|u_logic|Kt33z4~q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|V41xx4~0_combout & ( \soc_inst|m0_1|u_logic|Ab1xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Kt33z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|V41xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ab1xx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Koj2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Koj2z4~q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Kt33z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nd3wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~2 .lut_mask = 64'h0000AAAAFF00FFAA;
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X50_Y6_N2
+dffeas \soc_inst|m0_1|u_logic|Sa13z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Sa13z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sa13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sa13z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y9_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jc1xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jc1xx4~0_combout = ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q & (\soc_inst|m0_1|u_logic|T1d3z4~q & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jc1xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jc1xx4~0 .lut_mask = 64'h2200220000000000;
+defparam \soc_inst|m0_1|u_logic|Jc1xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y8_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y91xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y91xx4~0_combout = ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Svk2z4~q & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y91xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y91xx4~0 .lut_mask = 64'h00A000A000000000;
+defparam \soc_inst|m0_1|u_logic|Y91xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y7_N31
+dffeas \soc_inst|m0_1|u_logic|Isi2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Isi2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Isi2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Isi2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y6_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nd3wx4~0_combout = ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout & ( \soc_inst|m0_1|u_logic|Isi2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Sa13z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Isi2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Sa13z4~q ) # (\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y91xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Isi2z4~DUPLICATE_q & (
+// \soc_inst|m0_1|u_logic|Jc1xx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sa13z4~q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Isi2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nd3wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~0 .lut_mask = 64'h00FFAAFF0000AAAA;
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y6_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nd3wx4~combout = ( \soc_inst|m0_1|u_logic|Nd3wx4~2_combout & ( \soc_inst|m0_1|u_logic|Nd3wx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|Nd3wx4~2_combout & ( \soc_inst|m0_1|u_logic|Nd3wx4~0_combout ) ) # (
+// \soc_inst|m0_1|u_logic|Nd3wx4~2_combout & ( !\soc_inst|m0_1|u_logic|Nd3wx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|Nd3wx4~2_combout & ( !\soc_inst|m0_1|u_logic|Nd3wx4~0_combout & ( (((!\soc_inst|m0_1|u_logic|Nd3wx4~7_combout ) #
+// (!\soc_inst|m0_1|u_logic|Nd3wx4~4_combout )) # (\soc_inst|m0_1|u_logic|Nd3wx4~3_combout )) # (\soc_inst|m0_1|u_logic|Nd3wx4~1_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nd3wx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Nd3wx4~3_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Nd3wx4~7_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Nd3wx4~4_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Nd3wx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Nd3wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nd3wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nd3wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4 .lut_mask = 64'hFFF7FFFFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Nd3wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y13_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H9iwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H9iwx4~0_combout = ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q ) # ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Npk2z4~q & !\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H9iwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H9iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H9iwx4~0 .lut_mask = 64'hFFBAFFBA00000000;
+defparam \soc_inst|m0_1|u_logic|H9iwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S8ewx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S8ewx4~0_combout = ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout & \soc_inst|m0_1|u_logic|Pkwwx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S8ewx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S8ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S8ewx4~0 .lut_mask = 64'h000F000F00000000;
+defparam \soc_inst|m0_1|u_logic|S8ewx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y11_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H9iwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H9iwx4~1_combout = ( \soc_inst|m0_1|u_logic|S8ewx4~0_combout & ( (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout & !\soc_inst|m0_1|u_logic|H9iwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|S8ewx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|H9iwx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|H9iwx4~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|S8ewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H9iwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H9iwx4~1 .lut_mask = 64'hF0F0F0F0C0C0C0C0;
+defparam \soc_inst|m0_1|u_logic|H9iwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y9_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djywx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Djywx4~0_combout = ( \soc_inst|m0_1|u_logic|Fuhwx4~0_combout & ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q & ((\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Aok2z4~q
+// & (!\soc_inst|m0_1|u_logic|Npk2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuhwx4~0_combout & ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Aok2z4~q & !\soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Fuhwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q & \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Djywx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Djywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djywx4~0 .lut_mask = 64'h00000A0A44444E4E;
+defparam \soc_inst|m0_1|u_logic|Djywx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y9_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lstwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lstwx4~0_combout = ( \soc_inst|m0_1|u_logic|Djywx4~0_combout & ( !\soc_inst|m0_1|u_logic|Wai2z4~q ) ) # ( !\soc_inst|m0_1|u_logic|Djywx4~0_combout & ( !\soc_inst|m0_1|u_logic|Wai2z4~q & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q ) #
+// ((!\soc_inst|m0_1|u_logic|Tki2z4~q & !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Djywx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lstwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lstwx4~0 .lut_mask = 64'hFAF0FFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Lstwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: IOIBUF_X20_Y0_N35
+cyclonev_io_ibuf \SW[7]~input (
+ .i(SW[7]),
+ .ibar(gnd),
+ .dynamicterminationcontrol(gnd),
+ .o(\SW[7]~input_o ));
+// synopsys translate_off
+defparam \SW[7]~input .bus_hold = "false";
+defparam \SW[7]~input .simulate_z_as = "z";
+// synopsys translate_on
+
+// Location: FF_X30_Y9_N11
+dffeas \soc_inst|switches_1|switch_store[0][7] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\SW[7]~input_o ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|switches_1|always0~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|switches_1|switch_store[0][7]~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[0][7] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[0][7] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y12_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[7] (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hwdata_o [7] = (\soc_inst|m0_1|u_logic|Y9t2z4~q & !\soc_inst|m0_1|u_logic|Ht5wx4~0_combout )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hwdata_o [7]),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hwdata_o[7] .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[7] .lut_mask = 64'h5500550055005500;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[7] .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X15_Y9_N21
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[7]~4 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[7]~4_combout = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout & ( \soc_inst|m0_1|u_logic|hwdata_o [7] & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q ) ) ) # (
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout & ( \soc_inst|m0_1|u_logic|hwdata_o [7] & ( (\soc_inst|ram_1|byte_select [0] & \soc_inst|ram_1|write_cycle~DUPLICATE_q ) ) ) ) # (
+// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout & ( !\soc_inst|m0_1|u_logic|hwdata_o [7] & ( (!\soc_inst|ram_1|byte_select [0] & \soc_inst|ram_1|write_cycle~DUPLICATE_q ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|ram_1|byte_select [0]),
+ .datac(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout ),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o [7]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|data_to_memory[7]~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[7]~4 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[7]~4 .lut_mask = 64'h00000C0C03030F0F;
+defparam \soc_inst|ram_1|data_to_memory[7]~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X18_Y6_N26
+dffeas \soc_inst|ram_1|saved_word_address[6] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|ram_1|always1~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|ram_1|saved_word_address [6]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|saved_word_address[6] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[6] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y5_N12
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[6]~6 (
+// Equation(s):
+// \soc_inst|ram_1|memory.raddr_a[6]~6_combout = ( \soc_inst|ram_1|always1~0_combout & ( (!\soc_inst|ram_1|write_cycle~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Z6ovx4~combout ))) # (\soc_inst|ram_1|write_cycle~DUPLICATE_q &
+// (\soc_inst|ram_1|saved_word_address [6])) ) ) # ( !\soc_inst|ram_1|always1~0_combout & ( \soc_inst|ram_1|saved_word_address [6] ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .datac(!\soc_inst|ram_1|saved_word_address [6]),
+ .datad(!\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|always1~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|memory.raddr_a[6]~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory.raddr_a[6]~6 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[6]~6 .lut_mask = 64'h0F0F0F0F03CF03CF;
+defparam \soc_inst|ram_1|memory.raddr_a[6]~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X19_Y6_N43
+dffeas \soc_inst|ram_1|saved_word_address[7] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Xxovx4~combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|ram_1|always1~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|ram_1|saved_word_address [7]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|saved_word_address[7] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[7] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y5_N57
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[7]~7 (
+// Equation(s):
+// \soc_inst|ram_1|memory.raddr_a[7]~7_combout = ( \soc_inst|ram_1|always1~0_combout & ( (!\soc_inst|ram_1|write_cycle~q & ((\soc_inst|m0_1|u_logic|Xxovx4~combout ))) # (\soc_inst|ram_1|write_cycle~q & (\soc_inst|ram_1|saved_word_address [7])) ) ) # (
+// !\soc_inst|ram_1|always1~0_combout & ( \soc_inst|ram_1|saved_word_address [7] ) )
+
+ .dataa(!\soc_inst|ram_1|write_cycle~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|ram_1|saved_word_address [7]),
+ .datad(!\soc_inst|m0_1|u_logic|Xxovx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|always1~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|memory.raddr_a[7]~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory.raddr_a[7]~7 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[7]~7 .lut_mask = 64'h0F0F0F0F05AF05AF;
+defparam \soc_inst|ram_1|memory.raddr_a[7]~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X19_Y6_N52
+dffeas \soc_inst|ram_1|saved_word_address[8] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Jxovx4~combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|ram_1|always1~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|ram_1|saved_word_address [8]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|saved_word_address[8] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[8] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y5_N42
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[8]~8 (
+// Equation(s):
+// \soc_inst|ram_1|memory.raddr_a[8]~8_combout = ( \soc_inst|ram_1|always1~0_combout & ( (!\soc_inst|ram_1|write_cycle~q & ((\soc_inst|m0_1|u_logic|Jxovx4~combout ))) # (\soc_inst|ram_1|write_cycle~q & (\soc_inst|ram_1|saved_word_address [8])) ) ) # (
+// !\soc_inst|ram_1|always1~0_combout & ( \soc_inst|ram_1|saved_word_address [8] ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|ram_1|saved_word_address [8]),
+ .datac(!\soc_inst|ram_1|write_cycle~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Jxovx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|always1~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|memory.raddr_a[8]~8_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory.raddr_a[8]~8 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[8]~8 .lut_mask = 64'h3333333303F303F3;
+defparam \soc_inst|ram_1|memory.raddr_a[8]~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X33_Y12_N53
+dffeas \soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Lkhvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y6_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~45 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~45_sumout = SUM(( !\soc_inst|m0_1|u_logic|Jex2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~50 ))
+// \soc_inst|m0_1|u_logic|Add3~46 = CARRY(( !\soc_inst|m0_1|u_logic|Jex2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~50 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Jex2z4~q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add3~50 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add3~45_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add3~46 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add3~45 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~45 .lut_mask = 64'h0000FFFF0000AAAA;
+defparam \soc_inst|m0_1|u_logic|Add3~45 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y6_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~41 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~41_sumout = SUM(( !\soc_inst|m0_1|u_logic|V4d3z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~46 ))
+// \soc_inst|m0_1|u_logic|Add3~42 = CARRY(( !\soc_inst|m0_1|u_logic|V4d3z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~46 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|V4d3z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add3~46 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add3~41_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add3~42 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add3~41 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~41 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~41 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y6_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~37 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~37_sumout = SUM(( !\soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE_q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~42 ))
+// \soc_inst|m0_1|u_logic|Add3~38 = CARRY(( !\soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE_q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~42 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add3~42 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add3~37_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add3~38 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add3~37 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~37 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~37 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y6_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~81 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~81_sumout = SUM(( !\soc_inst|m0_1|u_logic|Gmd3z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~38 ))
+// \soc_inst|m0_1|u_logic|Add3~82 = CARRY(( !\soc_inst|m0_1|u_logic|Gmd3z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~38 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Gmd3z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add3~38 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add3~81_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add3~82 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add3~81 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~81 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~81 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y9_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wzivx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wzivx4~0_combout = ( \soc_inst|m0_1|u_logic|Wce3z4~q & ( \soc_inst|m0_1|u_logic|Gmd3z4~q & ( (!\soc_inst|m0_1|u_logic|Owovx4~combout ) # (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wce3z4~q & (
+// \soc_inst|m0_1|u_logic|Gmd3z4~q & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout & ((!\soc_inst|m0_1|u_logic|Owovx4~combout ) # (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wce3z4~q & ( !\soc_inst|m0_1|u_logic|Gmd3z4~q &
+// ( (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout & (((!\soc_inst|m0_1|u_logic|Owovx4~combout ) # (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Df3wx4~9_combout & (!\soc_inst|m0_1|u_logic|Orewx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Owovx4~combout ) # (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wce3z4~q & ( !\soc_inst|m0_1|u_logic|Gmd3z4~q & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout &
+// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout & ((!\soc_inst|m0_1|u_logic|Owovx4~combout ) # (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Owovx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Wce3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Gmd3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wzivx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wzivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wzivx4~0 .lut_mask = 64'h4440EEE05550FFF0;
+defparam \soc_inst|m0_1|u_logic|Wzivx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y9_N52
+dffeas \soc_inst|m0_1|u_logic|Wce3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Wzivx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wce3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wce3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wce3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y10_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hvivx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hvivx4~0_combout = ( \soc_inst|m0_1|u_logic|Rkd3z4~q & ( \soc_inst|m0_1|u_logic|Jxovx4~combout & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) #
+// ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ufx2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rkd3z4~q & ( \soc_inst|m0_1|u_logic|Jxovx4~combout & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout &
+// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ufx2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rkd3z4~q & ( !\soc_inst|m0_1|u_logic|Jxovx4~combout & (
+// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ufx2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rkd3z4~q & ( !\soc_inst|m0_1|u_logic|Jxovx4~combout & (
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ufx2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ufx2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Rkd3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Jxovx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hvivx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hvivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hvivx4~0 .lut_mask = 64'h5505FFAF4404CC8C;
+defparam \soc_inst|m0_1|u_logic|Hvivx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X36_Y10_N7
+dffeas \soc_inst|m0_1|u_logic|Rkd3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Hvivx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rkd3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rkd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rkd3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y8_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R99wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R99wx4~0_combout = ( \soc_inst|m0_1|u_logic|Dvy2z4~q & ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~q & ( (!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout & !\soc_inst|m0_1|u_logic|Y29wx4~combout )
+// ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R99wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R99wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R99wx4~0 .lut_mask = 64'hF000F0F0F000F0F0;
+defparam \soc_inst|m0_1|u_logic|R99wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X40_Y10_N35
+dffeas \soc_inst|m0_1|u_logic|Lsd3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Lsd3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lsd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lsd3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y12_N19
+dffeas \soc_inst|m0_1|u_logic|Tyd3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Tyd3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tyd3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tyd3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y11_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pvd3z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pvd3z4~feeder_combout = ( \soc_inst|m0_1|u_logic|Aj1wx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pvd3z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pvd3z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pvd3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Pvd3z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X48_Y11_N5
+dffeas \soc_inst|m0_1|u_logic|Pvd3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Pvd3z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Pvd3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pvd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pvd3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y10_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gm1wx4~6_combout = ( \soc_inst|m0_1|u_logic|Yaz2z4~q & ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q & ((!\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Tyd3z4~DUPLICATE_q )) #
+// (\soc_inst|m0_1|u_logic|H3d3z4~q & ((!\soc_inst|m0_1|u_logic|Pvd3z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Tyd3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Pvd3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gm1wx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~6 .lut_mask = 64'h0000A28000000000;
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y6_N34
+dffeas \soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X31_Y9_N53
+dffeas \soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Wzivx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y13_N19
+dffeas \soc_inst|m0_1|u_logic|Aud3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Aud3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Aud3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Aud3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gm1wx4~7_combout = ( !\soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Aud3z4~q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|H3d3z4~q &
+// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Aud3z4~q & ( (\soc_inst|m0_1|u_logic|Svk2z4~q & (\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|H3d3z4~q &
+// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Aud3z4~q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & ((!\soc_inst|m0_1|u_logic|Svk2z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q &
+// !\soc_inst|m0_1|u_logic|H3d3z4~q )) # (\soc_inst|m0_1|u_logic|Svk2z4~q & (\soc_inst|m0_1|u_logic|Yaz2z4~q & \soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Aud3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gm1wx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~7 .lut_mask = 64'h8100010080000000;
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y10_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~8 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gm1wx4~8_combout = ( !\soc_inst|m0_1|u_logic|Gm1wx4~7_combout & ( \soc_inst|m0_1|u_logic|Qc1xx4~0_combout & ( (\soc_inst|m0_1|u_logic|Lsd3z4~q & (!\soc_inst|m0_1|u_logic|Gm1wx4~6_combout &
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gm1wx4~7_combout & ( !\soc_inst|m0_1|u_logic|Qc1xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Gm1wx4~6_combout &
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lsd3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Gm1wx4~6_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Gm1wx4~7_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gm1wx4~8_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~8 .lut_mask = 64'hCC0C000044040000;
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y12_N10
+dffeas \soc_inst|m0_1|u_logic|Snd3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Snd3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Snd3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Snd3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y11_N41
+dffeas \soc_inst|m0_1|u_logic|Hpd3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Hpd3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hpd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hpd3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gm1wx4~3_combout = ( \soc_inst|m0_1|u_logic|T1d3z4~q & ( \soc_inst|m0_1|u_logic|H3d3z4~q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Svk2z4~q & ((!\soc_inst|m0_1|u_logic|Hpd3z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Svk2z4~q & (!\soc_inst|m0_1|u_logic|Snd3z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Snd3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Hpd3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gm1wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~3 .lut_mask = 64'h0000000000000C0A;
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y9_N29
+dffeas \soc_inst|m0_1|u_logic|F8e3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|F8e3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F8e3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F8e3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X52_Y9_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6e3z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q6e3z4~feeder_combout = ( \soc_inst|m0_1|u_logic|Aj1wx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q6e3z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q6e3z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q6e3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Q6e3z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X52_Y9_N11
+dffeas \soc_inst|m0_1|u_logic|Q6e3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Q6e3z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Q6e3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q6e3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Q6e3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y9_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gm1wx4~2_combout = ( \soc_inst|m0_1|u_logic|Q6e3z4~q & ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( (!\soc_inst|m0_1|u_logic|F8e3z4~q & (!\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Q6e3z4~q & ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Svk2z4~q & ((!\soc_inst|m0_1|u_logic|F8e3z4~q ) #
+// (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|F8e3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Q6e3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gm1wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~2 .lut_mask = 64'h00B0008000000000;
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X50_Y9_N5
+dffeas \soc_inst|m0_1|u_logic|Wqd3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wqd3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wqd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wqd3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X50_Y9_N32
+dffeas \soc_inst|m0_1|u_logic|Exd3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Exd3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Exd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Exd3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y9_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gm1wx4~0_combout = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|T1d3z4~q & ( (!\soc_inst|m0_1|u_logic|Wqd3z4~q & (!\soc_inst|m0_1|u_logic|H3d3z4~q & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( (!\soc_inst|m0_1|u_logic|Exd3z4~q & (!\soc_inst|m0_1|u_logic|H3d3z4~q & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wqd3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Exd3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gm1wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~0 .lut_mask = 64'h000000C0000000A0;
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y10_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uo5xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uo5xx4~0_combout = ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( !\soc_inst|m0_1|u_logic|Ibe3z4~q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q & (\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|M1j2z4~q &
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ibe3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Uo5xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uo5xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uo5xx4~0 .lut_mask = 64'h2000000000000000;
+defparam \soc_inst|m0_1|u_logic|Uo5xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y12_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I0e3z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|I0e3z4~feeder_combout = ( \soc_inst|m0_1|u_logic|Aj1wx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|I0e3z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I0e3z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I0e3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|I0e3z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y12_N22
+dffeas \soc_inst|m0_1|u_logic|I0e3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|I0e3z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|I0e3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I0e3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I0e3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y12_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X1e3z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|X1e3z4~feeder_combout = ( \soc_inst|m0_1|u_logic|Aj1wx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|X1e3z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X1e3z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X1e3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|X1e3z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y12_N17
+dffeas \soc_inst|m0_1|u_logic|X1e3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|X1e3z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|X1e3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X1e3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X1e3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gm1wx4~1_combout = ( \soc_inst|m0_1|u_logic|H3d3z4~q & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & ((!\soc_inst|m0_1|u_logic|Svk2z4~q & ((!\soc_inst|m0_1|u_logic|X1e3z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Svk2z4~q & (!\soc_inst|m0_1|u_logic|I0e3z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|I0e3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|X1e3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gm1wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~1 .lut_mask = 64'h0000540400000000;
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X40_Y10_N13
+dffeas \soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y8_N46
+dffeas \soc_inst|m0_1|u_logic|M3e3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|M3e3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M3e3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M3e3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gm1wx4~4_combout = ( !\soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|M3e3z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q &
+// !\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|M3e3z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q &
+// \soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|M3e3z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) )
+// )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|M3e3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gm1wx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~4 .lut_mask = 64'h4040004040000000;
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y10_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gm1wx4~5_combout = ( !\soc_inst|m0_1|u_logic|Gm1wx4~1_combout & ( !\soc_inst|m0_1|u_logic|Gm1wx4~4_combout & ( (!\soc_inst|m0_1|u_logic|Gm1wx4~3_combout & (!\soc_inst|m0_1|u_logic|Gm1wx4~2_combout &
+// (!\soc_inst|m0_1|u_logic|Gm1wx4~0_combout & !\soc_inst|m0_1|u_logic|Uo5xx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Gm1wx4~3_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Gm1wx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Gm1wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Uo5xx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Gm1wx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Gm1wx4~4_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gm1wx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y10_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R99wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R99wx4~1_combout = ( \soc_inst|m0_1|u_logic|Kcdwx4~1_combout & ( \soc_inst|m0_1|u_logic|Gm1wx4~5_combout & ( (\soc_inst|m0_1|u_logic|R99wx4~0_combout & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Gm1wx4~8_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kcdwx4~1_combout & ( \soc_inst|m0_1|u_logic|Gm1wx4~5_combout & ( (\soc_inst|m0_1|u_logic|R99wx4~0_combout &
+// ((\soc_inst|m0_1|u_logic|Gm1wx4~8_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kcdwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Gm1wx4~5_combout & ( (\soc_inst|m0_1|u_logic|R99wx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kcdwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Gm1wx4~5_combout & ( (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|R99wx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|R99wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Gm1wx4~8_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Gm1wx4~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R99wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R99wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R99wx4~1 .lut_mask = 64'h1111313111333133;
+defparam \soc_inst|m0_1|u_logic|R99wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y10_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xk1wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xk1wx4~1_combout = ( \soc_inst|m0_1|u_logic|Wzawx4~combout & ( (!\soc_inst|m0_1|u_logic|R99wx4~1_combout & (\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|R99wx4~1_combout &
+// ((\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout & ( (!\soc_inst|m0_1|u_logic|R99wx4~1_combout & ((\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|R99wx4~1_combout &
+// (\soc_inst|m0_1|u_logic|Muawx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|R99wx4~1_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xk1wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xk1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xk1wx4~1 .lut_mask = 64'h05AF05AF0A5F0A5F;
+defparam \soc_inst|m0_1|u_logic|Xk1wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y10_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xk1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xk1wx4~0_combout = ( \soc_inst|m0_1|u_logic|Xk1wx4~1_combout & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout & ( \soc_inst|m0_1|u_logic|Qk1wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Xk1wx4~1_combout & (
+// \soc_inst|m0_1|u_logic|Mgd2z4~0_combout & ( (\soc_inst|m0_1|u_logic|Qk1wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Fuawx4~0_combout )))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Xk1wx4~1_combout & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout & ( \soc_inst|m0_1|u_logic|Qk1wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Xk1wx4~1_combout & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Qk1wx4~0_combout & !\soc_inst|m0_1|u_logic|Fuawx4~0_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Xk1wx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xk1wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xk1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xk1wx4~0 .lut_mask = 64'h2200333332303333;
+defparam \soc_inst|m0_1|u_logic|Xk1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y10_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gm1wx4~combout = ( \soc_inst|m0_1|u_logic|Gm1wx4~8_combout & ( \soc_inst|m0_1|u_logic|Gm1wx4~5_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Gm1wx4~5_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Gm1wx4~8_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gm1wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gm1wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Gm1wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y10_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aj1wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Aj1wx4~1_combout = ( \soc_inst|m0_1|u_logic|Qk1wx4~0_combout & ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Gm1wx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qk1wx4~0_combout & (
+// \soc_inst|m0_1|u_logic|Shyvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Gm1wx4~combout ) # ((\soc_inst|m0_1|u_logic|X8zvx4~combout & (!\soc_inst|m0_1|u_logic|Wzawx4~combout $ (!\soc_inst|m0_1|u_logic|R99wx4~1_combout )))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Qk1wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout & (!\soc_inst|m0_1|u_logic|Wzawx4~combout $ (!\soc_inst|m0_1|u_logic|R99wx4~1_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Gm1wx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|R99wx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Aj1wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Aj1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aj1wx4~1 .lut_mask = 64'h005A0000CCDECCCC;
+defparam \soc_inst|m0_1|u_logic|Aj1wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y10_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S3cwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S3cwx4~0_combout = ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Pm9wx4~0_combout & ( !\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & (
+// \soc_inst|m0_1|u_logic|Pm9wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Y29wx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Pm9wx4~0_combout & (
+// \soc_inst|m0_1|u_logic|Y29wx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Pm9wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S3cwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S3cwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S3cwx4~0 .lut_mask = 64'h0F0F0000AFAFAAAA;
+defparam \soc_inst|m0_1|u_logic|S3cwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y6_N37
+dffeas \soc_inst|m0_1|u_logic|Rds2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rds2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rds2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rds2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y11_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D432z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D432z4~0_combout = ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( !\soc_inst|m0_1|u_logic|Rds2z4~q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|H3d3z4~q &
+// !\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rds2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|D432z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D432z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D432z4~0 .lut_mask = 64'h0800000000000000;
+defparam \soc_inst|m0_1|u_logic|D432z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y10_N49
+dffeas \soc_inst|m0_1|u_logic|Oas2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Oas2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oas2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Oas2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y11_N43
+dffeas \soc_inst|m0_1|u_logic|Hc23z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Hc23z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hc23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hc23z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zh5wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|T1d3z4~q & ( (!\soc_inst|m0_1|u_logic|Oas2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Svk2z4~q & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) )
+// # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( (!\soc_inst|m0_1|u_logic|Hc23z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~q & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Oas2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Hc23z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zh5wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~0 .lut_mask = 64'h0000C000A0000000;
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y11_N56
+dffeas \soc_inst|m0_1|u_logic|Ql33z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ql33z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ql33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ql33z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y11_N40
+dffeas \soc_inst|m0_1|u_logic|I463z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|I463z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I463z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I463z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zh5wx4~3_combout = ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( \soc_inst|m0_1|u_logic|Yaz2z4~q & ( (\soc_inst|m0_1|u_logic|Svk2z4~q & ((!\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Ql33z4~q )) #
+// (\soc_inst|m0_1|u_logic|H3d3z4~q & ((!\soc_inst|m0_1|u_logic|I463z4~DUPLICATE_q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ql33z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|I463z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zh5wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~3 .lut_mask = 64'h000000000A0C0000;
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y9_N20
+dffeas \soc_inst|m0_1|u_logic|B613z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|B613z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B613z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B613z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X37_Y10_N35
+dffeas \soc_inst|m0_1|u_logic|H903z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|H903z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H903z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H903z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zh5wx4~4_combout = ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( \soc_inst|m0_1|u_logic|H903z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|B613z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~q &
+// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( !\soc_inst|m0_1|u_logic|H903z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~q & ((!\soc_inst|m0_1|u_logic|B613z4~q ) #
+// (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|B613z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|H903z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zh5wx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~4 .lut_mask = 64'h080C000008000000;
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y10_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z8s2z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z8s2z4~feeder_combout = ( \soc_inst|m0_1|u_logic|Pn1wx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z8s2z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z8s2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z8s2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Z8s2z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y10_N20
+dffeas \soc_inst|m0_1|u_logic|Z8s2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Z8s2z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Z8s2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z8s2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z8s2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y10_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zh5wx4~1_combout = ( \soc_inst|m0_1|u_logic|H3d3z4~q & ( \soc_inst|m0_1|u_logic|Rkd3z4~q & ( (!\soc_inst|m0_1|u_logic|Z8s2z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|T1d3z4~q &
+// !\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~q & ( !\soc_inst|m0_1|u_logic|Rkd3z4~q & ( (!\soc_inst|m0_1|u_logic|Z8s2z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|T1d3z4~q &
+// !\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~q & ( !\soc_inst|m0_1|u_logic|Rkd3z4~q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q & !\soc_inst|m0_1|u_logic|Svk2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Z8s2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rkd3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zh5wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~1 .lut_mask = 64'hC000080000000800;
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y11_N22
+dffeas \soc_inst|m0_1|u_logic|K7s2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|K7s2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K7s2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K7s2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zu43z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zu43z4~feeder_combout = ( \soc_inst|m0_1|u_logic|Pn1wx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zu43z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zu43z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zu43z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Zu43z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y12_N14
+dffeas \soc_inst|m0_1|u_logic|Zu43z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Zu43z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Zu43z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zu43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zu43z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zh5wx4~2_combout = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|T1d3z4~q & ( (!\soc_inst|m0_1|u_logic|K7s2z4~q & (\soc_inst|m0_1|u_logic|H3d3z4~q & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) ) #
+// ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( (!\soc_inst|m0_1|u_logic|Zu43z4~q & (\soc_inst|m0_1|u_logic|H3d3z4~q & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|K7s2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Zu43z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zh5wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~2 .lut_mask = 64'h000C0000000A0000;
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zh5wx4~5_combout = ( !\soc_inst|m0_1|u_logic|Zh5wx4~1_combout & ( !\soc_inst|m0_1|u_logic|Zh5wx4~2_combout & ( (!\soc_inst|m0_1|u_logic|D432z4~0_combout & (!\soc_inst|m0_1|u_logic|Zh5wx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Zh5wx4~3_combout & !\soc_inst|m0_1|u_logic|Zh5wx4~4_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|D432z4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Zh5wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Zh5wx4~3_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Zh5wx4~4_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Zh5wx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Zh5wx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zh5wx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y10_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~9 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zh5wx4~9_combout = ( \soc_inst|m0_1|u_logic|Zh5wx4~8_combout & ( \soc_inst|m0_1|u_logic|Zh5wx4~5_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Zh5wx4~5_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Zh5wx4~8_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zh5wx4~9_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~9 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~9 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y10_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do1wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Do1wx4~2_combout = ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout & ( \soc_inst|m0_1|u_logic|Fuawx4~0_combout & ( !\soc_inst|m0_1|u_logic|Zh5wx4~9_combout ) ) ) # ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Fuawx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Zh5wx4~9_combout ) # ((\soc_inst|m0_1|u_logic|Hxnvx4~0_combout & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Fuawx4~0_combout & ( (\soc_inst|m0_1|u_logic|Hxnvx4~0_combout & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Zh5wx4~9_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Do1wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Do1wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Do1wx4~2 .lut_mask = 64'h5050DCDC0000CCCC;
+defparam \soc_inst|m0_1|u_logic|Do1wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y10_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do1wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Do1wx4~1_combout = ( \soc_inst|m0_1|u_logic|Wzawx4~combout & ( \soc_inst|m0_1|u_logic|Hxnvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & ((!\soc_inst|m0_1|u_logic|S3cwx4~1_combout &
+// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|S3cwx4~1_combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout & ( \soc_inst|m0_1|u_logic|Hxnvx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & ((!\soc_inst|m0_1|u_logic|S3cwx4~1_combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|S3cwx4~1_combout & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Wzawx4~combout & ( !\soc_inst|m0_1|u_logic|Hxnvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (\soc_inst|m0_1|u_logic|S3cwx4~1_combout ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Wzawx4~combout & ( !\soc_inst|m0_1|u_logic|Hxnvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & ((!\soc_inst|m0_1|u_logic|S3cwx4~1_combout ) # (!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|S3cwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Do1wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Do1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Do1wx4~1 .lut_mask = 64'hAAA0AA0AA8088A80;
+defparam \soc_inst|m0_1|u_logic|Do1wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y10_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Do1wx4~0_combout = ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout & ( \soc_inst|m0_1|u_logic|Do1wx4~1_combout & ( !\soc_inst|m0_1|u_logic|Do1wx4~2_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (
+// \soc_inst|m0_1|u_logic|Do1wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Do1wx4~2_combout & ((!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Do1wx4~2_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Do1wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Do1wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Do1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Do1wx4~0 .lut_mask = 64'h00000000E0E0F0F0;
+defparam \soc_inst|m0_1|u_logic|Do1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y6_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~113 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~113_sumout = SUM(( !\soc_inst|m0_1|u_logic|Kzbwx4~1_combout $ (((\soc_inst|m0_1|u_logic|Evcwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout &
+// \soc_inst|m0_1|u_logic|Konvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~42 ))
+// \soc_inst|m0_1|u_logic|Add5~114 = CARRY(( !\soc_inst|m0_1|u_logic|Kzbwx4~1_combout $ (((\soc_inst|m0_1|u_logic|Evcwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout &
+// \soc_inst|m0_1|u_logic|Konvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~42 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Kzbwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Konvx4~0_combout ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add5~42 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add5~113_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add5~114 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~113 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~113 .lut_mask = 64'h0000FF550000C03F;
+defparam \soc_inst|m0_1|u_logic|Add5~113 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y6_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~105 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~105_sumout = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout & \soc_inst|m0_1|u_logic|Hxnvx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|S3cwx4~1_combout $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~114 ))
+// \soc_inst|m0_1|u_logic|Add5~106 = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout & \soc_inst|m0_1|u_logic|Hxnvx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|S3cwx4~1_combout $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~114 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|S3cwx4~1_combout ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add5~114 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add5~105_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add5~106 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~105 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~105 .lut_mask = 64'h0000C03F000000AA;
+defparam \soc_inst|m0_1|u_logic|Add5~105 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y13_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Glnwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Glnwx4~2_combout = ( \soc_inst|m0_1|u_logic|Glnwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ) # (!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Glnwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Glnwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Glnwx4~2 .lut_mask = 64'h00000000FFF0FFF0;
+defparam \soc_inst|m0_1|u_logic|Glnwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y10_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pn1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pn1wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Glnwx4~2_combout & ( (\soc_inst|m0_1|u_logic|Do1wx4~0_combout & (\soc_inst|m0_1|u_logic|Wn1wx4~1_combout & ((!\soc_inst|m0_1|u_logic|Add5~105_sumout ) #
+// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Do1wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Add5~105_sumout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wn1wx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Glnwx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pn1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pn1wx4~0 .lut_mask = 64'h0051005100000000;
+defparam \soc_inst|m0_1|u_logic|Pn1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y11_N50
+dffeas \soc_inst|m0_1|u_logic|Arv2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Arv2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Arv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Arv2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y8_N52
+dffeas \soc_inst|m0_1|u_logic|Rhu2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rhu2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rhu2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rhu2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y10_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zh5wx4~7_combout = ( \soc_inst|m0_1|u_logic|Rhu2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Svk2z4~q & ( (!\soc_inst|m0_1|u_logic|Arv2z4~q & (\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|H3d3z4~q &
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rhu2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Svk2z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q & ((!\soc_inst|m0_1|u_logic|Arv2z4~q ) #
+// (!\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Arv2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rhu2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zh5wx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~7 .lut_mask = 64'h0000000032000200;
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X37_Y10_N41
+dffeas \soc_inst|m0_1|u_logic|An83z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|An83z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|An83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|An83z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y10_N38
+dffeas \soc_inst|m0_1|u_logic|Rd73z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rd73z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rd73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rd73z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y11_N4
+dffeas \soc_inst|m0_1|u_logic|Gt93z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Gt93z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gt93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gt93z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y10_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zh5wx4~6_combout = ( !\soc_inst|m0_1|u_logic|Gt93z4~q & ( \soc_inst|m0_1|u_logic|Svk2z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|Yaz2z4~q & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Gt93z4~q & ( !\soc_inst|m0_1|u_logic|Svk2z4~q & ( (!\soc_inst|m0_1|u_logic|Rd73z4~q & (\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|Yaz2z4~q & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Gt93z4~q & ( !\soc_inst|m0_1|u_logic|Svk2z4~q & ( (!\soc_inst|m0_1|u_logic|Rd73z4~q & (\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|Yaz2z4~q & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rd73z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Gt93z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zh5wx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~6 .lut_mask = 64'h0200020000030000;
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y6_N58
+dffeas \soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y10_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~8 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zh5wx4~8_combout = ( \soc_inst|m0_1|u_logic|C51xx4~0_combout & ( \soc_inst|m0_1|u_logic|S61xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Zh5wx4~7_combout & (\soc_inst|m0_1|u_logic|An83z4~q &
+// (!\soc_inst|m0_1|u_logic|Zh5wx4~6_combout & \soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout & ( \soc_inst|m0_1|u_logic|S61xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Zh5wx4~7_combout &
+// (\soc_inst|m0_1|u_logic|An83z4~q & !\soc_inst|m0_1|u_logic|Zh5wx4~6_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|C51xx4~0_combout & ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Zh5wx4~7_combout &
+// (!\soc_inst|m0_1|u_logic|Zh5wx4~6_combout & \soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout & ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Zh5wx4~7_combout &
+// !\soc_inst|m0_1|u_logic|Zh5wx4~6_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Zh5wx4~7_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|An83z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Zh5wx4~6_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zh5wx4~8_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~8 .lut_mask = 64'hA0A000A020200020;
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y10_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S3cwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S3cwx4~1_combout = ( \soc_inst|m0_1|u_logic|Mddwx4~0_combout & ( \soc_inst|m0_1|u_logic|Zh5wx4~5_combout & ( (!\soc_inst|m0_1|u_logic|S3cwx4~0_combout & ((\soc_inst|m0_1|u_logic|Zh5wx4~8_combout ) #
+// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mddwx4~0_combout & ( \soc_inst|m0_1|u_logic|Zh5wx4~5_combout & ( (!\soc_inst|m0_1|u_logic|S3cwx4~0_combout & (((\soc_inst|m0_1|u_logic|Zh5wx4~8_combout ) #
+// (\soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mddwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Zh5wx4~5_combout & ( (!\soc_inst|m0_1|u_logic|S3cwx4~0_combout &
+// \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mddwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Zh5wx4~5_combout & ( (!\soc_inst|m0_1|u_logic|S3cwx4~0_combout & ((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ) #
+// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|S3cwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Zh5wx4~8_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Zh5wx4~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S3cwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S3cwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S3cwx4~1 .lut_mask = 64'h2A2A22222AAA22AA;
+defparam \soc_inst|m0_1|u_logic|S3cwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y6_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~45 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~45_sumout = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout & \soc_inst|m0_1|u_logic|Qk1wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|R99wx4~1_combout $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout &
+// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( \soc_inst|m0_1|u_logic|Add5~106 ))
+// \soc_inst|m0_1|u_logic|Add5~46 = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout & \soc_inst|m0_1|u_logic|Qk1wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|R99wx4~1_combout $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout &
+// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( \soc_inst|m0_1|u_logic|Add5~106 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|R99wx4~1_combout ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add5~106 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add5~45_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add5~46 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~45 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~45 .lut_mask = 64'h00008877000000F0;
+defparam \soc_inst|m0_1|u_logic|Add5~45 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y10_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aj1wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Aj1wx4~2_combout = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout & ( \soc_inst|m0_1|u_logic|Add5~45_sumout & ( (!\soc_inst|m0_1|u_logic|Aj1wx4~1_combout & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Lhyvx4~2_combout & ( !\soc_inst|m0_1|u_logic|Add5~45_sumout & ( (!\soc_inst|m0_1|u_logic|Aj1wx4~1_combout & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout & (
+// !\soc_inst|m0_1|u_logic|Add5~45_sumout & ( (!\soc_inst|m0_1|u_logic|Aj1wx4~1_combout & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Aj1wx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~45_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Aj1wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Aj1wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aj1wx4~2 .lut_mask = 64'h8888888800008888;
+defparam \soc_inst|m0_1|u_logic|Aj1wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y11_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlnwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nlnwx4~0_combout = ( \soc_inst|m0_1|u_logic|C8rwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|E6nwx4~0_combout & \soc_inst|m0_1|u_logic|X77wx4~combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|C8rwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout & \soc_inst|m0_1|u_logic|X77wx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|C8rwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nlnwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nlnwx4~0 .lut_mask = 64'h00AA00AAF0FAF0FA;
+defparam \soc_inst|m0_1|u_logic|Nlnwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y10_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ecowx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ecowx4~combout = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout & ( (\soc_inst|m0_1|u_logic|B2uvx4~0_combout & (!\soc_inst|m0_1|u_logic|J6i2z4~q & \soc_inst|m0_1|u_logic|Lz93z4~q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ecowx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ecowx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ecowx4 .lut_mask = 64'h0000000000300030;
+defparam \soc_inst|m0_1|u_logic|Ecowx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y10_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[19]~14 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout = ( \soc_inst|m0_1|u_logic|Nn0wx4~combout & ( ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout & \soc_inst|m0_1|u_logic|Y9t2z4~q )) # (\soc_inst|m0_1|u_logic|R40wx4~combout ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Nn0wx4~combout & ( (\soc_inst|m0_1|u_logic|R40wx4~combout & ((!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nn0wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hwdata_o[19]~14 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[19]~14 .lut_mask = 64'h00F500F50AFF0AFF;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[19]~14 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y10_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C5ovx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C5ovx4~combout = ( \soc_inst|m0_1|u_logic|H6tvx4~0_combout & ( \soc_inst|m0_1|u_logic|K3l2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C5ovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C5ovx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|C5ovx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y10_N35
+dffeas \soc_inst|m0_1|u_logic|L8m2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|L8m2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L8m2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|L8m2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y9_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G6owx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G6owx4~combout = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout & ( \soc_inst|m0_1|u_logic|H6tvx4~0_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G6owx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G6owx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G6owx4 .lut_mask = 64'h0000000055555555;
+defparam \soc_inst|m0_1|u_logic|G6owx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y9_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rilwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rilwx4~0_combout = ( \soc_inst|m0_1|u_logic|G6owx4~combout & ( (!\soc_inst|m0_1|u_logic|Ecowx4~combout & \soc_inst|m0_1|u_logic|L8m2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|G6owx4~combout & ( !\soc_inst|m0_1|u_logic|Ecowx4~combout
+// ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ecowx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|L8m2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rilwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rilwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rilwx4~0 .lut_mask = 64'hF0F0F0F000F000F0;
+defparam \soc_inst|m0_1|u_logic|Rilwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y9_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A5uvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|A5uvx4~0_combout = ( \soc_inst|m0_1|u_logic|F4nvx4~0_combout & ( \soc_inst|m0_1|u_logic|Mjl2z4~q ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|F4nvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|A5uvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A5uvx4~0 .lut_mask = 64'h0000000033333333;
+defparam \soc_inst|m0_1|u_logic|A5uvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y9_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T5tvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T5tvx4~combout = ( \soc_inst|m0_1|u_logic|A5uvx4~0_combout & ( \soc_inst|m0_1|u_logic|K3l2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|T5tvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T5tvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T5tvx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|T5tvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y9_N16
+dffeas \soc_inst|m0_1|u_logic|Tna3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o~5_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|T5tvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Tna3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tna3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tna3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aea3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Aea3z4~0_combout = ( !\soc_inst|m0_1|u_logic|hwdata_o~5_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Aea3z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Aea3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aea3z4~0 .lut_mask = 64'hFFFFFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Aea3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y13_N38
+dffeas \soc_inst|m0_1|u_logic|Aea3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Aea3z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Aea3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Aea3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Aea3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y10_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nfb3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nfb3z4~0_combout = !\soc_inst|m0_1|u_logic|hwdata_o [7]
+
+ .dataa(!\soc_inst|m0_1|u_logic|hwdata_o [7]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nfb3z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nfb3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nfb3z4~0 .lut_mask = 64'hAAAAAAAAAAAAAAAA;
+defparam \soc_inst|m0_1|u_logic|Nfb3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y10_N25
+dffeas \soc_inst|m0_1|u_logic|Nfb3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Nfb3z4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Nfb3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nfb3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nfb3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y10_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[4] (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hwdata_o [4] = ( !\soc_inst|m0_1|u_logic|Am5wx4~1_combout & ( \soc_inst|m0_1|u_logic|Y9t2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hwdata_o [4]),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hwdata_o[4] .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[4] .lut_mask = 64'h0F0F0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[4] .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y10_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Taa3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Taa3z4~0_combout = !\soc_inst|m0_1|u_logic|hwdata_o [4]
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|hwdata_o [4]),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Taa3z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Taa3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Taa3z4~0 .lut_mask = 64'hF0F0F0F0F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Taa3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y10_N7
+dffeas \soc_inst|m0_1|u_logic|Taa3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Taa3z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Taa3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Taa3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Taa3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X25_Y9_N26
+dffeas \soc_inst|m0_1|u_logic|Gza3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Csmvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Gza3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gza3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gza3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~94 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add0~94_cout = CARRY(( !\soc_inst|m0_1|u_logic|F2o2z4~q ) + ( VCC ) + ( !VCC ))
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|F2o2z4~q ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(),
+ .sumout(),
+ .cout(\soc_inst|m0_1|u_logic|Add0~94_cout ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add0~94 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~94 .lut_mask = 64'h000000000000CCCC;
+defparam \soc_inst|m0_1|u_logic|Add0~94 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y12_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~33 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add0~33_sumout = SUM(( !\soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE_q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~94_cout ))
+// \soc_inst|m0_1|u_logic|Add0~34 = CARRY(( !\soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE_q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~94_cout ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add0~94_cout ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add0~33_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add0~34 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add0~33 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~33 .lut_mask = 64'h000000000000AAAA;
+defparam \soc_inst|m0_1|u_logic|Add0~33 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y11_N38
+dffeas \soc_inst|m0_1|u_logic|C4b3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Xsmvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|C4b3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C4b3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|C4b3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y11_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qfa3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qfa3z4~0_combout = ( !\soc_inst|m0_1|u_logic|hwdata_o [1] )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o [1]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qfa3z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qfa3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qfa3z4~0 .lut_mask = 64'hFFFFFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Qfa3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y11_N34
+dffeas \soc_inst|m0_1|u_logic|Qfa3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Qfa3z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Qfa3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qfa3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qfa3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xsmvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xsmvx4~0_combout = ( \soc_inst|m0_1|u_logic|C4b3z4~q & ( \soc_inst|m0_1|u_logic|Qfa3z4~q & ( (!\soc_inst|m0_1|u_logic|Add0~33_sumout ) # ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((\soc_inst|m0_1|u_logic|Mxtvx4~combout ) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C4b3z4~q & ( \soc_inst|m0_1|u_logic|Qfa3z4~q & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q & ((!\soc_inst|m0_1|u_logic|Add0~33_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout ))))
+// # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|C4b3z4~q & ( !\soc_inst|m0_1|u_logic|Qfa3z4~q & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((!\soc_inst|m0_1|u_logic|Add0~33_sumout & !\soc_inst|m0_1|u_logic|Mxtvx4~combout ))
+// # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|C4b3z4~q & ( !\soc_inst|m0_1|u_logic|Qfa3z4~q & ( ((!\soc_inst|m0_1|u_logic|Add0~33_sumout & (\soc_inst|m0_1|u_logic|Tna3z4~q & !\soc_inst|m0_1|u_logic|Mxtvx4~combout )))
+// # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Add0~33_sumout ),
+ .datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|C4b3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qfa3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xsmvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xsmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xsmvx4~0 .lut_mask = 64'h2F0FEFCF2F3FEFFF;
+defparam \soc_inst|m0_1|u_logic|Xsmvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y11_N37
+dffeas \soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Xsmvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~21 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add0~21_sumout = SUM(( !\soc_inst|m0_1|u_logic|M2b3z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~34 ))
+// \soc_inst|m0_1|u_logic|Add0~22 = CARRY(( !\soc_inst|m0_1|u_logic|M2b3z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~34 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|M2b3z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add0~34 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add0~21_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add0~22 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add0~21 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~21 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~21 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y11_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gha3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gha3z4~0_combout = !\soc_inst|m0_1|u_logic|hwdata_o [2]
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|hwdata_o [2]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gha3z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gha3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gha3z4~0 .lut_mask = 64'hFF00FF00FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Gha3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y11_N58
+dffeas \soc_inst|m0_1|u_logic|Gha3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Gha3z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Gha3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gha3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gha3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qsmvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qsmvx4~0_combout = ( \soc_inst|m0_1|u_logic|M2b3z4~q & ( \soc_inst|m0_1|u_logic|Gha3z4~q & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((!\soc_inst|m0_1|u_logic|Add0~21_sumout ) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Mxtvx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|M2b3z4~q & ( \soc_inst|m0_1|u_logic|Gha3z4~q & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q & ((!\soc_inst|m0_1|u_logic|Add0~21_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|M2b3z4~q & ( !\soc_inst|m0_1|u_logic|Gha3z4~q & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((!\soc_inst|m0_1|u_logic|Mxtvx4~combout & !\soc_inst|m0_1|u_logic|Add0~21_sumout )) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|M2b3z4~q & ( !\soc_inst|m0_1|u_logic|Gha3z4~q & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q & (!\soc_inst|m0_1|u_logic|Mxtvx4~combout & !\soc_inst|m0_1|u_logic|Add0~21_sumout ))) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Add0~21_sumout ),
+ .datae(!\soc_inst|m0_1|u_logic|M2b3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Gha3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qsmvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qsmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qsmvx4~0 .lut_mask = 64'h4F0FEFAF5F1FFFBF;
+defparam \soc_inst|m0_1|u_logic|Qsmvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y11_N1
+dffeas \soc_inst|m0_1|u_logic|M2b3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Qsmvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|M2b3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M2b3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M2b3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y12_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~57 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add0~57_sumout = SUM(( !\soc_inst|m0_1|u_logic|W0b3z4~DUPLICATE_q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~22 ))
+// \soc_inst|m0_1|u_logic|Add0~58 = CARRY(( !\soc_inst|m0_1|u_logic|W0b3z4~DUPLICATE_q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~22 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|W0b3z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add0~22 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add0~57_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add0~58 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add0~57 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~57 .lut_mask = 64'h000000000000FF00;
+defparam \soc_inst|m0_1|u_logic|Add0~57 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y13_N49
+dffeas \soc_inst|m0_1|u_logic|W0b3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Jsmvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|W0b3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W0b3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|W0b3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y10_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~20 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hwdata_o~20_combout = ( \soc_inst|m0_1|u_logic|R40wx4~combout ) # ( !\soc_inst|m0_1|u_logic|R40wx4~combout & ( !\soc_inst|m0_1|u_logic|Y9t2z4~q ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hwdata_o~20_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hwdata_o~20 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~20 .lut_mask = 64'hAAAAAAAAFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|hwdata_o~20 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y13_N43
+dffeas \soc_inst|m0_1|u_logic|Wia3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o~20_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wia3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wia3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wia3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jsmvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jsmvx4~0_combout = ( \soc_inst|m0_1|u_logic|W0b3z4~q & ( \soc_inst|m0_1|u_logic|Wia3z4~q & ( (((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (!\soc_inst|m0_1|u_logic|Add0~57_sumout )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Mxtvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|W0b3z4~q & ( \soc_inst|m0_1|u_logic|Wia3z4~q & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q & ((!\soc_inst|m0_1|u_logic|Add0~57_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|W0b3z4~q & ( !\soc_inst|m0_1|u_logic|Wia3z4~q & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout & !\soc_inst|m0_1|u_logic|Add0~57_sumout ))) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|W0b3z4~q & ( !\soc_inst|m0_1|u_logic|Wia3z4~q & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout & (\soc_inst|m0_1|u_logic|Tna3z4~q & !\soc_inst|m0_1|u_logic|Add0~57_sumout ))) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Add0~57_sumout ),
+ .datae(!\soc_inst|m0_1|u_logic|W0b3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wia3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jsmvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jsmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jsmvx4~0 .lut_mask = 64'h3B33FBF33F37FFF7;
+defparam \soc_inst|m0_1|u_logic|Jsmvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y13_N50
+dffeas \soc_inst|m0_1|u_logic|W0b3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Jsmvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|W0b3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W0b3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|W0b3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~41 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add0~41_sumout = SUM(( !\soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE_q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~58 ))
+// \soc_inst|m0_1|u_logic|Add0~42 = CARRY(( !\soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE_q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~58 ))
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE_q ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add0~58 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add0~41_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add0~42 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add0~41 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~41 .lut_mask = 64'h000000000000CCCC;
+defparam \soc_inst|m0_1|u_logic|Add0~41 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y9_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Csmvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Csmvx4~0_combout = ( \soc_inst|m0_1|u_logic|Gza3z4~q & ( \soc_inst|m0_1|u_logic|Add0~41_sumout & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((\soc_inst|m0_1|u_logic|Taa3z4~q & \soc_inst|m0_1|u_logic|Mxtvx4~combout ))) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gza3z4~q & ( \soc_inst|m0_1|u_logic|Add0~41_sumout & ( ((\soc_inst|m0_1|u_logic|Taa3z4~q & (\soc_inst|m0_1|u_logic|Tna3z4~q & \soc_inst|m0_1|u_logic|Mxtvx4~combout ))) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gza3z4~q & ( !\soc_inst|m0_1|u_logic|Add0~41_sumout & ( (((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (!\soc_inst|m0_1|u_logic|Mxtvx4~combout )) # (\soc_inst|m0_1|u_logic|Taa3z4~q ))
+// # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gza3z4~q & ( !\soc_inst|m0_1|u_logic|Add0~41_sumout & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # (\soc_inst|m0_1|u_logic|Taa3z4~q
+// )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Taa3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Gza3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add0~41_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Csmvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Csmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Csmvx4~0 .lut_mask = 64'h5F57FFF75557F5F7;
+defparam \soc_inst|m0_1|u_logic|Csmvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y9_N25
+dffeas \soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Csmvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y12_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~65 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add0~65_sumout = SUM(( !\soc_inst|m0_1|u_logic|Qxa3z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~42 ))
+// \soc_inst|m0_1|u_logic|Add0~66 = CARRY(( !\soc_inst|m0_1|u_logic|Qxa3z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~42 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Qxa3z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add0~42 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add0~65_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add0~66 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add0~65 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~65 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~65 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[5] (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hwdata_o [5] = (!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # (\soc_inst|m0_1|u_logic|Eo5wx4~2_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hwdata_o [5]),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hwdata_o[5] .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[5] .lut_mask = 64'hF0FFF0FFF0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[5] .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y11_N38
+dffeas \soc_inst|m0_1|u_logic|Mka3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o [5]),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Mka3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mka3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mka3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vrmvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vrmvx4~0_combout = ( \soc_inst|m0_1|u_logic|Qxa3z4~q & ( \soc_inst|m0_1|u_logic|Mka3z4~q & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Add0~65_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout ))) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qxa3z4~q & ( \soc_inst|m0_1|u_logic|Mka3z4~q & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q & ((!\soc_inst|m0_1|u_logic|Add0~65_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Qxa3z4~q & ( !\soc_inst|m0_1|u_logic|Mka3z4~q & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Add0~65_sumout & !\soc_inst|m0_1|u_logic|Mxtvx4~combout ))) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qxa3z4~q & ( !\soc_inst|m0_1|u_logic|Mka3z4~q & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q & (!\soc_inst|m0_1|u_logic|Add0~65_sumout & !\soc_inst|m0_1|u_logic|Mxtvx4~combout ))) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Add0~65_sumout ),
+ .datad(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Qxa3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mka3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vrmvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vrmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vrmvx4~0 .lut_mask = 64'h7555FDDD7577FDFF;
+defparam \soc_inst|m0_1|u_logic|Vrmvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y11_N49
+dffeas \soc_inst|m0_1|u_logic|Qxa3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Vrmvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Qxa3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qxa3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qxa3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y12_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~89 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add0~89_sumout = SUM(( !\soc_inst|m0_1|u_logic|Z8b3z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~66 ))
+// \soc_inst|m0_1|u_logic|Add0~90 = CARRY(( !\soc_inst|m0_1|u_logic|Z8b3z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~66 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Z8b3z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add0~66 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add0~89_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add0~90 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add0~89 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~89 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~89 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y8_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qtzvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qtzvx4~0_combout = ( \soc_inst|m0_1|u_logic|Uz9wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout & !\soc_inst|m0_1|u_logic|Euzvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Uz9wx4~1_combout & (
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout & !\soc_inst|m0_1|u_logic|Euzvx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Euzvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Uz9wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qtzvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qtzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qtzvx4~0 .lut_mask = 64'h55005500AA00AA00;
+defparam \soc_inst|m0_1|u_logic|Qtzvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y10_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oszvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oszvx4~0_combout = ( \soc_inst|m0_1|u_logic|Qtzvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & (!\soc_inst|m0_1|u_logic|X8zvx4~combout & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Uvzvx4~combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Qtzvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Uvzvx4~combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Qtzvx4~0_combout ),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Oszvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oszvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oszvx4~0 .lut_mask = 64'h8A8A8A008A8A8A00;
+defparam \soc_inst|m0_1|u_logic|Oszvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y8_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luzvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Luzvx4~1_combout = ( \soc_inst|m0_1|u_logic|Uz9wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout & (\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout &
+// ((\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Uz9wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout & ((\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout &
+// (\soc_inst|m0_1|u_logic|Muawx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Uz9wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Luzvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Luzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Luzvx4~1 .lut_mask = 64'h0F550F55550F550F;
+defparam \soc_inst|m0_1|u_logic|Luzvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y8_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luzvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Luzvx4~0_combout = ( \soc_inst|m0_1|u_logic|Euzvx4~0_combout & ( \soc_inst|m0_1|u_logic|Luzvx4~1_combout ) ) # ( \soc_inst|m0_1|u_logic|Euzvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Luzvx4~1_combout & (
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout & !\soc_inst|m0_1|u_logic|Pdi2z4~q )) # (\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Fuawx4~0_combout & ((!\soc_inst|m0_1|u_logic|Pdi2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Euzvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Luzvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Luzvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Luzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Luzvx4~0 .lut_mask = 64'h0000CE0A0000FFFF;
+defparam \soc_inst|m0_1|u_logic|Luzvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Omyvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Omyvx4~0_combout = ( \soc_inst|m0_1|u_logic|B1vvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Wxp2z4~q & (\soc_inst|m0_1|u_logic|C3w2z4~q & (\soc_inst|m0_1|u_logic|O5t2z4~q & !\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|B1vvx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Wxp2z4~q & (\soc_inst|m0_1|u_logic|C3w2z4~q & \soc_inst|m0_1|u_logic|O5t2z4~q ))) # (\soc_inst|m0_1|u_logic|Aok2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|C3w2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Omyvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Omyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Omyvx4~0 .lut_mask = 64'h02FF02FF02000200;
+defparam \soc_inst|m0_1|u_logic|Omyvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Omyvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Omyvx4~1_combout = ( \soc_inst|m0_1|u_logic|Wdxvx4~0_combout & ( \soc_inst|m0_1|u_logic|C8rwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|E6nwx4~0_combout &
+// ((\soc_inst|m0_1|u_logic|Omyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hw2wx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wdxvx4~0_combout & ( \soc_inst|m0_1|u_logic|C8rwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ) #
+// ((!\soc_inst|m0_1|u_logic|E6nwx4~0_combout & \soc_inst|m0_1|u_logic|Omyvx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Wdxvx4~0_combout & ( !\soc_inst|m0_1|u_logic|C8rwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout &
+// ((\soc_inst|m0_1|u_logic|Omyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wdxvx4~0_combout & ( !\soc_inst|m0_1|u_logic|C8rwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout &
+// \soc_inst|m0_1|u_logic|Omyvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Omyvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|C8rwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Omyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Omyvx4~1 .lut_mask = 64'h00AA0AAACCEECEEE;
+defparam \soc_inst|m0_1|u_logic|Omyvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y13_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pcd3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pcd3z4~0_combout = ( !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pcd3z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pcd3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pcd3z4~0 .lut_mask = 64'hFFFFFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Pcd3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y13_N52
+dffeas \soc_inst|m0_1|u_logic|Pcd3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Pcd3z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Pcd3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pcd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pcd3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X25_Y12_N2
+dffeas \soc_inst|m0_1|u_logic|Rsa3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Kpmvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rsa3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rsa3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rsa3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X25_Y12_N25
+dffeas \soc_inst|m0_1|u_logic|U5a3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|U5a3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U5a3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U5a3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M5tvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|M5tvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Kop2z4~q & ( (!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Lz93z4~q & !\soc_inst|m0_1|u_logic|Mjl2z4~q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M5tvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M5tvx4~0 .lut_mask = 64'h0C000C0000000000;
+defparam \soc_inst|m0_1|u_logic|M5tvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y14_N1
+dffeas \soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|L8mvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X29_Y14_N31
+dffeas \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|U9mvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y14_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Txa2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Txa2z4~0_combout = ( !\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~q & (\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Txa2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Txa2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Txa2z4~0 .lut_mask = 64'h0000000000020000;
+defparam \soc_inst|m0_1|u_logic|Txa2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y12_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yz4wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yz4wx4~combout = ( \soc_inst|m0_1|u_logic|K3l2z4~q & ( (\soc_inst|m0_1|u_logic|J6i2z4~q & \soc_inst|m0_1|u_logic|Ts5wx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yz4wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yz4wx4 .lut_mask = 64'h00000000000F000F;
+defparam \soc_inst|m0_1|u_logic|Yz4wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y13_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zyhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zyhvx4~0_combout = ( \soc_inst|m0_1|u_logic|D9ovx4~combout & ( \soc_inst|m0_1|u_logic|Yz4wx4~combout & ( (!\soc_inst|m0_1|u_logic|Rym2z4~q & (!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout
+// ) # (!\soc_inst|m0_1|u_logic|Txa2z4~0_combout )))) # (\soc_inst|m0_1|u_logic|Rym2z4~q & (((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Txa2z4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|D9ovx4~combout & (
+// \soc_inst|m0_1|u_logic|Yz4wx4~combout & ( (\soc_inst|m0_1|u_logic|Rym2z4~q & (\soc_inst|m0_1|u_logic|Bq5wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Txa2z4~0_combout )))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|D9ovx4~combout & ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout & ( (!\soc_inst|m0_1|u_logic|Rym2z4~q & (!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Txa2z4~0_combout )))) # (\soc_inst|m0_1|u_logic|Rym2z4~q & (((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Txa2z4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|D9ovx4~combout & (
+// !\soc_inst|m0_1|u_logic|Yz4wx4~combout & ( (\soc_inst|m0_1|u_logic|Rym2z4~q & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Txa2z4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rym2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Txa2z4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zyhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zyhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zyhvx4~0 .lut_mask = 64'h5550DDD01110DDD0;
+defparam \soc_inst|m0_1|u_logic|Zyhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y13_N56
+dffeas \soc_inst|m0_1|u_logic|Rym2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Zyhvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rym2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rym2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rym2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y12_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zyovx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zyovx4~combout = (\soc_inst|m0_1|u_logic|M5tvx4~0_combout & \soc_inst|m0_1|u_logic|K3l2z4~q )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zyovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zyovx4 .lut_mask = 64'h0033003300330033;
+defparam \soc_inst|m0_1|u_logic|Zyovx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y13_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tqc3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tqc3z4~0_combout = ( \soc_inst|m0_1|u_logic|Zyovx4~combout & ( (!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) # (\soc_inst|m0_1|u_logic|Bq5wx4~0_combout & ((\soc_inst|m0_1|u_logic|Tqc3z4~q ))) )
+// ) # ( !\soc_inst|m0_1|u_logic|Zyovx4~combout & ( \soc_inst|m0_1|u_logic|Tqc3z4~q ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Tqc3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tqc3z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tqc3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tqc3z4~0 .lut_mask = 64'h00FF00FFA0AFA0AF;
+defparam \soc_inst|m0_1|u_logic|Tqc3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y13_N52
+dffeas \soc_inst|m0_1|u_logic|Tqc3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Tqc3z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Tqc3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tqc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tqc3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1pwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|M1pwx4~1_combout = ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout & ( \soc_inst|m0_1|u_logic|Tqc3z4~q & ( (\soc_inst|m0_1|u_logic|Rym2z4~q ) # (\soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout & ( \soc_inst|m0_1|u_logic|Tqc3z4~q & ( \soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) ) # ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Tqc3z4~q & ( \soc_inst|m0_1|u_logic|Rym2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Rym2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Tqc3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|M1pwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M1pwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M1pwx4~1 .lut_mask = 64'h00000F0F55555F5F;
+defparam \soc_inst|m0_1|u_logic|M1pwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y10_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kss2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kss2z4~0_combout = ( !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kss2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kss2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kss2z4~0 .lut_mask = 64'hFFFFFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Kss2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E0uvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|E0uvx4~combout = ( !\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Lz93z4~q & (\soc_inst|m0_1|u_logic|Kop2z4~q & (!\soc_inst|m0_1|u_logic|J6i2z4~q & \soc_inst|m0_1|u_logic|Mjl2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E0uvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E0uvx4 .lut_mask = 64'h0010001000000000;
+defparam \soc_inst|m0_1|u_logic|E0uvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y12_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qztvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qztvx4~combout = (\soc_inst|m0_1|u_logic|E0uvx4~combout & \soc_inst|m0_1|u_logic|K3l2z4~q )
+
+ .dataa(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qztvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qztvx4 .lut_mask = 64'h0055005500550055;
+defparam \soc_inst|m0_1|u_logic|Qztvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y10_N40
+dffeas \soc_inst|m0_1|u_logic|Kss2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Kss2z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Kss2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kss2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kss2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1pwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|M1pwx4~0_combout = ( \soc_inst|m0_1|u_logic|B2uvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Kss2z4~q & (\soc_inst|m0_1|u_logic|Lz93z4~q & ((!\soc_inst|m0_1|u_logic|J6i2z4~q )))) # (\soc_inst|m0_1|u_logic|Kss2z4~q &
+// (((\soc_inst|m0_1|u_logic|Lz93z4~q & !\soc_inst|m0_1|u_logic|J6i2z4~q )) # (\soc_inst|m0_1|u_logic|E0uvx4~combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|B2uvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Kss2z4~q & \soc_inst|m0_1|u_logic|E0uvx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Kss2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|M1pwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M1pwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M1pwx4~0 .lut_mask = 64'h0505050537053705;
+defparam \soc_inst|m0_1|u_logic|M1pwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1pwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|M1pwx4~2_combout = ( !\soc_inst|m0_1|u_logic|M1pwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|M1pwx4~1_combout & ((!\soc_inst|m0_1|u_logic|Mis2z4~q ) # (!\soc_inst|m0_1|u_logic|Qwowx4~combout ))) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Mis2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|M1pwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|M1pwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|M1pwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M1pwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M1pwx4~2 .lut_mask = 64'hFC00FC0000000000;
+defparam \soc_inst|m0_1|u_logic|M1pwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y12_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1pwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|M1pwx4~3_combout = ( \soc_inst|m0_1|u_logic|M1pwx4~2_combout & ( (!\soc_inst|m0_1|u_logic|T4uvx4~0_combout & ((!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|U5a3z4~q )))) #
+// (\soc_inst|m0_1|u_logic|T4uvx4~0_combout & (\soc_inst|m0_1|u_logic|Rsa3z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ) # (\soc_inst|m0_1|u_logic|U5a3z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Rsa3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|U5a3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|M1pwx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|M1pwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M1pwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M1pwx4~3 .lut_mask = 64'h000000008CAF8CAF;
+defparam \soc_inst|m0_1|u_logic|M1pwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y12_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1pwx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|M1pwx4~4_combout = ( \soc_inst|m0_1|u_logic|M1pwx4~3_combout & ( (!\soc_inst|m0_1|u_logic|K7pwx4~combout & ((!\soc_inst|m0_1|u_logic|Pcd3z4~q ) # ((!\soc_inst|m0_1|u_logic|N1uvx4~combout )))) #
+// (\soc_inst|m0_1|u_logic|K7pwx4~combout & (!\soc_inst|m0_1|u_logic|Axm2z4~q & ((!\soc_inst|m0_1|u_logic|Pcd3z4~q ) # (!\soc_inst|m0_1|u_logic|N1uvx4~combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Pcd3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Axm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|M1pwx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|M1pwx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M1pwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M1pwx4~4 .lut_mask = 64'h00000000FAC8FAC8;
+defparam \soc_inst|m0_1|u_logic|M1pwx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X51_Y7_N49
+dffeas \soc_inst|m0_1|u_logic|Nl43z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Nl43z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nl43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nl43z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X51_Y7_N35
+dffeas \soc_inst|m0_1|u_logic|Arn2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Arn2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Arn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Arn2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y7_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|St0wx4~2_combout = ( \soc_inst|m0_1|u_logic|Yaz2z4~q & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Nl43z4~q )) #
+// (\soc_inst|m0_1|u_logic|T1d3z4~q & ((!\soc_inst|m0_1|u_logic|Arn2z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Nl43z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Arn2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|St0wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|St0wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~2 .lut_mask = 64'h0000312000000000;
+defparam \soc_inst|m0_1|u_logic|St0wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y6_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K103z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K103z4~feeder_combout = ( \soc_inst|m0_1|u_logic|Mq0wx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|K103z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K103z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K103z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|K103z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X51_Y6_N53
+dffeas \soc_inst|m0_1|u_logic|K103z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|K103z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|K103z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K103z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K103z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y6_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ey03z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ey03z4~feeder_combout = ( \soc_inst|m0_1|u_logic|Mq0wx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ey03z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ey03z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ey03z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ey03z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X51_Y6_N59
+dffeas \soc_inst|m0_1|u_logic|Ey03z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Ey03z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ey03z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ey03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ey03z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y6_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|St0wx4~4_combout = ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|H3d3z4~q & ((!\soc_inst|m0_1|u_logic|Ey03z4~q ))) #
+// (\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|K103z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|K103z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ey03z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|St0wx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|St0wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~4 .lut_mask = 64'h3202000000000000;
+defparam \soc_inst|m0_1|u_logic|St0wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X51_Y7_N26
+dffeas \soc_inst|m0_1|u_logic|V223z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|V223z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V223z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|V223z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y6_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eun2z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eun2z4~feeder_combout = ( \soc_inst|m0_1|u_logic|Mq0wx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Eun2z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eun2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eun2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Eun2z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X51_Y6_N16
+dffeas \soc_inst|m0_1|u_logic|Eun2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Eun2z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Eun2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eun2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Eun2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y7_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|St0wx4~0_combout = ( \soc_inst|m0_1|u_logic|Yaz2z4~q & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|V223z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|H3d3z4~q & !\soc_inst|m0_1|u_logic|Eun2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|V223z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Eun2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|St0wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|St0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~0 .lut_mask = 64'h3000808000000000;
+defparam \soc_inst|m0_1|u_logic|St0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y7_N13
+dffeas \soc_inst|m0_1|u_logic|Ixn2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ixn2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ixn2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ixn2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y7_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jq1xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jq1xx4~0_combout = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q & ( !\soc_inst|m0_1|u_logic|Ixn2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|T1d3z4~q &
+// !\soc_inst|m0_1|u_logic|M1j2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ixn2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jq1xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jq1xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jq1xx4~0 .lut_mask = 64'h4000000000000000;
+defparam \soc_inst|m0_1|u_logic|Jq1xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y7_N55
+dffeas \soc_inst|m0_1|u_logic|Psn2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Psn2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Psn2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Psn2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X39_Y8_N37
+dffeas \soc_inst|m0_1|u_logic|S2r2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|S2r2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S2r2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|S2r2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y8_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bdwwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bdwwx4~3_combout = ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Rni2z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|S2r2z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|T9v2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T9v2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|S2r2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bdwwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~3 .lut_mask = 64'h0000000032020000;
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X40_Y6_N4
+dffeas \soc_inst|m0_1|u_logic|E1r2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|E1r2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E1r2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|E1r2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y8_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bdwwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bdwwx4~1_combout = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Rni2z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|E1r2z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Ka93z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ka93z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|E1r2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bdwwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~1 .lut_mask = 64'h0000000000000E04;
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y8_N19
+dffeas \soc_inst|m0_1|u_logic|G4r2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|G4r2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G4r2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G4r2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y8_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bdwwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bdwwx4~0_combout = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q & !\soc_inst|m0_1|u_logic|Kw63z4~q )) ) ) )
+// # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q & !\soc_inst|m0_1|u_logic|G4r2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Kw63z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|G4r2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bdwwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~0 .lut_mask = 64'h4400404000000000;
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y8_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bdwwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bdwwx4~2_combout = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|T583z4~q & (\soc_inst|m0_1|u_logic|Rni2z4~q & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) #
+// ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|K0u2z4~q & (\soc_inst|m0_1|u_logic|Rni2z4~q & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T583z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|K0u2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bdwwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~2 .lut_mask = 64'h000000000C000A00;
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y8_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bdwwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bdwwx4~combout = ( !\soc_inst|m0_1|u_logic|Bdwwx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Bdwwx4~3_combout & (!\soc_inst|m0_1|u_logic|Bdwwx4~1_combout & !\soc_inst|m0_1|u_logic|Bdwwx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bdwwx4~3_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Bdwwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Bdwwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Bdwwx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bdwwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bdwwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bdwwx4 .lut_mask = 64'hA000A00000000000;
+defparam \soc_inst|m0_1|u_logic|Bdwwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I30wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|I30wx4~1_combout = ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|R40wx4~combout ) # ((\soc_inst|m0_1|u_logic|Rryvx4~0_combout & \soc_inst|m0_1|u_logic|Bpzvx4~1_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Shyvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Rryvx4~0_combout & \soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Rryvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|I30wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I30wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I30wx4~1 .lut_mask = 64'h000F000FAAAFAAAF;
+defparam \soc_inst|m0_1|u_logic|I30wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y4_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K4mvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K4mvx4~0_combout = ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout & ( \soc_inst|m0_1|u_logic|Jw93z4~q & ( \soc_inst|m0_1|u_logic|Uaj2z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Jw93z4~q & (
+// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Uaj2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|P0pvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Jw93z4~q & ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Jw93z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|K4mvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K4mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K4mvx4~0 .lut_mask = 64'hCCCCCFCF00000F0F;
+defparam \soc_inst|m0_1|u_logic|K4mvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y4_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K4mvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K4mvx4~1_combout = ( \soc_inst|m0_1|u_logic|Fvovx4~combout & ( \soc_inst|m0_1|u_logic|W0pvx4~combout & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout & (\soc_inst|m0_1|u_logic|J4x2z4~q & !\soc_inst|m0_1|u_logic|K4mvx4~0_combout ))
+// ) ) ) # ( !\soc_inst|m0_1|u_logic|Fvovx4~combout & ( \soc_inst|m0_1|u_logic|W0pvx4~combout & ( (\soc_inst|m0_1|u_logic|J4x2z4~q & !\soc_inst|m0_1|u_logic|K4mvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Fvovx4~combout & (
+// !\soc_inst|m0_1|u_logic|W0pvx4~combout & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout & !\soc_inst|m0_1|u_logic|K4mvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fvovx4~combout & ( !\soc_inst|m0_1|u_logic|W0pvx4~combout & (
+// !\soc_inst|m0_1|u_logic|K4mvx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|K4mvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Fvovx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|K4mvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K4mvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K4mvx4~1 .lut_mask = 64'hFF00CC000F000C00;
+defparam \soc_inst|m0_1|u_logic|K4mvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X39_Y4_N31
+dffeas \soc_inst|m0_1|u_logic|Jw93z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|K4mvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Jw93z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jw93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jw93z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y9_N26
+dffeas \soc_inst|m0_1|u_logic|X6m2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|X6m2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X6m2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X6m2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y9_N38
+dffeas \soc_inst|m0_1|u_logic|Gf43z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Gf43z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gf43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gf43z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y11_N49
+dffeas \soc_inst|m0_1|u_logic|Po53z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Po53z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Po53z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Po53z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y9_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D7bwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D7bwx4~0_combout = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & !\soc_inst|m0_1|u_logic|Po53z4~DUPLICATE_q
+// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Gf43z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~q & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Gf43z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Po53z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|D7bwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D7bwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D7bwx4~0 .lut_mask = 64'h0000080800000C00;
+defparam \soc_inst|m0_1|u_logic|D7bwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y11_N35
+dffeas \soc_inst|m0_1|u_logic|X533z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|X533z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X533z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X533z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y11_N14
+dffeas \soc_inst|m0_1|u_logic|Ow13z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ow13z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ow13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ow13z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y11_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D7bwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D7bwx4~1_combout = ( \soc_inst|m0_1|u_logic|Wzy2z4~q & ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( (!\soc_inst|m0_1|u_logic|X533z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~q & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Wzy2z4~q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q & ( (!\soc_inst|m0_1|u_logic|Ow13z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~q & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|X533z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ow13z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|D7bwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D7bwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D7bwx4~1 .lut_mask = 64'h0000C0000000A000;
+defparam \soc_inst|m0_1|u_logic|D7bwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J5m2z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|J5m2z4~feeder_combout = ( \soc_inst|m0_1|u_logic|I30wx4~2_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|J5m2z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J5m2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J5m2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|J5m2z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y13_N38
+dffeas \soc_inst|m0_1|u_logic|J5m2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|J5m2z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|J5m2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J5m2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J5m2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y13_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A9bwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|A9bwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Rni2z4~q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|J5m2z4~q & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|J5m2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|A9bwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|A9bwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A9bwx4~0 .lut_mask = 64'h0000000008000000;
+defparam \soc_inst|m0_1|u_logic|A9bwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y9_N7
+dffeas \soc_inst|m0_1|u_logic|Bv03z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Bv03z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bv03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bv03z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y13_N8
+dffeas \soc_inst|m0_1|u_logic|Hyz2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Hyz2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hyz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hyz2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D7bwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D7bwx4~2_combout = ( !\soc_inst|m0_1|u_logic|Wzy2z4~q & ( !\soc_inst|m0_1|u_logic|Rni2z4~q & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Bv03z4~q )) #
+// (\soc_inst|m0_1|u_logic|Fgm2z4~q & ((!\soc_inst|m0_1|u_logic|Hyz2z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bv03z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Hyz2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|D7bwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D7bwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D7bwx4~2 .lut_mask = 64'h00AC000000000000;
+defparam \soc_inst|m0_1|u_logic|D7bwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y9_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D7bwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D7bwx4~3_combout = ( !\soc_inst|m0_1|u_logic|A9bwx4~0_combout & ( !\soc_inst|m0_1|u_logic|D7bwx4~2_combout & ( (!\soc_inst|m0_1|u_logic|D7bwx4~0_combout & (!\soc_inst|m0_1|u_logic|D7bwx4~1_combout &
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|X6m2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|X6m2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|D7bwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|D7bwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|A9bwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|D7bwx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|D7bwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D7bwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D7bwx4~3 .lut_mask = 64'hC400000000000000;
+defparam \soc_inst|m0_1|u_logic|D7bwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y9_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aqnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Aqnvx4~0_combout = ( \soc_inst|m0_1|u_logic|D7bwx4~3_combout & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Jw93z4~q )) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Ebbwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|D7bwx4~3_combout & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Jw93z4~q ) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|D7bwx4~3_combout & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Jw93z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Xx93z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|D7bwx4~3_combout & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Jw93z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Xx93z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Xx93z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Jw93z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ebbwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|D7bwx4~3_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Aqnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Aqnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aqnvx4~0 .lut_mask = 64'hCCAACCAACCFFCCF0;
+defparam \soc_inst|m0_1|u_logic|Aqnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y5_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O2bwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O2bwx4~0_combout = ( \soc_inst|m0_1|u_logic|Aqnvx4~0_combout & ( \soc_inst|m0_1|u_logic|Q3bwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout &
+// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aqnvx4~0_combout & ( \soc_inst|m0_1|u_logic|Q3bwx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Aqnvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Q3bwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout &
+// ((!\soc_inst|m0_1|u_logic|Wzawx4~combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aqnvx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Q3bwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Aqnvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Q3bwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|O2bwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O2bwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O2bwx4~0 .lut_mask = 64'hFCFCCA00CFCFAC00;
+defparam \soc_inst|m0_1|u_logic|O2bwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y5_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I30wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|I30wx4~0_combout = ( \soc_inst|m0_1|u_logic|O2bwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Zz8wx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Zz8wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|O2bwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|I30wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I30wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I30wx4~0 .lut_mask = 64'h00000000FFAAFFAA;
+defparam \soc_inst|m0_1|u_logic|I30wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y8_N34
+dffeas \soc_inst|m0_1|u_logic|If33z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|If33z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|If33z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|If33z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y8_N49
+dffeas \soc_inst|m0_1|u_logic|Ay53z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ay53z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ay53z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ay53z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X52_Y7_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|W21wx4~3_combout = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Ay53z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|If33z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|If33z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ay53z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|W21wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W21wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~3 .lut_mask = 64'h1010110000000000;
+defparam \soc_inst|m0_1|u_logic|W21wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y13_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S6nwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S6nwx4~combout = ( !\soc_inst|m0_1|u_logic|Npk2z4~q & ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Wxp2z4~q & (\soc_inst|m0_1|u_logic|Aok2z4~q & \soc_inst|m0_1|u_logic|Ncqvx4~0_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S6nwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S6nwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S6nwx4 .lut_mask = 64'h0005000000000000;
+defparam \soc_inst|m0_1|u_logic|S6nwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Imnwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Imnwx4~combout = ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout & ( \soc_inst|m0_1|u_logic|S1ewx4~0_combout & ( (!\soc_inst|m0_1|u_logic|S6nwx4~combout & ((!\soc_inst|m0_1|u_logic|Wxp2z4~q ) # ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) #
+// (\soc_inst|m0_1|u_logic|Aok2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|E6nwx4~0_combout & ( !\soc_inst|m0_1|u_logic|S1ewx4~0_combout & ( !\soc_inst|m0_1|u_logic|S6nwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|S1ewx4~0_combout & ( (!\soc_inst|m0_1|u_logic|S6nwx4~combout & ((!\soc_inst|m0_1|u_logic|Wxp2z4~q ) # ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # (\soc_inst|m0_1|u_logic|Aok2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|S6nwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|S1ewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Imnwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Imnwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Imnwx4 .lut_mask = 64'hF0B0F0F0F0B00000;
+defparam \soc_inst|m0_1|u_logic|Imnwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y11_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qs7wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qs7wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Pkwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Manwx4~0_combout & !\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qs7wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qs7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qs7wx4~0 .lut_mask = 64'hF000F00000000000;
+defparam \soc_inst|m0_1|u_logic|Qs7wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y11_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qs7wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qs7wx4~1_combout = ( \soc_inst|m0_1|u_logic|Qs7wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qs7wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qs7wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qs7wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qs7wx4~1 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Qs7wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y12_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F8iwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|F8iwx4~0_combout = ( \soc_inst|m0_1|u_logic|E6nwx4~0_combout & ( \soc_inst|m0_1|u_logic|Qs7wx4~1_combout ) ) # ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout & ( \soc_inst|m0_1|u_logic|Qs7wx4~1_combout & (
+// \soc_inst|m0_1|u_logic|Jp3wx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Qs7wx4~1_combout & ( \soc_inst|m0_1|u_logic|Jp3wx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qs7wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F8iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F8iwx4~0 .lut_mask = 64'h0F0F00000F0FFFFF;
+defparam \soc_inst|m0_1|u_logic|F8iwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y13_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pmnwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pmnwx4~combout = ( !\soc_inst|m0_1|u_logic|F8iwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ) # (\soc_inst|m0_1|u_logic|E6nwx4~0_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pmnwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pmnwx4 .lut_mask = 64'hFCFFFCFF00000000;
+defparam \soc_inst|m0_1|u_logic|Pmnwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y6_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E5awx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|E5awx4~0_combout = ( \soc_inst|m0_1|u_logic|Swy2z4~q & ( (!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout & ((!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Y29wx4~combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Swy2z4~q & ( (!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Y29wx4~combout ) # (\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|E5awx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E5awx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E5awx4~0 .lut_mask = 64'hA2A2A2A2A8A8A8A8;
+defparam \soc_inst|m0_1|u_logic|E5awx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X37_Y13_N26
+dffeas \soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Gehvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~73 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~73_sumout = SUM(( !\soc_inst|m0_1|u_logic|Bnx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~90 ))
+// \soc_inst|m0_1|u_logic|Add2~74 = CARRY(( !\soc_inst|m0_1|u_logic|Bnx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~90 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Bnx2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add2~90 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add2~73_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add2~74 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~73 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~73 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~73 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y13_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~69 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~69_sumout = SUM(( !\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~74 ))
+// \soc_inst|m0_1|u_logic|Add2~70 = CARRY(( !\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~74 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add2~74 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add2~69_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add2~70 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~69 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~69 .lut_mask = 64'h0000FFFF0000AAAA;
+defparam \soc_inst|m0_1|u_logic|Add2~69 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y13_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~65 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~65_sumout = SUM(( !\soc_inst|m0_1|u_logic|B9g3z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~70 ))
+// \soc_inst|m0_1|u_logic|Add2~66 = CARRY(( !\soc_inst|m0_1|u_logic|B9g3z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~70 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|B9g3z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add2~70 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add2~65_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add2~66 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~65 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~65 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~65 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ldhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ldhvx4~0_combout = ( \soc_inst|m0_1|u_logic|S5pvx4~combout & ( \soc_inst|m0_1|u_logic|Add2~65_sumout & ( (!\soc_inst|m0_1|u_logic|B9g3z4~q ) # (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|S5pvx4~combout & ( \soc_inst|m0_1|u_logic|Add2~65_sumout & ( (!\soc_inst|m0_1|u_logic|B9g3z4~q & \soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|S5pvx4~combout & (
+// !\soc_inst|m0_1|u_logic|Add2~65_sumout & ( (!\soc_inst|m0_1|u_logic|B9g3z4~q & \soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|S5pvx4~combout & ( !\soc_inst|m0_1|u_logic|Add2~65_sumout & ( (!\soc_inst|m0_1|u_logic|B9g3z4~q
+// & \soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|B9g3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add2~65_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ldhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ldhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ldhvx4~0 .lut_mask = 64'h222222222222EEEE;
+defparam \soc_inst|m0_1|u_logic|Ldhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y4_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M9awx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|M9awx4~0_combout = ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout & ( \soc_inst|m0_1|u_logic|Y29wx4~combout & ( \soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Y29wx4~combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|M9awx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M9awx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M9awx4~0 .lut_mask = 64'hFFFF000000FF0000;
+defparam \soc_inst|m0_1|u_logic|M9awx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y6_N40
+dffeas \soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y7_N22
+dffeas \soc_inst|m0_1|u_logic|Vgg3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Vgg3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vgg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vgg3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y4_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hk0wx4~3_combout = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q & ((!\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE_q )) #
+// (\soc_inst|m0_1|u_logic|H3d3z4~q & ((!\soc_inst|m0_1|u_logic|Vgg3z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Vgg3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hk0wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~3 .lut_mask = 64'h0000232000000000;
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y6_N19
+dffeas \soc_inst|m0_1|u_logic|Eyg3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Eyg3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eyg3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Eyg3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y4_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xi2xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xi2xx4~0_combout = ( !\soc_inst|m0_1|u_logic|M1j2z4~q & ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( (\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Eyg3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Eyg3z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xi2xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xi2xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xi2xx4~0 .lut_mask = 64'h4000000000000000;
+defparam \soc_inst|m0_1|u_logic|Xi2xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y4_N2
+dffeas \soc_inst|m0_1|u_logic|Olg3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Olg3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Olg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Olg3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y10_N58
+dffeas \soc_inst|m0_1|u_logic|Wrg3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wrg3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wrg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wrg3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y4_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hk0wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Wrg3z4~q & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|Yaz2z4~q &
+// !\soc_inst|m0_1|u_logic|Olg3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Wrg3z4~q & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q & ((!\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|Yaz2z4~q &
+// !\soc_inst|m0_1|u_logic|Olg3z4~q )) # (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Olg3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wrg3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hk0wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~0 .lut_mask = 64'h2820000008000000;
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X48_Y8_N32
+dffeas \soc_inst|m0_1|u_logic|Sog3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Sog3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sog3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sog3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y10_N7
+dffeas \soc_inst|m0_1|u_logic|Ccg3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ccg3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ccg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ccg3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y10_N20
+dffeas \soc_inst|m0_1|u_logic|Nag3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Nag3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nag3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nag3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y10_N8
+dffeas \soc_inst|m0_1|u_logic|Dng3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Dng3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dng3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dng3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y8_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dmvwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dmvwx4~0_combout = ( \soc_inst|m0_1|u_logic|Dng3z4~q & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Nag3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dng3z4~q
+// & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Nag3z4~q & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Dng3z4~q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Sog3z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Ccg3z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dng3z4~q & (
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Sog3z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Ccg3z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ccg3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sog3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Nag3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Dng3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dmvwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dmvwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dmvwx4~0 .lut_mask = 64'h33553355000FFF0F;
+defparam \soc_inst|m0_1|u_logic|Dmvwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X48_Y8_N56
+dffeas \soc_inst|m0_1|u_logic|Hqg3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Hqg3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hqg3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hqg3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y10_N5
+dffeas \soc_inst|m0_1|u_logic|Gfg3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Gfg3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gfg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gfg3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y8_N29
+dffeas \soc_inst|m0_1|u_logic|Rdg3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rdg3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rdg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rdg3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y8_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dmvwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dmvwx4~1_combout = ( \soc_inst|m0_1|u_logic|Rdg3z4~q & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Hqg3z4~DUPLICATE_q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Rdg3z4~q & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Hqg3z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Rdg3z4~q & (
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Wrg3z4~q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Gfg3z4~q ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Rdg3z4~q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Wrg3z4~q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Gfg3z4~q )))
+// ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Hqg3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wrg3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Gfg3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rdg3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dmvwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dmvwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dmvwx4~1 .lut_mask = 64'h330F330F550055FF;
+defparam \soc_inst|m0_1|u_logic|Dmvwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y8_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dmvwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dmvwx4~combout = ( \soc_inst|m0_1|u_logic|Dmvwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Dmvwx4~0_combout & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Dmvwx4~1_combout &
+// ( (\soc_inst|m0_1|u_logic|Rni2z4~q & ((!\soc_inst|m0_1|u_logic|Dmvwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Dmvwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Dmvwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dmvwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dmvwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dmvwx4 .lut_mask = 64'h5550555000500050;
+defparam \soc_inst|m0_1|u_logic|Dmvwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y7_N28
+dffeas \soc_inst|m0_1|u_logic|Kig3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Kig3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kig3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kig3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y7_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu82z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xu82z4~0_combout = ( !\soc_inst|m0_1|u_logic|Vgg3z4~q & ( \soc_inst|m0_1|u_logic|Kig3z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (\soc_inst|m0_1|u_logic|Sjj2z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~q &
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Vgg3z4~q & ( !\soc_inst|m0_1|u_logic|Kig3z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Sjj2z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~q &
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vgg3z4~q & ( !\soc_inst|m0_1|u_logic|Kig3z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~q & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Vgg3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kig3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xu82z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xu82z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xu82z4~0 .lut_mask = 64'h0050004000100000;
+defparam \soc_inst|m0_1|u_logic|Xu82z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y5_N2
+dffeas \soc_inst|m0_1|u_logic|Avg3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Avg3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Avg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Avg3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y6_N14
+dffeas \soc_inst|m0_1|u_logic|Ltg3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ltg3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ltg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ltg3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y7_N5
+dffeas \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Rafwx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y6_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu82z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xu82z4~2_combout = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Avg3z4~q )) #
+// (\soc_inst|m0_1|u_logic|Fgm2z4~q & ((!\soc_inst|m0_1|u_logic|Ltg3z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Avg3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ltg3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xu82z4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xu82z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xu82z4~2 .lut_mask = 64'h00000000A0C00000;
+defparam \soc_inst|m0_1|u_logic|Xu82z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y6_N20
+dffeas \soc_inst|m0_1|u_logic|Eyg3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Eyg3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eyg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Eyg3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y6_N41
+dffeas \soc_inst|m0_1|u_logic|Zjg3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Zjg3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zjg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zjg3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y4_N1
+dffeas \soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y6_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu82z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xu82z4~1_combout = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Zjg3z4~q & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+// # ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Zjg3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xu82z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xu82z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xu82z4~1 .lut_mask = 64'h00A0000000880000;
+defparam \soc_inst|m0_1|u_logic|Xu82z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y7_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uw82z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uw82z4~0_combout = ( !\soc_inst|m0_1|u_logic|Pwg3z4~q & ( \soc_inst|m0_1|u_logic|M1j2z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Sjj2z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Pwg3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Uw82z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uw82z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uw82z4~0 .lut_mask = 64'h0000000040000000;
+defparam \soc_inst|m0_1|u_logic|Uw82z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y6_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu82z4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xu82z4~3_combout = ( !\soc_inst|m0_1|u_logic|Xu82z4~1_combout & ( !\soc_inst|m0_1|u_logic|Uw82z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Xu82z4~0_combout & (!\soc_inst|m0_1|u_logic|Xu82z4~2_combout &
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Eyg3z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Xu82z4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Xu82z4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Eyg3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Xu82z4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Uw82z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xu82z4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xu82z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xu82z4~3 .lut_mask = 64'h80A0000000000000;
+defparam \soc_inst|m0_1|u_logic|Xu82z4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y6_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fj0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fj0wx4~0_combout = ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Xu82z4~3_combout ) # (\soc_inst|m0_1|u_logic|Dmvwx4~combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( !\soc_inst|m0_1|u_logic|L7p2z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & (
+// !\soc_inst|m0_1|u_logic|Tzg3z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( !\soc_inst|m0_1|u_logic|L7p2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Dmvwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Tzg3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Xu82z4~3_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|L7p2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fj0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fj0wx4~0 .lut_mask = 64'hFF00CCCCFF00F5F5;
+defparam \soc_inst|m0_1|u_logic|Fj0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sknwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sknwx4~0_combout = ( \soc_inst|m0_1|u_logic|Wxcwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Npk2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sknwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sknwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sknwx4~0 .lut_mask = 64'h00000000F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Sknwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sknwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sknwx4~1_combout = ( \soc_inst|m0_1|u_logic|Fij2z4~q & ( \soc_inst|m0_1|u_logic|Wxp2z4~q & ( (\soc_inst|m0_1|u_logic|Aok2z4~q & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q & (
+// \soc_inst|m0_1|u_logic|Wxp2z4~q & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|Fij2z4~q & ( !\soc_inst|m0_1|u_logic|Wxp2z4~q & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q ) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Fij2z4~q & ( !\soc_inst|m0_1|u_logic|Wxp2z4~q & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sknwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sknwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sknwx4~1 .lut_mask = 64'hF0F0CCFFF0F00033;
+defparam \soc_inst|m0_1|u_logic|Sknwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y11_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yilwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yilwx4~0_combout = ( \soc_inst|m0_1|u_logic|S8ewx4~0_combout & ( (!\soc_inst|m0_1|u_logic|H9iwx4~0_combout & ((!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|S8ewx4~0_combout & ( !\soc_inst|m0_1|u_logic|H9iwx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|H9iwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|S8ewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yilwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yilwx4~0 .lut_mask = 64'hF0F0F0F0C0F0C0F0;
+defparam \soc_inst|m0_1|u_logic|Yilwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sknwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sknwx4~2_combout = ( \soc_inst|m0_1|u_logic|Yilwx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Sknwx4~1_combout & ((!\soc_inst|m0_1|u_logic|Sknwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wxp2z4~q )))) #
+// (\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Sknwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Sknwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sknwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sknwx4~2 .lut_mask = 64'h00000000F733F733;
+defparam \soc_inst|m0_1|u_logic|Sknwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y9_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zetwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zetwx4~combout = ( \soc_inst|m0_1|u_logic|A7ywx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q & \soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|A7ywx4~0_combout & ( (\soc_inst|m0_1|u_logic|Ark2z4~q
+// & \soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|A7ywx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zetwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zetwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zetwx4 .lut_mask = 64'h000F000F00F000F0;
+defparam \soc_inst|m0_1|u_logic|Zetwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y11_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xuxwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xuxwx4~combout = ( \soc_inst|m0_1|u_logic|Oldwx4~0_combout & ( ((\soc_inst|m0_1|u_logic|Mzxwx4~0_combout & (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout & \soc_inst|m0_1|u_logic|Vy7wx4~0_combout ))) #
+// (\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Oldwx4~0_combout & ( \soc_inst|m0_1|u_logic|Z1ewx4~0_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xuxwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xuxwx4 .lut_mask = 64'h00FF00FF01FF01FF;
+defparam \soc_inst|m0_1|u_logic|Xuxwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y12_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mouwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mouwx4~0_combout = ( \soc_inst|m0_1|u_logic|Xuxwx4~combout & ( (\soc_inst|m0_1|u_logic|Fij2z4~q & ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zetwx4~combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Xuxwx4~combout & ( (\soc_inst|m0_1|u_logic|Oldwx4~0_combout & (!\soc_inst|m0_1|u_logic|Zetwx4~combout & \soc_inst|m0_1|u_logic|Fij2z4~q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Zetwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mouwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mouwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mouwx4~0 .lut_mask = 64'h0030003000CF00CF;
+defparam \soc_inst|m0_1|u_logic|Mouwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y9_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T2owx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T2owx4~1_combout = ( \soc_inst|m0_1|u_logic|T2owx4~0_combout & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Lz93z4~q & !\soc_inst|m0_1|u_logic|Mjl2z4~q )) )
+// ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|T2owx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T2owx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T2owx4~1 .lut_mask = 64'h0000000000002020;
+defparam \soc_inst|m0_1|u_logic|T2owx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y6_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~77 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~77_sumout = SUM(( !\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~82 ))
+// \soc_inst|m0_1|u_logic|Add3~78 = CARRY(( !\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~82 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add3~82 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add3~77_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add3~78 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add3~77 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~77 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~77 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X50_Y9_N49
+dffeas \soc_inst|m0_1|u_logic|M413z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|M413z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M413z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M413z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y6_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S703z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S703z4~feeder_combout = ( \soc_inst|m0_1|u_logic|Qd1wx4~1_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S703z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S703z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S703z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|S703z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X51_Y6_N37
+dffeas \soc_inst|m0_1|u_logic|S703z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|S703z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|S703z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S703z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|S703z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y6_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9a2z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U9a2z4~2_combout = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// (!\soc_inst|m0_1|u_logic|M413z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Fgm2z4~q & ((!\soc_inst|m0_1|u_logic|S703z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|M413z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|S703z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U9a2z4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U9a2z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U9a2z4~2 .lut_mask = 64'h00000000AC000000;
+defparam \soc_inst|m0_1|u_logic|U9a2z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y6_N14
+dffeas \soc_inst|m0_1|u_logic|Zgr2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Zgr2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zgr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zgr2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y6_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rba2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rba2z4~0_combout = ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Zgr2z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q &
+// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Zgr2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rba2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rba2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rba2z4~0 .lut_mask = 64'h1000000000000000;
+defparam \soc_inst|m0_1|u_logic|Rba2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X50_Y9_N35
+dffeas \soc_inst|m0_1|u_logic|Bk33z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Bk33z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bk33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bk33z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y10_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9a2z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U9a2z4~1_combout = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q & (!\soc_inst|m0_1|u_logic|Sa23z4~q )) #
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q & ((!\soc_inst|m0_1|u_logic|Bk33z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sa23z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Bk33z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U9a2z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U9a2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U9a2z4~1 .lut_mask = 64'h00008C8000000000;
+defparam \soc_inst|m0_1|u_logic|U9a2z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y10_N29
+dffeas \soc_inst|m0_1|u_logic|Kt43z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Kt43z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kt43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kt43z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y10_N55
+dffeas \soc_inst|m0_1|u_logic|T263z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|T263z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T263z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T263z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y10_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9a2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U9a2z4~0_combout = ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q & (!\soc_inst|m0_1|u_logic|T263z4~q & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Fgm2z4~q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Kt43z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~q & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Kt43z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|T263z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U9a2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U9a2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U9a2z4~0 .lut_mask = 64'h0000220000003000;
+defparam \soc_inst|m0_1|u_logic|U9a2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y6_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9a2z4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U9a2z4~3_combout = ( !\soc_inst|m0_1|u_logic|U9a2z4~1_combout & ( !\soc_inst|m0_1|u_logic|U9a2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|U9a2z4~2_combout & (!\soc_inst|m0_1|u_logic|Rba2z4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Oir2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Oir2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|U9a2z4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Rba2z4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|U9a2z4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|U9a2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U9a2z4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U9a2z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U9a2z4~3 .lut_mask = 64'hB000000000000000;
+defparam \soc_inst|m0_1|u_logic|U9a2z4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X50_Y9_N47
+dffeas \soc_inst|m0_1|u_logic|Ll83z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ll83z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ll83z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ll83z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y8_N20
+dffeas \soc_inst|m0_1|u_logic|Cgu2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Cgu2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cgu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cgu2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y8_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H2wwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H2wwx4~2_combout = ( !\soc_inst|m0_1|u_logic|Ll83z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Cgu2z4~q & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ll83z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Cgu2z4~q & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Rni2z4~q &
+// (!\soc_inst|m0_1|u_logic|Fgm2z4~q & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ll83z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Cgu2z4~q & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|Rni2z4~q & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ll83z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Cgu2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H2wwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H2wwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H2wwx4~2 .lut_mask = 64'h1010100000100000;
+defparam \soc_inst|m0_1|u_logic|H2wwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y10_N20
+dffeas \soc_inst|m0_1|u_logic|Kfr2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Kfr2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kfr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kfr2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y10_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H2wwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H2wwx4~0_combout = ( \soc_inst|m0_1|u_logic|Rni2z4~q & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q & ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Kfr2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Cc73z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Kfr2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Cc73z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H2wwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H2wwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H2wwx4~0 .lut_mask = 64'h0000AC0000000000;
+defparam \soc_inst|m0_1|u_logic|H2wwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y12_N25
+dffeas \soc_inst|m0_1|u_logic|Vdr2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Vdr2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vdr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vdr2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y12_N35
+dffeas \soc_inst|m0_1|u_logic|Lpv2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Lpv2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lpv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lpv2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y12_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H2wwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H2wwx4~3_combout = ( \soc_inst|m0_1|u_logic|Rni2z4~q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Vdr2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Lpv2z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Vdr2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Lpv2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H2wwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H2wwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H2wwx4~3 .lut_mask = 64'h0000454000000000;
+defparam \soc_inst|m0_1|u_logic|H2wwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y12_N38
+dffeas \soc_inst|m0_1|u_logic|Rr93z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rr93z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rr93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rr93z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y10_N52
+dffeas \soc_inst|m0_1|u_logic|Gcr2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Gcr2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gcr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gcr2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y12_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H2wwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H2wwx4~1_combout = ( \soc_inst|m0_1|u_logic|Rni2z4~q & ( \soc_inst|m0_1|u_logic|Wzy2z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Gcr2z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Rr93z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rr93z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Gcr2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H2wwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H2wwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H2wwx4~1 .lut_mask = 64'h00000000000000CA;
+defparam \soc_inst|m0_1|u_logic|H2wwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y8_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H2wwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H2wwx4~combout = ( !\soc_inst|m0_1|u_logic|H2wwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|H2wwx4~2_combout & (!\soc_inst|m0_1|u_logic|H2wwx4~0_combout & !\soc_inst|m0_1|u_logic|H2wwx4~3_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|H2wwx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|H2wwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|H2wwx4~3_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|H2wwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H2wwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H2wwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H2wwx4 .lut_mask = 64'hC000C00000000000;
+defparam \soc_inst|m0_1|u_logic|H2wwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y6_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pg1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pg1wx4~0_combout = ( \soc_inst|m0_1|u_logic|U9a2z4~3_combout & ( \soc_inst|m0_1|u_logic|H2wwx4~combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((!\soc_inst|m0_1|u_logic|Wce3z4~q )))) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Dkr2z4~q & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U9a2z4~3_combout & ( \soc_inst|m0_1|u_logic|H2wwx4~combout & (
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((!\soc_inst|m0_1|u_logic|Wce3z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Dkr2z4~q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|U9a2z4~3_combout & ( !\soc_inst|m0_1|u_logic|H2wwx4~combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((!\soc_inst|m0_1|u_logic|Wce3z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Dkr2z4~q
+// ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U9a2z4~3_combout & ( !\soc_inst|m0_1|u_logic|H2wwx4~combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((!\soc_inst|m0_1|u_logic|Wce3z4~q )))) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Dkr2z4~q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Dkr2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wce3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|U9a2z4~3_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|H2wwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pg1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pg1wx4~0 .lut_mask = 64'hCACFCACFCACFCAC0;
+defparam \soc_inst|m0_1|u_logic|Pg1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y5_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cqovx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cqovx4~combout = ( \soc_inst|m0_1|u_logic|Add5~13_sumout & ( \soc_inst|m0_1|u_logic|Pg1wx4~0_combout & ( (((\soc_inst|m0_1|u_logic|Add3~77_sumout & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) #
+// (\soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~13_sumout & ( \soc_inst|m0_1|u_logic|Pg1wx4~0_combout & ( ((\soc_inst|m0_1|u_logic|Add3~77_sumout &
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~13_sumout & ( !\soc_inst|m0_1|u_logic|Pg1wx4~0_combout & ( ((\soc_inst|m0_1|u_logic|Add3~77_sumout &
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~13_sumout & ( !\soc_inst|m0_1|u_logic|Pg1wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Add3~77_sumout &
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Add3~77_sumout ),
+ .datac(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Add5~13_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cqovx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cqovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cqovx4 .lut_mask = 64'h00330F3F55775F7F;
+defparam \soc_inst|m0_1|u_logic|Cqovx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X17_Y5_N2
+dffeas \soc_inst|ram_1|saved_word_address[10] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Cqovx4~combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|ram_1|always1~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|ram_1|saved_word_address [10]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|saved_word_address[10] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[10] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y5_N39
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[10]~10 (
+// Equation(s):
+// \soc_inst|ram_1|memory.raddr_a[10]~10_combout = ( \soc_inst|ram_1|always1~0_combout & ( (!\soc_inst|ram_1|write_cycle~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Cqovx4~combout ))) # (\soc_inst|ram_1|write_cycle~DUPLICATE_q &
+// (\soc_inst|ram_1|saved_word_address [10])) ) ) # ( !\soc_inst|ram_1|always1~0_combout & ( \soc_inst|ram_1|saved_word_address [10] ) )
+
+ .dataa(!\soc_inst|ram_1|saved_word_address [10]),
+ .datab(gnd),
+ .datac(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Cqovx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|always1~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|memory.raddr_a[10]~10_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory.raddr_a[10]~10 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[10]~10 .lut_mask = 64'h5555555505F505F5;
+defparam \soc_inst|ram_1|memory.raddr_a[10]~10 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y5_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~105 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~105_sumout = SUM(( !\soc_inst|m0_1|u_logic|Tme3z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~78 ))
+// \soc_inst|m0_1|u_logic|Add3~106 = CARRY(( !\soc_inst|m0_1|u_logic|Tme3z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~78 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Tme3z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add3~78 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add3~105_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add3~106 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add3~105 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~105 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~105 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y10_N4
+dffeas \soc_inst|m0_1|u_logic|Z0g3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Z0g3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z0g3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z0g3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y8_N32
+dffeas \soc_inst|m0_1|u_logic|Hnr2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Hnr2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hnr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hnr2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y8_N25
+dffeas \soc_inst|m0_1|u_logic|Na73z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Na73z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Na73z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Na73z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y8_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hc1wx4~6_combout = ( \soc_inst|m0_1|u_logic|Yaz2z4~q & ( !\soc_inst|m0_1|u_logic|Svk2z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Na73z4~DUPLICATE_q ))) #
+// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Hnr2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Hnr2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Na73z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hc1wx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~6 .lut_mask = 64'h0000321000000000;
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y12_N52
+dffeas \soc_inst|m0_1|u_logic|D923z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|D923z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D923z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|D923z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y12_N10
+dffeas \soc_inst|m0_1|u_logic|Mi33z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Mi33z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mi33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mi33z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wj83z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wj83z4~feeder_combout = ( \soc_inst|m0_1|u_logic|B91wx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wj83z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wj83z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wj83z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Wj83z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y12_N37
+dffeas \soc_inst|m0_1|u_logic|Wj83z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Wj83z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wj83z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wj83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wj83z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hc1wx4~7_combout = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|T1d3z4~q & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q & (\soc_inst|m0_1|u_logic|Yaz2z4~q & !\soc_inst|m0_1|u_logic|Wj83z4~q )) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Mi33z4~q & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Mi33z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wj83z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hc1wx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~7 .lut_mask = 64'h0000080800000A00;
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y8_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~8 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hc1wx4~8_combout = ( \soc_inst|m0_1|u_logic|D923z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Hc1wx4~7_combout & ( (!\soc_inst|m0_1|u_logic|Hc1wx4~6_combout & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Z0g3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|D923z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Hc1wx4~7_combout & ( (!\soc_inst|m0_1|u_logic|Y91xx4~0_combout & (!\soc_inst|m0_1|u_logic|Hc1wx4~6_combout &
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z0g3z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Z0g3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Hc1wx4~6_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|D923z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Hc1wx4~7_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hc1wx4~8_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~8 .lut_mask = 64'hA020F03000000000;
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y6_N44
+dffeas \soc_inst|m0_1|u_logic|O2g3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|O2g3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O2g3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|O2g3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y9_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X94xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|X94xx4~0_combout = ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q &
+// (!\soc_inst|m0_1|u_logic|T1d3z4~q & !\soc_inst|m0_1|u_logic|O2g3z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|O2g3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|X94xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X94xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X94xx4~0 .lut_mask = 64'h4000000000000000;
+defparam \soc_inst|m0_1|u_logic|X94xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y9_N17
+dffeas \soc_inst|m0_1|u_logic|Kzf3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Kzf3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kzf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kzf3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y11_N52
+dffeas \soc_inst|m0_1|u_logic|Wnv2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wnv2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wnv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wnv2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y10_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hc1wx4~3_combout = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q & ( \soc_inst|m0_1|u_logic|T1d3z4~q & ( (\soc_inst|m0_1|u_logic|Svk2z4~q & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Wnv2z4~q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q & ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( (\soc_inst|m0_1|u_logic|Svk2z4~q & (!\soc_inst|m0_1|u_logic|Kzf3z4~q & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Kzf3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wnv2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hc1wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~3 .lut_mask = 64'h4040000005000000;
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X40_Y12_N49
+dffeas \soc_inst|m0_1|u_logic|Vxf3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Vxf3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vxf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vxf3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y10_N59
+dffeas \soc_inst|m0_1|u_logic|Vr43z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Vr43z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vr43z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vr43z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hc1wx4~2_combout = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q & ( \soc_inst|m0_1|u_logic|Svk2z4~q & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Vxf3z4~q & !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Yaz2z4~q & ( !\soc_inst|m0_1|u_logic|Svk2z4~q & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Vr43z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Vxf3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Vr43z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hc1wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~2 .lut_mask = 64'h0000500044000000;
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y8_N11
+dffeas \soc_inst|m0_1|u_logic|Lqr2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Lqr2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lqr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lqr2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y12_N41
+dffeas \soc_inst|m0_1|u_logic|Neu2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Neu2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Neu2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Neu2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hc1wx4~4_combout = ( \soc_inst|m0_1|u_logic|Svk2z4~q & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q & ( (!\soc_inst|m0_1|u_logic|Neu2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|T1d3z4~q & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) )
+// # ( !\soc_inst|m0_1|u_logic|Svk2z4~q & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q & ( (!\soc_inst|m0_1|u_logic|Lqr2z4~q & (\soc_inst|m0_1|u_logic|T1d3z4~q & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lqr2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Neu2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hc1wx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~4 .lut_mask = 64'h0A000C0000000000;
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y12_N4
+dffeas \soc_inst|m0_1|u_logic|E163z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|E163z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E163z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|E163z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y11_N58
+dffeas \soc_inst|m0_1|u_logic|Cq93z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Cq93z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cq93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cq93z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hc1wx4~1_combout = ( \soc_inst|m0_1|u_logic|Svk2z4~q & ( \soc_inst|m0_1|u_logic|Cq93z4~q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|E163z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q &
+// \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~q & ( !\soc_inst|m0_1|u_logic|Cq93z4~q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|E163z4~q ) #
+// (\soc_inst|m0_1|u_logic|T1d3z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|E163z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Cq93z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hc1wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~1 .lut_mask = 64'h0000004500000040;
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y12_N47
+dffeas \soc_inst|m0_1|u_logic|Wor2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wor2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wor2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wor2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hc1wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Svk2z4~q & ( \soc_inst|m0_1|u_logic|Slr2z4~q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|Wor2z4~q & (\soc_inst|m0_1|u_logic|T1d3z4~q &
+// \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q & ( !\soc_inst|m0_1|u_logic|Slr2z4~q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q & ((!\soc_inst|m0_1|u_logic|T1d3z4~q & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))
+// # (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Wor2z4~q & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wor2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Slr2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hc1wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~0 .lut_mask = 64'hA008000000080000;
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y10_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hc1wx4~5_combout = ( !\soc_inst|m0_1|u_logic|Hc1wx4~1_combout & ( !\soc_inst|m0_1|u_logic|Hc1wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|X94xx4~0_combout & (!\soc_inst|m0_1|u_logic|Hc1wx4~3_combout &
+// (!\soc_inst|m0_1|u_logic|Hc1wx4~2_combout & !\soc_inst|m0_1|u_logic|Hc1wx4~4_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|X94xx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Hc1wx4~3_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Hc1wx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hc1wx4~4_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Hc1wx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Hc1wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hc1wx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y10_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hc1wx4~combout = ( \soc_inst|m0_1|u_logic|Hc1wx4~5_combout & ( \soc_inst|m0_1|u_logic|Hc1wx4~8_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Hc1wx4~8_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Hc1wx4~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hc1wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hc1wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Hc1wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y10_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ciawx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ciawx4~0_combout = ( \soc_inst|m0_1|u_logic|Y29wx4~combout & ( (\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Y29wx4~combout & (
+// !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ciawx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ciawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ciawx4~0 .lut_mask = 64'hFF00FF000F000F00;
+defparam \soc_inst|m0_1|u_logic|Ciawx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y10_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ciawx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ciawx4~1_combout = ( \soc_inst|m0_1|u_logic|Hc1wx4~8_combout & ( \soc_inst|m0_1|u_logic|Ciawx4~0_combout & ( (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) #
+// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Hc1wx4~5_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hc1wx4~8_combout & ( \soc_inst|m0_1|u_logic|Ciawx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout &
+// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Hc1wx4~5_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Hc1wx4~8_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ciawx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ciawx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ciawx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ciawx4~1 .lut_mask = 64'h000000000FAF3FBF;
+defparam \soc_inst|m0_1|u_logic|Ciawx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B91wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|B91wx4~1_combout = ( \soc_inst|m0_1|u_logic|Ra1wx4~0_combout & ( \soc_inst|m0_1|u_logic|Ciawx4~1_combout & ( (\soc_inst|m0_1|u_logic|Shyvx4~0_combout & !\soc_inst|m0_1|u_logic|Hc1wx4~combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Ra1wx4~0_combout & ( \soc_inst|m0_1|u_logic|Ciawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout & (((\soc_inst|m0_1|u_logic|Shyvx4~0_combout & !\soc_inst|m0_1|u_logic|Hc1wx4~combout )) #
+// (\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout & (((\soc_inst|m0_1|u_logic|Shyvx4~0_combout & !\soc_inst|m0_1|u_logic|Hc1wx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ra1wx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Ciawx4~1_combout & ( (\soc_inst|m0_1|u_logic|Shyvx4~0_combout & !\soc_inst|m0_1|u_logic|Hc1wx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ra1wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ciawx4~1_combout & (
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout & (((\soc_inst|m0_1|u_logic|Shyvx4~0_combout & !\soc_inst|m0_1|u_logic|Hc1wx4~combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout & (((\soc_inst|m0_1|u_logic|Shyvx4~0_combout &
+// !\soc_inst|m0_1|u_logic|Hc1wx4~combout )) # (\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hc1wx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ciawx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|B91wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B91wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B91wx4~1 .lut_mask = 64'h1F110F002F220F00;
+defparam \soc_inst|m0_1|u_logic|B91wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y6_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~13 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~13_sumout = SUM(( !\soc_inst|m0_1|u_logic|Ejawx4~1_combout $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout &
+// \soc_inst|m0_1|u_logic|Pg1wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~46 ))
+// \soc_inst|m0_1|u_logic|Add5~14 = CARRY(( !\soc_inst|m0_1|u_logic|Ejawx4~1_combout $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout &
+// \soc_inst|m0_1|u_logic|Pg1wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~46 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ejawx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add5~46 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add5~13_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add5~14 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~13 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~13 .lut_mask = 64'h0000FF0F00007788;
+defparam \soc_inst|m0_1|u_logic|Add5~13 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y6_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~17 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~17_sumout = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout & \soc_inst|m0_1|u_logic|Ra1wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Ciawx4~1_combout $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout &
+// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( \soc_inst|m0_1|u_logic|Add5~14 ))
+// \soc_inst|m0_1|u_logic|Add5~18 = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout & \soc_inst|m0_1|u_logic|Ra1wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Ciawx4~1_combout $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout &
+// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( \soc_inst|m0_1|u_logic|Add5~14 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ciawx4~1_combout ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add5~14 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add5~17_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add5~18 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~17 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~17 .lut_mask = 64'h00008877000000F0;
+defparam \soc_inst|m0_1|u_logic|Add5~17 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y12_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B91wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|B91wx4~2_combout = ( \soc_inst|m0_1|u_logic|Add5~17_sumout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & (!\soc_inst|m0_1|u_logic|B91wx4~1_combout & \soc_inst|m0_1|u_logic|Lhyvx4~2_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Add5~17_sumout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & !\soc_inst|m0_1|u_logic|B91wx4~1_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|B91wx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~17_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|B91wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B91wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B91wx4~2 .lut_mask = 64'hC0C0C0C000C000C0;
+defparam \soc_inst|m0_1|u_logic|B91wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y8_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ya1wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ya1wx4~1_combout = ( \soc_inst|m0_1|u_logic|Ciawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout & ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout &
+// (\soc_inst|m0_1|u_logic|X8zvx4~combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Ciawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout & (\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout &
+// ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ciawx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ya1wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ya1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ya1wx4~1 .lut_mask = 64'h272727271B1B1B1B;
+defparam \soc_inst|m0_1|u_logic|Ya1wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y8_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ya1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ya1wx4~0_combout = ( \soc_inst|m0_1|u_logic|Ra1wx4~0_combout & ( \soc_inst|m0_1|u_logic|Ya1wx4~1_combout ) ) # ( \soc_inst|m0_1|u_logic|Ra1wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ya1wx4~1_combout & (
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout & !\soc_inst|m0_1|u_logic|Pdi2z4~q )) # (\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Fuawx4~0_combout & (!\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ya1wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ya1wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ya1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ya1wx4~0 .lut_mask = 64'h0000C0EA0000FFFF;
+defparam \soc_inst|m0_1|u_logic|Ya1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y12_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B91wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|B91wx4~0_combout = ( \soc_inst|m0_1|u_logic|Glnwx4~1_combout & ( \soc_inst|m0_1|u_logic|Mb1wx4~1_combout & ( (\soc_inst|m0_1|u_logic|B91wx4~2_combout & (\soc_inst|m0_1|u_logic|B8nwx4~1_combout &
+// (\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & !\soc_inst|m0_1|u_logic|Ya1wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Glnwx4~1_combout & ( \soc_inst|m0_1|u_logic|Mb1wx4~1_combout & ( (\soc_inst|m0_1|u_logic|B91wx4~2_combout &
+// !\soc_inst|m0_1|u_logic|Ya1wx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|B91wx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ya1wx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mb1wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B91wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B91wx4~0 .lut_mask = 64'h0000000055000100;
+defparam \soc_inst|m0_1|u_logic|B91wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y10_N58
+dffeas \soc_inst|m0_1|u_logic|Vr43z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Vr43z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vr43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vr43z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y10_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I3a2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|I3a2z4~0_combout = ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q & (!\soc_inst|m0_1|u_logic|E163z4~q & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Fgm2z4~q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Vr43z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~q & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vr43z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|E163z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|I3a2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I3a2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I3a2z4~0 .lut_mask = 64'h0000220000003000;
+defparam \soc_inst|m0_1|u_logic|I3a2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y9_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I3a2z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|I3a2z4~2_combout = ( !\soc_inst|m0_1|u_logic|Vxf3z4~q & ( \soc_inst|m0_1|u_logic|Kzf3z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Vxf3z4~q & ( !\soc_inst|m0_1|u_logic|Kzf3z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vxf3z4~q & ( !\soc_inst|m0_1|u_logic|Kzf3z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) )
+// )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Vxf3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kzf3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|I3a2z4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I3a2z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I3a2z4~2 .lut_mask = 64'h0A00080002000000;
+defparam \soc_inst|m0_1|u_logic|I3a2z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y12_N53
+dffeas \soc_inst|m0_1|u_logic|D923z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|D923z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D923z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|D923z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y12_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I3a2z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|I3a2z4~1_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Rni2z4~q & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~q & !\soc_inst|m0_1|u_logic|Mi33z4~q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Rni2z4~q & ( (!\soc_inst|m0_1|u_logic|D923z4~q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|D923z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Mi33z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|I3a2z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I3a2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I3a2z4~1 .lut_mask = 64'h08080C0000000000;
+defparam \soc_inst|m0_1|u_logic|I3a2z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y10_N5
+dffeas \soc_inst|m0_1|u_logic|Z0g3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Z0g3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z0g3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z0g3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y10_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F5a2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|F5a2z4~0_combout = ( !\soc_inst|m0_1|u_logic|Sjj2z4~q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|Z0g3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|M1j2z4~q &
+// !\soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Z0g3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|F5a2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F5a2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F5a2z4~0 .lut_mask = 64'h0000000008000000;
+defparam \soc_inst|m0_1|u_logic|F5a2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y6_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I3a2z4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|I3a2z4~3_combout = ( !\soc_inst|m0_1|u_logic|I3a2z4~1_combout & ( !\soc_inst|m0_1|u_logic|F5a2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|I3a2z4~0_combout & (!\soc_inst|m0_1|u_logic|I3a2z4~2_combout &
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|O2g3z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|I3a2z4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|O2g3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|I3a2z4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|I3a2z4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|F5a2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|I3a2z4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I3a2z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I3a2z4~3 .lut_mask = 64'hA020000000000000;
+defparam \soc_inst|m0_1|u_logic|I3a2z4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y12_N46
+dffeas \soc_inst|m0_1|u_logic|Wor2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wor2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wor2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wor2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y11_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkuwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zkuwx4~3_combout = ( !\soc_inst|m0_1|u_logic|Wnv2z4~q & ( \soc_inst|m0_1|u_logic|Wor2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wnv2z4~q & ( !\soc_inst|m0_1|u_logic|Wor2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wnv2z4~q & ( !\soc_inst|m0_1|u_logic|Wor2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~q & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) )
+// )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wnv2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wor2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zkuwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~3 .lut_mask = 64'h0404040000040000;
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y8_N26
+dffeas \soc_inst|m0_1|u_logic|Na73z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Na73z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Na73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Na73z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y8_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkuwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zkuwx4~0_combout = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Na73z4~q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Lqr2z4~q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Na73z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Lqr2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zkuwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~0 .lut_mask = 64'h00C000A000000000;
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y8_N31
+dffeas \soc_inst|m0_1|u_logic|Hnr2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Hnr2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hnr2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hnr2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y11_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkuwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zkuwx4~1_combout = ( !\soc_inst|m0_1|u_logic|Cq93z4~q & ( \soc_inst|m0_1|u_logic|Hnr2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~q &
+// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Cq93z4~q & ( !\soc_inst|m0_1|u_logic|Hnr2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~q &
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cq93z4~q & ( !\soc_inst|m0_1|u_logic|Hnr2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Cq93z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Hnr2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zkuwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~1 .lut_mask = 64'h0101010000010000;
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y12_N40
+dffeas \soc_inst|m0_1|u_logic|Neu2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Neu2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Neu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Neu2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y12_N38
+dffeas \soc_inst|m0_1|u_logic|Wj83z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Wj83z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wj83z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wj83z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wj83z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y12_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkuwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zkuwx4~2_combout = ( \soc_inst|m0_1|u_logic|Rni2z4~q & ( \soc_inst|m0_1|u_logic|Wzy2z4~q & ( (!\soc_inst|m0_1|u_logic|Wj83z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) ) #
+// ( \soc_inst|m0_1|u_logic|Rni2z4~q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q & ( (!\soc_inst|m0_1|u_logic|Neu2z4~q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Neu2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wj83z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zkuwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~2 .lut_mask = 64'h000000A0000000C0;
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkuwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zkuwx4~combout = ( !\soc_inst|m0_1|u_logic|Zkuwx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Zkuwx4~3_combout & (!\soc_inst|m0_1|u_logic|Zkuwx4~0_combout & !\soc_inst|m0_1|u_logic|Zkuwx4~1_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Zkuwx4~3_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Zkuwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Zkuwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Zkuwx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zkuwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zkuwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zkuwx4 .lut_mask = 64'hA000A00000000000;
+defparam \soc_inst|m0_1|u_logic|Zkuwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y6_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ra1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ra1wx4~0_combout = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( \soc_inst|m0_1|u_logic|Zkuwx4~combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Dkr2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|I3a2z4~3_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( \soc_inst|m0_1|u_logic|Zkuwx4~combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Dkr2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Slr2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( !\soc_inst|m0_1|u_logic|Zkuwx4~combout & ( (!\soc_inst|m0_1|u_logic|Dkr2z4~q
+// ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( !\soc_inst|m0_1|u_logic|Zkuwx4~combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Dkr2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Slr2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Dkr2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Slr2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|I3a2z4~3_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Zkuwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ra1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ra1wx4~0 .lut_mask = 64'hACACAFAFACACAFA0;
+defparam \soc_inst|m0_1|u_logic|Ra1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y5_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|haddr_o~5_combout = ( \soc_inst|m0_1|u_logic|Add5~17_sumout & ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( (((\soc_inst|m0_1|u_logic|Add3~105_sumout & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) #
+// (\soc_inst|m0_1|u_logic|Ra1wx4~0_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~17_sumout & ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( ((\soc_inst|m0_1|u_logic|Add3~105_sumout &
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~17_sumout & ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( ((\soc_inst|m0_1|u_logic|Add3~105_sumout &
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~17_sumout & ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( (\soc_inst|m0_1|u_logic|Add3~105_sumout &
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Add3~105_sumout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Add5~17_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|haddr_o~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|haddr_o~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|haddr_o~5 .lut_mask = 64'h003355770F3F5F7F;
+defparam \soc_inst|m0_1|u_logic|haddr_o~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X19_Y5_N32
+dffeas \soc_inst|ram_1|saved_word_address[11] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|haddr_o~5_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|ram_1|always1~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|ram_1|saved_word_address [11]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|saved_word_address[11] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[11] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y5_N48
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[11]~11 (
+// Equation(s):
+// \soc_inst|ram_1|memory.raddr_a[11]~11_combout = ( \soc_inst|ram_1|always1~0_combout & ( (!\soc_inst|ram_1|write_cycle~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|haddr_o~5_combout ))) # (\soc_inst|ram_1|write_cycle~DUPLICATE_q &
+// (\soc_inst|ram_1|saved_word_address [11])) ) ) # ( !\soc_inst|ram_1|always1~0_combout & ( \soc_inst|ram_1|saved_word_address [11] ) )
+
+ .dataa(!\soc_inst|ram_1|saved_word_address [11]),
+ .datab(!\soc_inst|m0_1|u_logic|haddr_o~5_combout ),
+ .datac(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|always1~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|memory.raddr_a[11]~11_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory.raddr_a[11]~11 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[11]~11 .lut_mask = 64'h5555555535353535;
+defparam \soc_inst|ram_1|memory.raddr_a[11]~11 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y6_N24
+cyclonev_lcell_comb \soc_inst|ram_1|byte3~0 (
+// Equation(s):
+// \soc_inst|ram_1|byte3~0_combout = ( \soc_inst|m0_1|u_logic|T50wx4~0_combout & ( \soc_inst|m0_1|u_logic|N5qvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # (((\soc_inst|m0_1|u_logic|Hdh2z4~1_combout &
+// \soc_inst|m0_1|u_logic|Qr42z4~1_combout )) # (\soc_inst|m0_1|u_logic|It52z4~2_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|T50wx4~0_combout & ( \soc_inst|m0_1|u_logic|N5qvx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout &
+// !\soc_inst|m0_1|u_logic|Qr42z4~1_combout )) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|T50wx4~0_combout & ( !\soc_inst|m0_1|u_logic|N5qvx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout &
+// ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ) # (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout )))) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|T50wx4~0_combout & ( !\soc_inst|m0_1|u_logic|N5qvx4~0_combout & (
+// ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout & !\soc_inst|m0_1|u_logic|Qr42z4~1_combout )) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|byte3~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|byte3~0 .extended_lut = "off";
+defparam \soc_inst|ram_1|byte3~0 .lut_mask = 64'hBB33BBB3BB33BBBF;
+defparam \soc_inst|ram_1|byte3~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y6_N25
+dffeas \soc_inst|ram_1|byte_select[3] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|ram_1|byte3~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|ram_1|always1~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|ram_1|byte_select [3]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|byte_select[3] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|byte_select[3] .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y6_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3awx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O3awx4~0_combout = ( \soc_inst|m0_1|u_logic|W19wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Wzawx4~combout & !\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|W19wx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Wzawx4~combout $ (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O3awx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O3awx4~0 .lut_mask = 64'h0FF00FF00F000F00;
+defparam \soc_inst|m0_1|u_logic|O3awx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y5_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kih2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kih2z4~0_combout = ( \soc_inst|m0_1|u_logic|Rtpvx4~combout & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Rtpvx4~combout & (
+// (!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Rtpvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kih2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kih2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kih2z4~0 .lut_mask = 64'hFFCCFFCCAAFFAAFF;
+defparam \soc_inst|m0_1|u_logic|Kih2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y6_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ehcwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ehcwx4~0_combout = ( \soc_inst|m0_1|u_logic|Xrnvx4~0_combout & ( \soc_inst|m0_1|u_logic|Kih2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|O3awx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Xrnvx4~0_combout & ( \soc_inst|m0_1|u_logic|Kih2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ((!\soc_inst|m0_1|u_logic|O3awx4~0_combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) #
+// (\soc_inst|m0_1|u_logic|O3awx4~0_combout & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Xrnvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Kih2z4~0_combout & ( !\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Xrnvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Kih2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Muawx4~0_combout & !\soc_inst|m0_1|u_logic|Fuawx4~1_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kih2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ehcwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ehcwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ehcwx4~0 .lut_mask = 64'h8888F0F0C088FFF0;
+defparam \soc_inst|m0_1|u_logic|Ehcwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y10_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmawx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rmawx4~0_combout = ( \soc_inst|m0_1|u_logic|Ez8wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ez8wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rmawx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rmawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rmawx4~0 .lut_mask = 64'h0000000005050505;
+defparam \soc_inst|m0_1|u_logic|Rmawx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y6_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mdzvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mdzvx4~0_combout = ( \soc_inst|m0_1|u_logic|Rtpvx4~combout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & ((!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Zei2z4~q ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Rtpvx4~combout & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & ((!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Zei2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Zei2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Rtpvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mdzvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mdzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mdzvx4~0 .lut_mask = 64'hC080C080F0A0F0A0;
+defparam \soc_inst|m0_1|u_logic|Mdzvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y5_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ducvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ducvx4~combout = ( \soc_inst|m0_1|u_logic|Xrnvx4~0_combout ) # ( !\soc_inst|m0_1|u_logic|Xrnvx4~0_combout & ( \soc_inst|m0_1|u_logic|Donvx4~2_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ducvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ducvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ducvx4 .lut_mask = 64'h00FF00FFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ducvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y5_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whh2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Whh2z4~0_combout = ( \soc_inst|m0_1|u_logic|Izpvx4~combout & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Izpvx4~combout & (
+// (!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Izpvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Whh2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Whh2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Whh2z4~0 .lut_mask = 64'hFFCCFFCCF0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|Whh2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y9_N37
+dffeas \soc_inst|m0_1|u_logic|Wqm2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wqm2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wqm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wqm2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y11_N47
+dffeas \soc_inst|m0_1|u_logic|R6v2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|R6v2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R6v2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|R6v2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Svqwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Svqwx4~3_combout = ( \soc_inst|m0_1|u_logic|Rni2z4~q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Wqm2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|R6v2z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wqm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|R6v2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Svqwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Svqwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Svqwx4~3 .lut_mask = 64'h000000000000AC00;
+defparam \soc_inst|m0_1|u_logic|Svqwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y10_N26
+dffeas \soc_inst|m0_1|u_logic|Ixt2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ixt2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ixt2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ixt2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y13_N52
+dffeas \soc_inst|m0_1|u_logic|R283z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|R283z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R283z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|R283z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y10_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Svqwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Svqwx4~2_combout = ( \soc_inst|m0_1|u_logic|Rni2z4~q & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q & (!\soc_inst|m0_1|u_logic|Ixt2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Wzy2z4~q & ((!\soc_inst|m0_1|u_logic|R283z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ixt2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|R283z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Svqwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Svqwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Svqwx4~2 .lut_mask = 64'h000000000000B800;
+defparam \soc_inst|m0_1|u_logic|Svqwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y10_N19
+dffeas \soc_inst|m0_1|u_logic|Ksm2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ksm2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ksm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ksm2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y13_N44
+dffeas \soc_inst|m0_1|u_logic|It63z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|It63z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|It63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|It63z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y10_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Svqwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Svqwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Ksm2z4~q & ( \soc_inst|m0_1|u_logic|It63z4~q & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Wzy2z4~q & (\soc_inst|m0_1|u_logic|Rni2z4~q &
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ksm2z4~q & ( !\soc_inst|m0_1|u_logic|It63z4~q & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Wzy2z4~q & (\soc_inst|m0_1|u_logic|Rni2z4~q &
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ksm2z4~q & ( !\soc_inst|m0_1|u_logic|It63z4~q & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Rni2z4~q & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ksm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|It63z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Svqwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Svqwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Svqwx4~0 .lut_mask = 64'h0A00020008000000;
+defparam \soc_inst|m0_1|u_logic|Svqwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y11_N10
+dffeas \soc_inst|m0_1|u_logic|G493z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|G493z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G493z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G493z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y11_N22
+dffeas \soc_inst|m0_1|u_logic|Ipm2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ipm2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ipm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ipm2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Svqwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Svqwx4~1_combout = ( !\soc_inst|m0_1|u_logic|G493z4~q & ( \soc_inst|m0_1|u_logic|Ipm2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|G493z4~q & ( !\soc_inst|m0_1|u_logic|Ipm2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G493z4~q & ( !\soc_inst|m0_1|u_logic|Ipm2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|G493z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ipm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Svqwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Svqwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Svqwx4~1 .lut_mask = 64'h0011001000010000;
+defparam \soc_inst|m0_1|u_logic|Svqwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y9_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Svqwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Svqwx4~combout = ( !\soc_inst|m0_1|u_logic|Svqwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Svqwx4~3_combout & (!\soc_inst|m0_1|u_logic|Svqwx4~2_combout & !\soc_inst|m0_1|u_logic|Svqwx4~0_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Svqwx4~3_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Svqwx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Svqwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Svqwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Svqwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Svqwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Svqwx4 .lut_mask = 64'hC000C00000000000;
+defparam \soc_inst|m0_1|u_logic|Svqwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y10_N56
+dffeas \soc_inst|m0_1|u_logic|Wyt2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wyt2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wyt2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wyt2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y13_N32
+dffeas \soc_inst|m0_1|u_logic|F483z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|F483z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F483z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F483z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y10_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxuwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qxuwx4~2_combout = ( \soc_inst|m0_1|u_logic|Rni2z4~q & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q & (!\soc_inst|m0_1|u_logic|Wyt2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Wzy2z4~q & ((!\soc_inst|m0_1|u_logic|F483z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wyt2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|F483z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qxuwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~2 .lut_mask = 64'h000000000000AC00;
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y12_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gip2z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gip2z4~feeder_combout = ( \soc_inst|m0_1|u_logic|Yxzvx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gip2z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gip2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gip2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Gip2z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y12_N50
+dffeas \soc_inst|m0_1|u_logic|Gip2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Gip2z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Gip2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gip2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gip2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y11_N32
+dffeas \soc_inst|m0_1|u_logic|F8v2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|F8v2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F8v2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F8v2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y11_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxuwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qxuwx4~3_combout = ( \soc_inst|m0_1|u_logic|Rni2z4~q & ( \soc_inst|m0_1|u_logic|F8v2z4~q & ( (!\soc_inst|m0_1|u_logic|Gip2z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rni2z4~q & ( !\soc_inst|m0_1|u_logic|F8v2z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & ((!\soc_inst|m0_1|u_logic|Gip2z4~q ) #
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Gip2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|F8v2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qxuwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~3 .lut_mask = 64'h0000080C00000800;
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y11_N17
+dffeas \soc_inst|m0_1|u_logic|W893z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|W893z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W893z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|W893z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y11_N37
+dffeas \soc_inst|m0_1|u_logic|Sgp2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Sgp2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sgp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sgp2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxuwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qxuwx4~1_combout = ( !\soc_inst|m0_1|u_logic|W893z4~q & ( \soc_inst|m0_1|u_logic|Sgp2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~q & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|W893z4~q & ( !\soc_inst|m0_1|u_logic|Sgp2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~q & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W893z4~q & ( !\soc_inst|m0_1|u_logic|Sgp2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~q & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|W893z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sgp2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qxuwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~1 .lut_mask = 64'h0011001000010000;
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y10_N8
+dffeas \soc_inst|m0_1|u_logic|Wu63z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wu63z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wu63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wu63z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y10_N17
+dffeas \soc_inst|m0_1|u_logic|Ujp2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ujp2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ujp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ujp2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y10_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxuwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qxuwx4~0_combout = ( \soc_inst|m0_1|u_logic|Wzy2z4~q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Wu63z4~q & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Wzy2z4~q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q & (\soc_inst|m0_1|u_logic|Rni2z4~q & !\soc_inst|m0_1|u_logic|Ujp2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wu63z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ujp2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qxuwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~0 .lut_mask = 64'h0A00080800000000;
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y11_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxuwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qxuwx4~combout = ( !\soc_inst|m0_1|u_logic|Qxuwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Qxuwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Qxuwx4~2_combout & !\soc_inst|m0_1|u_logic|Qxuwx4~3_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Qxuwx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qxuwx4~3_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Qxuwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qxuwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qxuwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qxuwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qxuwx4 .lut_mask = 64'hF000000000000000;
+defparam \soc_inst|m0_1|u_logic|Qxuwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y9_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rw7wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rw7wx4~0_combout = ( \soc_inst|m0_1|u_logic|Qxuwx4~combout & ( (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Svqwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qxuwx4~combout & (
+// (\soc_inst|m0_1|u_logic|W4ywx4~0_combout & \soc_inst|m0_1|u_logic|Svqwx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Svqwx4~combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qxuwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rw7wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rw7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rw7wx4~0 .lut_mask = 64'h05050505AFAFAFAF;
+defparam \soc_inst|m0_1|u_logic|Rw7wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y8_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rw7wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rw7wx4~1_combout = ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout & ( \soc_inst|m0_1|u_logic|Rw7wx4~0_combout & ( \soc_inst|m0_1|u_logic|Jmdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout & (
+// \soc_inst|m0_1|u_logic|Rw7wx4~0_combout ) ) # ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout & ( !\soc_inst|m0_1|u_logic|Rw7wx4~0_combout & ( \soc_inst|m0_1|u_logic|Jmdwx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Jmdwx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rw7wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rw7wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rw7wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rw7wx4~1 .lut_mask = 64'h00000F0FFFFF0F0F;
+defparam \soc_inst|m0_1|u_logic|Rw7wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X40_Y9_N16
+dffeas \soc_inst|m0_1|u_logic|Otr2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Otr2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Otr2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Otr2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y9_N14
+dffeas \soc_inst|m0_1|u_logic|Rvv2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rvv2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rvv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rvv2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y9_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lr9wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lr9wx4~3_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Rvv2z4~q & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|Otr2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Otr2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rvv2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lr9wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~3 .lut_mask = 64'h00000000008800C0;
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X40_Y11_N52
+dffeas \soc_inst|m0_1|u_logic|Asr2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Asr2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Asr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Asr2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y9_N20
+dffeas \soc_inst|m0_1|u_logic|Qyc3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Qyc3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qyc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qyc3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y9_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lr9wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lr9wx4~1_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Qyc3z4~q & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|Asr2z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Asr2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Qyc3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lr9wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~1 .lut_mask = 64'h0000000000220030;
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y8_N2
+dffeas \soc_inst|m0_1|u_logic|Imu2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Imu2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Imu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Imu2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X40_Y6_N37
+dffeas \soc_inst|m0_1|u_logic|Rr83z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rr83z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rr83z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rr83z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y8_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lr9wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lr9wx4~2_combout = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Rr83z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q & \soc_inst|m0_1|u_logic|Rni2z4~q
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Imu2z4~q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Imu2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Rr83z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lr9wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~2 .lut_mask = 64'h0000000000A000C0;
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y10_N38
+dffeas \soc_inst|m0_1|u_logic|Ii73z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ii73z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ii73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ii73z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y10_N47
+dffeas \soc_inst|m0_1|u_logic|Cvr2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Cvr2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cvr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cvr2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y10_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lr9wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lr9wx4~0_combout = ( \soc_inst|m0_1|u_logic|Rni2z4~q & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q & ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Cvr2z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Ii73z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ii73z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Cvr2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lr9wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~0 .lut_mask = 64'h0000C0A000000000;
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y9_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lr9wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lr9wx4~combout = ( !\soc_inst|m0_1|u_logic|Lr9wx4~2_combout & ( !\soc_inst|m0_1|u_logic|Lr9wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lr9wx4~3_combout & !\soc_inst|m0_1|u_logic|Lr9wx4~1_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Lr9wx4~3_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lr9wx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Lr9wx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Lr9wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lr9wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lr9wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lr9wx4 .lut_mask = 64'hF000000000000000;
+defparam \soc_inst|m0_1|u_logic|Lr9wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y9_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fkdwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fkdwx4~0_combout = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( \soc_inst|m0_1|u_logic|Lr9wx4~combout ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( \soc_inst|m0_1|u_logic|Bywwx4~combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Bywwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lr9wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fkdwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fkdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fkdwx4~0 .lut_mask = 64'h0F0F0F0F00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Fkdwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y8_N53
+dffeas \soc_inst|m0_1|u_logic|Rhu2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rhu2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rhu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rhu2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X37_Y10_N40
+dffeas \soc_inst|m0_1|u_logic|An83z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|An83z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|An83z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|An83z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y8_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjqwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pjqwx4~2_combout = ( \soc_inst|m0_1|u_logic|Rni2z4~q & ( \soc_inst|m0_1|u_logic|An83z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q
+// & !\soc_inst|m0_1|u_logic|Rhu2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rni2z4~q & ( !\soc_inst|m0_1|u_logic|An83z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q & ((!\soc_inst|m0_1|u_logic|Rhu2z4~q )
+// # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rhu2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|An83z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pjqwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~2 .lut_mask = 64'h0000501000004000;
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y11_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjqwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pjqwx4~1_combout = ( !\soc_inst|m0_1|u_logic|Gt93z4~q & ( \soc_inst|m0_1|u_logic|K7s2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Gt93z4~q & ( !\soc_inst|m0_1|u_logic|K7s2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gt93z4~q & ( !\soc_inst|m0_1|u_logic|K7s2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~q & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Gt93z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|K7s2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pjqwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~1 .lut_mask = 64'h0101010000010000;
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y10_N19
+dffeas \soc_inst|m0_1|u_logic|Z8s2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Z8s2z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Z8s2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z8s2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z8s2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjqwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pjqwx4~3_combout = ( !\soc_inst|m0_1|u_logic|Arv2z4~q & ( \soc_inst|m0_1|u_logic|Z8s2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~q & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Arv2z4~q & ( !\soc_inst|m0_1|u_logic|Z8s2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~q & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Arv2z4~q & ( !\soc_inst|m0_1|u_logic|Z8s2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~q & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Arv2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Z8s2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pjqwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~3 .lut_mask = 64'h0044004000040000;
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y10_N50
+dffeas \soc_inst|m0_1|u_logic|Oas2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Oas2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oas2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Oas2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y10_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjqwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pjqwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Rd73z4~q & ( \soc_inst|m0_1|u_logic|Oas2z4~q & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Wzy2z4~q & (\soc_inst|m0_1|u_logic|Rni2z4~q &
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rd73z4~q & ( !\soc_inst|m0_1|u_logic|Oas2z4~q & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Wzy2z4~q & (\soc_inst|m0_1|u_logic|Rni2z4~q &
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rd73z4~q & ( !\soc_inst|m0_1|u_logic|Oas2z4~q & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Rni2z4~q & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rd73z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Oas2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pjqwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~0 .lut_mask = 64'h0A00080002000000;
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y8_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjqwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pjqwx4~combout = ( !\soc_inst|m0_1|u_logic|Pjqwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Pjqwx4~2_combout & (!\soc_inst|m0_1|u_logic|Pjqwx4~1_combout & !\soc_inst|m0_1|u_logic|Pjqwx4~3_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pjqwx4~2_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Pjqwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Pjqwx4~3_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pjqwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pjqwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pjqwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pjqwx4 .lut_mask = 64'hA000A00000000000;
+defparam \soc_inst|m0_1|u_logic|Pjqwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y8_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nodwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nodwx4~0_combout = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( \soc_inst|m0_1|u_logic|Pjqwx4~combout ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( \soc_inst|m0_1|u_logic|Pybwx4~combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pybwx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Pjqwx4~combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nodwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nodwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nodwx4~0 .lut_mask = 64'h555555550F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Nodwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y9_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nodwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nodwx4~1_combout = ( \soc_inst|m0_1|u_logic|Nodwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fkdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Nodwx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|Fkdwx4~0_combout & \soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Fkdwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nodwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nodwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nodwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nodwx4~1 .lut_mask = 64'h03030303F3F3F3F3;
+defparam \soc_inst|m0_1|u_logic|Nodwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y9_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I7owx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|I7owx4~combout = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout & ( \soc_inst|m0_1|u_logic|T4uvx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|I7owx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I7owx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I7owx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|I7owx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y10_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I2twx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|I2twx4~0_combout = ( \soc_inst|m0_1|u_logic|J6i2z4~q & ( (\soc_inst|m0_1|u_logic|B2uvx4~0_combout & (\soc_inst|m0_1|u_logic|Lstwx4~0_combout & !\soc_inst|m0_1|u_logic|Lz93z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|I2twx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I2twx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I2twx4~0 .lut_mask = 64'h0000000005000500;
+defparam \soc_inst|m0_1|u_logic|I2twx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qfc3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qfc3z4~0_combout = ( \soc_inst|m0_1|u_logic|hwdata_o~20_combout & ( \soc_inst|m0_1|u_logic|Qfc3z4~q ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o~20_combout & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout &
+// ((\soc_inst|m0_1|u_logic|Qfc3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Qfc3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o~20_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qfc3z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qfc3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qfc3z4~0 .lut_mask = 64'h30FC30FC00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Qfc3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y13_N2
+dffeas \soc_inst|m0_1|u_logic|Qfc3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Qfc3z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Qfc3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qfc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qfc3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y14_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pguvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pguvx4~0_combout = ( !\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Uaj2z4~q & ( (!\soc_inst|m0_1|u_logic|Cam2z4~q & (!\soc_inst|m0_1|u_logic|R1w2z4~q & (\soc_inst|m0_1|u_logic|Trq2z4~q &
+// !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pguvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pguvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pguvx4~0 .lut_mask = 64'h0800000000000000;
+defparam \soc_inst|m0_1|u_logic|Pguvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y12_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y1ivx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y1ivx4~0_combout = ( \soc_inst|m0_1|u_logic|D9ovx4~combout & ( \soc_inst|m0_1|u_logic|Yz4wx4~combout & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout & ((!\soc_inst|m0_1|u_logic|hwdata_o~20_combout ) #
+// ((\soc_inst|m0_1|u_logic|Hub3z4~q )))) # (\soc_inst|m0_1|u_logic|Vbovx4~0_combout & (!\soc_inst|m0_1|u_logic|Pguvx4~0_combout & ((!\soc_inst|m0_1|u_logic|hwdata_o~20_combout ) # (\soc_inst|m0_1|u_logic|Hub3z4~q )))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|D9ovx4~combout & ( \soc_inst|m0_1|u_logic|Yz4wx4~combout & ( (\soc_inst|m0_1|u_logic|hwdata_o~20_combout & (\soc_inst|m0_1|u_logic|Hub3z4~q & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Pguvx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|D9ovx4~combout & ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout & ((!\soc_inst|m0_1|u_logic|hwdata_o~20_combout ) #
+// ((\soc_inst|m0_1|u_logic|Hub3z4~q )))) # (\soc_inst|m0_1|u_logic|Vbovx4~0_combout & (!\soc_inst|m0_1|u_logic|Pguvx4~0_combout & ((!\soc_inst|m0_1|u_logic|hwdata_o~20_combout ) # (\soc_inst|m0_1|u_logic|Hub3z4~q )))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|D9ovx4~combout & ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout & ( (\soc_inst|m0_1|u_logic|Hub3z4~q & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|hwdata_o~20_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Hub3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Y1ivx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y1ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y1ivx4~0 .lut_mask = 64'h0F0ACF8A0302CF8A;
+defparam \soc_inst|m0_1|u_logic|Y1ivx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y13_N10
+dffeas \soc_inst|m0_1|u_logic|Hub3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Y1ivx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Hub3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hub3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hub3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ihlwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ihlwx4~0_combout = ( \soc_inst|m0_1|u_logic|Hub3z4~q & ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|Hub3z4~q & ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout & ( (\soc_inst|m0_1|u_logic|M5tvx4~0_combout
+// & \soc_inst|m0_1|u_logic|Qfc3z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Hub3z4~q & ( !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout & ( (\soc_inst|m0_1|u_logic|M5tvx4~0_combout & \soc_inst|m0_1|u_logic|Qfc3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hub3z4~q & (
+// !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout & ( (\soc_inst|m0_1|u_logic|M5tvx4~0_combout & \soc_inst|m0_1|u_logic|Qfc3z4~q ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Qfc3z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Hub3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ihlwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~0 .lut_mask = 64'h030303030303FFFF;
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X22_Y9_N41
+dffeas \soc_inst|switches_1|switch_store[0][3] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\SW[3]~input_o ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|switches_1|always0~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|switches_1|switch_store[0][3]~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[0][3] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[0][3] .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X15_Y9_N27
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[3]~20 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[3]~20_combout = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout & ( \soc_inst|m0_1|u_logic|hwdata_o~20_combout & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & !\soc_inst|ram_1|byte_select [0]) ) )
+// ) # ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout & ( !\soc_inst|m0_1|u_logic|hwdata_o~20_combout & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q ) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout &
+// ( !\soc_inst|m0_1|u_logic|hwdata_o~20_combout & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & \soc_inst|ram_1|byte_select [0]) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .datac(!\soc_inst|ram_1|byte_select [0]),
+ .datad(gnd),
+ .datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o~20_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|data_to_memory[3]~20_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[3]~20 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[3]~20 .lut_mask = 64'h0303333300003030;
+defparam \soc_inst|ram_1|data_to_memory[3]~20 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y9_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny3wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ny3wx4~0_combout = ( \soc_inst|m0_1|u_logic|Gm1wx4~combout & ( \soc_inst|m0_1|u_logic|Pdbwx4~combout & ( (!\soc_inst|m0_1|u_logic|R40wx4~combout & (\soc_inst|m0_1|u_logic|Qr42z4~1_combout &
+// \soc_inst|m0_1|u_logic|Hdh2z4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gm1wx4~combout & ( \soc_inst|m0_1|u_logic|Pdbwx4~combout & ( (\soc_inst|m0_1|u_logic|Qr42z4~1_combout & ((!\soc_inst|m0_1|u_logic|R40wx4~combout ) #
+// (!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Gm1wx4~combout & ( !\soc_inst|m0_1|u_logic|Pdbwx4~combout & ( (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # ((!\soc_inst|m0_1|u_logic|R40wx4~combout &
+// \soc_inst|m0_1|u_logic|Hdh2z4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gm1wx4~combout & ( !\soc_inst|m0_1|u_logic|Pdbwx4~combout & ( (!\soc_inst|m0_1|u_logic|R40wx4~combout ) # ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) #
+// (!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Gm1wx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Pdbwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ny3wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~0 .lut_mask = 64'hFEFECECE32320202;
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y6_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Knvvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Knvvx4~0_combout = ( \soc_inst|m0_1|u_logic|Ny3wx4~0_combout & ( \soc_inst|m0_1|u_logic|Y9t2z4~q ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ny3wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Knvvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Knvvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Knvvx4~0 .lut_mask = 64'h0000000033333333;
+defparam \soc_inst|m0_1|u_logic|Knvvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y6_N45
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[27]~19 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[27]~19_combout = ( \soc_inst|m0_1|u_logic|Knvvx4~0_combout & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ) # (\soc_inst|ram_1|byte_select [3]))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Knvvx4~0_combout & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & (!\soc_inst|ram_1|byte_select [3] & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 )) ) )
+
+ .dataa(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|ram_1|byte_select [3]),
+ .datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Knvvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|data_to_memory[27]~19_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[27]~19 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[27]~19 .lut_mask = 64'h0050005005550555;
+defparam \soc_inst|ram_1|data_to_memory[27]~19 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X5_Y5_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 (
+ .portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|ram_1|data_to_memory[27]~19_combout ,\soc_inst|ram_1|data_to_memory[3]~20_combout }),
+ .portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+ .portabyteenamasks(1'b1),
+ .portbdatain(2'b00),
+ .portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_first_bit_number = 3;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_first_bit_number = 3;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000031C34C0760580BC0621191721DC731D91E11E11A11A11E11E11A1021555555555555559860140500505000000050001410";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y9_N39
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[3]~26 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[3]~26_combout = ( \soc_inst|switches_1|switch_store[0][3]~q & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) #
+// (\soc_inst|interconnect_1|HRDATA[7]~10_combout ) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][3]~q & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout & ( (!\soc_inst|interconnect_1|HRDATA[7]~10_combout &
+// ((!\soc_inst|interconnect_1|HRDATA[25]~1_combout ))) # (\soc_inst|interconnect_1|HRDATA[7]~10_combout & (!\soc_inst|interconnect_1|Equal1~0_combout )) ) ) ) # ( \soc_inst|switches_1|switch_store[0][3]~q & (
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout & ( (!\soc_inst|interconnect_1|HRDATA[7]~10_combout & ((!\soc_inst|interconnect_1|HRDATA[25]~1_combout ))) # (\soc_inst|interconnect_1|HRDATA[7]~10_combout &
+// (\soc_inst|interconnect_1|Equal1~0_combout )) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][3]~q & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout &
+// !\soc_inst|interconnect_1|HRDATA[7]~10_combout ) ) ) )
+
+ .dataa(!\soc_inst|interconnect_1|Equal1~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+ .datad(!\soc_inst|interconnect_1|HRDATA[7]~10_combout ),
+ .datae(!\soc_inst|switches_1|switch_store[0][3]~q ),
+ .dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[3]~26_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[3]~26 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[3]~26 .lut_mask = 64'hF000F055F0AAF0FF;
+defparam \soc_inst|interconnect_1|HRDATA[3]~26 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ihlwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ihlwx4~1_combout = ( !\soc_inst|m0_1|u_logic|B7owx4~combout & ( \soc_inst|interconnect_1|HRDATA[3]~26_combout & ( (!\soc_inst|m0_1|u_logic|I2twx4~0_combout & ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Ihlwx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|B7owx4~combout & ( !\soc_inst|interconnect_1|HRDATA[3]~26_combout & ( (!\soc_inst|m0_1|u_logic|I2twx4~0_combout & ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Ihlwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B7owx4~combout & ( !\soc_inst|interconnect_1|HRDATA[3]~26_combout & ( (!\soc_inst|m0_1|u_logic|I2twx4~0_combout & ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Ihlwx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|I2twx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ihlwx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[3]~26_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ihlwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~1 .lut_mask = 64'hC8C8C8C8C8C80000;
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y13_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ihlwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ihlwx4~2_combout = ( \soc_inst|m0_1|u_logic|Wia3z4~q & ( \soc_inst|m0_1|u_logic|Ihlwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|W0b3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wia3z4~q & (
+// \soc_inst|m0_1|u_logic|Ihlwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|G6owx4~combout & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|W0b3z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|W0b3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Wia3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ihlwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ihlwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~2 .lut_mask = 64'h00000000B0B0BBBB;
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ihlwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ihlwx4~3_combout = ( \soc_inst|m0_1|u_logic|Ihlwx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout & ((\soc_inst|m0_1|u_logic|Nodwx4~1_combout ))) #
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout & (\soc_inst|m0_1|u_logic|Rw7wx4~1_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rw7wx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Nodwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ihlwx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~3 .lut_mask = 64'h00000000F1FDF1FD;
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qfzvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qfzvx4~0_combout = ( \soc_inst|m0_1|u_logic|Rilwx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Whlwx4~3_combout & \soc_inst|m0_1|u_logic|W6iwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Rilwx4~2_combout & (
+// ((!\soc_inst|m0_1|u_logic|Whlwx4~3_combout & \soc_inst|m0_1|u_logic|W6iwx4~combout )) # (\soc_inst|m0_1|u_logic|F8iwx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Whlwx4~3_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Rilwx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qfzvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qfzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qfzvx4~0 .lut_mask = 64'h0FCF0FCF00CC00CC;
+defparam \soc_inst|m0_1|u_logic|Qfzvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y13_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qfzvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qfzvx4~1_combout = ( \soc_inst|m0_1|u_logic|Mjlwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Qfzvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Mjlwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Qfzvx4~0_combout & ( (\soc_inst|m0_1|u_logic|H9iwx4~1_combout & ((!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ))) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Mjlwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qfzvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qfzvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qfzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qfzvx4~1 .lut_mask = 64'h00CFCFCF00000000;
+defparam \soc_inst|m0_1|u_logic|Qfzvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y5_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hrcvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hrcvx4~combout = ( \soc_inst|m0_1|u_logic|Lsnvx4~0_combout ) # ( !\soc_inst|m0_1|u_logic|Lsnvx4~0_combout & ( \soc_inst|m0_1|u_logic|Donvx4~2_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Lsnvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hrcvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hrcvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hrcvx4 .lut_mask = 64'h00FF00FFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Hrcvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y12_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qdtwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qdtwx4~combout = ( \soc_inst|m0_1|u_logic|Xuxwx4~combout & ( (\soc_inst|m0_1|u_logic|Zetwx4~combout & (\soc_inst|m0_1|u_logic|Fij2z4~q & !\soc_inst|m0_1|u_logic|Oldwx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Xuxwx4~combout
+// & ( (\soc_inst|m0_1|u_logic|Fij2z4~q & ((!\soc_inst|m0_1|u_logic|Zetwx4~combout ) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ))) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Zetwx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qdtwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qdtwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qdtwx4 .lut_mask = 64'h0C0F0C0F03000300;
+defparam \soc_inst|m0_1|u_logic|Qdtwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y6_N40
+dffeas \soc_inst|m0_1|u_logic|C3z2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|B3mvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|C3z2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C3z2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|C3z2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y5_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T7cwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T7cwx4~0_combout = ( \soc_inst|m0_1|u_logic|Y29wx4~combout & ( \soc_inst|m0_1|u_logic|R6cwx4~5_combout & ( (!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout & (!\soc_inst|m0_1|u_logic|Qem2z4~q $ (!\soc_inst|m0_1|u_logic|C3z2z4~q ))) )
+// ) ) # ( !\soc_inst|m0_1|u_logic|Y29wx4~combout & ( \soc_inst|m0_1|u_logic|R6cwx4~5_combout & ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ) ) ) # ( \soc_inst|m0_1|u_logic|Y29wx4~combout & ( !\soc_inst|m0_1|u_logic|R6cwx4~5_combout & (
+// (!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout & (!\soc_inst|m0_1|u_logic|Qem2z4~q $ (!\soc_inst|m0_1|u_logic|C3z2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y29wx4~combout & (
+// !\soc_inst|m0_1|u_logic|R6cwx4~5_combout & ( (!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout & !\soc_inst|m0_1|u_logic|W19wx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|C3z2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|R6cwx4~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|T7cwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T7cwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T7cwx4~0 .lut_mask = 64'hAA002800AAAA2828;
+defparam \soc_inst|m0_1|u_logic|T7cwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y11_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Phlwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Phlwx4~0_combout = ( \soc_inst|m0_1|u_logic|E6nwx4~0_combout & ( \soc_inst|m0_1|u_logic|Qs7wx4~1_combout ) ) # ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout & ( \soc_inst|m0_1|u_logic|X77wx4~combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qs7wx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Phlwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Phlwx4~0 .lut_mask = 64'h0F0F0F0F00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Phlwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y6_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T31xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T31xx4~0_combout = ( \soc_inst|m0_1|u_logic|T1d3z4~q & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|T31xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T31xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T31xx4~0 .lut_mask = 64'h0000000000C000C0;
+defparam \soc_inst|m0_1|u_logic|T31xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y6_N53
+dffeas \soc_inst|m0_1|u_logic|C5v2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|C5v2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C5v2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|C5v2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y7_N22
+dffeas \soc_inst|m0_1|u_logic|Tvt2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Tvt2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tvt2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tvt2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y6_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R91xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R91xx4~0_combout = ( \soc_inst|m0_1|u_logic|T1d3z4~q & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q & ( (\soc_inst|m0_1|u_logic|H3d3z4~q & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R91xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R91xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R91xx4~0 .lut_mask = 64'h0000050500000000;
+defparam \soc_inst|m0_1|u_logic|R91xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y6_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eacwx4~0_combout = ( \soc_inst|m0_1|u_logic|R91xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|C5v2z4~q ) # ((\soc_inst|m0_1|u_logic|T31xx4~0_combout & !\soc_inst|m0_1|u_logic|Tvt2z4~q )) ) ) # (
+// !\soc_inst|m0_1|u_logic|R91xx4~0_combout & ( (\soc_inst|m0_1|u_logic|T31xx4~0_combout & !\soc_inst|m0_1|u_logic|Tvt2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|T31xx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|C5v2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Tvt2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|R91xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Eacwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eacwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~0 .lut_mask = 64'h33003300F3F0F3F0;
+defparam \soc_inst|m0_1|u_logic|Eacwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y6_N32
+dffeas \soc_inst|m0_1|u_logic|C183z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|C183z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C183z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|C183z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y5_N49
+dffeas \soc_inst|m0_1|u_logic|Joi3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Joi3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Joi3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Joi3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y7_N43
+dffeas \soc_inst|m0_1|u_logic|Umi3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Umi3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Umi3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Umi3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y5_N35
+dffeas \soc_inst|m0_1|u_logic|Tr63z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Tr63z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tr63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tr63z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y6_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eacwx4~7_combout = ( !\soc_inst|m0_1|u_logic|Tr63z4~q & ( \soc_inst|m0_1|u_logic|R293z4~q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|H3d3z4~q & (\soc_inst|m0_1|u_logic|T1d3z4~q &
+// \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tr63z4~q & ( !\soc_inst|m0_1|u_logic|R293z4~q & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|H3d3z4~q & (\soc_inst|m0_1|u_logic|T1d3z4~q &
+// \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tr63z4~q & ( !\soc_inst|m0_1|u_logic|R293z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q $
+// (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Tr63z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|R293z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Eacwx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eacwx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~7 .lut_mask = 64'h0009000100080000;
+defparam \soc_inst|m0_1|u_logic|Eacwx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y6_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~8 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eacwx4~8_combout = ( !\soc_inst|m0_1|u_logic|Eacwx4~7_combout & ( (!\soc_inst|m0_1|u_logic|C51xx4~0_combout & ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Joi3z4~q )))) #
+// (\soc_inst|m0_1|u_logic|C51xx4~0_combout & (\soc_inst|m0_1|u_logic|Umi3z4~q & ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Joi3z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Joi3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Umi3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Eacwx4~7_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Eacwx4~8_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eacwx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~8 .lut_mask = 64'h8ACF8ACF00000000;
+defparam \soc_inst|m0_1|u_logic|Eacwx4~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y5_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vmj2z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vmj2z4~feeder_combout = ( \soc_inst|m0_1|u_logic|Rqzvx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vmj2z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vmj2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vmj2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Vmj2z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X48_Y5_N26
+dffeas \soc_inst|m0_1|u_logic|Vmj2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Vmj2z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Vmj2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vmj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vmj2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y6_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eacwx4~4_combout = ( !\soc_inst|m0_1|u_logic|Vmj2z4~q & ( \soc_inst|m0_1|u_logic|Q7j2z4~q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Vmj2z4~q & ( !\soc_inst|m0_1|u_logic|Q7j2z4~q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vmj2z4~q & ( !\soc_inst|m0_1|u_logic|Q7j2z4~q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|H3d3z4~q $
+// (\soc_inst|m0_1|u_logic|T1d3z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Vmj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Q7j2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Eacwx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eacwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~4 .lut_mask = 64'h8020800000200000;
+defparam \soc_inst|m0_1|u_logic|Eacwx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X48_Y5_N19
+dffeas \soc_inst|m0_1|u_logic|Jq13z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Jq13z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jq13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jq13z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y5_N17
+dffeas \soc_inst|m0_1|u_logic|F9j2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|F9j2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F9j2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F9j2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y5_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eacwx4~1_combout = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|H3d3z4~q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Jq13z4~q & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) #
+// (\soc_inst|m0_1|u_logic|T1d3z4~q & (((!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|F9j2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Jq13z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|F9j2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Eacwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eacwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~1 .lut_mask = 64'h5808000000000000;
+defparam \soc_inst|m0_1|u_logic|Eacwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y7_N53
+dffeas \soc_inst|m0_1|u_logic|B943z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|B943z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B943z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B943z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y7_N1
+dffeas \soc_inst|m0_1|u_logic|Zpj2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Zpj2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zpj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zpj2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y7_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eacwx4~2_combout = ( !\soc_inst|m0_1|u_logic|B943z4~q & ( \soc_inst|m0_1|u_logic|Zpj2z4~q & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q
+// & !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|B943z4~q & ( !\soc_inst|m0_1|u_logic|Zpj2z4~q & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B943z4~q & ( !\soc_inst|m0_1|u_logic|Zpj2z4~q & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q &
+// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|B943z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Zpj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Eacwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eacwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~2 .lut_mask = 64'h0404000404000000;
+defparam \soc_inst|m0_1|u_logic|Eacwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X48_Y6_N11
+dffeas \soc_inst|m0_1|u_logic|Sz23z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Sz23z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sz23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sz23z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y7_N37
+dffeas \soc_inst|m0_1|u_logic|Ki53z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ki53z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ki53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ki53z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y6_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eacwx4~3_combout = ( !\soc_inst|m0_1|u_logic|Sz23z4~q & ( \soc_inst|m0_1|u_logic|Ki53z4~q & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q &
+// \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sz23z4~q & ( !\soc_inst|m0_1|u_logic|Ki53z4~q & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q &
+// \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sz23z4~q & ( !\soc_inst|m0_1|u_logic|Ki53z4~q & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|T1d3z4~q & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sz23z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ki53z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Eacwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eacwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~3 .lut_mask = 64'h0050001000400000;
+defparam \soc_inst|m0_1|u_logic|Eacwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y5_N10
+dffeas \soc_inst|m0_1|u_logic|Qji3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Qji3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qji3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qji3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y5_N32
+dffeas \soc_inst|m0_1|u_logic|Fli3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Fli3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fli3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fli3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y5_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eacwx4~5_combout = ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|H3d3z4~q & ((!\soc_inst|m0_1|u_logic|Fli3z4~q ))) #
+// (\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Qji3z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qji3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fli3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Eacwx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eacwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~5 .lut_mask = 64'h00CA000000000000;
+defparam \soc_inst|m0_1|u_logic|Eacwx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y6_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eacwx4~6_combout = ( !\soc_inst|m0_1|u_logic|Eacwx4~3_combout & ( !\soc_inst|m0_1|u_logic|Eacwx4~5_combout & ( (!\soc_inst|m0_1|u_logic|Eacwx4~4_combout & (!\soc_inst|m0_1|u_logic|Eacwx4~1_combout &
+// !\soc_inst|m0_1|u_logic|Eacwx4~2_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Eacwx4~4_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Eacwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Eacwx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Eacwx4~3_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Eacwx4~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Eacwx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eacwx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~6 .lut_mask = 64'hA000000000000000;
+defparam \soc_inst|m0_1|u_logic|Eacwx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y6_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~9 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eacwx4~9_combout = ( \soc_inst|m0_1|u_logic|Eacwx4~6_combout & ( (!\soc_inst|m0_1|u_logic|Eacwx4~0_combout & (\soc_inst|m0_1|u_logic|Eacwx4~8_combout & ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|C183z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Eacwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|C183z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Eacwx4~8_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Eacwx4~6_combout ),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Eacwx4~9_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eacwx4~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~9 .lut_mask = 64'h000000A2000000A2;
+defparam \soc_inst|m0_1|u_logic|Eacwx4~9 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y5_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rih2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rih2z4~0_combout = ( \soc_inst|m0_1|u_logic|Eacwx4~9_combout & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Eacwx4~9_combout & (
+// (!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Eacwx4~9_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rih2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rih2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rih2z4~0 .lut_mask = 64'hFCFCFCFCAFAFAFAF;
+defparam \soc_inst|m0_1|u_logic|Rih2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y5_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~61 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~61_sumout = SUM(( !\soc_inst|m0_1|u_logic|B9g3z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~66 ))
+// \soc_inst|m0_1|u_logic|Add3~62 = CARRY(( !\soc_inst|m0_1|u_logic|B9g3z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~66 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|B9g3z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add3~66 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add3~61_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add3~62 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add3~61 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~61 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~61 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y5_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~57 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~57_sumout = SUM(( !\soc_inst|m0_1|u_logic|Foe3z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~62 ))
+// \soc_inst|m0_1|u_logic|Add3~58 = CARRY(( !\soc_inst|m0_1|u_logic|Foe3z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~62 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Foe3z4~q ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add3~62 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add3~57_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add3~58 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add3~57 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~57 .lut_mask = 64'h0000FFFF0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add3~57 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y5_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~101 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~101_sumout = SUM(( !\soc_inst|m0_1|u_logic|Nox2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~58 ))
+// \soc_inst|m0_1|u_logic|Add3~102 = CARRY(( !\soc_inst|m0_1|u_logic|Nox2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~58 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Nox2z4~q ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add3~58 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add3~101_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add3~102 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add3~101 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~101 .lut_mask = 64'h0000FFFF0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add3~101 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y5_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~113 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~113_sumout = SUM(( !\soc_inst|m0_1|u_logic|Kaf3z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~102 ))
+// \soc_inst|m0_1|u_logic|Add3~114 = CARRY(( !\soc_inst|m0_1|u_logic|Kaf3z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~102 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Kaf3z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add3~102 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add3~113_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add3~114 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add3~113 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~113 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~113 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y5_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y92wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y92wx4~combout = ( \soc_inst|m0_1|u_logic|Add3~113_sumout & ( \soc_inst|m0_1|u_logic|Add5~125_sumout & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout & (!\soc_inst|m0_1|u_logic|K1wvx4~combout &
+// ((!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~113_sumout & ( \soc_inst|m0_1|u_logic|Add5~125_sumout & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout &
+// ((!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~113_sumout & ( !\soc_inst|m0_1|u_logic|Add5~125_sumout & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout &
+// ((!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~113_sumout & ( !\soc_inst|m0_1|u_logic|Add5~125_sumout & ( (!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Add3~113_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~125_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Y92wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y92wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y92wx4 .lut_mask = 64'hFFCCAA88F0C0A080;
+defparam \soc_inst|m0_1|u_logic|Y92wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X40_Y5_N26
+dffeas \soc_inst|m0_1|u_logic|B6j2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|K8ivx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|B6j2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B6j2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B6j2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y5_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K8ivx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K8ivx4~0_combout = ( \soc_inst|m0_1|u_logic|B6j2z4~q & ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Y92wx4~combout & (((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # (\soc_inst|m0_1|u_logic|Kaf3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B6j2z4~q & ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Y92wx4~combout &
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Kaf3z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|B6j2z4~q & ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout & (
+// ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # (\soc_inst|m0_1|u_logic|Kaf3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|B6j2z4~q & ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Kaf3z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Y92wx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Kaf3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|B6j2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|K8ivx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K8ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K8ivx4~0 .lut_mask = 64'h00F3FFF300515551;
+defparam \soc_inst|m0_1|u_logic|K8ivx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X40_Y5_N25
+dffeas \soc_inst|m0_1|u_logic|B6j2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|K8ivx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|B6j2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B6j2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B6j2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y5_N50
+dffeas \soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y5_N11
+dffeas \soc_inst|m0_1|u_logic|Qji3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Qji3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qji3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qji3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y5_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P582z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P582z4~2_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// (!\soc_inst|m0_1|u_logic|Fli3z4~q )) # (\soc_inst|m0_1|u_logic|Fgm2z4~q & ((!\soc_inst|m0_1|u_logic|Qji3z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fli3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Qji3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|P582z4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P582z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P582z4~2 .lut_mask = 64'h0000D08000000000;
+defparam \soc_inst|m0_1|u_logic|P582z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y6_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P582z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P582z4~1_combout = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q & ((!\soc_inst|m0_1|u_logic|Jq13z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q & (!\soc_inst|m0_1|u_logic|Sz23z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sz23z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Jq13z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|P582z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P582z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P582z4~1 .lut_mask = 64'h00000000E0400000;
+defparam \soc_inst|m0_1|u_logic|P582z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y7_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P582z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P582z4~0_combout = ( !\soc_inst|m0_1|u_logic|Ki53z4~q & ( \soc_inst|m0_1|u_logic|B943z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (\soc_inst|m0_1|u_logic|Sjj2z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ki53z4~q & ( !\soc_inst|m0_1|u_logic|B943z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Sjj2z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ki53z4~q & ( !\soc_inst|m0_1|u_logic|B943z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ki53z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|B943z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|P582z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P582z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P582z4~0 .lut_mask = 64'h0500040001000000;
+defparam \soc_inst|m0_1|u_logic|P582z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y7_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M782z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|M782z4~0_combout = ( !\soc_inst|m0_1|u_logic|Umi3z4~q & ( \soc_inst|m0_1|u_logic|M1j2z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Umi3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|M782z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M782z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M782z4~0 .lut_mask = 64'h0000000040000000;
+defparam \soc_inst|m0_1|u_logic|M782z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y5_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P582z4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P582z4~3_combout = ( !\soc_inst|m0_1|u_logic|P582z4~0_combout & ( !\soc_inst|m0_1|u_logic|M782z4~0_combout & ( (!\soc_inst|m0_1|u_logic|P582z4~2_combout & (!\soc_inst|m0_1|u_logic|P582z4~1_combout &
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|P582z4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|P582z4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|P582z4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|M782z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|P582z4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P582z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P582z4~3 .lut_mask = 64'hD000000000000000;
+defparam \soc_inst|m0_1|u_logic|P582z4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y5_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gtnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gtnvx4~0_combout = ( \soc_inst|m0_1|u_logic|Mnvwx4~combout & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (\soc_inst|m0_1|u_logic|B6j2z4~DUPLICATE_q )) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((\soc_inst|m0_1|u_logic|P582z4~3_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mnvwx4~combout & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (\soc_inst|m0_1|u_logic|B6j2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Mnvwx4~combout & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((\soc_inst|m0_1|u_logic|B6j2z4~DUPLICATE_q ))) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (\soc_inst|m0_1|u_logic|Q7j2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mnvwx4~combout & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// ((\soc_inst|m0_1|u_logic|B6j2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (\soc_inst|m0_1|u_logic|Q7j2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Q7j2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|B6j2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|P582z4~3_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Mnvwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gtnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gtnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gtnvx4~0 .lut_mask = 64'h353535353030303F;
+defparam \soc_inst|m0_1|u_logic|Gtnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y5_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q9cwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q9cwx4~0_combout = ( \soc_inst|m0_1|u_logic|O3awx4~0_combout & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout & \soc_inst|m0_1|u_logic|Gtnvx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|O3awx4~0_combout & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (\soc_inst|m0_1|u_logic|Rih2z4~0_combout ))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|O3awx4~0_combout & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Gtnvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|O3awx4~0_combout & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Rih2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Gtnvx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )))) # (\soc_inst|m0_1|u_logic|Rih2z4~0_combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) #
+// ((\soc_inst|m0_1|u_logic|Gtnvx4~0_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rih2z4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Gtnvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q9cwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q9cwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q9cwx4~0 .lut_mask = 64'hE4DDF0CC00DD00CC;
+defparam \soc_inst|m0_1|u_logic|Q9cwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y5_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ancvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ancvx4~combout = ( \soc_inst|m0_1|u_logic|Gtnvx4~0_combout ) # ( !\soc_inst|m0_1|u_logic|Gtnvx4~0_combout & ( \soc_inst|m0_1|u_logic|Donvx4~2_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Gtnvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ancvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ancvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ancvx4 .lut_mask = 64'h00FF00FFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ancvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y5_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~125 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~125_sumout = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout & \soc_inst|m0_1|u_logic|Ntnvx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Wzawx4~combout $ (!\soc_inst|m0_1|u_logic|T7cwx4~0_combout ) ) + (
+// \soc_inst|m0_1|u_logic|Add5~2 ))
+// \soc_inst|m0_1|u_logic|Add5~126 = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout & \soc_inst|m0_1|u_logic|Ntnvx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Wzawx4~combout $ (!\soc_inst|m0_1|u_logic|T7cwx4~0_combout ) ) + (
+// \soc_inst|m0_1|u_logic|Add5~2 ))
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|T7cwx4~0_combout ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add5~2 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add5~125_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add5~126 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~125 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~125 .lut_mask = 64'h0000CC33000000F0;
+defparam \soc_inst|m0_1|u_logic|Add5~125 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y5_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~121 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~121_sumout = SUM(( !\soc_inst|m0_1|u_logic|Ancvx4~combout ) + ( (!\soc_inst|m0_1|u_logic|Rih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout & (\soc_inst|m0_1|u_logic|Wzawx4~combout )) #
+// (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout & (!\soc_inst|m0_1|u_logic|Wzawx4~combout & !\soc_inst|m0_1|u_logic|W19wx4~0_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~126 ))
+// \soc_inst|m0_1|u_logic|Add5~122 = CARRY(( !\soc_inst|m0_1|u_logic|Ancvx4~combout ) + ( (!\soc_inst|m0_1|u_logic|Rih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout & (\soc_inst|m0_1|u_logic|Wzawx4~combout )) #
+// (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout & (!\soc_inst|m0_1|u_logic|Wzawx4~combout & !\soc_inst|m0_1|u_logic|W19wx4~0_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~126 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ancvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Rih2z4~0_combout ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add5~126 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add5~121_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add5~122 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~121 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~121 .lut_mask = 64'h0000009D0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add5~121 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y5_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yqzvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yqzvx4~0_combout = ( \soc_inst|m0_1|u_logic|Add5~121_sumout & ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & (\soc_inst|m0_1|u_logic|Q9cwx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Eacwx4~9_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~121_sumout & ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout &
+// (\soc_inst|m0_1|u_logic|Q9cwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Eacwx4~9_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~121_sumout & ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout & (
+// (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & (\soc_inst|m0_1|u_logic|Q9cwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Eacwx4~9_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Q9cwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Eacwx4~9_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Add5~121_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yqzvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yqzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yqzvx4~0 .lut_mask = 64'h2022000020222022;
+defparam \soc_inst|m0_1|u_logic|Yqzvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R3uvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R3uvx4~0_combout = ( \soc_inst|m0_1|u_logic|Oytvx4~combout & ( (\soc_inst|m0_1|u_logic|Tna3z4~q & !\soc_inst|m0_1|u_logic|F2o2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|F2o2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Oytvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R3uvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R3uvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R3uvx4~0 .lut_mask = 64'h0000000030303030;
+defparam \soc_inst|m0_1|u_logic|R3uvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y9_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rbmvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rbmvx4~0_combout = ( \soc_inst|m0_1|u_logic|A5uvx4~0_combout & ( ((\soc_inst|m0_1|u_logic|K3l2z4~q & (!\soc_inst|m0_1|u_logic|Txtvx4~0_combout & \soc_inst|m0_1|u_logic|V3o2z4~q ))) # (\soc_inst|m0_1|u_logic|R3uvx4~0_combout ) )
+// ) # ( !\soc_inst|m0_1|u_logic|A5uvx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Txtvx4~0_combout & \soc_inst|m0_1|u_logic|V3o2z4~q )) # (\soc_inst|m0_1|u_logic|R3uvx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|R3uvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|V3o2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rbmvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rbmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rbmvx4~0 .lut_mask = 64'h33F333F333733373;
+defparam \soc_inst|m0_1|u_logic|Rbmvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y9_N52
+dffeas \soc_inst|m0_1|u_logic|V3o2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Rbmvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|V3o2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V3o2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|V3o2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X22_Y10_N25
+dffeas \soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Owgvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y10_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Owgvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Owgvx4~0_combout = ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout & ( \soc_inst|m0_1|u_logic|Ux4wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q & (((\soc_inst|m0_1|u_logic|Wfuwx4~combout )) #
+// (\soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Ye4wx4~combout & ((\soc_inst|m0_1|u_logic|Wfuwx4~combout ) # (\soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q )))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Vbovx4~0_combout & ( \soc_inst|m0_1|u_logic|Ux4wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Wfuwx4~combout ) # (\soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Ux4wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Ye4wx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Ux4wx4~0_combout & ( \soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Owgvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Owgvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Owgvx4~0 .lut_mask = 64'h333333223F3F3F2A;
+defparam \soc_inst|m0_1|u_logic|Owgvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X22_Y10_N26
+dffeas \soc_inst|m0_1|u_logic|Ywi2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Owgvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ywi2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ywi2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ywi2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6mwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q6mwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Ywi2z4~q & ( !\soc_inst|m0_1|u_logic|U7w2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|U7w2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ywi2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q6mwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q6mwx4~0 .lut_mask = 64'hF0F0F0F000000000;
+defparam \soc_inst|m0_1|u_logic|Q6mwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y5_N52
+dffeas \soc_inst|m0_1|u_logic|R6n2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|R6n2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R6n2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|R6n2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y7_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T83xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T83xx4~0_combout = ( !\soc_inst|m0_1|u_logic|R6n2z4~q & ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q &
+// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|R6n2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|T83xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T83xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T83xx4~0 .lut_mask = 64'h2000000000000000;
+defparam \soc_inst|m0_1|u_logic|T83xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y7_N19
+dffeas \soc_inst|m0_1|u_logic|Dq53z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Dq53z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dq53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dq53z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y4_N34
+dffeas \soc_inst|m0_1|u_logic|L733z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|L733z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L733z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|L733z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y4_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wa0wx4~3_combout = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|H3d3z4~q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Dq53z4~q & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|H3d3z4~q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|L733z4~q & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Dq53z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|L733z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wa0wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~3 .lut_mask = 64'h000000A000000088;
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y7_N50
+dffeas \soc_inst|m0_1|u_logic|Ug43z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ug43z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ug43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ug43z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y8_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J0n2z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|J0n2z4~feeder_combout = ( \soc_inst|m0_1|u_logic|J70wx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|J0n2z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J0n2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J0n2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|J0n2z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y8_N7
+dffeas \soc_inst|m0_1|u_logic|J0n2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|J0n2z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|J0n2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J0n2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J0n2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y7_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wa0wx4~2_combout = ( !\soc_inst|m0_1|u_logic|Ug43z4~q & ( \soc_inst|m0_1|u_logic|J0n2z4~q & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|T1d3z4~q &
+// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ug43z4~q & ( !\soc_inst|m0_1|u_logic|J0n2z4~q & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|T1d3z4~q & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ug43z4~q & ( !\soc_inst|m0_1|u_logic|J0n2z4~q & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q &
+// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ug43z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|J0n2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wa0wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~2 .lut_mask = 64'h0044000400400000;
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X51_Y6_N7
+dffeas \soc_inst|m0_1|u_logic|Pw03z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Pw03z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pw03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pw03z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X51_Y6_N44
+dffeas \soc_inst|m0_1|u_logic|Vzz2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Vzz2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vzz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vzz2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y6_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wa0wx4~4_combout = ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Pw03z4~q )) #
+// (\soc_inst|m0_1|u_logic|H3d3z4~q & ((!\soc_inst|m0_1|u_logic|Vzz2z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pw03z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Vzz2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wa0wx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~4 .lut_mask = 64'h00AC000000000000;
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X48_Y5_N5
+dffeas \soc_inst|m0_1|u_logic|Y1n2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Y1n2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y1n2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y1n2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y4_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wa0wx4~1_combout = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|T1d3z4~q & ( (\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Y1n2z4~q & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+// # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Zfh3z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Y1n2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Zfh3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wa0wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~1 .lut_mask = 64'hA000000040400000;
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y4_N28
+dffeas \soc_inst|m0_1|u_logic|Cy13z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Cy13z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cy13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cy13z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y8_N53
+dffeas \soc_inst|m0_1|u_logic|N3n2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|N3n2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N3n2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|N3n2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y4_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wa0wx4~0_combout = ( \soc_inst|m0_1|u_logic|T1d3z4~q & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|N3n2z4~q )) ) ) )
+// # ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Cy13z4~q & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Cy13z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|N3n2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wa0wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~0 .lut_mask = 64'h0808A00000000000;
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y6_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wa0wx4~5_combout = ( !\soc_inst|m0_1|u_logic|Wa0wx4~1_combout & ( !\soc_inst|m0_1|u_logic|Wa0wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|T83xx4~0_combout & (!\soc_inst|m0_1|u_logic|Wa0wx4~3_combout &
+// (!\soc_inst|m0_1|u_logic|Wa0wx4~2_combout & !\soc_inst|m0_1|u_logic|Wa0wx4~4_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T83xx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Wa0wx4~3_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Wa0wx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wa0wx4~4_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Wa0wx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wa0wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wa0wx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y6_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wa0wx4~combout = ( \soc_inst|m0_1|u_logic|Wa0wx4~5_combout & ( \soc_inst|m0_1|u_logic|Wa0wx4~8_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Wa0wx4~8_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wa0wx4~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wa0wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wa0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Wa0wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y10_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[22]~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout = ( \soc_inst|m0_1|u_logic|Y9t2z4~q & ( \soc_inst|m0_1|u_logic|Wa0wx4~combout & ( (!\soc_inst|m0_1|u_logic|Uvzvx4~combout & \soc_inst|m0_1|u_logic|Qr42z4~1_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Y9t2z4~q & ( \soc_inst|m0_1|u_logic|Wa0wx4~combout & ( !\soc_inst|m0_1|u_logic|Uvzvx4~combout ) ) ) # ( \soc_inst|m0_1|u_logic|Y9t2z4~q & ( !\soc_inst|m0_1|u_logic|Wa0wx4~combout & ( (!\soc_inst|m0_1|u_logic|Uvzvx4~combout ) #
+// (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y9t2z4~q & ( !\soc_inst|m0_1|u_logic|Wa0wx4~combout & ( !\soc_inst|m0_1|u_logic|Uvzvx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wa0wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hwdata_o[22]~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[22]~3 .lut_mask = 64'hAAAAFAFAAAAA0A0A;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[22]~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y12_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K3uvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K3uvx4~0_combout = ( !\soc_inst|m0_1|u_logic|J6i2z4~q & ( (\soc_inst|m0_1|u_logic|Lz93z4~q & (\soc_inst|m0_1|u_logic|Kop2z4~q & (\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Mjl2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|K3uvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K3uvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K3uvx4~0 .lut_mask = 64'h0100010000000000;
+defparam \soc_inst|m0_1|u_logic|K3uvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W2uvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|W2uvx4~combout = ( \soc_inst|m0_1|u_logic|K3uvx4~0_combout & ( \soc_inst|m0_1|u_logic|K3l2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|W2uvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W2uvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W2uvx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|W2uvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y10_N44
+dffeas \soc_inst|m0_1|u_logic|X9n2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|W2uvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|X9n2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X9n2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X9n2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y4_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yhnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yhnvx4~0_combout = ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout & ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout & ( \soc_inst|m0_1|u_logic|Zei2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout & (
+// \soc_inst|m0_1|u_logic|P0pvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Cqo2z4~q ) # (\soc_inst|m0_1|u_logic|Zei2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout & ( !\soc_inst|m0_1|u_logic|P0pvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Cqo2z4~q )
+// ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Zei2z4~q ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Cqo2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yhnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yhnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yhnvx4~0 .lut_mask = 64'hFF000000FF333333;
+defparam \soc_inst|m0_1|u_logic|Yhnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~113 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~113_sumout = SUM(( !\soc_inst|m0_1|u_logic|Xyk2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~118 ))
+// \soc_inst|m0_1|u_logic|Add2~114 = CARRY(( !\soc_inst|m0_1|u_logic|Xyk2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~118 ))
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Xyk2z4~q ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add2~118 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add2~113_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add2~114 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~113 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~113 .lut_mask = 64'h0000FFFF0000CCCC;
+defparam \soc_inst|m0_1|u_logic|Add2~113 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y12_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~77 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~77_sumout = SUM(( !\soc_inst|m0_1|u_logic|Zpx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~114 ))
+// \soc_inst|m0_1|u_logic|Add2~78 = CARRY(( !\soc_inst|m0_1|u_logic|Zpx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~114 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Zpx2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add2~114 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add2~77_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add2~78 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~77 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~77 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~77 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~29 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~29_sumout = SUM(( !\soc_inst|m0_1|u_logic|Lrx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~78 ))
+// \soc_inst|m0_1|u_logic|Add2~30 = CARRY(( !\soc_inst|m0_1|u_logic|Lrx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~78 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Lrx2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add2~78 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add2~29_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add2~30 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~29 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~29 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~29 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y12_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~21 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~21_sumout = SUM(( !\soc_inst|m0_1|u_logic|Xsx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~30 ))
+// \soc_inst|m0_1|u_logic|Add2~22 = CARRY(( !\soc_inst|m0_1|u_logic|Xsx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~30 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Xsx2z4~q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add2~30 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add2~21_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add2~22 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~21 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~21 .lut_mask = 64'h0000FFFF0000AAAA;
+defparam \soc_inst|m0_1|u_logic|Add2~21 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~9 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~9_sumout = SUM(( !\soc_inst|m0_1|u_logic|Jux2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~22 ))
+// \soc_inst|m0_1|u_logic|Add2~10 = CARRY(( !\soc_inst|m0_1|u_logic|Jux2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~22 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Jux2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add2~22 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add2~9_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add2~10 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~9 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~9 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y12_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~13 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~13_sumout = SUM(( !\soc_inst|m0_1|u_logic|Vvx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~10 ))
+// \soc_inst|m0_1|u_logic|Add2~14 = CARRY(( !\soc_inst|m0_1|u_logic|Vvx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~10 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Vvx2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add2~10 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add2~13_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add2~14 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~13 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~13 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~13 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y12_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mhhvx4~0_combout = ( \soc_inst|m0_1|u_logic|Vvx2z4~q & ( (\soc_inst|m0_1|u_logic|S5pvx4~combout & (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & \soc_inst|m0_1|u_logic|Add2~13_sumout )) ) ) # ( !\soc_inst|m0_1|u_logic|Vvx2z4~q & (
+// ((\soc_inst|m0_1|u_logic|S5pvx4~combout & \soc_inst|m0_1|u_logic|Add2~13_sumout )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Add2~13_sumout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Vvx2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mhhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mhhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mhhvx4~0 .lut_mask = 64'h3377337700440044;
+defparam \soc_inst|m0_1|u_logic|Mhhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhhvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mhhvx4~1_combout = ( \soc_inst|m0_1|u_logic|Add5~117_sumout & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout & (!\soc_inst|m0_1|u_logic|Mhhvx4~0_combout & !\soc_inst|m0_1|u_logic|Xdfwx4~combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Add5~117_sumout & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout & !\soc_inst|m0_1|u_logic|Mhhvx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Mhhvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~117_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mhhvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mhhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mhhvx4~1 .lut_mask = 64'hC0C0C0C0C000C000;
+defparam \soc_inst|m0_1|u_logic|Mhhvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y12_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhhvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mhhvx4~2_combout = ( \soc_inst|m0_1|u_logic|Mhhvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((\soc_inst|m0_1|u_logic|Bspvx4~1_combout & !\soc_inst|m0_1|u_logic|R7iwx4~1_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Bspvx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Mhhvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mhhvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mhhvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mhhvx4~2 .lut_mask = 64'h00000000F3F0F3F0;
+defparam \soc_inst|m0_1|u_logic|Mhhvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X35_Y12_N49
+dffeas \soc_inst|m0_1|u_logic|Vvx2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Mhhvx4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Vvx2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vvx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vvx2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y5_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yhnvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yhnvx4~1_combout = ( \soc_inst|m0_1|u_logic|W0pvx4~combout & ( \soc_inst|m0_1|u_logic|haddr_o [29] & ( (!\soc_inst|m0_1|u_logic|Yhnvx4~0_combout & \soc_inst|m0_1|u_logic|Vvx2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|W0pvx4~combout
+// & ( \soc_inst|m0_1|u_logic|haddr_o [29] & ( !\soc_inst|m0_1|u_logic|Yhnvx4~0_combout ) ) ) # ( \soc_inst|m0_1|u_logic|W0pvx4~combout & ( !\soc_inst|m0_1|u_logic|haddr_o [29] & ( (!\soc_inst|m0_1|u_logic|Yhnvx4~0_combout &
+// (\soc_inst|m0_1|u_logic|Vvx2z4~q & !\soc_inst|m0_1|u_logic|R1pvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|W0pvx4~combout & ( !\soc_inst|m0_1|u_logic|haddr_o [29] & ( (!\soc_inst|m0_1|u_logic|Yhnvx4~0_combout &
+// !\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Yhnvx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Vvx2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|haddr_o [29]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yhnvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yhnvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yhnvx4~1 .lut_mask = 64'hAA000A00AAAA0A0A;
+defparam \soc_inst|m0_1|u_logic|Yhnvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X35_Y5_N40
+dffeas \soc_inst|m0_1|u_logic|Cqo2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Yhnvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Cqo2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cqo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cqo2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y8_N53
+dffeas \soc_inst|m0_1|u_logic|Dq73z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Dq73z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dq73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dq73z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y8_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duuwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Duuwx4~2_combout = ( !\soc_inst|m0_1|u_logic|Ukt2z4~q & ( \soc_inst|m0_1|u_logic|Dq73z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ukt2z4~q & ( !\soc_inst|m0_1|u_logic|Dq73z4~q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ukt2z4~q & ( !\soc_inst|m0_1|u_logic|Dq73z4~q & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ukt2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Dq73z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Duuwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Duuwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Duuwx4~2 .lut_mask = 64'h0030001000200000;
+defparam \soc_inst|m0_1|u_logic|Duuwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y10_N22
+dffeas \soc_inst|m0_1|u_logic|Ruj2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ruj2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ruj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ruj2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y9_N43
+dffeas \soc_inst|m0_1|u_logic|Ug63z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ug63z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ug63z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ug63z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y10_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duuwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Duuwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Ruj2z4~q & ( \soc_inst|m0_1|u_logic|Ug63z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Wzy2z4~q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ruj2z4~q & ( !\soc_inst|m0_1|u_logic|Ug63z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Wzy2z4~q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ruj2z4~q & ( !\soc_inst|m0_1|u_logic|Ug63z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) )
+// )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ruj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ug63z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Duuwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Duuwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Duuwx4~0 .lut_mask = 64'h00A0002000800000;
+defparam \soc_inst|m0_1|u_logic|Duuwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y9_N20
+dffeas \soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y9_N26
+dffeas \soc_inst|m0_1|u_logic|Fwj2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Fwj2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fwj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fwj2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y9_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duuwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Duuwx4~1_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Rni2z4~q & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) #
+// ( !\soc_inst|m0_1|u_logic|Sjj2z4~q & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Fwj2z4~q & (\soc_inst|m0_1|u_logic|Rni2z4~q & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fwj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Duuwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Duuwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Duuwx4~1 .lut_mask = 64'h00000000000C000A;
+defparam \soc_inst|m0_1|u_logic|Duuwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y9_N29
+dffeas \soc_inst|m0_1|u_logic|Duu2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Duu2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Duu2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Duu2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y12_N56
+dffeas \soc_inst|m0_1|u_logic|Dtj2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Dtj2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dtj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dtj2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y9_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duuwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Duuwx4~3_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( \soc_inst|m0_1|u_logic|Dtj2z4~q & ( (!\soc_inst|m0_1|u_logic|Duu2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( !\soc_inst|m0_1|u_logic|Dtj2z4~q & ( (!\soc_inst|m0_1|u_logic|Duu2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q & ( !\soc_inst|m0_1|u_logic|Dtj2z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Duu2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Dtj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Duuwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Duuwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Duuwx4~3 .lut_mask = 64'h0030002000000020;
+defparam \soc_inst|m0_1|u_logic|Duuwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y9_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duuwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Duuwx4~combout = ( !\soc_inst|m0_1|u_logic|Duuwx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duuwx4~2_combout & (!\soc_inst|m0_1|u_logic|Duuwx4~0_combout & !\soc_inst|m0_1|u_logic|Duuwx4~1_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Duuwx4~2_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Duuwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Duuwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Duuwx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Duuwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Duuwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Duuwx4 .lut_mask = 64'hA000A00000000000;
+defparam \soc_inst|m0_1|u_logic|Duuwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y9_N58
+dffeas \soc_inst|m0_1|u_logic|Rvu2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rvu2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rvu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rvu2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y9_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cawwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cawwx4~3_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( \soc_inst|m0_1|u_logic|Rni2z4~q & ( (!\soc_inst|m0_1|u_logic|Rvu2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q & ( \soc_inst|m0_1|u_logic|Rni2z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Ejm2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rvu2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ejm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cawwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cawwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cawwx4~3 .lut_mask = 64'h0000000030002020;
+defparam \soc_inst|m0_1|u_logic|Cawwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y9_N53
+dffeas \soc_inst|m0_1|u_logic|Unm2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Unm2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Unm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Unm2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y9_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gmm2z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gmm2z4~feeder_combout = ( \soc_inst|m0_1|u_logic|G5qvx4~1_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gmm2z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gmm2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gmm2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Gmm2z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X48_Y9_N16
+dffeas \soc_inst|m0_1|u_logic|Gmm2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Gmm2z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Gmm2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gmm2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gmm2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y9_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cawwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cawwx4~1_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( \soc_inst|m0_1|u_logic|Rni2z4~q & ( (!\soc_inst|m0_1|u_logic|Unm2z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q & ( \soc_inst|m0_1|u_logic|Rni2z4~q & ( (!\soc_inst|m0_1|u_logic|Gmm2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Unm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Gmm2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cawwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cawwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cawwx4~1 .lut_mask = 64'h00000000000C000A;
+defparam \soc_inst|m0_1|u_logic|Cawwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y8_N31
+dffeas \soc_inst|m0_1|u_logic|Ii63z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ii63z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ii63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ii63z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y8_N14
+dffeas \soc_inst|m0_1|u_logic|Skm2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Skm2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Skm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Skm2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y8_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cawwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cawwx4~0_combout = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Ii63z4~q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Skm2z4~q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ii63z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Skm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cawwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cawwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cawwx4~0 .lut_mask = 64'h00C000A000000000;
+defparam \soc_inst|m0_1|u_logic|Cawwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y8_N40
+dffeas \soc_inst|m0_1|u_logic|Imt2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Imt2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Imt2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Imt2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X40_Y6_N31
+dffeas \soc_inst|m0_1|u_logic|Rr73z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rr73z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rr73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rr73z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y9_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cawwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cawwx4~2_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( \soc_inst|m0_1|u_logic|Rr73z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Imt2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( !\soc_inst|m0_1|u_logic|Rr73z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q & ((!\soc_inst|m0_1|u_logic|Imt2z4~DUPLICATE_q ) #
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Imt2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rr73z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cawwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cawwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cawwx4~2 .lut_mask = 64'h0000440400004000;
+defparam \soc_inst|m0_1|u_logic|Cawwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y9_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cawwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cawwx4~combout = ( !\soc_inst|m0_1|u_logic|Cawwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Cawwx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Cawwx4~3_combout & !\soc_inst|m0_1|u_logic|Cawwx4~1_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Cawwx4~3_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Cawwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Cawwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Cawwx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cawwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cawwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cawwx4 .lut_mask = 64'hF000000000000000;
+defparam \soc_inst|m0_1|u_logic|Cawwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y9_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jiowx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jiowx4~0_combout = ( \soc_inst|m0_1|u_logic|Cawwx4~combout & ( (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Duuwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Cawwx4~combout & (
+// (\soc_inst|m0_1|u_logic|W4ywx4~0_combout & \soc_inst|m0_1|u_logic|Duuwx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Duuwx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Cawwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jiowx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jiowx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jiowx4~0 .lut_mask = 64'h000F000FF0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|Jiowx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X50_Y7_N19
+dffeas \soc_inst|m0_1|u_logic|Gto2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Gto2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gto2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gto2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X50_Y5_N31
+dffeas \soc_inst|m0_1|u_logic|Fxu2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Fxu2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fxu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fxu2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y7_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Saqwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Saqwx4~3_combout = ( \soc_inst|m0_1|u_logic|Fxu2z4~q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Gto2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Sjj2z4~q &
+// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fxu2z4~q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & ((!\soc_inst|m0_1|u_logic|Gto2z4~DUPLICATE_q ) #
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Gto2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fxu2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Saqwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Saqwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Saqwx4~3 .lut_mask = 64'h0045004000000000;
+defparam \soc_inst|m0_1|u_logic|Saqwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X50_Y7_N40
+dffeas \soc_inst|m0_1|u_logic|Uu83z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Uu83z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uu83z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uu83z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y6_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rro2z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rro2z4~feeder_combout = ( \soc_inst|m0_1|u_logic|F6zvx4~1_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rro2z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rro2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rro2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Rro2z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X50_Y6_N40
+dffeas \soc_inst|m0_1|u_logic|Rro2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Rro2z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rro2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rro2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rro2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y7_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Saqwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Saqwx4~1_combout = ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q & ((!\soc_inst|m0_1|u_logic|Rro2z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q & (!\soc_inst|m0_1|u_logic|Uu83z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Uu83z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rro2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Saqwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Saqwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Saqwx4~1 .lut_mask = 64'h0000000000005410;
+defparam \soc_inst|m0_1|u_logic|Saqwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X50_Y7_N53
+dffeas \soc_inst|m0_1|u_logic|Wnt2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wnt2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wnt2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wnt2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y7_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Saqwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Saqwx4~2_combout = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Ft73z4~q & (\soc_inst|m0_1|u_logic|Sjj2z4~q & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Wnt2z4~q & (\soc_inst|m0_1|u_logic|Sjj2z4~q & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wnt2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ft73z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Saqwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Saqwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Saqwx4~2 .lut_mask = 64'h000A0000000C0000;
+defparam \soc_inst|m0_1|u_logic|Saqwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X52_Y7_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wj63z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wj63z4~feeder_combout = ( \soc_inst|m0_1|u_logic|F6zvx4~1_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wj63z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wj63z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wj63z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Wj63z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X52_Y7_N37
+dffeas \soc_inst|m0_1|u_logic|Wj63z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Wj63z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wj63z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wj63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wj63z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y8_N59
+dffeas \soc_inst|m0_1|u_logic|Vuo2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Vuo2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vuo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vuo2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y7_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Saqwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Saqwx4~0_combout = ( \soc_inst|m0_1|u_logic|Rni2z4~q & ( \soc_inst|m0_1|u_logic|Vuo2z4~q & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Wj63z4~q & (!\soc_inst|m0_1|u_logic|Sjj2z4~q &
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rni2z4~q & ( !\soc_inst|m0_1|u_logic|Vuo2z4~q & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Sjj2z4~q & ((!\soc_inst|m0_1|u_logic|Wj63z4~q ) #
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wj63z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Vuo2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Saqwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Saqwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Saqwx4~0 .lut_mask = 64'h0000A08000000080;
+defparam \soc_inst|m0_1|u_logic|Saqwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y7_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Saqwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Saqwx4~combout = ( !\soc_inst|m0_1|u_logic|Saqwx4~2_combout & ( !\soc_inst|m0_1|u_logic|Saqwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Saqwx4~3_combout & !\soc_inst|m0_1|u_logic|Saqwx4~1_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Saqwx4~3_combout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Saqwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Saqwx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Saqwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Saqwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Saqwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Saqwx4 .lut_mask = 64'hAA00000000000000;
+defparam \soc_inst|m0_1|u_logic|Saqwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y7_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kepwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kepwx4~0_combout = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( \soc_inst|m0_1|u_logic|N3ywx4~combout ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( \soc_inst|m0_1|u_logic|Saqwx4~combout ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|N3ywx4~combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Saqwx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kepwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kepwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kepwx4~0 .lut_mask = 64'h00FF00FF33333333;
+defparam \soc_inst|m0_1|u_logic|Kepwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y10_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kepwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kepwx4~1_combout = ( \soc_inst|m0_1|u_logic|Jiowx4~0_combout & ( \soc_inst|m0_1|u_logic|Kepwx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|Jiowx4~0_combout & ( \soc_inst|m0_1|u_logic|Kepwx4~0_combout & (
+// \soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( \soc_inst|m0_1|u_logic|Jiowx4~0_combout & ( !\soc_inst|m0_1|u_logic|Kepwx4~0_combout & ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Jiowx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kepwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kepwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kepwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kepwx4~1 .lut_mask = 64'h0000F0F00F0FFFFF;
+defparam \soc_inst|m0_1|u_logic|Kepwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y10_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qmdwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qmdwx4~0_combout = ( \soc_inst|m0_1|u_logic|Qxuwx4~combout & ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) # ( \soc_inst|m0_1|u_logic|Qxuwx4~combout & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout & (
+// \soc_inst|m0_1|u_logic|Bdwwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qxuwx4~combout & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( \soc_inst|m0_1|u_logic|Bdwwx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Bdwwx4~combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Qxuwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qmdwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qmdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qmdwx4~0 .lut_mask = 64'h0F0F0F0F0000FFFF;
+defparam \soc_inst|m0_1|u_logic|Qmdwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y12_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xmdwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xmdwx4~0_combout = ( \soc_inst|m0_1|u_logic|Ebbwx4~combout & ( (!\soc_inst|m0_1|u_logic|Ylbwx4~combout ) # (\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ebbwx4~combout & (
+// (!\soc_inst|m0_1|u_logic|Ylbwx4~combout & !\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ylbwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ebbwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xmdwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xmdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xmdwx4~0 .lut_mask = 64'hF000F000F0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|Xmdwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y12_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xmdwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xmdwx4~1_combout = ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout & ( \soc_inst|m0_1|u_logic|Xmdwx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout & ( \soc_inst|m0_1|u_logic|Qmdwx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Qmdwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Xmdwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xmdwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xmdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xmdwx4~1 .lut_mask = 64'h0F0F0F0F00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Xmdwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y12_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J7ewx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|J7ewx4~0_combout = ( !\soc_inst|m0_1|u_logic|Oldwx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Fij2z4~q & (\soc_inst|m0_1|u_logic|Xmdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Fij2z4~q & ((!\soc_inst|m0_1|u_logic|Xuxwx4~combout &
+// (\soc_inst|m0_1|u_logic|Xmdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Xuxwx4~combout & ((!\soc_inst|m0_1|u_logic|U2ewx4~0_combout )))))) ) ) # ( \soc_inst|m0_1|u_logic|Oldwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q &
+// (((\soc_inst|m0_1|u_logic|Kepwx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Fij2z4~q & ((!\soc_inst|m0_1|u_logic|D5ywx4~0_combout & ((!\soc_inst|m0_1|u_logic|Xuxwx4~combout & (\soc_inst|m0_1|u_logic|Kepwx4~1_combout )) #
+// (\soc_inst|m0_1|u_logic|Xuxwx4~combout & ((!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ))))) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout & ((!\soc_inst|m0_1|u_logic|Xuxwx4~combout & ((!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ))) #
+// (\soc_inst|m0_1|u_logic|Xuxwx4~combout & (\soc_inst|m0_1|u_logic|Kepwx4~1_combout )))))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Kepwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
+ .datag(!\soc_inst|m0_1|u_logic|Xmdwx4~1_combout ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|J7ewx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J7ewx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|J7ewx4~0 .lut_mask = 64'h0F0F1F0E3F0C2F0D;
+defparam \soc_inst|m0_1|u_logic|J7ewx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y14_N49
+dffeas \soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I2uvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|I2uvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Mjl2z4~q & ( (\soc_inst|m0_1|u_logic|T2owx4~0_combout & (!\soc_inst|m0_1|u_logic|Lz93z4~q & \soc_inst|m0_1|u_logic|K3l2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T2owx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|I2uvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I2uvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I2uvx4~0 .lut_mask = 64'h0404000000000000;
+defparam \soc_inst|m0_1|u_logic|I2uvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y10_N13
+dffeas \soc_inst|m0_1|u_logic|B1a3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|I2uvx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|B1a3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B1a3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B1a3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Repwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Repwx4~0_combout = ( \soc_inst|m0_1|u_logic|B1a3z4~q & ( \soc_inst|m0_1|u_logic|Mjl2z4~q & ( (\soc_inst|m0_1|u_logic|Kop2z4~q & (!\soc_inst|m0_1|u_logic|Lz93z4~q & (\soc_inst|m0_1|u_logic|J6i2z4~q &
+// \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B1a3z4~q & ( \soc_inst|m0_1|u_logic|Mjl2z4~q & ( (\soc_inst|m0_1|u_logic|Kop2z4~q & (!\soc_inst|m0_1|u_logic|Lz93z4~q & (\soc_inst|m0_1|u_logic|J6i2z4~q &
+// \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|B1a3z4~q & ( !\soc_inst|m0_1|u_logic|Mjl2z4~q & ( (!\soc_inst|m0_1|u_logic|Kop2z4~q & (\soc_inst|m0_1|u_logic|Lz93z4~q & (!\soc_inst|m0_1|u_logic|J6i2z4~q &
+// \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Kop2z4~q & (((\soc_inst|m0_1|u_logic|J6i2z4~q & !\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B1a3z4~q & ( !\soc_inst|m0_1|u_logic|Mjl2z4~q & (
+// (\soc_inst|m0_1|u_logic|Lz93z4~q & ((!\soc_inst|m0_1|u_logic|Kop2z4~q & (!\soc_inst|m0_1|u_logic|J6i2z4~q & \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Kop2z4~q & (\soc_inst|m0_1|u_logic|J6i2z4~q &
+// !\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|B1a3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Repwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Repwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Repwx4~0 .lut_mask = 64'h0120052000040004;
+defparam \soc_inst|m0_1|u_logic|Repwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y11_N44
+dffeas \soc_inst|m0_1|u_logic|Jxs2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Jxs2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jxs2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jxs2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X24_Y12_N49
+dffeas \soc_inst|m0_1|u_logic|Aqp2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|W2uvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Aqp2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Aqp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Aqp2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y12_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Repwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Repwx4~1_combout = ( \soc_inst|m0_1|u_logic|Aqp2z4~q & ( \soc_inst|m0_1|u_logic|E0uvx4~combout & ( (!\soc_inst|m0_1|u_logic|Repwx4~0_combout & (!\soc_inst|m0_1|u_logic|K3uvx4~0_combout & !\soc_inst|m0_1|u_logic|Jxs2z4~q )) ) )
+// ) # ( !\soc_inst|m0_1|u_logic|Aqp2z4~q & ( \soc_inst|m0_1|u_logic|E0uvx4~combout & ( (!\soc_inst|m0_1|u_logic|Repwx4~0_combout & !\soc_inst|m0_1|u_logic|Jxs2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Aqp2z4~q & ( !\soc_inst|m0_1|u_logic|E0uvx4~combout &
+// ( (!\soc_inst|m0_1|u_logic|Repwx4~0_combout & !\soc_inst|m0_1|u_logic|K3uvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aqp2z4~q & ( !\soc_inst|m0_1|u_logic|E0uvx4~combout & ( !\soc_inst|m0_1|u_logic|Repwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Repwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Jxs2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Aqp2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Repwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Repwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Repwx4~1 .lut_mask = 64'hAAAA8888A0A08080;
+defparam \soc_inst|m0_1|u_logic|Repwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y14_N37
+dffeas \soc_inst|m0_1|u_logic|Lns2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Lns2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lns2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lns2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L0uvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|L0uvx4~combout = ( \soc_inst|m0_1|u_logic|K7pwx4~combout & ( \soc_inst|m0_1|u_logic|K3l2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L0uvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L0uvx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|L0uvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y14_N8
+dffeas \soc_inst|m0_1|u_logic|Q6l2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Q6l2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q6l2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Q6l2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y12_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Repwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Repwx4~2_combout = ( \soc_inst|m0_1|u_logic|Qwowx4~combout & ( (\soc_inst|m0_1|u_logic|Repwx4~1_combout & (!\soc_inst|m0_1|u_logic|Lns2z4~q & ((!\soc_inst|m0_1|u_logic|K7pwx4~combout ) # (!\soc_inst|m0_1|u_logic|Q6l2z4~q )))) )
+// ) # ( !\soc_inst|m0_1|u_logic|Qwowx4~combout & ( (\soc_inst|m0_1|u_logic|Repwx4~1_combout & ((!\soc_inst|m0_1|u_logic|K7pwx4~combout ) # (!\soc_inst|m0_1|u_logic|Q6l2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Repwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Lns2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Q6l2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Repwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Repwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Repwx4~2 .lut_mask = 64'h3322332230203020;
+defparam \soc_inst|m0_1|u_logic|Repwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y12_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ncpwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ncpwx4~0_combout = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Repwx4~2_combout ) # ((\soc_inst|m0_1|u_logic|N1uvx4~combout & \soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE_q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Repwx4~2_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ncpwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ncpwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ncpwx4~0 .lut_mask = 64'h00000000FF05FF05;
+defparam \soc_inst|m0_1|u_logic|Ncpwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A9iwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|A9iwx4~0_combout = ( \soc_inst|interconnect_1|HRDATA[30]~34_combout & ( (!\soc_inst|m0_1|u_logic|Ncpwx4~0_combout & (!\soc_inst|m0_1|u_logic|B7owx4~combout & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|J7ewx4~0_combout )))) ) ) # ( !\soc_inst|interconnect_1|HRDATA[30]~34_combout & ( (!\soc_inst|m0_1|u_logic|Ncpwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # (\soc_inst|m0_1|u_logic|J7ewx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|J7ewx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ncpwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[30]~34_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|A9iwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|A9iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A9iwx4~0 .lut_mask = 64'hC4C4C4C4C400C400;
+defparam \soc_inst|m0_1|u_logic|A9iwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y5_N44
+dffeas \soc_inst|m0_1|u_logic|Mof3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Mof3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mof3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mof3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y5_N59
+dffeas \soc_inst|m0_1|u_logic|Xmf3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Xmf3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xmf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xmf3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y5_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Icxwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Icxwx4~3_combout = ( \soc_inst|m0_1|u_logic|Xmf3z4~q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Mof3z4~q &
+// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xmf3z4~q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|Fgm2z4~q & ((!\soc_inst|m0_1|u_logic|Mof3z4~q ) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Mof3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Xmf3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Icxwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Icxwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Icxwx4~3 .lut_mask = 64'h000D000800000000;
+defparam \soc_inst|m0_1|u_logic|Icxwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y7_N49
+dffeas \soc_inst|m0_1|u_logic|Bqf3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Bqf3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bqf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bqf3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y5_N11
+dffeas \soc_inst|m0_1|u_logic|Ldf3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ldf3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ldf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ldf3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y7_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Icxwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Icxwx4~2_combout = ( !\soc_inst|m0_1|u_logic|Bqf3z4~q & ( \soc_inst|m0_1|u_logic|Ldf3z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// !\soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Bqf3z4~q & ( !\soc_inst|m0_1|u_logic|Ldf3z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// \soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bqf3z4~q & ( !\soc_inst|m0_1|u_logic|Ldf3z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Bqf3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ldf3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Icxwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Icxwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Icxwx4~2 .lut_mask = 64'h1010001010000000;
+defparam \soc_inst|m0_1|u_logic|Icxwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y5_N41
+dffeas \soc_inst|m0_1|u_logic|Aff3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Aff3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Aff3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Aff3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y5_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Icxwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Icxwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Fpi2z4~q & ( \soc_inst|m0_1|u_logic|Aff3z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q &
+// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fpi2z4~q & ( !\soc_inst|m0_1|u_logic|Aff3z4~q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fpi2z4~q & ( !\soc_inst|m0_1|u_logic|Aff3z4~q & (
+// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fpi2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Aff3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Icxwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Icxwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Icxwx4~0 .lut_mask = 64'h3000100020000000;
+defparam \soc_inst|m0_1|u_logic|Icxwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y7_N10
+dffeas \soc_inst|m0_1|u_logic|Wbf3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wbf3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wbf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wbf3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y4_N43
+dffeas \soc_inst|m0_1|u_logic|Orj2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Orj2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Orj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Orj2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y7_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Icxwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Icxwx4~1_combout = ( !\soc_inst|m0_1|u_logic|Wbf3z4~q & ( \soc_inst|m0_1|u_logic|Orj2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// \soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wbf3z4~q & ( !\soc_inst|m0_1|u_logic|Orj2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// \soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wbf3z4~q & ( !\soc_inst|m0_1|u_logic|Orj2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wbf3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Orj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Icxwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Icxwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Icxwx4~1 .lut_mask = 64'h0005000400010000;
+defparam \soc_inst|m0_1|u_logic|Icxwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y5_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Icxwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Icxwx4~combout = ( !\soc_inst|m0_1|u_logic|Icxwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Icxwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Icxwx4~3_combout & !\soc_inst|m0_1|u_logic|Icxwx4~2_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Icxwx4~3_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Icxwx4~2_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Icxwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Icxwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Icxwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Icxwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Icxwx4 .lut_mask = 64'hC0C0000000000000;
+defparam \soc_inst|m0_1|u_logic|Icxwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X48_Y5_N43
+dffeas \soc_inst|m0_1|u_logic|Md93z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Md93z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Md93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Md93z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y5_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G4qwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G4qwx4~1_combout = ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|J0n2z4~q & ( (!\soc_inst|m0_1|u_logic|Md93z4~q & (\soc_inst|m0_1|u_logic|Sjj2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|J0n2z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|Md93z4~q ) # (!\soc_inst|m0_1|u_logic|Sjj2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Md93z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|J0n2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G4qwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G4qwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G4qwx4~1 .lut_mask = 64'h0000000E00000002;
+defparam \soc_inst|m0_1|u_logic|G4qwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y9_N35
+dffeas \soc_inst|m0_1|u_logic|Vcv2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Vcv2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vcv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vcv2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y5_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G4qwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G4qwx4~3_combout = ( !\soc_inst|m0_1|u_logic|Y1n2z4~q & ( \soc_inst|m0_1|u_logic|Vcv2z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Sjj2z4~q & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Y1n2z4~q & ( !\soc_inst|m0_1|u_logic|Vcv2z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sjj2z4~q & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y1n2z4~q & ( !\soc_inst|m0_1|u_logic|Vcv2z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Y1n2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Vcv2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G4qwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G4qwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G4qwx4~3 .lut_mask = 64'h000A000200080000;
+defparam \soc_inst|m0_1|u_logic|G4qwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y8_N28
+dffeas \soc_inst|m0_1|u_logic|Mz63z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Mz63z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mz63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mz63z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y8_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G4qwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G4qwx4~0_combout = ( !\soc_inst|m0_1|u_logic|N3n2z4~q & ( \soc_inst|m0_1|u_logic|Mz63z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|N3n2z4~q & ( !\soc_inst|m0_1|u_logic|Mz63z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N3n2z4~q & ( !\soc_inst|m0_1|u_logic|Mz63z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|N3n2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mz63z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G4qwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G4qwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G4qwx4~0 .lut_mask = 64'h5000100040000000;
+defparam \soc_inst|m0_1|u_logic|G4qwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X48_Y8_N47
+dffeas \soc_inst|m0_1|u_logic|M3u2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|M3u2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M3u2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M3u2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y8_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G4qwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G4qwx4~2_combout = ( !\soc_inst|m0_1|u_logic|M3u2z4~q & ( \soc_inst|m0_1|u_logic|V883z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Rni2z4~q &
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|M3u2z4~q & ( !\soc_inst|m0_1|u_logic|V883z4~q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Rni2z4~q &
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|M3u2z4~q & ( !\soc_inst|m0_1|u_logic|V883z4~q & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Rni2z4~q & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|M3u2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|V883z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G4qwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G4qwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G4qwx4~2 .lut_mask = 64'h0300010002000000;
+defparam \soc_inst|m0_1|u_logic|G4qwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y5_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G4qwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G4qwx4~combout = ( !\soc_inst|m0_1|u_logic|G4qwx4~0_combout & ( !\soc_inst|m0_1|u_logic|G4qwx4~2_combout & ( (!\soc_inst|m0_1|u_logic|G4qwx4~1_combout & !\soc_inst|m0_1|u_logic|G4qwx4~3_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|G4qwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|G4qwx4~3_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|G4qwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|G4qwx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G4qwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G4qwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G4qwx4 .lut_mask = 64'hC0C0000000000000;
+defparam \soc_inst|m0_1|u_logic|G4qwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y10_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Asdwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Asdwx4~0_combout = ( \soc_inst|m0_1|u_logic|G4qwx4~combout & ( (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Icxwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|G4qwx4~combout & (
+// (\soc_inst|m0_1|u_logic|W4ywx4~0_combout & \soc_inst|m0_1|u_logic|Icxwx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Icxwx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|G4qwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Asdwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Asdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Asdwx4~0 .lut_mask = 64'h000F000FF0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|Asdwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y10_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nvdwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nvdwx4~0_combout = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( !\soc_inst|m0_1|u_logic|U7uwx4~combout ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( \soc_inst|m0_1|u_logic|Mnvwx4~combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|U7uwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Mnvwx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nvdwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nvdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nvdwx4~0 .lut_mask = 64'h00FF00FFF0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Nvdwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y10_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Asdwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Asdwx4~1_combout = ( \soc_inst|m0_1|u_logic|Nvdwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Asdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Nvdwx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|D5ywx4~0_combout & \soc_inst|m0_1|u_logic|Asdwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Asdwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nvdwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Asdwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Asdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Asdwx4~1 .lut_mask = 64'h00550055AAFFAAFF;
+defparam \soc_inst|m0_1|u_logic|Asdwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y7_N19
+dffeas \soc_inst|m0_1|u_logic|Lpt2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Lpt2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lpt2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lpt2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y5_N13
+dffeas \soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y7_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eruwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eruwx4~2_combout = ( !\soc_inst|m0_1|u_logic|Lpt2z4~q & ( \soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q
+// & !\soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lpt2z4~q & ( !\soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// (!\soc_inst|m0_1|u_logic|Fgm2z4~q & \soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lpt2z4~q & ( !\soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Lpt2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Eruwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eruwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eruwx4~2 .lut_mask = 64'h1010001010000000;
+defparam \soc_inst|m0_1|u_logic|Eruwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y7_N55
+dffeas \soc_inst|m0_1|u_logic|Jw83z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Jw83z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jw83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jw83z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y7_N7
+dffeas \soc_inst|m0_1|u_logic|Fio2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Fio2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fio2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fio2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y7_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eruwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eruwx4~1_combout = ( !\soc_inst|m0_1|u_logic|Jw83z4~q & ( \soc_inst|m0_1|u_logic|Fio2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// \soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Jw83z4~q & ( !\soc_inst|m0_1|u_logic|Fio2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// \soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jw83z4~q & ( !\soc_inst|m0_1|u_logic|Fio2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Jw83z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fio2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Eruwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eruwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eruwx4~1 .lut_mask = 64'h0005000400010000;
+defparam \soc_inst|m0_1|u_logic|Eruwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y6_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ujo2z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ujo2z4~feeder_combout = ( \soc_inst|m0_1|u_logic|Fdzvx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ujo2z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ujo2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ujo2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ujo2z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X48_Y6_N41
+dffeas \soc_inst|m0_1|u_logic|Ujo2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Ujo2z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ujo2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ujo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ujo2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y6_N47
+dffeas \soc_inst|m0_1|u_logic|Uyu2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Uyu2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uyu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uyu2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y6_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eruwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eruwx4~3_combout = ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q & (!\soc_inst|m0_1|u_logic|Ujo2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q & ((!\soc_inst|m0_1|u_logic|Uyu2z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ujo2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Uyu2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Eruwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eruwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eruwx4~3 .lut_mask = 64'h0000445000000000;
+defparam \soc_inst|m0_1|u_logic|Eruwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y7_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ll63z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ll63z4~feeder_combout = ( \soc_inst|m0_1|u_logic|Fdzvx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ll63z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ll63z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ll63z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ll63z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X48_Y7_N38
+dffeas \soc_inst|m0_1|u_logic|Ll63z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Ll63z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ll63z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ll63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ll63z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y4_N40
+dffeas \soc_inst|m0_1|u_logic|Jlo2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Jlo2z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Jlo2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jlo2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jlo2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y7_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eruwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eruwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Ll63z4~q & ( \soc_inst|m0_1|u_logic|Jlo2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Sjj2z4~q &
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ll63z4~q & ( !\soc_inst|m0_1|u_logic|Jlo2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Sjj2z4~q &
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ll63z4~q & ( !\soc_inst|m0_1|u_logic|Jlo2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Sjj2z4~q & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ll63z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Jlo2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Eruwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eruwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eruwx4~0 .lut_mask = 64'h5000400010000000;
+defparam \soc_inst|m0_1|u_logic|Eruwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y7_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eruwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eruwx4~combout = ( !\soc_inst|m0_1|u_logic|Eruwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Eruwx4~2_combout & (!\soc_inst|m0_1|u_logic|Eruwx4~1_combout & !\soc_inst|m0_1|u_logic|Eruwx4~3_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Eruwx4~2_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Eruwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Eruwx4~3_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Eruwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Eruwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eruwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eruwx4 .lut_mask = 64'hA000A00000000000;
+defparam \soc_inst|m0_1|u_logic|Eruwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y4_N19
+dffeas \soc_inst|m0_1|u_logic|Kjk2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Kjk2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kjk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kjk2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y4_N40
+dffeas \soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y7_N7
+dffeas \soc_inst|m0_1|u_logic|Zkk2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Zkk2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zkk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zkk2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y5_N49
+dffeas \soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y7_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F8wwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|F8wwx4~0_combout = ( \soc_inst|m0_1|u_logic|Zkk2z4~q & ( \soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE_q & ( ((!\soc_inst|m0_1|u_logic|Wzy2z4~q & ((\soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q &
+// (\soc_inst|m0_1|u_logic|Kjk2z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zkk2z4~q & ( \soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q &
+// (((\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q & (\soc_inst|m0_1|u_logic|Kjk2z4~q & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Zkk2z4~q & ( !\soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q & (((\soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q &
+// (((\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Kjk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zkk2z4~q & ( !\soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|Wzy2z4~q & ((\soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q & (\soc_inst|m0_1|u_logic|Kjk2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Kjk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Zkk2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|F8wwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F8wwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F8wwx4~0 .lut_mask = 64'h1D001D331DCC1DFF;
+defparam \soc_inst|m0_1|u_logic|F8wwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y7_N38
+dffeas \soc_inst|m0_1|u_logic|Rht2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rht2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rht2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rht2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y7_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rd63z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rd63z4~feeder_combout = ( \soc_inst|m0_1|u_logic|C3qvx4~1_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rd63z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rd63z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rd63z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Rd63z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X48_Y7_N40
+dffeas \soc_inst|m0_1|u_logic|Rd63z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Rd63z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rd63z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rd63z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rd63z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y5_N25
+dffeas \soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y5_N56
+dffeas \soc_inst|m0_1|u_logic|An73z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|An73z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|An73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|An73z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y7_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F8wwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|F8wwx4~1_combout = ( \soc_inst|m0_1|u_logic|An73z4~q & ( \soc_inst|m0_1|u_logic|Wzy2z4~q & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Rd63z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|An73z4~q
+// & ( \soc_inst|m0_1|u_logic|Wzy2z4~q & ( (\soc_inst|m0_1|u_logic|Rd63z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|An73z4~q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q & (
+// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Rht2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|An73z4~q & (
+// !\soc_inst|m0_1|u_logic|Wzy2z4~q & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Rht2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rht2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Rd63z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|An73z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|F8wwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F8wwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F8wwx4~1 .lut_mask = 64'h05F505F530303F3F;
+defparam \soc_inst|m0_1|u_logic|F8wwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y7_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F8wwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|F8wwx4~combout = ( \soc_inst|m0_1|u_logic|F8wwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|F8wwx4~0_combout & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) # (
+// !\soc_inst|m0_1|u_logic|F8wwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q ) # (!\soc_inst|m0_1|u_logic|F8wwx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|F8wwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|F8wwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|F8wwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F8wwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F8wwx4 .lut_mask = 64'h00FA00FA00500050;
+defparam \soc_inst|m0_1|u_logic|F8wwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y10_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Beowx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Beowx4~0_combout = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( \soc_inst|m0_1|u_logic|Eruwx4~combout ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( !\soc_inst|m0_1|u_logic|F8wwx4~combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Eruwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|F8wwx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Beowx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Beowx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Beowx4~0 .lut_mask = 64'hFF00FF000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Beowx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y4_N31
+dffeas \soc_inst|m0_1|u_logic|V0k2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|V0k2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V0k2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|V0k2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y4_N17
+dffeas \soc_inst|m0_1|u_logic|K2k2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|K2k2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K2k2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K2k2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y6_N49
+dffeas \soc_inst|m0_1|u_logic|Y1v2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Y1v2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y1v2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y1v2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y6_N16
+dffeas \soc_inst|m0_1|u_logic|Nz83z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Nz83z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nz83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nz83z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y4_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Feqwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Feqwx4~0_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Nz83z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|V0k2z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Y1v2z4~q ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|K2k2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|V0k2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|K2k2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Y1v2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Nz83z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Feqwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Feqwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Feqwx4~0 .lut_mask = 64'h33330F0F555500FF;
+defparam \soc_inst|m0_1|u_logic|Feqwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y6_N37
+dffeas \soc_inst|m0_1|u_logic|Pst2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Pst2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pst2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pst2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y5_N41
+dffeas \soc_inst|m0_1|u_logic|Z3k2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Z3k2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z3k2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z3k2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y4_N2
+dffeas \soc_inst|m0_1|u_logic|Po63z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Po63z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Po63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Po63z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y6_N43
+dffeas \soc_inst|m0_1|u_logic|Yx73z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Yx73z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yx73z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yx73z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y4_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Feqwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Feqwx4~1_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Yx73z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Po63z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Pst2z4~q ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Z3k2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pst2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Z3k2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Po63z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yx73z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Feqwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Feqwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Feqwx4~1 .lut_mask = 64'h333355550F0F00FF;
+defparam \soc_inst|m0_1|u_logic|Feqwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y4_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Feqwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Feqwx4~combout = ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|Feqwx4~0_combout & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & (
+// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Feqwx4~1_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Feqwx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Feqwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Feqwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Feqwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Feqwx4 .lut_mask = 64'h0F000F000A0A0A0A;
+defparam \soc_inst|m0_1|u_logic|Feqwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X48_Y7_N26
+dffeas \soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y6_N55
+dffeas \soc_inst|m0_1|u_logic|Vgq2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Vgq2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vgq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vgq2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y6_N41
+dffeas \soc_inst|m0_1|u_logic|J0v2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|J0v2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J0v2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J0v2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y6_N13
+dffeas \soc_inst|m0_1|u_logic|Yx83z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Yx83z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yx83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yx83z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y7_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fexwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fexwx4~0_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( \soc_inst|m0_1|u_logic|Yx83z4~q & ( (\soc_inst|m0_1|u_logic|J0v2z4~q ) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q & (
+// \soc_inst|m0_1|u_logic|Yx83z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Vgq2z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE_q )) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Sjj2z4~q & ( !\soc_inst|m0_1|u_logic|Yx83z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|J0v2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q & ( !\soc_inst|m0_1|u_logic|Yx83z4~q & (
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Vgq2z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Vgq2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|J0v2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yx83z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fexwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fexwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fexwx4~0 .lut_mask = 64'h353500F035350FFF;
+defparam \soc_inst|m0_1|u_logic|Fexwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y8_N5
+dffeas \soc_inst|m0_1|u_logic|Kiq2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Kiq2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kiq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kiq2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y7_N44
+dffeas \soc_inst|m0_1|u_logic|An63z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|An63z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|An63z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|An63z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y6_N28
+dffeas \soc_inst|m0_1|u_logic|Art2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Art2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Art2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Art2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y6_N19
+dffeas \soc_inst|m0_1|u_logic|Jw73z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Jw73z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jw73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jw73z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y7_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fexwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fexwx4~1_combout = ( \soc_inst|m0_1|u_logic|Art2z4~q & ( \soc_inst|m0_1|u_logic|Jw73z4~q & ( ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Kiq2z4~q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q &
+// ((\soc_inst|m0_1|u_logic|An63z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Sjj2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Art2z4~q & ( \soc_inst|m0_1|u_logic|Jw73z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Kiq2z4~q &
+// ((!\soc_inst|m0_1|u_logic|Sjj2z4~q )))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (((\soc_inst|m0_1|u_logic|Sjj2z4~q ) # (\soc_inst|m0_1|u_logic|An63z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Art2z4~q & ( !\soc_inst|m0_1|u_logic|Jw73z4~q
+// & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (((\soc_inst|m0_1|u_logic|Sjj2z4~q )) # (\soc_inst|m0_1|u_logic|Kiq2z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (((\soc_inst|m0_1|u_logic|An63z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Art2z4~q & ( !\soc_inst|m0_1|u_logic|Jw73z4~q & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q & ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Kiq2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|An63z4~DUPLICATE_q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Kiq2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|An63z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Art2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Jw73z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fexwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fexwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fexwx4~1 .lut_mask = 64'h470047CC473347FF;
+defparam \soc_inst|m0_1|u_logic|Fexwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y7_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fexwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fexwx4~combout = ( \soc_inst|m0_1|u_logic|Fexwx4~1_combout & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & !\soc_inst|m0_1|u_logic|Fexwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fexwx4~1_combout
+// & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & !\soc_inst|m0_1|u_logic|Fexwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fexwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( \soc_inst|m0_1|u_logic|Rni2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Fexwx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Fexwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fexwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fexwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fexwx4 .lut_mask = 64'h5555000050505050;
+defparam \soc_inst|m0_1|u_logic|Fexwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y8_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zudwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zudwx4~0_combout = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( !\soc_inst|m0_1|u_logic|Fexwx4~combout ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( !\soc_inst|m0_1|u_logic|Feqwx4~combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Feqwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fexwx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zudwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zudwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zudwx4~0 .lut_mask = 64'hF0F0F0F0FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Zudwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y10_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zudwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zudwx4~1_combout = ( \soc_inst|m0_1|u_logic|Zudwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Beowx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Zudwx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout & \soc_inst|m0_1|u_logic|Beowx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Beowx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Zudwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zudwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zudwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zudwx4~1 .lut_mask = 64'h00AA00AA55FF55FF;
+defparam \soc_inst|m0_1|u_logic|Zudwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y13_N17
+dffeas \soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X27_Y11_N2
+dffeas \soc_inst|m0_1|u_logic|Bus2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Bus2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bus2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bus2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y12_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Avowx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Avowx4~0_combout = ( \soc_inst|m0_1|u_logic|K3uvx4~0_combout & ( ((\soc_inst|m0_1|u_logic|Bus2z4~q & \soc_inst|m0_1|u_logic|E0uvx4~combout )) # (\soc_inst|m0_1|u_logic|X9n2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|K3uvx4~0_combout
+// & ( (\soc_inst|m0_1|u_logic|Bus2z4~q & \soc_inst|m0_1|u_logic|E0uvx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bus2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|X9n2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Avowx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Avowx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Avowx4~0 .lut_mask = 64'h0505050505FF05FF;
+defparam \soc_inst|m0_1|u_logic|Avowx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y14_N20
+dffeas \soc_inst|m0_1|u_logic|G8n2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|G8n2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G8n2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G8n2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X27_Y13_N47
+dffeas \soc_inst|m0_1|u_logic|Dks2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Dks2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dks2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dks2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Avowx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Avowx4~1_combout = ( !\soc_inst|m0_1|u_logic|Dks2z4~q & ( \soc_inst|m0_1|u_logic|Qwowx4~combout & ( (!\soc_inst|m0_1|u_logic|Avowx4~0_combout & ((!\soc_inst|m0_1|u_logic|K7pwx4~combout ) # (!\soc_inst|m0_1|u_logic|G8n2z4~q ))) )
+// ) ) # ( \soc_inst|m0_1|u_logic|Dks2z4~q & ( !\soc_inst|m0_1|u_logic|Qwowx4~combout & ( (!\soc_inst|m0_1|u_logic|Avowx4~0_combout & ((!\soc_inst|m0_1|u_logic|K7pwx4~combout ) # (!\soc_inst|m0_1|u_logic|G8n2z4~q ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Dks2z4~q & ( !\soc_inst|m0_1|u_logic|Qwowx4~combout & ( (!\soc_inst|m0_1|u_logic|Avowx4~0_combout & ((!\soc_inst|m0_1|u_logic|K7pwx4~combout ) # (!\soc_inst|m0_1|u_logic|G8n2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Avowx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|G8n2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Dks2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Avowx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Avowx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Avowx4~1 .lut_mask = 64'hC8C8C8C8C8C80000;
+defparam \soc_inst|m0_1|u_logic|Avowx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Avowx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Avowx4~2_combout = ( \soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Avowx4~1_combout & ( (\soc_inst|m0_1|u_logic|N1uvx4~combout & \soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Avowx4~1_combout & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Avowx4~1_combout & (
+// \soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Avowx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Avowx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Avowx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Avowx4~2 .lut_mask = 64'h0F0F0F0F00000505;
+defparam \soc_inst|m0_1|u_logic|Avowx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y11_N7
+dffeas \soc_inst|m0_1|u_logic|Ddi3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Gnmvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ddi3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ddi3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ddi3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y10_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[20]~16 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout = ( \soc_inst|m0_1|u_logic|Hk0wx4~combout & ( ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout & \soc_inst|m0_1|u_logic|Y9t2z4~q )) # (\soc_inst|m0_1|u_logic|Am5wx4~1_combout ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Hk0wx4~combout & ( (\soc_inst|m0_1|u_logic|Am5wx4~1_combout & ((!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Hk0wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hwdata_o[20]~16 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[20]~16 .lut_mask = 64'h0D0D0D0D2F2F2F2F;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[20]~16 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y10_N38
+dffeas \soc_inst|m0_1|u_logic|I1h3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|I1h3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I1h3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I1h3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X50_Y8_N5
+dffeas \soc_inst|m0_1|u_logic|F473z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|F473z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F473z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F473z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X52_Y8_N17
+dffeas \soc_inst|m0_1|u_logic|Fi93z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Fi93z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fi93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fi93z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X52_Y8_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|St0wx4~6_combout = ( \soc_inst|m0_1|u_logic|Svk2z4~q & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Fi93z4~q & (\soc_inst|m0_1|u_logic|Yaz2z4~q & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Svk2z4~q & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|F473z4~q & (\soc_inst|m0_1|u_logic|Yaz2z4~q & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|F473z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fi93z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|St0wx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|St0wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~6 .lut_mask = 64'h000A00000000000C;
+defparam \soc_inst|m0_1|u_logic|St0wx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y7_N34
+dffeas \soc_inst|m0_1|u_logic|Tvn2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Tvn2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tvn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tvn2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X52_Y8_N58
+dffeas \soc_inst|m0_1|u_logic|Od83z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Od83z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Od83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Od83z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y7_N19
+dffeas \soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y6_N13
+dffeas \soc_inst|m0_1|u_logic|Ohv2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ohv2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ohv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ohv2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X52_Y9_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|St0wx4~7_combout = ( !\soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Ohv2z4~q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|T1d3z4~q &
+// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Ohv2z4~q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|T1d3z4~q &
+// \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Ohv2z4~q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ohv2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|St0wx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|St0wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~7 .lut_mask = 64'h0202000202000000;
+defparam \soc_inst|m0_1|u_logic|St0wx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X52_Y8_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~8 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|St0wx4~8_combout = ( \soc_inst|m0_1|u_logic|S61xx4~0_combout & ( !\soc_inst|m0_1|u_logic|St0wx4~7_combout & ( (!\soc_inst|m0_1|u_logic|St0wx4~6_combout & (\soc_inst|m0_1|u_logic|Od83z4~q &
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tvn2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout & ( !\soc_inst|m0_1|u_logic|St0wx4~7_combout & ( (!\soc_inst|m0_1|u_logic|St0wx4~6_combout &
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tvn2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|St0wx4~6_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Tvn2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Od83z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|St0wx4~7_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|St0wx4~8_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|St0wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~8 .lut_mask = 64'h8C8C008C00000000;
+defparam \soc_inst|m0_1|u_logic|St0wx4~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y8_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|St0wx4~combout = ( \soc_inst|m0_1|u_logic|St0wx4~5_combout & ( \soc_inst|m0_1|u_logic|St0wx4~8_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|St0wx4~8_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|St0wx4~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|St0wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|St0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|St0wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y8_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[18]~13 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout = ( \soc_inst|m0_1|u_logic|St0wx4~combout & ( ((\soc_inst|m0_1|u_logic|Y9t2z4~q & !\soc_inst|m0_1|u_logic|Qr42z4~1_combout )) # (\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ) ) ) # (
+// !\soc_inst|m0_1|u_logic|St0wx4~combout & ( (\soc_inst|m0_1|u_logic|Sh5wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|St0wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hwdata_o[18]~13 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[18]~13 .lut_mask = 64'h303330333F333F33;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[18]~13 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y10_N31
+dffeas \soc_inst|m0_1|u_logic|Xyn2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Xyn2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xyn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xyn2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y11_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add0~1_sumout = SUM(( !\soc_inst|m0_1|u_logic|Ara3z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~82 ))
+// \soc_inst|m0_1|u_logic|Add0~2 = CARRY(( !\soc_inst|m0_1|u_logic|Ara3z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~82 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ara3z4~q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add0~82 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add0~1_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add0~2 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add0~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~1 .lut_mask = 64'h000000000000AAAA;
+defparam \soc_inst|m0_1|u_logic|Add0~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~73 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add0~73_sumout = SUM(( !\soc_inst|m0_1|u_logic|Xeo2z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~2 ))
+// \soc_inst|m0_1|u_logic|Add0~74 = CARRY(( !\soc_inst|m0_1|u_logic|Xeo2z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~2 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Xeo2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add0~2 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add0~73_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add0~74 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add0~73 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~73 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~73 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y8_N13
+dffeas \soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y8_N46
+dffeas \soc_inst|m0_1|u_logic|Sg83z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Sg83z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sg83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sg83z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y8_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z52xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z52xx4~0_combout = ( \soc_inst|m0_1|u_logic|Yaz2z4~q & ( \soc_inst|m0_1|u_logic|Svk2z4~q & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Sg83z4~q & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Sg83z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z52xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z52xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z52xx4~0 .lut_mask = 64'h00000000000000A0;
+defparam \soc_inst|m0_1|u_logic|Z52xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y5_N46
+dffeas \soc_inst|m0_1|u_logic|Cao2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Cao2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cao2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cao2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y8_N22
+dffeas \soc_inst|m0_1|u_logic|J773z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|J773z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J773z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J773z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y9_N46
+dffeas \soc_inst|m0_1|u_logic|Jl93z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Jl93z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jl93z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jl93z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y8_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|W21wx4~7_combout = ( !\soc_inst|m0_1|u_logic|J773z4~q & ( \soc_inst|m0_1|u_logic|Jl93z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|T1d3z4~q
+// & !\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|J773z4~q & ( !\soc_inst|m0_1|u_logic|Jl93z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|T1d3z4~q & \soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|J773z4~q & ( !\soc_inst|m0_1|u_logic|Jl93z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|T1d3z4~q &
+// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q $ (\soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|J773z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Jl93z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|W21wx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W21wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~7 .lut_mask = 64'h0201000102000000;
+defparam \soc_inst|m0_1|u_logic|W21wx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y8_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~8 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|W21wx4~8_combout = ( !\soc_inst|m0_1|u_logic|W21wx4~7_combout & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout & ( (\soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Z52xx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cao2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W21wx4~7_combout & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Z52xx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cao2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Z52xx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Cao2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|W21wx4~7_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|W21wx4~8_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W21wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~8 .lut_mask = 64'hCC0C000044040000;
+defparam \soc_inst|m0_1|u_logic|W21wx4~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y8_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|W21wx4~combout = ( \soc_inst|m0_1|u_logic|W21wx4~6_combout & ( \soc_inst|m0_1|u_logic|W21wx4~8_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|W21wx4~8_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|W21wx4~6_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|W21wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W21wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|W21wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y10_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O24wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O24wx4~0_combout = ( \soc_inst|m0_1|u_logic|Zhyvx4~combout & ( ((!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # (\soc_inst|m0_1|u_logic|W21wx4~combout )) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Zhyvx4~combout & ( (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout & (\soc_inst|m0_1|u_logic|Y9t2z4~q & \soc_inst|m0_1|u_logic|W21wx4~combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|W21wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|O24wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O24wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O24wx4~0 .lut_mask = 64'h00220022DDFFDDFF;
+defparam \soc_inst|m0_1|u_logic|O24wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y10_N17
+dffeas \soc_inst|m0_1|u_logic|Gdo2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|O24wx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Gdo2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gdo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gdo2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y9_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Womvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Womvx4~0_combout = ( \soc_inst|m0_1|u_logic|Xeo2z4~q & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (\soc_inst|m0_1|u_logic|Gdo2z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Xeo2z4~q & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q & \soc_inst|m0_1|u_logic|Gdo2z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Xeo2z4~q & (
+// !\soc_inst|m0_1|u_logic|Mxtvx4~combout & ( ((!\soc_inst|m0_1|u_logic|Add0~73_sumout ) # (!\soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xeo2z4~q & (
+// !\soc_inst|m0_1|u_logic|Mxtvx4~combout & ( ((!\soc_inst|m0_1|u_logic|Add0~73_sumout & \soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Add0~73_sumout ),
+ .datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Gdo2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Xeo2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Womvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Womvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Womvx4~0 .lut_mask = 64'h5D5DFDFD555FF5FF;
+defparam \soc_inst|m0_1|u_logic|Womvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y9_N37
+dffeas \soc_inst|m0_1|u_logic|Xeo2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Womvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Xeo2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xeo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xeo2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y11_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~29 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add0~29_sumout = SUM(( !\soc_inst|m0_1|u_logic|S3i3z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~74 ))
+// \soc_inst|m0_1|u_logic|Add0~30 = CARRY(( !\soc_inst|m0_1|u_logic|S3i3z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~74 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|S3i3z4~q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add0~74 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add0~29_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add0~30 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add0~29 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~29 .lut_mask = 64'h000000000000AAAA;
+defparam \soc_inst|m0_1|u_logic|Add0~29 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y5_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~85 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~85_sumout = SUM(( !\soc_inst|m0_1|u_logic|Plx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~90 ))
+// \soc_inst|m0_1|u_logic|Add3~86 = CARRY(( !\soc_inst|m0_1|u_logic|Plx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~90 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Plx2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add3~90 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add3~85_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add3~86 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add3~85 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~85 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~85 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y8_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gdawx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gdawx4~0_combout = ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Y29wx4~combout ) # (\soc_inst|m0_1|u_logic|W7z2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gdawx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gdawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gdawx4~0 .lut_mask = 64'hFF33FF3300000000;
+defparam \soc_inst|m0_1|u_logic|Gdawx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y10_N31
+dffeas \soc_inst|m0_1|u_logic|K423z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|K423z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K423z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K423z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y8_N23
+dffeas \soc_inst|m0_1|u_logic|Ozo2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ozo2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ozo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ozo2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y10_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yw0wx4~0_combout = ( !\soc_inst|m0_1|u_logic|K423z4~q & ( \soc_inst|m0_1|u_logic|Ozo2z4~q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~q &
+// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|K423z4~q & ( !\soc_inst|m0_1|u_logic|Ozo2z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~q &
+// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K423z4~q & ( !\soc_inst|m0_1|u_logic|Ozo2z4~q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q & (!\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q $
+// (!\soc_inst|m0_1|u_logic|Yaz2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|K423z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ozo2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yw0wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~0 .lut_mask = 64'h6000400020000000;
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y7_N43
+dffeas \soc_inst|m0_1|u_logic|S2p2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|S2p2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S2p2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|S2p2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y9_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M92xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|M92xx4~0_combout = ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( !\soc_inst|m0_1|u_logic|S2p2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q & (\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|S2p2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|M92xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M92xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M92xx4~0 .lut_mask = 64'h2000000000000000;
+defparam \soc_inst|m0_1|u_logic|M92xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y10_N31
+dffeas \soc_inst|m0_1|u_logic|Lw53z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Lw53z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lw53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lw53z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y11_N13
+dffeas \soc_inst|m0_1|u_logic|Td33z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Td33z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Td33z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Td33z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X52_Y10_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yw0wx4~3_combout = ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( \soc_inst|m0_1|u_logic|Td33z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Lw53z4~q & (\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~q &
+// \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( !\soc_inst|m0_1|u_logic|Td33z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~q & ((!\soc_inst|m0_1|u_logic|Lw53z4~q ) #
+// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lw53z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Td33z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yw0wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~3 .lut_mask = 64'h0302000000020000;
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X50_Y9_N25
+dffeas \soc_inst|m0_1|u_logic|Tz03z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Tz03z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tz03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tz03z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y11_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z203z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z203z4~feeder_combout = ( \soc_inst|m0_1|u_logic|Iv0wx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z203z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z203z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z203z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Z203z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X48_Y11_N41
+dffeas \soc_inst|m0_1|u_logic|Z203z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Z203z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Z203z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z203z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z203z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y9_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yw0wx4~4_combout = ( !\soc_inst|m0_1|u_logic|Tz03z4~q & ( \soc_inst|m0_1|u_logic|Z203z4~q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q &
+// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tz03z4~q & ( !\soc_inst|m0_1|u_logic|Z203z4~q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q &
+// \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tz03z4~q & ( !\soc_inst|m0_1|u_logic|Z203z4~q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Tz03z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Z203z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yw0wx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~4 .lut_mask = 64'h2020002020000000;
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y7_N38
+dffeas \soc_inst|m0_1|u_logic|Zxo2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Zxo2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zxo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zxo2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X52_Y8_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yw0wx4~1_combout = ( !\soc_inst|m0_1|u_logic|Zxo2z4~q & ( \soc_inst|m0_1|u_logic|H4p2z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q &
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Zxo2z4~q & ( !\soc_inst|m0_1|u_logic|H4p2z4~q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q &
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zxo2z4~q & ( !\soc_inst|m0_1|u_logic|H4p2z4~q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|T1d3z4~q $
+// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Zxo2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|H4p2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yw0wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~1 .lut_mask = 64'h9000800010000000;
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X36_Y9_N20
+dffeas \soc_inst|m0_1|u_logic|Cn43z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Cn43z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cn43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cn43z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X36_Y9_N47
+dffeas \soc_inst|m0_1|u_logic|Kwo2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Kwo2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kwo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kwo2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y9_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yw0wx4~2_combout = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|T1d3z4~q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Kwo2z4~q
+// )) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( (!\soc_inst|m0_1|u_logic|Cn43z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Cn43z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Kwo2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yw0wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~2 .lut_mask = 64'h0000080800000C00;
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y8_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yw0wx4~5_combout = ( !\soc_inst|m0_1|u_logic|Yw0wx4~1_combout & ( !\soc_inst|m0_1|u_logic|Yw0wx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Yw0wx4~0_combout & (!\soc_inst|m0_1|u_logic|M92xx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Yw0wx4~3_combout & !\soc_inst|m0_1|u_logic|Yw0wx4~4_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Yw0wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|M92xx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Yw0wx4~3_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Yw0wx4~4_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Yw0wx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yw0wx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yw0wx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y8_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gdawx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gdawx4~1_combout = ( \soc_inst|m0_1|u_logic|Yw0wx4~8_combout & ( \soc_inst|m0_1|u_logic|Yw0wx4~5_combout & ( \soc_inst|m0_1|u_logic|Gdawx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Yw0wx4~8_combout & (
+// \soc_inst|m0_1|u_logic|Yw0wx4~5_combout & ( (\soc_inst|m0_1|u_logic|Gdawx4~0_combout & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout & !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Yw0wx4~8_combout & ( !\soc_inst|m0_1|u_logic|Yw0wx4~5_combout & ( (\soc_inst|m0_1|u_logic|Gdawx4~0_combout & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout & !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yw0wx4~8_combout & ( !\soc_inst|m0_1|u_logic|Yw0wx4~5_combout & ( (\soc_inst|m0_1|u_logic|Gdawx4~0_combout & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout &
+// !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Gdawx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Yw0wx4~8_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yw0wx4~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gdawx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gdawx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gdawx4~1 .lut_mask = 64'h1511151115115555;
+defparam \soc_inst|m0_1|u_logic|Gdawx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y5_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~93 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~93_sumout = SUM(( !\soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE_q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~98 ))
+// \soc_inst|m0_1|u_logic|Add3~94 = CARRY(( !\soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE_q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~98 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add3~98 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add3~93_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add3~94 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add3~93 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~93 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~93 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y5_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~97 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~97_sumout = SUM(( !\soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE_q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~106 ))
+// \soc_inst|m0_1|u_logic|Add3~98 = CARRY(( !\soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE_q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~106 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add3~106 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add3~97_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add3~98 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add3~97 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~97 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~97 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y6_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|haddr_o~4_combout = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( \soc_inst|m0_1|u_logic|Add5~61_sumout & ( (((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout & \soc_inst|m0_1|u_logic|Add3~97_sumout )) #
+// (\soc_inst|m0_1|u_logic|C61wx4~0_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( \soc_inst|m0_1|u_logic|Add5~61_sumout & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout &
+// \soc_inst|m0_1|u_logic|Add3~97_sumout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( !\soc_inst|m0_1|u_logic|Add5~61_sumout & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout &
+// \soc_inst|m0_1|u_logic|Add3~97_sumout )) # (\soc_inst|m0_1|u_logic|C61wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( !\soc_inst|m0_1|u_logic|Add5~61_sumout & ( (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout &
+// \soc_inst|m0_1|u_logic|Add3~97_sumout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|C61wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Add3~97_sumout ),
+ .datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~61_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|haddr_o~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|haddr_o~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|haddr_o~4 .lut_mask = 64'h000F333F555F777F;
+defparam \soc_inst|m0_1|u_logic|haddr_o~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y6_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdjvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pdjvx4~0_combout = ( \soc_inst|m0_1|u_logic|J7q2z4~q & ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|haddr_o~4_combout & (((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) #
+// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|J7q2z4~q & ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|haddr_o~4_combout &
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|J7q2z4~q & ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout & (
+// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|J7q2z4~q & ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|haddr_o~4_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|J7q2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pdjvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pdjvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pdjvx4~0 .lut_mask = 64'h0F03FFF30A02AAA2;
+defparam \soc_inst|m0_1|u_logic|Pdjvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y6_N13
+dffeas \soc_inst|m0_1|u_logic|J7q2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Pdjvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|J7q2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J7q2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J7q2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y12_N25
+dffeas \soc_inst|m0_1|u_logic|Psh3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Psh3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Psh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Psh3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y11_N56
+dffeas \soc_inst|m0_1|u_logic|Mi23z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Mi23z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mi23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mi23z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y8_N16
+dffeas \soc_inst|m0_1|u_logic|Ft83z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ft83z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ft83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ft83z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y11_N7
+dffeas \soc_inst|m0_1|u_logic|Vr33z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Vr33z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vr33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vr33z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y8_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z62wx4~7_combout = ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Vr33z4~q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|Ft83z4~q & (\soc_inst|m0_1|u_logic|T1d3z4~q &
+// \soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Vr33z4~q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~q & ((!\soc_inst|m0_1|u_logic|Ft83z4~q ) #
+// (!\soc_inst|m0_1|u_logic|T1d3z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ft83z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Vr33z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z62wx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z62wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~7 .lut_mask = 64'h0054000000040000;
+defparam \soc_inst|m0_1|u_logic|Z62wx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Naq2z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Naq2z4~feeder_combout = ( \soc_inst|m0_1|u_logic|Q52wx4~1_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Naq2z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Naq2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Naq2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Naq2z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y11_N20
+dffeas \soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Naq2z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y8_N41
+dffeas \soc_inst|m0_1|u_logic|Wj73z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wj73z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wj73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wj73z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z62wx4~6_combout = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Wj73z4~q & ( (!\soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Svk2z4~q
+// & \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Wj73z4~q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q & (\soc_inst|m0_1|u_logic|T1d3z4~q & ((!\soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE_q ) #
+// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wj73z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z62wx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z62wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~6 .lut_mask = 64'h000000E000000020;
+defparam \soc_inst|m0_1|u_logic|Z62wx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y8_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~8 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z62wx4~8_combout = ( !\soc_inst|m0_1|u_logic|Z62wx4~7_combout & ( !\soc_inst|m0_1|u_logic|Z62wx4~6_combout & ( (!\soc_inst|m0_1|u_logic|Psh3z4~q & (!\soc_inst|m0_1|u_logic|C51xx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mi23z4~q )))) # (\soc_inst|m0_1|u_logic|Psh3z4~q & (((!\soc_inst|m0_1|u_logic|Y91xx4~0_combout )) # (\soc_inst|m0_1|u_logic|Mi23z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Psh3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Mi23z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Z62wx4~7_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Z62wx4~6_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z62wx4~8_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z62wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~8 .lut_mask = 64'hF531000000000000;
+defparam \soc_inst|m0_1|u_logic|Z62wx4~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y9_N46
+dffeas \soc_inst|m0_1|u_logic|Fxv2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Fxv2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fxv2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fxv2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y9_N58
+dffeas \soc_inst|m0_1|u_logic|Arh3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Arh3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Arh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Arh3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z62wx4~3_combout = ( \soc_inst|m0_1|u_logic|T1d3z4~q & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Fxv2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Svk2z4~q & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) ) #
+// ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Svk2z4~q & (!\soc_inst|m0_1|u_logic|Arh3z4~q & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fxv2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Arh3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z62wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z62wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~3 .lut_mask = 64'h3000000000002200;
+defparam \soc_inst|m0_1|u_logic|Z62wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y12_N25
+dffeas \soc_inst|m0_1|u_logic|Wnu2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wnu2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wnu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wnu2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y8_N50
+dffeas \soc_inst|m0_1|u_logic|Rdq2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rdq2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rdq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rdq2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z62wx4~4_combout = ( \soc_inst|m0_1|u_logic|Svk2z4~q & ( \soc_inst|m0_1|u_logic|Rdq2z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Wnu2z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q &
+// !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~q & ( !\soc_inst|m0_1|u_logic|Rdq2z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Wnu2z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q &
+// !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q & ( !\soc_inst|m0_1|u_logic|Rdq2z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) )
+// )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wnu2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rdq2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z62wx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z62wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~4 .lut_mask = 64'h5000400000004000;
+defparam \soc_inst|m0_1|u_logic|Z62wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y12_N55
+dffeas \soc_inst|m0_1|u_logic|Na63z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Na63z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Na63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Na63z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y12_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z62wx4~1_combout = ( \soc_inst|m0_1|u_logic|Svk2z4~q & ( \soc_inst|m0_1|u_logic|Yaz2z4~q & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Na63z4~q )) #
+// (\soc_inst|m0_1|u_logic|T1d3z4~q & ((!\soc_inst|m0_1|u_logic|E0d3z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Na63z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|E0d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z62wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z62wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~1 .lut_mask = 64'h0000000000000D08;
+defparam \soc_inst|m0_1|u_logic|Z62wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y9_N43
+dffeas \soc_inst|m0_1|u_logic|E153z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|E153z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E153z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|E153z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y12_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lph3z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lph3z4~feeder_combout = ( \soc_inst|m0_1|u_logic|Q52wx4~1_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lph3z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lph3z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lph3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Lph3z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y12_N25
+dffeas \soc_inst|m0_1|u_logic|Lph3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Lph3z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Lph3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lph3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lph3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y12_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z62wx4~2_combout = ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Svk2z4~q & ( (!\soc_inst|m0_1|u_logic|Lph3z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q & \soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Svk2z4~q & ( (!\soc_inst|m0_1|u_logic|E153z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|T1d3z4~q & \soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|E153z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Lph3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z62wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z62wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~2 .lut_mask = 64'h000000A000C00000;
+defparam \soc_inst|m0_1|u_logic|Z62wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y9_N1
+dffeas \soc_inst|m0_1|u_logic|Euh3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Euh3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Euh3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Euh3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y9_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T04xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T04xx4~0_combout = ( !\soc_inst|m0_1|u_logic|Euh3z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q & (\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Euh3z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|T04xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T04xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T04xx4~0 .lut_mask = 64'h2000000000000000;
+defparam \soc_inst|m0_1|u_logic|T04xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y12_N44
+dffeas \soc_inst|m0_1|u_logic|Ccq2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ccq2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ccq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ccq2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z62wx4~0_combout = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Y8q2z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Ccq2z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q &
+// !\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Y8q2z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Ccq2z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q &
+// !\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Y8q2z4~q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q & !\soc_inst|m0_1|u_logic|Svk2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ccq2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Y8q2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z62wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z62wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~0 .lut_mask = 64'hA000400000004000;
+defparam \soc_inst|m0_1|u_logic|Z62wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z62wx4~5_combout = ( !\soc_inst|m0_1|u_logic|T04xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Z62wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Z62wx4~3_combout & (!\soc_inst|m0_1|u_logic|Z62wx4~4_combout &
+// (!\soc_inst|m0_1|u_logic|Z62wx4~1_combout & !\soc_inst|m0_1|u_logic|Z62wx4~2_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Z62wx4~3_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Z62wx4~4_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Z62wx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Z62wx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|T04xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Z62wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z62wx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z62wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|Z62wx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y8_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z62wx4~combout = ( \soc_inst|m0_1|u_logic|Z62wx4~8_combout & ( \soc_inst|m0_1|u_logic|Z62wx4~5_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Z62wx4~8_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Z62wx4~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z62wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z62wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4 .lut_mask = 64'h000000000000FFFF;
+defparam \soc_inst|m0_1|u_logic|Z62wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y10_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ns9wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ns9wx4~0_combout = ( \soc_inst|m0_1|u_logic|Y29wx4~combout & ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout & ( \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Y29wx4~combout & (
+// !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ns9wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ns9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ns9wx4~0 .lut_mask = 64'hFFFF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|Ns9wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ns9wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ns9wx4~1_combout = ( \soc_inst|m0_1|u_logic|Z62wx4~8_combout & ( \soc_inst|m0_1|u_logic|Z62wx4~5_combout & ( \soc_inst|m0_1|u_logic|Ns9wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Z62wx4~8_combout & (
+// \soc_inst|m0_1|u_logic|Z62wx4~5_combout & ( (\soc_inst|m0_1|u_logic|Ns9wx4~0_combout & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Z62wx4~8_combout & ( !\soc_inst|m0_1|u_logic|Z62wx4~5_combout & ( (\soc_inst|m0_1|u_logic|Ns9wx4~0_combout & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) #
+// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z62wx4~8_combout & ( !\soc_inst|m0_1|u_logic|Z62wx4~5_combout & ( (\soc_inst|m0_1|u_logic|Ns9wx4~0_combout & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout &
+// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ns9wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Z62wx4~8_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Z62wx4~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ns9wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ns9wx4~1 .lut_mask = 64'h050D050D050D0F0F;
+defparam \soc_inst|m0_1|u_logic|Ns9wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y10_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N72wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N72wx4~0_combout = ( \soc_inst|m0_1|u_logic|P82wx4~0_combout & ( \soc_inst|m0_1|u_logic|Ns9wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout &
+// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P82wx4~0_combout & ( \soc_inst|m0_1|u_logic|Ns9wx4~1_combout & (
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|P82wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ns9wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout &
+// ((!\soc_inst|m0_1|u_logic|Wzawx4~combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P82wx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Ns9wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N72wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N72wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N72wx4~0 .lut_mask = 64'hFAFAE400F5F5D800;
+defparam \soc_inst|m0_1|u_logic|N72wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y7_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mgawx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mgawx4~0_combout = ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Y29wx4~combout ) # (\soc_inst|m0_1|u_logic|Uup2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Uup2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mgawx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mgawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mgawx4~0 .lut_mask = 64'hF0FFF0FF00000000;
+defparam \soc_inst|m0_1|u_logic|Mgawx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y8_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J61wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|J61wx4~1_combout = ( \soc_inst|m0_1|u_logic|Wzawx4~combout & ( \soc_inst|m0_1|u_logic|Mgawx4~1_combout & ( \soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout & (
+// \soc_inst|m0_1|u_logic|Mgawx4~1_combout & ( \soc_inst|m0_1|u_logic|Muawx4~0_combout ) ) ) # ( \soc_inst|m0_1|u_logic|Wzawx4~combout & ( !\soc_inst|m0_1|u_logic|Mgawx4~1_combout & ( \soc_inst|m0_1|u_logic|Muawx4~0_combout ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Wzawx4~combout & ( !\soc_inst|m0_1|u_logic|Mgawx4~1_combout & ( \soc_inst|m0_1|u_logic|X8zvx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mgawx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|J61wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J61wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J61wx4~1 .lut_mask = 64'h3333555555553333;
+defparam \soc_inst|m0_1|u_logic|J61wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y8_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J61wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|J61wx4~0_combout = ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout & ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout & ( (\soc_inst|m0_1|u_logic|C61wx4~0_combout & (((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout &
+// !\soc_inst|m0_1|u_logic|Pdi2z4~q )) # (\soc_inst|m0_1|u_logic|J61wx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout & ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout & ( (\soc_inst|m0_1|u_logic|C61wx4~0_combout &
+// (((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout & !\soc_inst|m0_1|u_logic|Pdi2z4~q )) # (\soc_inst|m0_1|u_logic|J61wx4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout & ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (
+// \soc_inst|m0_1|u_logic|C61wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout & ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ( (\soc_inst|m0_1|u_logic|C61wx4~0_combout & (((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout &
+// !\soc_inst|m0_1|u_logic|Pdi2z4~q )) # (\soc_inst|m0_1|u_logic|J61wx4~1_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|J61wx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|C61wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|J61wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J61wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J61wx4~0 .lut_mask = 64'h0D050F0F0D050D05;
+defparam \soc_inst|m0_1|u_logic|J61wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y9_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O51wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O51wx4~0_combout = ( \soc_inst|m0_1|u_logic|Wzawx4~combout & ( (!\soc_inst|m0_1|u_logic|C61wx4~0_combout & !\soc_inst|m0_1|u_logic|Mgawx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout & (
+// (!\soc_inst|m0_1|u_logic|C61wx4~0_combout & \soc_inst|m0_1|u_logic|Mgawx4~1_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|C61wx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Mgawx4~1_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|O51wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O51wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O51wx4~0 .lut_mask = 64'h0A0A0A0AA0A0A0A0;
+defparam \soc_inst|m0_1|u_logic|O51wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y9_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M41wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|M41wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & ( \soc_inst|m0_1|u_logic|O51wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|S71wx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & ( !\soc_inst|m0_1|u_logic|O51wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|S71wx4~combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|S71wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|O51wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|M41wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M41wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M41wx4~0 .lut_mask = 64'hFF0F0000CC0C0000;
+defparam \soc_inst|m0_1|u_logic|M41wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X50_Y9_N4
+dffeas \soc_inst|m0_1|u_logic|Wqd3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wqd3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wqd3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wqd3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y8_N47
+dffeas \soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y8_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ai9wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ai9wx4~2_combout = ( !\soc_inst|m0_1|u_logic|Wqd3z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Rni2z4~q &
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wqd3z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wqd3z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE_q & (
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Rni2z4~q & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wqd3z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ai9wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~2 .lut_mask = 64'h1100100001000000;
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y12_N11
+dffeas \soc_inst|m0_1|u_logic|Snd3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Snd3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Snd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Snd3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ai9wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ai9wx4~1_combout = ( \soc_inst|m0_1|u_logic|Rni2z4~q & ( \soc_inst|m0_1|u_logic|Wzy2z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Hpd3z4~q )) #
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Snd3z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Hpd3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Snd3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ai9wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~1 .lut_mask = 64'h0000000000000A0C;
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X40_Y10_N14
+dffeas \soc_inst|m0_1|u_logic|B5e3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|B5e3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B5e3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B5e3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y10_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ai9wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ai9wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q & ((!\soc_inst|m0_1|u_logic|B5e3z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Wzy2z4~q & (!\soc_inst|m0_1|u_logic|Lsd3z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lsd3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|B5e3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ai9wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~0 .lut_mask = 64'h0C0A000000000000;
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y12_N23
+dffeas \soc_inst|m0_1|u_logic|I0e3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|I0e3z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|I0e3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I0e3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I0e3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ai9wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ai9wx4~3_combout = ( \soc_inst|m0_1|u_logic|Rni2z4~q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|X1e3z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|I0e3z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|I0e3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|X1e3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ai9wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~3 .lut_mask = 64'h00000E0200000000;
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y8_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ai9wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ai9wx4~combout = ( !\soc_inst|m0_1|u_logic|Ai9wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ai9wx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Ai9wx4~2_combout & !\soc_inst|m0_1|u_logic|Ai9wx4~1_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ai9wx4~2_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ai9wx4~1_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Ai9wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ai9wx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ai9wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ai9wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ai9wx4 .lut_mask = 64'hA0A0000000000000;
+defparam \soc_inst|m0_1|u_logic|Ai9wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y8_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sndwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sndwx4~0_combout = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( \soc_inst|m0_1|u_logic|Ai9wx4~combout ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( \soc_inst|m0_1|u_logic|Pjqwx4~combout ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Pjqwx4~combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Ai9wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sndwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sndwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sndwx4~0 .lut_mask = 64'h3333333300FF00FF;
+defparam \soc_inst|m0_1|u_logic|Sndwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y11_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C0ewx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C0ewx4~0_combout = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( \soc_inst|m0_1|u_logic|Zkuwx4~combout ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( \soc_inst|m0_1|u_logic|H2wwx4~combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Zkuwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|H2wwx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C0ewx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C0ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C0ewx4~0 .lut_mask = 64'h00FF00FF0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|C0ewx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sndwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sndwx4~1_combout = ( \soc_inst|m0_1|u_logic|Sndwx4~0_combout & ( \soc_inst|m0_1|u_logic|C0ewx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|Sndwx4~0_combout & ( \soc_inst|m0_1|u_logic|C0ewx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( \soc_inst|m0_1|u_logic|Sndwx4~0_combout & ( !\soc_inst|m0_1|u_logic|C0ewx4~0_combout & ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Sndwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|C0ewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sndwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sndwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sndwx4~1 .lut_mask = 64'h00000F0FF0F0FFFF;
+defparam \soc_inst|m0_1|u_logic|Sndwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y12_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tkdwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tkdwx4~0_combout = ( \soc_inst|m0_1|u_logic|Bywwx4~combout & ( (\soc_inst|m0_1|u_logic|Svqwx4~combout ) # (\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Bywwx4~combout & (
+// (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout & \soc_inst|m0_1|u_logic|Svqwx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Svqwx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Bywwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tkdwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tkdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tkdwx4~0 .lut_mask = 64'h00F000F00FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Tkdwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y8_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Godwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Godwx4~0_combout = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( \soc_inst|m0_1|u_logic|Pybwx4~combout ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( \soc_inst|m0_1|u_logic|Lr9wx4~combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pybwx4~combout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Lr9wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Godwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Godwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Godwx4~0 .lut_mask = 64'h00FF00FF55555555;
+defparam \soc_inst|m0_1|u_logic|Godwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tkdwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tkdwx4~1_combout = (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout & ((\soc_inst|m0_1|u_logic|Godwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout & (\soc_inst|m0_1|u_logic|Tkdwx4~0_combout ))
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Tkdwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Godwx4~0_combout ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tkdwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tkdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tkdwx4~1 .lut_mask = 64'h03F303F303F303F3;
+defparam \soc_inst|m0_1|u_logic|Tkdwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y13_N43
+dffeas \soc_inst|m0_1|u_logic|J9d3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|J9d3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J9d3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J9d3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X28_Y12_N17
+dffeas \soc_inst|m0_1|u_logic|Xdb3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Xdb3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xdb3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xdb3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X23_Y12_N23
+dffeas \soc_inst|m0_1|u_logic|J7b3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|J7b3z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|J7b3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J7b3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J7b3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X27_Y10_N44
+dffeas \soc_inst|m0_1|u_logic|Gcb3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Gcb3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gcb3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gcb3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y13_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pab3z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pab3z4~feeder_combout = ( \soc_inst|m0_1|u_logic|hwdata_o~4_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pab3z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pab3z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pab3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Pab3z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y13_N53
+dffeas \soc_inst|m0_1|u_logic|Pab3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Pab3z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Pab3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pab3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pab3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y12_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jkc3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jkc3z4~0_combout = ( \soc_inst|m0_1|u_logic|hwdata_o~4_combout & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout & ((\soc_inst|m0_1|u_logic|Jkc3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) )
+// ) # ( !\soc_inst|m0_1|u_logic|hwdata_o~4_combout & ( \soc_inst|m0_1|u_logic|Jkc3z4~q ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Jkc3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jkc3z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jkc3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jkc3z4~0 .lut_mask = 64'h00FF00FF50FA50FA;
+defparam \soc_inst|m0_1|u_logic|Jkc3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y12_N29
+dffeas \soc_inst|m0_1|u_logic|Jkc3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Jkc3z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Jkc3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jkc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jkc3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y14_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jruvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jruvx4~0_combout = ( \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Uaj2z4~q & ( (!\soc_inst|m0_1|u_logic|Cam2z4~q & (\soc_inst|m0_1|u_logic|R1w2z4~q & (!\soc_inst|m0_1|u_logic|G0w2z4~q &
+// !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jruvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jruvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jruvx4~0 .lut_mask = 64'h0000000000002000;
+defparam \soc_inst|m0_1|u_logic|Jruvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y12_N8
+dffeas \soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|D1ivx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y12_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D1ivx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D1ivx4~0_combout = ( \soc_inst|m0_1|u_logic|Yz4wx4~combout & ( \soc_inst|m0_1|u_logic|hwdata_o~4_combout & ( (\soc_inst|m0_1|u_logic|D9ovx4~combout & ((!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout & ( \soc_inst|m0_1|u_logic|hwdata_o~4_combout & ( (!\soc_inst|m0_1|u_logic|Jruvx4~0_combout & (((\soc_inst|m0_1|u_logic|D9ovx4~combout )) #
+// (\soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Jruvx4~0_combout & (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout & ((\soc_inst|m0_1|u_logic|D9ovx4~combout ) # (\soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q )))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Yz4wx4~combout & ( !\soc_inst|m0_1|u_logic|hwdata_o~4_combout & ( (\soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Yz4wx4~combout & ( !\soc_inst|m0_1|u_logic|hwdata_o~4_combout & ( (\soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|D1ivx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D1ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D1ivx4~0 .lut_mask = 64'h3232323232FA00FA;
+defparam \soc_inst|m0_1|u_logic|D1ivx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y12_N7
+dffeas \soc_inst|m0_1|u_logic|F4c3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|D1ivx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|F4c3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F4c3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F4c3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y12_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkpwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wkpwx4~0_combout = ( \soc_inst|m0_1|u_logic|M5tvx4~0_combout & ( ((\soc_inst|m0_1|u_logic|F4c3z4~q & \soc_inst|m0_1|u_logic|Ts5wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Jkc3z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|M5tvx4~0_combout
+// & ( (\soc_inst|m0_1|u_logic|F4c3z4~q & \soc_inst|m0_1|u_logic|Ts5wx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Jkc3z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|F4c3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wkpwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~0 .lut_mask = 64'h000F000F555F555F;
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkpwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wkpwx4~1_combout = ( !\soc_inst|m0_1|u_logic|Wkpwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Gcb3z4~q & (((!\soc_inst|m0_1|u_logic|Qwowx4~combout ) # (!\soc_inst|m0_1|u_logic|Pab3z4~q )))) # (\soc_inst|m0_1|u_logic|Gcb3z4~q &
+// (!\soc_inst|m0_1|u_logic|E0uvx4~combout & ((!\soc_inst|m0_1|u_logic|Qwowx4~combout ) # (!\soc_inst|m0_1|u_logic|Pab3z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Gcb3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Pab3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wkpwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wkpwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~1 .lut_mask = 64'hEEE0EEE000000000;
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y12_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkpwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wkpwx4~2_combout = ( \soc_inst|m0_1|u_logic|Wkpwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|H6tvx4~0_combout & ((!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Z8b3z4~q )))) #
+// (\soc_inst|m0_1|u_logic|H6tvx4~0_combout & (\soc_inst|m0_1|u_logic|J7b3z4~q & ((!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z8b3z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Z8b3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|J7b3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wkpwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wkpwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~2 .lut_mask = 64'h000000008ACF8ACF;
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkpwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wkpwx4~3_combout = ( \soc_inst|m0_1|u_logic|Wkpwx4~2_combout & ( (!\soc_inst|m0_1|u_logic|K7pwx4~combout & ((!\soc_inst|m0_1|u_logic|N1uvx4~combout ) # ((!\soc_inst|m0_1|u_logic|J9d3z4~q )))) #
+// (\soc_inst|m0_1|u_logic|K7pwx4~combout & (!\soc_inst|m0_1|u_logic|Xdb3z4~q & ((!\soc_inst|m0_1|u_logic|N1uvx4~combout ) # (!\soc_inst|m0_1|u_logic|J9d3z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|J9d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Xdb3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wkpwx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wkpwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~3 .lut_mask = 64'h00000000FCA8FCA8;
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: IOIBUF_X22_Y0_N52
+cyclonev_io_ibuf \SW[6]~input (
+ .i(SW[6]),
+ .ibar(gnd),
+ .dynamicterminationcontrol(gnd),
+ .o(\SW[6]~input_o ));
+// synopsys translate_off
+defparam \SW[6]~input .bus_hold = "false";
+defparam \SW[6]~input .simulate_z_as = "z";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y8_N54
+cyclonev_lcell_comb \soc_inst|switches_1|switch_store[0][6]~feeder (
+// Equation(s):
+// \soc_inst|switches_1|switch_store[0][6]~feeder_combout = ( \SW[6]~input_o )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\SW[6]~input_o ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|switches_1|switch_store[0][6]~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[0][6]~feeder .extended_lut = "off";
+defparam \soc_inst|switches_1|switch_store[0][6]~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|switches_1|switch_store[0][6]~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y8_N56
+dffeas \soc_inst|switches_1|switch_store[0][6] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|switches_1|switch_store[0][6]~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|switches_1|always0~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|switches_1|switch_store[0][6]~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[0][6] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[0][6] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y8_N12
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[6]~36 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[6]~36_combout = ( \soc_inst|interconnect_1|HRDATA[7]~10_combout & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout & ( (!\soc_inst|interconnect_1|Equal1~0_combout ) #
+// (\soc_inst|switches_1|switch_store[0][6]~q ) ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[7]~10_combout & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout & ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout ) ) ) # (
+// \soc_inst|interconnect_1|HRDATA[7]~10_combout & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout & ( (\soc_inst|switches_1|switch_store[0][6]~q & \soc_inst|interconnect_1|Equal1~0_combout ) ) ) ) # (
+// !\soc_inst|interconnect_1|HRDATA[7]~10_combout & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout & ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout ) ) )
+
+ .dataa(!\soc_inst|switches_1|switch_store[0][6]~q ),
+ .datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+ .datac(!\soc_inst|interconnect_1|Equal1~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|interconnect_1|HRDATA[7]~10_combout ),
+ .dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[6]~36_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[6]~36 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[6]~36 .lut_mask = 64'hCCCC0505CCCCF5F5;
+defparam \soc_inst|interconnect_1|HRDATA[6]~36 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O9iwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O9iwx4~0_combout = ( \soc_inst|m0_1|u_logic|Wkpwx4~3_combout & ( \soc_inst|interconnect_1|HRDATA[6]~36_combout & ( \soc_inst|m0_1|u_logic|B7owx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Wkpwx4~3_combout & (
+// \soc_inst|interconnect_1|HRDATA[6]~36_combout & ( (\soc_inst|m0_1|u_logic|B7owx4~combout ) # (\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wkpwx4~3_combout & ( !\soc_inst|interconnect_1|HRDATA[6]~36_combout & (
+// \soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Wkpwx4~3_combout ),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[6]~36_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|O9iwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O9iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O9iwx4~0 .lut_mask = 64'h555500005F5F0F0F;
+defparam \soc_inst|m0_1|u_logic|O9iwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O9iwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O9iwx4~1_combout = ( !\soc_inst|m0_1|u_logic|O9iwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout & (\soc_inst|m0_1|u_logic|Sndwx4~1_combout )) #
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout & ((\soc_inst|m0_1|u_logic|Tkdwx4~1_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Sndwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Tkdwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|O9iwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|O9iwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O9iwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O9iwx4~1 .lut_mask = 64'hCEDFCEDF00000000;
+defparam \soc_inst|m0_1|u_logic|O9iwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y10_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X61wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|X61wx4~0_combout = ( \soc_inst|m0_1|u_logic|Pmnwx4~combout & ( \soc_inst|m0_1|u_logic|Y7iwx4~2_combout & ( (\soc_inst|m0_1|u_logic|Imnwx4~combout ) # (\soc_inst|m0_1|u_logic|A9iwx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Pmnwx4~combout & ( \soc_inst|m0_1|u_logic|Y7iwx4~2_combout & ( (\soc_inst|m0_1|u_logic|O9iwx4~1_combout & ((\soc_inst|m0_1|u_logic|Imnwx4~combout ) # (\soc_inst|m0_1|u_logic|A9iwx4~0_combout ))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Pmnwx4~combout & ( !\soc_inst|m0_1|u_logic|Y7iwx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout & ((\soc_inst|m0_1|u_logic|Imnwx4~combout ) # (\soc_inst|m0_1|u_logic|A9iwx4~0_combout ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Pmnwx4~combout & ( !\soc_inst|m0_1|u_logic|Y7iwx4~2_combout & ( (\soc_inst|m0_1|u_logic|O9iwx4~1_combout & (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout & ((\soc_inst|m0_1|u_logic|Imnwx4~combout ) #
+// (\soc_inst|m0_1|u_logic|A9iwx4~0_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O9iwx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|A9iwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Y7iwx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|X61wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X61wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X61wx4~0 .lut_mask = 64'h105030F0115533FF;
+defparam \soc_inst|m0_1|u_logic|X61wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y10_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X61wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|X61wx4~1_combout = ( \soc_inst|m0_1|u_logic|D7iwx4~1_combout & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (\soc_inst|m0_1|u_logic|X61wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) #
+// (\soc_inst|m0_1|u_logic|B8nwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|D7iwx4~1_combout & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (\soc_inst|m0_1|u_logic|X61wx4~0_combout & (\soc_inst|m0_1|u_logic|Sknwx4~2_combout &
+// ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # (\soc_inst|m0_1|u_logic|B8nwx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|D7iwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (\soc_inst|m0_1|u_logic|X61wx4~0_combout &
+// !\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|D7iwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (\soc_inst|m0_1|u_logic|X61wx4~0_combout & (\soc_inst|m0_1|u_logic|Sknwx4~2_combout &
+// !\soc_inst|m0_1|u_logic|Glnwx4~1_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|X61wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|D7iwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|X61wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X61wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X61wx4~1 .lut_mask = 64'h0500550005015511;
+defparam \soc_inst|m0_1|u_logic|X61wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y10_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M41wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|M41wx4~1_combout = ( \soc_inst|m0_1|u_logic|X61wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|J61wx4~0_combout & (\soc_inst|m0_1|u_logic|M41wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Add5~61_sumout ) #
+// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|J61wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Add5~61_sumout ),
+ .datac(!\soc_inst|m0_1|u_logic|M41wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|X61wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M41wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M41wx4~1 .lut_mask = 64'h00000000080A080A;
+defparam \soc_inst|m0_1|u_logic|M41wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y9_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y873z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y873z4~feeder_combout = ( \soc_inst|m0_1|u_logic|M41wx4~1_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Y873z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y873z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y873z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Y873z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X51_Y9_N50
+dffeas \soc_inst|m0_1|u_logic|Y873z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Y873z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Y873z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y873z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y873z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X51_Y10_N26
+dffeas \soc_inst|m0_1|u_logic|F4q2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|F4q2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F4q2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F4q2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O723z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O723z4~feeder_combout = ( \soc_inst|m0_1|u_logic|M41wx4~1_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|O723z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O723z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O723z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|O723z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X50_Y11_N1
+dffeas \soc_inst|m0_1|u_logic|O723z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|O723z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|O723z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O723z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|O723z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X51_Y10_N22
+dffeas \soc_inst|m0_1|u_logic|Gq43z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Gq43z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gq43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gq43z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y9_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S71wx4~6_combout = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q & ((!\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|O723z4~DUPLICATE_q )) #
+// (\soc_inst|m0_1|u_logic|H3d3z4~q & ((!\soc_inst|m0_1|u_logic|Gq43z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|O723z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Gq43z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S71wx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S71wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~6 .lut_mask = 64'h3120000000000000;
+defparam \soc_inst|m0_1|u_logic|S71wx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y10_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pz53z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pz53z4~feeder_combout = ( \soc_inst|m0_1|u_logic|M41wx4~1_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pz53z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pz53z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pz53z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Pz53z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X50_Y10_N7
+dffeas \soc_inst|m0_1|u_logic|Pz53z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Pz53z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Pz53z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pz53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pz53z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y9_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S71wx4~7_combout = ( \soc_inst|m0_1|u_logic|H3d3z4~q & ( \soc_inst|m0_1|u_logic|J7q2z4~q & ( (!\soc_inst|m0_1|u_logic|Pz53z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Yaz2z4~q &
+// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~q & ( !\soc_inst|m0_1|u_logic|J7q2z4~q & ( (!\soc_inst|m0_1|u_logic|Pz53z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Yaz2z4~q &
+// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~q & ( !\soc_inst|m0_1|u_logic|J7q2z4~q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q & !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pz53z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|J7q2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S71wx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S71wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~7 .lut_mask = 64'hC000020000000200;
+defparam \soc_inst|m0_1|u_logic|S71wx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y9_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~8 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S71wx4~8_combout = ( !\soc_inst|m0_1|u_logic|S71wx4~6_combout & ( !\soc_inst|m0_1|u_logic|S71wx4~7_combout & ( (!\soc_inst|m0_1|u_logic|Y873z4~q & (!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|F4q2z4~q )))) # (\soc_inst|m0_1|u_logic|Y873z4~q & (((!\soc_inst|m0_1|u_logic|C51xx4~0_combout )) # (\soc_inst|m0_1|u_logic|F4q2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Y873z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|F4q2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|S71wx4~6_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|S71wx4~7_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S71wx4~8_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S71wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~8 .lut_mask = 64'hF351000000000000;
+defparam \soc_inst|m0_1|u_logic|S71wx4~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y8_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mgawx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mgawx4~1_combout = ( \soc_inst|m0_1|u_logic|Mgawx4~0_combout & ( \soc_inst|m0_1|u_logic|S71wx4~8_combout & ( (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) #
+// (\soc_inst|m0_1|u_logic|S71wx4~5_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Mgawx4~0_combout & ( !\soc_inst|m0_1|u_logic|S71wx4~8_combout & ( ((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout &
+// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|S71wx4~5_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Mgawx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|S71wx4~8_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mgawx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mgawx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mgawx4~1 .lut_mask = 64'h000055F5000077F7;
+defparam \soc_inst|m0_1|u_logic|Mgawx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y6_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~61 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~61_sumout = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout & \soc_inst|m0_1|u_logic|C61wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Mgawx4~1_combout $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout &
+// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( \soc_inst|m0_1|u_logic|Add5~18 ))
+// \soc_inst|m0_1|u_logic|Add5~62 = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout & \soc_inst|m0_1|u_logic|C61wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Mgawx4~1_combout $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout &
+// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( \soc_inst|m0_1|u_logic|Add5~18 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|C61wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Mgawx4~1_combout ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add5~18 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add5~61_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add5~62 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~61 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~61 .lut_mask = 64'h00008877000000F0;
+defparam \soc_inst|m0_1|u_logic|Add5~61 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y6_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~65 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~65_sumout = SUM(( !\soc_inst|m0_1|u_logic|Ns9wx4~1_combout $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout &
+// \soc_inst|m0_1|u_logic|P82wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~62 ))
+// \soc_inst|m0_1|u_logic|Add5~66 = CARRY(( !\soc_inst|m0_1|u_logic|Ns9wx4~1_combout $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout &
+// \soc_inst|m0_1|u_logic|P82wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~62 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add5~62 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add5~65_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add5~66 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~65 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~65 .lut_mask = 64'h0000FF0F00007788;
+defparam \soc_inst|m0_1|u_logic|Add5~65 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q52wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q52wx4~0_combout = ( \soc_inst|m0_1|u_logic|N72wx4~0_combout & ( \soc_inst|m0_1|u_logic|Add5~65_sumout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout &
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z62wx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|N72wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Add5~65_sumout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout &
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z62wx4~combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Z62wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|N72wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~65_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q52wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q52wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q52wx4~0 .lut_mask = 64'h0000AA0A00002202;
+defparam \soc_inst|m0_1|u_logic|Q52wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y11_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q52wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q52wx4~1_combout = ( \soc_inst|m0_1|u_logic|Q52wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Glnwx4~2_combout & ( (\soc_inst|m0_1|u_logic|U72wx4~0_combout & ((!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ) #
+// (\soc_inst|m0_1|u_logic|Sknwx4~2_combout ))) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|U72wx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Q52wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Glnwx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q52wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q52wx4~1 .lut_mask = 64'h000000CF00000000;
+defparam \soc_inst|m0_1|u_logic|Q52wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y7_N41
+dffeas \soc_inst|m0_1|u_logic|E0d3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|E0d3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E0d3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|E0d3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y11_N19
+dffeas \soc_inst|m0_1|u_logic|Naq2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Naq2z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Naq2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Naq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Naq2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y7_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ey9wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ey9wx4~1_combout = ( \soc_inst|m0_1|u_logic|Rni2z4~q & ( \soc_inst|m0_1|u_logic|Naq2z4~q & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~q &
+// !\soc_inst|m0_1|u_logic|E0d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rni2z4~q & ( !\soc_inst|m0_1|u_logic|Naq2z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~q & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) #
+// (!\soc_inst|m0_1|u_logic|E0d3z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|E0d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Naq2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ey9wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~1 .lut_mask = 64'h0000030200000100;
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y8_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ey9wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ey9wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Rdq2z4~q & ( \soc_inst|m0_1|u_logic|Wj73z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rdq2z4~q & ( !\soc_inst|m0_1|u_logic|Wj73z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rdq2z4~q & ( !\soc_inst|m0_1|u_logic|Wj73z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) )
+// )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rdq2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wj73z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ey9wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~0 .lut_mask = 64'h5000100040000000;
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y8_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ey9wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ey9wx4~2_combout = ( !\soc_inst|m0_1|u_logic|Ft83z4~q & ( \soc_inst|m0_1|u_logic|Wnu2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ft83z4~q & ( !\soc_inst|m0_1|u_logic|Wnu2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ft83z4~q & ( !\soc_inst|m0_1|u_logic|Wnu2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ft83z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wnu2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ey9wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~2 .lut_mask = 64'h0500040001000000;
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y9_N47
+dffeas \soc_inst|m0_1|u_logic|Fxv2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Fxv2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fxv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fxv2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y12_N43
+dffeas \soc_inst|m0_1|u_logic|Ccq2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ccq2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ccq2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ccq2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y9_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ey9wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ey9wx4~3_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Fxv2z4~q & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Ccq2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fxv2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ccq2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ey9wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~3 .lut_mask = 64'h0050004400000000;
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y7_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ey9wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ey9wx4~combout = ( !\soc_inst|m0_1|u_logic|Ey9wx4~2_combout & ( !\soc_inst|m0_1|u_logic|Ey9wx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Ey9wx4~1_combout & !\soc_inst|m0_1|u_logic|Ey9wx4~0_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Ey9wx4~1_combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Ey9wx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ey9wx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ey9wx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ey9wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ey9wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ey9wx4 .lut_mask = 64'hCC00000000000000;
+defparam \soc_inst|m0_1|u_logic|Ey9wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y9_N2
+dffeas \soc_inst|m0_1|u_logic|Euh3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Euh3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Euh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Euh3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y9_N44
+dffeas \soc_inst|m0_1|u_logic|E153z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|E153z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E153z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|E153z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y12_N56
+dffeas \soc_inst|m0_1|u_logic|Na63z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Na63z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Na63z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Na63z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y9_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Du9wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Du9wx4~0_combout = ( \soc_inst|m0_1|u_logic|Na63z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|E153z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~q &
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Na63z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Rni2z4~q &
+// ((!\soc_inst|m0_1|u_logic|E153z4~q ) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|E153z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Na63z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Du9wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Du9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Du9wx4~0 .lut_mask = 64'h0000000040504000;
+defparam \soc_inst|m0_1|u_logic|Du9wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y9_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Du9wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Du9wx4~2_combout = ( !\soc_inst|m0_1|u_logic|Lph3z4~q & ( \soc_inst|m0_1|u_logic|Arh3z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~q &
+// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lph3z4~q & ( !\soc_inst|m0_1|u_logic|Arh3z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~q &
+// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lph3z4~q & ( !\soc_inst|m0_1|u_logic|Arh3z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Rni2z4~q &
+// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Lph3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Arh3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Du9wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Du9wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Du9wx4~2 .lut_mask = 64'h00A0008000200000;
+defparam \soc_inst|m0_1|u_logic|Du9wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y12_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aw9wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Aw9wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q & (!\soc_inst|m0_1|u_logic|Psh3z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~q &
+// \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Psh3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Aw9wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Aw9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aw9wx4~0 .lut_mask = 64'h0000000000800000;
+defparam \soc_inst|m0_1|u_logic|Aw9wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y11_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Du9wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Du9wx4~1_combout = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( \soc_inst|m0_1|u_logic|Wzy2z4~q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q & (!\soc_inst|m0_1|u_logic|Mi23z4~q )) #
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q & ((!\soc_inst|m0_1|u_logic|Vr33z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mi23z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Vr33z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Du9wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Du9wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Du9wx4~1 .lut_mask = 64'h00000000B0800000;
+defparam \soc_inst|m0_1|u_logic|Du9wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y9_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Du9wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Du9wx4~3_combout = ( !\soc_inst|m0_1|u_logic|Aw9wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Du9wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Du9wx4~0_combout & (!\soc_inst|m0_1|u_logic|Du9wx4~2_combout &
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Euh3z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Euh3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Du9wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Du9wx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Aw9wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Du9wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Du9wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Du9wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Du9wx4~3 .lut_mask = 64'hD000000000000000;
+defparam \soc_inst|m0_1|u_logic|Du9wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y6_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P82wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P82wx4~0_combout = ( \soc_inst|m0_1|u_logic|Ey9wx4~combout & ( \soc_inst|m0_1|u_logic|Du9wx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|J7q2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & !\soc_inst|m0_1|u_logic|Y8q2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ey9wx4~combout & ( \soc_inst|m0_1|u_logic|Du9wx4~3_combout & (
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|J7q2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((!\soc_inst|m0_1|u_logic|Y8q2z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Ey9wx4~combout & ( !\soc_inst|m0_1|u_logic|Du9wx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|J7q2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((!\soc_inst|m0_1|u_logic|Y8q2z4~q )
+// # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ey9wx4~combout & ( !\soc_inst|m0_1|u_logic|Du9wx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|J7q2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((!\soc_inst|m0_1|u_logic|Y8q2z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|J7q2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Y8q2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ey9wx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Du9wx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P82wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P82wx4~0 .lut_mask = 64'hAAF3AAF3AAF3AAC0;
+defparam \soc_inst|m0_1|u_logic|P82wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y6_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|haddr_o~3_combout = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( \soc_inst|m0_1|u_logic|Add5~65_sumout & ( (((\soc_inst|m0_1|u_logic|Add3~93_sumout & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) #
+// (\soc_inst|m0_1|u_logic|P82wx4~0_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( \soc_inst|m0_1|u_logic|Add5~65_sumout & ( ((\soc_inst|m0_1|u_logic|Add3~93_sumout &
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( !\soc_inst|m0_1|u_logic|Add5~65_sumout & ( ((\soc_inst|m0_1|u_logic|Add3~93_sumout &
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|P82wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( !\soc_inst|m0_1|u_logic|Add5~65_sumout & ( (\soc_inst|m0_1|u_logic|Add3~93_sumout &
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Add3~93_sumout ),
+ .datab(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~65_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|haddr_o~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|haddr_o~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|haddr_o~3 .lut_mask = 64'h050505FF373737FF;
+defparam \soc_inst|m0_1|u_logic|haddr_o~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y10_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zcivx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zcivx4~0_combout = ( \soc_inst|m0_1|u_logic|Y8q2z4~q & ( \soc_inst|m0_1|u_logic|haddr_o~3_combout & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) #
+// ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y8q2z4~q & ( \soc_inst|m0_1|u_logic|haddr_o~3_combout & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout &
+// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Y8q2z4~q & ( !\soc_inst|m0_1|u_logic|haddr_o~3_combout & (
+// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y8q2z4~q & ( !\soc_inst|m0_1|u_logic|haddr_o~3_combout & (
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Y8q2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|haddr_o~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zcivx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zcivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zcivx4~0 .lut_mask = 64'h4545EFEF4500EF00;
+defparam \soc_inst|m0_1|u_logic|Zcivx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X19_Y10_N49
+dffeas \soc_inst|m0_1|u_logic|Y8q2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Zcivx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Y8q2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y8q2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y8q2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y8_N35
+dffeas \soc_inst|m0_1|u_logic|If33z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|If33z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|If33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|If33z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y7_N25
+dffeas \soc_inst|m0_1|u_logic|Z523z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Z523z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z523z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z523z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y8_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kq92z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kq92z4~1_combout = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( \soc_inst|m0_1|u_logic|Z523z4~q & ( (!\soc_inst|m0_1|u_logic|If33z4~q & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Rni2z4~q &
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( !\soc_inst|m0_1|u_logic|Z523z4~q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|If33z4~q ) #
+// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|If33z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Z523z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kq92z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kq92z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kq92z4~1 .lut_mask = 64'h00E0000000200000;
+defparam \soc_inst|m0_1|u_logic|Kq92z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y8_N14
+dffeas \soc_inst|m0_1|u_logic|Rbo2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rbo2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rbo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rbo2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y8_N50
+dffeas \soc_inst|m0_1|u_logic|Ay53z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ay53z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ay53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ay53z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y8_N46
+dffeas \soc_inst|m0_1|u_logic|Ro43z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ro43z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ro43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ro43z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y8_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kq92z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kq92z4~0_combout = ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( !\soc_inst|m0_1|u_logic|Rni2z4~q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Ro43z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Ay53z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ay53z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ro43z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kq92z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kq92z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kq92z4~0 .lut_mask = 64'h0000320200000000;
+defparam \soc_inst|m0_1|u_logic|Kq92z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y5_N38
+dffeas \soc_inst|m0_1|u_logic|O403z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|O403z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O403z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|O403z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y5_N26
+dffeas \soc_inst|m0_1|u_logic|I113z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|I113z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I113z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I113z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y5_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kq92z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kq92z4~2_combout = ( !\soc_inst|m0_1|u_logic|O403z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|I113z4~q & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|O403z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|I113z4~q & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|O403z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|I113z4~q & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q &
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|O403z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|I113z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kq92z4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kq92z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kq92z4~2 .lut_mask = 64'h5000400010000000;
+defparam \soc_inst|m0_1|u_logic|Kq92z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y5_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hs92z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hs92z4~0_combout = ( !\soc_inst|m0_1|u_logic|Cao2z4~q & ( \soc_inst|m0_1|u_logic|M1j2z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Sjj2z4~q &
+// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Cao2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hs92z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hs92z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hs92z4~0 .lut_mask = 64'h0000000020000000;
+defparam \soc_inst|m0_1|u_logic|Hs92z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y8_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kq92z4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kq92z4~3_combout = ( !\soc_inst|m0_1|u_logic|Kq92z4~2_combout & ( !\soc_inst|m0_1|u_logic|Hs92z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Kq92z4~1_combout & (!\soc_inst|m0_1|u_logic|Kq92z4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rbo2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Kq92z4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Rbo2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Kq92z4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Kq92z4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Hs92z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kq92z4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kq92z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kq92z4~3 .lut_mask = 64'h8C00000000000000;
+defparam \soc_inst|m0_1|u_logic|Kq92z4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y8_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U11wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U11wx4~0_combout = ( \soc_inst|m0_1|u_logic|Nrvwx4~combout & ( \soc_inst|m0_1|u_logic|Kq92z4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((!\soc_inst|m0_1|u_logic|Y8q2z4~q )))) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Ym93z4~q & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nrvwx4~combout & ( \soc_inst|m0_1|u_logic|Kq92z4~3_combout & (
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((!\soc_inst|m0_1|u_logic|Y8q2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Ym93z4~q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Nrvwx4~combout & ( !\soc_inst|m0_1|u_logic|Kq92z4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((!\soc_inst|m0_1|u_logic|Y8q2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Ym93z4~q
+// ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nrvwx4~combout & ( !\soc_inst|m0_1|u_logic|Kq92z4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((!\soc_inst|m0_1|u_logic|Y8q2z4~q )))) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Ym93z4~q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ym93z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Y8q2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Nrvwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kq92z4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U11wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U11wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U11wx4~0 .lut_mask = 64'hE4F5E4F5E4F5E4A0;
+defparam \soc_inst|m0_1|u_logic|U11wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y6_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~69 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~69_sumout = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout & \soc_inst|m0_1|u_logic|U11wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Kfawx4~1_combout $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout &
+// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( \soc_inst|m0_1|u_logic|Add5~66 ))
+// \soc_inst|m0_1|u_logic|Add5~70 = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout & \soc_inst|m0_1|u_logic|U11wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Kfawx4~1_combout $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout &
+// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( \soc_inst|m0_1|u_logic|Add5~66 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|U11wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Kfawx4~1_combout ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add5~66 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add5~69_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add5~70 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~69 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~69 .lut_mask = 64'h00008877000000F0;
+defparam \soc_inst|m0_1|u_logic|Add5~69 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y6_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~73 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~73_sumout = SUM(( !\soc_inst|m0_1|u_logic|Gdawx4~1_combout $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout &
+// \soc_inst|m0_1|u_logic|Hy0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~70 ))
+// \soc_inst|m0_1|u_logic|Add5~74 = CARRY(( !\soc_inst|m0_1|u_logic|Gdawx4~1_combout $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout &
+// \soc_inst|m0_1|u_logic|Hy0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~70 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Gdawx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add5~70 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add5~73_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add5~74 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~73 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~73 .lut_mask = 64'h0000FF0F00007788;
+defparam \soc_inst|m0_1|u_logic|Add5~73 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y5_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bv0wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bv0wx4~combout = ( \soc_inst|m0_1|u_logic|Add3~85_sumout & ( \soc_inst|m0_1|u_logic|Add5~73_sumout & ( (((\soc_inst|m0_1|u_logic|Hy0wx4~0_combout & \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) #
+// (\soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~85_sumout & ( \soc_inst|m0_1|u_logic|Add5~73_sumout & ( ((\soc_inst|m0_1|u_logic|Hy0wx4~0_combout &
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~85_sumout & ( !\soc_inst|m0_1|u_logic|Add5~73_sumout & ( ((\soc_inst|m0_1|u_logic|Hy0wx4~0_combout &
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~85_sumout & ( !\soc_inst|m0_1|u_logic|Add5~73_sumout & ( (\soc_inst|m0_1|u_logic|Hy0wx4~0_combout &
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Add3~85_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~73_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bv0wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bv0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bv0wx4 .lut_mask = 64'h005533770F5F3F7F;
+defparam \soc_inst|m0_1|u_logic|Bv0wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y5_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tmjvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tmjvx4~0_combout = ( \soc_inst|m0_1|u_logic|H4p2z4~q & ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout & (((!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Plx2z4~q
+// ))) # (\soc_inst|m0_1|u_logic|R1pvx4~0_combout & (!\soc_inst|m0_1|u_logic|Bv0wx4~combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Plx2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H4p2z4~q & (
+// \soc_inst|m0_1|u_logic|Df3wx4~9_combout & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout & (((!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Plx2z4~q ))) # (\soc_inst|m0_1|u_logic|R1pvx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Bv0wx4~combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Plx2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|H4p2z4~q & ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout & (
+// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Bv0wx4~combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Plx2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Bv0wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|H4p2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tmjvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tmjvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tmjvx4~0 .lut_mask = 64'h0000FAFAFA32FA32;
+defparam \soc_inst|m0_1|u_logic|Tmjvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y5_N28
+dffeas \soc_inst|m0_1|u_logic|H4p2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Tmjvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|H4p2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H4p2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H4p2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y7_N26
+dffeas \soc_inst|m0_1|u_logic|U9u2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|U9u2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U9u2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U9u2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X50_Y9_N19
+dffeas \soc_inst|m0_1|u_logic|Df83z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Df83z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Df83z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Df83z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y10_N46
+dffeas \soc_inst|m0_1|u_logic|U573z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|U573z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U573z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U573z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y7_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xcuwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xcuwx4~1_combout = ( \soc_inst|m0_1|u_logic|U573z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Ozo2z4~q & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Wzy2z4~q & (\soc_inst|m0_1|u_logic|U9u2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Wzy2z4~q & ((\soc_inst|m0_1|u_logic|Df83z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U573z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Ozo2z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q &
+// (((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|U9u2z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q & (((\soc_inst|m0_1|u_logic|Df83z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|U573z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Ozo2z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q & (\soc_inst|m0_1|u_logic|U9u2z4~q & ((\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q &
+// (((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Df83z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U573z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Ozo2z4~q & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|Wzy2z4~q & (\soc_inst|m0_1|u_logic|U9u2z4~q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~q & ((\soc_inst|m0_1|u_logic|Df83z4~DUPLICATE_q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|U9u2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Df83z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|U573z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ozo2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xcuwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xcuwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xcuwx4~1 .lut_mask = 64'h00473347CC47FF47;
+defparam \soc_inst|m0_1|u_logic|Xcuwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X36_Y9_N46
+dffeas \soc_inst|m0_1|u_logic|Kwo2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Kwo2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kwo2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kwo2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y10_N38
+dffeas \soc_inst|m0_1|u_logic|Djv2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Djv2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Djv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Djv2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y10_N16
+dffeas \soc_inst|m0_1|u_logic|Uj93z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Uj93z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uj93z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uj93z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y7_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xcuwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xcuwx4~0_combout = ( \soc_inst|m0_1|u_logic|Djv2z4~q & ( \soc_inst|m0_1|u_logic|Uj93z4~DUPLICATE_q & ( ((!\soc_inst|m0_1|u_logic|Wzy2z4~q & (\soc_inst|m0_1|u_logic|Zxo2z4~q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~q &
+// ((\soc_inst|m0_1|u_logic|Kwo2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Djv2z4~q & ( \soc_inst|m0_1|u_logic|Uj93z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q &
+// (\soc_inst|m0_1|u_logic|Zxo2z4~q & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q & (((\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Kwo2z4~DUPLICATE_q )))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Djv2z4~q & ( !\soc_inst|m0_1|u_logic|Uj93z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q & (((\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Zxo2z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q &
+// (((\soc_inst|m0_1|u_logic|Kwo2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Djv2z4~q & ( !\soc_inst|m0_1|u_logic|Uj93z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|Wzy2z4~q & (\soc_inst|m0_1|u_logic|Zxo2z4~q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~q & ((\soc_inst|m0_1|u_logic|Kwo2z4~DUPLICATE_q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Zxo2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Kwo2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Djv2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Uj93z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xcuwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xcuwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xcuwx4~0 .lut_mask = 64'h470047CC473347FF;
+defparam \soc_inst|m0_1|u_logic|Xcuwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y7_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xcuwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xcuwx4~combout = ( !\soc_inst|m0_1|u_logic|Xcuwx4~1_combout & ( \soc_inst|m0_1|u_logic|Xcuwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & !\soc_inst|m0_1|u_logic|Fgm2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Xcuwx4~1_combout
+// & ( !\soc_inst|m0_1|u_logic|Xcuwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & \soc_inst|m0_1|u_logic|Fgm2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xcuwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Xcuwx4~0_combout & ( \soc_inst|m0_1|u_logic|Rni2z4~q
+// ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Xcuwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Xcuwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xcuwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xcuwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xcuwx4 .lut_mask = 64'h5555050550500000;
+defparam \soc_inst|m0_1|u_logic|Xcuwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y10_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yj92z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yj92z4~0_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( \soc_inst|m0_1|u_logic|Cn43z4~q & ( (!\soc_inst|m0_1|u_logic|Lw53z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( !\soc_inst|m0_1|u_logic|Cn43z4~q & ( (!\soc_inst|m0_1|u_logic|Lw53z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q & ( !\soc_inst|m0_1|u_logic|Cn43z4~q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lw53z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Cn43z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yj92z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yj92z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yj92z4~0 .lut_mask = 64'h0300020000000200;
+defparam \soc_inst|m0_1|u_logic|Yj92z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y7_N44
+dffeas \soc_inst|m0_1|u_logic|S2p2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|S2p2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S2p2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|S2p2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y9_N38
+dffeas \soc_inst|m0_1|u_logic|D1p2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|D1p2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D1p2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|D1p2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y9_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vl92z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vl92z4~0_combout = ( !\soc_inst|m0_1|u_logic|D1p2z4~q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (\soc_inst|m0_1|u_logic|M1j2z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Sjj2z4~q &
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|D1p2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vl92z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vl92z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vl92z4~0 .lut_mask = 64'h0000000040000000;
+defparam \soc_inst|m0_1|u_logic|Vl92z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y10_N32
+dffeas \soc_inst|m0_1|u_logic|K423z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|K423z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K423z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K423z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y11_N14
+dffeas \soc_inst|m0_1|u_logic|Td33z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Td33z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Td33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Td33z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y11_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yj92z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yj92z4~1_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|Td33z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~q & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|K423z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Wzy2z4~q & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|K423z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Td33z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yj92z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yj92z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yj92z4~1 .lut_mask = 64'h0A000C0000000000;
+defparam \soc_inst|m0_1|u_logic|Yj92z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yj92z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yj92z4~2_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Z203z4~q & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Sjj2z4~q & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Tz03z4~q & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Z203z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Tz03z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yj92z4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yj92z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yj92z4~2 .lut_mask = 64'h0000A00000008800;
+defparam \soc_inst|m0_1|u_logic|Yj92z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y7_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yj92z4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yj92z4~3_combout = ( !\soc_inst|m0_1|u_logic|Yj92z4~1_combout & ( !\soc_inst|m0_1|u_logic|Yj92z4~2_combout & ( (!\soc_inst|m0_1|u_logic|Yj92z4~0_combout & (!\soc_inst|m0_1|u_logic|Vl92z4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|S2p2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Yj92z4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|S2p2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Vl92z4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Yj92z4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yj92z4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yj92z4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yj92z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yj92z4~3 .lut_mask = 64'h8C00000000000000;
+defparam \soc_inst|m0_1|u_logic|Yj92z4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y7_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hy0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hy0wx4~0_combout = ( \soc_inst|m0_1|u_logic|Yj92z4~3_combout & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Ym93z4~q )) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((\soc_inst|m0_1|u_logic|Xcuwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yj92z4~3_combout & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Ym93z4~q ) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Yj92z4~3_combout & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Ym93z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|H4p2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yj92z4~3_combout & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Ym93z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|H4p2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|H4p2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ym93z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Xcuwx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Yj92z4~3_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hy0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hy0wx4~0 .lut_mask = 64'hE4E4E4E4F5F5A0F5;
+defparam \soc_inst|m0_1|u_logic|Hy0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y4_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fx0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fx0wx4~0_combout = ( \soc_inst|m0_1|u_logic|Gdawx4~1_combout & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) #
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gdawx4~1_combout & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) #
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Gdawx4~1_combout & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) #
+// ((\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|Hy0wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout &
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gdawx4~1_combout & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) #
+// ((!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|Hy0wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout &
+// ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Gdawx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fx0wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fx0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fx0wx4~0 .lut_mask = 64'hFAACACFAF0A0A0F0;
+defparam \soc_inst|m0_1|u_logic|Fx0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y10_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iv0wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Iv0wx4~1_combout = ( \soc_inst|m0_1|u_logic|Add5~73_sumout & ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & (\soc_inst|m0_1|u_logic|Fx0wx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yw0wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~73_sumout & ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout &
+// (\soc_inst|m0_1|u_logic|Fx0wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yw0wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~73_sumout & ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout & (
+// (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & (\soc_inst|m0_1|u_logic|Fx0wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yw0wx4~combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Yw0wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fx0wx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Add5~73_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Iv0wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Iv0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Iv0wx4~1 .lut_mask = 64'h008A0000008A008A;
+defparam \soc_inst|m0_1|u_logic|Iv0wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y10_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iv0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Iv0wx4~0_combout = ( \soc_inst|m0_1|u_logic|Mx0wx4~combout & ( \soc_inst|m0_1|u_logic|Iv0wx4~1_combout & ( (((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & \soc_inst|m0_1|u_logic|B8nwx4~1_combout )) #
+// (\soc_inst|m0_1|u_logic|D31wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Mx0wx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Iv0wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Iv0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Iv0wx4~0 .lut_mask = 64'h00000000000037FF;
+defparam \soc_inst|m0_1|u_logic|Iv0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X50_Y9_N20
+dffeas \soc_inst|m0_1|u_logic|Df83z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Df83z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Df83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Df83z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y7_N25
+dffeas \soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y9_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yw0wx4~7_combout = ( !\soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Djv2z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|H3d3z4~q &
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Djv2z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|H3d3z4~q &
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Djv2z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) )
+// )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Djv2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yw0wx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~7 .lut_mask = 64'h1100010010000000;
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X48_Y9_N37
+dffeas \soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y10_N17
+dffeas \soc_inst|m0_1|u_logic|Uj93z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Uj93z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uj93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uj93z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y10_N47
+dffeas \soc_inst|m0_1|u_logic|U573z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|U573z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U573z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U573z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y10_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yw0wx4~6_combout = ( \soc_inst|m0_1|u_logic|Yaz2z4~q & ( \soc_inst|m0_1|u_logic|Svk2z4~q & ( (\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Uj93z4~q & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Yaz2z4~q & ( !\soc_inst|m0_1|u_logic|Svk2z4~q & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q & (\soc_inst|m0_1|u_logic|T1d3z4~q & !\soc_inst|m0_1|u_logic|U573z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Uj93z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|U573z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yw0wx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~6 .lut_mask = 64'h00000A0000000404;
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y9_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~8 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yw0wx4~8_combout = ( \soc_inst|m0_1|u_logic|S61xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Yw0wx4~6_combout & ( (\soc_inst|m0_1|u_logic|Df83z4~q & (!\soc_inst|m0_1|u_logic|Yw0wx4~7_combout &
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Yw0wx4~6_combout & ( (!\soc_inst|m0_1|u_logic|Yw0wx4~7_combout &
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Df83z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yw0wx4~7_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yw0wx4~6_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yw0wx4~8_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~8 .lut_mask = 64'hC0CC404400000000;
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y8_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yw0wx4~combout = ( \soc_inst|m0_1|u_logic|Yw0wx4~5_combout & ( \soc_inst|m0_1|u_logic|Yw0wx4~8_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Yw0wx4~8_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Yw0wx4~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yw0wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yw0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Yw0wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y10_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[17]~17 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout = ( \soc_inst|m0_1|u_logic|Htyvx4~3_combout & ( ((!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout )) # (\soc_inst|m0_1|u_logic|Yw0wx4~combout ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Htyvx4~3_combout & ( (\soc_inst|m0_1|u_logic|Yw0wx4~combout & (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout & \soc_inst|m0_1|u_logic|Y9t2z4~q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Yw0wx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hwdata_o[17]~17 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[17]~17 .lut_mask = 64'h00300030FF3FFF3F;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[17]~17 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y10_N40
+dffeas \soc_inst|m0_1|u_logic|B2i3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|B2i3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B2i3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B2i3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y9_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pomvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pomvx4~0_combout = ( \soc_inst|m0_1|u_logic|S3i3z4~q & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((\soc_inst|m0_1|u_logic|B2i3z4~q ) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|S3i3z4~q & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q & \soc_inst|m0_1|u_logic|B2i3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|S3i3z4~q & (
+// !\soc_inst|m0_1|u_logic|Mxtvx4~combout & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Add0~29_sumout ) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|S3i3z4~q & (
+// !\soc_inst|m0_1|u_logic|Mxtvx4~combout & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q & !\soc_inst|m0_1|u_logic|Add0~29_sumout )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Add0~29_sumout ),
+ .datac(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|B2i3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|S3i3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pomvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pomvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pomvx4~0 .lut_mask = 64'h4F4FEFEF0F5FAFFF;
+defparam \soc_inst|m0_1|u_logic|Pomvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y9_N26
+dffeas \soc_inst|m0_1|u_logic|S3i3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Pomvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|S3i3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S3i3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|S3i3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~17 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add0~17_sumout = SUM(( !\soc_inst|m0_1|u_logic|O0o2z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~30 ))
+// \soc_inst|m0_1|u_logic|Add0~18 = CARRY(( !\soc_inst|m0_1|u_logic|O0o2z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~30 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|O0o2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add0~30 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add0~17_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add0~18 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add0~17 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~17 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~17 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y10_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iomvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Iomvx4~0_combout = ( \soc_inst|m0_1|u_logic|O0o2z4~q & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Xyn2z4~q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|O0o2z4~q & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout & ( ((\soc_inst|m0_1|u_logic|Xyn2z4~q & \soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|O0o2z4~q & (
+// !\soc_inst|m0_1|u_logic|Mxtvx4~combout & ( ((!\soc_inst|m0_1|u_logic|Add0~17_sumout ) # (!\soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|O0o2z4~q & (
+// !\soc_inst|m0_1|u_logic|Mxtvx4~combout & ( ((!\soc_inst|m0_1|u_logic|Add0~17_sumout & \soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Xyn2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Add0~17_sumout ),
+ .datad(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|O0o2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Iomvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Iomvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Iomvx4~0 .lut_mask = 64'h33F3FFF33377FF77;
+defparam \soc_inst|m0_1|u_logic|Iomvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X30_Y10_N17
+dffeas \soc_inst|m0_1|u_logic|O0o2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Iomvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|O0o2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O0o2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|O0o2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y11_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~53 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add0~53_sumout = SUM(( !\soc_inst|m0_1|u_logic|Jpa3z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~18 ))
+// \soc_inst|m0_1|u_logic|Add0~54 = CARRY(( !\soc_inst|m0_1|u_logic|Jpa3z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~18 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Jpa3z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add0~18 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add0~53_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add0~54 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add0~53 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~53 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~53 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~45 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add0~45_sumout = SUM(( !\soc_inst|m0_1|u_logic|Z2h3z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~54 ))
+// \soc_inst|m0_1|u_logic|Add0~46 = CARRY(( !\soc_inst|m0_1|u_logic|Z2h3z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~54 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Z2h3z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add0~54 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add0~45_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add0~46 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add0~45 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~45 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~45 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Unmvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Unmvx4~0_combout = ( \soc_inst|m0_1|u_logic|Z2h3z4~q & ( \soc_inst|m0_1|u_logic|Add0~45_sumout & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((\soc_inst|m0_1|u_logic|Mxtvx4~combout & \soc_inst|m0_1|u_logic|I1h3z4~q )) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z2h3z4~q & ( \soc_inst|m0_1|u_logic|Add0~45_sumout & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q & (\soc_inst|m0_1|u_logic|Mxtvx4~combout & \soc_inst|m0_1|u_logic|I1h3z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Z2h3z4~q & ( !\soc_inst|m0_1|u_logic|Add0~45_sumout & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # (\soc_inst|m0_1|u_logic|I1h3z4~q )) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z2h3z4~q & ( !\soc_inst|m0_1|u_logic|Add0~45_sumout & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # (\soc_inst|m0_1|u_logic|I1h3z4~q ))))
+// # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|I1h3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Z2h3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add0~45_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Unmvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Unmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Unmvx4~0 .lut_mask = 64'h7377FBFF3337BBBF;
+defparam \soc_inst|m0_1|u_logic|Unmvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y13_N37
+dffeas \soc_inst|m0_1|u_logic|Z2h3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Unmvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Z2h3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z2h3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z2h3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y11_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~69 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add0~69_sumout = SUM(( !\soc_inst|m0_1|u_logic|Ogo2z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~46 ))
+// \soc_inst|m0_1|u_logic|Add0~70 = CARRY(( !\soc_inst|m0_1|u_logic|Ogo2z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~46 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ogo2z4~q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add0~46 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add0~69_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add0~70 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add0~69 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~69 .lut_mask = 64'h000000000000AAAA;
+defparam \soc_inst|m0_1|u_logic|Add0~69 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X40_Y5_N13
+dffeas \soc_inst|m0_1|u_logic|Llq2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|B5kvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Llq2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Llq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Llq2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y5_N28
+dffeas \soc_inst|m0_1|u_logic|Poq2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Poq2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Poq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Poq2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y5_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ce0wx4~1_combout = ( !\soc_inst|m0_1|u_logic|Llq2z4~q & ( \soc_inst|m0_1|u_logic|Poq2z4~q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Llq2z4~q & ( !\soc_inst|m0_1|u_logic|Poq2z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Llq2z4~q & ( !\soc_inst|m0_1|u_logic|Poq2z4~q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|T1d3z4~q $
+// (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Llq2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Poq2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ce0wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~1 .lut_mask = 64'h8040004080000000;
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y8_N14
+dffeas \soc_inst|m0_1|u_logic|Rz13z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rz13z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rz13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rz13z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X52_Y7_N1
+dffeas \soc_inst|m0_1|u_logic|Eqq2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Eqq2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eqq2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Eqq2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y8_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ce0wx4~0_combout = ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|T1d3z4~q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Eqq2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|Rz13z4~q &
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Rz13z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Eqq2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ce0wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~0 .lut_mask = 64'h40400000A0000000;
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y8_N23
+dffeas \soc_inst|m0_1|u_logic|Ji43z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ji43z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ji43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ji43z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y8_N2
+dffeas \soc_inst|m0_1|u_logic|Anq2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Anq2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Anq2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Anq2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y8_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ce0wx4~2_combout = ( !\soc_inst|m0_1|u_logic|Anq2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|T1d3z4~q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|H3d3z4~q & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) ) #
+// ( \soc_inst|m0_1|u_logic|Anq2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Ji43z4~q ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Anq2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Ji43z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ji43z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Anq2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ce0wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~2 .lut_mask = 64'h1000100010100000;
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y5_N41
+dffeas \soc_inst|m0_1|u_logic|Tch3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Tch3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tch3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tch3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y5_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D03xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D03xx4~0_combout = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|M1j2z4~q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Tch3z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|H3d3z4~q &
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Tch3z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|D03xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D03xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D03xx4~0 .lut_mask = 64'h0800000000000000;
+defparam \soc_inst|m0_1|u_logic|D03xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y4_N41
+dffeas \soc_inst|m0_1|u_logic|A933z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|A933z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|A933z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|A933z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y4_N4
+dffeas \soc_inst|m0_1|u_logic|Sr53z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Sr53z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sr53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sr53z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y4_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ce0wx4~3_combout = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & ((!\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|A933z4~q )) #
+// (\soc_inst|m0_1|u_logic|H3d3z4~q & ((!\soc_inst|m0_1|u_logic|Sr53z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|A933z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sr53z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ce0wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~3 .lut_mask = 64'h0000000000008A80;
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y5_N5
+dffeas \soc_inst|m0_1|u_logic|P9h3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|P9h3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P9h3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|P9h3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y5_N46
+dffeas \soc_inst|m0_1|u_logic|A8h3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|A8h3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|A8h3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|A8h3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y5_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ce0wx4~4_combout = ( !\soc_inst|m0_1|u_logic|P9h3z4~q & ( \soc_inst|m0_1|u_logic|A8h3z4~q & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q &
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|P9h3z4~q & ( !\soc_inst|m0_1|u_logic|A8h3z4~q & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q &
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P9h3z4~q & ( !\soc_inst|m0_1|u_logic|A8h3z4~q & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|T1d3z4~q & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|P9h3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|A8h3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ce0wx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~4 .lut_mask = 64'h5000100040000000;
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y7_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ce0wx4~5_combout = ( !\soc_inst|m0_1|u_logic|Ce0wx4~3_combout & ( !\soc_inst|m0_1|u_logic|Ce0wx4~4_combout & ( (!\soc_inst|m0_1|u_logic|Ce0wx4~1_combout & (!\soc_inst|m0_1|u_logic|Ce0wx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Ce0wx4~2_combout & !\soc_inst|m0_1|u_logic|D03xx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ce0wx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ce0wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ce0wx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|D03xx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ce0wx4~3_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ce0wx4~4_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ce0wx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y7_N52
+dffeas \soc_inst|m0_1|u_logic|B5u2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|B5u2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B5u2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B5u2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y5_N19
+dffeas \soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X52_Y7_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ce0wx4~7_combout = ( \soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|B5u2z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q &
+// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|T1d3z4~q & ((!\soc_inst|m0_1|u_logic|B5u2z4~q ) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|B5u2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ce0wx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~7 .lut_mask = 64'h0023002000000000;
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X52_Y7_N8
+dffeas \soc_inst|m0_1|u_logic|Ka83z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ka83z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ka83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ka83z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X52_Y7_N14
+dffeas \soc_inst|m0_1|u_logic|B173z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|B173z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B173z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B173z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y7_N58
+dffeas \soc_inst|m0_1|u_logic|Bf93z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Bf93z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bf93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bf93z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X52_Y7_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ce0wx4~6_combout = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Bf93z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|B173z4~q & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Bf93z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Bf93z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|B173z4~q &
+// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|B173z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Bf93z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ce0wx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~6 .lut_mask = 64'h0040000500400000;
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y5_N58
+dffeas \soc_inst|m0_1|u_logic|Ebh3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ebh3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ebh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ebh3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X52_Y7_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~8 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ce0wx4~8_combout = ( \soc_inst|m0_1|u_logic|C51xx4~0_combout & ( \soc_inst|m0_1|u_logic|S61xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ce0wx4~7_combout & (\soc_inst|m0_1|u_logic|Ka83z4~q &
+// (!\soc_inst|m0_1|u_logic|Ce0wx4~6_combout & \soc_inst|m0_1|u_logic|Ebh3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout & ( \soc_inst|m0_1|u_logic|S61xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ce0wx4~7_combout &
+// (\soc_inst|m0_1|u_logic|Ka83z4~q & !\soc_inst|m0_1|u_logic|Ce0wx4~6_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|C51xx4~0_combout & ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ce0wx4~7_combout &
+// (!\soc_inst|m0_1|u_logic|Ce0wx4~6_combout & \soc_inst|m0_1|u_logic|Ebh3z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout & ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ce0wx4~7_combout &
+// !\soc_inst|m0_1|u_logic|Ce0wx4~6_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ce0wx4~7_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ka83z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ce0wx4~6_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ebh3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ce0wx4~8_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~8 .lut_mask = 64'hA0A000A020200020;
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y7_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ce0wx4~combout = (\soc_inst|m0_1|u_logic|Ce0wx4~5_combout & \soc_inst|m0_1|u_logic|Ce0wx4~8_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ce0wx4~5_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ce0wx4~8_combout ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ce0wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ce0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4 .lut_mask = 64'h000F000F000F000F;
+defparam \soc_inst|m0_1|u_logic|Ce0wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y10_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[21]~15 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout = ( \soc_inst|m0_1|u_logic|Ce0wx4~combout & ( ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout & \soc_inst|m0_1|u_logic|Y9t2z4~q )) # (\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Ce0wx4~combout & ( (\soc_inst|m0_1|u_logic|Eo5wx4~2_combout & ((!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ce0wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hwdata_o[21]~15 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[21]~15 .lut_mask = 64'h00DD00DD22FF22FF;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[21]~15 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y10_N14
+dffeas \soc_inst|m0_1|u_logic|Ieh3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ieh3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ieh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ieh3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nnmvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nnmvx4~0_combout = ( \soc_inst|m0_1|u_logic|Ogo2z4~q & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ieh3z4~q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Ogo2z4~q & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q & \soc_inst|m0_1|u_logic|Ieh3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ogo2z4~q & (
+// !\soc_inst|m0_1|u_logic|Mxtvx4~combout & ( (!\soc_inst|m0_1|u_logic|Add0~69_sumout ) # ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ogo2z4~q & (
+// !\soc_inst|m0_1|u_logic|Mxtvx4~combout & ( ((!\soc_inst|m0_1|u_logic|Add0~69_sumout & \soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Add0~69_sumout ),
+ .datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ieh3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ogo2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nnmvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nnmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nnmvx4~0 .lut_mask = 64'h22FFEEFF03FFCFFF;
+defparam \soc_inst|m0_1|u_logic|Nnmvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y11_N31
+dffeas \soc_inst|m0_1|u_logic|Ogo2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Nnmvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ogo2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ogo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ogo2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~85 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add0~85_sumout = SUM(( !\soc_inst|m0_1|u_logic|Ddi3z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~70 ))
+// \soc_inst|m0_1|u_logic|Add0~86 = CARRY(( !\soc_inst|m0_1|u_logic|Ddi3z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~70 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ddi3z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add0~70 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add0~85_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add0~86 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add0~85 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~85 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~85 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y10_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cma3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cma3z4~0_combout = ( !\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cma3z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cma3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cma3z4~0 .lut_mask = 64'hFFFFFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Cma3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y10_N19
+dffeas \soc_inst|m0_1|u_logic|Cma3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Cma3z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Cma3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cma3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cma3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gnmvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gnmvx4~0_combout = ( \soc_inst|m0_1|u_logic|Ddi3z4~q & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cma3z4~q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Ddi3z4~q & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q & \soc_inst|m0_1|u_logic|Cma3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ddi3z4~q & (
+// !\soc_inst|m0_1|u_logic|Mxtvx4~combout & ( (!\soc_inst|m0_1|u_logic|Add0~85_sumout ) # ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ddi3z4~q & (
+// !\soc_inst|m0_1|u_logic|Mxtvx4~combout & ( ((!\soc_inst|m0_1|u_logic|Add0~85_sumout & \soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Add0~85_sumout ),
+ .datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Cma3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ddi3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gnmvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gnmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gnmvx4~0 .lut_mask = 64'h22FFEEFF03FFCFFF;
+defparam \soc_inst|m0_1|u_logic|Gnmvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y11_N8
+dffeas \soc_inst|m0_1|u_logic|Ddi3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Gnmvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ddi3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ddi3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ddi3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y11_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y7iwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y7iwx4~0_combout = ( \soc_inst|m0_1|u_logic|Cma3z4~q & ( (!\soc_inst|m0_1|u_logic|Ddi3z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|I7owx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Cma3z4~q & (
+// ((!\soc_inst|m0_1|u_logic|Ddi3z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|I7owx4~combout )) # (\soc_inst|m0_1|u_logic|G6owx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Ddi3z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Cma3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Y7iwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y7iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y7iwx4~0 .lut_mask = 64'h0CFF0CFF0C0C0C0C;
+defparam \soc_inst|m0_1|u_logic|Y7iwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y12_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y7iwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y7iwx4~1_combout = ( !\soc_inst|m0_1|u_logic|Y7iwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Avowx4~2_combout & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[22]~35_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|interconnect_1|HRDATA[22]~35_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Avowx4~2_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Y7iwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Y7iwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y7iwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y7iwx4~1 .lut_mask = 64'hFA00FA0000000000;
+defparam \soc_inst|m0_1|u_logic|Y7iwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y7iwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y7iwx4~2_combout = ( \soc_inst|m0_1|u_logic|Y7iwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout & ((\soc_inst|m0_1|u_logic|Zudwx4~1_combout ))) #
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout & (\soc_inst|m0_1|u_logic|Asdwx4~1_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Asdwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Zudwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Y7iwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Y7iwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y7iwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y7iwx4~2 .lut_mask = 64'h00000000CDEFCDEF;
+defparam \soc_inst|m0_1|u_logic|Y7iwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E9zvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|E9zvx4~0_combout = ( \soc_inst|m0_1|u_logic|O9iwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Y7iwx4~2_combout & \soc_inst|m0_1|u_logic|F8iwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|O9iwx4~1_combout & (
+// ((!\soc_inst|m0_1|u_logic|Y7iwx4~2_combout & \soc_inst|m0_1|u_logic|F8iwx4~0_combout )) # (\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Y7iwx4~2_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|O9iwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|E9zvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E9zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E9zvx4~0 .lut_mask = 64'h0AFF0AFF0A0A0A0A;
+defparam \soc_inst|m0_1|u_logic|E9zvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E9zvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|E9zvx4~1_combout = ( !\soc_inst|m0_1|u_logic|E9zvx4~0_combout & ( \soc_inst|m0_1|u_logic|D7iwx4~1_combout & ( (\soc_inst|m0_1|u_logic|A9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|H9iwx4~1_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|E9zvx4~0_combout & ( !\soc_inst|m0_1|u_logic|D7iwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|W6iwx4~combout & ((\soc_inst|m0_1|u_logic|A9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|H9iwx4~1_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|A9iwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|E9zvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|D7iwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|E9zvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E9zvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E9zvx4~1 .lut_mask = 64'h50F0000055FF0000;
+defparam \soc_inst|m0_1|u_logic|E9zvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y10_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E1ewx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|E1ewx4~0_combout = ( !\soc_inst|m0_1|u_logic|Xcuwx4~combout & ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) # ( \soc_inst|m0_1|u_logic|Xcuwx4~combout & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout & (
+// \soc_inst|m0_1|u_logic|Nrvwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Xcuwx4~combout & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( \soc_inst|m0_1|u_logic|Nrvwx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Nrvwx4~combout ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Xcuwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|E1ewx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E1ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E1ewx4~0 .lut_mask = 64'h33333333FFFF0000;
+defparam \soc_inst|m0_1|u_logic|E1ewx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y10_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E1ewx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|E1ewx4~1_combout = (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout & (\soc_inst|m0_1|u_logic|Eudwx4~0_combout )) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout & ((\soc_inst|m0_1|u_logic|E1ewx4~0_combout )))
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Eudwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|E1ewx4~0_combout ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|E1ewx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E1ewx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E1ewx4~1 .lut_mask = 64'h303F303F303F303F;
+defparam \soc_inst|m0_1|u_logic|E1ewx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqdwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kqdwx4~0_combout = ( \soc_inst|m0_1|u_logic|Jtdwx4~1_combout & ( \soc_inst|m0_1|u_logic|Eudwx4~1_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Eudwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Jtdwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kqdwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y12_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wwdwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wwdwx4~1_combout = ( \soc_inst|m0_1|u_logic|X0ewx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout & (\soc_inst|m0_1|u_logic|E1ewx4~1_combout & \soc_inst|m0_1|u_logic|Kqdwx4~0_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|E1ewx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Kqdwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|X0ewx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wwdwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wwdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wwdwx4~1 .lut_mask = 64'h00000000000C000C;
+defparam \soc_inst|m0_1|u_logic|Wwdwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y12_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z78wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout & (!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z78wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z78wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~0 .lut_mask = 64'hF5A0F5A000000000;
+defparam \soc_inst|m0_1|u_logic|Z78wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y9_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ycu2z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ycu2z4~feeder_combout = ( \soc_inst|m0_1|u_logic|M41wx4~1_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ycu2z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ycu2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ycu2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ycu2z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X51_Y9_N7
+dffeas \soc_inst|m0_1|u_logic|Ycu2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Ycu2z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ycu2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ycu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ycu2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X50_Y9_N16
+dffeas \soc_inst|m0_1|u_logic|Hi83z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Hi83z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hi83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hi83z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y9_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmqwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hmqwx4~2_combout = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( \soc_inst|m0_1|u_logic|Rni2z4~q & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q & (!\soc_inst|m0_1|u_logic|Ycu2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Wzy2z4~q & ((!\soc_inst|m0_1|u_logic|Hi83z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ycu2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Hi83z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hmqwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~2 .lut_mask = 64'h0000000000AC0000;
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y9_N14
+dffeas \soc_inst|m0_1|u_logic|B1q2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|B1q2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B1q2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B1q2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y9_N31
+dffeas \soc_inst|m0_1|u_logic|Hmv2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Hmv2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hmv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hmv2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y9_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmqwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hmqwx4~3_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (\soc_inst|m0_1|u_logic|Rni2z4~q & !\soc_inst|m0_1|u_logic|Hmv2z4~q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|B1q2z4~q & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|B1q2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Hmv2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hmqwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~3 .lut_mask = 64'h0404050000000000;
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X51_Y9_N29
+dffeas \soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y9_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmqwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hmqwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q & (!\soc_inst|m0_1|u_logic|Y873z4~q & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Sjj2z4~q & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Y873z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hmqwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~0 .lut_mask = 64'h0088000000C00000;
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X48_Y10_N38
+dffeas \soc_inst|m0_1|u_logic|Mzp2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Mzp2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mzp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mzp2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y10_N59
+dffeas \soc_inst|m0_1|u_logic|No93z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|No93z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|No93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|No93z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y10_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmqwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hmqwx4~1_combout = ( \soc_inst|m0_1|u_logic|Wzy2z4~q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q & (!\soc_inst|m0_1|u_logic|Mzp2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q & ((!\soc_inst|m0_1|u_logic|No93z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mzp2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|No93z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hmqwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~1 .lut_mask = 64'h00000000000000AC;
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y9_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmqwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hmqwx4~combout = ( !\soc_inst|m0_1|u_logic|Hmqwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Hmqwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Hmqwx4~2_combout & !\soc_inst|m0_1|u_logic|Hmqwx4~3_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Hmqwx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hmqwx4~3_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Hmqwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Hmqwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hmqwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hmqwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hmqwx4 .lut_mask = 64'hF000000000000000;
+defparam \soc_inst|m0_1|u_logic|Hmqwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mydwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mydwx4~0_combout = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( \soc_inst|m0_1|u_logic|Ey9wx4~combout ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( \soc_inst|m0_1|u_logic|Ey9wx4~combout & (
+// \soc_inst|m0_1|u_logic|Hmqwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ey9wx4~combout & ( \soc_inst|m0_1|u_logic|Hmqwx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Hmqwx4~combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ey9wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mydwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mydwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mydwx4~0 .lut_mask = 64'h0F0F00000F0FFFFF;
+defparam \soc_inst|m0_1|u_logic|Mydwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C0ewx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C0ewx4~1_combout = ( \soc_inst|m0_1|u_logic|Mydwx4~0_combout & ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout & ( \soc_inst|m0_1|u_logic|C0ewx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Mydwx4~0_combout & (
+// \soc_inst|m0_1|u_logic|D5ywx4~0_combout & ( \soc_inst|m0_1|u_logic|C0ewx4~0_combout ) ) ) # ( \soc_inst|m0_1|u_logic|Mydwx4~0_combout & ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|C0ewx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Mydwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C0ewx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C0ewx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C0ewx4~1 .lut_mask = 64'h0000FFFF0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|C0ewx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y12_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zndwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zndwx4~0_combout = ( \soc_inst|m0_1|u_logic|Ai9wx4~combout & ( (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|H2wwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ai9wx4~combout & (
+// (\soc_inst|m0_1|u_logic|W4ywx4~0_combout & \soc_inst|m0_1|u_logic|H2wwx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|H2wwx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ai9wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zndwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zndwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zndwx4~0 .lut_mask = 64'h00330033CCFFCCFF;
+defparam \soc_inst|m0_1|u_logic|Zndwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y12_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vzdwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vzdwx4~0_combout = ( \soc_inst|m0_1|u_logic|Zkuwx4~combout & ( \soc_inst|m0_1|u_logic|Hmqwx4~combout ) ) # ( !\soc_inst|m0_1|u_logic|Zkuwx4~combout & ( \soc_inst|m0_1|u_logic|Hmqwx4~combout & (
+// \soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( \soc_inst|m0_1|u_logic|Zkuwx4~combout & ( !\soc_inst|m0_1|u_logic|Hmqwx4~combout & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Zkuwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Hmqwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vzdwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vzdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vzdwx4~0 .lut_mask = 64'h0000F0F00F0FFFFF;
+defparam \soc_inst|m0_1|u_logic|Vzdwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vzdwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vzdwx4~1_combout = ( \soc_inst|m0_1|u_logic|Vzdwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zndwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Vzdwx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|Zndwx4~0_combout & \soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Zndwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Vzdwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vzdwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vzdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vzdwx4~1 .lut_mask = 64'h000F000FFF0FFF0F;
+defparam \soc_inst|m0_1|u_logic|Vzdwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zndwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zndwx4~1_combout = ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout & ( \soc_inst|m0_1|u_logic|Nodwx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout & ( \soc_inst|m0_1|u_logic|Nodwx4~0_combout & (
+// \soc_inst|m0_1|u_logic|Zndwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout & ( !\soc_inst|m0_1|u_logic|Nodwx4~0_combout & ( \soc_inst|m0_1|u_logic|Zndwx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Zndwx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Nodwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zndwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zndwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zndwx4~1 .lut_mask = 64'h0F0F00000F0FFFFF;
+defparam \soc_inst|m0_1|u_logic|Zndwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djdwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Djdwx4~0_combout = ( \soc_inst|m0_1|u_logic|Sndwx4~1_combout & ( \soc_inst|m0_1|u_logic|Zndwx4~1_combout ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Zndwx4~1_combout ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Sndwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Djdwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Djdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djdwx4~0 .lut_mask = 64'h0000000033333333;
+defparam \soc_inst|m0_1|u_logic|Djdwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y12_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wwdwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wwdwx4~2_combout = ( \soc_inst|m0_1|u_logic|Oldwx4~0_combout & ( \soc_inst|m0_1|u_logic|Djdwx4~0_combout & ( (\soc_inst|m0_1|u_logic|C0ewx4~1_combout & \soc_inst|m0_1|u_logic|Vzdwx4~1_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|C0ewx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Vzdwx4~1_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Djdwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wwdwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wwdwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wwdwx4~2 .lut_mask = 64'h0000000000000303;
+defparam \soc_inst|m0_1|u_logic|Wwdwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y12_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mydwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mydwx4~1_combout = ( \soc_inst|m0_1|u_logic|E1ewx4~0_combout & ( \soc_inst|m0_1|u_logic|Mydwx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|E1ewx4~0_combout & ( \soc_inst|m0_1|u_logic|Mydwx4~0_combout & (
+// \soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( \soc_inst|m0_1|u_logic|E1ewx4~0_combout & ( !\soc_inst|m0_1|u_logic|Mydwx4~0_combout & ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|E1ewx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mydwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mydwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mydwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mydwx4~1 .lut_mask = 64'h0000FF0000FFFFFF;
+defparam \soc_inst|m0_1|u_logic|Mydwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yxdwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yxdwx4~1_combout = ( \soc_inst|m0_1|u_logic|Vzdwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Yxdwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Vzdwx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout & \soc_inst|m0_1|u_logic|Yxdwx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Yxdwx4~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Vzdwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yxdwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yxdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yxdwx4~1 .lut_mask = 64'h0C0C0C0C3F3F3F3F;
+defparam \soc_inst|m0_1|u_logic|Yxdwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y7_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9uwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D9uwx4~2_combout = ( !\soc_inst|m0_1|u_logic|B5u2z4~q & ( \soc_inst|m0_1|u_logic|Ka83z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Wzy2z4~q &
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|B5u2z4~q & ( !\soc_inst|m0_1|u_logic|Ka83z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Wzy2z4~q &
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B5u2z4~q & ( !\soc_inst|m0_1|u_logic|Ka83z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) )
+// )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|B5u2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ka83z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|D9uwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D9uwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D9uwx4~2 .lut_mask = 64'h1100010010000000;
+defparam \soc_inst|m0_1|u_logic|D9uwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y8_N1
+dffeas \soc_inst|m0_1|u_logic|Anq2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Anq2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Anq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Anq2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y7_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9uwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D9uwx4~1_combout = ( !\soc_inst|m0_1|u_logic|Bf93z4~q & ( \soc_inst|m0_1|u_logic|Anq2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Wzy2z4~q &
+// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Bf93z4~q & ( !\soc_inst|m0_1|u_logic|Anq2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Wzy2z4~q &
+// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bf93z4~q & ( !\soc_inst|m0_1|u_logic|Anq2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Wzy2z4~q & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Bf93z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Anq2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|D9uwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D9uwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D9uwx4~1 .lut_mask = 64'h0005000400010000;
+defparam \soc_inst|m0_1|u_logic|D9uwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y5_N20
+dffeas \soc_inst|m0_1|u_logic|Kev2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Kev2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kev2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kev2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y5_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9uwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D9uwx4~3_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|Kev2z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|Poq2z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Kev2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Poq2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|D9uwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D9uwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D9uwx4~3 .lut_mask = 64'h0000000000C000A0;
+defparam \soc_inst|m0_1|u_logic|D9uwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X52_Y7_N2
+dffeas \soc_inst|m0_1|u_logic|Eqq2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Eqq2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eqq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Eqq2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X52_Y7_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9uwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D9uwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Sjj2z4~q & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Eqq2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|B173z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Eqq2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|B173z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|D9uwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D9uwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D9uwx4~0 .lut_mask = 64'h0A0C000000000000;
+defparam \soc_inst|m0_1|u_logic|D9uwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y7_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9uwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D9uwx4~combout = ( !\soc_inst|m0_1|u_logic|D9uwx4~3_combout & ( !\soc_inst|m0_1|u_logic|D9uwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|D9uwx4~2_combout & !\soc_inst|m0_1|u_logic|D9uwx4~1_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|D9uwx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|D9uwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|D9uwx4~3_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|D9uwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|D9uwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D9uwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D9uwx4 .lut_mask = 64'hF000000000000000;
+defparam \soc_inst|m0_1|u_logic|D9uwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y10_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qtdwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qtdwx4~0_combout = ( \soc_inst|m0_1|u_logic|G4qwx4~combout & ( (\soc_inst|m0_1|u_logic|D9uwx4~combout ) # (\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|G4qwx4~combout & (
+// (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout & \soc_inst|m0_1|u_logic|D9uwx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|D9uwx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|G4qwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qtdwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qtdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qtdwx4~0 .lut_mask = 64'h00F000F00FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Qtdwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y10_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qtdwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qtdwx4~1_combout = ( \soc_inst|m0_1|u_logic|Qtdwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jtdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qtdwx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|D5ywx4~0_combout & \soc_inst|m0_1|u_logic|Jtdwx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Jtdwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qtdwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qtdwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qtdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qtdwx4~1 .lut_mask = 64'h000F000FF0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|Qtdwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y10_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tq7wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tq7wx4~0_combout = ( \soc_inst|m0_1|u_logic|X0ewx4~1_combout & ( (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Qtdwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|X0ewx4~1_combout & (
+// (\soc_inst|m0_1|u_logic|Qtdwx4~1_combout & !\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Qtdwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|X0ewx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tq7wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tq7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tq7wx4~0 .lut_mask = 64'h303030303F3F3F3F;
+defparam \soc_inst|m0_1|u_logic|Tq7wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Godwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Godwx4~1_combout = ( \soc_inst|m0_1|u_logic|Sndwx4~0_combout & ( \soc_inst|m0_1|u_logic|Godwx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|Sndwx4~0_combout & ( \soc_inst|m0_1|u_logic|Godwx4~0_combout & (
+// \soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( \soc_inst|m0_1|u_logic|Sndwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Godwx4~0_combout & ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Sndwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Godwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Godwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Godwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Godwx4~1 .lut_mask = 64'h0000F0F00F0FFFFF;
+defparam \soc_inst|m0_1|u_logic|Godwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S08wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S08wx4~0_combout = ( \soc_inst|m0_1|u_logic|Godwx4~1_combout & ( \soc_inst|m0_1|u_logic|Oldwx4~0_combout ) ) # ( \soc_inst|m0_1|u_logic|Godwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Oldwx4~0_combout & (
+// \soc_inst|m0_1|u_logic|C0ewx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Godwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Oldwx4~0_combout & ( \soc_inst|m0_1|u_logic|C0ewx4~1_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|C0ewx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Godwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S08wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S08wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S08wx4~0 .lut_mask = 64'h00FF00FF0000FFFF;
+defparam \soc_inst|m0_1|u_logic|S08wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y11_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wwdwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wwdwx4~0_combout = ( \soc_inst|m0_1|u_logic|Tq7wx4~0_combout & ( \soc_inst|m0_1|u_logic|S08wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Mydwx4~1_combout & \soc_inst|m0_1|u_logic|Yxdwx4~1_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mydwx4~1_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Yxdwx4~1_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Tq7wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|S08wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wwdwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wwdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wwdwx4~0 .lut_mask = 64'h0000000000000505;
+defparam \soc_inst|m0_1|u_logic|Wwdwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z78wx4~1_combout = ( \soc_inst|m0_1|u_logic|Wwdwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Wwdwx4~1_combout & (\soc_inst|m0_1|u_logic|Z78wx4~0_combout & !\soc_inst|m0_1|u_logic|Wwdwx4~2_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Wwdwx4~0_combout & ( \soc_inst|m0_1|u_logic|Z78wx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Wwdwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Z78wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wwdwx4~2_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wwdwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z78wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z78wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~1 .lut_mask = 64'h0F0F0F0F0C000C00;
+defparam \soc_inst|m0_1|u_logic|Z78wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y12_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z78wx4~4_combout = ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout & (((!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z78wx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z78wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~4 .lut_mask = 64'hCDC0CDC000000000;
+defparam \soc_inst|m0_1|u_logic|Z78wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qmdwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qmdwx4~1_combout = ( \soc_inst|m0_1|u_logic|Qmdwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Tkdwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qmdwx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout & \soc_inst|m0_1|u_logic|Tkdwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Tkdwx4~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qmdwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qmdwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qmdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qmdwx4~1 .lut_mask = 64'h0A0A0A0A5F5F5F5F;
+defparam \soc_inst|m0_1|u_logic|Qmdwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djdwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Djdwx4~3_combout = ( \soc_inst|m0_1|u_logic|Qmdwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Oldwx4~0_combout & (\soc_inst|m0_1|u_logic|Jmdwx4~1_combout & (\soc_inst|m0_1|u_logic|Xmdwx4~1_combout &
+// \soc_inst|m0_1|u_logic|Rw7wx4~1_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Jmdwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Xmdwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Rw7wx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qmdwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Djdwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Djdwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djdwx4~3 .lut_mask = 64'h0000000000010001;
+defparam \soc_inst|m0_1|u_logic|Djdwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Widwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Widwx4~0_combout = ( \soc_inst|m0_1|u_logic|Vy7wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ))) #
+// (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout & (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vy7wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Widwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Widwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Widwx4~0 .lut_mask = 64'hCCCCCACA00000000;
+defparam \soc_inst|m0_1|u_logic|Widwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y12_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jiowx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jiowx4~1_combout = ( \soc_inst|m0_1|u_logic|Jiowx4~0_combout & ( (\soc_inst|m0_1|u_logic|Xmdwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Jiowx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout & \soc_inst|m0_1|u_logic|Xmdwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Xmdwx4~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Jiowx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jiowx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jiowx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jiowx4~1 .lut_mask = 64'h0A0A0A0A5F5F5F5F;
+defparam \soc_inst|m0_1|u_logic|Jiowx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B28wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|B28wx4~0_combout = ( \soc_inst|m0_1|u_logic|Jiowx4~1_combout & ( (\soc_inst|m0_1|u_logic|Qmdwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Jiowx4~1_combout & (
+// (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout & \soc_inst|m0_1|u_logic|Qmdwx4~1_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Qmdwx4~1_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Jiowx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|B28wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B28wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B28wx4~0 .lut_mask = 64'h0C0C0C0C3F3F3F3F;
+defparam \soc_inst|m0_1|u_logic|B28wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y12_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fkdwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fkdwx4~1_combout = (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout & (\soc_inst|m0_1|u_logic|Fkdwx4~0_combout )) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout & ((\soc_inst|m0_1|u_logic|Rw7wx4~0_combout )))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fkdwx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Rw7wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fkdwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fkdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fkdwx4~1 .lut_mask = 64'h550F550F550F550F;
+defparam \soc_inst|m0_1|u_logic|Fkdwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y13_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fq7wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fq7wx4~0_combout = ( \soc_inst|m0_1|u_logic|Vzdwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nodwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Vzdwx4~1_combout & (
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout & \soc_inst|m0_1|u_logic|Nodwx4~1_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Nodwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Vzdwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fq7wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fq7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fq7wx4~0 .lut_mask = 64'h000F000FF0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|Fq7wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y12_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djdwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Djdwx4~1_combout = ( \soc_inst|m0_1|u_logic|Fkdwx4~1_combout & ( \soc_inst|m0_1|u_logic|Fq7wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Tkdwx4~1_combout & \soc_inst|m0_1|u_logic|B28wx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tkdwx4~1_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|B28wx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Fkdwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fq7wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Djdwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Djdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djdwx4~1 .lut_mask = 64'h0000000000000505;
+defparam \soc_inst|m0_1|u_logic|Djdwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y12_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djdwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Djdwx4~2_combout = ( \soc_inst|m0_1|u_logic|Djdwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout & (\soc_inst|m0_1|u_logic|Nodwx4~1_combout & \soc_inst|m0_1|u_logic|Godwx4~1_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Nodwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Godwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Djdwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Djdwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Djdwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djdwx4~2 .lut_mask = 64'h00000000000A000A;
+defparam \soc_inst|m0_1|u_logic|Djdwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z78wx4~3_combout = ( \soc_inst|m0_1|u_logic|Djdwx4~2_combout & ( (\soc_inst|m0_1|u_logic|Widwx4~0_combout & !\soc_inst|m0_1|u_logic|Djdwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Djdwx4~2_combout & (
+// (\soc_inst|m0_1|u_logic|Widwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Djdwx4~3_combout ) # (!\soc_inst|m0_1|u_logic|Djdwx4~1_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Djdwx4~3_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Widwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Djdwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Djdwx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z78wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z78wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~3 .lut_mask = 64'h0F0A0F0A0F000F00;
+defparam \soc_inst|m0_1|u_logic|Z78wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y10_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nvdwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nvdwx4~1_combout = ( \soc_inst|m0_1|u_logic|Nvdwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Zudwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Nvdwx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout & \soc_inst|m0_1|u_logic|Zudwx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Zudwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nvdwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nvdwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nvdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nvdwx4~1 .lut_mask = 64'h00F000F00FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Nvdwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y10_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uvdwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uvdwx4~1_combout = ( \soc_inst|m0_1|u_logic|Uvdwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mrdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Uvdwx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|D5ywx4~0_combout & \soc_inst|m0_1|u_logic|Mrdwx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Mrdwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Uvdwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Uvdwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uvdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uvdwx4~1 .lut_mask = 64'h000F000FF0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|Uvdwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y10_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqdwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kqdwx4~2_combout = ( \soc_inst|m0_1|u_logic|Zudwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout & (\soc_inst|m0_1|u_logic|Gvdwx4~0_combout & (\soc_inst|m0_1|u_logic|Nvdwx4~1_combout &
+// \soc_inst|m0_1|u_logic|Uvdwx4~1_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Gvdwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Nvdwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Uvdwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Zudwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kqdwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~2 .lut_mask = 64'h0000000000020002;
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y11_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dqdwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dqdwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout & (!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ))))) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout & (((!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dqdwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dqdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dqdwx4~0 .lut_mask = 64'hF780F78000000000;
+defparam \soc_inst|m0_1|u_logic|Dqdwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xtdwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xtdwx4~0_combout = ( \soc_inst|m0_1|u_logic|D9uwx4~combout & ( (!\soc_inst|m0_1|u_logic|Dmvwx4~combout ) # (\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|D9uwx4~combout & (
+// (!\soc_inst|m0_1|u_logic|Dmvwx4~combout & !\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Dmvwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|D9uwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xtdwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xtdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xtdwx4~0 .lut_mask = 64'hF000F000F0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|Xtdwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y10_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xtdwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xtdwx4~1_combout = ( \soc_inst|m0_1|u_logic|Xtdwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Asdwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Xtdwx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout & \soc_inst|m0_1|u_logic|Asdwx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Asdwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xtdwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xtdwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xtdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xtdwx4~1 .lut_mask = 64'h00F000F00FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Xtdwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y11_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqdwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kqdwx4~3_combout = ( \soc_inst|m0_1|u_logic|Xtdwx4~1_combout & ( \soc_inst|m0_1|u_logic|Kqdwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Oldwx4~0_combout & \soc_inst|m0_1|u_logic|Qtdwx4~1_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qtdwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Xtdwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kqdwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kqdwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~3 .lut_mask = 64'h000000000000000F;
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y10_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U18wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U18wx4~0_combout = (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout & (\soc_inst|m0_1|u_logic|Xtdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout & ((\soc_inst|m0_1|u_logic|E1ewx4~1_combout )))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Xtdwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|E1ewx4~1_combout ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U18wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U18wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U18wx4~0 .lut_mask = 64'h0A5F0A5F0A5F0A5F;
+defparam \soc_inst|m0_1|u_logic|U18wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y10_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yvtwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yvtwx4~0_combout = ( !\soc_inst|m0_1|u_logic|F8wwx4~combout & ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) # ( \soc_inst|m0_1|u_logic|F8wwx4~combout & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Fexwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|F8wwx4~combout & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( !\soc_inst|m0_1|u_logic|Fexwx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Fexwx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|F8wwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yvtwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yvtwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yvtwx4~0 .lut_mask = 64'hFF00FF00FFFF0000;
+defparam \soc_inst|m0_1|u_logic|Yvtwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y7_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fwtwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fwtwx4~0_combout = ( \soc_inst|m0_1|u_logic|Eruwx4~combout & ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( \soc_inst|m0_1|u_logic|Saqwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Eruwx4~combout & (
+// \soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( \soc_inst|m0_1|u_logic|Saqwx4~combout ) ) ) # ( \soc_inst|m0_1|u_logic|Eruwx4~combout & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Saqwx4~combout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Eruwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fwtwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fwtwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fwtwx4~0 .lut_mask = 64'h0000FFFF55555555;
+defparam \soc_inst|m0_1|u_logic|Fwtwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y10_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xs7wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xs7wx4~0_combout = ( \soc_inst|m0_1|u_logic|Fwtwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yvtwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Fwtwx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|D5ywx4~0_combout & \soc_inst|m0_1|u_logic|Yvtwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Yvtwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fwtwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xs7wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xs7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xs7wx4~0 .lut_mask = 64'h00550055AAFFAAFF;
+defparam \soc_inst|m0_1|u_logic|Xs7wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y10_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xs7wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xs7wx4~1_combout = ( \soc_inst|m0_1|u_logic|Xs7wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Uvdwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Xs7wx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout & \soc_inst|m0_1|u_logic|Uvdwx4~1_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Uvdwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xs7wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xs7wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xs7wx4~1 .lut_mask = 64'h00550055AAFFAAFF;
+defparam \soc_inst|m0_1|u_logic|Xs7wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y10_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqdwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kqdwx4~1_combout = ( \soc_inst|m0_1|u_logic|U18wx4~0_combout & ( \soc_inst|m0_1|u_logic|Xs7wx4~1_combout & ( (\soc_inst|m0_1|u_logic|Asdwx4~1_combout & \soc_inst|m0_1|u_logic|Mrdwx4~1_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Asdwx4~1_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Mrdwx4~1_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|U18wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kqdwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~1 .lut_mask = 64'h0000000000000505;
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z78wx4~2_combout = ( \soc_inst|m0_1|u_logic|Kqdwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Kqdwx4~2_combout & (\soc_inst|m0_1|u_logic|Dqdwx4~0_combout & !\soc_inst|m0_1|u_logic|Kqdwx4~3_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Kqdwx4~1_combout & ( \soc_inst|m0_1|u_logic|Dqdwx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Kqdwx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Dqdwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Kqdwx4~3_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Kqdwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z78wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z78wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~2 .lut_mask = 64'h0F0F0F0F0C000C00;
+defparam \soc_inst|m0_1|u_logic|Z78wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z78wx4~5_combout = ( !\soc_inst|m0_1|u_logic|Z78wx4~3_combout & ( !\soc_inst|m0_1|u_logic|Z78wx4~2_combout & ( (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z78wx4~4_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Z78wx4~4_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Z78wx4~3_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Z78wx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z78wx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z78wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~5 .lut_mask = 64'hF5F5000000000000;
+defparam \soc_inst|m0_1|u_logic|Z78wx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y10_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Beowx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Beowx4~1_combout = ( \soc_inst|m0_1|u_logic|Kepwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Beowx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Kepwx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|Beowx4~0_combout & \soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Beowx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Kepwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Beowx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Beowx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Beowx4~1 .lut_mask = 64'h000F000FFF0FFF0F;
+defparam \soc_inst|m0_1|u_logic|Beowx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y10_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q7ewx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q7ewx4~0_combout = ( \soc_inst|m0_1|u_logic|Nvdwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Beowx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Nvdwx4~1_combout & (
+// (\soc_inst|m0_1|u_logic|Beowx4~1_combout & !\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Beowx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nvdwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q7ewx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q7ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q7ewx4~0 .lut_mask = 64'h0F000F000FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Q7ewx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y10_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q7ewx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q7ewx4~1_combout = ( \soc_inst|m0_1|u_logic|Q7ewx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q ) # ((!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xuxwx4~combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Q7ewx4~0_combout & ( (\soc_inst|m0_1|u_logic|Fij2z4~q & (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout & !\soc_inst|m0_1|u_logic|Xuxwx4~combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Q7ewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q7ewx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q7ewx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q7ewx4~1 .lut_mask = 64'h50005000FAFFFAFF;
+defparam \soc_inst|m0_1|u_logic|Q7ewx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y11_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kvtwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kvtwx4~combout = ( \soc_inst|m0_1|u_logic|Oldwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Fij2z4~q & !\soc_inst|m0_1|u_logic|Xuxwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Oldwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Fij2z4~q &
+// (!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout $ (!\soc_inst|m0_1|u_logic|Xuxwx4~combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kvtwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kvtwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kvtwx4 .lut_mask = 64'h050A050A0F000F00;
+defparam \soc_inst|m0_1|u_logic|Kvtwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y8_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gftwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gftwx4~0_combout = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( \soc_inst|m0_1|u_logic|Cawwx4~combout ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( \soc_inst|m0_1|u_logic|N3ywx4~combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|N3ywx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Cawwx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gftwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gftwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gftwx4~0 .lut_mask = 64'h0F0F0F0F00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Gftwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y8_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kw7wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kw7wx4~0_combout = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( \soc_inst|m0_1|u_logic|Duuwx4~combout & ( !\soc_inst|m0_1|u_logic|Ylbwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout & (
+// \soc_inst|m0_1|u_logic|Duuwx4~combout ) ) # ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( !\soc_inst|m0_1|u_logic|Duuwx4~combout & ( !\soc_inst|m0_1|u_logic|Ylbwx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ylbwx4~combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Duuwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kw7wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kw7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kw7wx4~0 .lut_mask = 64'h0000F0F0FFFFF0F0;
+defparam \soc_inst|m0_1|u_logic|Kw7wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y8_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kw7wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kw7wx4~1_combout = ( \soc_inst|m0_1|u_logic|Kw7wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Gftwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Kw7wx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|Gftwx4~0_combout & \soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Gftwx4~0_combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Kw7wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kw7wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kw7wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kw7wx4~1 .lut_mask = 64'h00330033FF33FF33;
+defparam \soc_inst|m0_1|u_logic|Kw7wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y13_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iutwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Iutwx4~0_combout = ( \soc_inst|m0_1|u_logic|Xs7wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout & (!\soc_inst|m0_1|u_logic|Kvtwx4~combout & !\soc_inst|m0_1|u_logic|Kw7wx4~1_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Xs7wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Kvtwx4~combout & ((!\soc_inst|m0_1|u_logic|Kw7wx4~1_combout ) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ))) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Kvtwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Kw7wx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xs7wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Iutwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Iutwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Iutwx4~0 .lut_mask = 64'hF030F030C000C000;
+defparam \soc_inst|m0_1|u_logic|Iutwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cuxwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cuxwx4~0_combout = ( \soc_inst|m0_1|u_logic|Kw7wx4~1_combout & ( (\soc_inst|m0_1|u_logic|Rw7wx4~1_combout ) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Kw7wx4~1_combout & (
+// (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout & \soc_inst|m0_1|u_logic|Rw7wx4~1_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Rw7wx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Kw7wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cuxwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cuxwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cuxwx4~0 .lut_mask = 64'h00CC00CC33FF33FF;
+defparam \soc_inst|m0_1|u_logic|Cuxwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hr7wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hr7wx4~0_combout = ( \soc_inst|m0_1|u_logic|Xuxwx4~combout & ( \soc_inst|m0_1|u_logic|Cuxwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q ) # ((!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ) #
+// ((\soc_inst|m0_1|u_logic|Oldwx4~0_combout & \soc_inst|m0_1|u_logic|Mzxwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xuxwx4~combout & ( \soc_inst|m0_1|u_logic|Cuxwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) #
+// ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # ((!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Xuxwx4~combout & ( !\soc_inst|m0_1|u_logic|Cuxwx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|Fij2z4~q & (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout & ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xuxwx4~combout & (
+// !\soc_inst|m0_1|u_logic|Cuxwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Oldwx4~0_combout & (\soc_inst|m0_1|u_logic|Fij2z4~q & (\soc_inst|m0_1|u_logic|Mzxwx4~0_combout & !\soc_inst|m0_1|u_logic|U2ewx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Cuxwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hr7wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hr7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hr7wx4~0 .lut_mask = 64'h01003200FFFEFFCD;
+defparam \soc_inst|m0_1|u_logic|Hr7wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y10_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X7ewx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|X7ewx4~0_combout = ( \soc_inst|m0_1|u_logic|Xuxwx4~combout & ( \soc_inst|m0_1|u_logic|Jiowx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout & ((!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ) #
+// ((!\soc_inst|m0_1|u_logic|Fij2z4~q )))) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout & (((\soc_inst|m0_1|u_logic|Beowx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xuxwx4~combout & ( \soc_inst|m0_1|u_logic|Jiowx4~1_combout & (
+// (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Fij2z4~q & ((\soc_inst|m0_1|u_logic|Beowx4~1_combout ))) # (\soc_inst|m0_1|u_logic|Fij2z4~q & (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Xuxwx4~combout & ( !\soc_inst|m0_1|u_logic|Jiowx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout & (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout & (\soc_inst|m0_1|u_logic|Fij2z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout & (((\soc_inst|m0_1|u_logic|Beowx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xuxwx4~combout & ( !\soc_inst|m0_1|u_logic|Jiowx4~1_combout & ( (\soc_inst|m0_1|u_logic|Oldwx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Fij2z4~q & ((\soc_inst|m0_1|u_logic|Beowx4~1_combout ))) # (\soc_inst|m0_1|u_logic|Fij2z4~q & (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Beowx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Jiowx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|X7ewx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X7ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X7ewx4~0 .lut_mask = 64'h020E202FF2FEE0EF;
+defparam \soc_inst|m0_1|u_logic|X7ewx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A6ewx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|A6ewx4~0_combout = ( \soc_inst|m0_1|u_logic|Kepwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|F7qwx4~combout & (!\soc_inst|m0_1|u_logic|Zudwx4~1_combout & \soc_inst|m0_1|u_logic|Oldwx4~0_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Kepwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|F7qwx4~combout & ((!\soc_inst|m0_1|u_logic|Zudwx4~1_combout ) # (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ))) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|F7qwx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Zudwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Kepwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|A6ewx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|A6ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A6ewx4~0 .lut_mask = 64'hCCC0CCC000C000C0;
+defparam \soc_inst|m0_1|u_logic|A6ewx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y8_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gftwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gftwx4~1_combout = ( \soc_inst|m0_1|u_logic|Fwtwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Gftwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Fwtwx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout & \soc_inst|m0_1|u_logic|Gftwx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Gftwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fwtwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gftwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gftwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gftwx4~1 .lut_mask = 64'h00F000F00FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Gftwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y12_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F5ewx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|F5ewx4~combout = ( !\soc_inst|m0_1|u_logic|Mouwx4~0_combout & ( \soc_inst|m0_1|u_logic|Gftwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout & !\soc_inst|m0_1|u_logic|Jmdwx4~1_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Mouwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Gftwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Jmdwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Jmdwx4~1_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Mouwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Gftwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|F5ewx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F5ewx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F5ewx4 .lut_mask = 64'hF3F30000C0C00000;
+defparam \soc_inst|m0_1|u_logic|F5ewx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y12_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W3ewx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|W3ewx4~0_combout = ( !\soc_inst|m0_1|u_logic|A6ewx4~0_combout & ( !\soc_inst|m0_1|u_logic|F5ewx4~combout & ( (\soc_inst|m0_1|u_logic|Hr7wx4~0_combout & (\soc_inst|m0_1|u_logic|X7ewx4~0_combout &
+// !\soc_inst|m0_1|u_logic|M5ewx4~0_combout )) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Hr7wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|X7ewx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|M5ewx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|A6ewx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|F5ewx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|W3ewx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W3ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W3ewx4~0 .lut_mask = 64'h0300000000000000;
+defparam \soc_inst|m0_1|u_logic|W3ewx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W3ewx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|W3ewx4~1_combout = ( \soc_inst|m0_1|u_logic|W3ewx4~0_combout & ( (\soc_inst|m0_1|u_logic|J7ewx4~0_combout & (\soc_inst|m0_1|u_logic|Q7ewx4~1_combout & !\soc_inst|m0_1|u_logic|Iutwx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|J7ewx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Q7ewx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Iutwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|W3ewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|W3ewx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W3ewx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W3ewx4~1 .lut_mask = 64'h0000000005000500;
+defparam \soc_inst|m0_1|u_logic|W3ewx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y12_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z78wx4~6_combout = ( \soc_inst|m0_1|u_logic|W3ewx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Z78wx4~1_combout & \soc_inst|m0_1|u_logic|Z78wx4~5_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|W3ewx4~1_combout & (
+// (\soc_inst|m0_1|u_logic|Manwx4~0_combout & (!\soc_inst|m0_1|u_logic|Z78wx4~1_combout & \soc_inst|m0_1|u_logic|Z78wx4~5_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Z78wx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Z78wx4~5_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|W3ewx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z78wx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z78wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~6 .lut_mask = 64'h0030003000F000F0;
+defparam \soc_inst|m0_1|u_logic|Z78wx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y5_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wpcvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wpcvx4~combout = ( \soc_inst|m0_1|u_logic|Hlzvx4~0_combout ) # ( !\soc_inst|m0_1|u_logic|Hlzvx4~0_combout & ( \soc_inst|m0_1|u_logic|Donvx4~2_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wpcvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wpcvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wpcvx4 .lut_mask = 64'h00FF00FFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Wpcvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y6_N50
+dffeas \soc_inst|m0_1|u_logic|Nz73z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Nz73z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nz73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nz73z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y4_N31
+dffeas \soc_inst|m0_1|u_logic|Igl2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Igl2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Igl2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Igl2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y6_N5
+dffeas \soc_inst|m0_1|u_logic|C193z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|C193z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C193z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|C193z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y4_N26
+dffeas \soc_inst|m0_1|u_logic|Eq63z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Eq63z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eq63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Eq63z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y6_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kqzvx4~5_combout = ( !\soc_inst|m0_1|u_logic|C193z4~q & ( \soc_inst|m0_1|u_logic|Eq63z4~q & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|T1d3z4~q &
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|C193z4~q & ( !\soc_inst|m0_1|u_logic|Eq63z4~q & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|T1d3z4~q &
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C193z4~q & ( !\soc_inst|m0_1|u_logic|Eq63z4~q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q $
+// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|C193z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Eq63z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kqzvx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~5 .lut_mask = 64'h0201020000010000;
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y6_N41
+dffeas \soc_inst|m0_1|u_logic|Eut2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Eut2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eut2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Eut2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y6_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kqzvx4~6_combout = ( !\soc_inst|m0_1|u_logic|Eut2z4~q & ( \soc_inst|m0_1|u_logic|N3v2z4~q & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q &
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Eut2z4~q & ( !\soc_inst|m0_1|u_logic|N3v2z4~q & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q &
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Eut2z4~q & ( !\soc_inst|m0_1|u_logic|N3v2z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Eut2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|N3v2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kqzvx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~6 .lut_mask = 64'h0030001000200000;
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y6_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kqzvx4~7_combout = ( !\soc_inst|m0_1|u_logic|Kqzvx4~5_combout & ( !\soc_inst|m0_1|u_logic|Kqzvx4~6_combout & ( (!\soc_inst|m0_1|u_logic|Nz73z4~q & (!\soc_inst|m0_1|u_logic|S61xx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Igl2z4~q )))) # (\soc_inst|m0_1|u_logic|Nz73z4~q & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Igl2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nz73z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Igl2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Kqzvx4~5_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kqzvx4~6_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kqzvx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~7 .lut_mask = 64'hCF45000000000000;
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y4_N56
+dffeas \soc_inst|m0_1|u_logic|Edl2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Edl2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Edl2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Edl2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y4_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kqzvx4~1_combout = ( \soc_inst|m0_1|u_logic|Ta1xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lgi3z4~q ) # ((!\soc_inst|m0_1|u_logic|Edl2z4~q & \soc_inst|m0_1|u_logic|U71xx4~0_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Ta1xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Edl2z4~q & \soc_inst|m0_1|u_logic|U71xx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Edl2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Lgi3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kqzvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~1 .lut_mask = 64'h00AA00AAF0FAF0FA;
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y6_N29
+dffeas \soc_inst|m0_1|u_logic|M743z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|M743z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M743z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M743z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y4_N8
+dffeas \soc_inst|m0_1|u_logic|Pbl2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Pbl2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pbl2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pbl2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y6_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kqzvx4~2_combout = ( \soc_inst|m0_1|u_logic|V41xx4~0_combout & ( \soc_inst|m0_1|u_logic|Pbl2z4~q & ( (\soc_inst|m0_1|u_logic|Ab1xx4~0_combout & !\soc_inst|m0_1|u_logic|M743z4~q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|V41xx4~0_combout & ( \soc_inst|m0_1|u_logic|Pbl2z4~q & ( (\soc_inst|m0_1|u_logic|Ab1xx4~0_combout & !\soc_inst|m0_1|u_logic|M743z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|V41xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Pbl2z4~q ) )
+// # ( !\soc_inst|m0_1|u_logic|V41xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Pbl2z4~q & ( (\soc_inst|m0_1|u_logic|Ab1xx4~0_combout & !\soc_inst|m0_1|u_logic|M743z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|M743z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Pbl2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kqzvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~2 .lut_mask = 64'h5050FFFF50505050;
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y6_N35
+dffeas \soc_inst|m0_1|u_logic|Vg53z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Vg53z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vg53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vg53z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y4_N13
+dffeas \soc_inst|m0_1|u_logic|Dy23z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Dy23z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dy23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dy23z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y6_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kqzvx4~3_combout = ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Vg53z4~q ) # ((!\soc_inst|m0_1|u_logic|Dy23z4~q & \soc_inst|m0_1|u_logic|Ld1xx4~0_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Sd1xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Dy23z4~q & \soc_inst|m0_1|u_logic|Ld1xx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vg53z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Dy23z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kqzvx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~3 .lut_mask = 64'h00F000F0AAFAAAFA;
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X40_Y4_N35
+dffeas \soc_inst|m0_1|u_logic|Csz2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Csz2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Csz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Csz2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X40_Y4_N44
+dffeas \soc_inst|m0_1|u_logic|Xhl2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Xhl2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xhl2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xhl2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X40_Y4_N19
+dffeas \soc_inst|m0_1|u_logic|Wo03z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wo03z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wo03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wo03z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y4_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kqzvx4~4_combout = ( \soc_inst|m0_1|u_logic|L61xx4~0_combout & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout & ( (\soc_inst|m0_1|u_logic|Xhl2z4~q & (\soc_inst|m0_1|u_logic|Wo03z4~q & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Csz2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L61xx4~0_combout & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout & ( (\soc_inst|m0_1|u_logic|Xhl2z4~q & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Csz2z4~q
+// ))) ) ) ) # ( \soc_inst|m0_1|u_logic|L61xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout & ( (\soc_inst|m0_1|u_logic|Wo03z4~q & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Csz2z4~q ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|L61xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Csz2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Csz2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Xhl2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wo03z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|N71xx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kqzvx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~4 .lut_mask = 64'hFF550F0533110301;
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y5_N5
+dffeas \soc_inst|m0_1|u_logic|Tel2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Tel2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tel2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tel2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y4_N22
+dffeas \soc_inst|m0_1|u_logic|Uo13z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Uo13z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uo13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uo13z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y5_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kqzvx4~0_combout = ( \soc_inst|m0_1|u_logic|Jc1xx4~0_combout & ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Tel2z4~q ) # (!\soc_inst|m0_1|u_logic|Uo13z4~q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Jc1xx4~0_combout & ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Uo13z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|Jc1xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Y91xx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Tel2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tel2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Uo13z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kqzvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~0 .lut_mask = 64'h0000AAAAF0F0FAFA;
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y6_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kqzvx4~combout = ( \soc_inst|m0_1|u_logic|Kqzvx4~4_combout & ( !\soc_inst|m0_1|u_logic|Kqzvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Kqzvx4~7_combout & (!\soc_inst|m0_1|u_logic|Kqzvx4~1_combout &
+// (!\soc_inst|m0_1|u_logic|Kqzvx4~2_combout & !\soc_inst|m0_1|u_logic|Kqzvx4~3_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Kqzvx4~7_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Kqzvx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Kqzvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Kqzvx4~3_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Kqzvx4~4_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kqzvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kqzvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kqzvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4 .lut_mask = 64'h0000400000000000;
+defparam \soc_inst|m0_1|u_logic|Kqzvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y6_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J4awx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|J4awx4~0_combout = ( \soc_inst|m0_1|u_logic|Kqzvx4~combout & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Kqzvx4~combout & (
+// (!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Kqzvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|J4awx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J4awx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J4awx4~0 .lut_mask = 64'hFFF0FFF0AAFFAAFF;
+defparam \soc_inst|m0_1|u_logic|J4awx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y5_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~57 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~57_sumout = SUM(( !\soc_inst|m0_1|u_logic|Locvx4~combout ) + ( (!\soc_inst|m0_1|u_logic|J4awx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout & ((\soc_inst|m0_1|u_logic|Wzawx4~combout ))) #
+// (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout & !\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~122 ))
+// \soc_inst|m0_1|u_logic|Add5~58 = CARRY(( !\soc_inst|m0_1|u_logic|Locvx4~combout ) + ( (!\soc_inst|m0_1|u_logic|J4awx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout & ((\soc_inst|m0_1|u_logic|Wzawx4~combout ))) #
+// (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout & !\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~122 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Locvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|J4awx4~0_combout ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add5~122 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add5~57_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add5~58 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~57 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~57 .lut_mask = 64'h000000B50000FF00;
+defparam \soc_inst|m0_1|u_logic|Add5~57 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y5_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~5_sumout = SUM(( (!\soc_inst|m0_1|u_logic|H3awx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout & ((\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|W19wx4~0_combout & !\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) + ( !\soc_inst|m0_1|u_logic|Wpcvx4~combout ) + ( \soc_inst|m0_1|u_logic|Add5~58 ))
+// \soc_inst|m0_1|u_logic|Add5~6 = CARRY(( (!\soc_inst|m0_1|u_logic|H3awx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout & ((\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|W19wx4~0_combout & !\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) + ( !\soc_inst|m0_1|u_logic|Wpcvx4~combout ) + ( \soc_inst|m0_1|u_logic|Add5~58 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|H3awx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wpcvx4~combout ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add5~58 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add5~5_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add5~6 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~5 .lut_mask = 64'h000000FF0000FF4A;
+defparam \soc_inst|m0_1|u_logic|Add5~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y5_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dih2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dih2z4~0_combout = ( \soc_inst|m0_1|u_logic|W19wx4~0_combout & ( \soc_inst|m0_1|u_logic|O7zvx4~combout & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|W19wx4~0_combout & ( \soc_inst|m0_1|u_logic|O7zvx4~combout & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|W19wx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|O7zvx4~combout & ( !\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|W19wx4~0_combout & ( !\soc_inst|m0_1|u_logic|O7zvx4~combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|O7zvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dih2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dih2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dih2z4~0 .lut_mask = 64'hFFFFAAAAF5F5F5F5;
+defparam \soc_inst|m0_1|u_logic|Dih2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y5_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ovcvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ovcvx4~combout = ( \soc_inst|m0_1|u_logic|Q8zvx4~0_combout ) # ( !\soc_inst|m0_1|u_logic|Q8zvx4~0_combout & ( \soc_inst|m0_1|u_logic|Donvx4~2_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ovcvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ovcvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ovcvx4 .lut_mask = 64'h55555555FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ovcvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y5_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~117 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~117_sumout = SUM(( (!\soc_inst|m0_1|u_logic|Kih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout & (\soc_inst|m0_1|u_logic|Wzawx4~combout )) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout & !\soc_inst|m0_1|u_logic|W19wx4~0_combout ))) ) + ( !\soc_inst|m0_1|u_logic|Ducvx4~combout ) + ( \soc_inst|m0_1|u_logic|Add5~86 ))
+// \soc_inst|m0_1|u_logic|Add5~118 = CARRY(( (!\soc_inst|m0_1|u_logic|Kih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout & (\soc_inst|m0_1|u_logic|Wzawx4~combout )) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout & !\soc_inst|m0_1|u_logic|W19wx4~0_combout ))) ) + ( !\soc_inst|m0_1|u_logic|Ducvx4~combout ) + ( \soc_inst|m0_1|u_logic|Add5~86 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Kih2z4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ducvx4~combout ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add5~86 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add5~117_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add5~118 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~117 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~117 .lut_mask = 64'h000000FF0000FF62;
+defparam \soc_inst|m0_1|u_logic|Add5~117 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y5_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~9 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~9_sumout = SUM(( (!\soc_inst|m0_1|u_logic|Dih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout & (\soc_inst|m0_1|u_logic|Wzawx4~combout )) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout & !\soc_inst|m0_1|u_logic|W19wx4~0_combout ))) ) + ( !\soc_inst|m0_1|u_logic|Ovcvx4~combout ) + ( \soc_inst|m0_1|u_logic|Add5~118 ))
+// \soc_inst|m0_1|u_logic|Add5~10 = CARRY(( (!\soc_inst|m0_1|u_logic|Dih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout & (\soc_inst|m0_1|u_logic|Wzawx4~combout )) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout & !\soc_inst|m0_1|u_logic|W19wx4~0_combout ))) ) + ( !\soc_inst|m0_1|u_logic|Ovcvx4~combout ) + ( \soc_inst|m0_1|u_logic|Add5~118 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Dih2z4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ovcvx4~combout ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add5~118 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add5~9_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add5~10 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~9 .lut_mask = 64'h000000FF0000FF62;
+defparam \soc_inst|m0_1|u_logic|Add5~9 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X36_Y10_N32
+dffeas \soc_inst|m0_1|u_logic|Szr2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Ohivx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Szr2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Szr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Szr2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X40_Y9_N25
+dffeas \soc_inst|m0_1|u_logic|Eyr2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Eyr2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eyr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Eyr2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y9_N59
+dffeas \soc_inst|m0_1|u_logic|Qwr2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Qwr2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qwr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qwr2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y9_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hp9wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hp9wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|M1j2z4~q &
+// !\soc_inst|m0_1|u_logic|Qwr2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Qwr2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hp9wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hp9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hp9wx4~0 .lut_mask = 64'h0000000008000000;
+defparam \soc_inst|m0_1|u_logic|Hp9wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y13_N25
+dffeas \soc_inst|m0_1|u_logic|Z863z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Z863z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z863z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z863z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y10_N14
+dffeas \soc_inst|m0_1|u_logic|Qz43z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Qz43z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qz43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qz43z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y10_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kn9wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kn9wx4~0_combout = ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Z863z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~q & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Fgm2z4~q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Qz43z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~q & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Z863z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Qz43z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kn9wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~0 .lut_mask = 64'h000000C0000000A0;
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y12_N56
+dffeas \soc_inst|m0_1|u_logic|Kc03z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Kc03z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kc03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kc03z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X40_Y9_N46
+dffeas \soc_inst|m0_1|u_logic|E913z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|E913z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E913z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|E913z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y12_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kn9wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kn9wx4~2_combout = ( !\soc_inst|m0_1|u_logic|Rni2z4~q & ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q & ((!\soc_inst|m0_1|u_logic|E913z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Kc03z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Kc03z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|E913z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kn9wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~2 .lut_mask = 64'h00000000CA000000;
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y12_N14
+dffeas \soc_inst|m0_1|u_logic|Yg23z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Yg23z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yg23z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yg23z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X40_Y6_N26
+dffeas \soc_inst|m0_1|u_logic|Hq33z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Hq33z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hq33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hq33z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y12_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kn9wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kn9wx4~1_combout = ( !\soc_inst|m0_1|u_logic|Rni2z4~q & ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Hq33z4~q & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Rni2z4~q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Yg23z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yg23z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Hq33z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kn9wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~1 .lut_mask = 64'h0088000000A00000;
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y9_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kn9wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kn9wx4~3_combout = ( !\soc_inst|m0_1|u_logic|Kn9wx4~2_combout & ( !\soc_inst|m0_1|u_logic|Kn9wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Hp9wx4~0_combout & (!\soc_inst|m0_1|u_logic|Kn9wx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Eyr2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Eyr2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Hp9wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Kn9wx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Kn9wx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kn9wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kn9wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~3 .lut_mask = 64'hD000000000000000;
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y9_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F32wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|F32wx4~0_combout = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( \soc_inst|m0_1|u_logic|Kn9wx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|I793z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Lr9wx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( \soc_inst|m0_1|u_logic|Kn9wx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|I793z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Szr2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( !\soc_inst|m0_1|u_logic|Kn9wx4~3_combout & (
+// (!\soc_inst|m0_1|u_logic|I793z4~q ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( !\soc_inst|m0_1|u_logic|Kn9wx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|I793z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Szr2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Szr2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Lr9wx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|I793z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kn9wx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F32wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F32wx4~0 .lut_mask = 64'hFA0AFF0FFA0AFC0C;
+defparam \soc_inst|m0_1|u_logic|F32wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X36_Y8_N23
+dffeas \soc_inst|m0_1|u_logic|K9z2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Wfhvx4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|K9z2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K9z2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K9z2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y8_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tuawx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tuawx4~0_combout = ( \soc_inst|m0_1|u_logic|Xwawx4~0_combout & ( (!\soc_inst|m0_1|u_logic|K9z2z4~q ) # ((!\soc_inst|m0_1|u_logic|Zoy2z4~q & \soc_inst|m0_1|u_logic|Y29wx4~combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Xwawx4~0_combout
+// & ( (!\soc_inst|m0_1|u_logic|Zoy2z4~q & \soc_inst|m0_1|u_logic|Y29wx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|K9z2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tuawx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tuawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tuawx4~0 .lut_mask = 64'h00AA00AAF0FAF0FA;
+defparam \soc_inst|m0_1|u_logic|Tuawx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y8_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tuawx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tuawx4~1_combout = ( \soc_inst|m0_1|u_logic|Ht5wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Tuawx4~0_combout & ((!\soc_inst|m0_1|u_logic|D1awx4~0_combout ) # (\soc_inst|m0_1|u_logic|I6z2z4~q ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Ht5wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Tuawx4~0_combout & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout & ((!\soc_inst|m0_1|u_logic|D1awx4~0_combout ) # (\soc_inst|m0_1|u_logic|I6z2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tuawx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|I6z2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|D1awx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tuawx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tuawx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tuawx4~1 .lut_mask = 64'hA020A020AA22AA22;
+defparam \soc_inst|m0_1|u_logic|Tuawx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y7_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hnbwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hnbwx4~0_combout = ( \soc_inst|m0_1|u_logic|Qobwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Y29wx4~combout ) # (\soc_inst|m0_1|u_logic|Rxl2z4~q ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Qobwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Xwawx4~0_combout & ((!\soc_inst|m0_1|u_logic|Y29wx4~combout ) # ((\soc_inst|m0_1|u_logic|Rxl2z4~q )))) # (\soc_inst|m0_1|u_logic|Xwawx4~0_combout &
+// (\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Y29wx4~combout ) # (\soc_inst|m0_1|u_logic|Rxl2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qobwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hnbwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hnbwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hnbwx4~0 .lut_mask = 64'h8CAF8CAF0C0F0C0F;
+defparam \soc_inst|m0_1|u_logic|Hnbwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X36_Y8_N29
+dffeas \soc_inst|m0_1|u_logic|Qzq2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Kfpvx4~5_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Qzq2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qzq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qzq2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y6_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4bwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z4bwx4~1_combout = ( \soc_inst|m0_1|u_logic|Z4bwx4~2_combout & ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) # ( !\soc_inst|m0_1|u_logic|Z4bwx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|I4dwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|I4dwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Z4bwx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z4bwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z4bwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z4bwx4~1 .lut_mask = 64'hAA0AAA0AAAAAAAAA;
+defparam \soc_inst|m0_1|u_logic|Z4bwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y6_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hnbwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hnbwx4~1_combout = ( \soc_inst|m0_1|u_logic|Sh5wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Hnbwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Qzq2z4~q & \soc_inst|m0_1|u_logic|Z4bwx4~1_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Sh5wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Hnbwx4~0_combout ) # (((!\soc_inst|m0_1|u_logic|Qzq2z4~q & \soc_inst|m0_1|u_logic|Z4bwx4~1_combout )) # (\soc_inst|m0_1|u_logic|W19wx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Hnbwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Qzq2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Z4bwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hnbwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hnbwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hnbwx4~1 .lut_mask = 64'hBBFBBBFBAAFAAAFA;
+defparam \soc_inst|m0_1|u_logic|Hnbwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y7_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~29 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~29_sumout = SUM(( \soc_inst|m0_1|u_logic|E1bvx4~combout ) + ( (!\soc_inst|m0_1|u_logic|Kfd2z4~0_combout & (\soc_inst|m0_1|u_logic|Dfd2z4~combout & (!\soc_inst|m0_1|u_logic|Donvx4~2_combout &
+// \soc_inst|m0_1|u_logic|Oxnvx4~3_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~134_cout ))
+// \soc_inst|m0_1|u_logic|Add5~30 = CARRY(( \soc_inst|m0_1|u_logic|E1bvx4~combout ) + ( (!\soc_inst|m0_1|u_logic|Kfd2z4~0_combout & (\soc_inst|m0_1|u_logic|Dfd2z4~combout & (!\soc_inst|m0_1|u_logic|Donvx4~2_combout &
+// \soc_inst|m0_1|u_logic|Oxnvx4~3_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~134_cout ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Kfd2z4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Dfd2z4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|E1bvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Oxnvx4~3_combout ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add5~134_cout ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add5~29_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add5~30 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~29 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~29 .lut_mask = 64'h0000FFDF000000FF;
+defparam \soc_inst|m0_1|u_logic|Add5~29 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y7_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~93 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~93_sumout = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout & \soc_inst|m0_1|u_logic|Punvx4~4_combout ) ) + ( !\soc_inst|m0_1|u_logic|U09wx4~0_combout $ (((\soc_inst|m0_1|u_logic|Evcwx4~2_combout ) #
+// (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) + ( \soc_inst|m0_1|u_logic|Add5~30 ))
+// \soc_inst|m0_1|u_logic|Add5~94 = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout & \soc_inst|m0_1|u_logic|Punvx4~4_combout ) ) + ( !\soc_inst|m0_1|u_logic|U09wx4~0_combout $ (((\soc_inst|m0_1|u_logic|Evcwx4~2_combout ) #
+// (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) + ( \soc_inst|m0_1|u_logic|Add5~30 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Punvx4~4_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|U09wx4~0_combout ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add5~30 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add5~93_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add5~94 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~93 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~93 .lut_mask = 64'h00007788000000F0;
+defparam \soc_inst|m0_1|u_logic|Add5~93 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y7_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~101 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~101_sumout = SUM(( !\soc_inst|m0_1|u_logic|Hnbwx4~1_combout $ (((\soc_inst|m0_1|u_logic|Evcwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) + ( !\soc_inst|m0_1|u_logic|Asbvx4~combout ) + (
+// \soc_inst|m0_1|u_logic|Add5~94 ))
+// \soc_inst|m0_1|u_logic|Add5~102 = CARRY(( !\soc_inst|m0_1|u_logic|Hnbwx4~1_combout $ (((\soc_inst|m0_1|u_logic|Evcwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) + ( !\soc_inst|m0_1|u_logic|Asbvx4~combout ) + ( \soc_inst|m0_1|u_logic|Add5~94
+// ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Asbvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hnbwx4~1_combout ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add5~94 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add5~101_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add5~102 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~101 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~101 .lut_mask = 64'h00000F0F00008877;
+defparam \soc_inst|m0_1|u_logic|Add5~101 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y7_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~33 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~33_sumout = SUM(( !\soc_inst|m0_1|u_logic|Q3bwx4~0_combout $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout &
+// \soc_inst|m0_1|u_logic|Aqnvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~102 ))
+// \soc_inst|m0_1|u_logic|Add5~34 = CARRY(( !\soc_inst|m0_1|u_logic|Q3bwx4~0_combout $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout &
+// \soc_inst|m0_1|u_logic|Aqnvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~102 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Q3bwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Aqnvx4~0_combout ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add5~102 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add5~33_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add5~34 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~33 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~33 .lut_mask = 64'h0000FF3300005FA0;
+defparam \soc_inst|m0_1|u_logic|Add5~33 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y7_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~97 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~97_sumout = SUM(( !\soc_inst|m0_1|u_logic|Xucwx4~0_combout $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout &
+// \soc_inst|m0_1|u_logic|Tpnvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~34 ))
+// \soc_inst|m0_1|u_logic|Add5~98 = CARRY(( !\soc_inst|m0_1|u_logic|Xucwx4~0_combout $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout &
+// \soc_inst|m0_1|u_logic|Tpnvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~34 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Xucwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Tpnvx4~0_combout ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add5~34 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add5~97_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add5~98 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~97 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~97 .lut_mask = 64'h0000FF3300005FA0;
+defparam \soc_inst|m0_1|u_logic|Add5~97 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y7_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~109 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~109_sumout = SUM(( !\soc_inst|m0_1|u_logic|Ydcwx4~0_combout $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout &
+// \soc_inst|m0_1|u_logic|Mpnvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~98 ))
+// \soc_inst|m0_1|u_logic|Add5~110 = CARRY(( !\soc_inst|m0_1|u_logic|Ydcwx4~0_combout $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout &
+// \soc_inst|m0_1|u_logic|Mpnvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~98 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ydcwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Mpnvx4~0_combout ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add5~98 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add5~109_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add5~110 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~109 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~109 .lut_mask = 64'h0000FF3300005FA0;
+defparam \soc_inst|m0_1|u_logic|Add5~109 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y7_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~37 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~37_sumout = SUM(( !\soc_inst|m0_1|u_logic|Uz9wx4~1_combout $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout &
+// \soc_inst|m0_1|u_logic|Euzvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~110 ))
+// \soc_inst|m0_1|u_logic|Add5~38 = CARRY(( !\soc_inst|m0_1|u_logic|Uz9wx4~1_combout $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout &
+// \soc_inst|m0_1|u_logic|Euzvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~110 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Uz9wx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Euzvx4~0_combout ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add5~110 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add5~37_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add5~38 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~37 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~37 .lut_mask = 64'h0000FF3300005FA0;
+defparam \soc_inst|m0_1|u_logic|Add5~37 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y7_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~81 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~81_sumout = SUM(( !\soc_inst|m0_1|u_logic|Tuawx4~1_combout $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout &
+// \soc_inst|m0_1|u_logic|Yonvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~38 ))
+// \soc_inst|m0_1|u_logic|Add5~82 = CARRY(( !\soc_inst|m0_1|u_logic|Tuawx4~1_combout $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout &
+// \soc_inst|m0_1|u_logic|Yonvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~38 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Tuawx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Yonvx4~0_combout ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add5~38 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add5~81_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add5~82 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~81 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~81 .lut_mask = 64'h0000FF0F00007788;
+defparam \soc_inst|m0_1|u_logic|Add5~81 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y7_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~41 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~41_sumout = SUM(( !\soc_inst|m0_1|u_logic|Lk9wx4~1_combout $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout &
+// \soc_inst|m0_1|u_logic|F32wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~82 ))
+// \soc_inst|m0_1|u_logic|Add5~42 = CARRY(( !\soc_inst|m0_1|u_logic|Lk9wx4~1_combout $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout &
+// \soc_inst|m0_1|u_logic|F32wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~82 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add5~82 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add5~41_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add5~42 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~41 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~41 .lut_mask = 64'h0000FF0F00007788;
+defparam \soc_inst|m0_1|u_logic|Add5~41 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y7_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do8wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Do8wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Add5~41_sumout & ( !\soc_inst|m0_1|u_logic|Add5~45_sumout & ( (!\soc_inst|m0_1|u_logic|Add5~37_sumout & (!\soc_inst|m0_1|u_logic|Add5~33_sumout &
+// !\soc_inst|m0_1|u_logic|Add5~29_sumout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Add5~37_sumout ),
+ .datab(!\soc_inst|m0_1|u_logic|Add5~33_sumout ),
+ .datac(!\soc_inst|m0_1|u_logic|Add5~29_sumout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Add5~41_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~45_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Do8wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Do8wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Do8wx4~0 .lut_mask = 64'h8080000000000000;
+defparam \soc_inst|m0_1|u_logic|Do8wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y7_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jf92z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jf92z4~0_combout = ( !\soc_inst|m0_1|u_logic|Tvn2z4~q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|M1j2z4~q &
+// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Tvn2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jf92z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jf92z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jf92z4~0 .lut_mask = 64'h0008000000000000;
+defparam \soc_inst|m0_1|u_logic|Jf92z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y7_N14
+dffeas \soc_inst|m0_1|u_logic|Ixn2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ixn2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ixn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ixn2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y6_N11
+dffeas \soc_inst|m0_1|u_logic|Wu53z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wu53z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wu53z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wu53z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y6_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Md92z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Md92z4~0_combout = ( !\soc_inst|m0_1|u_logic|Nl43z4~q & ( \soc_inst|m0_1|u_logic|Wu53z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Sjj2z4~q &
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Nl43z4~q & ( !\soc_inst|m0_1|u_logic|Wu53z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nl43z4~q & ( !\soc_inst|m0_1|u_logic|Wu53z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|Fgm2z4~q & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Nl43z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wu53z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Md92z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Md92z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Md92z4~0 .lut_mask = 64'h0022000200200000;
+defparam \soc_inst|m0_1|u_logic|Md92z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y4_N31
+dffeas \soc_inst|m0_1|u_logic|Ec33z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ec33z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ec33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ec33z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y4_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Md92z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Md92z4~1_combout = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|V223z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Ec33z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ec33z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|V223z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Md92z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Md92z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Md92z4~1 .lut_mask = 64'h00000000E2000000;
+defparam \soc_inst|m0_1|u_logic|Md92z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y6_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Md92z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Md92z4~2_combout = ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( (!\soc_inst|m0_1|u_logic|K103z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
+// # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( (!\soc_inst|m0_1|u_logic|Ey03z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|K103z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ey03z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Md92z4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Md92z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Md92z4~2 .lut_mask = 64'h00000000C000A000;
+defparam \soc_inst|m0_1|u_logic|Md92z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y7_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Md92z4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Md92z4~3_combout = ( !\soc_inst|m0_1|u_logic|Md92z4~1_combout & ( !\soc_inst|m0_1|u_logic|Md92z4~2_combout & ( (!\soc_inst|m0_1|u_logic|Jf92z4~0_combout & (!\soc_inst|m0_1|u_logic|Md92z4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ixn2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Jf92z4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ixn2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Md92z4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Md92z4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Md92z4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Md92z4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Md92z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Md92z4~3 .lut_mask = 64'hA200000000000000;
+defparam \soc_inst|m0_1|u_logic|Md92z4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y7_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qs0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qs0wx4~0_combout = ( \soc_inst|m0_1|u_logic|W5p2z4~q & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((!\soc_inst|m0_1|u_logic|H4p2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout
+// & (((!\soc_inst|m0_1|u_logic|Md92z4~3_combout )) # (\soc_inst|m0_1|u_logic|H1qwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W5p2z4~q & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// (((!\soc_inst|m0_1|u_logic|H4p2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((!\soc_inst|m0_1|u_logic|Md92z4~3_combout )) # (\soc_inst|m0_1|u_logic|H1qwx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|W5p2z4~q & (
+// !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|H4p2z4~q & !\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|W5p2z4~q & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|H4p2z4~q )
+// # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H1qwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|H4p2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Md92z4~3_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|W5p2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qs0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qs0wx4~0 .lut_mask = 64'hCFCFC0C0CFC5CFC5;
+defparam \soc_inst|m0_1|u_logic|Qs0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y6_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~21 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~21_sumout = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout & \soc_inst|m0_1|u_logic|Qs0wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Ecawx4~1_combout $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout &
+// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( \soc_inst|m0_1|u_logic|Add5~74 ))
+// \soc_inst|m0_1|u_logic|Add5~22 = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout & \soc_inst|m0_1|u_logic|Qs0wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Ecawx4~1_combout $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout &
+// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( \soc_inst|m0_1|u_logic|Add5~74 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ecawx4~1_combout ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add5~74 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add5~21_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add5~22 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~21 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~21 .lut_mask = 64'h00008877000000F0;
+defparam \soc_inst|m0_1|u_logic|Add5~21 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y6_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6awx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U6awx4~0_combout = ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Y29wx4~combout ) # (\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U6awx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U6awx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U6awx4~0 .lut_mask = 64'hF0FFF0FF00000000;
+defparam \soc_inst|m0_1|u_logic|U6awx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y7_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6awx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U6awx4~1_combout = ( \soc_inst|m0_1|u_logic|Ce0wx4~8_combout & ( \soc_inst|m0_1|u_logic|Ce0wx4~5_combout & ( \soc_inst|m0_1|u_logic|U6awx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ce0wx4~8_combout & (
+// \soc_inst|m0_1|u_logic|Ce0wx4~5_combout & ( (\soc_inst|m0_1|u_logic|U6awx4~0_combout & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Ce0wx4~8_combout & ( !\soc_inst|m0_1|u_logic|Ce0wx4~5_combout & ( (\soc_inst|m0_1|u_logic|U6awx4~0_combout & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) #
+// (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ce0wx4~8_combout & ( !\soc_inst|m0_1|u_logic|Ce0wx4~5_combout & ( (\soc_inst|m0_1|u_logic|U6awx4~0_combout & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout &
+// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|U6awx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ce0wx4~8_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ce0wx4~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U6awx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U6awx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U6awx4~1 .lut_mask = 64'h050D050D050D0F0F;
+defparam \soc_inst|m0_1|u_logic|U6awx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y9_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oaawx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oaawx4~0_combout = ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Y29wx4~combout ) # (\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Oaawx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oaawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oaawx4~0 .lut_mask = 64'hFF0FFF0F00000000;
+defparam \soc_inst|m0_1|u_logic|Oaawx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y10_N43
+dffeas \soc_inst|m0_1|u_logic|Xyh3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Xyh3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xyh3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xyh3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X50_Y9_N56
+dffeas \soc_inst|m0_1|u_logic|Zb83z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Zb83z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zb83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zb83z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y10_N26
+dffeas \soc_inst|m0_1|u_logic|Q273z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Q273z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q273z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Q273z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y10_N32
+dffeas \soc_inst|m0_1|u_logic|Qg93z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Qg93z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qg93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qg93z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y10_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nn0wx4~6_combout = ( \soc_inst|m0_1|u_logic|Yaz2z4~q & ( \soc_inst|m0_1|u_logic|Svk2z4~q & ( (!\soc_inst|m0_1|u_logic|Qg93z4~q & (\soc_inst|m0_1|u_logic|H3d3z4~q & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Yaz2z4~q & ( !\soc_inst|m0_1|u_logic|Svk2z4~q & ( (!\soc_inst|m0_1|u_logic|Q273z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|H3d3z4~q & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Q273z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Qg93z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nn0wx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~6 .lut_mask = 64'h000000A00000000C;
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X39_Y10_N1
+dffeas \soc_inst|m0_1|u_logic|Q6u2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Q6u2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q6u2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Q6u2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y10_N46
+dffeas \soc_inst|m0_1|u_logic|Zfv2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Zfv2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zfv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zfv2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y9_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nn0wx4~7_combout = ( !\soc_inst|m0_1|u_logic|Q6u2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Zfv2z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q &
+// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Q6u2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Zfv2z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q &
+// \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Q6u2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Zfv2z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Q6u2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Zfv2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nn0wx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~7 .lut_mask = 64'h1010001010000000;
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y9_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~8 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nn0wx4~8_combout = ( \soc_inst|m0_1|u_logic|S61xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Nn0wx4~7_combout & ( (\soc_inst|m0_1|u_logic|Zb83z4~q & (!\soc_inst|m0_1|u_logic|Nn0wx4~6_combout &
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xyh3z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Nn0wx4~7_combout & ( (!\soc_inst|m0_1|u_logic|Nn0wx4~6_combout &
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xyh3z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Xyh3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Zb83z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Nn0wx4~6_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Nn0wx4~7_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nn0wx4~8_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~8 .lut_mask = 64'hDD000D0000000000;
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y9_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oaawx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oaawx4~1_combout = ( \soc_inst|m0_1|u_logic|Nn0wx4~5_combout & ( \soc_inst|m0_1|u_logic|Kcdwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Oaawx4~0_combout & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Nn0wx4~8_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nn0wx4~5_combout & ( \soc_inst|m0_1|u_logic|Kcdwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Oaawx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Nn0wx4~5_combout & ( !\soc_inst|m0_1|u_logic|Kcdwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Oaawx4~0_combout &
+// ((\soc_inst|m0_1|u_logic|Nn0wx4~8_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nn0wx4~5_combout & ( !\soc_inst|m0_1|u_logic|Kcdwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Oaawx4~0_combout &
+// \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Oaawx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Nn0wx4~8_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Nn0wx4~5_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Oaawx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oaawx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oaawx4~1 .lut_mask = 64'h1111115551515155;
+defparam \soc_inst|m0_1|u_logic|Oaawx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y10_N41
+dffeas \soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X36_Y9_N1
+dffeas \soc_inst|m0_1|u_logic|Yj43z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Yj43z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yj43z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yj43z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y10_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A792z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|A792z4~0_combout = ( \soc_inst|m0_1|u_logic|Yj43z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// !\soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yj43z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~q &
+// (\soc_inst|m0_1|u_logic|Fgm2z4~q & !\soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yj43z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q &
+// (\soc_inst|m0_1|u_logic|Wzy2z4~q & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yj43z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|A792z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|A792z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A792z4~0 .lut_mask = 64'h0202000002000200;
+defparam \soc_inst|m0_1|u_logic|A792z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y10_N44
+dffeas \soc_inst|m0_1|u_logic|Xyh3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Xyh3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xyh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xyh3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y10_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X892z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|X892z4~0_combout = ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( \soc_inst|m0_1|u_logic|M1j2z4~q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~q & (!\soc_inst|m0_1|u_logic|Xyh3z4~q &
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Xyh3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|X892z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X892z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X892z4~0 .lut_mask = 64'h0000000000008000;
+defparam \soc_inst|m0_1|u_logic|X892z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y11_N11
+dffeas \soc_inst|m0_1|u_logic|Pa33z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Pa33z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pa33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pa33z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A792z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|A792z4~1_combout = ( !\soc_inst|m0_1|u_logic|Rni2z4~q & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|G123z4~q )) #
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Pa33z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|G123z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Pa33z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|A792z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|A792z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A792z4~1 .lut_mask = 64'h4540000000000000;
+defparam \soc_inst|m0_1|u_logic|A792z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A792z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|A792z4~2_combout = ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( !\soc_inst|m0_1|u_logic|Rni2z4~q & ( (!\soc_inst|m0_1|u_logic|Tvh3z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( !\soc_inst|m0_1|u_logic|Rni2z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Ixh3z4~q & \soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tvh3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ixh3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|A792z4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|A792z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A792z4~2 .lut_mask = 64'h00C0008800000000;
+defparam \soc_inst|m0_1|u_logic|A792z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y10_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A792z4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|A792z4~3_combout = ( !\soc_inst|m0_1|u_logic|A792z4~1_combout & ( !\soc_inst|m0_1|u_logic|A792z4~2_combout & ( (!\soc_inst|m0_1|u_logic|A792z4~0_combout & (!\soc_inst|m0_1|u_logic|X892z4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|M0i3z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|A792z4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|M0i3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|X892z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|A792z4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|A792z4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|A792z4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|A792z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A792z4~3 .lut_mask = 64'hA020000000000000;
+defparam \soc_inst|m0_1|u_logic|A792z4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y10_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wo0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wo0wx4~0_combout = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( \soc_inst|m0_1|u_logic|A792z4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|W5p2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((\soc_inst|m0_1|u_logic|Bjxwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( \soc_inst|m0_1|u_logic|A792z4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// (!\soc_inst|m0_1|u_logic|W5p2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|L7p2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( !\soc_inst|m0_1|u_logic|A792z4~3_combout & (
+// (!\soc_inst|m0_1|u_logic|W5p2z4~q ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( !\soc_inst|m0_1|u_logic|A792z4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// (!\soc_inst|m0_1|u_logic|W5p2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|L7p2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|W5p2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|L7p2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Bjxwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|A792z4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wo0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wo0wx4~0 .lut_mask = 64'hAACCAAFFAACCAA0F;
+defparam \soc_inst|m0_1|u_logic|Wo0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y5_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~49 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~49_sumout = SUM(( !\soc_inst|m0_1|u_logic|Oaawx4~1_combout $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout &
+// \soc_inst|m0_1|u_logic|Wo0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~22 ))
+// \soc_inst|m0_1|u_logic|Add5~50 = CARRY(( !\soc_inst|m0_1|u_logic|Oaawx4~1_combout $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout &
+// \soc_inst|m0_1|u_logic|Wo0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~22 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Oaawx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add5~22 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add5~49_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add5~50 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~49 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~49 .lut_mask = 64'h0000FF5500003FC0;
+defparam \soc_inst|m0_1|u_logic|Add5~49 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y5_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~53 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~53_sumout = SUM(( !\soc_inst|m0_1|u_logic|M9awx4~1_combout $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout &
+// \soc_inst|m0_1|u_logic|Fj0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~50 ))
+// \soc_inst|m0_1|u_logic|Add5~54 = CARRY(( !\soc_inst|m0_1|u_logic|M9awx4~1_combout $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout &
+// \soc_inst|m0_1|u_logic|Fj0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~50 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|M9awx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add5~50 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add5~53_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add5~54 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~53 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~53 .lut_mask = 64'h0000FF5500003FC0;
+defparam \soc_inst|m0_1|u_logic|Add5~53 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y5_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~25 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~25_sumout = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout & \soc_inst|m0_1|u_logic|Lf0wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|U6awx4~1_combout $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout &
+// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( \soc_inst|m0_1|u_logic|Add5~54 ))
+// \soc_inst|m0_1|u_logic|Add5~26 = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout & \soc_inst|m0_1|u_logic|Lf0wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|U6awx4~1_combout $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout &
+// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( \soc_inst|m0_1|u_logic|Add5~54 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|U6awx4~1_combout ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add5~54 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add5~25_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add5~26 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~25 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~25 .lut_mask = 64'h0000C03F000000AA;
+defparam \soc_inst|m0_1|u_logic|Add5~25 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y7_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do8wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Do8wx4~1_combout = ( !\soc_inst|m0_1|u_logic|Add5~21_sumout & ( !\soc_inst|m0_1|u_logic|Add5~25_sumout & ( (\soc_inst|m0_1|u_logic|Do8wx4~0_combout & (!\soc_inst|m0_1|u_logic|Add5~17_sumout &
+// !\soc_inst|m0_1|u_logic|Add5~13_sumout )) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Do8wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Add5~17_sumout ),
+ .datad(!\soc_inst|m0_1|u_logic|Add5~13_sumout ),
+ .datae(!\soc_inst|m0_1|u_logic|Add5~21_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~25_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Do8wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Do8wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Do8wx4~1 .lut_mask = 64'h3000000000000000;
+defparam \soc_inst|m0_1|u_logic|Do8wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y6_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do8wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Do8wx4~2_combout = ( !\soc_inst|m0_1|u_logic|Add5~61_sumout & ( !\soc_inst|m0_1|u_logic|Add5~65_sumout & ( (!\soc_inst|m0_1|u_logic|Add5~69_sumout & !\soc_inst|m0_1|u_logic|Add5~73_sumout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Add5~69_sumout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Add5~73_sumout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Add5~61_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~65_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Do8wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Do8wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Do8wx4~2 .lut_mask = 64'hA0A0000000000000;
+defparam \soc_inst|m0_1|u_logic|Do8wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y6_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do8wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Do8wx4~3_combout = ( !\soc_inst|m0_1|u_logic|Add5~53_sumout & ( !\soc_inst|m0_1|u_logic|Add5~57_sumout & ( (\soc_inst|m0_1|u_logic|Do8wx4~2_combout & !\soc_inst|m0_1|u_logic|Add5~49_sumout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Do8wx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Add5~49_sumout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Add5~53_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~57_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Do8wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Do8wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Do8wx4~3 .lut_mask = 64'h3030000000000000;
+defparam \soc_inst|m0_1|u_logic|Do8wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y7_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do8wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Do8wx4~4_combout = ( \soc_inst|m0_1|u_logic|Do8wx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Add5~1_sumout & (!\soc_inst|m0_1|u_logic|Add5~5_sumout & (!\soc_inst|m0_1|u_logic|Add5~9_sumout & \soc_inst|m0_1|u_logic|Do8wx4~1_combout
+// ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Add5~1_sumout ),
+ .datab(!\soc_inst|m0_1|u_logic|Add5~5_sumout ),
+ .datac(!\soc_inst|m0_1|u_logic|Add5~9_sumout ),
+ .datad(!\soc_inst|m0_1|u_logic|Do8wx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Do8wx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Do8wx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Do8wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Do8wx4~4 .lut_mask = 64'h0000000000800080;
+defparam \soc_inst|m0_1|u_logic|Do8wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y6_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Phh2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Phh2z4~0_combout = ( \soc_inst|m0_1|u_logic|W19wx4~0_combout & ( \soc_inst|m0_1|u_logic|Nd3wx4~combout & ( !\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|W19wx4~0_combout & (
+// \soc_inst|m0_1|u_logic|Nd3wx4~combout ) ) # ( \soc_inst|m0_1|u_logic|W19wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Nd3wx4~combout & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|W19wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Nd3wx4~combout & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Nd3wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Phh2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Phh2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Phh2z4~0 .lut_mask = 64'hBBBBBBBBFFFFCCCC;
+defparam \soc_inst|m0_1|u_logic|Phh2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X50_Y6_N1
+dffeas \soc_inst|m0_1|u_logic|Sa13z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Sa13z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sa13z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sa13z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y4_N47
+dffeas \soc_inst|m0_1|u_logic|Bk23z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Bk23z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bk23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bk23z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y4_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H972z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H972z4~1_combout = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Bk23z4~q
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Sa13z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sa13z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Bk23z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H972z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H972z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H972z4~1 .lut_mask = 64'h2020000022000000;
+defparam \soc_inst|m0_1|u_logic|H972z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y4_N14
+dffeas \soc_inst|m0_1|u_logic|Pfz2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Pfz2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pfz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pfz2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y4_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H972z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H972z4~2_combout = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Ehz2z4~q & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Yd03z4~q & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ehz2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yd03z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H972z4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H972z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H972z4~2 .lut_mask = 64'h5000000044000000;
+defparam \soc_inst|m0_1|u_logic|H972z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y4_N53
+dffeas \soc_inst|m0_1|u_logic|T253z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|T253z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T253z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T253z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y4_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H972z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H972z4~0_combout = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|T253z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Fgm2z4~q
+// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Kt33z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T253z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Kt33z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H972z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H972z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H972z4~0 .lut_mask = 64'h000000C0000000A0;
+defparam \soc_inst|m0_1|u_logic|H972z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y5_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eb72z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eb72z4~0_combout = ( !\soc_inst|m0_1|u_logic|X2j2z4~q & ( \soc_inst|m0_1|u_logic|M1j2z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|X2j2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Eb72z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eb72z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eb72z4~0 .lut_mask = 64'h0000000020000000;
+defparam \soc_inst|m0_1|u_logic|Eb72z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y4_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H972z4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H972z4~3_combout = ( !\soc_inst|m0_1|u_logic|H972z4~0_combout & ( !\soc_inst|m0_1|u_logic|Eb72z4~0_combout & ( (!\soc_inst|m0_1|u_logic|H972z4~1_combout & (!\soc_inst|m0_1|u_logic|H972z4~2_combout &
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pfz2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|H972z4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Pfz2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|H972z4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|H972z4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Eb72z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H972z4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H972z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H972z4~3 .lut_mask = 64'h8C00000000000000;
+defparam \soc_inst|m0_1|u_logic|H972z4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y4_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A67wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|A67wx4~0_combout = ( \soc_inst|m0_1|u_logic|H972z4~3_combout & ( \soc_inst|m0_1|u_logic|N3ywx4~combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q )))) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((\soc_inst|m0_1|u_logic|V1l2z4~q )) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H972z4~3_combout & ( \soc_inst|m0_1|u_logic|N3ywx4~combout & (
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & (\soc_inst|m0_1|u_logic|V1l2z4~q ))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|H972z4~3_combout & ( !\soc_inst|m0_1|u_logic|N3ywx4~combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & (\soc_inst|m0_1|u_logic|V1l2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H972z4~3_combout & ( !\soc_inst|m0_1|u_logic|N3ywx4~combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// (((\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & (\soc_inst|m0_1|u_logic|V1l2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|V1l2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|H972z4~3_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|N3ywx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|A67wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|A67wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A67wx4~0 .lut_mask = 64'h0F220F220F220F77;
+defparam \soc_inst|m0_1|u_logic|A67wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y5_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zwcvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zwcvx4~combout = ( !\soc_inst|m0_1|u_logic|A67wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Donvx4~2_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|A67wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zwcvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zwcvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zwcvx4 .lut_mask = 64'hAAAAAAAA00000000;
+defparam \soc_inst|m0_1|u_logic|Zwcvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y5_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~77 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~77_sumout = SUM(( (!\soc_inst|m0_1|u_logic|Phh2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout & (\soc_inst|m0_1|u_logic|Wzawx4~combout )) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout & !\soc_inst|m0_1|u_logic|W19wx4~0_combout ))) ) + ( \soc_inst|m0_1|u_logic|Zwcvx4~combout ) + ( \soc_inst|m0_1|u_logic|Add5~10 ))
+// \soc_inst|m0_1|u_logic|Add5~78 = CARRY(( (!\soc_inst|m0_1|u_logic|Phh2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout & (\soc_inst|m0_1|u_logic|Wzawx4~combout )) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout & !\soc_inst|m0_1|u_logic|W19wx4~0_combout ))) ) + ( \soc_inst|m0_1|u_logic|Zwcvx4~combout ) + ( \soc_inst|m0_1|u_logic|Add5~10 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Phh2z4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Zwcvx4~combout ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add5~10 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add5~77_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add5~78 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~77 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~77 .lut_mask = 64'h0000FF000000FF62;
+defparam \soc_inst|m0_1|u_logic|Add5~77 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y7_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N88wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Add5~81_sumout & ( !\soc_inst|m0_1|u_logic|Add5~85_sumout & ( !\soc_inst|m0_1|u_logic|Add5~77_sumout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Add5~77_sumout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Add5~81_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~85_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N88wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N88wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~0 .lut_mask = 64'hF0F0000000000000;
+defparam \soc_inst|m0_1|u_logic|N88wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y9_N45
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[11]~3 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[11]~3_combout = ( \soc_inst|ram_1|read_cycle~q & ( (!\soc_inst|interconnect_1|mux_sel [2] & (!\soc_inst|interconnect_1|mux_sel [1] & (\soc_inst|ram_1|byte_select [1] & \soc_inst|interconnect_1|mux_sel [0]))) ) )
+
+ .dataa(!\soc_inst|interconnect_1|mux_sel [2]),
+ .datab(!\soc_inst|interconnect_1|mux_sel [1]),
+ .datac(!\soc_inst|ram_1|byte_select [1]),
+ .datad(!\soc_inst|interconnect_1|mux_sel [0]),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|read_cycle~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[11]~3 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[11]~3 .lut_mask = 64'h0000000000080008;
+defparam \soc_inst|interconnect_1|HRDATA[11]~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y9_N54
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[12]~13 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[12]~13_combout = ( \soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & (!\soc_inst|ram_1|byte_select [1] & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout
+// )) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ) # (\soc_inst|ram_1|byte_select [1]))) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .datac(!\soc_inst|ram_1|byte_select [1]),
+ .datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|data_to_memory[12]~13_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[12]~13 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[12]~13 .lut_mask = 64'h0333033300300030;
+defparam \soc_inst|ram_1|data_to_memory[12]~13 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X26_Y6_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 (
+ .portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|ram_1|data_to_memory[28]~14_combout ,\soc_inst|ram_1|data_to_memory[12]~13_combout }),
+ .portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+ .portabyteenamasks(1'b1),
+ .portbdatain(2'b00),
+ .portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_first_bit_number = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_first_bit_number = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000021B6DB6D04814E1D3094C00004210842104CC4CC4CC4CC4CC4CC4CC24C00000000000000E4EB000000000000000000000000";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y8_N24
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[28]~14 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[28]~14_combout = ( \soc_inst|m0_1|u_logic|Sx3wx4~0_combout & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ) # (\soc_inst|ram_1|byte_select [3]))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Sx3wx4~0_combout & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & (!\soc_inst|ram_1|byte_select [3] & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 )) ) )
+
+ .dataa(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|ram_1|byte_select [3]),
+ .datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Sx3wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|data_to_memory[28]~14_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[28]~14 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[28]~14 .lut_mask = 64'h0050005005550555;
+defparam \soc_inst|ram_1|data_to_memory[28]~14 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y8_N21
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[12]~22 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[12]~22_combout = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # (\soc_inst|interconnect_1|HRDATA[11]~3_combout ) ) ) # (
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout & ( (!\soc_inst|interconnect_1|HRDATA[11]~3_combout & !\soc_inst|interconnect_1|HRDATA[25]~1_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
+ .datad(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[12]~22_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[12]~22 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[12]~22 .lut_mask = 64'hF000F000FF0FFF0F;
+defparam \soc_inst|interconnect_1|HRDATA[12]~22 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y9_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xrmwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xrmwx4~0_combout = ( \soc_inst|m0_1|u_logic|L7a3z4~q & ( \soc_inst|interconnect_1|HRDATA[12]~22_combout & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|Iua3z4~q
+// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L7a3z4~q & ( \soc_inst|interconnect_1|HRDATA[12]~22_combout & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout & (!\soc_inst|m0_1|u_logic|G6owx4~combout & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) #
+// (\soc_inst|m0_1|u_logic|Iua3z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|L7a3z4~q & ( !\soc_inst|interconnect_1|HRDATA[12]~22_combout & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|Iua3z4~q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|L7a3z4~q & ( !\soc_inst|interconnect_1|HRDATA[12]~22_combout & ( (!\soc_inst|m0_1|u_logic|G6owx4~combout & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|Iua3z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Iua3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|L7a3z4~q ),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[12]~22_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xrmwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xrmwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xrmwx4~0 .lut_mask = 64'hF030FF33A020AA22;
+defparam \soc_inst|m0_1|u_logic|Xrmwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y9_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xrmwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xrmwx4~1_combout = ( \soc_inst|m0_1|u_logic|C0ewx4~1_combout & ( \soc_inst|m0_1|u_logic|Xrmwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|E1ewx4~1_combout ) #
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|C0ewx4~1_combout & ( \soc_inst|m0_1|u_logic|Xrmwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout &
+// \soc_inst|m0_1|u_logic|E1ewx4~1_combout )) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|E1ewx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|C0ewx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Xrmwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xrmwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xrmwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xrmwx4~1 .lut_mask = 64'h00000000CCFCCFFF;
+defparam \soc_inst|m0_1|u_logic|Xrmwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dpc3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dpc3z4~0_combout = ( \soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout & ( \soc_inst|m0_1|u_logic|Dpc3z4~q ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout &
+// ((\soc_inst|m0_1|u_logic|Dpc3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Dpc3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dpc3z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dpc3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dpc3z4~0 .lut_mask = 64'h30FC30FC00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Dpc3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y13_N50
+dffeas \soc_inst|m0_1|u_logic|Dpc3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Dpc3z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Dpc3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dpc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dpc3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bsvwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bsvwx4~0_combout = ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout & ( ((\soc_inst|m0_1|u_logic|Dpc3z4~q & \soc_inst|m0_1|u_logic|M5tvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Oar2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout
+// & ( (\soc_inst|m0_1|u_logic|Dpc3z4~q & \soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Dpc3z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Oar2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bsvwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bsvwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bsvwx4~0 .lut_mask = 64'h005500550F5F0F5F;
+defparam \soc_inst|m0_1|u_logic|Bsvwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y9_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xrmwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xrmwx4~2_combout = ( \soc_inst|m0_1|u_logic|Bsvwx4~0_combout & ( \soc_inst|m0_1|u_logic|Kkrvx4~6_combout & ( (\soc_inst|m0_1|u_logic|Xrmwx4~1_combout & !\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Bsvwx4~0_combout & ( \soc_inst|m0_1|u_logic|Kkrvx4~6_combout & ( (\soc_inst|m0_1|u_logic|Xrmwx4~1_combout & ((!\soc_inst|m0_1|u_logic|Wfuwx4~combout ) # (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Bsvwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Kkrvx4~6_combout & ( (\soc_inst|m0_1|u_logic|Xrmwx4~1_combout & !\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bsvwx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Kkrvx4~6_combout & ( \soc_inst|m0_1|u_logic|Xrmwx4~1_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Xrmwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Bsvwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kkrvx4~6_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xrmwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xrmwx4~2 .lut_mask = 64'h0F0F0F000F0A0F00;
+defparam \soc_inst|m0_1|u_logic|Xrmwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B2uvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|B2uvx4~1_combout = ( \soc_inst|m0_1|u_logic|B2uvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|J6i2z4~q & !\soc_inst|m0_1|u_logic|Lz93z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|B2uvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B2uvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B2uvx4~1 .lut_mask = 64'h00000000F000F000;
+defparam \soc_inst|m0_1|u_logic|B2uvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y10_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U1uvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U1uvx4~combout = ( \soc_inst|m0_1|u_logic|K3l2z4~q & ( \soc_inst|m0_1|u_logic|B2uvx4~1_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|B2uvx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U1uvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U1uvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U1uvx4 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|U1uvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y10_N2
+dffeas \soc_inst|m0_1|u_logic|Adt2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|hwdata_o [4]),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|U1uvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Adt2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Adt2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Adt2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y14_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oxuvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oxuvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Cam2z4~q & ( \soc_inst|m0_1|u_logic|R1w2z4~q & ( (\soc_inst|m0_1|u_logic|G0w2z4~q & (\soc_inst|m0_1|u_logic|Trq2z4~q & (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|Uaj2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oxuvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oxuvx4~0 .lut_mask = 64'h0000000000100000;
+defparam \soc_inst|m0_1|u_logic|Oxuvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R1ivx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R1ivx4~0_combout = ( \soc_inst|m0_1|u_logic|Yz4wx4~combout & ( \soc_inst|m0_1|u_logic|hwdata_o [4] & ( (\soc_inst|m0_1|u_logic|D9ovx4~combout & ((!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout & ( \soc_inst|m0_1|u_logic|hwdata_o [4] & ( (!\soc_inst|m0_1|u_logic|D9ovx4~combout & (\soc_inst|m0_1|u_logic|Ipb3z4~q &
+// ((!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout )))) # (\soc_inst|m0_1|u_logic|D9ovx4~combout & ((!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout )))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Yz4wx4~combout & ( !\soc_inst|m0_1|u_logic|hwdata_o [4] & ( (\soc_inst|m0_1|u_logic|Ipb3z4~q & ((!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Yz4wx4~combout & ( !\soc_inst|m0_1|u_logic|hwdata_o [4] & ( (\soc_inst|m0_1|u_logic|Ipb3z4~q & ((!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ipb3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o [4]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R1ivx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R1ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R1ivx4~0 .lut_mask = 64'h0F0C0F0C5F4C5544;
+defparam \soc_inst|m0_1|u_logic|R1ivx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y12_N50
+dffeas \soc_inst|m0_1|u_logic|Ipb3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|R1ivx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ipb3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ipb3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ipb3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fhc3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fhc3z4~0_combout = ( \soc_inst|m0_1|u_logic|hwdata_o [4] & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout & ((\soc_inst|m0_1|u_logic|Fhc3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) ) # (
+// !\soc_inst|m0_1|u_logic|hwdata_o [4] & ( \soc_inst|m0_1|u_logic|Fhc3z4~q ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fhc3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o [4]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fhc3z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fhc3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fhc3z4~0 .lut_mask = 64'h00FF00FF0AFA0AFA;
+defparam \soc_inst|m0_1|u_logic|Fhc3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y12_N32
+dffeas \soc_inst|m0_1|u_logic|Fhc3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Fhc3z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Fhc3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fhc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fhc3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y10_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dewwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dewwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Kop2z4~q & ( (!\soc_inst|m0_1|u_logic|Mjl2z4~q & ((\soc_inst|m0_1|u_logic|Fhc3z4~q ))) # (\soc_inst|m0_1|u_logic|Mjl2z4~q & (\soc_inst|m0_1|u_logic|Ipb3z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ipb3z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Fhc3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dewwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dewwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dewwx4~0 .lut_mask = 64'h0F550F5500000000;
+defparam \soc_inst|m0_1|u_logic|Dewwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y10_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dewwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dewwx4~1_combout = ( \soc_inst|m0_1|u_logic|Dewwx4~0_combout & ( \soc_inst|m0_1|u_logic|B2uvx4~1_combout & ( ((\soc_inst|m0_1|u_logic|Lz93z4~q & !\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Adt2z4~q )
+// ) ) ) # ( !\soc_inst|m0_1|u_logic|Dewwx4~0_combout & ( \soc_inst|m0_1|u_logic|B2uvx4~1_combout & ( \soc_inst|m0_1|u_logic|Adt2z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|Dewwx4~0_combout & ( !\soc_inst|m0_1|u_logic|B2uvx4~1_combout & (
+// (\soc_inst|m0_1|u_logic|Lz93z4~q & !\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Adt2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Dewwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|B2uvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dewwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dewwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dewwx4~1 .lut_mask = 64'h00000F0055555F55;
+defparam \soc_inst|m0_1|u_logic|Dewwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y9_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gtmwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gtmwx4~0_combout = ( \soc_inst|m0_1|u_logic|Dewwx4~1_combout & ( \soc_inst|interconnect_1|HRDATA[4]~23_combout & ( (\soc_inst|m0_1|u_logic|B7owx4~combout ) # (\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Dewwx4~1_combout & ( \soc_inst|interconnect_1|HRDATA[4]~23_combout & ( \soc_inst|m0_1|u_logic|B7owx4~combout ) ) ) # ( \soc_inst|m0_1|u_logic|Dewwx4~1_combout & ( !\soc_inst|interconnect_1|HRDATA[4]~23_combout & (
+// \soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Dewwx4~1_combout ),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[4]~23_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gtmwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gtmwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gtmwx4~0 .lut_mask = 64'h0000555500FF55FF;
+defparam \soc_inst|m0_1|u_logic|Gtmwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y9_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gtmwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gtmwx4~1_combout = ( \soc_inst|m0_1|u_logic|G6owx4~combout & ( !\soc_inst|m0_1|u_logic|Gtmwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Taa3z4~q & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|Gza3z4~q ))) ) )
+// ) # ( !\soc_inst|m0_1|u_logic|G6owx4~combout & ( !\soc_inst|m0_1|u_logic|Gtmwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|Gza3z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Gza3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Taa3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Gtmwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gtmwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gtmwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gtmwx4~1 .lut_mask = 64'hF5F5313100000000;
+defparam \soc_inst|m0_1|u_logic|Gtmwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y13_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gtmwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gtmwx4~2_combout = ( \soc_inst|m0_1|u_logic|Lcowx4~0_combout & ( \soc_inst|m0_1|u_logic|Gtmwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout & (\soc_inst|m0_1|u_logic|Godwx4~1_combout )) #
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout & ((\soc_inst|m0_1|u_logic|Qmdwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lcowx4~0_combout & ( \soc_inst|m0_1|u_logic|Gtmwx4~1_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Godwx4~1_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qmdwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Gtmwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gtmwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gtmwx4~2 .lut_mask = 64'h00000000FFFF505F;
+defparam \soc_inst|m0_1|u_logic|Gtmwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y13_N38
+dffeas \soc_inst|m0_1|u_logic|Z2h3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Unmvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Z2h3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z2h3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z2h3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X24_Y9_N38
+dffeas \soc_inst|switches_1|switch_store[1][4] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\SW[4]~input_o ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|switches_1|always0~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|switches_1|switch_store[1][4]~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[1][4] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[1][4] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y9_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sjvwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sjvwx4~0_combout = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 & ( (\soc_inst|m0_1|u_logic|B7owx4~combout & (\soc_inst|interconnect_1|HRDATA[20]~7_combout & ((!\soc_inst|interconnect_1|Equal1~0_combout ) #
+// (\soc_inst|switches_1|switch_store[1][4]~q )))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 & ( (\soc_inst|switches_1|switch_store[1][4]~q & (\soc_inst|interconnect_1|Equal1~0_combout & (\soc_inst|m0_1|u_logic|B7owx4~combout &
+// \soc_inst|interconnect_1|HRDATA[20]~7_combout ))) ) )
+
+ .dataa(!\soc_inst|switches_1|switch_store[1][4]~q ),
+ .datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+ .datad(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sjvwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sjvwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sjvwx4~0 .lut_mask = 64'h00010001000D000D;
+defparam \soc_inst|m0_1|u_logic|Sjvwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y13_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ntmwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ntmwx4~0_combout = ( \soc_inst|m0_1|u_logic|I7owx4~combout & ( !\soc_inst|m0_1|u_logic|Sjvwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Z2h3z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) #
+// (\soc_inst|m0_1|u_logic|I1h3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I7owx4~combout & ( !\soc_inst|m0_1|u_logic|Sjvwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|I1h3z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Z2h3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|I1h3z4~q ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjvwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ntmwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ntmwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ntmwx4~0 .lut_mask = 64'hFF33551100000000;
+defparam \soc_inst|m0_1|u_logic|Ntmwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y13_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ntmwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ntmwx4~1_combout = ( \soc_inst|m0_1|u_logic|Nvdwx4~1_combout & ( \soc_inst|m0_1|u_logic|Ntmwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Xtdwx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nvdwx4~1_combout & ( \soc_inst|m0_1|u_logic|Ntmwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Oldwx4~0_combout &
+// \soc_inst|m0_1|u_logic|Xtdwx4~1_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Xtdwx4~1_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Nvdwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ntmwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ntmwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ntmwx4~1 .lut_mask = 64'h00000000ABABEFEF;
+defparam \soc_inst|m0_1|u_logic|Ntmwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y9_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wzpvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wzpvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Gtmwx4~2_combout & ( \soc_inst|m0_1|u_logic|Ntmwx4~1_combout & ( \soc_inst|m0_1|u_logic|V9iwx4~0_combout ) ) ) # ( \soc_inst|m0_1|u_logic|Gtmwx4~2_combout & (
+// !\soc_inst|m0_1|u_logic|Ntmwx4~1_combout & ( \soc_inst|m0_1|u_logic|F8iwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Gtmwx4~2_combout & ( !\soc_inst|m0_1|u_logic|Ntmwx4~1_combout & ( (\soc_inst|m0_1|u_logic|F8iwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wzpvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wzpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wzpvx4~0 .lut_mask = 64'h3F3F0F0F33330000;
+defparam \soc_inst|m0_1|u_logic|Wzpvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y9_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lsmwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lsmwx4~0_combout = ( \soc_inst|m0_1|u_logic|B7owx4~combout & ( (!\soc_inst|m0_1|u_logic|T2owx4~1_combout & ((!\soc_inst|interconnect_1|HRDATA[29]~0_combout & (\soc_inst|interconnect_1|HRDATA[25]~1_combout )) #
+// (\soc_inst|interconnect_1|HRDATA[29]~0_combout & ((!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ))))) ) ) # ( !\soc_inst|m0_1|u_logic|B7owx4~combout & ( !\soc_inst|m0_1|u_logic|T2owx4~1_combout ) )
+
+ .dataa(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+ .datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+ .datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ),
+ .datad(!\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lsmwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lsmwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lsmwx4~0 .lut_mask = 64'hFF00FF0072007200;
+defparam \soc_inst|m0_1|u_logic|Lsmwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y9_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lsmwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lsmwx4~1_combout = ( \soc_inst|m0_1|u_logic|Lsmwx4~0_combout & ( \soc_inst|m0_1|u_logic|X7ewx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Wbk2z4~q ) # ((!\soc_inst|m0_1|u_logic|Wfuwx4~combout ) #
+// (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Lsmwx4~0_combout & ( !\soc_inst|m0_1|u_logic|X7ewx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout & ((!\soc_inst|m0_1|u_logic|Wbk2z4~q ) #
+// ((!\soc_inst|m0_1|u_logic|Wfuwx4~combout ) # (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wbk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Lsmwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|X7ewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lsmwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lsmwx4~1 .lut_mask = 64'h0000CCC80000FFFA;
+defparam \soc_inst|m0_1|u_logic|Lsmwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y9_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wzpvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wzpvx4~1_combout = ( !\soc_inst|m0_1|u_logic|Wzpvx4~0_combout & ( \soc_inst|m0_1|u_logic|Lsmwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|W6iwx4~combout ) # (\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Wzpvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Lsmwx4~1_combout & ( (\soc_inst|m0_1|u_logic|H9iwx4~1_combout & ((!\soc_inst|m0_1|u_logic|W6iwx4~combout ) # (\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ))) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Wzpvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wzpvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wzpvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wzpvx4~1 .lut_mask = 64'h33030000FF0F0000;
+defparam \soc_inst|m0_1|u_logic|Wzpvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y11_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D47wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D47wx4~0_combout = ( \soc_inst|m0_1|u_logic|Wkxvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Aok2z4~q & (\soc_inst|m0_1|u_logic|Ffj2z4~q & \soc_inst|m0_1|u_logic|Npk2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|D47wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D47wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D47wx4~0 .lut_mask = 64'h0000000000010001;
+defparam \soc_inst|m0_1|u_logic|D47wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zxpvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zxpvx4~0_combout = ( !\soc_inst|m0_1|u_logic|D47wx4~0_combout & ( \soc_inst|m0_1|u_logic|P37wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q ) # (((!\soc_inst|m0_1|u_logic|Ucqvx4~combout ) #
+// (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Npk2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|D47wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|P37wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zxpvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zxpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zxpvx4~0 .lut_mask = 64'h00000000FFBF0000;
+defparam \soc_inst|m0_1|u_logic|Zxpvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y6_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Phh2z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Phh2z4~1_combout = ( !\soc_inst|m0_1|u_logic|O3awx4~0_combout & ( \soc_inst|m0_1|u_logic|Phh2z4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Phh2z4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Phh2z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Phh2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Phh2z4~1 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|Phh2z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y11_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S17wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S17wx4~0_combout = ( \soc_inst|m0_1|u_logic|Add5~77_sumout & ( (!\soc_inst|m0_1|u_logic|Zwcvx4~combout & \soc_inst|m0_1|u_logic|Phh2z4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~77_sumout & (
+// (\soc_inst|m0_1|u_logic|Zwcvx4~combout & !\soc_inst|m0_1|u_logic|Phh2z4~1_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Zwcvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Phh2z4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~77_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S17wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S17wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S17wx4~0 .lut_mask = 64'h0F000F0000F000F0;
+defparam \soc_inst|m0_1|u_logic|S17wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y11_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rhnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rhnvx4~0_combout = ( \soc_inst|m0_1|u_logic|Zxpvx4~0_combout & ( \soc_inst|m0_1|u_logic|S17wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Idk2z4~q & \soc_inst|m0_1|u_logic|Wspvx4~combout ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Zxpvx4~0_combout & ( !\soc_inst|m0_1|u_logic|S17wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Idk2z4~q & \soc_inst|m0_1|u_logic|Wspvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zxpvx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|S17wx4~0_combout & ( \soc_inst|m0_1|u_logic|Wspvx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Idk2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Wspvx4~combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Zxpvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|S17wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rhnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rhnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rhnvx4~0 .lut_mask = 64'h0F0F0A0A00000A0A;
+defparam \soc_inst|m0_1|u_logic|Rhnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y9_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rhnvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rhnvx4~1_combout = ( \soc_inst|m0_1|u_logic|Wzpvx4~1_combout & ( !\soc_inst|m0_1|u_logic|Rhnvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|K0qvx4~combout & ((!\soc_inst|m0_1|u_logic|Izpvx4~combout ) #
+// ((\soc_inst|m0_1|u_logic|R7iwx4~1_combout & !\soc_inst|m0_1|u_logic|X4pvx4~combout )))) # (\soc_inst|m0_1|u_logic|K0qvx4~combout & (((\soc_inst|m0_1|u_logic|X4pvx4~combout )) # (\soc_inst|m0_1|u_logic|R7iwx4~1_combout ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Wzpvx4~1_combout & ( !\soc_inst|m0_1|u_logic|Rhnvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Izpvx4~combout ) # ((!\soc_inst|m0_1|u_logic|X4pvx4~combout ) # (\soc_inst|m0_1|u_logic|K0qvx4~combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Izpvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|K0qvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Wzpvx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rhnvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rhnvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rhnvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rhnvx4~1 .lut_mask = 64'hFFCFD5CF00000000;
+defparam \soc_inst|m0_1|u_logic|Rhnvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y9_N49
+dffeas \soc_inst|m0_1|u_logic|Idk2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Rhnvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Idk2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Idk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Idk2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y4_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnawx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mnawx4~0_combout = ( \soc_inst|m0_1|u_logic|Esnvx4~0_combout & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # ((!\soc_inst|m0_1|u_logic|O3awx4~0_combout &
+// \soc_inst|m0_1|u_logic|Whh2z4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Esnvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # ((!\soc_inst|m0_1|u_logic|O3awx4~0_combout &
+// \soc_inst|m0_1|u_logic|Whh2z4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Esnvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|O3awx4~0_combout & ((!\soc_inst|m0_1|u_logic|Whh2z4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Whh2z4~0_combout & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )))) # (\soc_inst|m0_1|u_logic|O3awx4~0_combout & (((!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Whh2z4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Esnvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mnawx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mnawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mnawx4~0 .lut_mask = 64'hFD20F2F20000F2F2;
+defparam \soc_inst|m0_1|u_logic|Mnawx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y4_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C3qvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C3qvx4~0_combout = ( \soc_inst|m0_1|u_logic|Idk2z4~q & ( \soc_inst|m0_1|u_logic|Mnawx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Rmawx4~0_combout & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Izpvx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Idk2z4~q & ( \soc_inst|m0_1|u_logic|Mnawx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Izpvx4~combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Izpvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Idk2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mnawx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C3qvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C3qvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C3qvx4~0 .lut_mask = 64'h00000000F0FFC0CC;
+defparam \soc_inst|m0_1|u_logic|C3qvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y5_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~15 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N88wx4~15_combout = ( \soc_inst|m0_1|u_logic|Va3wx4~0_combout & ( (\soc_inst|m0_1|u_logic|I30wx4~0_combout & (\soc_inst|m0_1|u_logic|C3qvx4~0_combout & \soc_inst|m0_1|u_logic|Yqzvx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|I30wx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|C3qvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Yqzvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Va3wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N88wx4~15_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N88wx4~15 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~15 .lut_mask = 64'h0000000000050005;
+defparam \soc_inst|m0_1|u_logic|N88wx4~15 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y6_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ox1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ox1wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout & ( \soc_inst|m0_1|u_logic|Add5~113_sumout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~113_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ox1wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ox1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ox1wx4~0 .lut_mask = 64'h00000000FFFF0000;
+defparam \soc_inst|m0_1|u_logic|Ox1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y7_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N88wx4~2_combout = ( \soc_inst|m0_1|u_logic|Oaawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout & (((\soc_inst|m0_1|u_logic|Lf0wx4~0_combout & \soc_inst|m0_1|u_logic|U6awx4~1_combout )) #
+// (\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout & (((\soc_inst|m0_1|u_logic|Lf0wx4~0_combout & !\soc_inst|m0_1|u_logic|U6awx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Oaawx4~1_combout & (
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout & (((\soc_inst|m0_1|u_logic|Lf0wx4~0_combout & \soc_inst|m0_1|u_logic|U6awx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout & (((\soc_inst|m0_1|u_logic|Lf0wx4~0_combout &
+// !\soc_inst|m0_1|u_logic|U6awx4~1_combout )) # (\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|U6awx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Oaawx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N88wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N88wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~2 .lut_mask = 64'h131D131D474C474C;
+defparam \soc_inst|m0_1|u_logic|N88wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y6_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N88wx4~3_combout = ( \soc_inst|m0_1|u_logic|P82wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout & (((\soc_inst|m0_1|u_logic|Gdawx4~1_combout & \soc_inst|m0_1|u_logic|Hy0wx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # (\soc_inst|m0_1|u_logic|Ns9wx4~1_combout & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # ((!\soc_inst|m0_1|u_logic|Gdawx4~1_combout & \soc_inst|m0_1|u_logic|Hy0wx4~0_combout )))) ) ) # (
+// !\soc_inst|m0_1|u_logic|P82wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Hy0wx4~0_combout & (!\soc_inst|m0_1|u_logic|Gdawx4~1_combout $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Gdawx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N88wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N88wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~3 .lut_mask = 64'h050A050A37CE37CE;
+defparam \soc_inst|m0_1|u_logic|N88wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y6_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nf1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nf1wx4~0_combout = ( \soc_inst|m0_1|u_logic|Ejawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout & \soc_inst|m0_1|u_logic|Pg1wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ejawx4~1_combout & (
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout & \soc_inst|m0_1|u_logic|Pg1wx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ejawx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nf1wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nf1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nf1wx4~0 .lut_mask = 64'h000F000F00F000F0;
+defparam \soc_inst|m0_1|u_logic|Nf1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y6_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rjzvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rjzvx4~0_combout = ( \soc_inst|m0_1|u_logic|H3awx4~0_combout & ( (\soc_inst|m0_1|u_logic|O3awx4~0_combout & !\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|H3awx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|H3awx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rjzvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rjzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rjzvx4~0 .lut_mask = 64'hFF00FF000F000F00;
+defparam \soc_inst|m0_1|u_logic|Rjzvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y6_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N88wx4~4_combout = ( !\soc_inst|m0_1|u_logic|Nf1wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Rjzvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|N88wx4~3_combout & ((!\soc_inst|m0_1|u_logic|F32wx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout $ (\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|N88wx4~3_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Nf1wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rjzvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N88wx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N88wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~4 .lut_mask = 64'hC8C4000000000000;
+defparam \soc_inst|m0_1|u_logic|N88wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y6_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N88wx4~5_combout = ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( \soc_inst|m0_1|u_logic|N88wx4~4_combout & ( !\soc_inst|m0_1|u_logic|N88wx4~2_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout & (
+// \soc_inst|m0_1|u_logic|N88wx4~4_combout & ( (!\soc_inst|m0_1|u_logic|N88wx4~2_combout ) # (!\soc_inst|m0_1|u_logic|Muawx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( !\soc_inst|m0_1|u_logic|N88wx4~4_combout & (
+// !\soc_inst|m0_1|u_logic|Muawx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|N88wx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|N88wx4~4_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N88wx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N88wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~5 .lut_mask = 64'hCCCC0000EEEEAAAA;
+defparam \soc_inst|m0_1|u_logic|N88wx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y3_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ox1wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ox1wx4~1_combout = ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout & ( \soc_inst|m0_1|u_logic|Vf5wx4~8_combout & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout & (
+// \soc_inst|m0_1|u_logic|Vf5wx4~8_combout & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Vf5wx4~8_combout & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Vf5wx4~8_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ox1wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ox1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ox1wx4~1 .lut_mask = 64'hF0F00000F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Ox1wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y10_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wsawx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wsawx4~0_combout = ( \soc_inst|m0_1|u_logic|Tuawx4~1_combout & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Yonvx4~0_combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) #
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tuawx4~1_combout & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Yonvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout ) #
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tuawx4~1_combout & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout & ((!\soc_inst|m0_1|u_logic|Yonvx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Yonvx4~0_combout & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout & (((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) #
+// (!\soc_inst|m0_1|u_logic|Yonvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tuawx4~1_combout & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout & (((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) #
+// (!\soc_inst|m0_1|u_logic|Yonvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout & ((!\soc_inst|m0_1|u_logic|Yonvx4~0_combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Yonvx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Yonvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Tuawx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wsawx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wsawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wsawx4~0 .lut_mask = 64'hFAE4F5D8FA00F500;
+defparam \soc_inst|m0_1|u_logic|Wsawx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y6_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N88wx4~6_combout = ( \soc_inst|m0_1|u_logic|Ox1wx4~1_combout & ( \soc_inst|m0_1|u_logic|Wsawx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ox1wx4~0_combout & (\soc_inst|m0_1|u_logic|Ksbwx4~0_combout &
+// (\soc_inst|m0_1|u_logic|N88wx4~5_combout & \soc_inst|m0_1|u_logic|Y5zvx4~1_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ox1wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ksbwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|N88wx4~5_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Y5zvx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ox1wx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wsawx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N88wx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N88wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~6 .lut_mask = 64'h0000000000000002;
+defparam \soc_inst|m0_1|u_logic|N88wx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y6_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cr1wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cr1wx4~3_combout = ( \soc_inst|m0_1|u_logic|Qrnvx4~0_combout & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout & (!\soc_inst|m0_1|u_logic|Hnbwx4~1_combout $ (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Qrnvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Hnbwx4~1_combout & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout & ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout &
+// (\soc_inst|m0_1|u_logic|X8zvx4~combout )))) # (\soc_inst|m0_1|u_logic|Hnbwx4~1_combout & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout & (\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout &
+// ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Hnbwx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cr1wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~3 .lut_mask = 64'h1B271B2722112211;
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G6d3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G6d3z4~0_combout = ( \soc_inst|m0_1|u_logic|O5t2z4~q & ( (\soc_inst|m0_1|u_logic|P03wx4~0_combout & (\soc_inst|interconnect_1|HREADY~0_combout & !\soc_inst|m0_1|u_logic|B1vvx4~0_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|O5t2z4~q & ( (\soc_inst|interconnect_1|HREADY~0_combout & (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout & ((\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) # (\soc_inst|m0_1|u_logic|P03wx4~0_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|P03wx4~0_combout ),
+ .datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G6d3z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G6d3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G6d3z4~0 .lut_mask = 64'h1030103010101010;
+defparam \soc_inst|m0_1|u_logic|G6d3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X39_Y11_N49
+dffeas \soc_inst|m0_1|u_logic|G6d3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|G6d3z4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|G6d3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G6d3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G6d3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y9_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[9]~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout = ( \soc_inst|m0_1|u_logic|Vf5wx4~8_combout & ( (!\soc_inst|m0_1|u_logic|Wq5wx4~combout ) # (\soc_inst|m0_1|u_logic|Htyvx4~3_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Vf5wx4~8_combout & (
+// (\soc_inst|m0_1|u_logic|Htyvx4~3_combout & \soc_inst|m0_1|u_logic|Wq5wx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Vf5wx4~8_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hwdata_o[9]~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[9]~6 .lut_mask = 64'h000F000FFF0FFF0F;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[9]~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y10_N29
+dffeas \soc_inst|m0_1|u_logic|Kxe3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Kxe3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kxe3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kxe3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X24_Y11_N26
+dffeas \soc_inst|m0_1|u_logic|Aze3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Tqmvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Aze3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Aze3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Aze3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~9 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add0~9_sumout = SUM(( !\soc_inst|m0_1|u_logic|Dhb3z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~90 ))
+// \soc_inst|m0_1|u_logic|Add0~10 = CARRY(( !\soc_inst|m0_1|u_logic|Dhb3z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~90 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Dhb3z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add0~90 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add0~9_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add0~10 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add0~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~9 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~9 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~77 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add0~77_sumout = SUM(( !\soc_inst|m0_1|u_logic|M5f3z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~10 ))
+// \soc_inst|m0_1|u_logic|Add0~78 = CARRY(( !\soc_inst|m0_1|u_logic|M5f3z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~10 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|M5f3z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add0~10 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add0~77_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add0~78 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add0~77 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~77 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~77 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y11_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[8]~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout = ( \soc_inst|m0_1|u_logic|Wq5wx4~combout & ( \soc_inst|m0_1|u_logic|Zhyvx4~combout ) ) # ( !\soc_inst|m0_1|u_logic|Wq5wx4~combout & ( \soc_inst|m0_1|u_logic|P12wx4~combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|P12wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hwdata_o[8]~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[8]~7 .lut_mask = 64'h00FF00FF0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[8]~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y11_N58
+dffeas \soc_inst|m0_1|u_logic|W3f3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|W3f3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W3f3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|W3f3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Armvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Armvx4~0_combout = ( \soc_inst|m0_1|u_logic|M5f3z4~q & ( \soc_inst|m0_1|u_logic|W3f3z4~q & ( (((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (!\soc_inst|m0_1|u_logic|Add0~77_sumout )) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|M5f3z4~q & ( \soc_inst|m0_1|u_logic|W3f3z4~q & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q & ((!\soc_inst|m0_1|u_logic|Add0~77_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|M5f3z4~q & ( !\soc_inst|m0_1|u_logic|W3f3z4~q & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout & !\soc_inst|m0_1|u_logic|Add0~77_sumout ))) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|M5f3z4~q & ( !\soc_inst|m0_1|u_logic|W3f3z4~q & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout & (\soc_inst|m0_1|u_logic|Tna3z4~q & !\soc_inst|m0_1|u_logic|Add0~77_sumout ))) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Add0~77_sumout ),
+ .datae(!\soc_inst|m0_1|u_logic|M5f3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|W3f3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Armvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Armvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Armvx4~0 .lut_mask = 64'h5D55FDF55F57FFF7;
+defparam \soc_inst|m0_1|u_logic|Armvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y11_N43
+dffeas \soc_inst|m0_1|u_logic|M5f3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Armvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|M5f3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M5f3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M5f3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y12_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~25 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add0~25_sumout = SUM(( !\soc_inst|m0_1|u_logic|Aze3z4~DUPLICATE_q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~78 ))
+// \soc_inst|m0_1|u_logic|Add0~26 = CARRY(( !\soc_inst|m0_1|u_logic|Aze3z4~DUPLICATE_q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~78 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Aze3z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add0~78 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add0~25_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add0~26 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add0~25 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~25 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~25 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tqmvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tqmvx4~0_combout = ( \soc_inst|m0_1|u_logic|Aze3z4~q & ( \soc_inst|m0_1|u_logic|Add0~25_sumout & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((\soc_inst|m0_1|u_logic|Mxtvx4~combout & \soc_inst|m0_1|u_logic|Kxe3z4~q )) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aze3z4~q & ( \soc_inst|m0_1|u_logic|Add0~25_sumout & ( ((\soc_inst|m0_1|u_logic|Mxtvx4~combout & (\soc_inst|m0_1|u_logic|Tna3z4~q & \soc_inst|m0_1|u_logic|Kxe3z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Aze3z4~q & ( !\soc_inst|m0_1|u_logic|Add0~25_sumout & ( (!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((\soc_inst|m0_1|u_logic|Kxe3z4~q ) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aze3z4~q & ( !\soc_inst|m0_1|u_logic|Add0~25_sumout & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # (\soc_inst|m0_1|u_logic|Kxe3z4~q
+// )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Kxe3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Aze3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add0~25_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tqmvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tqmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tqmvx4~0 .lut_mask = 64'h2F3FEFFF0F1FCFDF;
+defparam \soc_inst|m0_1|u_logic|Tqmvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y11_N25
+dffeas \soc_inst|m0_1|u_logic|Aze3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Tqmvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Aze3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Aze3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Aze3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X27_Y10_N11
+dffeas \soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|I0ivx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y14_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mxa2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mxa2z4~0_combout = ( !\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Tdp2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mxa2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mxa2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mxa2z4~0 .lut_mask = 64'h0100000000000000;
+defparam \soc_inst|m0_1|u_logic|Mxa2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y10_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I0ivx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|I0ivx4~0_combout = ( \soc_inst|m0_1|u_logic|Mxa2z4~0_combout & ( \soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout & \soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Mxa2z4~0_combout & ( \soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout & ( \soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q ) ) ) # ( \soc_inst|m0_1|u_logic|Mxa2z4~0_combout & ( !\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout & (
+// (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout & (((!\soc_inst|m0_1|u_logic|Yz4wx4~combout & \soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mxa2z4~0_combout & (
+// !\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout & ( ((!\soc_inst|m0_1|u_logic|Yz4wx4~combout & \soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Mxa2z4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|I0ivx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I0ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I0ivx4~0 .lut_mask = 64'h0CFF08AA0F0F0A0A;
+defparam \soc_inst|m0_1|u_logic|I0ivx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y10_N10
+dffeas \soc_inst|m0_1|u_logic|Y9l2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|I0ivx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Y9l2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y9l2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y9l2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X27_Y10_N50
+dffeas \soc_inst|m0_1|u_logic|Vve3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Vve3z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Vve3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vve3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vve3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y10_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vve3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vve3z4~0_combout = ( \soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout & ( \soc_inst|m0_1|u_logic|Vve3z4~q ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout &
+// ((\soc_inst|m0_1|u_logic|Vve3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Vve3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vve3z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vve3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vve3z4~0 .lut_mask = 64'h0AFA0AFA00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Vve3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y10_N49
+dffeas \soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Vve3z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Khfwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Khfwx4~0_combout = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Y9l2z4~q & (\soc_inst|m0_1|u_logic|M5tvx4~0_combout & ((\soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Y9l2z4~q
+// & (((\soc_inst|m0_1|u_logic|M5tvx4~0_combout & \soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Y9l2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Khfwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Khfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Khfwx4~0 .lut_mask = 64'h0000000005370537;
+defparam \soc_inst|m0_1|u_logic|Khfwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y9_N27
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[8]~15 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[8]~15_combout = ( \soc_inst|interconnect_1|HRDATA[7]~9_combout & ( ((\soc_inst|ram_1|read_cycle~q & (\soc_inst|ram_1|byte_select [1] & \soc_inst|interconnect_1|mux_sel [0]))) # (\soc_inst|interconnect_1|mux_sel [1]) ) )
+
+ .dataa(!\soc_inst|ram_1|read_cycle~q ),
+ .datab(!\soc_inst|ram_1|byte_select [1]),
+ .datac(!\soc_inst|interconnect_1|mux_sel [1]),
+ .datad(!\soc_inst|interconnect_1|mux_sel [0]),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[7]~9_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[8]~15_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[8]~15 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[8]~15 .lut_mask = 64'h000000000F1F0F1F;
+defparam \soc_inst|interconnect_1|HRDATA[8]~15 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: IOIBUF_X32_Y0_N52
+cyclonev_io_ibuf \SW[9]~input (
+ .i(SW[9]),
+ .ibar(gnd),
+ .dynamicterminationcontrol(gnd),
+ .o(\SW[9]~input_o ));
+// synopsys translate_off
+defparam \SW[9]~input .bus_hold = "false";
+defparam \SW[9]~input .simulate_z_as = "z";
+// synopsys translate_on
+
+// Location: FF_X33_Y9_N8
+dffeas \soc_inst|switches_1|switch_store[0][9] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\SW[9]~input_o ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|switches_1|always0~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|switches_1|switch_store[0][9]~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[0][9] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[0][9] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y9_N6
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[9]~16 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[9]~16_combout = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout & ( (!\soc_inst|interconnect_1|HRDATA[8]~15_combout & (((!\soc_inst|interconnect_1|HRDATA[25]~1_combout )))) #
+// (\soc_inst|interconnect_1|HRDATA[8]~15_combout & ((!\soc_inst|interconnect_1|Equal1~0_combout ) # ((\soc_inst|switches_1|switch_store[0][9]~q )))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout & (
+// (!\soc_inst|interconnect_1|HRDATA[8]~15_combout & (((!\soc_inst|interconnect_1|HRDATA[25]~1_combout )))) # (\soc_inst|interconnect_1|HRDATA[8]~15_combout & (\soc_inst|interconnect_1|Equal1~0_combout & ((\soc_inst|switches_1|switch_store[0][9]~q )))) )
+// )
+
+ .dataa(!\soc_inst|interconnect_1|HRDATA[8]~15_combout ),
+ .datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
+ .datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+ .datad(!\soc_inst|switches_1|switch_store[0][9]~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[9]~16_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[9]~16 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[9]~16 .lut_mask = 64'hA0B1A0B1E4F5E4F5;
+defparam \soc_inst|interconnect_1|HRDATA[9]~16 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y10_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Khfwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Khfwx4~1_combout = ( \soc_inst|interconnect_1|HRDATA[9]~16_combout & ( (!\soc_inst|m0_1|u_logic|I2twx4~0_combout & (!\soc_inst|m0_1|u_logic|Ecowx4~combout & (!\soc_inst|m0_1|u_logic|B7owx4~combout &
+// !\soc_inst|m0_1|u_logic|Khfwx4~0_combout ))) ) ) # ( !\soc_inst|interconnect_1|HRDATA[9]~16_combout & ( (!\soc_inst|m0_1|u_logic|I2twx4~0_combout & (!\soc_inst|m0_1|u_logic|Ecowx4~combout & !\soc_inst|m0_1|u_logic|Khfwx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|I2twx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ecowx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Khfwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[9]~16_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Khfwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Khfwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Khfwx4~1 .lut_mask = 64'h8800880080008000;
+defparam \soc_inst|m0_1|u_logic|Khfwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y10_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Khfwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Khfwx4~2_combout = ( \soc_inst|m0_1|u_logic|G6owx4~combout & ( \soc_inst|m0_1|u_logic|Khfwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Kxe3z4~q & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) #
+// (\soc_inst|m0_1|u_logic|Aze3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G6owx4~combout & ( \soc_inst|m0_1|u_logic|Khfwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|Aze3z4~DUPLICATE_q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Kxe3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Aze3z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Khfwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Khfwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Khfwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Khfwx4~2 .lut_mask = 64'h00000000F3F35151;
+defparam \soc_inst|m0_1|u_logic|Khfwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Khfwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Khfwx4~3_combout = ( \soc_inst|m0_1|u_logic|Zndwx4~1_combout & ( \soc_inst|m0_1|u_logic|Khfwx4~2_combout & ( ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Yxdwx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zndwx4~1_combout & ( \soc_inst|m0_1|u_logic|Khfwx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Yxdwx4~1_combout &
+// !\soc_inst|m0_1|u_logic|Oldwx4~0_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Yxdwx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Zndwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Khfwx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Khfwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Khfwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Khfwx4~3 .lut_mask = 64'h00000000F4F4F7F7;
+defparam \soc_inst|m0_1|u_logic|Khfwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y12_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vq1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vq1wx4~0_combout = ( \soc_inst|m0_1|u_logic|Pmnwx4~combout & ( (!\soc_inst|m0_1|u_logic|Sknwx4~2_combout & !\soc_inst|m0_1|u_logic|Khfwx4~3_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Pmnwx4~combout & (
+// (!\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ) # ((!\soc_inst|m0_1|u_logic|Sknwx4~2_combout & !\soc_inst|m0_1|u_logic|Khfwx4~3_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Khfwx4~3_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vq1wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vq1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vq1wx4~0 .lut_mask = 64'hFAF0FAF0AA00AA00;
+defparam \soc_inst|m0_1|u_logic|Vq1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vq1wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vq1wx4~1_combout = ( !\soc_inst|m0_1|u_logic|Vq1wx4~0_combout & ( \soc_inst|m0_1|u_logic|Pgfwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Vq1wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Pgfwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Imnwx4~combout & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ))) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Vq1wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Pgfwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vq1wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vq1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vq1wx4~1 .lut_mask = 64'h00F30000F3F30000;
+defparam \soc_inst|m0_1|u_logic|Vq1wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y11_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vq1wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vq1wx4~combout = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Vq1wx4~1_combout & ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # (\soc_inst|m0_1|u_logic|B8nwx4~1_combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Glnwx4~1_combout & \soc_inst|m0_1|u_logic|Vq1wx4~1_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Vq1wx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vq1wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vq1wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vq1wx4 .lut_mask = 64'h00CC00CC00CF00CF;
+defparam \soc_inst|m0_1|u_logic|Vq1wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G6d3z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G6d3z4~1_combout = ( \soc_inst|m0_1|u_logic|Vq1wx4~combout & ( (!\soc_inst|m0_1|u_logic|G6d3z4~0_combout & (((\soc_inst|m0_1|u_logic|G6d3z4~q )))) # (\soc_inst|m0_1|u_logic|G6d3z4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Mtqvx4~combout ) # ((\soc_inst|m0_1|u_logic|Qrnvx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Vq1wx4~combout & ( (!\soc_inst|m0_1|u_logic|G6d3z4~0_combout & (((\soc_inst|m0_1|u_logic|G6d3z4~q )))) #
+// (\soc_inst|m0_1|u_logic|G6d3z4~0_combout & (\soc_inst|m0_1|u_logic|Mtqvx4~combout & (\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|G6d3z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|G6d3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Vq1wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G6d3z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G6d3z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G6d3z4~1 .lut_mask = 64'h01F101F10BFB0BFB;
+defparam \soc_inst|m0_1|u_logic|G6d3z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X39_Y11_N50
+dffeas \soc_inst|m0_1|u_logic|G6d3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|G6d3z4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|G6d3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G6d3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G6d3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y10_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ffbwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ffbwx4~0_combout = ( !\soc_inst|m0_1|u_logic|O5t2z4~q & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|G6d3z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Npk2z4~q
+// ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|G6d3z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ffbwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ffbwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ffbwx4~0 .lut_mask = 64'h0008000800000000;
+defparam \soc_inst|m0_1|u_logic|Ffbwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y10_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cr1wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cr1wx4~2_combout = ( \soc_inst|m0_1|u_logic|Zz8wx4~combout & ( \soc_inst|m0_1|u_logic|Sh5wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ffbwx4~0_combout & !\soc_inst|m0_1|u_logic|Uaj2z4~q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Zz8wx4~combout & ( \soc_inst|m0_1|u_logic|Sh5wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ffbwx4~0_combout ) ) ) # ( \soc_inst|m0_1|u_logic|Zz8wx4~combout & ( !\soc_inst|m0_1|u_logic|Sh5wx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Ffbwx4~0_combout & (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout & !\soc_inst|m0_1|u_logic|Uaj2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zz8wx4~combout & ( !\soc_inst|m0_1|u_logic|Sh5wx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Ffbwx4~0_combout & !\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ffbwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Zz8wx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cr1wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~2 .lut_mask = 64'h88888080AAAAA0A0;
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y6_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cr1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cr1wx4~0_combout = ( \soc_inst|m0_1|u_logic|Add5~101_sumout & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (\soc_inst|m0_1|u_logic|Qrnvx4~0_combout & (!\soc_inst|m0_1|u_logic|Cr1wx4~3_combout &
+// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout & \soc_inst|m0_1|u_logic|Cr1wx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~101_sumout & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (\soc_inst|m0_1|u_logic|Qrnvx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Cr1wx4~3_combout & \soc_inst|m0_1|u_logic|Cr1wx4~2_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~101_sumout & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Cr1wx4~3_combout &
+// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout & \soc_inst|m0_1|u_logic|Cr1wx4~2_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~101_sumout & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Cr1wx4~3_combout &
+// \soc_inst|m0_1|u_logic|Cr1wx4~2_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Cr1wx4~3_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Cr1wx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Add5~101_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cr1wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~0 .lut_mask = 64'h00CC000C00440004;
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y6_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uozvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uozvx4~1_combout = ( \soc_inst|m0_1|u_logic|J4awx4~0_combout & ( (!\soc_inst|m0_1|u_logic|O3awx4~0_combout & (\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|O3awx4~0_combout &
+// ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|J4awx4~0_combout & ( \soc_inst|m0_1|u_logic|Muawx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|J4awx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Uozvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uozvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uozvx4~1 .lut_mask = 64'h00FF00FF303F303F;
+defparam \soc_inst|m0_1|u_logic|Uozvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y8_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uozvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uozvx4~0_combout = ( \soc_inst|m0_1|u_logic|Uozvx4~1_combout & ( !\soc_inst|m0_1|u_logic|Nozvx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|Uozvx4~1_combout & ( !\soc_inst|m0_1|u_logic|Nozvx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout & !\soc_inst|m0_1|u_logic|Pdi2z4~q )) # (\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Fuawx4~0_combout & ((!\soc_inst|m0_1|u_logic|Pdi2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Uozvx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Nozvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Uozvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uozvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uozvx4~0 .lut_mask = 64'hCE0AFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Uozvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y10_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L9zvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|L9zvx4~0_combout = ( \soc_inst|m0_1|u_logic|Fuawx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Igi2z4~q & \soc_inst|m0_1|u_logic|Rmawx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Igi2z4~q & \soc_inst|m0_1|u_logic|Rmawx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Igi2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|L9zvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L9zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L9zvx4~0 .lut_mask = 64'hAAFAAAFA00F000F0;
+defparam \soc_inst|m0_1|u_logic|L9zvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y10_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L9zvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|L9zvx4~2_combout = (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & ((!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ) # (\soc_inst|m0_1|u_logic|Igi2z4~q )))
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Igi2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|L9zvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L9zvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L9zvx4~2 .lut_mask = 64'hF300F300F300F300;
+defparam \soc_inst|m0_1|u_logic|L9zvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y5_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L9zvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|L9zvx4~1_combout = ( \soc_inst|m0_1|u_logic|O3awx4~0_combout & ( \soc_inst|m0_1|u_logic|Dih2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Muawx4~0_combout & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|O3awx4~0_combout & ( \soc_inst|m0_1|u_logic|Dih2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|O3awx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Dih2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Muawx4~0_combout & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|O3awx4~0_combout & ( !\soc_inst|m0_1|u_logic|Dih2z4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Dih2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|L9zvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L9zvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L9zvx4~1 .lut_mask = 64'hF000F000CC00F000;
+defparam \soc_inst|m0_1|u_logic|L9zvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y8_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L9zvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|L9zvx4~combout = ( \soc_inst|m0_1|u_logic|L9zvx4~1_combout & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout & (!\soc_inst|m0_1|u_logic|L9zvx4~0_combout &
+// ((\soc_inst|m0_1|u_logic|Duc2z4~0_combout )))) # (\soc_inst|m0_1|u_logic|Q8zvx4~0_combout & (((\soc_inst|m0_1|u_logic|L9zvx4~2_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L9zvx4~1_combout & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout & (
+// (\soc_inst|m0_1|u_logic|Q8zvx4~0_combout & \soc_inst|m0_1|u_logic|L9zvx4~2_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|L9zvx4~1_combout & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|L9zvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Q8zvx4~0_combout & ((\soc_inst|m0_1|u_logic|L9zvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L9zvx4~1_combout & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout & (
+// (\soc_inst|m0_1|u_logic|Q8zvx4~0_combout & \soc_inst|m0_1|u_logic|L9zvx4~2_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|L9zvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|L9zvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|L9zvx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|L9zvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L9zvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L9zvx4 .lut_mask = 64'h03038B8B0303038B;
+defparam \soc_inst|m0_1|u_logic|L9zvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y8_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~13 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N88wx4~13_combout = ( \soc_inst|m0_1|u_logic|L9zvx4~combout & ( !\soc_inst|m0_1|u_logic|Luzvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|J61wx4~0_combout & (!\soc_inst|m0_1|u_logic|Xk1wx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Ya1wx4~0_combout & !\soc_inst|m0_1|u_logic|Uozvx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|J61wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Xk1wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ya1wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Uozvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|L9zvx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Luzvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N88wx4~13_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N88wx4~13 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~13 .lut_mask = 64'h0000800000000000;
+defparam \soc_inst|m0_1|u_logic|N88wx4~13 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y6_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z80wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z80wx4~1_combout = (!\soc_inst|m0_1|u_logic|Wzawx4~combout & ((!\soc_inst|m0_1|u_logic|E5awx4~1_combout & (\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|E5awx4~1_combout &
+// ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout & ((!\soc_inst|m0_1|u_logic|E5awx4~1_combout & ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|E5awx4~1_combout &
+// (\soc_inst|m0_1|u_logic|X8zvx4~combout ))))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|E5awx4~1_combout ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z80wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z80wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z80wx4~1 .lut_mask = 64'h271B271B271B271B;
+defparam \soc_inst|m0_1|u_logic|Z80wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y6_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z80wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z80wx4~0_combout = ( \soc_inst|m0_1|u_logic|Z80wx4~1_combout & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout & ( \soc_inst|m0_1|u_logic|N90wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Z80wx4~1_combout & (
+// \soc_inst|m0_1|u_logic|Mgd2z4~0_combout & ( (\soc_inst|m0_1|u_logic|N90wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Fuawx4~0_combout )))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Z80wx4~1_combout & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout & ( \soc_inst|m0_1|u_logic|N90wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Z80wx4~1_combout & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|N90wx4~0_combout & !\soc_inst|m0_1|u_logic|Fuawx4~0_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|N90wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Z80wx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z80wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z80wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z80wx4~0 .lut_mask = 64'h2200333332303333;
+defparam \soc_inst|m0_1|u_logic|Z80wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y6_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~19 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N88wx4~19_combout = ( \soc_inst|m0_1|u_logic|H3awx4~0_combout & ( (!\soc_inst|m0_1|u_logic|O3awx4~0_combout & !\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|H3awx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N88wx4~19_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N88wx4~19 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~19 .lut_mask = 64'h00000000F000F000;
+defparam \soc_inst|m0_1|u_logic|N88wx4~19 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y6_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~21 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N88wx4~21_combout = ( \soc_inst|m0_1|u_logic|Fuawx4~0_combout & ( !\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~0_combout & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout &
+// \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N88wx4~21_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N88wx4~21 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~21 .lut_mask = 64'h00F000F0F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|N88wx4~21 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y6_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~8 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N88wx4~8_combout = ( \soc_inst|m0_1|u_logic|P82wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # ((\soc_inst|m0_1|u_logic|Gdawx4~1_combout &
+// \soc_inst|m0_1|u_logic|Hy0wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Ns9wx4~1_combout & (((!\soc_inst|m0_1|u_logic|Gdawx4~1_combout & \soc_inst|m0_1|u_logic|Hy0wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|P82wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Hy0wx4~0_combout & (!\soc_inst|m0_1|u_logic|Gdawx4~1_combout $ (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Gdawx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N88wx4~8_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N88wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~8 .lut_mask = 64'h00A500A5C3E7C3E7;
+defparam \soc_inst|m0_1|u_logic|N88wx4~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y7_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N88wx4~7_combout = ( \soc_inst|m0_1|u_logic|Oaawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout & (!\soc_inst|m0_1|u_logic|U6awx4~1_combout & (\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ))) #
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout & (((\soc_inst|m0_1|u_logic|U6awx4~1_combout & \soc_inst|m0_1|u_logic|Lf0wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Oaawx4~1_combout & (
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout & (((!\soc_inst|m0_1|u_logic|U6awx4~1_combout & \soc_inst|m0_1|u_logic|Lf0wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout &
+// (\soc_inst|m0_1|u_logic|U6awx4~1_combout & (\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|U6awx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Oaawx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N88wx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N88wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~7 .lut_mask = 64'h09CD09CD093B093B;
+defparam \soc_inst|m0_1|u_logic|N88wx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y6_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~20 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N88wx4~20_combout = ( !\soc_inst|m0_1|u_logic|N88wx4~7_combout & ( (!\soc_inst|m0_1|u_logic|N88wx4~8_combout & ((!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout $
+// (!\soc_inst|m0_1|u_logic|Ejawx4~1_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|N88wx4~8_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ejawx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|N88wx4~7_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N88wx4~20_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N88wx4~20 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~20 .lut_mask = 64'hD0E0D0E000000000;
+defparam \soc_inst|m0_1|u_logic|N88wx4~20 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y6_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~18 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N88wx4~18_combout = ( \soc_inst|m0_1|u_logic|Lk9wx4~1_combout & ( (\soc_inst|m0_1|u_logic|F32wx4~0_combout & \soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Lk9wx4~1_combout & (
+// (\soc_inst|m0_1|u_logic|F32wx4~0_combout & !\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N88wx4~18_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N88wx4~18 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~18 .lut_mask = 64'h5050505005050505;
+defparam \soc_inst|m0_1|u_logic|N88wx4~18 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y6_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~9 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N88wx4~9_combout = ( \soc_inst|m0_1|u_logic|N88wx4~20_combout & ( \soc_inst|m0_1|u_logic|N88wx4~18_combout & ( (\soc_inst|m0_1|u_logic|N88wx4~21_combout & ((!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N88wx4~20_combout & ( \soc_inst|m0_1|u_logic|N88wx4~18_combout & ( (\soc_inst|m0_1|u_logic|N88wx4~21_combout & ((!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|N88wx4~20_combout & ( !\soc_inst|m0_1|u_logic|N88wx4~18_combout & ( (!\soc_inst|m0_1|u_logic|N88wx4~19_combout ) # ((\soc_inst|m0_1|u_logic|N88wx4~21_combout &
+// ((!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N88wx4~20_combout & ( !\soc_inst|m0_1|u_logic|N88wx4~18_combout & ( (\soc_inst|m0_1|u_logic|N88wx4~21_combout &
+// ((!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|N88wx4~19_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|N88wx4~21_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|N88wx4~20_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|N88wx4~18_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N88wx4~9_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N88wx4~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~9 .lut_mask = 64'h00AFCCEF00AF00AF;
+defparam \soc_inst|m0_1|u_logic|N88wx4~9 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y4_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ri0wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ri0wx4~1_combout = ( \soc_inst|m0_1|u_logic|Wzawx4~combout & ( \soc_inst|m0_1|u_logic|M9awx4~1_combout & ( \soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout & (
+// \soc_inst|m0_1|u_logic|M9awx4~1_combout & ( \soc_inst|m0_1|u_logic|Muawx4~0_combout ) ) ) # ( \soc_inst|m0_1|u_logic|Wzawx4~combout & ( !\soc_inst|m0_1|u_logic|M9awx4~1_combout & ( \soc_inst|m0_1|u_logic|Muawx4~0_combout ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Wzawx4~combout & ( !\soc_inst|m0_1|u_logic|M9awx4~1_combout & ( \soc_inst|m0_1|u_logic|X8zvx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|M9awx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ri0wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ri0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ri0wx4~1 .lut_mask = 64'h0F0F333333330F0F;
+defparam \soc_inst|m0_1|u_logic|Ri0wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y7_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ri0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ri0wx4~0_combout = ( \soc_inst|m0_1|u_logic|Ri0wx4~1_combout & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout & ( \soc_inst|m0_1|u_logic|Fj0wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ri0wx4~1_combout & (
+// \soc_inst|m0_1|u_logic|Mgd2z4~0_combout & ( (\soc_inst|m0_1|u_logic|Fj0wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Pdi2z4~q & !\soc_inst|m0_1|u_logic|Fuawx4~0_combout )))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Ri0wx4~1_combout & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout & ( \soc_inst|m0_1|u_logic|Fj0wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ri0wx4~1_combout & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Pdi2z4~q & (!\soc_inst|m0_1|u_logic|Fuawx4~0_combout & \soc_inst|m0_1|u_logic|Fj0wx4~0_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ri0wx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ri0wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ri0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ri0wx4~0 .lut_mask = 64'h008800FF00F800FF;
+defparam \soc_inst|m0_1|u_logic|Ri0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y6_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Znzvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Znzvx4~0_combout = ( \soc_inst|m0_1|u_logic|Nozvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|J4awx4~0_combout ) # (\soc_inst|m0_1|u_logic|O3awx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|J4awx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nozvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Znzvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Znzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Znzvx4~0 .lut_mask = 64'h00000000CFCFCFCF;
+defparam \soc_inst|m0_1|u_logic|Znzvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y7_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G79wx4~0_combout = ( \soc_inst|m0_1|u_logic|Oaawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout & ((!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ) # ((\soc_inst|m0_1|u_logic|U6awx4~1_combout &
+// !\soc_inst|m0_1|u_logic|Lf0wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout & (((!\soc_inst|m0_1|u_logic|U6awx4~1_combout & !\soc_inst|m0_1|u_logic|Lf0wx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Oaawx4~1_combout & (
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout & (((\soc_inst|m0_1|u_logic|U6awx4~1_combout & !\soc_inst|m0_1|u_logic|Lf0wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout & ((!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ) #
+// ((!\soc_inst|m0_1|u_logic|U6awx4~1_combout & !\soc_inst|m0_1|u_logic|Lf0wx4~0_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|U6awx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Oaawx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G79wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G79wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~0 .lut_mask = 64'h3E223E22BC88BC88;
+defparam \soc_inst|m0_1|u_logic|G79wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y6_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G79wx4~2_combout = ( \soc_inst|m0_1|u_logic|Pg1wx4~0_combout & ( \soc_inst|m0_1|u_logic|Lk9wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|F32wx4~0_combout & !\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Pg1wx4~0_combout & ( \soc_inst|m0_1|u_logic|Lk9wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout & ((!\soc_inst|m0_1|u_logic|F32wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ejawx4~1_combout ))) #
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout & ((!\soc_inst|m0_1|u_logic|Ejawx4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Pg1wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Lk9wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|F32wx4~0_combout &
+// \soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pg1wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Lk9wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout & ((\soc_inst|m0_1|u_logic|Ejawx4~1_combout ))) #
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout & ((!\soc_inst|m0_1|u_logic|F32wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ejawx4~1_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ejawx4~1_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G79wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G79wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~2 .lut_mask = 64'h3E3E2222BCBC8888;
+defparam \soc_inst|m0_1|u_logic|G79wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y6_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dv8wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dv8wx4~0_combout = ( \soc_inst|m0_1|u_logic|O3awx4~0_combout & ( \soc_inst|m0_1|u_logic|Hlzvx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|O3awx4~0_combout & ( (!\soc_inst|m0_1|u_logic|H3awx4~0_combout &
+// \soc_inst|m0_1|u_logic|Hlzvx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|H3awx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dv8wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dv8wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dv8wx4~0 .lut_mask = 64'h00F000F000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Dv8wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y6_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G79wx4~1_combout = ( \soc_inst|m0_1|u_logic|Gdawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout & ((!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|P82wx4~0_combout &
+// \soc_inst|m0_1|u_logic|Ns9wx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout & (!\soc_inst|m0_1|u_logic|P82wx4~0_combout & (!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Gdawx4~1_combout & (
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout & (!\soc_inst|m0_1|u_logic|P82wx4~0_combout & (\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout & ((!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ) #
+// ((!\soc_inst|m0_1|u_logic|P82wx4~0_combout & !\soc_inst|m0_1|u_logic|Ns9wx4~1_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Gdawx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G79wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G79wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~1 .lut_mask = 64'h2F282F28F828F828;
+defparam \soc_inst|m0_1|u_logic|G79wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y7_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G79wx4~3_combout = ( !\soc_inst|m0_1|u_logic|Dv8wx4~0_combout & ( !\soc_inst|m0_1|u_logic|G79wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|C8zvx4~0_combout & (!\soc_inst|m0_1|u_logic|Znzvx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|G79wx4~0_combout & !\soc_inst|m0_1|u_logic|G79wx4~2_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|C8zvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Znzvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|G79wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|G79wx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Dv8wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|G79wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G79wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G79wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~3 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|G79wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X53_Y7_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G79wx4~4_combout = ( !\soc_inst|m0_1|u_logic|Qs0wx4~0_combout & ( \soc_inst|m0_1|u_logic|U11wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Wzawx4~combout $ (!\soc_inst|m0_1|u_logic|Ecawx4~1_combout ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Qs0wx4~0_combout & ( !\soc_inst|m0_1|u_logic|U11wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Kfawx4~1_combout $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qs0wx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|U11wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Kfawx4~1_combout & ((\soc_inst|m0_1|u_logic|Ecawx4~1_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # (\soc_inst|m0_1|u_logic|Kfawx4~1_combout &
+// ((!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (!\soc_inst|m0_1|u_logic|Ecawx4~1_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Kfawx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ecawx4~1_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|U11wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G79wx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G79wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~4 .lut_mask = 64'h7E7E66663C3C0000;
+defparam \soc_inst|m0_1|u_logic|G79wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y6_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G79wx4~5_combout = ( \soc_inst|m0_1|u_logic|M9awx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout & ((!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ) # ((\soc_inst|m0_1|u_logic|E5awx4~1_combout &
+// !\soc_inst|m0_1|u_logic|N90wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout & (!\soc_inst|m0_1|u_logic|E5awx4~1_combout & ((!\soc_inst|m0_1|u_logic|N90wx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|M9awx4~1_combout & (
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout & (\soc_inst|m0_1|u_logic|E5awx4~1_combout & ((!\soc_inst|m0_1|u_logic|N90wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout & ((!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ) #
+// ((!\soc_inst|m0_1|u_logic|E5awx4~1_combout & !\soc_inst|m0_1|u_logic|N90wx4~0_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|E5awx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|N90wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|M9awx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G79wx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G79wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~5 .lut_mask = 64'h76507650E6A0E6A0;
+defparam \soc_inst|m0_1|u_logic|G79wx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y10_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G79wx4~6_combout = ( !\soc_inst|m0_1|u_logic|Ra1wx4~0_combout & ( \soc_inst|m0_1|u_logic|Qk1wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ciawx4~1_combout $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Ra1wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Qk1wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Wzawx4~combout $ (!\soc_inst|m0_1|u_logic|R99wx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ra1wx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Qk1wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ciawx4~1_combout & ((\soc_inst|m0_1|u_logic|R99wx4~1_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # (\soc_inst|m0_1|u_logic|Ciawx4~1_combout &
+// ((!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (!\soc_inst|m0_1|u_logic|R99wx4~1_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ciawx4~1_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|R99wx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G79wx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G79wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~6 .lut_mask = 64'h5FFA0FF05A5A0000;
+defparam \soc_inst|m0_1|u_logic|G79wx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y7_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G79wx4~7_combout = ( !\soc_inst|m0_1|u_logic|G79wx4~6_combout & ( !\soc_inst|m0_1|u_logic|O51wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|G79wx4~4_combout & (!\soc_inst|m0_1|u_logic|Qtzvx4~0_combout &
+// !\soc_inst|m0_1|u_logic|G79wx4~5_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|G79wx4~4_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Qtzvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|G79wx4~5_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|G79wx4~6_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|O51wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G79wx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G79wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~7 .lut_mask = 64'hA000000000000000;
+defparam \soc_inst|m0_1|u_logic|G79wx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y9_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~10 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N88wx4~10_combout = ( \soc_inst|m0_1|u_logic|Pdbwx4~combout & ( (\soc_inst|m0_1|u_logic|Htyvx4~3_combout & \soc_inst|m0_1|u_logic|Ht5wx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pdbwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N88wx4~10_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N88wx4~10 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~10 .lut_mask = 64'h0000000005050505;
+defparam \soc_inst|m0_1|u_logic|N88wx4~10 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y6_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ee8wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ee8wx4~3_combout = ( \soc_inst|m0_1|u_logic|Kqzvx4~combout & ( (\soc_inst|m0_1|u_logic|Wa0wx4~combout & (\soc_inst|m0_1|u_logic|R40wx4~combout & \soc_inst|m0_1|u_logic|Uvzvx4~combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wa0wx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Kqzvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ee8wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~3 .lut_mask = 64'h0000000000050005;
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y8_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ee8wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ee8wx4~0_combout = ( \soc_inst|m0_1|u_logic|Hk0wx4~combout & ( \soc_inst|m0_1|u_logic|O7zvx4~combout & ( (\soc_inst|m0_1|u_logic|St0wx4~combout & (\soc_inst|m0_1|u_logic|W21wx4~combout & (\soc_inst|m0_1|u_logic|Yw0wx4~combout
+// & \soc_inst|m0_1|u_logic|S71wx4~combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|St0wx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|W21wx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Yw0wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|S71wx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Hk0wx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|O7zvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ee8wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~0 .lut_mask = 64'h0000000000000001;
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y6_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ee8wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ee8wx4~2_combout = ( \soc_inst|m0_1|u_logic|Hc1wx4~combout & ( \soc_inst|m0_1|u_logic|Nn0wx4~combout & ( (\soc_inst|m0_1|u_logic|Ce0wx4~combout & (\soc_inst|m0_1|u_logic|Gm1wx4~combout & (\soc_inst|m0_1|u_logic|Ze1wx4~combout
+// & \soc_inst|m0_1|u_logic|Z62wx4~combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ce0wx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Gm1wx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ze1wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Z62wx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Hc1wx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Nn0wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ee8wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~2 .lut_mask = 64'h0000000000000001;
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y7_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ee8wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ee8wx4~1_combout = ( \soc_inst|m0_1|u_logic|Ee8wx4~0_combout & ( \soc_inst|m0_1|u_logic|Ee8wx4~2_combout & ( (\soc_inst|m0_1|u_logic|Zhyvx4~combout & (\soc_inst|m0_1|u_logic|P12wx4~combout &
+// (\soc_inst|m0_1|u_logic|Djzvx4~combout & \soc_inst|m0_1|u_logic|Ee8wx4~3_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|P12wx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Djzvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ee8wx4~3_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ee8wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ee8wx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ee8wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~1 .lut_mask = 64'h0000000000000001;
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y7_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~11 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N88wx4~11_combout = ( \soc_inst|m0_1|u_logic|N88wx4~10_combout & ( \soc_inst|m0_1|u_logic|Ee8wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # ((\soc_inst|m0_1|u_logic|G79wx4~3_combout &
+// \soc_inst|m0_1|u_logic|G79wx4~7_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|N88wx4~10_combout & ( \soc_inst|m0_1|u_logic|Ee8wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) #
+// ((\soc_inst|m0_1|u_logic|G79wx4~3_combout & \soc_inst|m0_1|u_logic|G79wx4~7_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|N88wx4~10_combout & ( !\soc_inst|m0_1|u_logic|Ee8wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # ((\soc_inst|m0_1|u_logic|G79wx4~3_combout & \soc_inst|m0_1|u_logic|G79wx4~7_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N88wx4~10_combout & ( !\soc_inst|m0_1|u_logic|Ee8wx4~1_combout & (
+// (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # ((\soc_inst|m0_1|u_logic|G79wx4~3_combout & \soc_inst|m0_1|u_logic|G79wx4~7_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|G79wx4~3_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|G79wx4~7_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|N88wx4~10_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ee8wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N88wx4~11_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N88wx4~11 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~11 .lut_mask = 64'h888A888A888ACCCF;
+defparam \soc_inst|m0_1|u_logic|N88wx4~11 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y7_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~12 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N88wx4~12_combout = ( !\soc_inst|m0_1|u_logic|Ri0wx4~0_combout & ( \soc_inst|m0_1|u_logic|N88wx4~11_combout & ( (!\soc_inst|m0_1|u_logic|G11wx4~0_combout & (!\soc_inst|m0_1|u_logic|Z80wx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Cs0wx4~0_combout & \soc_inst|m0_1|u_logic|N88wx4~9_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|G11wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Z80wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Cs0wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|N88wx4~9_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ri0wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|N88wx4~11_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N88wx4~12_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N88wx4~12 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~12 .lut_mask = 64'h0000000000800000;
+defparam \soc_inst|m0_1|u_logic|N88wx4~12 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y14_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nyawx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nyawx4~0_combout = ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout & ( ((\soc_inst|m0_1|u_logic|E1bvx4~combout & \soc_inst|m0_1|u_logic|X8zvx4~combout )) #
+// (\soc_inst|m0_1|u_logic|Oxnvx4~3_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|E1bvx4~combout & (\soc_inst|m0_1|u_logic|Oxnvx4~3_combout &
+// ((\soc_inst|m0_1|u_logic|X8zvx4~combout )))) # (\soc_inst|m0_1|u_logic|E1bvx4~combout & ((!\soc_inst|m0_1|u_logic|Oxnvx4~3_combout & ((\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Oxnvx4~3_combout &
+// (\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ( (\soc_inst|m0_1|u_logic|E1bvx4~combout & \soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ( (\soc_inst|m0_1|u_logic|E1bvx4~combout & \soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|E1bvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Oxnvx4~3_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nyawx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nyawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nyawx4~0 .lut_mask = 64'h0055005501673377;
+defparam \soc_inst|m0_1|u_logic|Nyawx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y7_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~17 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N88wx4~17_combout = ( \soc_inst|m0_1|u_logic|N88wx4~12_combout & ( !\soc_inst|m0_1|u_logic|Nyawx4~0_combout & ( (\soc_inst|m0_1|u_logic|J00wx4~1_combout & (\soc_inst|m0_1|u_logic|Cr1wx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|G5qvx4~0_combout & \soc_inst|m0_1|u_logic|N88wx4~13_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|J00wx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Cr1wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|G5qvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|N88wx4~13_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|N88wx4~12_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Nyawx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N88wx4~17_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N88wx4~17 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~17 .lut_mask = 64'h0000001000000000;
+defparam \soc_inst|m0_1|u_logic|N88wx4~17 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y10_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wccwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wccwx4~0_combout = ( \soc_inst|m0_1|u_logic|Ydcwx4~0_combout & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Mpnvx4~0_combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) #
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ydcwx4~0_combout & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Mpnvx4~0_combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) #
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ydcwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Mpnvx4~0_combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) #
+// ((\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|Mpnvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout &
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ydcwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Mpnvx4~0_combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) #
+// ((!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|Mpnvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout &
+// ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mpnvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ydcwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wccwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wccwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wccwx4~0 .lut_mask = 64'hEED8D8EEAA8888AA;
+defparam \soc_inst|m0_1|u_logic|Wccwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y10_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fyzvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fyzvx4~0_combout = ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Eo5wx4~2_combout & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & ((!\soc_inst|m0_1|u_logic|Zz8wx4~combout ) #
+// (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & ((!\soc_inst|m0_1|u_logic|Zz8wx4~combout ) # (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Zz8wx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fyzvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fyzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fyzvx4~0 .lut_mask = 64'hF0C05040F0C05040;
+defparam \soc_inst|m0_1|u_logic|Fyzvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y10_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N88wx4~1_combout = ( \soc_inst|m0_1|u_logic|Fyzvx4~0_combout & ( \soc_inst|m0_1|u_logic|Add5~105_sumout & ( (\soc_inst|m0_1|u_logic|Do1wx4~0_combout & (\soc_inst|m0_1|u_logic|Wccwx4~0_combout &
+// \soc_inst|m0_1|u_logic|Lhyvx4~2_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Fyzvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Add5~105_sumout & ( (\soc_inst|m0_1|u_logic|Do1wx4~0_combout & (\soc_inst|m0_1|u_logic|Wccwx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Add5~109_sumout ) # (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Do1wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Wccwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Add5~109_sumout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Fyzvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~105_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N88wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N88wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~1 .lut_mask = 64'h0000101100000011;
+defparam \soc_inst|m0_1|u_logic|N88wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y7_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~14 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N88wx4~14_combout = ( \soc_inst|m0_1|u_logic|N88wx4~1_combout & ( \soc_inst|m0_1|u_logic|Mdzvx4~1_combout & ( (\soc_inst|m0_1|u_logic|Qppvx4~1_combout & (\soc_inst|m0_1|u_logic|N88wx4~6_combout &
+// (\soc_inst|m0_1|u_logic|Cfzvx4~0_combout & \soc_inst|m0_1|u_logic|N88wx4~17_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qppvx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|N88wx4~6_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Cfzvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|N88wx4~17_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|N88wx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mdzvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N88wx4~14_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N88wx4~14 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~14 .lut_mask = 64'h0000000000000001;
+defparam \soc_inst|m0_1|u_logic|N88wx4~14 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y7_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~16 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N88wx4~16_combout = ( \soc_inst|m0_1|u_logic|N88wx4~14_combout & ( (\soc_inst|m0_1|u_logic|N88wx4~15_combout & (((\soc_inst|m0_1|u_logic|Do8wx4~4_combout & \soc_inst|m0_1|u_logic|N88wx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Do8wx4~4_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|N88wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|N88wx4~15_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|N88wx4~14_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N88wx4~16_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N88wx4~16 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~16 .lut_mask = 64'h0000000000570057;
+defparam \soc_inst|m0_1|u_logic|N88wx4~16 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y7_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z78wx4~7_combout = ( !\soc_inst|m0_1|u_logic|Z78wx4~6_combout & ( \soc_inst|m0_1|u_logic|N88wx4~16_combout & ( !\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ) ) ) # ( \soc_inst|m0_1|u_logic|Z78wx4~6_combout & (
+// !\soc_inst|m0_1|u_logic|N88wx4~16_combout & ( \soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Z78wx4~6_combout & ( !\soc_inst|m0_1|u_logic|N88wx4~16_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Z78wx4~6_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|N88wx4~16_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z78wx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z78wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~7 .lut_mask = 64'hFFFF5555AAAA0000;
+defparam \soc_inst|m0_1|u_logic|Z78wx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y7_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S9zvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S9zvx4~0_combout = ( \soc_inst|m0_1|u_logic|O7zvx4~combout & ( \soc_inst|m0_1|u_logic|Z78wx4~7_combout & ( ((\soc_inst|m0_1|u_logic|E9zvx4~1_combout & !\soc_inst|m0_1|u_logic|R7iwx4~1_combout )) #
+// (\soc_inst|m0_1|u_logic|X4pvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|O7zvx4~combout & ( \soc_inst|m0_1|u_logic|Z78wx4~7_combout & ( (\soc_inst|m0_1|u_logic|K0qvx4~combout & (((\soc_inst|m0_1|u_logic|E9zvx4~1_combout &
+// !\soc_inst|m0_1|u_logic|R7iwx4~1_combout )) # (\soc_inst|m0_1|u_logic|X4pvx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|O7zvx4~combout & ( !\soc_inst|m0_1|u_logic|Z78wx4~7_combout & ( (!\soc_inst|m0_1|u_logic|X4pvx4~combout &
+// (((\soc_inst|m0_1|u_logic|E9zvx4~1_combout & !\soc_inst|m0_1|u_logic|R7iwx4~1_combout )))) # (\soc_inst|m0_1|u_logic|X4pvx4~combout & (!\soc_inst|m0_1|u_logic|K0qvx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|O7zvx4~combout & (
+// !\soc_inst|m0_1|u_logic|Z78wx4~7_combout & ( (\soc_inst|m0_1|u_logic|K0qvx4~combout & (\soc_inst|m0_1|u_logic|E9zvx4~1_combout & (!\soc_inst|m0_1|u_logic|R7iwx4~1_combout & !\soc_inst|m0_1|u_logic|X4pvx4~combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|K0qvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|E9zvx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|O7zvx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Z78wx4~7_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S9zvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S9zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S9zvx4~0 .lut_mask = 64'h100030AA105530FF;
+defparam \soc_inst|m0_1|u_logic|S9zvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R38wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R38wx4~0_combout = ( \soc_inst|m0_1|u_logic|Ffj2z4~q & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ))))
+// ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~q & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # ((\soc_inst|m0_1|u_logic|Npk2z4~q ) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R38wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R38wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R38wx4~0 .lut_mask = 64'h8AAA8AAAAA8AAA8A;
+defparam \soc_inst|m0_1|u_logic|R38wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R38wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R38wx4~1_combout = ( !\soc_inst|m0_1|u_logic|R38wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|X77wx4~combout & (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|X77wx4~combout &
+// ((!\soc_inst|m0_1|u_logic|Aok2z4~q & ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Aok2z4~q & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|R38wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R38wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R38wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R38wx4~1 .lut_mask = 64'hAEA3AEA300000000;
+defparam \soc_inst|m0_1|u_logic|R38wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y11_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qb3wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qb3wx4~combout = ( \soc_inst|m0_1|u_logic|Ucqvx4~combout & ( (!\soc_inst|m0_1|u_logic|Op2wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Tki2z4~q ) # ((\soc_inst|m0_1|u_logic|R38wx4~1_combout & !\soc_inst|m0_1|u_logic|Hw2wx4~0_combout
+// )))) ) ) # ( !\soc_inst|m0_1|u_logic|Ucqvx4~combout & ( (!\soc_inst|m0_1|u_logic|Op2wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Tki2z4~q ) # (\soc_inst|m0_1|u_logic|R38wx4~1_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|R38wx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Op2wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qb3wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qb3wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qb3wx4 .lut_mask = 64'hB0B0B0B0B0A0B0A0;
+defparam \soc_inst|m0_1|u_logic|Qb3wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z9zvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z9zvx4~0_combout = ( \soc_inst|m0_1|u_logic|Wspvx4~combout & ( (\soc_inst|interconnect_1|HREADY~0_combout & !\soc_inst|m0_1|u_logic|Qb3wx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Wspvx4~combout & (
+// \soc_inst|interconnect_1|HREADY~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qb3wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wspvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z9zvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z9zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z9zvx4~0 .lut_mask = 64'h0F0F0F0F0F000F00;
+defparam \soc_inst|m0_1|u_logic|Z9zvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X36_Y7_N14
+dffeas \soc_inst|m0_1|u_logic|Igi2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|S9zvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Z9zvx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Igi2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Igi2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Igi2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X31_Y5_N59
+dffeas \soc_inst|m0_1|u_logic|Rhi2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Velvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rhi2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rhi2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rhi2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y12_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~1_sumout = SUM(( !\soc_inst|m0_1|u_logic|Omk2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~14 ))
+// \soc_inst|m0_1|u_logic|Add2~2 = CARRY(( !\soc_inst|m0_1|u_logic|Omk2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~14 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Omk2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add2~14 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add2~1_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add2~2 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~1 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y12_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tvhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tvhvx4~0_combout = (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & (\soc_inst|m0_1|u_logic|S5pvx4~combout & (\soc_inst|m0_1|u_logic|Add2~1_sumout ))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & (((!\soc_inst|m0_1|u_logic|Omk2z4~q
+// ))))
+
+ .dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Add2~1_sumout ),
+ .datad(!\soc_inst|m0_1|u_logic|Omk2z4~q ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tvhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tvhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tvhvx4~0 .lut_mask = 64'h3704370437043704;
+defparam \soc_inst|m0_1|u_logic|Tvhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tvhvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tvhvx4~1_combout = ( \soc_inst|m0_1|u_logic|Add5~9_sumout & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout & (!\soc_inst|m0_1|u_logic|Xdfwx4~combout & !\soc_inst|m0_1|u_logic|Tvhvx4~0_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Add5~9_sumout & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout & !\soc_inst|m0_1|u_logic|Tvhvx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Tvhvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~9_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tvhvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tvhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tvhvx4~1 .lut_mask = 64'hCC00CC00C000C000;
+defparam \soc_inst|m0_1|u_logic|Tvhvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y12_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tvhvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tvhvx4~2_combout = ( \soc_inst|m0_1|u_logic|Tvhvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((\soc_inst|m0_1|u_logic|E9zvx4~1_combout & !\soc_inst|m0_1|u_logic|R7iwx4~1_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|E9zvx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Tvhvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tvhvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tvhvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tvhvx4~2 .lut_mask = 64'h00000000F3F0F3F0;
+defparam \soc_inst|m0_1|u_logic|Tvhvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y12_N4
+dffeas \soc_inst|m0_1|u_logic|Omk2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Tvhvx4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Omk2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Omk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Omk2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y5_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Velvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Velvx4~0_combout = ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout & ( (\soc_inst|m0_1|u_logic|Orewx4~0_combout & !\soc_inst|m0_1|u_logic|Omk2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout & ( !\soc_inst|m0_1|u_logic|Rhi2z4~q
+// ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Rhi2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Omk2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Velvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Velvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Velvx4~0 .lut_mask = 64'hF0F0F0F055005500;
+defparam \soc_inst|m0_1|u_logic|Velvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y5_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Velvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Velvx4~1_combout = ( !\soc_inst|m0_1|u_logic|Velvx4~0_combout & ( \soc_inst|m0_1|u_logic|haddr_o~1_combout & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout & ((!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Igi2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Velvx4~0_combout & ( !\soc_inst|m0_1|u_logic|haddr_o~1_combout & ( (!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Igi2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Igi2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Velvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Velvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Velvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Velvx4~1 .lut_mask = 64'hF5F50000C4C40000;
+defparam \soc_inst|m0_1|u_logic|Velvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y5_N58
+dffeas \soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Velvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y5_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vr23z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vr23z4~feeder_combout = ( \soc_inst|m0_1|u_logic|F6zvx4~1_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vr23z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vr23z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vr23z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Vr23z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X51_Y5_N17
+dffeas \soc_inst|m0_1|u_logic|Vr23z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Vr23z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Vr23z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vr23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vr23z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X51_Y7_N22
+dffeas \soc_inst|m0_1|u_logic|Mi13z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Mi13z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mi13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mi13z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y5_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ec62z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ec62z4~1_combout = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|Mi13z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Vr23z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vr23z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Mi13z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ec62z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ec62z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ec62z4~1 .lut_mask = 64'h3022000000000000;
+defparam \soc_inst|m0_1|u_logic|Ec62z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y5_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Na53z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Na53z4~feeder_combout = ( \soc_inst|m0_1|u_logic|F6zvx4~1_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Na53z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Na53z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Na53z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Na53z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X51_Y5_N8
+dffeas \soc_inst|m0_1|u_logic|Na53z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Na53z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Na53z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Na53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Na53z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y5_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E143z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|E143z4~feeder_combout = ( \soc_inst|m0_1|u_logic|F6zvx4~1_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|E143z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E143z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E143z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|E143z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X51_Y5_N29
+dffeas \soc_inst|m0_1|u_logic|E143z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|E143z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|E143z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E143z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|E143z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y5_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ec62z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ec62z4~0_combout = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Na53z4~q & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) #
+// ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|E143z4~q & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Na53z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|E143z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ec62z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ec62z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ec62z4~0 .lut_mask = 64'h000000A000000088;
+defparam \soc_inst|m0_1|u_logic|Ec62z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y5_N20
+dffeas \soc_inst|m0_1|u_logic|N8i3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|N8i3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N8i3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|N8i3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y5_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Be62z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Be62z4~0_combout = ( !\soc_inst|m0_1|u_logic|Sjj2z4~q & ( !\soc_inst|m0_1|u_logic|N8i3z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|M1j2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|N8i3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Be62z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Be62z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Be62z4~0 .lut_mask = 64'h0020000000000000;
+defparam \soc_inst|m0_1|u_logic|Be62z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X50_Y5_N26
+dffeas \soc_inst|m0_1|u_logic|Cai3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Cai3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cai3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cai3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y5_N17
+dffeas \soc_inst|m0_1|u_logic|J5i3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|J5i3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J5i3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J5i3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y5_N28
+dffeas \soc_inst|m0_1|u_logic|Y6i3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Y6i3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y6i3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y6i3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y5_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ec62z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ec62z4~2_combout = ( !\soc_inst|m0_1|u_logic|J5i3z4~q & ( \soc_inst|m0_1|u_logic|Y6i3z4~q & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|J5i3z4~q & ( !\soc_inst|m0_1|u_logic|Y6i3z4~q & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|J5i3z4~q & ( !\soc_inst|m0_1|u_logic|Y6i3z4~q & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|J5i3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Y6i3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ec62z4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ec62z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ec62z4~2 .lut_mask = 64'h5000400010000000;
+defparam \soc_inst|m0_1|u_logic|Ec62z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y5_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ec62z4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ec62z4~3_combout = ( !\soc_inst|m0_1|u_logic|Ec62z4~2_combout & ( \soc_inst|m0_1|u_logic|Ue9wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ec62z4~1_combout & (!\soc_inst|m0_1|u_logic|Ec62z4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Be62z4~0_combout & \soc_inst|m0_1|u_logic|Cai3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ec62z4~2_combout & ( !\soc_inst|m0_1|u_logic|Ue9wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ec62z4~1_combout &
+// (!\soc_inst|m0_1|u_logic|Ec62z4~0_combout & !\soc_inst|m0_1|u_logic|Be62z4~0_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ec62z4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ec62z4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Be62z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Cai3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ec62z4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ec62z4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ec62z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ec62z4~3 .lut_mask = 64'h8080000000800000;
+defparam \soc_inst|m0_1|u_logic|Ec62z4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y5_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q8zvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q8zvx4~0_combout = ( \soc_inst|m0_1|u_logic|Ec62z4~3_combout & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (\soc_inst|m0_1|u_logic|Cqo2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((\soc_inst|m0_1|u_logic|Saqwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ec62z4~3_combout & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (\soc_inst|m0_1|u_logic|Cqo2z4~q &
+// !\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ec62z4~3_combout & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (\soc_inst|m0_1|u_logic|Cqo2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ec62z4~3_combout & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// (\soc_inst|m0_1|u_logic|Cqo2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Cqo2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Saqwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ec62z4~3_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q8zvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q8zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q8zvx4~0 .lut_mask = 64'h553355335500550F;
+defparam \soc_inst|m0_1|u_logic|Q8zvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y5_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C8zvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C8zvx4~0_combout = ( \soc_inst|m0_1|u_logic|O3awx4~0_combout & ( \soc_inst|m0_1|u_logic|Dih2z4~0_combout & ( \soc_inst|m0_1|u_logic|Q8zvx4~0_combout ) ) ) # ( \soc_inst|m0_1|u_logic|O3awx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Dih2z4~0_combout & ( \soc_inst|m0_1|u_logic|Q8zvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|O3awx4~0_combout & ( !\soc_inst|m0_1|u_logic|Dih2z4~0_combout & ( \soc_inst|m0_1|u_logic|Q8zvx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Dih2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C8zvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C8zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C8zvx4~0 .lut_mask = 64'h3333333300003333;
+defparam \soc_inst|m0_1|u_logic|C8zvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y7_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F6zvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|F6zvx4~0_combout = ( \soc_inst|m0_1|u_logic|C8zvx4~0_combout & ( \soc_inst|m0_1|u_logic|L9zvx4~combout & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|O7zvx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C8zvx4~0_combout & ( \soc_inst|m0_1|u_logic|L9zvx4~combout & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|O7zvx4~combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|O7zvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|C8zvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|L9zvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|F6zvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F6zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F6zvx4~0 .lut_mask = 64'h00000000F0FFA0AA;
+defparam \soc_inst|m0_1|u_logic|F6zvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y7_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F6zvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|F6zvx4~1_combout = ( \soc_inst|m0_1|u_logic|Add5~9_sumout & ( !\soc_inst|m0_1|u_logic|R7iwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout & (\soc_inst|m0_1|u_logic|F6zvx4~0_combout &
+// \soc_inst|m0_1|u_logic|E9zvx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~9_sumout & ( !\soc_inst|m0_1|u_logic|R7iwx4~1_combout & ( (\soc_inst|m0_1|u_logic|F6zvx4~0_combout & \soc_inst|m0_1|u_logic|E9zvx4~1_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|F6zvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|E9zvx4~1_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Add5~9_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F6zvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F6zvx4~1 .lut_mask = 64'h0303010100000000;
+defparam \soc_inst|m0_1|u_logic|F6zvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y5_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ft73z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ft73z4~feeder_combout = ( \soc_inst|m0_1|u_logic|F6zvx4~1_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ft73z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ft73z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ft73z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ft73z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X50_Y5_N38
+dffeas \soc_inst|m0_1|u_logic|Ft73z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Ft73z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ft73z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ft73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ft73z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y5_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O7zvx4~2_combout = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|T1d3z4~q & ( (!\soc_inst|m0_1|u_logic|Rro2z4~q & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) ) #
+// ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( (!\soc_inst|m0_1|u_logic|E143z4~q & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|E143z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Rro2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|O7zvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O7zvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~2 .lut_mask = 64'h000A0000000C0000;
+defparam \soc_inst|m0_1|u_logic|O7zvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X50_Y7_N20
+dffeas \soc_inst|m0_1|u_logic|Gto2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Gto2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gto2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gto2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y5_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O7zvx4~4_combout = ( \soc_inst|m0_1|u_logic|H3d3z4~q & ( \soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Gto2z4~q &
+// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~q & ( !\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q &
+// (!\soc_inst|m0_1|u_logic|Gto2z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~q & ( !\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q & (
+// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Gto2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|O7zvx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O7zvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~4 .lut_mask = 64'hA000008000000080;
+defparam \soc_inst|m0_1|u_logic|O7zvx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y7_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O7zvx4~1_combout = ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Mi13z4~q & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
+// # ( \soc_inst|m0_1|u_logic|T1d3z4~q & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Vuo2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Mi13z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Vuo2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|O7zvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O7zvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~1 .lut_mask = 64'h0000A00080800000;
+defparam \soc_inst|m0_1|u_logic|O7zvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y5_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O7zvx4~3_combout = ( \soc_inst|m0_1|u_logic|H3d3z4~q & ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Na53z4~q & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) ) #
+// ( !\soc_inst|m0_1|u_logic|H3d3z4~q & ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Vr23z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Na53z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Vr23z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|O7zvx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O7zvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~3 .lut_mask = 64'h0500040400000000;
+defparam \soc_inst|m0_1|u_logic|O7zvx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y5_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O7zvx4~5_combout = ( !\soc_inst|m0_1|u_logic|Y6i3z4~q & ( \soc_inst|m0_1|u_logic|J5i3z4~q & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Y6i3z4~q & ( !\soc_inst|m0_1|u_logic|J5i3z4~q & ( (\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y6i3z4~q & ( !\soc_inst|m0_1|u_logic|J5i3z4~q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Y6i3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|J5i3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|O7zvx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O7zvx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~5 .lut_mask = 64'h0C00040008000000;
+defparam \soc_inst|m0_1|u_logic|O7zvx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y5_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O7zvx4~6_combout = ( !\soc_inst|m0_1|u_logic|O7zvx4~3_combout & ( !\soc_inst|m0_1|u_logic|O7zvx4~5_combout & ( (!\soc_inst|m0_1|u_logic|O7zvx4~2_combout & (!\soc_inst|m0_1|u_logic|O7zvx4~4_combout &
+// !\soc_inst|m0_1|u_logic|O7zvx4~1_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O7zvx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|O7zvx4~4_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|O7zvx4~1_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|O7zvx4~3_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|O7zvx4~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|O7zvx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O7zvx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~6 .lut_mask = 64'h8080000000000000;
+defparam \soc_inst|m0_1|u_logic|O7zvx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y5_N19
+dffeas \soc_inst|m0_1|u_logic|N8i3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|N8i3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N8i3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|N8i3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X50_Y7_N41
+dffeas \soc_inst|m0_1|u_logic|Uu83z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Uu83z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uu83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uu83z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y5_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O7zvx4~7_combout = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Uu83z4~q & \soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) ) #
+// ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Wj63z4~q & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wj63z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Uu83z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|O7zvx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O7zvx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~7 .lut_mask = 64'h0000000044000050;
+defparam \soc_inst|m0_1|u_logic|O7zvx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y5_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~8 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O7zvx4~8_combout = ( \soc_inst|m0_1|u_logic|C51xx4~0_combout & ( !\soc_inst|m0_1|u_logic|O7zvx4~7_combout & ( (\soc_inst|m0_1|u_logic|N8i3z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Cai3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout & ( !\soc_inst|m0_1|u_logic|O7zvx4~7_combout & ( (!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cai3z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Cai3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|N8i3z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|O7zvx4~7_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|O7zvx4~8_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O7zvx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~8 .lut_mask = 64'hF5F5313100000000;
+defparam \soc_inst|m0_1|u_logic|O7zvx4~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y5_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O7zvx4~0_combout = ( \soc_inst|m0_1|u_logic|R91xx4~0_combout & ( \soc_inst|m0_1|u_logic|Wnt2z4~q & ( !\soc_inst|m0_1|u_logic|Fxu2z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|R91xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Wnt2z4~q & (
+// (!\soc_inst|m0_1|u_logic|Fxu2z4~q ) # (\soc_inst|m0_1|u_logic|T31xx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|R91xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Wnt2z4~q & ( \soc_inst|m0_1|u_logic|T31xx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fxu2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|T31xx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|R91xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wnt2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|O7zvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O7zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~0 .lut_mask = 64'h0F0FAFAF0000AAAA;
+defparam \soc_inst|m0_1|u_logic|O7zvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y5_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O7zvx4~combout = ( \soc_inst|m0_1|u_logic|S61xx4~0_combout & ( !\soc_inst|m0_1|u_logic|O7zvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Ft73z4~q & (\soc_inst|m0_1|u_logic|O7zvx4~6_combout & \soc_inst|m0_1|u_logic|O7zvx4~8_combout
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout & ( !\soc_inst|m0_1|u_logic|O7zvx4~0_combout & ( (\soc_inst|m0_1|u_logic|O7zvx4~6_combout & \soc_inst|m0_1|u_logic|O7zvx4~8_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ft73z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|O7zvx4~6_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|O7zvx4~8_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|O7zvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|O7zvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O7zvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4 .lut_mask = 64'h000F000500000000;
+defparam \soc_inst|m0_1|u_logic|O7zvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y12_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hwdata_o~2_combout = ( \soc_inst|m0_1|u_logic|S71wx4~combout & ( \soc_inst|m0_1|u_logic|Uvzvx4~combout & ( (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout & (!\soc_inst|m0_1|u_logic|O7zvx4~combout & \soc_inst|m0_1|u_logic|Y9t2z4~q ))
+// ) ) ) # ( !\soc_inst|m0_1|u_logic|S71wx4~combout & ( \soc_inst|m0_1|u_logic|Uvzvx4~combout & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q & ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout & ((!\soc_inst|m0_1|u_logic|O7zvx4~combout ))) #
+// (\soc_inst|m0_1|u_logic|Qr42z4~1_combout & (!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|S71wx4~combout & ( !\soc_inst|m0_1|u_logic|Uvzvx4~combout & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q &
+// ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout & ((!\soc_inst|m0_1|u_logic|O7zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout & (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S71wx4~combout & (
+// !\soc_inst|m0_1|u_logic|Uvzvx4~combout & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q & ((!\soc_inst|m0_1|u_logic|O7zvx4~combout ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|O7zvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|S71wx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hwdata_o~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~2 .lut_mask = 64'h00F300D100E200C0;
+defparam \soc_inst|m0_1|u_logic|hwdata_o~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y10_N14
+dffeas \soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|I2uvx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y10_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tyywx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tyywx4~0_combout = ( \soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|X9n2z4~q ) # (\soc_inst|m0_1|u_logic|S4pwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q & (
+// (!\soc_inst|m0_1|u_logic|S4pwx4~0_combout & \soc_inst|m0_1|u_logic|X9n2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|X9n2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tyywx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tyywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tyywx4~0 .lut_mask = 64'h00F000F00FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Tyywx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y10_N13
+dffeas \soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|I2uvx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X23_Y10_N35
+dffeas \soc_inst|m0_1|u_logic|Uqi2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|W2uvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Uqi2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uqi2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uqi2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y10_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hzywx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hzywx4~0_combout = ( \soc_inst|m0_1|u_logic|Uqi2z4~q & ( (!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ) # (\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Uqi2z4~q & (
+// (\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|S4pwx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Uqi2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hzywx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hzywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hzywx4~0 .lut_mask = 64'h000F000FFF0FFF0F;
+defparam \soc_inst|m0_1|u_logic|Hzywx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y8_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~18 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hwdata_o~18_combout = ( \soc_inst|m0_1|u_logic|Kqzvx4~combout & ( \soc_inst|m0_1|u_logic|Htyvx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Vf5wx4~8_combout & (\soc_inst|m0_1|u_logic|Qr42z4~1_combout &
+// (!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout & \soc_inst|m0_1|u_logic|Y9t2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kqzvx4~combout & ( \soc_inst|m0_1|u_logic|Htyvx4~3_combout & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q &
+// ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Vf5wx4~8_combout & !\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kqzvx4~combout & ( !\soc_inst|m0_1|u_logic|Htyvx4~3_combout & (
+// (\soc_inst|m0_1|u_logic|Qr42z4~1_combout & (\soc_inst|m0_1|u_logic|Y9t2z4~q & ((!\soc_inst|m0_1|u_logic|Vf5wx4~8_combout ) # (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kqzvx4~combout & (
+// !\soc_inst|m0_1|u_logic|Htyvx4~3_combout & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q & ((!\soc_inst|m0_1|u_logic|Vf5wx4~8_combout ) # ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vf5wx4~8_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Kqzvx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hwdata_o~18_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hwdata_o~18 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~18 .lut_mask = 64'h00EF002300EC0020;
+defparam \soc_inst|m0_1|u_logic|hwdata_o~18 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y9_N2
+dffeas \soc_inst|m0_1|u_logic|Hzj2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|M5mvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Hzj2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hzj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hzj2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y9_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M5mvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|M5mvx4~0_combout = ( \soc_inst|m0_1|u_logic|Sta2z4~0_combout & ( (\soc_inst|m0_1|u_logic|Hzj2z4~q & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Uaj2z4~q ) # (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q
+// )))) ) ) # ( !\soc_inst|m0_1|u_logic|Sta2z4~0_combout & ( \soc_inst|m0_1|u_logic|Hzj2z4~q ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Hzj2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|M5mvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M5mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M5mvx4~0 .lut_mask = 64'h00FF00FF00EF00EF;
+defparam \soc_inst|m0_1|u_logic|M5mvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y9_N35
+dffeas \soc_inst|m0_1|u_logic|S5b3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o [1]),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|T5tvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|S5b3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S5b3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|S5b3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y8_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~10 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hwdata_o~10_combout = ( \soc_inst|m0_1|u_logic|Djzvx4~combout & ( \soc_inst|m0_1|u_logic|Zh5wx4~9_combout & ( (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout & (\soc_inst|m0_1|u_logic|Y9t2z4~q &
+// (!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout & \soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Djzvx4~combout & ( \soc_inst|m0_1|u_logic|Zh5wx4~9_combout & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q &
+// ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # ((\soc_inst|m0_1|u_logic|Hdh2z4~1_combout & !\soc_inst|m0_1|u_logic|Sh5wx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Djzvx4~combout & ( !\soc_inst|m0_1|u_logic|Zh5wx4~9_combout & (
+// (\soc_inst|m0_1|u_logic|Y9t2z4~q & (\soc_inst|m0_1|u_logic|Qr42z4~1_combout & ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ) # (!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Djzvx4~combout & (
+// !\soc_inst|m0_1|u_logic|Zh5wx4~9_combout & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q & ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Djzvx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Zh5wx4~9_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hwdata_o~10_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hwdata_o~10 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~10 .lut_mask = 64'h3332003233100010;
+defparam \soc_inst|m0_1|u_logic|hwdata_o~10 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y9_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ynvvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ynvvx4~combout = ( \soc_inst|m0_1|u_logic|hwdata_o~10_combout & ( (!\soc_inst|m0_1|u_logic|K3l2z4~q & (\soc_inst|m0_1|u_logic|R3uvx4~0_combout & (\soc_inst|m0_1|u_logic|S5b3z4~q ))) # (\soc_inst|m0_1|u_logic|K3l2z4~q &
+// (((\soc_inst|m0_1|u_logic|R3uvx4~0_combout & \soc_inst|m0_1|u_logic|S5b3z4~q )) # (\soc_inst|m0_1|u_logic|Wfuwx4~combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o~10_combout & ( (\soc_inst|m0_1|u_logic|R3uvx4~0_combout &
+// \soc_inst|m0_1|u_logic|S5b3z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|R3uvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|S5b3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o~10_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ynvvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ynvvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ynvvx4 .lut_mask = 64'h0303030303570357;
+defparam \soc_inst|m0_1|u_logic|Ynvvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y9_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M5mvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|M5mvx4~1_combout = ( \soc_inst|m0_1|u_logic|Ynvvx4~combout ) # ( !\soc_inst|m0_1|u_logic|Ynvvx4~combout & ( (\soc_inst|m0_1|u_logic|M5mvx4~0_combout & ((!\soc_inst|m0_1|u_logic|hwdata_o~18_combout ) #
+// ((!\soc_inst|m0_1|u_logic|K3l2z4~q ) # (!\soc_inst|m0_1|u_logic|Wfuwx4~combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|hwdata_o~18_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|M5mvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ynvvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|M5mvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M5mvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M5mvx4~1 .lut_mask = 64'h33323332FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|M5mvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y9_N1
+dffeas \soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|M5mvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X28_Y13_N11
+dffeas \soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Y1ivx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y13_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bec3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bec3z4~0_combout = ( \soc_inst|m0_1|u_logic|Zyovx4~combout & ( (!\soc_inst|m0_1|u_logic|hwdata_o [2] & ((\soc_inst|m0_1|u_logic|Bec3z4~q ))) # (\soc_inst|m0_1|u_logic|hwdata_o [2] & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Zyovx4~combout & ( \soc_inst|m0_1|u_logic|Bec3z4~q ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|hwdata_o [2]),
+ .datad(!\soc_inst|m0_1|u_logic|Bec3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bec3z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bec3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bec3z4~0 .lut_mask = 64'h00FF00FF0CFC0CFC;
+defparam \soc_inst|m0_1|u_logic|Bec3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y13_N44
+dffeas \soc_inst|m0_1|u_logic|Bec3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Bec3z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Bec3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bec3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bec3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ckuvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ckuvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~q & (!\soc_inst|m0_1|u_logic|Uaj2z4~q &
+// (!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ckuvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ckuvx4~0 .lut_mask = 64'h0000000000800000;
+defparam \soc_inst|m0_1|u_logic|Ckuvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y12_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F2ivx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|F2ivx4~0_combout = ( \soc_inst|m0_1|u_logic|Yz4wx4~combout & ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout & ((!\soc_inst|m0_1|u_logic|hwdata_o [2] & (\soc_inst|m0_1|u_logic|Pxb3z4~q ))
+// # (\soc_inst|m0_1|u_logic|hwdata_o [2] & ((\soc_inst|m0_1|u_logic|D9ovx4~combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout & ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout &
+// (((\soc_inst|m0_1|u_logic|hwdata_o [2] & \soc_inst|m0_1|u_logic|D9ovx4~combout )) # (\soc_inst|m0_1|u_logic|Pxb3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yz4wx4~combout & ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout & ( (!\soc_inst|m0_1|u_logic|hwdata_o
+// [2] & (\soc_inst|m0_1|u_logic|Pxb3z4~q )) # (\soc_inst|m0_1|u_logic|hwdata_o [2] & ((\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout & ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout & (
+// ((\soc_inst|m0_1|u_logic|hwdata_o [2] & \soc_inst|m0_1|u_logic|D9ovx4~combout )) # (\soc_inst|m0_1|u_logic|Pxb3z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pxb3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|hwdata_o [2]),
+ .datad(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|F2ivx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F2ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F2ivx4~0 .lut_mask = 64'h555F505F444C404C;
+defparam \soc_inst|m0_1|u_logic|F2ivx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y12_N35
+dffeas \soc_inst|m0_1|u_logic|Pxb3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|F2ivx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Pxb3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pxb3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pxb3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X28_Y13_N35
+dffeas \soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X28_Y13_N29
+dffeas \soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D0wwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D0wwx4~0_combout = ( \soc_inst|m0_1|u_logic|Qfc3z4~q & ( \soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Qfc3z4~q & ( !\soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q &
+// (!\soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Qfc3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|D0wwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D0wwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D0wwx4~0 .lut_mask = 64'h0000103100001010;
+defparam \soc_inst|m0_1|u_logic|D0wwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D0wwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D0wwx4~1_combout = ( \soc_inst|m0_1|u_logic|Pxb3z4~q & ( !\soc_inst|m0_1|u_logic|D0wwx4~0_combout & ( \soc_inst|m0_1|u_logic|Bec3z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Bec3z4~q ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Pxb3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|D0wwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|D0wwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D0wwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D0wwx4~1 .lut_mask = 64'h0000333300000000;
+defparam \soc_inst|m0_1|u_logic|D0wwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y13_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I90xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|I90xx4~0_combout = ( !\soc_inst|m0_1|u_logic|D0wwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Qfc3z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Qfc3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|D0wwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|I90xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I90xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I90xx4~0 .lut_mask = 64'hFFF0FFF000000000;
+defparam \soc_inst|m0_1|u_logic|I90xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y14_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iuuvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Iuuvx4~0_combout = ( \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Uaj2z4~q & ( (!\soc_inst|m0_1|u_logic|Cam2z4~q & (\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|R1w2z4~q &
+// !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Iuuvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Iuuvx4~0 .lut_mask = 64'h0000000000002000;
+defparam \soc_inst|m0_1|u_logic|Iuuvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y12_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K1ivx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K1ivx4~0_combout = ( \soc_inst|m0_1|u_logic|D9ovx4~combout & ( \soc_inst|m0_1|u_logic|hwdata_o [5] & ( (\soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|D9ovx4~combout & ( \soc_inst|m0_1|u_logic|hwdata_o [5] & ( (\soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|D9ovx4~combout & ( !\soc_inst|m0_1|u_logic|hwdata_o [5] & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|D9ovx4~combout & ( !\soc_inst|m0_1|u_logic|hwdata_o [5] & ( (\soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Yz4wx4~combout & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o [5]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|K1ivx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K1ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K1ivx4~0 .lut_mask = 64'h4440FFF055505550;
+defparam \soc_inst|m0_1|u_logic|K1ivx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y12_N2
+dffeas \soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|K1ivx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y12_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uic3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uic3z4~0_combout = ( \soc_inst|m0_1|u_logic|hwdata_o [5] & ( \soc_inst|m0_1|u_logic|Uic3z4~q ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o [5] & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout & ((\soc_inst|m0_1|u_logic|Uic3z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Zyovx4~combout & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Uic3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o [5]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Uic3z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uic3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uic3z4~0 .lut_mask = 64'h50FA50FA00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Uic3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y12_N59
+dffeas \soc_inst|m0_1|u_logic|Uic3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Uic3z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Uic3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uic3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uic3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X28_Y12_N44
+dffeas \soc_inst|m0_1|u_logic|Bmb3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o [7]),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Bmb3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bmb3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bmb3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X28_Y12_N47
+dffeas \soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y12_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wzvwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wzvwx4~0_combout = ( \soc_inst|m0_1|u_logic|Xdb3z4~q & ( (!\soc_inst|m0_1|u_logic|Bmb3z4~q & (!\soc_inst|m0_1|u_logic|Axm2z4~q & !\soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Bmb3z4~q &
+// ((!\soc_inst|m0_1|u_logic|Axm2z4~q ) # (!\soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Xdb3z4~q & ( (\soc_inst|m0_1|u_logic|Bmb3z4~q & !\soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Bmb3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Axm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xdb3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wzvwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wzvwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wzvwx4~0 .lut_mask = 64'h33003300F330F330;
+defparam \soc_inst|m0_1|u_logic|Wzvwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wzvwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wzvwx4~1_combout = ( \soc_inst|m0_1|u_logic|Wzvwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Fhc3z4~q & (\soc_inst|m0_1|u_logic|Ipb3z4~q & ((!\soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Uic3z4~q )))) ) ) #
+// ( !\soc_inst|m0_1|u_logic|Wzvwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Fhc3z4~q & \soc_inst|m0_1|u_logic|Ipb3z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fhc3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ipb3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Uic3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzvwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wzvwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wzvwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wzvwx4~1 .lut_mask = 64'h0303030303020302;
+defparam \soc_inst|m0_1|u_logic|Wzvwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y12_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jjuwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jjuwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Wzvwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Uic3z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Uic3z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzvwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jjuwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jjuwx4~0 .lut_mask = 64'hFAFAFAFA00000000;
+defparam \soc_inst|m0_1|u_logic|Jjuwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Douvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Douvx4~0_combout = ( \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Trq2z4~q &
+// (!\soc_inst|m0_1|u_logic|Cam2z4~q & !\soc_inst|m0_1|u_logic|R1w2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Douvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Douvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Douvx4~0 .lut_mask = 64'h0000200000000000;
+defparam \soc_inst|m0_1|u_logic|Douvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y12_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W0ivx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|W0ivx4~0_combout = ( \soc_inst|m0_1|u_logic|Douvx4~0_combout & ( \soc_inst|m0_1|u_logic|hwdata_o [7] & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout & (((!\soc_inst|m0_1|u_logic|Yz4wx4~combout & \soc_inst|m0_1|u_logic|X0c3z4~q ))
+// # (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Douvx4~0_combout & ( \soc_inst|m0_1|u_logic|hwdata_o [7] & ( ((!\soc_inst|m0_1|u_logic|Yz4wx4~combout & \soc_inst|m0_1|u_logic|X0c3z4~q )) #
+// (\soc_inst|m0_1|u_logic|D9ovx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Douvx4~0_combout & ( !\soc_inst|m0_1|u_logic|hwdata_o [7] & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout & \soc_inst|m0_1|u_logic|X0c3z4~q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Douvx4~0_combout & ( !\soc_inst|m0_1|u_logic|hwdata_o [7] & ( \soc_inst|m0_1|u_logic|X0c3z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|X0c3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Douvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o [7]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|W0ivx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W0ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W0ivx4~0 .lut_mask = 64'h0F0F0C0C0AFF08CC;
+defparam \soc_inst|m0_1|u_logic|W0ivx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y12_N46
+dffeas \soc_inst|m0_1|u_logic|X0c3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|W0ivx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|X0c3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X0c3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X0c3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ylc3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ylc3z4~0_combout = ( \soc_inst|m0_1|u_logic|J6i2z4~q & ( (\soc_inst|m0_1|u_logic|Ylc3z4~q & ((!\soc_inst|m0_1|u_logic|hwdata_o [7]) # (!\soc_inst|m0_1|u_logic|Zyovx4~combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|J6i2z4~q & (
+// ((\soc_inst|m0_1|u_logic|hwdata_o [7] & \soc_inst|m0_1|u_logic|Zyovx4~combout )) # (\soc_inst|m0_1|u_logic|Ylc3z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|hwdata_o [7]),
+ .datac(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ylc3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ylc3z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ylc3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ylc3z4~0 .lut_mask = 64'h03FF03FF00FC00FC;
+defparam \soc_inst|m0_1|u_logic|Ylc3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y12_N38
+dffeas \soc_inst|m0_1|u_logic|Ylc3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Ylc3z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ylc3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ylc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ylc3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X28_Y12_N14
+dffeas \soc_inst|m0_1|u_logic|Z4l2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Z4l2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z4l2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z4l2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X23_Y12_N1
+dffeas \soc_inst|m0_1|u_logic|H8l2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|H8l2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H8l2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H8l2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A50xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|A50xx4~0_combout = ( !\soc_inst|m0_1|u_logic|Q6l2z4~q & ( \soc_inst|m0_1|u_logic|H8l2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|X0c3z4~q & (\soc_inst|m0_1|u_logic|Z4l2z4~q & (\soc_inst|m0_1|u_logic|G8n2z4~q &
+// \soc_inst|m0_1|u_logic|Ylc3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Q6l2z4~q & ( !\soc_inst|m0_1|u_logic|H8l2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|X0c3z4~q & (\soc_inst|m0_1|u_logic|Z4l2z4~q & \soc_inst|m0_1|u_logic|Ylc3z4~q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Q6l2z4~q & ( !\soc_inst|m0_1|u_logic|H8l2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|X0c3z4~q & (\soc_inst|m0_1|u_logic|Ylc3z4~q & ((\soc_inst|m0_1|u_logic|G8n2z4~q ) # (\soc_inst|m0_1|u_logic|Z4l2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|X0c3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Z4l2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|G8n2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ylc3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Q6l2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|H8l2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|A50xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|A50xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A50xx4~0 .lut_mask = 64'h0015001100010000;
+defparam \soc_inst|m0_1|u_logic|A50xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y12_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ayzwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ayzwx4~combout = ( !\soc_inst|m0_1|u_logic|A50xx4~0_combout & ( (\soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Jkc3z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Jkc3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|A50xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ayzwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ayzwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ayzwx4 .lut_mask = 64'h000F000F00000000;
+defparam \soc_inst|m0_1|u_logic|Ayzwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jjuwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jjuwx4~1_combout = ( !\soc_inst|m0_1|u_logic|Ayzwx4~combout & ( (!\soc_inst|m0_1|u_logic|X0c3z4~q ) # (!\soc_inst|m0_1|u_logic|Ylc3z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|X0c3z4~q ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Ylc3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ayzwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jjuwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jjuwx4~1 .lut_mask = 64'hFFCCFFCC00000000;
+defparam \soc_inst|m0_1|u_logic|Jjuwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y13_N44
+dffeas \soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X29_Y13_N53
+dffeas \soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Pcd3z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K9ovx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K9ovx4~0_combout = ( \soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Trq2z4~q &
+// (!\soc_inst|m0_1|u_logic|Uaj2z4~q & \soc_inst|m0_1|u_logic|R1w2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|K9ovx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K9ovx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K9ovx4~0 .lut_mask = 64'h0000002000000000;
+defparam \soc_inst|m0_1|u_logic|K9ovx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y13_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T2ivx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T2ivx4~0_combout = ( \soc_inst|m0_1|u_logic|K9ovx4~0_combout & ( \soc_inst|m0_1|u_logic|Yz4wx4~combout & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout & ((!\soc_inst|m0_1|u_logic|hwdata_o~5_combout &
+// ((\soc_inst|m0_1|u_logic|Gxk2z4~q ))) # (\soc_inst|m0_1|u_logic|hwdata_o~5_combout & (\soc_inst|m0_1|u_logic|D9ovx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K9ovx4~0_combout & ( \soc_inst|m0_1|u_logic|Yz4wx4~combout & (
+// (!\soc_inst|m0_1|u_logic|hwdata_o~5_combout & ((\soc_inst|m0_1|u_logic|Gxk2z4~q ))) # (\soc_inst|m0_1|u_logic|hwdata_o~5_combout & (\soc_inst|m0_1|u_logic|D9ovx4~combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|K9ovx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Yz4wx4~combout & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout & (((\soc_inst|m0_1|u_logic|D9ovx4~combout & \soc_inst|m0_1|u_logic|hwdata_o~5_combout )) # (\soc_inst|m0_1|u_logic|Gxk2z4~q ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|K9ovx4~0_combout & ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout & ( ((\soc_inst|m0_1|u_logic|D9ovx4~combout & \soc_inst|m0_1|u_logic|hwdata_o~5_combout )) # (\soc_inst|m0_1|u_logic|Gxk2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|hwdata_o~5_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Gxk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|T2ivx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T2ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T2ivx4~0 .lut_mask = 64'h1F1F1F001D1D1D00;
+defparam \soc_inst|m0_1|u_logic|T2ivx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y13_N8
+dffeas \soc_inst|m0_1|u_logic|Gxk2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|T2ivx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Gxk2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gxk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gxk2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X29_Y13_N28
+dffeas \soc_inst|m0_1|u_logic|Mcc3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Mcc3z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Mcc3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mcc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mcc3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y13_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mcc3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mcc3z4~0_combout = ( \soc_inst|m0_1|u_logic|hwdata_o [1] & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout & ((\soc_inst|m0_1|u_logic|Mcc3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) ) # (
+// !\soc_inst|m0_1|u_logic|hwdata_o [1] & ( \soc_inst|m0_1|u_logic|Mcc3z4~q ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Mcc3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o [1]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mcc3z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mcc3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mcc3z4~0 .lut_mask = 64'h00FF00FF22EE22EE;
+defparam \soc_inst|m0_1|u_logic|Mcc3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y13_N29
+dffeas \soc_inst|m0_1|u_logic|Mcc3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Mcc3z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Mcc3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mcc3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mcc3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X29_Y13_N2
+dffeas \soc_inst|m0_1|u_logic|Zad3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o [7]),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Zad3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zad3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zad3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y14_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ruvvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ruvvx4~0_combout = ( \soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Uaj2z4~q & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Trq2z4~q & (!\soc_inst|m0_1|u_logic|R1w2z4~q &
+// !\soc_inst|m0_1|u_logic|Cam2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ruvvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ruvvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ruvvx4~0 .lut_mask = 64'h0000200000000000;
+defparam \soc_inst|m0_1|u_logic|Ruvvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y13_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M2ivx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|M2ivx4~0_combout = ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout & ( \soc_inst|m0_1|u_logic|hwdata_o [1] & ( (!\soc_inst|m0_1|u_logic|Ruvvx4~0_combout & (((\soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout & ( \soc_inst|m0_1|u_logic|hwdata_o [1] & ( ((\soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout & ( !\soc_inst|m0_1|u_logic|hwdata_o [1] & ( (\soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Ruvvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout & ( !\soc_inst|m0_1|u_logic|hwdata_o [1] & ( \soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE_q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ruvvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o [1]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|M2ivx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M2ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M2ivx4~0 .lut_mask = 64'h5555505044FF40F0;
+defparam \soc_inst|m0_1|u_logic|M2ivx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y13_N20
+dffeas \soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|M2ivx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y13_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G10xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G10xx4~0_combout = ( \soc_inst|m0_1|u_logic|Zad3z4~q & ( \soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Mcc3z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ) #
+// ((\soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Pcd3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zad3z4~q & ( \soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Mcc3z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Pcd3z4~q & !\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mcc3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Pcd3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Zad3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G10xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G10xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G10xx4~0 .lut_mask = 64'h0000000010005510;
+defparam \soc_inst|m0_1|u_logic|G10xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ztc3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ztc3z4~0_combout = ( \soc_inst|m0_1|u_logic|hwdata_o~5_combout & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout & ((\soc_inst|m0_1|u_logic|Ztc3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) )
+// ) # ( !\soc_inst|m0_1|u_logic|hwdata_o~5_combout & ( \soc_inst|m0_1|u_logic|Ztc3z4~q ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Ztc3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ztc3z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ztc3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ztc3z4~0 .lut_mask = 64'h00FF00FF22EE22EE;
+defparam \soc_inst|m0_1|u_logic|Ztc3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y13_N26
+dffeas \soc_inst|m0_1|u_logic|Ztc3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Ztc3z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ztc3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ztc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ztc3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G10xx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G10xx4~1_combout = ( \soc_inst|m0_1|u_logic|Ztc3z4~q & ( (\soc_inst|m0_1|u_logic|Gxk2z4~q & !\soc_inst|m0_1|u_logic|G10xx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Gxk2z4~q ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|G10xx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ztc3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G10xx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G10xx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G10xx4~1 .lut_mask = 64'h0000000033003300;
+defparam \soc_inst|m0_1|u_logic|G10xx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fb0xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fb0xx4~0_combout = ( \soc_inst|m0_1|u_logic|G10xx4~1_combout & ( \soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q ) ) # ( !\soc_inst|m0_1|u_logic|G10xx4~1_combout & ( \soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE_q ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|G10xx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fb0xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fb0xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fb0xx4~0 .lut_mask = 64'h0F0F0F0F33333333;
+defparam \soc_inst|m0_1|u_logic|Fb0xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y13_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S00xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S00xx4~0_combout = ( \soc_inst|m0_1|u_logic|D0wwx4~1_combout & ( \soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q ) ) # ( !\soc_inst|m0_1|u_logic|D0wwx4~1_combout & ( \soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE_q ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|D0wwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S00xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S00xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S00xx4~0 .lut_mask = 64'h0F0F0F0F33333333;
+defparam \soc_inst|m0_1|u_logic|S00xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y13_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I90xx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|I90xx4~1_combout = ( !\soc_inst|m0_1|u_logic|G10xx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Mcc3z4~DUPLICATE_q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Mcc3z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|G10xx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|I90xx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I90xx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I90xx4~1 .lut_mask = 64'hFFAAFFAA00000000;
+defparam \soc_inst|m0_1|u_logic|I90xx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tb0xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tb0xx4~0_combout = ( \soc_inst|m0_1|u_logic|Zad3z4~q & ( \soc_inst|m0_1|u_logic|G10xx4~1_combout ) ) # ( \soc_inst|m0_1|u_logic|Zad3z4~q & ( !\soc_inst|m0_1|u_logic|G10xx4~1_combout & ( \soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q
+// ) ) ) # ( !\soc_inst|m0_1|u_logic|Zad3z4~q & ( !\soc_inst|m0_1|u_logic|G10xx4~1_combout & ( \soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Zad3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|G10xx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tb0xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tb0xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tb0xx4~0 .lut_mask = 64'h0F0F0F0F0000FFFF;
+defparam \soc_inst|m0_1|u_logic|Tb0xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y13_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B90xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|B90xx4~0_combout = ( \soc_inst|m0_1|u_logic|D0wwx4~1_combout & ( \soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q ) ) # ( !\soc_inst|m0_1|u_logic|D0wwx4~1_combout & ( \soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE_q ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|D0wwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|B90xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B90xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B90xx4~0 .lut_mask = 64'h00FF00FF55555555;
+defparam \soc_inst|m0_1|u_logic|B90xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cjuwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cjuwx4~0_combout = ( \soc_inst|m0_1|u_logic|Tb0xx4~0_combout & ( \soc_inst|m0_1|u_logic|B90xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|I90xx4~1_combout & ((!\soc_inst|m0_1|u_logic|Fb0xx4~0_combout ) #
+// ((\soc_inst|m0_1|u_logic|I90xx4~0_combout ) # (\soc_inst|m0_1|u_logic|S00xx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tb0xx4~0_combout & ( \soc_inst|m0_1|u_logic|B90xx4~0_combout & ( !\soc_inst|m0_1|u_logic|I90xx4~1_combout ) ) ) # (
+// \soc_inst|m0_1|u_logic|Tb0xx4~0_combout & ( !\soc_inst|m0_1|u_logic|B90xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|I90xx4~1_combout & \soc_inst|m0_1|u_logic|I90xx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tb0xx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|B90xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|I90xx4~1_combout & ((!\soc_inst|m0_1|u_logic|Fb0xx4~0_combout ) # ((\soc_inst|m0_1|u_logic|I90xx4~0_combout ) # (\soc_inst|m0_1|u_logic|S00xx4~0_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fb0xx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|S00xx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|I90xx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|I90xx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Tb0xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|B90xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cjuwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cjuwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cjuwx4~0 .lut_mask = 64'hB0F000F0F0F0B0F0;
+defparam \soc_inst|m0_1|u_logic|Cjuwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y11_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wvzwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wvzwx4~1_combout = ( !\soc_inst|m0_1|u_logic|Cjuwx4~0_combout & ( (\soc_inst|m0_1|u_logic|I90xx4~0_combout & (\soc_inst|m0_1|u_logic|Jjuwx4~0_combout & \soc_inst|m0_1|u_logic|Jjuwx4~1_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|I90xx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Cjuwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wvzwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wvzwx4~1 .lut_mask = 64'h0005000500000000;
+defparam \soc_inst|m0_1|u_logic|Wvzwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y11_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pwywx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pwywx4~0_combout = ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Wvzwx4~1_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pwywx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pwywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pwywx4~0 .lut_mask = 64'h000000000A0A0A0A;
+defparam \soc_inst|m0_1|u_logic|Pwywx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y10_N37
+dffeas \soc_inst|m0_1|u_logic|Qrp2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|W2uvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Qrp2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qrp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qrp2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hdzwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hdzwx4~0_combout = ( \soc_inst|m0_1|u_logic|B90xx4~0_combout & ( (\soc_inst|m0_1|u_logic|I90xx4~1_combout ) # (\soc_inst|m0_1|u_logic|Tb0xx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|B90xx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|Tb0xx4~0_combout & (!\soc_inst|m0_1|u_logic|I90xx4~1_combout & \soc_inst|m0_1|u_logic|I90xx4~0_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Tb0xx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|I90xx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|I90xx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|B90xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hdzwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hdzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hdzwx4~0 .lut_mask = 64'h003000303F3F3F3F;
+defparam \soc_inst|m0_1|u_logic|Hdzwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y12_N46
+dffeas \soc_inst|m0_1|u_logic|Usl2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Usl2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Usl2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Usl2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y11_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N10xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N10xx4~0_combout = ( \soc_inst|m0_1|u_logic|Wzvwx4~1_combout & ( \soc_inst|m0_1|u_logic|Bmb3z4~q ) ) # ( !\soc_inst|m0_1|u_logic|Wzvwx4~1_combout & ( \soc_inst|m0_1|u_logic|Usl2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Usl2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Bmb3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzvwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N10xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N10xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N10xx4~0 .lut_mask = 64'h0F0F0F0F00FF00FF;
+defparam \soc_inst|m0_1|u_logic|N10xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y12_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F40xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|F40xx4~0_combout = ( \soc_inst|m0_1|u_logic|Ayzwx4~combout & ( \soc_inst|m0_1|u_logic|Z4l2z4~q ) ) # ( !\soc_inst|m0_1|u_logic|Ayzwx4~combout & ( \soc_inst|m0_1|u_logic|H8l2z4~DUPLICATE_q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|H8l2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Z4l2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ayzwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|F40xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F40xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F40xx4~0 .lut_mask = 64'h0F0F0F0F00FF00FF;
+defparam \soc_inst|m0_1|u_logic|F40xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y11_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Adzwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Adzwx4~0_combout = ( \soc_inst|m0_1|u_logic|Jjuwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout & (\soc_inst|m0_1|u_logic|N10xx4~0_combout )) # (\soc_inst|m0_1|u_logic|Jjuwx4~0_combout &
+// ((\soc_inst|m0_1|u_logic|F40xx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Jjuwx4~1_combout & ( (\soc_inst|m0_1|u_logic|F40xx4~0_combout & ((\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ) # (\soc_inst|m0_1|u_logic|N10xx4~0_combout ))) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|N10xx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|F40xx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Adzwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Adzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Adzwx4~0 .lut_mask = 64'h003F003F303F303F;
+defparam \soc_inst|m0_1|u_logic|Adzwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y11_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wvzwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wvzwx4~0_combout = ( \soc_inst|m0_1|u_logic|Jjuwx4~1_combout & ( \soc_inst|m0_1|u_logic|Jjuwx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wvzwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wvzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wvzwx4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Wvzwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I90xx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|I90xx4~2_combout = ( \soc_inst|m0_1|u_logic|I90xx4~0_combout & ( \soc_inst|m0_1|u_logic|I90xx4~1_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|I90xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|I90xx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|I90xx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I90xx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I90xx4~2 .lut_mask = 64'h000000000000FFFF;
+defparam \soc_inst|m0_1|u_logic|I90xx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A6zwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|A6zwx4~0_combout = ( \soc_inst|m0_1|u_logic|I90xx4~2_combout & ( \soc_inst|m0_1|u_logic|Adzwx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|I90xx4~2_combout & ( (\soc_inst|m0_1|u_logic|Hdzwx4~0_combout &
+// ((\soc_inst|m0_1|u_logic|Wvzwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Adzwx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Hdzwx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Adzwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wvzwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|I90xx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|A6zwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|A6zwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A6zwx4~0 .lut_mask = 64'h055505550F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|A6zwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y9_N14
+dffeas \soc_inst|m0_1|u_logic|Wuq2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Gzhvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wuq2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wuq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wuq2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y14_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yauvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yauvx4~0_combout = ( !\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|G0w2z4~q & (\soc_inst|m0_1|u_logic|Trq2z4~q & (\soc_inst|m0_1|u_logic|Uaj2z4~q &
+// !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yauvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yauvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yauvx4~0 .lut_mask = 64'h0000000001000000;
+defparam \soc_inst|m0_1|u_logic|Yauvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y9_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gzhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gzhvx4~0_combout = ( \soc_inst|m0_1|u_logic|Yz4wx4~combout & ( \soc_inst|m0_1|u_logic|D9ovx4~combout & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout & (((!\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout )) #
+// (\soc_inst|m0_1|u_logic|Wuq2z4~q ))) # (\soc_inst|m0_1|u_logic|Vbovx4~0_combout & (!\soc_inst|m0_1|u_logic|Yauvx4~0_combout & ((!\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout ) # (\soc_inst|m0_1|u_logic|Wuq2z4~q )))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Yz4wx4~combout & ( \soc_inst|m0_1|u_logic|D9ovx4~combout & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout & (((!\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout )) # (\soc_inst|m0_1|u_logic|Wuq2z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Vbovx4~0_combout & (!\soc_inst|m0_1|u_logic|Yauvx4~0_combout & ((!\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout ) # (\soc_inst|m0_1|u_logic|Wuq2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yz4wx4~combout & (
+// !\soc_inst|m0_1|u_logic|D9ovx4~combout & ( (\soc_inst|m0_1|u_logic|Wuq2z4~q & (\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Yauvx4~0_combout )))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Yz4wx4~combout & ( !\soc_inst|m0_1|u_logic|D9ovx4~combout & ( (\soc_inst|m0_1|u_logic|Wuq2z4~q & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Yauvx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Wuq2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yauvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gzhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gzhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gzhvx4~0 .lut_mask = 64'h32320032FA32FA32;
+defparam \soc_inst|m0_1|u_logic|Gzhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y9_N13
+dffeas \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Gzhvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y13_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tqzwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tqzwx4~0_combout = ( \soc_inst|m0_1|u_logic|D4g3z4~q & ( (!\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|D4g3z4~q & (
+// !\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|D4g3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tqzwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tqzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tqzwx4~0 .lut_mask = 64'hFF00FF00AA00AA00;
+defparam \soc_inst|m0_1|u_logic|Tqzwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y14_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jsa2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jsa2z4~0_combout = ( !\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Uaj2z4~q & ( (\soc_inst|m0_1|u_logic|Cam2z4~q & (!\soc_inst|m0_1|u_logic|R1w2z4~q & (\soc_inst|m0_1|u_logic|Trq2z4~q &
+// !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jsa2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jsa2z4~0 .lut_mask = 64'h0000000004000000;
+defparam \soc_inst|m0_1|u_logic|Jsa2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Syhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Syhvx4~0_combout = ( \soc_inst|m0_1|u_logic|D9ovx4~combout & ( \soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|D9ovx4~combout & ( \soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout & ( (!\soc_inst|m0_1|u_logic|Yz4wx4~combout & (\soc_inst|m0_1|u_logic|Lul2z4~q & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|D9ovx4~combout & ( !\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout & ( (\soc_inst|m0_1|u_logic|Lul2z4~q & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|D9ovx4~combout & ( !\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout & ( (\soc_inst|m0_1|u_logic|Lul2z4~q & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lul2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Syhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Syhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Syhvx4~0 .lut_mask = 64'h00EE00EE00E0EEEE;
+defparam \soc_inst|m0_1|u_logic|Syhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y13_N32
+dffeas \soc_inst|m0_1|u_logic|Lul2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Syhvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Lul2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lul2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lul2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X27_Y13_N1
+dffeas \soc_inst|m0_1|u_logic|Jsc3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Jsc3z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Jsc3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jsc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jsc3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jsc3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jsc3z4~0_combout = ( \soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout & ((\soc_inst|m0_1|u_logic|Jsc3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout & (!\soc_inst|m0_1|u_logic|J6i2z4~q
+// )) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout & ( \soc_inst|m0_1|u_logic|Jsc3z4~q ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Jsc3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jsc3z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jsc3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jsc3z4~0 .lut_mask = 64'h00FF00FF30FC30FC;
+defparam \soc_inst|m0_1|u_logic|Jsc3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y13_N2
+dffeas \soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Jsc3z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X27_Y13_N53
+dffeas \soc_inst|m0_1|u_logic|Tqc3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Tqc3z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Tqc3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tqc3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tqc3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X27_Y13_N29
+dffeas \soc_inst|m0_1|u_logic|Cps2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Cps2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cps2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cps2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X27_Y13_N44
+dffeas \soc_inst|m0_1|u_logic|Uls2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Uls2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uls2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uls2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y13_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xwvwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xwvwx4~0_combout = ( \soc_inst|m0_1|u_logic|Uls2z4~q & ( \soc_inst|m0_1|u_logic|Lns2z4~q & ( (!\soc_inst|m0_1|u_logic|Cps2z4~q & (\soc_inst|m0_1|u_logic|Lul2z4~q & \soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE_q )) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Uls2z4~q & ( !\soc_inst|m0_1|u_logic|Lns2z4~q & ( (\soc_inst|m0_1|u_logic|Lul2z4~q & (\soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Cps2z4~q ) # (\soc_inst|m0_1|u_logic|Dks2z4~q )))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Uls2z4~q & ( !\soc_inst|m0_1|u_logic|Lns2z4~q & ( (!\soc_inst|m0_1|u_logic|Cps2z4~q & (\soc_inst|m0_1|u_logic|Lul2z4~q & (\soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Dks2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Cps2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Lul2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Dks2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Uls2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Lns2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xwvwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xwvwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xwvwx4~0 .lut_mask = 64'h0002020300000202;
+defparam \soc_inst|m0_1|u_logic|Xwvwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y13_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xwvwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xwvwx4~1_combout = ( !\soc_inst|m0_1|u_logic|Xwvwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Tqc3z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Rym2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tqc3z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Rym2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xwvwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xwvwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xwvwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xwvwx4~1 .lut_mask = 64'h0055005500000000;
+defparam \soc_inst|m0_1|u_logic|Xwvwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Arzwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Arzwx4~1_combout = ( !\soc_inst|m0_1|u_logic|Xwvwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Lul2z4~q ) # (!\soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Lul2z4~q ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xwvwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Arzwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Arzwx4~1 .lut_mask = 64'hFFCCFFCC00000000;
+defparam \soc_inst|m0_1|u_logic|Arzwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y13_N38
+dffeas \soc_inst|m0_1|u_logic|Vgs2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Vgs2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vgs2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vgs2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X27_Y13_N26
+dffeas \soc_inst|m0_1|u_logic|Tib3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o [7]),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Tib3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tib3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tib3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dizwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dizwx4~0_combout = ( \soc_inst|m0_1|u_logic|Tib3z4~q & ( (\soc_inst|m0_1|u_logic|Vgs2z4~q ) # (\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Tib3z4~q & ( (!\soc_inst|m0_1|u_logic|Zxvwx4~1_combout &
+// \soc_inst|m0_1|u_logic|Vgs2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Vgs2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Tib3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dizwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dizwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dizwx4~0 .lut_mask = 64'h00F000F00FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Dizwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kizwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kizwx4~0_combout = ( \soc_inst|m0_1|u_logic|Xwvwx4~1_combout & ( \soc_inst|m0_1|u_logic|Uls2z4~q ) ) # ( !\soc_inst|m0_1|u_logic|Xwvwx4~1_combout & ( \soc_inst|m0_1|u_logic|Cps2z4~q ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Uls2z4~q ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Cps2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xwvwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kizwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kizwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kizwx4~0 .lut_mask = 64'h00FF00FF33333333;
+defparam \soc_inst|m0_1|u_logic|Kizwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fczwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fczwx4~0_combout = ( \soc_inst|m0_1|u_logic|Kizwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Dizwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tqzwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Kizwx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Tqzwx4~0_combout & (\soc_inst|m0_1|u_logic|Arzwx4~1_combout & \soc_inst|m0_1|u_logic|Dizwx4~0_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Tqzwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Dizwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Kizwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fczwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fczwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fczwx4~0 .lut_mask = 64'h000C000C33FF33FF;
+defparam \soc_inst|m0_1|u_logic|Fczwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y14_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K9vvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K9vvx4~0_combout = ( !\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~q & (!\soc_inst|m0_1|u_logic|Uaj2z4~q &
+// (\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|K9vvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K9vvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K9vvx4~0 .lut_mask = 64'h0000000008000000;
+defparam \soc_inst|m0_1|u_logic|K9vvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y9_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uzhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uzhvx4~0_combout = ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout & ( \soc_inst|m0_1|u_logic|D9ovx4~combout & ( (!\soc_inst|m0_1|u_logic|K9vvx4~0_combout & ((!\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ) #
+// (\soc_inst|m0_1|u_logic|Ble3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout & ( \soc_inst|m0_1|u_logic|D9ovx4~combout & ( (!\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ) # (\soc_inst|m0_1|u_logic|Ble3z4~q ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Vbovx4~0_combout & ( !\soc_inst|m0_1|u_logic|D9ovx4~combout & ( (\soc_inst|m0_1|u_logic|Ble3z4~q & (!\soc_inst|m0_1|u_logic|K9vvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Yz4wx4~combout ) #
+// (\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout & ( !\soc_inst|m0_1|u_logic|D9ovx4~combout & ( (\soc_inst|m0_1|u_logic|Ble3z4~q & ((!\soc_inst|m0_1|u_logic|Yz4wx4~combout ) #
+// (\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ble3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Uzhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uzhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uzhvx4~0 .lut_mask = 64'h51515100DDDDDD00;
+defparam \soc_inst|m0_1|u_logic|Uzhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y11_N53
+dffeas \soc_inst|m0_1|u_logic|Ble3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Uzhvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ble3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ble3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ble3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lee3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lee3z4~0_combout = ( \soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout & ( \soc_inst|m0_1|u_logic|Lee3z4~q ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout &
+// ((\soc_inst|m0_1|u_logic|Lee3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lee3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lee3z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lee3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lee3z4~0 .lut_mask = 64'h0AFA0AFA00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Lee3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y12_N19
+dffeas \soc_inst|m0_1|u_logic|Lee3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Lee3z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Lee3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lee3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lee3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y9_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[10]~9 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout = (!\soc_inst|m0_1|u_logic|Wq5wx4~combout & (\soc_inst|m0_1|u_logic|Zh5wx4~9_combout )) # (\soc_inst|m0_1|u_logic|Wq5wx4~combout & ((\soc_inst|m0_1|u_logic|Sh5wx4~0_combout )))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Zh5wx4~9_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hwdata_o[10]~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[10]~9 .lut_mask = 64'h550F550F550F550F;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[10]~9 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y14_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wva2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wva2z4~0_combout = ( \soc_inst|m0_1|u_logic|Cam2z4~q & ( !\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Trq2z4~q & (\soc_inst|m0_1|u_logic|R1w2z4~q &
+// !\soc_inst|m0_1|u_logic|Uaj2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wva2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wva2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wva2z4~0 .lut_mask = 64'h0000020000000000;
+defparam \soc_inst|m0_1|u_logic|Wva2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y9_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B0ivx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|B0ivx4~0_combout = ( \soc_inst|m0_1|u_logic|Yz4wx4~combout & ( \soc_inst|m0_1|u_logic|D9ovx4~combout & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout & ((!\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ) #
+// ((\soc_inst|m0_1|u_logic|Ipn2z4~q )))) # (\soc_inst|m0_1|u_logic|Vbovx4~0_combout & (!\soc_inst|m0_1|u_logic|Wva2z4~0_combout & ((!\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ) # (\soc_inst|m0_1|u_logic|Ipn2z4~q )))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Yz4wx4~combout & ( \soc_inst|m0_1|u_logic|D9ovx4~combout & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout & ((!\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ) # ((\soc_inst|m0_1|u_logic|Ipn2z4~q )))) #
+// (\soc_inst|m0_1|u_logic|Vbovx4~0_combout & (!\soc_inst|m0_1|u_logic|Wva2z4~0_combout & ((!\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ) # (\soc_inst|m0_1|u_logic|Ipn2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yz4wx4~combout & (
+// !\soc_inst|m0_1|u_logic|D9ovx4~combout & ( (\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout & (\soc_inst|m0_1|u_logic|Ipn2z4~q & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wva2z4~0_combout )))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Yz4wx4~combout & ( !\soc_inst|m0_1|u_logic|D9ovx4~combout & ( (\soc_inst|m0_1|u_logic|Ipn2z4~q & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wva2z4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ipn2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wva2z4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|B0ivx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B0ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B0ivx4~0 .lut_mask = 64'h0F0A0302CF8ACF8A;
+defparam \soc_inst|m0_1|u_logic|B0ivx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y9_N55
+dffeas \soc_inst|m0_1|u_logic|Ipn2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|B0ivx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ipn2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ipn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ipn2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nnc3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nnc3z4~0_combout = ( \soc_inst|m0_1|u_logic|Nnc3z4~q & ( \soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ) ) # ( \soc_inst|m0_1|u_logic|Nnc3z4~q & ( !\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout & (
+// (!\soc_inst|m0_1|u_logic|Zyovx4~combout ) # (!\soc_inst|m0_1|u_logic|J6i2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nnc3z4~q & ( !\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout & ( (\soc_inst|m0_1|u_logic|Zyovx4~combout & !\soc_inst|m0_1|u_logic|J6i2z4~q
+// ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Nnc3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nnc3z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nnc3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nnc3z4~0 .lut_mask = 64'h3030FCFC0000FFFF;
+defparam \soc_inst|m0_1|u_logic|Nnc3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X22_Y11_N1
+dffeas \soc_inst|m0_1|u_logic|Nnc3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Nnc3z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Nnc3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nnc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nnc3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X27_Y11_N26
+dffeas \soc_inst|m0_1|u_logic|Azs2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Azs2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Azs2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Azs2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X27_Y14_N8
+dffeas \soc_inst|m0_1|u_logic|Svs2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Svs2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Svs2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Svs2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y11_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gyvwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gyvwx4~0_combout = ( \soc_inst|m0_1|u_logic|Svs2z4~q & ( (!\soc_inst|m0_1|u_logic|Azs2z4~q ) # ((\soc_inst|m0_1|u_logic|Bus2z4~q & !\soc_inst|m0_1|u_logic|Jxs2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Svs2z4~q & (
+// (\soc_inst|m0_1|u_logic|Bus2z4~q & (!\soc_inst|m0_1|u_logic|Azs2z4~q & !\soc_inst|m0_1|u_logic|Jxs2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bus2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Azs2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Jxs2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Svs2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gyvwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gyvwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gyvwx4~0 .lut_mask = 64'h50005000F5F0F5F0;
+defparam \soc_inst|m0_1|u_logic|Gyvwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gyvwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gyvwx4~1_combout = ( \soc_inst|m0_1|u_logic|Gyvwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Ipn2z4~q & (\soc_inst|m0_1|u_logic|Nnc3z4~q & ((!\soc_inst|m0_1|u_logic|Ble3z4~q ) # (!\soc_inst|m0_1|u_logic|Lee3z4~q )))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Gyvwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Ipn2z4~q & \soc_inst|m0_1|u_logic|Nnc3z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ipn2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nnc3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ble3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Lee3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Gyvwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gyvwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gyvwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gyvwx4~1 .lut_mask = 64'h1111111111101110;
+defparam \soc_inst|m0_1|u_logic|Gyvwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B6pwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|B6pwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Gyvwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Ble3z4~q ) # (!\soc_inst|m0_1|u_logic|Lee3z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ble3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Lee3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Gyvwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|B6pwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B6pwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B6pwx4~0 .lut_mask = 64'hFFF0FFF000000000;
+defparam \soc_inst|m0_1|u_logic|B6pwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H2f3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H2f3z4~0_combout = ( \soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout & ( \soc_inst|m0_1|u_logic|H2f3z4~q ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout &
+// ((\soc_inst|m0_1|u_logic|H2f3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|H2f3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H2f3z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H2f3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H2f3z4~0 .lut_mask = 64'h30FC30FC00FF00FF;
+defparam \soc_inst|m0_1|u_logic|H2f3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y11_N1
+dffeas \soc_inst|m0_1|u_logic|H2f3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|H2f3z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|H2f3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H2f3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H2f3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X23_Y11_N17
+dffeas \soc_inst|m0_1|u_logic|T8f3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|P0ivx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|T8f3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T8f3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T8f3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhvvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mhvvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Uaj2z4~q & ( \soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~q & (\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q
+// & \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mhvvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mhvvx4~0 .lut_mask = 64'h0000000000020000;
+defparam \soc_inst|m0_1|u_logic|Mhvvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y11_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P0ivx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P0ivx4~0_combout = ( \soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout & ( \soc_inst|m0_1|u_logic|Yz4wx4~combout & ( (\soc_inst|m0_1|u_logic|T8f3z4~q & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout & ( \soc_inst|m0_1|u_logic|Yz4wx4~combout & ( (\soc_inst|m0_1|u_logic|D9ovx4~combout & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout & ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout & ( (\soc_inst|m0_1|u_logic|T8f3z4~q & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout & ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout & ( (!\soc_inst|m0_1|u_logic|D9ovx4~combout & (\soc_inst|m0_1|u_logic|T8f3z4~q &
+// ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|D9ovx4~combout & (((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|T8f3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|P0ivx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P0ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P0ivx4~0 .lut_mask = 64'h7770333055503330;
+defparam \soc_inst|m0_1|u_logic|P0ivx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y11_N16
+dffeas \soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|P0ivx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X27_Y10_N41
+dffeas \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Kss2z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X27_Y10_N20
+dffeas \soc_inst|m0_1|u_logic|Tqs2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Tqs2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tqs2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tqs2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X27_Y11_N56
+dffeas \soc_inst|m0_1|u_logic|Kkb3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o [7]),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Kkb3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kkb3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kkb3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y10_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whzwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Whzwx4~0_combout = ( \soc_inst|m0_1|u_logic|Kkb3z4~q & ( \soc_inst|m0_1|u_logic|Gcb3z4~q & ( (\soc_inst|m0_1|u_logic|Vve3z4~q & (\soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q ) #
+// (!\soc_inst|m0_1|u_logic|Tqs2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kkb3z4~q & ( \soc_inst|m0_1|u_logic|Gcb3z4~q & ( (\soc_inst|m0_1|u_logic|Vve3z4~q & (!\soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Tqs2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kkb3z4~q & ( !\soc_inst|m0_1|u_logic|Gcb3z4~q & ( (\soc_inst|m0_1|u_logic|Vve3z4~q & (\soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Tqs2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vve3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Tqs2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Kkb3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Gcb3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Whzwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Whzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Whzwx4~0 .lut_mask = 64'h0000050004000504;
+defparam \soc_inst|m0_1|u_logic|Whzwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y11_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whzwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Whzwx4~1_combout = ( !\soc_inst|m0_1|u_logic|Whzwx4~0_combout & ( (\soc_inst|m0_1|u_logic|H2f3z4~q & \soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|H2f3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Whzwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Whzwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Whzwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Whzwx4~1 .lut_mask = 64'h000F000F00000000;
+defparam \soc_inst|m0_1|u_logic|Whzwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y10_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fjzwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fjzwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Whzwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Whzwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fjzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fjzwx4~0 .lut_mask = 64'hFFF0FFF000000000;
+defparam \soc_inst|m0_1|u_logic|Fjzwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y11_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qlzwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qlzwx4~0_combout = ( \soc_inst|m0_1|u_logic|Tqs2z4~q & ( (!\soc_inst|m0_1|u_logic|Whzwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Kkb3z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Tqs2z4~q & ( (\soc_inst|m0_1|u_logic|Whzwx4~1_combout &
+// \soc_inst|m0_1|u_logic|Kkb3z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Whzwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Kkb3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Tqs2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qlzwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qlzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qlzwx4~0 .lut_mask = 64'h000F000FF0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|Qlzwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yizwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yizwx4~0_combout = ( \soc_inst|m0_1|u_logic|Gyvwx4~1_combout & ( \soc_inst|m0_1|u_logic|Svs2z4~q ) ) # ( !\soc_inst|m0_1|u_logic|Gyvwx4~1_combout & ( \soc_inst|m0_1|u_logic|Azs2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Svs2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Azs2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Gyvwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yizwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yizwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yizwx4~0 .lut_mask = 64'h00FF00FF0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Yizwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y11_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mczwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mczwx4~0_combout = ( \soc_inst|m0_1|u_logic|Yizwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Qlzwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Yizwx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|B6pwx4~0_combout & (!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout & \soc_inst|m0_1|u_logic|Qlzwx4~0_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|B6pwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qlzwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Yizwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mczwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mczwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mczwx4~0 .lut_mask = 64'h003000300FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Mczwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y13_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B6pwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|B6pwx4~1_combout = ( \soc_inst|m0_1|u_logic|Arzwx4~1_combout & ( \soc_inst|m0_1|u_logic|Tqzwx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Tqzwx4~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|B6pwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B6pwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B6pwx4~1 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|B6pwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y11_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B6pwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|B6pwx4~3_combout = ( \soc_inst|m0_1|u_logic|Fczwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Fjzwx4~0_combout & \soc_inst|m0_1|u_logic|B6pwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Fczwx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Mczwx4~0_combout & (\soc_inst|m0_1|u_logic|Fjzwx4~0_combout & (\soc_inst|m0_1|u_logic|B6pwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Mczwx4~0_combout & ((!\soc_inst|m0_1|u_logic|B6pwx4~1_combout ) #
+// ((\soc_inst|m0_1|u_logic|Fjzwx4~0_combout & \soc_inst|m0_1|u_logic|B6pwx4~0_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mczwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|B6pwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|B6pwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fczwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|B6pwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B6pwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B6pwx4~3 .lut_mask = 64'h5703570303030303;
+defparam \soc_inst|m0_1|u_logic|B6pwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y13_N52
+dffeas \soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Pab3z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iazwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Iazwx4~0_combout = ( \soc_inst|m0_1|u_logic|Xwvwx4~1_combout & ( \soc_inst|m0_1|u_logic|Dks2z4~q ) ) # ( !\soc_inst|m0_1|u_logic|Xwvwx4~1_combout & ( \soc_inst|m0_1|u_logic|Lns2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Lns2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Dks2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xwvwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Iazwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Iazwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Iazwx4~0 .lut_mask = 64'h0F0F0F0F00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Iazwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y11_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J7zwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|J7zwx4~0_combout = ( \soc_inst|m0_1|u_logic|Pazwx4~combout & ( (!\soc_inst|m0_1|u_logic|Zxvwx4~1_combout & (!\soc_inst|m0_1|u_logic|Mis2z4~q )) # (\soc_inst|m0_1|u_logic|Zxvwx4~1_combout &
+// ((!\soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Pazwx4~combout & ( !\soc_inst|m0_1|u_logic|Iazwx4~0_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mis2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Iazwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pazwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|J7zwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J7zwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J7zwx4~0 .lut_mask = 64'hFF00FF00ACACACAC;
+defparam \soc_inst|m0_1|u_logic|J7zwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ihzwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ihzwx4~0_combout = ( \soc_inst|m0_1|u_logic|Gyvwx4~1_combout & ( \soc_inst|m0_1|u_logic|Bus2z4~q ) ) # ( !\soc_inst|m0_1|u_logic|Gyvwx4~1_combout & ( \soc_inst|m0_1|u_logic|Jxs2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Jxs2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Bus2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Gyvwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ihzwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ihzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ihzwx4~0 .lut_mask = 64'h0F0F0F0F00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Ihzwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y10_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Clzwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Clzwx4~0_combout = ( \soc_inst|m0_1|u_logic|Whzwx4~1_combout & ( \soc_inst|m0_1|u_logic|Gcb3z4~q ) ) # ( !\soc_inst|m0_1|u_logic|Whzwx4~1_combout & ( \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Gcb3z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Whzwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Clzwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Clzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Clzwx4~0 .lut_mask = 64'h333333330F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Clzwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T5zwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T5zwx4~0_combout = ( \soc_inst|m0_1|u_logic|Qlzwx4~0_combout & ( \soc_inst|m0_1|u_logic|Clzwx4~0_combout & ( ((\soc_inst|m0_1|u_logic|B6pwx4~0_combout & !\soc_inst|m0_1|u_logic|Fjzwx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Ihzwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qlzwx4~0_combout & ( \soc_inst|m0_1|u_logic|Clzwx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout & ((\soc_inst|m0_1|u_logic|Yizwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|B6pwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Ihzwx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Qlzwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Clzwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Ihzwx4~0_combout &
+// (((!\soc_inst|m0_1|u_logic|B6pwx4~0_combout & !\soc_inst|m0_1|u_logic|Yizwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qlzwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Clzwx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|Ihzwx4~0_combout & \soc_inst|m0_1|u_logic|Fjzwx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ihzwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|B6pwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Yizwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Qlzwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Clzwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|T5zwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T5zwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T5zwx4~0 .lut_mask = 64'h005540557F557755;
+defparam \soc_inst|m0_1|u_logic|T5zwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B6pwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|B6pwx4~2_combout = ( \soc_inst|m0_1|u_logic|Fczwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Mczwx4~0_combout & (\soc_inst|m0_1|u_logic|T5zwx4~0_combout & !\soc_inst|m0_1|u_logic|B6pwx4~1_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Fczwx4~0_combout & ( (\soc_inst|m0_1|u_logic|T5zwx4~0_combout & !\soc_inst|m0_1|u_logic|B6pwx4~1_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mczwx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|T5zwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|B6pwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fczwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|B6pwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B6pwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B6pwx4~2 .lut_mask = 64'h0F000F0005000500;
+defparam \soc_inst|m0_1|u_logic|B6pwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y11_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H6zwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H6zwx4~0_combout = ( \soc_inst|m0_1|u_logic|B6pwx4~2_combout & ( (!\soc_inst|m0_1|u_logic|B6pwx4~3_combout & ((!\soc_inst|m0_1|u_logic|J7zwx4~0_combout & ((\soc_inst|m0_1|u_logic|Mczwx4~0_combout ))) #
+// (\soc_inst|m0_1|u_logic|J7zwx4~0_combout & (\soc_inst|m0_1|u_logic|Fczwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|B6pwx4~3_combout & (\soc_inst|m0_1|u_logic|Fczwx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|B6pwx4~2_combout & (
+// (!\soc_inst|m0_1|u_logic|B6pwx4~3_combout & ((\soc_inst|m0_1|u_logic|Mczwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|B6pwx4~3_combout & (\soc_inst|m0_1|u_logic|Fczwx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fczwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|B6pwx4~3_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|J7zwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Mczwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|B6pwx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H6zwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H6zwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H6zwx4~0 .lut_mask = 64'h11DD11DD15D515D5;
+defparam \soc_inst|m0_1|u_logic|H6zwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ozywx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ozywx4~0_combout = ( \soc_inst|m0_1|u_logic|H6zwx4~0_combout & ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Qrp2z4~q & (!\soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q &
+// ((\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ) # (\soc_inst|m0_1|u_logic|A6zwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Qrp2z4~q & (((\soc_inst|m0_1|u_logic|Wvzwx4~1_combout )) # (\soc_inst|m0_1|u_logic|A6zwx4~0_combout ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|H6zwx4~0_combout & ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q & (((\soc_inst|m0_1|u_logic|A6zwx4~0_combout & !\soc_inst|m0_1|u_logic|Wvzwx4~1_combout )))) #
+// (\soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Qrp2z4~q & ((\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ) # (\soc_inst|m0_1|u_logic|A6zwx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|H6zwx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|G2zwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Qrp2z4~q & (!\soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ) # (\soc_inst|m0_1|u_logic|A6zwx4~0_combout )))) #
+// (\soc_inst|m0_1|u_logic|Qrp2z4~q & (((\soc_inst|m0_1|u_logic|Wvzwx4~1_combout )) # (\soc_inst|m0_1|u_logic|A6zwx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qrp2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|A6zwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|H6zwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ozywx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ozywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ozywx4~0 .lut_mask = 64'h000031F5310531F5;
+defparam \soc_inst|m0_1|u_logic|Ozywx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J0zwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|J0zwx4~0_combout = ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout & (\soc_inst|m0_1|u_logic|A6zwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wvzwx4~1_combout &
+// ((\soc_inst|m0_1|u_logic|H6zwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|G2zwx4~0_combout & ( (\soc_inst|m0_1|u_logic|H6zwx4~0_combout & ((\soc_inst|m0_1|u_logic|A6zwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ))) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|A6zwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|H6zwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|J0zwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J0zwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J0zwx4~0 .lut_mask = 64'h003F003F0C3F0C3F;
+defparam \soc_inst|m0_1|u_logic|J0zwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vzywx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vzywx4~0_combout = ( \soc_inst|m0_1|u_logic|B6pwx4~2_combout & ( (!\soc_inst|m0_1|u_logic|J7zwx4~0_combout & ((\soc_inst|m0_1|u_logic|T5zwx4~0_combout ) # (\soc_inst|m0_1|u_logic|B6pwx4~3_combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|B6pwx4~2_combout & ( (!\soc_inst|m0_1|u_logic|B6pwx4~3_combout & (\soc_inst|m0_1|u_logic|T5zwx4~0_combout )) # (\soc_inst|m0_1|u_logic|B6pwx4~3_combout & ((!\soc_inst|m0_1|u_logic|J7zwx4~0_combout ))) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|B6pwx4~3_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|T5zwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|J7zwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|B6pwx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vzywx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vzywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vzywx4~0 .lut_mask = 64'h3F0C3F0C3F003F00;
+defparam \soc_inst|m0_1|u_logic|Vzywx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kbzwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kbzwx4~0_combout = ( \soc_inst|m0_1|u_logic|Tb0xx4~0_combout & ( \soc_inst|m0_1|u_logic|B90xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|I90xx4~1_combout & (\soc_inst|m0_1|u_logic|Fb0xx4~0_combout &
+// ((\soc_inst|m0_1|u_logic|I90xx4~0_combout ) # (\soc_inst|m0_1|u_logic|S00xx4~0_combout )))) # (\soc_inst|m0_1|u_logic|I90xx4~1_combout & (((\soc_inst|m0_1|u_logic|S00xx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tb0xx4~0_combout & (
+// \soc_inst|m0_1|u_logic|B90xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|I90xx4~1_combout & (\soc_inst|m0_1|u_logic|Fb0xx4~0_combout )) # (\soc_inst|m0_1|u_logic|I90xx4~1_combout & ((\soc_inst|m0_1|u_logic|S00xx4~0_combout ))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Tb0xx4~0_combout & ( !\soc_inst|m0_1|u_logic|B90xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|I90xx4~1_combout & ((!\soc_inst|m0_1|u_logic|I90xx4~0_combout & ((\soc_inst|m0_1|u_logic|S00xx4~0_combout ))) #
+// (\soc_inst|m0_1|u_logic|I90xx4~0_combout & (\soc_inst|m0_1|u_logic|Fb0xx4~0_combout )))) # (\soc_inst|m0_1|u_logic|I90xx4~1_combout & (((\soc_inst|m0_1|u_logic|S00xx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tb0xx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|B90xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|I90xx4~1_combout & (\soc_inst|m0_1|u_logic|Fb0xx4~0_combout & ((\soc_inst|m0_1|u_logic|I90xx4~0_combout ) # (\soc_inst|m0_1|u_logic|S00xx4~0_combout )))) #
+// (\soc_inst|m0_1|u_logic|I90xx4~1_combout & (((\soc_inst|m0_1|u_logic|S00xx4~0_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fb0xx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|S00xx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|I90xx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|I90xx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Tb0xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|B90xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kbzwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kbzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kbzwx4~0 .lut_mask = 64'h1353335353531353;
+defparam \soc_inst|m0_1|u_logic|Kbzwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y12_N16
+dffeas \soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y14_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jzzwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jzzwx4~0_combout = ( \soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Wzvwx4~1_combout ) ) # ( \soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Wzvwx4~1_combout & (
+// \soc_inst|m0_1|u_logic|Axm2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Wzvwx4~1_combout & ( \soc_inst|m0_1|u_logic|Axm2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Axm2z4~q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzvwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jzzwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jzzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jzzwx4~0 .lut_mask = 64'h555555550000FFFF;
+defparam \soc_inst|m0_1|u_logic|Jzzwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qzzwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qzzwx4~0_combout = ( \soc_inst|m0_1|u_logic|Ayzwx4~combout & ( \soc_inst|m0_1|u_logic|G8n2z4~q ) ) # ( !\soc_inst|m0_1|u_logic|Ayzwx4~combout & ( \soc_inst|m0_1|u_logic|Q6l2z4~q ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Q6l2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|G8n2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ayzwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qzzwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qzzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qzzwx4~0 .lut_mask = 64'h333333330F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Qzzwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Czzwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Czzwx4~0_combout = ( \soc_inst|m0_1|u_logic|F40xx4~0_combout & ( \soc_inst|m0_1|u_logic|Qzzwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jzzwx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|F40xx4~0_combout & ( \soc_inst|m0_1|u_logic|Qzzwx4~0_combout & ( (((\soc_inst|m0_1|u_logic|N10xx4~0_combout & !\soc_inst|m0_1|u_logic|Jjuwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Jjuwx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Jzzwx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|F40xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Qzzwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Jzzwx4~0_combout & (!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|N10xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jjuwx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F40xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Qzzwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Jzzwx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout & \soc_inst|m0_1|u_logic|Jjuwx4~1_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Jzzwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|N10xx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|F40xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qzzwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Czzwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Czzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Czzwx4~0 .lut_mask = 64'h005040507F5F5F5F;
+defparam \soc_inst|m0_1|u_logic|Czzwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R4zwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R4zwx4~0_combout = ( \soc_inst|m0_1|u_logic|I90xx4~2_combout & ( \soc_inst|m0_1|u_logic|Czzwx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|I90xx4~2_combout & ( \soc_inst|m0_1|u_logic|Czzwx4~0_combout & (
+// ((\soc_inst|m0_1|u_logic|Hdzwx4~0_combout & (!\soc_inst|m0_1|u_logic|Adzwx4~0_combout & !\soc_inst|m0_1|u_logic|Wvzwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Kbzwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|I90xx4~2_combout & (
+// !\soc_inst|m0_1|u_logic|Czzwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Kbzwx4~0_combout & (((!\soc_inst|m0_1|u_logic|Hdzwx4~0_combout & \soc_inst|m0_1|u_logic|Adzwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wvzwx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Hdzwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Adzwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Kbzwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wvzwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|I90xx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Czzwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R4zwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R4zwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R4zwx4~0 .lut_mask = 64'h020F00004F0FFFFF;
+defparam \soc_inst|m0_1|u_logic|R4zwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vzywx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vzywx4~1_combout = ( \soc_inst|m0_1|u_logic|H6zwx4~0_combout & ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout & ((\soc_inst|m0_1|u_logic|R4zwx4~0_combout ))) #
+// (\soc_inst|m0_1|u_logic|Wvzwx4~1_combout & (\soc_inst|m0_1|u_logic|Vzywx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|H6zwx4~0_combout & ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout &
+// ((\soc_inst|m0_1|u_logic|R4zwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wvzwx4~1_combout & (\soc_inst|m0_1|u_logic|Vzywx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|H6zwx4~0_combout & ( !\soc_inst|m0_1|u_logic|G2zwx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout & (\soc_inst|m0_1|u_logic|R4zwx4~0_combout & ((!\soc_inst|m0_1|u_logic|A6zwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Vzywx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Wvzwx4~1_combout &
+// (((\soc_inst|m0_1|u_logic|Vzywx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H6zwx4~0_combout & ( !\soc_inst|m0_1|u_logic|G2zwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Vzywx4~0_combout & (((\soc_inst|m0_1|u_logic|R4zwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Wvzwx4~1_combout )) # (\soc_inst|m0_1|u_logic|A6zwx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|A6zwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Vzywx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|R4zwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|H6zwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vzywx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vzywx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vzywx4~1 .lut_mask = 64'h070F038F03CF03CF;
+defparam \soc_inst|m0_1|u_logic|Vzywx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gvywx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gvywx4~0_combout = ( \soc_inst|m0_1|u_logic|J0zwx4~0_combout & ( \soc_inst|m0_1|u_logic|Vzywx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Aqp2z4~q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|J0zwx4~0_combout & ( \soc_inst|m0_1|u_logic|Vzywx4~1_combout & ( ((!\soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Qrp2z4~q & !\soc_inst|m0_1|u_logic|G2zwx4~1_combout ))) #
+// (\soc_inst|m0_1|u_logic|Aqp2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|J0zwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Vzywx4~1_combout & ( (\soc_inst|m0_1|u_logic|Aqp2z4~q & (\soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Qrp2z4~q )
+// # (\soc_inst|m0_1|u_logic|G2zwx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|J0zwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Vzywx4~1_combout & ( (\soc_inst|m0_1|u_logic|Aqp2z4~q & (\soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|G2zwx4~1_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qrp2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Aqp2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|J0zwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Vzywx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gvywx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gvywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gvywx4~0 .lut_mask = 64'h00030203F7F3F3F3;
+defparam \soc_inst|m0_1|u_logic|Gvywx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E5owx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|E5owx4~0_combout = ( \soc_inst|m0_1|u_logic|Ozywx4~0_combout & ( \soc_inst|m0_1|u_logic|Gvywx4~0_combout & ( !\soc_inst|m0_1|u_logic|Wwywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ozywx4~0_combout & (
+// \soc_inst|m0_1|u_logic|Gvywx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Wwywx4~0_combout & ((!\soc_inst|m0_1|u_logic|Hzywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pwywx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ozywx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Gvywx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Wwywx4~0_combout & ((!\soc_inst|m0_1|u_logic|Tyywx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Hzywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pwywx4~0_combout )))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Ozywx4~0_combout & ( !\soc_inst|m0_1|u_logic|Gvywx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Wwywx4~0_combout & (((!\soc_inst|m0_1|u_logic|Tyywx4~0_combout & !\soc_inst|m0_1|u_logic|Hzywx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Pwywx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Tyywx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Hzywx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Pwywx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ozywx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Gvywx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E5owx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E5owx4~0 .lut_mask = 64'h80AAA8AAA0AAAAAA;
+defparam \soc_inst|m0_1|u_logic|E5owx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C0zwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C0zwx4~0_combout = ( \soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|G2zwx4~1_combout ) ) # ( \soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|G2zwx4~1_combout & (
+// (!\soc_inst|m0_1|u_logic|Qrp2z4~q & ((!\soc_inst|m0_1|u_logic|Aqp2z4~q ) # ((\soc_inst|m0_1|u_logic|Vzywx4~1_combout ) # (\soc_inst|m0_1|u_logic|J0zwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Qrp2z4~q & (\soc_inst|m0_1|u_logic|J0zwx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Aqp2z4~q ) # (\soc_inst|m0_1|u_logic|Vzywx4~1_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qrp2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Aqp2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|J0zwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Vzywx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C0zwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C0zwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C0zwx4~0 .lut_mask = 64'h00008EAF0000FFFF;
+defparam \soc_inst|m0_1|u_logic|C0zwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y10_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X2rvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|X2rvx4~0_combout = ( !\soc_inst|m0_1|u_logic|C0zwx4~0_combout & ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|C0zwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|X2rvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X2rvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X2rvx4~0 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|X2rvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y10_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjyvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pjyvx4~0_combout = ( \soc_inst|m0_1|u_logic|Q6mwx4~0_combout & ( \soc_inst|m0_1|u_logic|X2rvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|V3o2z4~q & (\soc_inst|m0_1|u_logic|Wfuwx4~combout & (!\soc_inst|m0_1|u_logic|G2zwx4~1_combout
+// ))) # (\soc_inst|m0_1|u_logic|V3o2z4~q & (((\soc_inst|m0_1|u_logic|Wfuwx4~combout & !\soc_inst|m0_1|u_logic|G2zwx4~1_combout )) # (\soc_inst|m0_1|u_logic|A5uvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Q6mwx4~0_combout & (
+// \soc_inst|m0_1|u_logic|X2rvx4~0_combout & ( (\soc_inst|m0_1|u_logic|V3o2z4~q & \soc_inst|m0_1|u_logic|A5uvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Q6mwx4~0_combout & ( !\soc_inst|m0_1|u_logic|X2rvx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|V3o2z4~q & \soc_inst|m0_1|u_logic|A5uvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Q6mwx4~0_combout & ( !\soc_inst|m0_1|u_logic|X2rvx4~0_combout & ( (\soc_inst|m0_1|u_logic|V3o2z4~q & \soc_inst|m0_1|u_logic|A5uvx4~0_combout
+// ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|V3o2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|X2rvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pjyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pjyvx4~0 .lut_mask = 64'h0055005500553075;
+defparam \soc_inst|m0_1|u_logic|Pjyvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y13_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ahowx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ahowx4~0_combout = ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout & ( ((\soc_inst|m0_1|u_logic|Ztc3z4~q & \soc_inst|m0_1|u_logic|M5tvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Gxk2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout
+// & ( (\soc_inst|m0_1|u_logic|Ztc3z4~q & \soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ztc3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Gxk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ahowx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ahowx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ahowx4~0 .lut_mask = 64'h0505050537373737;
+defparam \soc_inst|m0_1|u_logic|Ahowx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y13_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tgowx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tgowx4~0_combout = ( \soc_inst|m0_1|u_logic|Ahowx4~0_combout & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|Ahowx4~0_combout & ( (\soc_inst|m0_1|u_logic|Lstwx4~0_combout &
+// (\soc_inst|m0_1|u_logic|Tna3z4~q & \soc_inst|m0_1|u_logic|A5uvx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ahowx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tgowx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tgowx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tgowx4~0 .lut_mask = 64'h0005000555555555;
+defparam \soc_inst|m0_1|u_logic|Tgowx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y13_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tlyvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tlyvx4~0_combout = ( \soc_inst|m0_1|u_logic|I7owx4~combout & ( (\soc_inst|m0_1|u_logic|F2o2z4~q & (!\soc_inst|m0_1|u_logic|Tgowx4~0_combout & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Aea3z4~q )))) ) )
+// # ( !\soc_inst|m0_1|u_logic|I7owx4~combout & ( (!\soc_inst|m0_1|u_logic|Tgowx4~0_combout & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Aea3z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Aea3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|F2o2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Tgowx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tlyvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tlyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tlyvx4~0 .lut_mask = 64'hF500F50031003100;
+defparam \soc_inst|m0_1|u_logic|Tlyvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y11_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tlyvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tlyvx4~1_combout = ( \soc_inst|m0_1|u_logic|B28wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Tlyvx4~0_combout & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[0]~32_combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|B28wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout & (\soc_inst|m0_1|u_logic|Tlyvx4~0_combout & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[0]~32_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Tlyvx4~0_combout ),
+ .datad(!\soc_inst|interconnect_1|HRDATA[0]~32_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|B28wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tlyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tlyvx4~1 .lut_mask = 64'h0C080C080F0A0F0A;
+defparam \soc_inst|m0_1|u_logic|Tlyvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rkyvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rkyvx4~0_combout = ( \soc_inst|interconnect_1|HRDATA[24]~31_combout & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout & (!\soc_inst|m0_1|u_logic|Ecowx4~combout & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Q7ewx4~1_combout )))) ) ) # ( !\soc_inst|interconnect_1|HRDATA[24]~31_combout & ( (!\soc_inst|m0_1|u_logic|Ecowx4~combout & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q7ewx4~1_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ecowx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Q7ewx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[24]~31_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rkyvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rkyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rkyvx4~0 .lut_mask = 64'hC0F0C0F080A080A0;
+defparam \soc_inst|m0_1|u_logic|Rkyvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y11_N21
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[8]~28 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[8]~28_combout = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8 & ( \soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & !\soc_inst|ram_1|byte_select [1]) ) ) ) # (
+// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8 & ( !\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q ) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8 & (
+// !\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & \soc_inst|ram_1|byte_select [1]) ) ) )
+
+ .dataa(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|ram_1|byte_select [1]),
+ .datad(gnd),
+ .datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8 ),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|data_to_memory[8]~28_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[8]~28 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[8]~28 .lut_mask = 64'h0505555500005050;
+defparam \soc_inst|ram_1|data_to_memory[8]~28 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X14_Y2_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 (
+ .portawe(\soc_inst|ram_1|write_cycle~q ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|ram_1|data_to_memory[8]~28_combout ,\soc_inst|ram_1|data_to_memory[0]~27_combout }),
+ .portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+ .portabyteenamasks(1'b1),
+ .portbdatain(2'b00),
+ .portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_first_bit_number = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_first_bit_number = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .mem_init0 = "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000037DF7DEA548497ECA1E29A84B1284B12A0B20B20B20B20B20B20B2872AAAAAAAAAAAAAA048EFF3F0FFFFFFFFFFFF3C01554";
+// synopsys translate_on
+
+// Location: IOIBUF_X28_Y0_N35
+cyclonev_io_ibuf \SW[8]~input (
+ .i(SW[8]),
+ .ibar(gnd),
+ .dynamicterminationcontrol(gnd),
+ .o(\SW[8]~input_o ));
+// synopsys translate_off
+defparam \SW[8]~input .bus_hold = "false";
+defparam \SW[8]~input .simulate_z_as = "z";
+// synopsys translate_on
+
+// Location: FF_X30_Y9_N8
+dffeas \soc_inst|switches_1|switch_store[0][8] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\SW[8]~input_o ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|switches_1|always0~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|switches_1|switch_store[0][8]~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[0][8] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[0][8] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y9_N6
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[8]~33 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[8]~33_combout = ( \soc_inst|interconnect_1|HRDATA[8]~15_combout & ( (!\soc_inst|interconnect_1|Equal1~0_combout & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8 )) # (\soc_inst|interconnect_1|Equal1~0_combout
+// & ((\soc_inst|switches_1|switch_store[0][8]~q ))) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
+ .datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8 ),
+ .datad(!\soc_inst|switches_1|switch_store[0][8]~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[8]~15_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[8]~33_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[8]~33 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[8]~33 .lut_mask = 64'h000000000C3F0C3F;
+defparam \soc_inst|interconnect_1|HRDATA[8]~33 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y11_N44
+dffeas \soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Armvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y11_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmyvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hmyvx4~0_combout = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout & (\soc_inst|m0_1|u_logic|H2f3z4~q & ((\soc_inst|m0_1|u_logic|M5tvx4~0_combout )))) #
+// (\soc_inst|m0_1|u_logic|Ts5wx4~0_combout & (((\soc_inst|m0_1|u_logic|H2f3z4~q & \soc_inst|m0_1|u_logic|M5tvx4~0_combout )) # (\soc_inst|m0_1|u_logic|T8f3z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|H2f3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|T8f3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hmyvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hmyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hmyvx4~0 .lut_mask = 64'h0000000005370537;
+defparam \soc_inst|m0_1|u_logic|Hmyvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y11_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmyvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hmyvx4~1_combout = ( !\soc_inst|m0_1|u_logic|Hmyvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|G6owx4~combout & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # ((\soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE_q )))) #
+// (\soc_inst|m0_1|u_logic|G6owx4~combout & (\soc_inst|m0_1|u_logic|W3f3z4~q & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE_q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|W3f3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Hmyvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hmyvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hmyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hmyvx4~1 .lut_mask = 64'h8ACF8ACF00000000;
+defparam \soc_inst|m0_1|u_logic|Hmyvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmyvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hmyvx4~2_combout = ( \soc_inst|m0_1|u_logic|S08wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Hmyvx4~1_combout & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[8]~33_combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|S08wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout & (\soc_inst|m0_1|u_logic|Hmyvx4~1_combout & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[8]~33_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+ .datac(!\soc_inst|interconnect_1|HRDATA[8]~33_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hmyvx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|S08wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hmyvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hmyvx4~2 .lut_mask = 64'h00C800C800FA00FA;
+defparam \soc_inst|m0_1|u_logic|Hmyvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3pvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O3pvx4~0_combout = ( \soc_inst|m0_1|u_logic|Rkyvx4~0_combout & ( \soc_inst|m0_1|u_logic|Hmyvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Rkyvx4~0_combout & ( \soc_inst|m0_1|u_logic|Hmyvx4~2_combout & ( (\soc_inst|m0_1|u_logic|H9iwx4~1_combout & ((!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Rkyvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Hmyvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|W6iwx4~combout & ((!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Rkyvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Hmyvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|W6iwx4~combout & (\soc_inst|m0_1|u_logic|H9iwx4~1_combout & ((!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Rkyvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|O3pvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O3pvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O3pvx4~0 .lut_mask = 64'h00B0B0B000BBBBBB;
+defparam \soc_inst|m0_1|u_logic|O3pvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3pvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O3pvx4~1_combout = ( \soc_inst|m0_1|u_logic|Pjyvx4~2_combout & ( \soc_inst|m0_1|u_logic|O3pvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|F8iwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pjyvx4~2_combout & ( \soc_inst|m0_1|u_logic|O3pvx4~0_combout & ( !\soc_inst|m0_1|u_logic|F8iwx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|O3pvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|O3pvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O3pvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O3pvx4~1 .lut_mask = 64'h00000000FF00FFFC;
+defparam \soc_inst|m0_1|u_logic|O3pvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y5_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rqzvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rqzvx4~0_combout = ( \soc_inst|m0_1|u_logic|O3pvx4~1_combout & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Yqzvx4~0_combout & (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout ) #
+// (\soc_inst|m0_1|u_logic|R7iwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|O3pvx4~1_combout & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Yqzvx4~0_combout &
+// ((\soc_inst|m0_1|u_logic|R7iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Yqzvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|O3pvx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rqzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rqzvx4~0 .lut_mask = 64'h000007070000070F;
+defparam \soc_inst|m0_1|u_logic|Rqzvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y5_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R293z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R293z4~feeder_combout = ( \soc_inst|m0_1|u_logic|Rqzvx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R293z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R293z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R293z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|R293z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X48_Y5_N8
+dffeas \soc_inst|m0_1|u_logic|R293z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|R293z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|R293z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R293z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|R293z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y7_N2
+dffeas \soc_inst|m0_1|u_logic|Zpj2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Zpj2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zpj2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zpj2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y7_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnvwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mnvwx4~1_combout = ( \soc_inst|m0_1|u_logic|Zpj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|R293z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q
+// & \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zpj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Rni2z4~q & ((!\soc_inst|m0_1|u_logic|R293z4~q ) #
+// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|R293z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Zpj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mnvwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~1 .lut_mask = 64'h0000000000320002;
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y6_N52
+dffeas \soc_inst|m0_1|u_logic|C5v2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|C5v2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C5v2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|C5v2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y5_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnvwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mnvwx4~3_combout = ( \soc_inst|m0_1|u_logic|C5v2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Vmj2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q
+// & !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C5v2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|Vmj2z4~q ) # (\soc_inst|m0_1|u_logic|Sjj2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vmj2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|C5v2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mnvwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~3 .lut_mask = 64'h0000000020302000;
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y6_N31
+dffeas \soc_inst|m0_1|u_logic|C183z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|C183z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C183z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|C183z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y7_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnvwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mnvwx4~2_combout = ( !\soc_inst|m0_1|u_logic|Tvt2z4~q & ( \soc_inst|m0_1|u_logic|C183z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Wzy2z4~q
+// & !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tvt2z4~q & ( !\soc_inst|m0_1|u_logic|C183z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|Wzy2z4~q & !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tvt2z4~q & ( !\soc_inst|m0_1|u_logic|C183z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Tvt2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|C183z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mnvwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~2 .lut_mask = 64'h1100010010000000;
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y5_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnvwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mnvwx4~0_combout = ( !\soc_inst|m0_1|u_logic|F9j2z4~q & ( \soc_inst|m0_1|u_logic|Tr63z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|F9j2z4~q & ( !\soc_inst|m0_1|u_logic|Tr63z4~q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q &
+// (!\soc_inst|m0_1|u_logic|Fgm2z4~q & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F9j2z4~q & ( !\soc_inst|m0_1|u_logic|Tr63z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|F9j2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Tr63z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mnvwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~0 .lut_mask = 64'h3000100020000000;
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y7_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnvwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mnvwx4~combout = ( !\soc_inst|m0_1|u_logic|Mnvwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Mnvwx4~1_combout & (!\soc_inst|m0_1|u_logic|Mnvwx4~3_combout & !\soc_inst|m0_1|u_logic|Mnvwx4~2_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mnvwx4~1_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Mnvwx4~3_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Mnvwx4~2_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Mnvwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mnvwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mnvwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mnvwx4 .lut_mask = 64'hA000A00000000000;
+defparam \soc_inst|m0_1|u_logic|Mnvwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y10_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrdwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mrdwx4~0_combout = ( \soc_inst|m0_1|u_logic|Icxwx4~combout & ( (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mnvwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Icxwx4~combout & (
+// (\soc_inst|m0_1|u_logic|W4ywx4~0_combout & \soc_inst|m0_1|u_logic|Mnvwx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Mnvwx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Icxwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mrdwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mrdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mrdwx4~0 .lut_mask = 64'h000F000FF0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|Mrdwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y10_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrdwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mrdwx4~1_combout = ( \soc_inst|m0_1|u_logic|Qtdwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Mrdwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qtdwx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout & \soc_inst|m0_1|u_logic|Mrdwx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Mrdwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qtdwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mrdwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mrdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mrdwx4~1 .lut_mask = 64'h00F000F00FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Mrdwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y11_N32
+dffeas \soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Nnmvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jymwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jymwx4~0_combout = ( \soc_inst|m0_1|u_logic|I7owx4~combout & ( \soc_inst|interconnect_1|HRDATA[21]~29_combout & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout & (\soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Ieh3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I7owx4~combout & ( \soc_inst|interconnect_1|HRDATA[21]~29_combout & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout &
+// ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Ieh3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|I7owx4~combout & ( !\soc_inst|interconnect_1|HRDATA[21]~29_combout & ( (\soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Ieh3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I7owx4~combout & ( !\soc_inst|interconnect_1|HRDATA[21]~29_combout & ( (!\soc_inst|m0_1|u_logic|G6owx4~combout ) #
+// (\soc_inst|m0_1|u_logic|Ieh3z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ieh3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[21]~29_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jymwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jymwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jymwx4~0 .lut_mask = 64'hDDDD00DDD0D000D0;
+defparam \soc_inst|m0_1|u_logic|Jymwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jymwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jymwx4~1_combout = ( \soc_inst|m0_1|u_logic|Mrdwx4~1_combout & ( \soc_inst|m0_1|u_logic|Jymwx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # (\soc_inst|m0_1|u_logic|Gvdwx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mrdwx4~1_combout & ( \soc_inst|m0_1|u_logic|Jymwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout &
+// \soc_inst|m0_1|u_logic|Gvdwx4~0_combout )) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Gvdwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Mrdwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Jymwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jymwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jymwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jymwx4~1 .lut_mask = 64'h00000000FF0CFF3F;
+defparam \soc_inst|m0_1|u_logic|Jymwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y12_N1
+dffeas \soc_inst|m0_1|u_logic|N7c3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|K1ivx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|N7c3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N7c3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|N7c3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cymwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cymwx4~0_combout = ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout & ( ((\soc_inst|m0_1|u_logic|Uic3z4~q & \soc_inst|m0_1|u_logic|M5tvx4~0_combout )) # (\soc_inst|m0_1|u_logic|N7c3z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout
+// & ( (\soc_inst|m0_1|u_logic|Uic3z4~q & \soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Uic3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|N7c3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cymwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cymwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cymwx4~0 .lut_mask = 64'h0303030303FF03FF;
+defparam \soc_inst|m0_1|u_logic|Cymwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y11_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cymwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cymwx4~1_combout = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Mka3z4~q & \soc_inst|m0_1|u_logic|H6tvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Cymwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mka3z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Cymwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cymwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cymwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cymwx4~1 .lut_mask = 64'h000000000FAF0FAF;
+defparam \soc_inst|m0_1|u_logic|Cymwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cymwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cymwx4~2_combout = ( !\soc_inst|m0_1|u_logic|Cymwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout & (((!\soc_inst|m0_1|u_logic|I7owx4~combout )) # (\soc_inst|m0_1|u_logic|Qxa3z4~q ))) #
+// (\soc_inst|m0_1|u_logic|B7owx4~combout & (!\soc_inst|interconnect_1|HRDATA[5]~28_combout & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|Qxa3z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qxa3z4~q ),
+ .datac(!\soc_inst|interconnect_1|HRDATA[5]~28_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Cymwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cymwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cymwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cymwx4~2 .lut_mask = 64'hFA32FA3200000000;
+defparam \soc_inst|m0_1|u_logic|Cymwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y12_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cymwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cymwx4~3_combout = ( \soc_inst|m0_1|u_logic|Cymwx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout & (\soc_inst|m0_1|u_logic|Zndwx4~1_combout )) #
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout & ((\soc_inst|m0_1|u_logic|Fkdwx4~1_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Zndwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fkdwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Cymwx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cymwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cymwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cymwx4~3 .lut_mask = 64'h00000000AEBFAEBF;
+defparam \soc_inst|m0_1|u_logic|Cymwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y12_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qe0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qe0wx4~0_combout = ( \soc_inst|m0_1|u_logic|Cymwx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Jymwx4~1_combout & !\soc_inst|m0_1|u_logic|Yilwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Cymwx4~3_combout & (
+// ((!\soc_inst|m0_1|u_logic|Jymwx4~1_combout & !\soc_inst|m0_1|u_logic|Yilwx4~0_combout )) # (\soc_inst|m0_1|u_logic|W6iwx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Jymwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Cymwx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qe0wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qe0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qe0wx4~0 .lut_mask = 64'hF555F555F000F000;
+defparam \soc_inst|m0_1|u_logic|Qe0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qe0wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qe0wx4~combout = ( !\soc_inst|m0_1|u_logic|Qe0wx4~0_combout & ( \soc_inst|m0_1|u_logic|Hxmwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Twmwx4~2_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Qe0wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Hxmwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Twmwx4~2_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Twmwx4~2_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Qe0wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qe0wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qe0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qe0wx4 .lut_mask = 64'h45450000CFCF0000;
+defparam \soc_inst|m0_1|u_logic|Qe0wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y7_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Je0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Je0wx4~0_combout = ( \soc_inst|m0_1|u_logic|U6awx4~1_combout & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) #
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U6awx4~1_combout & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) #
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|U6awx4~1_combout & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) #
+// ((\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|Lf0wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout &
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U6awx4~1_combout & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) #
+// ((!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|Lf0wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout &
+// ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|U6awx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Je0wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Je0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Je0wx4~0 .lut_mask = 64'hEDE8DE8EA8A88A8A;
+defparam \soc_inst|m0_1|u_logic|Je0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y5_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mc0wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mc0wx4~1_combout = ( \soc_inst|m0_1|u_logic|Je0wx4~0_combout & ( \soc_inst|m0_1|u_logic|Add5~25_sumout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout &
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ce0wx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Je0wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Add5~25_sumout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout &
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ce0wx4~combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ce0wx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Je0wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~25_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mc0wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mc0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mc0wx4~1 .lut_mask = 64'h000088CC0000080C;
+defparam \soc_inst|m0_1|u_logic|Mc0wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y5_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mc0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mc0wx4~0_combout = ( \soc_inst|m0_1|u_logic|Qe0wx4~combout & ( \soc_inst|m0_1|u_logic|Mc0wx4~1_combout & ( (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Qe0wx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mc0wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mc0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mc0wx4~0 .lut_mask = 64'h0000000000005F7F;
+defparam \soc_inst|m0_1|u_logic|Mc0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y5_N40
+dffeas \soc_inst|m0_1|u_logic|Tch3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Tch3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tch3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tch3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y5_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iq82z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Iq82z4~0_combout = ( !\soc_inst|m0_1|u_logic|Ebh3z4~q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & (\soc_inst|m0_1|u_logic|M1j2z4~q &
+// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ebh3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Iq82z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Iq82z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Iq82z4~0 .lut_mask = 64'h0200000000000000;
+defparam \soc_inst|m0_1|u_logic|Iq82z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y4_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lo82z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lo82z4~1_combout = ( \soc_inst|m0_1|u_logic|Rz13z4~q & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|A933z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q
+// & !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rz13z4~q & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q & ((!\soc_inst|m0_1|u_logic|A933z4~q )
+// # (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|A933z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rz13z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lo82z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lo82z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lo82z4~1 .lut_mask = 64'h00000000C8000800;
+defparam \soc_inst|m0_1|u_logic|Lo82z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y5_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lo82z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lo82z4~2_combout = ( !\soc_inst|m0_1|u_logic|A8h3z4~q & ( \soc_inst|m0_1|u_logic|P9h3z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|A8h3z4~q & ( !\soc_inst|m0_1|u_logic|P9h3z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|A8h3z4~q & ( !\soc_inst|m0_1|u_logic|P9h3z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q &
+// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|A8h3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|P9h3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lo82z4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lo82z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lo82z4~2 .lut_mask = 64'h00A0008000200000;
+defparam \soc_inst|m0_1|u_logic|Lo82z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y8_N22
+dffeas \soc_inst|m0_1|u_logic|Ji43z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ji43z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ji43z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ji43z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y4_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lo82z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lo82z4~0_combout = ( !\soc_inst|m0_1|u_logic|Ji43z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Sr53z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q
+// & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ji43z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Sr53z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ji43z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Sr53z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ji43z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sr53z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lo82z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lo82z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lo82z4~0 .lut_mask = 64'h0404000404000000;
+defparam \soc_inst|m0_1|u_logic|Lo82z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y5_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lo82z4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lo82z4~3_combout = ( !\soc_inst|m0_1|u_logic|Lo82z4~2_combout & ( !\soc_inst|m0_1|u_logic|Lo82z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Iq82z4~0_combout & (!\soc_inst|m0_1|u_logic|Lo82z4~1_combout &
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tch3z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tch3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Iq82z4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lo82z4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Lo82z4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Lo82z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lo82z4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lo82z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lo82z4~3 .lut_mask = 64'hC400000000000000;
+defparam \soc_inst|m0_1|u_logic|Lo82z4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y5_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lf0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lf0wx4~0_combout = ( \soc_inst|m0_1|u_logic|Lo82z4~3_combout & ( \soc_inst|m0_1|u_logic|D9uwx4~combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Tzg3z4~q )) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((!\soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lo82z4~3_combout & ( \soc_inst|m0_1|u_logic|D9uwx4~combout & (
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Tzg3z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((!\soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Lo82z4~3_combout & ( !\soc_inst|m0_1|u_logic|D9uwx4~combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Tzg3z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// (((!\soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lo82z4~3_combout & ( !\soc_inst|m0_1|u_logic|D9uwx4~combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Tzg3z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((!\soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tzg3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Lo82z4~3_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|D9uwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lf0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lf0wx4~0 .lut_mask = 64'hACAFACAFACAFACA0;
+defparam \soc_inst|m0_1|u_logic|Lf0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y5_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~1_sumout = SUM(( !\soc_inst|m0_1|u_logic|E5awx4~1_combout $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout &
+// \soc_inst|m0_1|u_logic|N90wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~26 ))
+// \soc_inst|m0_1|u_logic|Add5~2 = CARRY(( !\soc_inst|m0_1|u_logic|E5awx4~1_combout $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout &
+// \soc_inst|m0_1|u_logic|N90wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~26 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|E5awx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|N90wx4~0_combout ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add5~26 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add5~1_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add5~2 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~1 .lut_mask = 64'h0000FF5500003FC0;
+defparam \soc_inst|m0_1|u_logic|Add5~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y13_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~61 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~61_sumout = SUM(( !\soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE_q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~66 ))
+// \soc_inst|m0_1|u_logic|Add2~62 = CARRY(( !\soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE_q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~66 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add2~66 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add2~61_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add2~62 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~61 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~61 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~61 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~105 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~105_sumout = SUM(( !\soc_inst|m0_1|u_logic|Nox2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~62 ))
+// \soc_inst|m0_1|u_logic|Add2~106 = CARRY(( !\soc_inst|m0_1|u_logic|Nox2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~62 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Nox2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add2~62 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add2~105_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add2~106 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~105 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~105 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~105 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y12_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~117 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~117_sumout = SUM(( !\soc_inst|m0_1|u_logic|Kaf3z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~106 ))
+// \soc_inst|m0_1|u_logic|Add2~118 = CARRY(( !\soc_inst|m0_1|u_logic|Kaf3z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~106 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Kaf3z4~q ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add2~106 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add2~117_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add2~118 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~117 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~117 .lut_mask = 64'h0000FFFF0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add2~117 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zdhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zdhvx4~0_combout = ( \soc_inst|m0_1|u_logic|Add2~117_sumout & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ))) #
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & (\soc_inst|m0_1|u_logic|Kaf3z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add2~117_sumout & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Kaf3z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Kaf3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Add2~117_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zdhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zdhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zdhvx4~0 .lut_mask = 64'hDDDDD1D100000000;
+defparam \soc_inst|m0_1|u_logic|Zdhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y13_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oa3wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oa3wx4~0_combout = ( \soc_inst|m0_1|u_logic|Yilwx4~0_combout & ( (\soc_inst|m0_1|u_logic|W6iwx4~combout & !\soc_inst|m0_1|u_logic|G9lwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Yilwx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Walwx4~1_combout ) # ((\soc_inst|m0_1|u_logic|W6iwx4~combout & !\soc_inst|m0_1|u_logic|G9lwx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|G9lwx4~0_combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Walwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Oa3wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oa3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oa3wx4~0 .lut_mask = 64'hFF44FF4444444444;
+defparam \soc_inst|m0_1|u_logic|Oa3wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oa3wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oa3wx4~1_combout = ( !\soc_inst|m0_1|u_logic|Oa3wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout & (!\soc_inst|m0_1|u_logic|Palwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|U9lwx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|U9lwx4~1_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Oa3wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Oa3wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oa3wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oa3wx4~1 .lut_mask = 64'hF5C4F5C400000000;
+defparam \soc_inst|m0_1|u_logic|Oa3wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y13_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oa3wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oa3wx4~combout = ( \soc_inst|m0_1|u_logic|Oa3wx4~1_combout & ( (((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & \soc_inst|m0_1|u_logic|B8nwx4~1_combout )) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Oa3wx4~1_combout ),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Oa3wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oa3wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oa3wx4 .lut_mask = 64'h0000777F0000777F;
+defparam \soc_inst|m0_1|u_logic|Oa3wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zdhvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zdhvx4~1_combout = ( \soc_inst|m0_1|u_logic|Xdfwx4~combout & ( \soc_inst|m0_1|u_logic|Oa3wx4~combout & ( (!\soc_inst|m0_1|u_logic|Add5~125_sumout & \soc_inst|m0_1|u_logic|Zdhvx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Xdfwx4~combout & ( \soc_inst|m0_1|u_logic|Oa3wx4~combout & ( \soc_inst|m0_1|u_logic|Zdhvx4~0_combout ) ) ) # ( \soc_inst|m0_1|u_logic|Xdfwx4~combout & ( !\soc_inst|m0_1|u_logic|Oa3wx4~combout & (
+// (!\soc_inst|m0_1|u_logic|Add5~125_sumout & (\soc_inst|m0_1|u_logic|Zdhvx4~0_combout & !\soc_inst|m0_1|u_logic|H4nwx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xdfwx4~combout & ( !\soc_inst|m0_1|u_logic|Oa3wx4~combout & (
+// (\soc_inst|m0_1|u_logic|Zdhvx4~0_combout & !\soc_inst|m0_1|u_logic|H4nwx4~combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Add5~125_sumout ),
+ .datac(!\soc_inst|m0_1|u_logic|Zdhvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Oa3wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zdhvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zdhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zdhvx4~1 .lut_mask = 64'h0F000C000F0F0C0C;
+defparam \soc_inst|m0_1|u_logic|Zdhvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y13_N37
+dffeas \soc_inst|m0_1|u_logic|Kaf3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Zdhvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Kaf3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kaf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kaf3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Duhvx4~0_combout = ( \soc_inst|m0_1|u_logic|Xyk2z4~q & ( (\soc_inst|m0_1|u_logic|S5pvx4~combout & (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & \soc_inst|m0_1|u_logic|Add2~113_sumout )) ) ) # ( !\soc_inst|m0_1|u_logic|Xyk2z4~q &
+// ( ((\soc_inst|m0_1|u_logic|S5pvx4~combout & \soc_inst|m0_1|u_logic|Add2~113_sumout )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Add2~113_sumout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xyk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Duhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Duhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Duhvx4~0 .lut_mask = 64'h3737373704040404;
+defparam \soc_inst|m0_1|u_logic|Duhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y12_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duhvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Duhvx4~1_combout = ( \soc_inst|m0_1|u_logic|Add5~121_sumout & ( \soc_inst|m0_1|u_logic|O3pvx4~combout & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout & (!\soc_inst|m0_1|u_logic|Duhvx4~0_combout &
+// !\soc_inst|m0_1|u_logic|Lefwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~121_sumout & ( \soc_inst|m0_1|u_logic|O3pvx4~combout & ( (!\soc_inst|m0_1|u_logic|Duhvx4~0_combout & !\soc_inst|m0_1|u_logic|Lefwx4~0_combout ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Add5~121_sumout & ( !\soc_inst|m0_1|u_logic|O3pvx4~combout & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout & (!\soc_inst|m0_1|u_logic|Duhvx4~0_combout & (!\soc_inst|m0_1|u_logic|H4nwx4~combout &
+// !\soc_inst|m0_1|u_logic|Lefwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~121_sumout & ( !\soc_inst|m0_1|u_logic|O3pvx4~combout & ( (!\soc_inst|m0_1|u_logic|Duhvx4~0_combout & (!\soc_inst|m0_1|u_logic|H4nwx4~combout &
+// !\soc_inst|m0_1|u_logic|Lefwx4~0_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Duhvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Add5~121_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|O3pvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Duhvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Duhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Duhvx4~1 .lut_mask = 64'hC0008000CC008800;
+defparam \soc_inst|m0_1|u_logic|Duhvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X35_Y12_N26
+dffeas \soc_inst|m0_1|u_logic|Xyk2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Duhvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Xyk2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xyk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xyk2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y5_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~109 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~109_sumout = SUM(( !\soc_inst|m0_1|u_logic|Xyk2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~114 ))
+// \soc_inst|m0_1|u_logic|Add3~110 = CARRY(( !\soc_inst|m0_1|u_logic|Xyk2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~114 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Xyk2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add3~114 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add3~109_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add3~110 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add3~109 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~109 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~109 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y5_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y1pvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y1pvx4~combout = ( !\soc_inst|m0_1|u_logic|Add5~121_sumout & ( \soc_inst|m0_1|u_logic|K1wvx4~combout & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout & (((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) #
+// (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout & (!\soc_inst|m0_1|u_logic|Add3~109_sumout & ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout )))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Add5~121_sumout & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout & (((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout )))) #
+// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout & (!\soc_inst|m0_1|u_logic|Add3~109_sumout & ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~121_sumout & (
+// !\soc_inst|m0_1|u_logic|K1wvx4~combout & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout & (((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout &
+// (!\soc_inst|m0_1|u_logic|Add3~109_sumout & ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Add3~109_sumout ),
+ .datac(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Gtnvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Add5~121_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Y1pvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y1pvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y1pvx4 .lut_mask = 64'hE0EEE0EEE0EE0000;
+defparam \soc_inst|m0_1|u_logic|Y1pvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y5_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vjnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vjnvx4~0_combout = ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout & ( (\soc_inst|m0_1|u_logic|Orewx4~0_combout & !\soc_inst|m0_1|u_logic|Xyk2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout & ( !\soc_inst|m0_1|u_logic|Q7j2z4~q
+// ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Q7j2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Xyk2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vjnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vjnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vjnvx4~0 .lut_mask = 64'hF0F0F0F055005500;
+defparam \soc_inst|m0_1|u_logic|Vjnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y5_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vjnvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vjnvx4~1_combout = ( !\soc_inst|m0_1|u_logic|Vjnvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout & ((!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Z7i2z4~q )))) #
+// (\soc_inst|m0_1|u_logic|R1pvx4~0_combout & (\soc_inst|m0_1|u_logic|Y1pvx4~combout & ((!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z7i2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Z7i2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Y1pvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Vjnvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vjnvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vjnvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vjnvx4~1 .lut_mask = 64'h8ACF8ACF00000000;
+defparam \soc_inst|m0_1|u_logic|Vjnvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y5_N5
+dffeas \soc_inst|m0_1|u_logic|Q7j2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Vjnvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Q7j2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q7j2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Q7j2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y4_N14
+dffeas \soc_inst|m0_1|u_logic|Dy23z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Dy23z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dy23z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dy23z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y4_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Py72z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Py72z4~1_combout = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|Uo13z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Dy23z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Dy23z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Uo13z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Py72z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Py72z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Py72z4~1 .lut_mask = 64'h00000000A0880000;
+defparam \soc_inst|m0_1|u_logic|Py72z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X40_Y4_N20
+dffeas \soc_inst|m0_1|u_logic|Wo03z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wo03z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wo03z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wo03z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y4_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Py72z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Py72z4~2_combout = ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Csz2z4~q & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Wo03z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wo03z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Csz2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Py72z4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Py72z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Py72z4~2 .lut_mask = 64'h008800C000000000;
+defparam \soc_inst|m0_1|u_logic|Py72z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y6_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Py72z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Py72z4~0_combout = ( !\soc_inst|m0_1|u_logic|M743z4~q & ( \soc_inst|m0_1|u_logic|Vg53z4~q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|M743z4~q & ( !\soc_inst|m0_1|u_logic|Vg53z4~q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|M743z4~q & ( !\soc_inst|m0_1|u_logic|Vg53z4~q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|M743z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Vg53z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Py72z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Py72z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Py72z4~0 .lut_mask = 64'h0202000202000000;
+defparam \soc_inst|m0_1|u_logic|Py72z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y4_N32
+dffeas \soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y4_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M082z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|M082z4~0_combout = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|M1j2z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|Fgm2z4~q & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|M082z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M082z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M082z4~0 .lut_mask = 64'h0000000008000000;
+defparam \soc_inst|m0_1|u_logic|M082z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y4_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Py72z4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Py72z4~3_combout = ( !\soc_inst|m0_1|u_logic|Py72z4~0_combout & ( !\soc_inst|m0_1|u_logic|M082z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Py72z4~1_combout & (!\soc_inst|m0_1|u_logic|Py72z4~2_combout &
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xhl2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Py72z4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Xhl2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Py72z4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Py72z4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|M082z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Py72z4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Py72z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Py72z4~3 .lut_mask = 64'hA020000000000000;
+defparam \soc_inst|m0_1|u_logic|Py72z4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y4_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nozvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nozvx4~0_combout = ( \soc_inst|m0_1|u_logic|U7uwx4~combout & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (\soc_inst|m0_1|u_logic|Q7j2z4~q & !\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|U7uwx4~combout & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (\soc_inst|m0_1|u_logic|Q7j2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// ((\soc_inst|m0_1|u_logic|Py72z4~3_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|U7uwx4~combout & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((\soc_inst|m0_1|u_logic|Q7j2z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (\soc_inst|m0_1|u_logic|Lgi3z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|U7uwx4~combout & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// ((\soc_inst|m0_1|u_logic|Q7j2z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (\soc_inst|m0_1|u_logic|Lgi3z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lgi3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Q7j2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Py72z4~3_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|U7uwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nozvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nozvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nozvx4~0 .lut_mask = 64'h33553355330F3300;
+defparam \soc_inst|m0_1|u_logic|Nozvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y5_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Locvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Locvx4~combout = ( \soc_inst|m0_1|u_logic|Donvx4~2_combout & ( \soc_inst|m0_1|u_logic|Nozvx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|Donvx4~2_combout & ( \soc_inst|m0_1|u_logic|Nozvx4~0_combout ) ) # (
+// \soc_inst|m0_1|u_logic|Donvx4~2_combout & ( !\soc_inst|m0_1|u_logic|Nozvx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Nozvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Locvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Locvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Locvx4 .lut_mask = 64'h0000FFFFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Locvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y6_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xmzvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xmzvx4~0_combout = ( \soc_inst|m0_1|u_logic|Kqzvx4~combout & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Znzvx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Kqzvx4~combout & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Znzvx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Znzvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Kqzvx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xmzvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xmzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xmzvx4~0 .lut_mask = 64'hAA88FFCC00000000;
+defparam \soc_inst|m0_1|u_logic|Xmzvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y6_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xmzvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xmzvx4~1_combout = ( \soc_inst|m0_1|u_logic|Ppzvx4~1_combout & ( !\soc_inst|m0_1|u_logic|R7iwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Xmzvx4~0_combout & (!\soc_inst|m0_1|u_logic|Uozvx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Add5~57_sumout ) # (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Add5~57_sumout ),
+ .datac(!\soc_inst|m0_1|u_logic|Xmzvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Uozvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ppzvx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xmzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xmzvx4~1 .lut_mask = 64'h00000D0000000000;
+defparam \soc_inst|m0_1|u_logic|Xmzvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y6_N1
+dffeas \soc_inst|m0_1|u_logic|N3v2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|N3v2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N3v2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|N3v2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y4_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U7uwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U7uwx4~0_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|C193z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Pbl2z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|N3v2z4~q ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Edl2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|N3v2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Pbl2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|C193z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Edl2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U7uwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U7uwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U7uwx4~0 .lut_mask = 64'h00FF555533330F0F;
+defparam \soc_inst|m0_1|u_logic|U7uwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y5_N4
+dffeas \soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y4_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U7uwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U7uwx4~1_combout = ( \soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Eq63z4~q )) #
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Nz73z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|Eq63z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Nz73z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (
+// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Eut2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|Eut2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Eq63z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Eut2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Nz73z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U7uwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U7uwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U7uwx4~1 .lut_mask = 64'h0303CFCF44774477;
+defparam \soc_inst|m0_1|u_logic|U7uwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y4_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U7uwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U7uwx4~combout = ( \soc_inst|m0_1|u_logic|U7uwx4~1_combout & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|U7uwx4~0_combout & \soc_inst|m0_1|u_logic|Fgm2z4~q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|U7uwx4~1_combout & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|U7uwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Fgm2z4~q ) ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|U7uwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|U7uwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U7uwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U7uwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U7uwx4 .lut_mask = 64'h00000000FFF000F0;
+defparam \soc_inst|m0_1|u_logic|U7uwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y10_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uvdwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uvdwx4~0_combout = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( !\soc_inst|m0_1|u_logic|Feqwx4~combout ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( !\soc_inst|m0_1|u_logic|U7uwx4~combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|U7uwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Feqwx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Uvdwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uvdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uvdwx4~0 .lut_mask = 64'hF0F0F0F0FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Uvdwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y10_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gvdwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gvdwx4~0_combout = ( \soc_inst|m0_1|u_logic|Yvtwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Uvdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Yvtwx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|Uvdwx4~0_combout & \soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Uvdwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Yvtwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gvdwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gvdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gvdwx4~0 .lut_mask = 64'h000F000FFF0FFF0F;
+defparam \soc_inst|m0_1|u_logic|Gvdwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y12_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M5ewx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|M5ewx4~0_combout = ( \soc_inst|m0_1|u_logic|Gftwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Oldwx4~0_combout & (!\soc_inst|m0_1|u_logic|Qdtwx4~combout & !\soc_inst|m0_1|u_logic|Gvdwx4~0_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Gftwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Qdtwx4~combout & ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Gvdwx4~0_combout ))) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Qdtwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Gvdwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Gftwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|M5ewx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M5ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M5ewx4~0 .lut_mask = 64'hF0C0F0C030003000;
+defparam \soc_inst|m0_1|u_logic|M5ewx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pgfwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pgfwx4~0_combout = ( \soc_inst|m0_1|u_logic|M5ewx4~0_combout & ( ((\soc_inst|m0_1|u_logic|M7qwx4~0_combout & \soc_inst|m0_1|u_logic|Qdtwx4~combout )) # (\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) ) ) # (
+// !\soc_inst|m0_1|u_logic|M5ewx4~0_combout & ( (\soc_inst|m0_1|u_logic|M7qwx4~0_combout & \soc_inst|m0_1|u_logic|Qdtwx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Qdtwx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|M5ewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pgfwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pgfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pgfwx4~0 .lut_mask = 64'h0033003355775577;
+defparam \soc_inst|m0_1|u_logic|Pgfwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pgfwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pgfwx4~1_combout = ( !\soc_inst|m0_1|u_logic|Pgfwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|T2owx4~1_combout & ((!\soc_inst|interconnect_1|HRDATA[25]~18_combout ) # (!\soc_inst|m0_1|u_logic|B7owx4~combout ))) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|interconnect_1|HRDATA[25]~18_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pgfwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pgfwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pgfwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pgfwx4~1 .lut_mask = 64'hF0C0F0C000000000;
+defparam \soc_inst|m0_1|u_logic|Pgfwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ppzvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ppzvx4~0_combout = ( \soc_inst|m0_1|u_logic|F8iwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Khfwx4~3_combout & \soc_inst|m0_1|u_logic|W6iwx4~combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|F8iwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Khfwx4~3_combout & \soc_inst|m0_1|u_logic|W6iwx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Khfwx4~3_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ppzvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ppzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ppzvx4~0 .lut_mask = 64'h00F000F0AAFAAAFA;
+defparam \soc_inst|m0_1|u_logic|Ppzvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y12_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ppzvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ppzvx4~1_combout = ( \soc_inst|m0_1|u_logic|H9iwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Ppzvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|H9iwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Ppzvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Pgfwx4~1_combout & ((!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Pgfwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ppzvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ppzvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ppzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ppzvx4~1 .lut_mask = 64'h0A0FAAFF00000000;
+defparam \soc_inst|m0_1|u_logic|Ppzvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y12_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oihvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oihvx4~2_combout = ( \soc_inst|m0_1|u_logic|Ppzvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|R7iwx4~0_combout & (\soc_inst|m0_1|u_logic|H4nwx4~combout & !\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Ppzvx4~1_combout & ( \soc_inst|m0_1|u_logic|H4nwx4~combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ppzvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Oihvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oihvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oihvx4~2 .lut_mask = 64'h0F0F0F0F0A000A00;
+defparam \soc_inst|m0_1|u_logic|Oihvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y8_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oihvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oihvx4~1_combout = ( \soc_inst|m0_1|u_logic|S5pvx4~combout & ( \soc_inst|m0_1|u_logic|Add5~57_sumout & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Add2~77_sumout ))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & (\soc_inst|m0_1|u_logic|Zpx2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S5pvx4~combout & ( \soc_inst|m0_1|u_logic|Add5~57_sumout & (
+// (!\soc_inst|m0_1|u_logic|Xdfwx4~combout & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zpx2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|S5pvx4~combout & ( !\soc_inst|m0_1|u_logic|Add5~57_sumout & (
+// (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Add2~77_sumout ))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & (\soc_inst|m0_1|u_logic|Zpx2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|S5pvx4~combout & (
+// !\soc_inst|m0_1|u_logic|Add5~57_sumout & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zpx2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Zpx2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Add2~77_sumout ),
+ .datae(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~57_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Oihvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oihvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oihvx4~1 .lut_mask = 64'hBBBBBB11B0B0B010;
+defparam \soc_inst|m0_1|u_logic|Oihvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oihvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oihvx4~0_combout = ( \soc_inst|m0_1|u_logic|Oihvx4~1_combout & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Oihvx4~2_combout ) #
+// ((\soc_inst|m0_1|u_logic|B8nwx4~1_combout & \soc_inst|m0_1|u_logic|Ppzvx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Oihvx4~1_combout & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Oihvx4~2_combout &
+// !\soc_inst|m0_1|u_logic|Lefwx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Oihvx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ppzvx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Oihvx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Oihvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oihvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oihvx4~0 .lut_mask = 64'h0000CC000000CD00;
+defparam \soc_inst|m0_1|u_logic|Oihvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X35_Y12_N1
+dffeas \soc_inst|m0_1|u_logic|Zpx2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Oihvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Zpx2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zpx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zpx2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y5_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~73 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~73_sumout = SUM(( !\soc_inst|m0_1|u_logic|Zpx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~110 ))
+// \soc_inst|m0_1|u_logic|Add3~74 = CARRY(( !\soc_inst|m0_1|u_logic|Zpx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~110 ))
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Zpx2z4~q ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add3~110 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add3~73_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add3~74 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add3~73 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~73 .lut_mask = 64'h0000FFFF0000CCCC;
+defparam \soc_inst|m0_1|u_logic|Add3~73 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y5_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rnovx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rnovx4~combout = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( \soc_inst|m0_1|u_logic|Add5~57_sumout & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout & (\soc_inst|m0_1|u_logic|Nozvx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # (!\soc_inst|m0_1|u_logic|Add3~73_sumout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( \soc_inst|m0_1|u_logic|Add5~57_sumout & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout &
+// ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # (!\soc_inst|m0_1|u_logic|Add3~73_sumout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( !\soc_inst|m0_1|u_logic|Add5~57_sumout & ( (\soc_inst|m0_1|u_logic|Nozvx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # (!\soc_inst|m0_1|u_logic|Add3~73_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( !\soc_inst|m0_1|u_logic|Add5~57_sumout & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) #
+// (!\soc_inst|m0_1|u_logic|Add3~73_sumout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Nozvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Add3~73_sumout ),
+ .datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~57_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rnovx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rnovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rnovx4 .lut_mask = 64'hFFF03330AAA02220;
+defparam \soc_inst|m0_1|u_logic|Rnovx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y4_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C1lvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C1lvx4~0_combout = ( \soc_inst|m0_1|u_logic|Lgi3z4~q & ( \soc_inst|m0_1|u_logic|Rnovx4~combout & ( (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Zpx2z4~q )) )
+// ) ) # ( !\soc_inst|m0_1|u_logic|Lgi3z4~q & ( \soc_inst|m0_1|u_logic|Rnovx4~combout & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zpx2z4~q ))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Lgi3z4~q & ( !\soc_inst|m0_1|u_logic|Rnovx4~combout & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Zpx2z4~q
+// )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lgi3z4~q & ( !\soc_inst|m0_1|u_logic|Rnovx4~combout & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout & (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Zpx2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Zpx2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Lgi3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rnovx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C1lvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C1lvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C1lvx4~0 .lut_mask = 64'h2300EF002323EFEF;
+defparam \soc_inst|m0_1|u_logic|C1lvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X39_Y4_N16
+dffeas \soc_inst|m0_1|u_logic|Lgi3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|C1lvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Lgi3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lgi3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lgi3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X39_Y6_N11
+dffeas \soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y4_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ow23z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ow23z4~feeder_combout = ( \soc_inst|m0_1|u_logic|Uhzvx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ow23z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ow23z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ow23z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ow23z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y4_N50
+dffeas \soc_inst|m0_1|u_logic|Ow23z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Ow23z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ow23z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ow23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ow23z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y4_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fn13z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fn13z4~feeder_combout = ( \soc_inst|m0_1|u_logic|Uhzvx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fn13z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fn13z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fn13z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Fn13z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y4_N56
+dffeas \soc_inst|m0_1|u_logic|Fn13z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Fn13z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Fn13z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fn13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fn13z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y4_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ds72z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ds72z4~1_combout = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q & ((!\soc_inst|m0_1|u_logic|Fn13z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q & (!\soc_inst|m0_1|u_logic|Ow23z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ow23z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fn13z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ds72z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ds72z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ds72z4~1 .lut_mask = 64'h0C0A000000000000;
+defparam \soc_inst|m0_1|u_logic|Ds72z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y6_N38
+dffeas \soc_inst|m0_1|u_logic|X543z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|X543z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X543z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X543z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y6_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ds72z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ds72z4~0_combout = ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( (!\soc_inst|m0_1|u_logic|Gf53z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) ) #
+// ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q & ( (!\soc_inst|m0_1|u_logic|X543z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|X543z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Gf53z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ds72z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ds72z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ds72z4~0 .lut_mask = 64'h00000A0000000C00;
+defparam \soc_inst|m0_1|u_logic|Ds72z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X40_Y4_N26
+dffeas \soc_inst|m0_1|u_logic|Hn03z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Hn03z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hn03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hn03z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X40_Y4_N14
+dffeas \soc_inst|m0_1|u_logic|Nqz2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Nqz2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nqz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nqz2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y4_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ds72z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ds72z4~2_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// (!\soc_inst|m0_1|u_logic|Hn03z4~q )) # (\soc_inst|m0_1|u_logic|Fgm2z4~q & ((!\soc_inst|m0_1|u_logic|Nqz2z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Hn03z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Nqz2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ds72z4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ds72z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ds72z4~2 .lut_mask = 64'h000088C000000000;
+defparam \soc_inst|m0_1|u_logic|Ds72z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y7_N5
+dffeas \soc_inst|m0_1|u_logic|O5k2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|O5k2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O5k2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|O5k2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y7_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Au72z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Au72z4~0_combout = ( !\soc_inst|m0_1|u_logic|O5k2z4~q & ( \soc_inst|m0_1|u_logic|M1j2z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Sjj2z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~q &
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|O5k2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Au72z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Au72z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Au72z4~0 .lut_mask = 64'h0000000040000000;
+defparam \soc_inst|m0_1|u_logic|Au72z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y6_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ds72z4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ds72z4~3_combout = ( !\soc_inst|m0_1|u_logic|Ds72z4~2_combout & ( !\soc_inst|m0_1|u_logic|Au72z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ds72z4~1_combout & (!\soc_inst|m0_1|u_logic|Ds72z4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ds72z4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ds72z4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ds72z4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Au72z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ds72z4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ds72z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ds72z4~3 .lut_mask = 64'hB000000000000000;
+defparam \soc_inst|m0_1|u_logic|Ds72z4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y6_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hlzvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hlzvx4~0_combout = ( \soc_inst|m0_1|u_logic|S8k2z4~q & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (\soc_inst|m0_1|u_logic|Lgi3z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// (((\soc_inst|m0_1|u_logic|Ds72z4~3_combout & !\soc_inst|m0_1|u_logic|Feqwx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S8k2z4~q & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// (\soc_inst|m0_1|u_logic|Lgi3z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((\soc_inst|m0_1|u_logic|Ds72z4~3_combout & !\soc_inst|m0_1|u_logic|Feqwx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|S8k2z4~q & (
+// !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # (\soc_inst|m0_1|u_logic|Lgi3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|S8k2z4~q & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (\soc_inst|m0_1|u_logic|Lgi3z4~q &
+// !\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lgi3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ds72z4~3_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Feqwx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|S8k2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hlzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hlzvx4~0 .lut_mask = 64'h50505F5F53505350;
+defparam \soc_inst|m0_1|u_logic|Hlzvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y3_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rjzvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rjzvx4~1_combout = ( \soc_inst|m0_1|u_logic|H3awx4~0_combout & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout & ((!\soc_inst|m0_1|u_logic|O3awx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3awx4~0_combout & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout & !\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|H3awx4~0_combout & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|O3awx4~0_combout & (((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout )))) #
+// (\soc_inst|m0_1|u_logic|O3awx4~0_combout & ((!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|H3awx4~0_combout & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|H3awx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rjzvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rjzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rjzvx4~1 .lut_mask = 64'hCFC0EF4A0F000F0A;
+defparam \soc_inst|m0_1|u_logic|Rjzvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y6_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uhzvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uhzvx4~1_combout = ( \soc_inst|m0_1|u_logic|Djzvx4~combout & ( \soc_inst|m0_1|u_logic|Add5~5_sumout & ( (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout &
+// \soc_inst|m0_1|u_logic|Rjzvx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Djzvx4~combout & ( \soc_inst|m0_1|u_logic|Add5~5_sumout & ( (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout & (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & \soc_inst|m0_1|u_logic|Rjzvx4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Djzvx4~combout & ( !\soc_inst|m0_1|u_logic|Add5~5_sumout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout &
+// \soc_inst|m0_1|u_logic|Rjzvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Djzvx4~combout & ( !\soc_inst|m0_1|u_logic|Add5~5_sumout & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout &
+// \soc_inst|m0_1|u_logic|Rjzvx4~1_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Rjzvx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Djzvx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~5_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Uhzvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uhzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uhzvx4~1 .lut_mask = 64'h00C000F000400050;
+defparam \soc_inst|m0_1|u_logic|Uhzvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y6_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uhzvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uhzvx4~0_combout = ( \soc_inst|m0_1|u_logic|Uhzvx4~1_combout & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Yjzvx4~1_combout & (((\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|B8nwx4~1_combout )) # (\soc_inst|m0_1|u_logic|R7iwx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Uhzvx4~1_combout & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Yjzvx4~1_combout &
+// ((\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) # (\soc_inst|m0_1|u_logic|R7iwx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Yjzvx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Uhzvx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uhzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uhzvx4~0 .lut_mask = 64'h0000005F0000007F;
+defparam \soc_inst|m0_1|u_logic|Uhzvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y6_N44
+dffeas \soc_inst|m0_1|u_logic|Gf53z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Gf53z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gf53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gf53z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y6_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Djzvx4~3_combout = ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Gf53z4~q ) # ((!\soc_inst|m0_1|u_logic|Ow23z4~q & \soc_inst|m0_1|u_logic|Ld1xx4~0_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Sd1xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ow23z4~q & \soc_inst|m0_1|u_logic|Ld1xx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Gf53z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ow23z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Djzvx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Djzvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~3 .lut_mask = 64'h00F000F0CCFCCCFC;
+defparam \soc_inst|m0_1|u_logic|Djzvx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y4_N55
+dffeas \soc_inst|m0_1|u_logic|Fn13z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Fn13z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Fn13z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fn13z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fn13z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y5_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Djzvx4~0_combout = ( \soc_inst|m0_1|u_logic|Jc1xx4~0_combout & ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Fn13z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Z3k2z4~q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Jc1xx4~0_combout & ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Fn13z4~DUPLICATE_q ) ) ) # ( \soc_inst|m0_1|u_logic|Jc1xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Y91xx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Z3k2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Fn13z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Z3k2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Djzvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Djzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~0 .lut_mask = 64'h0000F0F0CCCCFCFC;
+defparam \soc_inst|m0_1|u_logic|Djzvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y6_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Djzvx4~2_combout = ( \soc_inst|m0_1|u_logic|V41xx4~0_combout & ( \soc_inst|m0_1|u_logic|V0k2z4~q & ( (\soc_inst|m0_1|u_logic|Ab1xx4~0_combout & !\soc_inst|m0_1|u_logic|X543z4~q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|V41xx4~0_combout & ( \soc_inst|m0_1|u_logic|V0k2z4~q & ( (\soc_inst|m0_1|u_logic|Ab1xx4~0_combout & !\soc_inst|m0_1|u_logic|X543z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|V41xx4~0_combout & ( !\soc_inst|m0_1|u_logic|V0k2z4~q ) )
+// # ( !\soc_inst|m0_1|u_logic|V41xx4~0_combout & ( !\soc_inst|m0_1|u_logic|V0k2z4~q & ( (\soc_inst|m0_1|u_logic|Ab1xx4~0_combout & !\soc_inst|m0_1|u_logic|X543z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|X543z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|V0k2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Djzvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Djzvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~2 .lut_mask = 64'h5500FFFF55005500;
+defparam \soc_inst|m0_1|u_logic|Djzvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y6_N44
+dffeas \soc_inst|m0_1|u_logic|Yx73z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Yx73z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yx73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yx73z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y6_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Djzvx4~6_combout = ( !\soc_inst|m0_1|u_logic|Pst2z4~q & ( \soc_inst|m0_1|u_logic|Y1v2z4~q & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Pst2z4~q & ( !\soc_inst|m0_1|u_logic|Y1v2z4~q & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pst2z4~q & ( !\soc_inst|m0_1|u_logic|Y1v2z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Pst2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Y1v2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Djzvx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Djzvx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~6 .lut_mask = 64'h0300010002000000;
+defparam \soc_inst|m0_1|u_logic|Djzvx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y6_N17
+dffeas \soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y4_N1
+dffeas \soc_inst|m0_1|u_logic|Po63z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Po63z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Po63z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Po63z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y6_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Djzvx4~5_combout = ( !\soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Po63z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Yaz2z4~q &
+// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Po63z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Po63z4~DUPLICATE_q & (
+// (\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q $ (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Po63z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Djzvx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Djzvx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~5 .lut_mask = 64'h0021002000010000;
+defparam \soc_inst|m0_1|u_logic|Djzvx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y6_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Djzvx4~7_combout = ( !\soc_inst|m0_1|u_logic|Djzvx4~5_combout & ( \soc_inst|m0_1|u_logic|C51xx4~0_combout & ( (\soc_inst|m0_1|u_logic|O5k2z4~q & (!\soc_inst|m0_1|u_logic|Djzvx4~6_combout &
+// ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yx73z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Djzvx4~5_combout & ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Djzvx4~6_combout &
+// ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yx73z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Yx73z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|O5k2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Djzvx4~6_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Djzvx4~5_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Djzvx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Djzvx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~7 .lut_mask = 64'hBB0000000B000000;
+defparam \soc_inst|m0_1|u_logic|Djzvx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y4_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Djzvx4~1_combout = ( \soc_inst|m0_1|u_logic|U71xx4~0_combout & ( \soc_inst|m0_1|u_logic|Ta1xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|K2k2z4~q ) # (!\soc_inst|m0_1|u_logic|S8k2z4~q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|U71xx4~0_combout & ( \soc_inst|m0_1|u_logic|Ta1xx4~0_combout & ( !\soc_inst|m0_1|u_logic|S8k2z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|U71xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ta1xx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|K2k2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|K2k2z4~q ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|S8k2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Djzvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Djzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~1 .lut_mask = 64'h0000CCCCFF00FFCC;
+defparam \soc_inst|m0_1|u_logic|Djzvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X40_Y4_N13
+dffeas \soc_inst|m0_1|u_logic|Nqz2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Nqz2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nqz2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nqz2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X40_Y4_N25
+dffeas \soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X39_Y6_N10
+dffeas \soc_inst|m0_1|u_logic|D7k2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|D7k2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D7k2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|D7k2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y4_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Djzvx4~4_combout = ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout & ( \soc_inst|m0_1|u_logic|L61xx4~0_combout & ( (\soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|D7k2z4~q &
+// ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nqz2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout & ( \soc_inst|m0_1|u_logic|L61xx4~0_combout & ( (\soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nqz2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout & ( !\soc_inst|m0_1|u_logic|L61xx4~0_combout & ( (\soc_inst|m0_1|u_logic|D7k2z4~q &
+// ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nqz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout & ( !\soc_inst|m0_1|u_logic|L61xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Nqz2z4~DUPLICATE_q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nqz2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|N71xx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|D7k2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Djzvx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Djzvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~4 .lut_mask = 64'hF5F500F531310031;
+defparam \soc_inst|m0_1|u_logic|Djzvx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y6_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Djzvx4~combout = ( !\soc_inst|m0_1|u_logic|Djzvx4~1_combout & ( \soc_inst|m0_1|u_logic|Djzvx4~4_combout & ( (!\soc_inst|m0_1|u_logic|Djzvx4~3_combout & (!\soc_inst|m0_1|u_logic|Djzvx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Djzvx4~2_combout & \soc_inst|m0_1|u_logic|Djzvx4~7_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Djzvx4~3_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Djzvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Djzvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Djzvx4~7_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Djzvx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Djzvx4~4_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Djzvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Djzvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4 .lut_mask = 64'h0000000000800000;
+defparam \soc_inst|m0_1|u_logic|Djzvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y6_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H3awx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H3awx4~0_combout = ( \soc_inst|m0_1|u_logic|Djzvx4~combout & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Djzvx4~combout & (
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Djzvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H3awx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H3awx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H3awx4~0 .lut_mask = 64'hEEEEEEEEFF55FF55;
+defparam \soc_inst|m0_1|u_logic|H3awx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y5_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~89 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~89_sumout = SUM(( (!\soc_inst|m0_1|u_logic|Yih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout & ((\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|W19wx4~0_combout & !\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) + ( !\soc_inst|m0_1|u_logic|Hrcvx4~combout ) + ( \soc_inst|m0_1|u_logic|Add5~6 ))
+// \soc_inst|m0_1|u_logic|Add5~90 = CARRY(( (!\soc_inst|m0_1|u_logic|Yih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout & ((\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|W19wx4~0_combout & !\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) + ( !\soc_inst|m0_1|u_logic|Hrcvx4~combout ) + ( \soc_inst|m0_1|u_logic|Add5~6 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Yih2z4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Hrcvx4~combout ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add5~6 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add5~89_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add5~90 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~89 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~89 .lut_mask = 64'h000000FF0000FF4A;
+defparam \soc_inst|m0_1|u_logic|Add5~89 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y6_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zbbwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zbbwx4~0_combout = ( \soc_inst|m0_1|u_logic|Lsnvx4~0_combout & ( \soc_inst|m0_1|u_logic|Yih2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|O3awx4~0_combout ) # (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Lsnvx4~0_combout & ( \soc_inst|m0_1|u_logic|Yih2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ((!\soc_inst|m0_1|u_logic|O3awx4~0_combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) #
+// (\soc_inst|m0_1|u_logic|O3awx4~0_combout & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lsnvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Yih2z4~0_combout & ( !\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Lsnvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Yih2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Muawx4~0_combout & !\soc_inst|m0_1|u_logic|Fuawx4~1_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Lsnvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yih2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zbbwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zbbwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zbbwx4~0 .lut_mask = 64'h8888FF00C808FFF0;
+defparam \soc_inst|m0_1|u_logic|Zbbwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y6_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cfzvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cfzvx4~0_combout = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout & ( \soc_inst|m0_1|u_logic|Zbbwx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Add5~89_sumout &
+// \soc_inst|m0_1|u_logic|Zbbwx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Add5~89_sumout ),
+ .datad(!\soc_inst|m0_1|u_logic|Zbbwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cfzvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cfzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cfzvx4~0 .lut_mask = 64'h00F000F000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Cfzvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y6_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cfzvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cfzvx4~1_combout = ( \soc_inst|m0_1|u_logic|Cfzvx4~0_combout & ( !\soc_inst|m0_1|u_logic|R7iwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & (\soc_inst|m0_1|u_logic|Qfzvx4~1_combout &
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pdbwx4~combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Qfzvx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Pdbwx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Cfzvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cfzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cfzvx4~1 .lut_mask = 64'h0000080A00000000;
+defparam \soc_inst|m0_1|u_logic|Cfzvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y6_N20
+dffeas \soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y6_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pdbwx4~0_combout = ( \soc_inst|m0_1|u_logic|T31xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Art2z4~q ) # ((\soc_inst|m0_1|u_logic|R91xx4~0_combout & !\soc_inst|m0_1|u_logic|J0v2z4~q )) ) ) # (
+// !\soc_inst|m0_1|u_logic|T31xx4~0_combout & ( (\soc_inst|m0_1|u_logic|R91xx4~0_combout & !\soc_inst|m0_1|u_logic|J0v2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|R91xx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|J0v2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Art2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|T31xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pdbwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~0 .lut_mask = 64'h50505050FF50FF50;
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y5_N13
+dffeas \soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y7_N14
+dffeas \soc_inst|m0_1|u_logic|Hmh3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Hmh3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hmh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hmh3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y7_N43
+dffeas \soc_inst|m0_1|u_logic|An63z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|An63z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|An63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|An63z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y6_N14
+dffeas \soc_inst|m0_1|u_logic|Yx83z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Yx83z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yx83z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yx83z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y6_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pdbwx4~7_combout = ( !\soc_inst|m0_1|u_logic|An63z4~q & ( \soc_inst|m0_1|u_logic|Yx83z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|H3d3z4~q & (\soc_inst|m0_1|u_logic|Yaz2z4~q &
+// \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|An63z4~q & ( !\soc_inst|m0_1|u_logic|Yx83z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|H3d3z4~q & (\soc_inst|m0_1|u_logic|Yaz2z4~q &
+// \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|An63z4~q & ( !\soc_inst|m0_1|u_logic|Yx83z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q $
+// (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|An63z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yx83z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pdbwx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~7 .lut_mask = 64'h0009000100080000;
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y6_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~8 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pdbwx4~8_combout = ( !\soc_inst|m0_1|u_logic|Pdbwx4~7_combout & ( (!\soc_inst|m0_1|u_logic|C51xx4~0_combout & ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE_q )))) #
+// (\soc_inst|m0_1|u_logic|C51xx4~0_combout & (\soc_inst|m0_1|u_logic|Hmh3z4~q & ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE_q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Hmh3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pdbwx4~7_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pdbwx4~8_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~8 .lut_mask = 64'h8ACF8ACF00000000;
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y4_N1
+dffeas \soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y7_N59
+dffeas \soc_inst|m0_1|u_logic|Rd53z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rd53z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rd53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rd53z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y6_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pdbwx4~3_combout = ( !\soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Rd53z4~q & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|H3d3z4~q & (\soc_inst|m0_1|u_logic|Yaz2z4~q &
+// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Rd53z4~q & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|H3d3z4~q & (\soc_inst|m0_1|u_logic|Yaz2z4~q &
+// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Rd53z4~q & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Yaz2z4~q & !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) )
+// )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rd53z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pdbwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~3 .lut_mask = 64'h0500010004000000;
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y7_N26
+dffeas \soc_inst|m0_1|u_logic|I443z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|I443z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I443z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I443z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y7_N25
+dffeas \soc_inst|m0_1|u_logic|Gfq2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Gfq2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gfq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gfq2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y7_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pdbwx4~2_combout = ( !\soc_inst|m0_1|u_logic|I443z4~q & ( \soc_inst|m0_1|u_logic|Gfq2z4~q & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|T1d3z4~q &
+// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|I443z4~q & ( !\soc_inst|m0_1|u_logic|Gfq2z4~q & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|T1d3z4~q & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I443z4~q & ( !\soc_inst|m0_1|u_logic|Gfq2z4~q & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q &
+// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|I443z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Gfq2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pdbwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~2 .lut_mask = 64'h0044000400400000;
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y6_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pdbwx4~4_combout = ( \soc_inst|m0_1|u_logic|T1d3z4~q & ( \soc_inst|m0_1|u_logic|Hak2z4~q & ( (\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|Vgq2z4~q &
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|T1d3z4~q & ( !\soc_inst|m0_1|u_logic|Hak2z4~q & ( (\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|Vgq2z4~q &
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( !\soc_inst|m0_1|u_logic|Hak2z4~q & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) )
+// ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Vgq2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Hak2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pdbwx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~4 .lut_mask = 64'h8800400000004000;
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y4_N14
+dffeas \soc_inst|m0_1|u_logic|Ql13z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ql13z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ql13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ql13z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y4_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pdbwx4~1_combout = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|T1d3z4~q & ( (!\soc_inst|m0_1|u_logic|Kiq2z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( (!\soc_inst|m0_1|u_logic|Ql13z4~q & (\soc_inst|m0_1|u_logic|Yaz2z4~q & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Kiq2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ql13z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pdbwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~1 .lut_mask = 64'h0C000000A0000000;
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y5_N26
+dffeas \soc_inst|m0_1|u_logic|Skh3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Skh3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Skh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Skh3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y5_N43
+dffeas \soc_inst|m0_1|u_logic|Djh3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Djh3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Djh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Djh3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y5_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pdbwx4~5_combout = ( !\soc_inst|m0_1|u_logic|Skh3z4~q & ( \soc_inst|m0_1|u_logic|Djh3z4~q & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q &
+// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Skh3z4~q & ( !\soc_inst|m0_1|u_logic|Djh3z4~q & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q &
+// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Skh3z4~q & ( !\soc_inst|m0_1|u_logic|Djh3z4~q & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q & !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Skh3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Djh3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pdbwx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~5 .lut_mask = 64'h5000100040000000;
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y6_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pdbwx4~6_combout = ( !\soc_inst|m0_1|u_logic|Pdbwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Pdbwx4~5_combout & ( (!\soc_inst|m0_1|u_logic|Pdbwx4~3_combout & (!\soc_inst|m0_1|u_logic|Pdbwx4~2_combout &
+// !\soc_inst|m0_1|u_logic|Pdbwx4~4_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pdbwx4~3_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Pdbwx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Pdbwx4~4_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Pdbwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Pdbwx4~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pdbwx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~6 .lut_mask = 64'hA000000000000000;
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y6_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pdbwx4~combout = ( \soc_inst|m0_1|u_logic|Pdbwx4~8_combout & ( \soc_inst|m0_1|u_logic|Pdbwx4~6_combout & ( (!\soc_inst|m0_1|u_logic|Pdbwx4~0_combout & ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Pdbwx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Pdbwx4~8_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Pdbwx4~6_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pdbwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pdbwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4 .lut_mask = 64'h000000000000D0D0;
+defparam \soc_inst|m0_1|u_logic|Pdbwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y6_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yih2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yih2z4~0_combout = ( \soc_inst|m0_1|u_logic|Pdbwx4~combout & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Pdbwx4~combout & (
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pdbwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yih2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yih2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yih2z4~0 .lut_mask = 64'hFFF0FFF0AFAFAFAF;
+defparam \soc_inst|m0_1|u_logic|Yih2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y5_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~85 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~85_sumout = SUM(( !\soc_inst|m0_1|u_logic|Sscvx4~combout ) + ( (!\soc_inst|m0_1|u_logic|Whh2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout & ((\soc_inst|m0_1|u_logic|Wzawx4~combout ))) #
+// (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout & !\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~90 ))
+// \soc_inst|m0_1|u_logic|Add5~86 = CARRY(( !\soc_inst|m0_1|u_logic|Sscvx4~combout ) + ( (!\soc_inst|m0_1|u_logic|Whh2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout & ((\soc_inst|m0_1|u_logic|Wzawx4~combout ))) #
+// (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout & !\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~90 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Sscvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Whh2z4~0_combout ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add5~90 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add5~85_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add5~86 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~85 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~85 .lut_mask = 64'h000000B50000FF00;
+defparam \soc_inst|m0_1|u_logic|Add5~85 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y6_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mdzvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mdzvx4~1_combout = ( \soc_inst|m0_1|u_logic|Add5~117_sumout & ( (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout & (\soc_inst|m0_1|u_logic|Ehcwx4~0_combout & \soc_inst|m0_1|u_logic|Mdzvx4~0_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Add5~117_sumout & ( (\soc_inst|m0_1|u_logic|Ehcwx4~0_combout & \soc_inst|m0_1|u_logic|Mdzvx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ehcwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Mdzvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~117_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mdzvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mdzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mdzvx4~1 .lut_mask = 64'h000F000F00030003;
+defparam \soc_inst|m0_1|u_logic|Mdzvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y6_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fdzvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fdzvx4~0_combout = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( \soc_inst|m0_1|u_logic|Mdzvx4~1_combout & ( (\soc_inst|m0_1|u_logic|Bspvx4~1_combout & (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout ) #
+// (\soc_inst|m0_1|u_logic|R7iwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( \soc_inst|m0_1|u_logic|Mdzvx4~1_combout & ( (\soc_inst|m0_1|u_logic|Bspvx4~1_combout &
+// ((\soc_inst|m0_1|u_logic|R7iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Bspvx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mdzvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fdzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fdzvx4~0 .lut_mask = 64'h000000000707070F;
+defparam \soc_inst|m0_1|u_logic|Fdzvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y4_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jlo2z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jlo2z4~feeder_combout = ( \soc_inst|m0_1|u_logic|Fdzvx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jlo2z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jlo2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jlo2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Jlo2z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y4_N41
+dffeas \soc_inst|m0_1|u_logic|Jlo2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Jlo2z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Jlo2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jlo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jlo2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y4_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bk13z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bk13z4~feeder_combout = ( \soc_inst|m0_1|u_logic|Fdzvx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bk13z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bk13z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bk13z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Bk13z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y4_N11
+dffeas \soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Bk13z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y4_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rtpvx4~0_combout = ( \soc_inst|m0_1|u_logic|Jc1xx4~0_combout & ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Jlo2z4~q ) # (!\soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE_q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Jc1xx4~0_combout & ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE_q ) ) ) # ( \soc_inst|m0_1|u_logic|Jc1xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Y91xx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Jlo2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Jlo2z4~q ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rtpvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~0 .lut_mask = 64'h0000CCCCFF00FFCC;
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y8_N52
+dffeas \soc_inst|m0_1|u_logic|T243z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|T243z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T243z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T243z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y7_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rtpvx4~2_combout = ( \soc_inst|m0_1|u_logic|Fio2z4~q & ( (!\soc_inst|m0_1|u_logic|T243z4~q & \soc_inst|m0_1|u_logic|Ab1xx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Fio2z4~q & ( ((!\soc_inst|m0_1|u_logic|T243z4~q &
+// \soc_inst|m0_1|u_logic|Ab1xx4~0_combout )) # (\soc_inst|m0_1|u_logic|V41xx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|T243z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Fio2z4~q ),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rtpvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~2 .lut_mask = 64'h0CFF0C0C0CFF0C0C;
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y4_N25
+dffeas \soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y4_N25
+dffeas \soc_inst|m0_1|u_logic|Kt23z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Kt23z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kt23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kt23z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y5_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rtpvx4~3_combout = ( \soc_inst|m0_1|u_logic|Kt23z4~q & ( \soc_inst|m0_1|u_logic|Ld1xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Sd1xx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Kt23z4~q & ( \soc_inst|m0_1|u_logic|Ld1xx4~0_combout ) ) # ( \soc_inst|m0_1|u_logic|Kt23z4~q & ( !\soc_inst|m0_1|u_logic|Ld1xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|Sd1xx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kt23z4~q & ( !\soc_inst|m0_1|u_logic|Ld1xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Sd1xx4~0_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Kt23z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rtpvx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~3 .lut_mask = 64'h0C0C0C0CFFFF0C0C;
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X48_Y6_N40
+dffeas \soc_inst|m0_1|u_logic|Ujo2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Ujo2z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ujo2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ujo2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ujo2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y5_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rtpvx4~1_combout = ( \soc_inst|m0_1|u_logic|Ta1xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Cqo2z4~q ) # ((!\soc_inst|m0_1|u_logic|Ujo2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|U71xx4~0_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Ta1xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ujo2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|U71xx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ujo2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Cqo2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rtpvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~1 .lut_mask = 64'h00AAF0FA00AAF0FA;
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y5_N7
+dffeas \soc_inst|m0_1|u_logic|Yoz2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Yoz2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yoz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yoz2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y5_N40
+dffeas \soc_inst|m0_1|u_logic|Noo2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Noo2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Noo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Noo2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y5_N1
+dffeas \soc_inst|m0_1|u_logic|Sl03z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Sl03z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sl03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sl03z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y5_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rtpvx4~4_combout = ( \soc_inst|m0_1|u_logic|Sl03z4~q & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout & ( (\soc_inst|m0_1|u_logic|Noo2z4~q & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yoz2z4~q ))) ) ) ) #
+// ( !\soc_inst|m0_1|u_logic|Sl03z4~q & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|L61xx4~0_combout & (\soc_inst|m0_1|u_logic|Noo2z4~q & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yoz2z4~q )))) ) )
+// ) # ( \soc_inst|m0_1|u_logic|Sl03z4~q & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yoz2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sl03z4~q & (
+// !\soc_inst|m0_1|u_logic|Y21xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|L61xx4~0_combout & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yoz2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|N71xx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Yoz2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Noo2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sl03z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rtpvx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~4 .lut_mask = 64'h8C8CAFAF008C00AF;
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y5_N14
+dffeas \soc_inst|m0_1|u_logic|Uu73z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Uu73z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uu73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uu73z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y5_N53
+dffeas \soc_inst|m0_1|u_logic|Ymo2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ymo2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ymo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ymo2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y5_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rtpvx4~5_combout = ( !\soc_inst|m0_1|u_logic|Jw83z4~q & ( \soc_inst|m0_1|u_logic|H3d3z4~q & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|T1d3z4~q & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Jw83z4~q & ( !\soc_inst|m0_1|u_logic|H3d3z4~q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Ll63z4~q & \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Jw83z4~q & ( !\soc_inst|m0_1|u_logic|H3d3z4~q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Ll63z4~q & \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ll63z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Jw83z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rtpvx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~5 .lut_mask = 64'h0020002000110000;
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y8_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rtpvx4~6_combout = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q & ( \soc_inst|m0_1|u_logic|Uyu2z4~q & ( (!\soc_inst|m0_1|u_logic|Lpt2z4~q & (!\soc_inst|m0_1|u_logic|H3d3z4~q & (\soc_inst|m0_1|u_logic|T1d3z4~q &
+// \soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q & ( !\soc_inst|m0_1|u_logic|Uyu2z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~q & ((!\soc_inst|m0_1|u_logic|Lpt2z4~q ) #
+// (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lpt2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Uyu2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rtpvx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~6 .lut_mask = 64'h000B000000080000;
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y5_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rtpvx4~7_combout = ( !\soc_inst|m0_1|u_logic|Rtpvx4~5_combout & ( !\soc_inst|m0_1|u_logic|Rtpvx4~6_combout & ( (!\soc_inst|m0_1|u_logic|C51xx4~0_combout & ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) #
+// ((\soc_inst|m0_1|u_logic|Uu73z4~q )))) # (\soc_inst|m0_1|u_logic|C51xx4~0_combout & (\soc_inst|m0_1|u_logic|Ymo2z4~q & ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Uu73z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Uu73z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ymo2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rtpvx4~5_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rtpvx4~6_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rtpvx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~7 .lut_mask = 64'h8ACF000000000000;
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y5_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rtpvx4~combout = ( \soc_inst|m0_1|u_logic|Rtpvx4~4_combout & ( \soc_inst|m0_1|u_logic|Rtpvx4~7_combout & ( (!\soc_inst|m0_1|u_logic|Rtpvx4~0_combout & (!\soc_inst|m0_1|u_logic|Rtpvx4~2_combout &
+// (!\soc_inst|m0_1|u_logic|Rtpvx4~3_combout & !\soc_inst|m0_1|u_logic|Rtpvx4~1_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rtpvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Rtpvx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Rtpvx4~3_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Rtpvx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Rtpvx4~4_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rtpvx4~7_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rtpvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rtpvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4 .lut_mask = 64'h0000000000008000;
+defparam \soc_inst|m0_1|u_logic|Rtpvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y8_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~12 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hwdata_o~12_combout = ( \soc_inst|m0_1|u_logic|Eo5wx4~2_combout & ( \soc_inst|m0_1|u_logic|Hc1wx4~combout & ( (!\soc_inst|m0_1|u_logic|Rtpvx4~combout & (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout & \soc_inst|m0_1|u_logic|Y9t2z4~q
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Eo5wx4~2_combout & ( \soc_inst|m0_1|u_logic|Hc1wx4~combout & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q & ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout & (!\soc_inst|m0_1|u_logic|Rtpvx4~combout )) #
+// (\soc_inst|m0_1|u_logic|Qr42z4~1_combout & ((\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ))))) ) ) ) # ( \soc_inst|m0_1|u_logic|Eo5wx4~2_combout & ( !\soc_inst|m0_1|u_logic|Hc1wx4~combout & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q &
+// ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout & (!\soc_inst|m0_1|u_logic|Rtpvx4~combout )) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout & ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Eo5wx4~2_combout & (
+// !\soc_inst|m0_1|u_logic|Hc1wx4~combout & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q & ((!\soc_inst|m0_1|u_logic|Rtpvx4~combout ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rtpvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Hc1wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hwdata_o~12_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hwdata_o~12 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~12 .lut_mask = 64'h00BB00B8008B0088;
+defparam \soc_inst|m0_1|u_logic|hwdata_o~12 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y8_N9
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[29]~22 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[29]~22_combout = ( \soc_inst|ram_1|write_cycle~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|hwdata_o~12_combout & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ) # (\soc_inst|ram_1|byte_select [3]) ) ) ) # (
+// \soc_inst|ram_1|write_cycle~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|hwdata_o~12_combout & ( (!\soc_inst|ram_1|byte_select [3] & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ) ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|ram_1|byte_select [3]),
+ .datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ),
+ .datae(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o~12_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|data_to_memory[29]~22_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[29]~22 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[29]~22 .lut_mask = 64'h000000F000000FFF;
+defparam \soc_inst|ram_1|data_to_memory[29]~22 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X14_Y7_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 (
+ .portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|ram_1|data_to_memory[29]~22_combout ,\soc_inst|ram_1|data_to_memory[13]~21_combout }),
+ .portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+ .portabyteenamasks(1'b1),
+ .portbdatain(2'b00),
+ .portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_first_bit_number = 13;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_first_bit_number = 13;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003FFFFFF03C1488390A24181DEF7BDEF785645645645645645645642A555555555555541C313000000000000000000000000";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y11_N15
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[13]~21 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[13]~21_combout = ( \soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout & !\soc_inst|ram_1|byte_select
+// [1]) ) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q & ( (\soc_inst|ram_1|byte_select [1]) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout ) ) ) )
+
+ .dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout ),
+ .datab(!\soc_inst|ram_1|byte_select [1]),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout ),
+ .dataf(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|data_to_memory[13]~21_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[13]~21 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[13]~21 .lut_mask = 64'h0000000077774444;
+defparam \soc_inst|ram_1|data_to_memory[13]~21 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y10_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hxmwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hxmwx4~0_combout = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 & ( \soc_inst|m0_1|u_logic|B7owx4~combout & ( (!\soc_inst|m0_1|u_logic|T2owx4~1_combout & !\soc_inst|interconnect_1|HRDATA[29]~0_combout ) ) ) ) # (
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 & ( \soc_inst|m0_1|u_logic|B7owx4~combout & ( !\soc_inst|m0_1|u_logic|T2owx4~1_combout ) ) ) # ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 & (
+// !\soc_inst|m0_1|u_logic|B7owx4~combout & ( !\soc_inst|m0_1|u_logic|T2owx4~1_combout ) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 & ( !\soc_inst|m0_1|u_logic|B7owx4~combout & ( !\soc_inst|m0_1|u_logic|T2owx4~1_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
+ .datac(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ),
+ .dataf(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hxmwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hxmwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hxmwx4~0 .lut_mask = 64'hCCCCCCCCCCCCC0C0;
+defparam \soc_inst|m0_1|u_logic|Hxmwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y12_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hxmwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hxmwx4~1_combout = ( \soc_inst|m0_1|u_logic|F5ewx4~combout & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout & (\soc_inst|m0_1|u_logic|Hxmwx4~0_combout & ((!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Mouwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|F5ewx4~combout & ( (\soc_inst|m0_1|u_logic|Hxmwx4~0_combout & ((!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Mouwx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Mouwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hxmwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|F5ewx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hxmwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hxmwx4~1 .lut_mask = 64'h00FC00FC00A800A8;
+defparam \soc_inst|m0_1|u_logic|Hxmwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y13_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mb1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mb1wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Jymwx4~1_combout & ( \soc_inst|m0_1|u_logic|Cymwx4~3_combout & ( \soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) ) ) # ( \soc_inst|m0_1|u_logic|Jymwx4~1_combout & (
+// !\soc_inst|m0_1|u_logic|Cymwx4~3_combout & ( !\soc_inst|m0_1|u_logic|Pmnwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Jymwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Cymwx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Pmnwx4~combout ) #
+// (\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Jymwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Cymwx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mb1wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mb1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mb1wx4~0 .lut_mask = 64'hF0FFF0F000FF0000;
+defparam \soc_inst|m0_1|u_logic|Mb1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y12_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mb1wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mb1wx4~1_combout = ( !\soc_inst|m0_1|u_logic|Mb1wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Sknwx4~2_combout & (\soc_inst|m0_1|u_logic|Twmwx4~2_combout & ((\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ) #
+// (\soc_inst|m0_1|u_logic|Imnwx4~combout )))) # (\soc_inst|m0_1|u_logic|Sknwx4~2_combout & (((\soc_inst|m0_1|u_logic|Hxmwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Imnwx4~combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Twmwx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Mb1wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mb1wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mb1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mb1wx4~1 .lut_mask = 64'h135F135F00000000;
+defparam \soc_inst|m0_1|u_logic|Mb1wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~81 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~81_sumout = SUM(( !\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~86 ))
+// \soc_inst|m0_1|u_logic|Add2~82 = CARRY(( !\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~86 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add2~86 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add2~81_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add2~82 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~81 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~81 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~81 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y13_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~109 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~109_sumout = SUM(( !\soc_inst|m0_1|u_logic|Tme3z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~82 ))
+// \soc_inst|m0_1|u_logic|Add2~110 = CARRY(( !\soc_inst|m0_1|u_logic|Tme3z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~82 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Tme3z4~q ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add2~82 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add2~109_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add2~110 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~109 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~109 .lut_mask = 64'h0000FFFF0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add2~109 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nehvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nehvx4~1_combout = ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Lefwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & (!\soc_inst|m0_1|u_logic|Add5~17_sumout )) #
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & ((\soc_inst|m0_1|u_logic|Tme3z4~q )))))) ) ) # ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Add2~109_sumout )))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & (((\soc_inst|m0_1|u_logic|Tme3z4~q )))))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Add2~109_sumout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Tme3z4~q ),
+ .datag(!\soc_inst|m0_1|u_logic|Add5~17_sumout ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nehvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nehvx4~1 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Nehvx4~1 .lut_mask = 64'hC000C800F300FB00;
+defparam \soc_inst|m0_1|u_logic|Nehvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nehvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nehvx4~0_combout = ( \soc_inst|m0_1|u_logic|Nehvx4~1_combout & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((\soc_inst|m0_1|u_logic|Mb1wx4~1_combout &
+// ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # (\soc_inst|m0_1|u_logic|B8nwx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Nehvx4~1_combout & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) #
+// ((\soc_inst|m0_1|u_logic|Mb1wx4~1_combout & !\soc_inst|m0_1|u_logic|Glnwx4~1_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Mb1wx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Nehvx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nehvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nehvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nehvx4~0 .lut_mask = 64'h0000BBAA0000BBAB;
+defparam \soc_inst|m0_1|u_logic|Nehvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X33_Y12_N8
+dffeas \soc_inst|m0_1|u_logic|Tme3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Nehvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Tme3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tme3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tme3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y9_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A9jvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|A9jvx4~0_combout = ( \soc_inst|m0_1|u_logic|Slr2z4~q & ( \soc_inst|m0_1|u_logic|haddr_o~5_combout & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) #
+// ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tme3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Slr2z4~q & ( \soc_inst|m0_1|u_logic|haddr_o~5_combout & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout &
+// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tme3z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Slr2z4~q & ( !\soc_inst|m0_1|u_logic|haddr_o~5_combout & (
+// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tme3z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Slr2z4~q & ( !\soc_inst|m0_1|u_logic|haddr_o~5_combout & (
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tme3z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Tme3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Slr2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|haddr_o~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|A9jvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|A9jvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A9jvx4~0 .lut_mask = 64'h4545EFEF4500EF00;
+defparam \soc_inst|m0_1|u_logic|A9jvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y9_N47
+dffeas \soc_inst|m0_1|u_logic|Slr2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|A9jvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Slr2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Slr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Slr2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y10_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ty92z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ty92z4~0_combout = ( \soc_inst|m0_1|u_logic|M1j2z4~q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|F4q2z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~q &
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|F4q2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ty92z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ty92z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ty92z4~0 .lut_mask = 64'h0000000000008000;
+defparam \soc_inst|m0_1|u_logic|Ty92z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X50_Y10_N44
+dffeas \soc_inst|m0_1|u_logic|U5q2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|U5q2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U5q2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U5q2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X51_Y10_N17
+dffeas \soc_inst|m0_1|u_logic|D603z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|D603z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D603z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|D603z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X50_Y9_N28
+dffeas \soc_inst|m0_1|u_logic|X213z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|X213z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X213z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X213z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y10_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ww92z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ww92z4~2_combout = ( !\soc_inst|m0_1|u_logic|Rni2z4~q & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q & ((!\soc_inst|m0_1|u_logic|X213z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|D603z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|D603z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|X213z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ww92z4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ww92z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ww92z4~2 .lut_mask = 64'h00000000A0880000;
+defparam \soc_inst|m0_1|u_logic|Ww92z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y10_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ww92z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ww92z4~0_combout = ( !\soc_inst|m0_1|u_logic|Rni2z4~q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Gq43z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Pz53z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pz53z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Gq43z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ww92z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ww92z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ww92z4~0 .lut_mask = 64'h000000000C0A0000;
+defparam \soc_inst|m0_1|u_logic|Ww92z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X50_Y11_N2
+dffeas \soc_inst|m0_1|u_logic|O723z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|O723z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|O723z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O723z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|O723z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X50_Y9_N37
+dffeas \soc_inst|m0_1|u_logic|Xg33z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Xg33z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xg33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xg33z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ww92z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ww92z4~1_combout = ( \soc_inst|m0_1|u_logic|Wzy2z4~q & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~q & !\soc_inst|m0_1|u_logic|Xg33z4~q )) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Wzy2z4~q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|O723z4~q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O723z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Xg33z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ww92z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ww92z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ww92z4~1 .lut_mask = 64'h000080800000C000;
+defparam \soc_inst|m0_1|u_logic|Ww92z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y10_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ww92z4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ww92z4~3_combout = ( !\soc_inst|m0_1|u_logic|Ww92z4~1_combout & ( \soc_inst|m0_1|u_logic|Ue9wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ty92z4~0_combout & (\soc_inst|m0_1|u_logic|U5q2z4~q &
+// (!\soc_inst|m0_1|u_logic|Ww92z4~2_combout & !\soc_inst|m0_1|u_logic|Ww92z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ww92z4~1_combout & ( !\soc_inst|m0_1|u_logic|Ue9wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ty92z4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Ww92z4~2_combout & !\soc_inst|m0_1|u_logic|Ww92z4~0_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ty92z4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|U5q2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ww92z4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ww92z4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ww92z4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ww92z4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ww92z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ww92z4~3 .lut_mask = 64'hA000000020000000;
+defparam \soc_inst|m0_1|u_logic|Ww92z4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y10_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C61wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C61wx4~0_combout = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( \soc_inst|m0_1|u_logic|Ww92z4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Slr2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Hmqwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( \soc_inst|m0_1|u_logic|Ww92z4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Slr2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|J7q2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( !\soc_inst|m0_1|u_logic|Ww92z4~3_combout & (
+// (!\soc_inst|m0_1|u_logic|Slr2z4~q ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( !\soc_inst|m0_1|u_logic|Ww92z4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Slr2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|J7q2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Slr2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|J7q2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hmqwx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ww92z4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C61wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C61wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C61wx4~0 .lut_mask = 64'hACACAFAFACACAFA0;
+defparam \soc_inst|m0_1|u_logic|C61wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~101 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~101_sumout = SUM(( !\soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE_q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~110 ))
+// \soc_inst|m0_1|u_logic|Add2~102 = CARRY(( !\soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE_q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~110 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add2~110 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add2~101_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add2~102 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~101 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~101 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~101 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X50_Y10_N2
+dffeas \soc_inst|m0_1|u_logic|Rix2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Xjhvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rix2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rix2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rix2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y10_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xjhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xjhvx4~0_combout = ( \soc_inst|m0_1|u_logic|Rix2z4~q & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Add2~101_sumout ) # (!\soc_inst|m0_1|u_logic|S5pvx4~combout )) #
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rix2z4~q & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Add2~101_sumout ) #
+// (!\soc_inst|m0_1|u_logic|S5pvx4~combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Add2~101_sumout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Rix2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xjhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xjhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xjhvx4~0 .lut_mask = 64'hAA88FFDD00000000;
+defparam \soc_inst|m0_1|u_logic|Xjhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y10_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xjhvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xjhvx4~1_combout = ( \soc_inst|m0_1|u_logic|Xjhvx4~0_combout & ( \soc_inst|m0_1|u_logic|X61wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~61_sumout ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Xjhvx4~0_combout & ( !\soc_inst|m0_1|u_logic|X61wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~61_sumout ))) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Add5~61_sumout ),
+ .datae(!\soc_inst|m0_1|u_logic|Xjhvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|X61wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xjhvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xjhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xjhvx4~1 .lut_mask = 64'h0000CCC00000FFF0;
+defparam \soc_inst|m0_1|u_logic|Xjhvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X50_Y10_N1
+dffeas \soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Xjhvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y5_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~89 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~89_sumout = SUM(( !\soc_inst|m0_1|u_logic|Dkx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~94 ))
+// \soc_inst|m0_1|u_logic|Add3~90 = CARRY(( !\soc_inst|m0_1|u_logic|Dkx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~94 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Dkx2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add3~94 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add3~89_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add3~90 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add3~89 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~89 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~89 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y5_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~69 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~69_sumout = SUM(( !\soc_inst|m0_1|u_logic|Bnx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~86 ))
+// \soc_inst|m0_1|u_logic|Add3~70 = CARRY(( !\soc_inst|m0_1|u_logic|Bnx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~86 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Bnx2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add3~86 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add3~69_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add3~70 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add3~69 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~69 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~69 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y5_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~65 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~65_sumout = SUM(( !\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~70 ))
+// \soc_inst|m0_1|u_logic|Add3~66 = CARRY(( !\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~70 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add3~70 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add3~65_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add3~66 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add3~65 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~65 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~65 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y5_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ug0wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ug0wx4~combout = ( \soc_inst|m0_1|u_logic|K1wvx4~combout & ( \soc_inst|m0_1|u_logic|Add5~53_sumout ) ) # ( !\soc_inst|m0_1|u_logic|K1wvx4~combout & ( \soc_inst|m0_1|u_logic|Add5~53_sumout & (
+// (!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout & (((\soc_inst|m0_1|u_logic|Add3~61_sumout & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )))) # (\soc_inst|m0_1|u_logic|Fj0wx4~0_combout & (((\soc_inst|m0_1|u_logic|Add3~61_sumout &
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|K1wvx4~combout & ( !\soc_inst|m0_1|u_logic|Add5~53_sumout & ( (!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout &
+// (((\soc_inst|m0_1|u_logic|Add3~61_sumout & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )))) # (\soc_inst|m0_1|u_logic|Fj0wx4~0_combout & (((\soc_inst|m0_1|u_logic|Add3~61_sumout & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) #
+// (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K1wvx4~combout & ( !\soc_inst|m0_1|u_logic|Add5~53_sumout & ( (!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout & (((\soc_inst|m0_1|u_logic|Add3~61_sumout &
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )))) # (\soc_inst|m0_1|u_logic|Fj0wx4~0_combout & (((\soc_inst|m0_1|u_logic|Add3~61_sumout & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Add3~61_sumout ),
+ .datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~53_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ug0wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ug0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ug0wx4 .lut_mask = 64'h111F111F111FFFFF;
+defparam \soc_inst|m0_1|u_logic|Ug0wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y5_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M0kvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|M0kvx4~0_combout = ( \soc_inst|m0_1|u_logic|Tzg3z4~q & ( \soc_inst|m0_1|u_logic|Ug0wx4~combout & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout & (((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # (\soc_inst|m0_1|u_logic|B9g3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tzg3z4~q & ( \soc_inst|m0_1|u_logic|Ug0wx4~combout & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout &
+// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|B9g3z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tzg3z4~q & ( !\soc_inst|m0_1|u_logic|Ug0wx4~combout & (
+// ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # (\soc_inst|m0_1|u_logic|B9g3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tzg3z4~q & ( !\soc_inst|m0_1|u_logic|Ug0wx4~combout & (
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|B9g3z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|B9g3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Tzg3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ug0wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|M0kvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M0kvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M0kvx4~0 .lut_mask = 64'h0D0DFDFD0D00FD00;
+defparam \soc_inst|m0_1|u_logic|M0kvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y5_N7
+dffeas \soc_inst|m0_1|u_logic|Tzg3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|M0kvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Tzg3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tzg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tzg3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y4_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hk0wx4~1_combout = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Tzg3z4~q & ( (\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|Sog3z4~q &
+// \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Tzg3z4~q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q & ((!\soc_inst|m0_1|u_logic|H3d3z4~q & ((!\soc_inst|m0_1|u_logic|T1d3z4~q ))) #
+// (\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Sog3z4~q & \soc_inst|m0_1|u_logic|T1d3z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sog3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Tzg3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hk0wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~1 .lut_mask = 64'h8840000000400000;
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X48_Y10_N8
+dffeas \soc_inst|m0_1|u_logic|Ccg3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ccg3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ccg3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ccg3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y7_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hk0wx4~2_combout = ( !\soc_inst|m0_1|u_logic|Kig3z4~q & ( \soc_inst|m0_1|u_logic|Ccg3z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kig3z4~q & ( !\soc_inst|m0_1|u_logic|Ccg3z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q &
+// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kig3z4~q & ( !\soc_inst|m0_1|u_logic|Ccg3z4~DUPLICATE_q & (
+// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Kig3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ccg3z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hk0wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~2 .lut_mask = 64'h0404000404000000;
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y5_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hk0wx4~4_combout = ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( \soc_inst|m0_1|u_logic|H3d3z4~q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Ltg3z4~q & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
+// # ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( !\soc_inst|m0_1|u_logic|H3d3z4~q & ( (!\soc_inst|m0_1|u_logic|Avg3z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Avg3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ltg3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hk0wx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~4 .lut_mask = 64'h0088000000C00000;
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y4_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hk0wx4~5_combout = ( !\soc_inst|m0_1|u_logic|Hk0wx4~2_combout & ( !\soc_inst|m0_1|u_logic|Hk0wx4~4_combout & ( (!\soc_inst|m0_1|u_logic|Hk0wx4~3_combout & (!\soc_inst|m0_1|u_logic|Xi2xx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Hk0wx4~0_combout & !\soc_inst|m0_1|u_logic|Hk0wx4~1_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Hk0wx4~3_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Xi2xx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Hk0wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hk0wx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Hk0wx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Hk0wx4~4_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hk0wx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y8_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hk0wx4~combout = ( \soc_inst|m0_1|u_logic|Hk0wx4~5_combout & ( \soc_inst|m0_1|u_logic|Hk0wx4~8_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Hk0wx4~5_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Hk0wx4~8_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hk0wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hk0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4 .lut_mask = 64'h000000000000FFFF;
+defparam \soc_inst|m0_1|u_logic|Hk0wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y6_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wh0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wh0wx4~0_combout = (\soc_inst|m0_1|u_logic|X8zvx4~combout & (!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout & (!\soc_inst|m0_1|u_logic|Wzawx4~combout $ (!\soc_inst|m0_1|u_logic|M9awx4~1_combout ))))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|M9awx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wh0wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wh0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wh0wx4~0 .lut_mask = 64'h1200120012001200;
+defparam \soc_inst|m0_1|u_logic|Wh0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y10_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bh0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bh0wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Wh0wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ri0wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hk0wx4~combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Hk0wx4~combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Wh0wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ri0wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bh0wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bh0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bh0wx4~0 .lut_mask = 64'hCFCF000000000000;
+defparam \soc_inst|m0_1|u_logic|Bh0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y10_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ia0wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ia0wx4~combout = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout & (
+// \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & ((\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout & (
+// !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & ((\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout & (
+// !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & ((\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ia0wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ia0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ia0wx4 .lut_mask = 64'h707070707070F0F0;
+defparam \soc_inst|m0_1|u_logic|Ia0wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y9_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tj0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tj0wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Gtmwx4~2_combout & ( \soc_inst|m0_1|u_logic|Ntmwx4~1_combout & ( \soc_inst|m0_1|u_logic|W6iwx4~combout ) ) ) # ( \soc_inst|m0_1|u_logic|Gtmwx4~2_combout & (
+// !\soc_inst|m0_1|u_logic|Ntmwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Yilwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Gtmwx4~2_combout & ( !\soc_inst|m0_1|u_logic|Ntmwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|W6iwx4~combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tj0wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tj0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tj0wx4~0 .lut_mask = 64'hCFCFCCCC0F0F0000;
+defparam \soc_inst|m0_1|u_logic|Tj0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y9_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tj0wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tj0wx4~combout = ( \soc_inst|m0_1|u_logic|Fjlwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Tj0wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Fjlwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Tj0wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Lsmwx4~1_combout & ((!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ))) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Tj0wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tj0wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tj0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tj0wx4 .lut_mask = 64'h3033F0FF00000000;
+defparam \soc_inst|m0_1|u_logic|Tj0wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y10_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bh0wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bh0wx4~1_combout = ( \soc_inst|m0_1|u_logic|Ia0wx4~combout & ( \soc_inst|m0_1|u_logic|Tj0wx4~combout & ( (\soc_inst|m0_1|u_logic|Bh0wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Add5~53_sumout ) #
+// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Add5~53_sumout ),
+ .datab(!\soc_inst|m0_1|u_logic|Bh0wx4~0_combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ia0wx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Tj0wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bh0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bh0wx4~1 .lut_mask = 64'h0000000000002233;
+defparam \soc_inst|m0_1|u_logic|Bh0wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y7_N1
+dffeas \soc_inst|m0_1|u_logic|Pwg3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Pwg3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pwg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pwg3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y8_N55
+dffeas \soc_inst|m0_1|u_logic|Hqg3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Hqg3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hqg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hqg3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y8_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hk0wx4~7_combout = ( \soc_inst|m0_1|u_logic|Dng3z4~q & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Hqg3z4~q & (\soc_inst|m0_1|u_logic|T1d3z4~q &
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dng3z4~q & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Hqg3z4~q ) #
+// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Hqg3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Dng3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hk0wx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~7 .lut_mask = 64'h000D000800000000;
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y10_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hk0wx4~6_combout = ( \soc_inst|m0_1|u_logic|Yaz2z4~q & ( \soc_inst|m0_1|u_logic|Svk2z4~q & ( (\soc_inst|m0_1|u_logic|H3d3z4~q & (\soc_inst|m0_1|u_logic|T1d3z4~q & !\soc_inst|m0_1|u_logic|Nag3z4~q )) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Yaz2z4~q & ( !\soc_inst|m0_1|u_logic|Svk2z4~q & ( (!\soc_inst|m0_1|u_logic|Gfg3z4~q & (!\soc_inst|m0_1|u_logic|H3d3z4~q & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Gfg3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Nag3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hk0wx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~6 .lut_mask = 64'h0000080800000300;
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y8_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~8 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hk0wx4~8_combout = ( !\soc_inst|m0_1|u_logic|Hk0wx4~6_combout & ( \soc_inst|m0_1|u_logic|S61xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Hk0wx4~7_combout & (\soc_inst|m0_1|u_logic|Rdg3z4~q &
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pwg3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hk0wx4~6_combout & ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Hk0wx4~7_combout &
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pwg3z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pwg3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Hk0wx4~7_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Rdg3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Hk0wx4~6_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hk0wx4~8_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~8 .lut_mask = 64'hD0D0000000D00000;
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y4_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M9awx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|M9awx4~1_combout = ( \soc_inst|m0_1|u_logic|Hk0wx4~8_combout & ( \soc_inst|m0_1|u_logic|Hk0wx4~5_combout & ( \soc_inst|m0_1|u_logic|M9awx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Hk0wx4~8_combout & (
+// \soc_inst|m0_1|u_logic|Hk0wx4~5_combout & ( (\soc_inst|m0_1|u_logic|M9awx4~0_combout & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Hk0wx4~8_combout & ( !\soc_inst|m0_1|u_logic|Hk0wx4~5_combout & ( (\soc_inst|m0_1|u_logic|M9awx4~0_combout & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) #
+// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hk0wx4~8_combout & ( !\soc_inst|m0_1|u_logic|Hk0wx4~5_combout & ( (\soc_inst|m0_1|u_logic|M9awx4~0_combout & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout &
+// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|M9awx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Hk0wx4~8_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Hk0wx4~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|M9awx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M9awx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M9awx4~1 .lut_mask = 64'h030B030B030B0F0F;
+defparam \soc_inst|m0_1|u_logic|M9awx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y13_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tjlwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tjlwx4~0_combout = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout & (
+// \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((\soc_inst|m0_1|u_logic|D31wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|B8nwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((\soc_inst|m0_1|u_logic|D31wx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) #
+// ((\soc_inst|m0_1|u_logic|D31wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tjlwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tjlwx4~0 .lut_mask = 64'h8CCC8CCC8CCCCCCC;
+defparam \soc_inst|m0_1|u_logic|Tjlwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y13_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ldhvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ldhvx4~1_combout = ( \soc_inst|m0_1|u_logic|Tj0wx4~combout & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ldhvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Add5~53_sumout ) #
+// (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tj0wx4~combout & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ldhvx4~0_combout & (!\soc_inst|m0_1|u_logic|H4nwx4~combout &
+// ((!\soc_inst|m0_1|u_logic|Add5~53_sumout ) # (!\soc_inst|m0_1|u_logic|Xdfwx4~combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ldhvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Add5~53_sumout ),
+ .datac(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Tj0wx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ldhvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ldhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ldhvx4~1 .lut_mask = 64'h00000000A800A8A8;
+defparam \soc_inst|m0_1|u_logic|Ldhvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X37_Y13_N56
+dffeas \soc_inst|m0_1|u_logic|B9g3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Ldhvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|B9g3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B9g3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B9g3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y13_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gehvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gehvx4~0_combout = ( \soc_inst|m0_1|u_logic|S5pvx4~combout & ( \soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & \soc_inst|m0_1|u_logic|Add2~61_sumout ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|S5pvx4~combout & ( !\soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Add2~61_sumout ) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|S5pvx4~combout & (
+// !\soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Add2~61_sumout ),
+ .datae(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gehvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gehvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gehvx4~0 .lut_mask = 64'h0F0F0FFF000000F0;
+defparam \soc_inst|m0_1|u_logic|Gehvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gehvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gehvx4~1_combout = ( \soc_inst|m0_1|u_logic|Add5~25_sumout & ( \soc_inst|m0_1|u_logic|Qe0wx4~combout & ( (!\soc_inst|m0_1|u_logic|Gehvx4~0_combout & (!\soc_inst|m0_1|u_logic|Xdfwx4~combout &
+// \soc_inst|m0_1|u_logic|Tjlwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~25_sumout & ( \soc_inst|m0_1|u_logic|Qe0wx4~combout & ( (!\soc_inst|m0_1|u_logic|Gehvx4~0_combout & \soc_inst|m0_1|u_logic|Tjlwx4~0_combout ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Add5~25_sumout & ( !\soc_inst|m0_1|u_logic|Qe0wx4~combout & ( (!\soc_inst|m0_1|u_logic|Gehvx4~0_combout & (!\soc_inst|m0_1|u_logic|H4nwx4~combout & (!\soc_inst|m0_1|u_logic|Xdfwx4~combout &
+// \soc_inst|m0_1|u_logic|Tjlwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~25_sumout & ( !\soc_inst|m0_1|u_logic|Qe0wx4~combout & ( (!\soc_inst|m0_1|u_logic|Gehvx4~0_combout & (!\soc_inst|m0_1|u_logic|H4nwx4~combout &
+// \soc_inst|m0_1|u_logic|Tjlwx4~0_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Gehvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Add5~25_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qe0wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gehvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gehvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gehvx4~1 .lut_mask = 64'h0088008000AA00A0;
+defparam \soc_inst|m0_1|u_logic|Gehvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X37_Y13_N25
+dffeas \soc_inst|m0_1|u_logic|Foe3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Gehvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Foe3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Foe3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Foe3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y5_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fc0wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fc0wx4~combout = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( \soc_inst|m0_1|u_logic|Add5~25_sumout & ( (!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout & (!\soc_inst|m0_1|u_logic|K1wvx4~combout &
+// ((!\soc_inst|m0_1|u_logic|Add3~57_sumout ) # (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( \soc_inst|m0_1|u_logic|Add5~25_sumout & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout &
+// ((!\soc_inst|m0_1|u_logic|Add3~57_sumout ) # (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( !\soc_inst|m0_1|u_logic|Add5~25_sumout & ( (!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Add3~57_sumout ) # (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( !\soc_inst|m0_1|u_logic|Add5~25_sumout & ( (!\soc_inst|m0_1|u_logic|Add3~57_sumout ) #
+// (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Add3~57_sumout ),
+ .datab(!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~25_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fc0wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fc0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fc0wx4 .lut_mask = 64'hFAFAC8C8FA00C800;
+defparam \soc_inst|m0_1|u_logic|Fc0wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y5_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B5kvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|B5kvx4~0_combout = ( \soc_inst|m0_1|u_logic|Llq2z4~q & ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Fc0wx4~combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) #
+// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Foe3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Llq2z4~q & ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout &
+// (\soc_inst|m0_1|u_logic|Fc0wx4~combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Foe3z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Llq2z4~q & ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Foe3z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Llq2z4~q & ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Foe3z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Fc0wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Foe3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Llq2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|B5kvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B5kvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B5kvx4~0 .lut_mask = 64'h2233EEFF02030E0F;
+defparam \soc_inst|m0_1|u_logic|B5kvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X40_Y5_N14
+dffeas \soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|B5kvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y4_N35
+dffeas \soc_inst|m0_1|u_logic|L733z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|L733z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L733z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|L733z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y4_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh82z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zh82z4~1_combout = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q & (!\soc_inst|m0_1|u_logic|Cy13z4~q )) #
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q & ((!\soc_inst|m0_1|u_logic|L733z4~DUPLICATE_q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Cy13z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|L733z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zh82z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zh82z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh82z4~1 .lut_mask = 64'h0000000088A00000;
+defparam \soc_inst|m0_1|u_logic|Zh82z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y7_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh82z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zh82z4~0_combout = ( !\soc_inst|m0_1|u_logic|Dq53z4~q & ( \soc_inst|m0_1|u_logic|Ug43z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (\soc_inst|m0_1|u_logic|Sjj2z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Dq53z4~q & ( !\soc_inst|m0_1|u_logic|Ug43z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Sjj2z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dq53z4~q & ( !\soc_inst|m0_1|u_logic|Ug43z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Dq53z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ug43z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zh82z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zh82z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh82z4~0 .lut_mask = 64'h0500040001000000;
+defparam \soc_inst|m0_1|u_logic|Zh82z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y6_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh82z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zh82z4~2_combout = ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Vzz2z4~q )) ) ) )
+// # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( (!\soc_inst|m0_1|u_logic|Pw03z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pw03z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Vzz2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zh82z4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zh82z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh82z4~2 .lut_mask = 64'h000000008080C000;
+defparam \soc_inst|m0_1|u_logic|Zh82z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y7_N46
+dffeas \soc_inst|m0_1|u_logic|C5n2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|C5n2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C5n2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|C5n2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y7_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wj82z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wj82z4~0_combout = ( !\soc_inst|m0_1|u_logic|C5n2z4~q & ( \soc_inst|m0_1|u_logic|M1j2z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Sjj2z4~q &
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|C5n2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wj82z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wj82z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wj82z4~0 .lut_mask = 64'h0000000040000000;
+defparam \soc_inst|m0_1|u_logic|Wj82z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y4_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh82z4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zh82z4~3_combout = ( !\soc_inst|m0_1|u_logic|Zh82z4~2_combout & ( !\soc_inst|m0_1|u_logic|Wj82z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Zh82z4~1_combout & (!\soc_inst|m0_1|u_logic|Zh82z4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|R6n2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|R6n2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Zh82z4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Zh82z4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Zh82z4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wj82z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zh82z4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zh82z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh82z4~3 .lut_mask = 64'hD000000000000000;
+defparam \soc_inst|m0_1|u_logic|Zh82z4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y5_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N90wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N90wx4~0_combout = ( \soc_inst|m0_1|u_logic|Zh82z4~3_combout & ( \soc_inst|m0_1|u_logic|G4qwx4~combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((!\soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE_q )))) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Zfh3z4~q & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zh82z4~3_combout & ( \soc_inst|m0_1|u_logic|G4qwx4~combout & (
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((!\soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Zfh3z4~q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Zh82z4~3_combout & ( !\soc_inst|m0_1|u_logic|G4qwx4~combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((!\soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Zfh3z4~q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zh82z4~3_combout & ( !\soc_inst|m0_1|u_logic|G4qwx4~combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// (((!\soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Zfh3z4~q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Zfh3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Zh82z4~3_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|G4qwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N90wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N90wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N90wx4~0 .lut_mask = 64'hCACFCACFCACFCAC0;
+defparam \soc_inst|m0_1|u_logic|N90wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y4_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J70wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|J70wx4~1_combout = ( !\soc_inst|m0_1|u_logic|N90wx4~0_combout & ( \soc_inst|m0_1|u_logic|Wa0wx4~combout & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout & (!\soc_inst|m0_1|u_logic|E5awx4~1_combout $
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|N90wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Wa0wx4~combout & ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|N90wx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Wa0wx4~combout & ( ((\soc_inst|m0_1|u_logic|X8zvx4~combout & (!\soc_inst|m0_1|u_logic|E5awx4~1_combout $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|E5awx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|N90wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wa0wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|J70wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J70wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J70wx4~1 .lut_mask = 64'h1F2F0F0F11220000;
+defparam \soc_inst|m0_1|u_logic|J70wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y6_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J70wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|J70wx4~2_combout = ( \soc_inst|m0_1|u_logic|Add5~1_sumout & ( (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout & (!\soc_inst|m0_1|u_logic|J70wx4~1_combout & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout &
+// !\soc_inst|m0_1|u_logic|Z80wx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~1_sumout & ( (!\soc_inst|m0_1|u_logic|J70wx4~1_combout & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & !\soc_inst|m0_1|u_logic|Z80wx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|J70wx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Z80wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~1_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|J70wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J70wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J70wx4~2 .lut_mask = 64'hC000C00040004000;
+defparam \soc_inst|m0_1|u_logic|J70wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y12_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ba0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ba0wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Y7iwx4~2_combout & ( \soc_inst|m0_1|u_logic|O9iwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Yilwx4~0_combout ) ) ) # ( \soc_inst|m0_1|u_logic|Y7iwx4~2_combout & (
+// !\soc_inst|m0_1|u_logic|O9iwx4~1_combout & ( \soc_inst|m0_1|u_logic|W6iwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Y7iwx4~2_combout & ( !\soc_inst|m0_1|u_logic|O9iwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|W6iwx4~combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Y7iwx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|O9iwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ba0wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ba0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ba0wx4~0 .lut_mask = 64'hF0FF00FFF0F00000;
+defparam \soc_inst|m0_1|u_logic|Ba0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ba0wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ba0wx4~combout = ( !\soc_inst|m0_1|u_logic|Ba0wx4~0_combout & ( \soc_inst|m0_1|u_logic|D7iwx4~1_combout & ( (\soc_inst|m0_1|u_logic|A9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Ba0wx4~0_combout & ( !\soc_inst|m0_1|u_logic|D7iwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Phlwx4~0_combout & ((\soc_inst|m0_1|u_logic|A9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|A9iwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Ba0wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|D7iwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ba0wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ba0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ba0wx4 .lut_mask = 64'h7070000077770000;
+defparam \soc_inst|m0_1|u_logic|Ba0wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y8_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J70wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|J70wx4~0_combout = ( \soc_inst|m0_1|u_logic|Ba0wx4~combout & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (\soc_inst|m0_1|u_logic|J70wx4~2_combout & (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout ) #
+// (\soc_inst|m0_1|u_logic|D31wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ba0wx4~combout & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (\soc_inst|m0_1|u_logic|J70wx4~2_combout &
+// ((\soc_inst|m0_1|u_logic|D31wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|J70wx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ba0wx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J70wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J70wx4~0 .lut_mask = 64'h000007070000070F;
+defparam \soc_inst|m0_1|u_logic|J70wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X48_Y8_N8
+dffeas \soc_inst|m0_1|u_logic|V883z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|V883z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V883z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|V883z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y8_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wa0wx4~7_combout = ( \soc_inst|m0_1|u_logic|Vcv2z4~q & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|M3u2z4~q & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vcv2z4~q & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|M3u2z4~q ) #
+// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|M3u2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Vcv2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wa0wx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~7 .lut_mask = 64'h0045004000000000;
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y8_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wa0wx4~6_combout = ( !\soc_inst|m0_1|u_logic|Mz63z4~q & ( \soc_inst|m0_1|u_logic|Md93z4~q & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|T1d3z4~q &
+// !\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mz63z4~q & ( !\soc_inst|m0_1|u_logic|Md93z4~q & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|T1d3z4~q &
+// \soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mz63z4~q & ( !\soc_inst|m0_1|u_logic|Md93z4~q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q $
+// (\soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Mz63z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Md93z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wa0wx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~6 .lut_mask = 64'h0201000102000000;
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y8_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~8 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wa0wx4~8_combout = ( \soc_inst|m0_1|u_logic|C5n2z4~q & ( !\soc_inst|m0_1|u_logic|Wa0wx4~6_combout & ( (!\soc_inst|m0_1|u_logic|Wa0wx4~7_combout & ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|V883z4~q
+// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C5n2z4~q & ( !\soc_inst|m0_1|u_logic|Wa0wx4~6_combout & ( (!\soc_inst|m0_1|u_logic|C51xx4~0_combout & (!\soc_inst|m0_1|u_logic|Wa0wx4~7_combout & ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|V883z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|V883z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wa0wx4~7_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|C5n2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wa0wx4~6_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wa0wx4~8_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~8 .lut_mask = 64'h8C00AF0000000000;
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y6_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E5awx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|E5awx4~1_combout = ( \soc_inst|m0_1|u_logic|Wa0wx4~8_combout & ( \soc_inst|m0_1|u_logic|Wa0wx4~5_combout & ( \soc_inst|m0_1|u_logic|E5awx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Wa0wx4~8_combout & (
+// \soc_inst|m0_1|u_logic|Wa0wx4~5_combout & ( (\soc_inst|m0_1|u_logic|E5awx4~0_combout & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Wa0wx4~8_combout & ( !\soc_inst|m0_1|u_logic|Wa0wx4~5_combout & ( (\soc_inst|m0_1|u_logic|E5awx4~0_combout & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) #
+// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wa0wx4~8_combout & ( !\soc_inst|m0_1|u_logic|Wa0wx4~5_combout & ( (\soc_inst|m0_1|u_logic|E5awx4~0_combout & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout &
+// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|E5awx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Wa0wx4~8_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wa0wx4~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|E5awx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E5awx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E5awx4~1 .lut_mask = 64'h050D050D050D0F0F;
+defparam \soc_inst|m0_1|u_logic|E5awx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vihvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vihvx4~0_combout = ( \soc_inst|m0_1|u_logic|S5pvx4~combout & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & ((\soc_inst|m0_1|u_logic|Add2~105_sumout ))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Nox2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|S5pvx4~combout & ( (!\soc_inst|m0_1|u_logic|Nox2z4~q & \soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nox2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Add2~105_sumout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vihvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vihvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vihvx4~0 .lut_mask = 64'h00AA33AA00AA33AA;
+defparam \soc_inst|m0_1|u_logic|Vihvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vihvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vihvx4~1_combout = ( \soc_inst|m0_1|u_logic|Ba0wx4~combout & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Vihvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) #
+// (!\soc_inst|m0_1|u_logic|Add5~1_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ba0wx4~combout & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout & (!\soc_inst|m0_1|u_logic|Vihvx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~1_sumout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Add5~1_sumout ),
+ .datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Vihvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ba0wx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vihvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vihvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vihvx4~1 .lut_mask = 64'h00000000E000EE00;
+defparam \soc_inst|m0_1|u_logic|Vihvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X37_Y13_N1
+dffeas \soc_inst|m0_1|u_logic|Nox2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Vihvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Nox2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nox2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nox2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y5_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C70wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C70wx4~combout = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( \soc_inst|m0_1|u_logic|Add5~1_sumout & ( (!\soc_inst|m0_1|u_logic|N90wx4~0_combout & (!\soc_inst|m0_1|u_logic|K1wvx4~combout &
+// ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # (!\soc_inst|m0_1|u_logic|Add3~101_sumout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( \soc_inst|m0_1|u_logic|Add5~1_sumout & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout &
+// ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # (!\soc_inst|m0_1|u_logic|Add3~101_sumout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( !\soc_inst|m0_1|u_logic|Add5~1_sumout & ( (!\soc_inst|m0_1|u_logic|N90wx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # (!\soc_inst|m0_1|u_logic|Add3~101_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( !\soc_inst|m0_1|u_logic|Add5~1_sumout & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) #
+// (!\soc_inst|m0_1|u_logic|Add3~101_sumout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|N90wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Add3~101_sumout ),
+ .datad(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~1_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C70wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C70wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C70wx4 .lut_mask = 64'hFAFAC8C8FA00C800;
+defparam \soc_inst|m0_1|u_logic|C70wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y5_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q9kvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q9kvx4~0_combout = ( \soc_inst|m0_1|u_logic|Zfh3z4~q & ( \soc_inst|m0_1|u_logic|C70wx4~combout & ( ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nox2z4~q ) )
+// ) ) # ( !\soc_inst|m0_1|u_logic|Zfh3z4~q & ( \soc_inst|m0_1|u_logic|C70wx4~combout & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nox2z4~q ))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Zfh3z4~q & ( !\soc_inst|m0_1|u_logic|C70wx4~combout & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout & (((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nox2z4~q
+// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zfh3z4~q & ( !\soc_inst|m0_1|u_logic|C70wx4~combout & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout & (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Nox2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nox2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Zfh3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|C70wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q9kvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q9kvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q9kvx4~0 .lut_mask = 64'h3100FD003131FDFD;
+defparam \soc_inst|m0_1|u_logic|Q9kvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X40_Y5_N2
+dffeas \soc_inst|m0_1|u_logic|Zfh3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Q9kvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Zfh3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zfh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zfh3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y5_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bf9wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bf9wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|M1j2z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q
+// )) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bf9wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bf9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bf9wx4~0 .lut_mask = 64'h0000000030000000;
+defparam \soc_inst|m0_1|u_logic|Bf9wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y5_N8
+dffeas \soc_inst|m0_1|u_logic|M4j2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|M4j2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M4j2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M4j2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y4_N17
+dffeas \soc_inst|m0_1|u_logic|Eif3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Eif3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eif3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Eif3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y4_N22
+dffeas \soc_inst|m0_1|u_logic|Pgf3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Pgf3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pgf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pgf3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y4_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bc82z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bc82z4~0_combout = ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( \soc_inst|m0_1|u_logic|Pgf3z4~q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Eif3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q
+// & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( !\soc_inst|m0_1|u_logic|Pgf3z4~q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|Eif3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Eif3z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Pgf3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bc82z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bc82z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bc82z4~0 .lut_mask = 64'h0000405000004000;
+defparam \soc_inst|m0_1|u_logic|Bc82z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y3_N49
+dffeas \soc_inst|m0_1|u_logic|Tjf3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Tjf3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tjf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tjf3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y6_N8
+dffeas \soc_inst|m0_1|u_logic|Ilf3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ilf3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ilf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ilf3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y3_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bc82z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bc82z4~1_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Tjf3z4~q & !\soc_inst|m0_1|u_logic|Fgm2z4~q
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q & !\soc_inst|m0_1|u_logic|Ilf3z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Tjf3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ilf3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bc82z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bc82z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bc82z4~1 .lut_mask = 64'h5000404000000000;
+defparam \soc_inst|m0_1|u_logic|Bc82z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y5_N23
+dffeas \soc_inst|m0_1|u_logic|Ftf3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ftf3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ftf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ftf3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y5_N55
+dffeas \soc_inst|m0_1|u_logic|Qrf3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Qrf3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qrf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qrf3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y5_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bc82z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bc82z4~2_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// (!\soc_inst|m0_1|u_logic|Ftf3z4~q )) # (\soc_inst|m0_1|u_logic|Fgm2z4~q & ((!\soc_inst|m0_1|u_logic|Qrf3z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ftf3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Qrf3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bc82z4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bc82z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bc82z4~2 .lut_mask = 64'h0000AC0000000000;
+defparam \soc_inst|m0_1|u_logic|Bc82z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y5_N14
+dffeas \soc_inst|m0_1|u_logic|Uuf3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Uuf3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uuf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uuf3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y5_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bc82z4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bc82z4~3_combout = ( !\soc_inst|m0_1|u_logic|Bc82z4~2_combout & ( \soc_inst|m0_1|u_logic|Uuf3z4~q & ( !\soc_inst|m0_1|u_logic|Bc82z4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Bc82z4~2_combout & (
+// !\soc_inst|m0_1|u_logic|Uuf3z4~q & ( (!\soc_inst|m0_1|u_logic|Bc82z4~1_combout & !\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Bc82z4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Bc82z4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Uuf3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bc82z4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bc82z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bc82z4~3 .lut_mask = 64'hF0000000F0F00000;
+defparam \soc_inst|m0_1|u_logic|Bc82z4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y5_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bc82z4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bc82z4~4_combout = ( \soc_inst|m0_1|u_logic|Icxwx4~combout & ( \soc_inst|m0_1|u_logic|Bc82z4~3_combout & ( (!\soc_inst|m0_1|u_logic|Bc82z4~0_combout & ((!\soc_inst|m0_1|u_logic|Bf9wx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|M4j2z4~q ))) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Bf9wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|M4j2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Bc82z4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Icxwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Bc82z4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bc82z4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bc82z4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bc82z4~4 .lut_mask = 64'h000000000000CF00;
+defparam \soc_inst|m0_1|u_logic|Bc82z4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y5_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ntnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ntnvx4~0_combout = ( \soc_inst|m0_1|u_logic|Bc82z4~4_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Zfh3z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// (((!\soc_inst|m0_1|u_logic|B6j2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Bc82z4~4_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Zfh3z4~q )) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((!\soc_inst|m0_1|u_logic|B6j2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Zfh3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|B6j2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Bc82z4~4_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ntnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ntnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ntnvx4~0 .lut_mask = 64'hACAFACAFACA0ACA0;
+defparam \soc_inst|m0_1|u_logic|Ntnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y5_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D6cwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D6cwx4~0_combout = ( \soc_inst|m0_1|u_logic|Ntnvx4~0_combout & ( \soc_inst|m0_1|u_logic|T7cwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout &
+// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ntnvx4~0_combout & ( \soc_inst|m0_1|u_logic|T7cwx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ntnvx4~0_combout & ( !\soc_inst|m0_1|u_logic|T7cwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout &
+// ((!\soc_inst|m0_1|u_logic|Wzawx4~combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ntnvx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|T7cwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|T7cwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|D6cwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D6cwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D6cwx4~0 .lut_mask = 64'hFFCCC0A0CCFFA0C0;
+defparam \soc_inst|m0_1|u_logic|D6cwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y5_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Va3wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Va3wx4~0_combout = ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout & ( \soc_inst|m0_1|u_logic|Add5~125_sumout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & (\soc_inst|m0_1|u_logic|R6cwx4~5_combout &
+// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout & \soc_inst|m0_1|u_logic|D6cwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout & ( \soc_inst|m0_1|u_logic|Add5~125_sumout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout &
+// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout & \soc_inst|m0_1|u_logic|D6cwx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Add5~125_sumout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout &
+// (\soc_inst|m0_1|u_logic|R6cwx4~5_combout & \soc_inst|m0_1|u_logic|D6cwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Add5~125_sumout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout &
+// \soc_inst|m0_1|u_logic|D6cwx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|R6cwx4~5_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|D6cwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~125_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Va3wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Va3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Va3wx4~0 .lut_mask = 64'h00AA0022000A0002;
+defparam \soc_inst|m0_1|u_logic|Va3wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y5_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fa2wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fa2wx4~0_combout = ( \soc_inst|m0_1|u_logic|Va3wx4~0_combout & ( \soc_inst|m0_1|u_logic|Oa3wx4~1_combout & ( (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Va3wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Oa3wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fa2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fa2wx4~0 .lut_mask = 64'h00000000000057FF;
+defparam \soc_inst|m0_1|u_logic|Fa2wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y5_N5
+dffeas \soc_inst|m0_1|u_logic|Fpi2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Fpi2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fpi2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fpi2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y5_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6cwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R6cwx4~0_combout = ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ilf3z4~q ) # ((!\soc_inst|m0_1|u_logic|Fpi2z4~q & \soc_inst|m0_1|u_logic|Jc1xx4~0_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Y91xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Fpi2z4~q & \soc_inst|m0_1|u_logic|Jc1xx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fpi2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ilf3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R6cwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R6cwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R6cwx4~0 .lut_mask = 64'h00AA00AAF0FAF0FA;
+defparam \soc_inst|m0_1|u_logic|R6cwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y5_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S652z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S652z4~0_combout = ( !\soc_inst|m0_1|u_logic|H3d3z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Bqf3z4~q & !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Bqf3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S652z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S652z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S652z4~0 .lut_mask = 64'h1000100000000000;
+defparam \soc_inst|m0_1|u_logic|S652z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y7_N11
+dffeas \soc_inst|m0_1|u_logic|Wbf3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wbf3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wbf3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wbf3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y5_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W852z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|W852z4~0_combout = ( !\soc_inst|m0_1|u_logic|Wbf3z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|H3d3z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wbf3z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|W852z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W852z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W852z4~0 .lut_mask = 64'h0001000100000000;
+defparam \soc_inst|m0_1|u_logic|W852z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y5_N58
+dffeas \soc_inst|m0_1|u_logic|Xmf3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Xmf3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xmf3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xmf3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y5_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G752z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G752z4~0_combout = ( !\soc_inst|m0_1|u_logic|Xmf3z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|H3d3z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xmf3z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G752z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G752z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G752z4~0 .lut_mask = 64'h0100010000000000;
+defparam \soc_inst|m0_1|u_logic|G752z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y5_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P852z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P852z4~0_combout = ( !\soc_inst|m0_1|u_logic|Aff3z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Aff3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|P852z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P852z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P852z4~0 .lut_mask = 64'h0040004000000000;
+defparam \soc_inst|m0_1|u_logic|P852z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y5_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6cwx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R6cwx4~4_combout = ( \soc_inst|m0_1|u_logic|C51xx4~0_combout & ( !\soc_inst|m0_1|u_logic|P852z4~0_combout & ( (!\soc_inst|m0_1|u_logic|S652z4~0_combout & (\soc_inst|m0_1|u_logic|M4j2z4~q &
+// (!\soc_inst|m0_1|u_logic|W852z4~0_combout & !\soc_inst|m0_1|u_logic|G752z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout & ( !\soc_inst|m0_1|u_logic|P852z4~0_combout & ( (!\soc_inst|m0_1|u_logic|S652z4~0_combout &
+// (!\soc_inst|m0_1|u_logic|W852z4~0_combout & !\soc_inst|m0_1|u_logic|G752z4~0_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|S652z4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|M4j2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|W852z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|G752z4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|P852z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R6cwx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R6cwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R6cwx4~4 .lut_mask = 64'hA000200000000000;
+defparam \soc_inst|m0_1|u_logic|R6cwx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y5_N43
+dffeas \soc_inst|m0_1|u_logic|Mof3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Mof3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mof3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mof3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y5_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6cwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R6cwx4~1_combout = ( \soc_inst|m0_1|u_logic|U71xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Mof3z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|B6j2z4~q & \soc_inst|m0_1|u_logic|Ta1xx4~0_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|U71xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|B6j2z4~q & \soc_inst|m0_1|u_logic|Ta1xx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|B6j2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Mof3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R6cwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R6cwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R6cwx4~1 .lut_mask = 64'h00CC00CCF0FCF0FC;
+defparam \soc_inst|m0_1|u_logic|R6cwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y5_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I852z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|I852z4~0_combout = ( \soc_inst|m0_1|u_logic|S61xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ldf3z4~q ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Ldf3z4~q ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|I852z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I852z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I852z4~0 .lut_mask = 64'h00000000CCCCCCCC;
+defparam \soc_inst|m0_1|u_logic|I852z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y5_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M352z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|M352z4~0_combout = ( !\soc_inst|m0_1|u_logic|Qrf3z4~q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|H3d3z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qrf3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|M352z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M352z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M352z4~0 .lut_mask = 64'h0200020000000000;
+defparam \soc_inst|m0_1|u_logic|M352z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y5_N22
+dffeas \soc_inst|m0_1|u_logic|Ftf3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ftf3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ftf3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ftf3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y5_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T352z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T352z4~0_combout = ( !\soc_inst|m0_1|u_logic|Ftf3z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|H3d3z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ftf3z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|T352z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T352z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T352z4~0 .lut_mask = 64'h0800080000000000;
+defparam \soc_inst|m0_1|u_logic|T352z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y5_N13
+dffeas \soc_inst|m0_1|u_logic|Uuf3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Uuf3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uuf3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uuf3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y5_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C552z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C552z4~0_combout = ( !\soc_inst|m0_1|u_logic|Pgf3z4~q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|H3d3z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pgf3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C552z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C552z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C552z4~0 .lut_mask = 64'h0002000200000000;
+defparam \soc_inst|m0_1|u_logic|C552z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y5_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O452z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O452z4~0_combout = ( !\soc_inst|m0_1|u_logic|H3d3z4~q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Yaz2z4~q & !\soc_inst|m0_1|u_logic|Tjf3z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Tjf3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|O452z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O452z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O452z4~0 .lut_mask = 64'h0200020000000000;
+defparam \soc_inst|m0_1|u_logic|O452z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y5_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6cwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R6cwx4~3_combout = ( !\soc_inst|m0_1|u_logic|C552z4~0_combout & ( !\soc_inst|m0_1|u_logic|O452z4~0_combout & ( (!\soc_inst|m0_1|u_logic|M352z4~0_combout & (!\soc_inst|m0_1|u_logic|T352z4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Uuf3z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|M352z4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|T352z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Uuf3z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|C552z4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|O452z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R6cwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R6cwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R6cwx4~3 .lut_mask = 64'h80C0000000000000;
+defparam \soc_inst|m0_1|u_logic|R6cwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y4_N16
+dffeas \soc_inst|m0_1|u_logic|Eif3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Eif3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eif3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Eif3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y4_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6cwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R6cwx4~2_combout = ( \soc_inst|m0_1|u_logic|V41xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Orj2z4~q ) # ((!\soc_inst|m0_1|u_logic|Eif3z4~q & \soc_inst|m0_1|u_logic|Ab1xx4~0_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|V41xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Eif3z4~q & \soc_inst|m0_1|u_logic|Ab1xx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Eif3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Orj2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R6cwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R6cwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R6cwx4~2 .lut_mask = 64'h0C0C0C0CFF0CFF0C;
+defparam \soc_inst|m0_1|u_logic|R6cwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y5_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6cwx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R6cwx4~5_combout = ( \soc_inst|m0_1|u_logic|R6cwx4~3_combout & ( !\soc_inst|m0_1|u_logic|R6cwx4~2_combout & ( (!\soc_inst|m0_1|u_logic|R6cwx4~0_combout & (\soc_inst|m0_1|u_logic|R6cwx4~4_combout &
+// (!\soc_inst|m0_1|u_logic|R6cwx4~1_combout & !\soc_inst|m0_1|u_logic|I852z4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|R6cwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|R6cwx4~4_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|R6cwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|I852z4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|R6cwx4~3_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|R6cwx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R6cwx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R6cwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R6cwx4~5 .lut_mask = 64'h0000200000000000;
+defparam \soc_inst|m0_1|u_logic|R6cwx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y8_N54
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[23]~0 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[23]~0_combout = ( \soc_inst|m0_1|u_logic|R6cwx4~5_combout & ( (!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|R6cwx4~5_combout & ( (!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Y9t2z4~q & !\soc_inst|m0_1|u_logic|Qr42z4~1_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|R6cwx4~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|data_to_memory[23]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[23]~0 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[23]~0 .lut_mask = 64'hF3F0F3F0C0F0C0F0;
+defparam \soc_inst|ram_1|data_to_memory[23]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y10_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V4ovx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|V4ovx4~0_combout = (\soc_inst|ram_1|data_to_memory[23]~0_combout & \soc_inst|m0_1|u_logic|K3l2z4~q )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|ram_1|data_to_memory[23]~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V4ovx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V4ovx4~0 .lut_mask = 64'h000F000F000F000F;
+defparam \soc_inst|m0_1|u_logic|V4ovx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y13_N34
+dffeas \soc_inst|m0_1|u_logic|Vfd3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Vfd3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vfd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vfd3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6xwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R6xwx4~0_combout = ( \soc_inst|m0_1|u_logic|Uqi2z4~q & ( ((\soc_inst|m0_1|u_logic|E0uvx4~combout & \soc_inst|m0_1|u_logic|Svs2z4~q )) # (\soc_inst|m0_1|u_logic|K3uvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Uqi2z4~q & (
+// (\soc_inst|m0_1|u_logic|E0uvx4~combout & \soc_inst|m0_1|u_logic|Svs2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Svs2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Uqi2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R6xwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R6xwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R6xwx4~0 .lut_mask = 64'h005500550F5F0F5F;
+defparam \soc_inst|m0_1|u_logic|R6xwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6xwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R6xwx4~1_combout = ( !\soc_inst|m0_1|u_logic|R6xwx4~0_combout & ( \soc_inst|m0_1|u_logic|Qwowx4~combout & ( (!\soc_inst|m0_1|u_logic|Uls2z4~q & ((!\soc_inst|m0_1|u_logic|K7pwx4~combout ) # (!\soc_inst|m0_1|u_logic|Z4l2z4~q ))) )
+// ) ) # ( !\soc_inst|m0_1|u_logic|R6xwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Qwowx4~combout & ( (!\soc_inst|m0_1|u_logic|K7pwx4~combout ) # (!\soc_inst|m0_1|u_logic|Z4l2z4~q ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Uls2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Z4l2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|R6xwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R6xwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R6xwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R6xwx4~1 .lut_mask = 64'hFFF00000CCC00000;
+defparam \soc_inst|m0_1|u_logic|R6xwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y12_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6xwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R6xwx4~2_combout = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|R6xwx4~1_combout ) # ((\soc_inst|m0_1|u_logic|Vfd3z4~q & \soc_inst|m0_1|u_logic|N1uvx4~combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vfd3z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|R6xwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R6xwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R6xwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R6xwx4~2 .lut_mask = 64'h00000000F0F5F0F5;
+defparam \soc_inst|m0_1|u_logic|R6xwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jca3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jca3z4~0_combout = ( !\soc_inst|m0_1|u_logic|V4ovx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jca3z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jca3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jca3z4~0 .lut_mask = 64'hFFFFFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Jca3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y12_N31
+dffeas \soc_inst|m0_1|u_logic|Jca3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Jca3z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Jca3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jca3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jca3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y11_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add0~5_sumout = SUM(( !\soc_inst|m0_1|u_logic|Uei3z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~86 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Uei3z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add0~86 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add0~5_sumout ),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add0~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~5 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zmmvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zmmvx4~0_combout = ( \soc_inst|m0_1|u_logic|Uei3z4~q & ( \soc_inst|m0_1|u_logic|Tna3z4~q & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout & (!\soc_inst|m0_1|u_logic|Add0~5_sumout )) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout &
+// ((\soc_inst|m0_1|u_logic|Jca3z4~q )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Uei3z4~q & ( \soc_inst|m0_1|u_logic|Tna3z4~q & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout & (!\soc_inst|m0_1|u_logic|Add0~5_sumout ))
+// # (\soc_inst|m0_1|u_logic|Mxtvx4~combout & ((\soc_inst|m0_1|u_logic|Jca3z4~q )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Uei3z4~q & ( !\soc_inst|m0_1|u_logic|Tna3z4~q ) ) # ( !\soc_inst|m0_1|u_logic|Uei3z4~q & (
+// !\soc_inst|m0_1|u_logic|Tna3z4~q & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Add0~5_sumout ),
+ .datac(!\soc_inst|m0_1|u_logic|Jca3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Uei3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zmmvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zmmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zmmvx4~0 .lut_mask = 64'h00FFFFFF8DFF8DFF;
+defparam \soc_inst|m0_1|u_logic|Zmmvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X30_Y11_N43
+dffeas \soc_inst|m0_1|u_logic|Uei3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Zmmvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Uei3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uei3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uei3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X24_Y9_N14
+dffeas \soc_inst|switches_1|switch_store[1][7] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\SW[7]~input_o ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|switches_1|always0~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|switches_1|switch_store[1][7]~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[1][7] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[1][7] .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X15_Y9_N0
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[23]~3 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[23]~3_combout = ( \soc_inst|ram_1|data_to_memory[23]~0_combout & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23 ) # (\soc_inst|ram_1|byte_select [2]))) ) ) # (
+// !\soc_inst|ram_1|data_to_memory[23]~0_combout & ( (!\soc_inst|ram_1|byte_select [2] & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23 & \soc_inst|ram_1|write_cycle~DUPLICATE_q )) ) )
+
+ .dataa(!\soc_inst|ram_1|byte_select [2]),
+ .datab(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23 ),
+ .datac(gnd),
+ .datad(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|data_to_memory[23]~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|data_to_memory[23]~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[23]~3 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[23]~3 .lut_mask = 64'h0022002200770077;
+defparam \soc_inst|ram_1|data_to_memory[23]~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X14_Y9_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 (
+ .portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|ram_1|data_to_memory[23]~3_combout ,\soc_inst|ram_1|data_to_memory[7]~4_combout }),
+ .portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+ .portabyteenamasks(1'b1),
+ .portbdatain(2'b00),
+ .portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_first_bit_number = 7;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_first_bit_number = 7;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .mem_init0 = "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000029249242C1040001218480A0000000000204204204204204204204907FFFFFFFFFFFFC33002000000000000000000001554";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y9_N12
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[23]~8 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[23]~8_combout = ( \soc_inst|switches_1|switch_store[1][7]~q & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23 & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) #
+// (\soc_inst|interconnect_1|HRDATA[20]~7_combout ) ) ) ) # ( !\soc_inst|switches_1|switch_store[1][7]~q & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23 & ( (!\soc_inst|interconnect_1|HRDATA[20]~7_combout &
+// (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[20]~7_combout & ((!\soc_inst|interconnect_1|Equal1~0_combout ))) ) ) ) # ( \soc_inst|switches_1|switch_store[1][7]~q & (
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23 & ( (!\soc_inst|interconnect_1|HRDATA[20]~7_combout & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[20]~7_combout &
+// ((\soc_inst|interconnect_1|Equal1~0_combout ))) ) ) ) # ( !\soc_inst|switches_1|switch_store[1][7]~q & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23 & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout &
+// !\soc_inst|interconnect_1|HRDATA[20]~7_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+ .datac(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
+ .datad(!\soc_inst|interconnect_1|Equal1~0_combout ),
+ .datae(!\soc_inst|switches_1|switch_store[1][7]~q ),
+ .dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23 ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[23]~8_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[23]~8 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[23]~8 .lut_mask = 64'hC0C0C0CFCFC0CFCF;
+defparam \soc_inst|interconnect_1|HRDATA[23]~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y9_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Walwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Walwx4~0_combout = ( \soc_inst|interconnect_1|HRDATA[23]~8_combout & ( ((!\soc_inst|m0_1|u_logic|Uei3z4~q & \soc_inst|m0_1|u_logic|I7owx4~combout )) # (\soc_inst|m0_1|u_logic|B7owx4~combout ) ) ) # (
+// !\soc_inst|interconnect_1|HRDATA[23]~8_combout & ( (!\soc_inst|m0_1|u_logic|Uei3z4~q & \soc_inst|m0_1|u_logic|I7owx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Uei3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[23]~8_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Walwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Walwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Walwx4~0 .lut_mask = 64'h222222222F2F2F2F;
+defparam \soc_inst|m0_1|u_logic|Walwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y13_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Walwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Walwx4~1_combout = ( \soc_inst|m0_1|u_logic|Lcowx4~0_combout & ( \soc_inst|m0_1|u_logic|Xs7wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|R6xwx4~2_combout & (!\soc_inst|m0_1|u_logic|Walwx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Jca3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lcowx4~0_combout & ( \soc_inst|m0_1|u_logic|Xs7wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|R6xwx4~2_combout &
+// (!\soc_inst|m0_1|u_logic|Walwx4~0_combout & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Jca3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lcowx4~0_combout & ( !\soc_inst|m0_1|u_logic|Xs7wx4~1_combout & (
+// (!\soc_inst|m0_1|u_logic|R6xwx4~2_combout & (!\soc_inst|m0_1|u_logic|Walwx4~0_combout & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Jca3z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|R6xwx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Jca3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Walwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Walwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Walwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Walwx4~1 .lut_mask = 64'h8C0000008C008C00;
+defparam \soc_inst|m0_1|u_logic|Walwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y13_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U72wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U72wx4~0_combout = ( \soc_inst|m0_1|u_logic|G9lwx4~0_combout & ( \soc_inst|m0_1|u_logic|Palwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Imnwx4~combout & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Walwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G9lwx4~0_combout & ( \soc_inst|m0_1|u_logic|Palwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Imnwx4~combout & (\soc_inst|m0_1|u_logic|Pmnwx4~combout &
+// ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Walwx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|G9lwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Palwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Walwx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|G9lwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Palwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Pmnwx4~combout & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Walwx4~1_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Walwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|G9lwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U72wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U72wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U72wx4~0 .lut_mask = 64'h3303FF0F11015505;
+defparam \soc_inst|m0_1|u_logic|U72wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X33_Y12_N50
+dffeas \soc_inst|m0_1|u_logic|Jwf3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Sdhvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Jwf3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jwf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jwf3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y13_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~97 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~97_sumout = SUM(( !\soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE_q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~102 ))
+// \soc_inst|m0_1|u_logic|Add2~98 = CARRY(( !\soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE_q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~102 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add2~102 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add2~97_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add2~98 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~97 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~97 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~97 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sdhvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sdhvx4~1_combout = ( \soc_inst|m0_1|u_logic|Add2~97_sumout & ( \soc_inst|m0_1|u_logic|Add5~65_sumout & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & (\soc_inst|m0_1|u_logic|Jwf3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add2~97_sumout & ( \soc_inst|m0_1|u_logic|Add5~65_sumout & (
+// (!\soc_inst|m0_1|u_logic|Xdfwx4~combout & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jwf3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add2~97_sumout & ( !\soc_inst|m0_1|u_logic|Add5~65_sumout & (
+// (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & (\soc_inst|m0_1|u_logic|Jwf3z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add2~97_sumout & (
+// !\soc_inst|m0_1|u_logic|Add5~65_sumout & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jwf3z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Jwf3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Add2~97_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~65_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sdhvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sdhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sdhvx4~1 .lut_mask = 64'hFF55F055CC44C044;
+defparam \soc_inst|m0_1|u_logic|Sdhvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sdhvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sdhvx4~2_combout = ( \soc_inst|m0_1|u_logic|Sdhvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout & (((!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ) # (!\soc_inst|m0_1|u_logic|H4nwx4~combout )) #
+// (\soc_inst|m0_1|u_logic|Sknwx4~2_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Sdhvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sdhvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sdhvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sdhvx4~2 .lut_mask = 64'h00000000FD00FD00;
+defparam \soc_inst|m0_1|u_logic|Sdhvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y12_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sdhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sdhvx4~0_combout = ( \soc_inst|m0_1|u_logic|U72wx4~0_combout & ( \soc_inst|m0_1|u_logic|Sdhvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) #
+// ((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & \soc_inst|m0_1|u_logic|B8nwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U72wx4~0_combout & ( \soc_inst|m0_1|u_logic|Sdhvx4~2_combout & ( !\soc_inst|m0_1|u_logic|H4nwx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|U72wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sdhvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sdhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sdhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sdhvx4~0 .lut_mask = 64'h00000000AAAAFFAB;
+defparam \soc_inst|m0_1|u_logic|Sdhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X33_Y12_N49
+dffeas \soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Sdhvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y13_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~93 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~93_sumout = SUM(( !\soc_inst|m0_1|u_logic|Dkx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~98 ))
+// \soc_inst|m0_1|u_logic|Add2~94 = CARRY(( !\soc_inst|m0_1|u_logic|Dkx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~98 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Dkx2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add2~98 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add2~93_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add2~94 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~93 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~93 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~93 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qjhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qjhvx4~0_combout = ( \soc_inst|m0_1|u_logic|Add2~93_sumout & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & (\soc_inst|m0_1|u_logic|S5pvx4~combout )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Dkx2z4~q
+// ))) ) ) # ( !\soc_inst|m0_1|u_logic|Add2~93_sumout & ( (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & !\soc_inst|m0_1|u_logic|Dkx2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Dkx2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Add2~93_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qjhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qjhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qjhvx4~0 .lut_mask = 64'h3300330077447744;
+defparam \soc_inst|m0_1|u_logic|Qjhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I21wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|I21wx4~0_combout = ( \soc_inst|m0_1|u_logic|Yilwx4~0_combout & ( \soc_inst|m0_1|u_logic|W6iwx4~combout & ( (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout & ((!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yilwx4~0_combout & ( \soc_inst|m0_1|u_logic|W6iwx4~combout & ( (\soc_inst|m0_1|u_logic|Pjyvx4~2_combout & (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout &
+// ((!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yilwx4~0_combout & ( !\soc_inst|m0_1|u_logic|W6iwx4~combout & ( (!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yilwx4~0_combout & ( !\soc_inst|m0_1|u_logic|W6iwx4~combout & ( (\soc_inst|m0_1|u_logic|Pjyvx4~2_combout & ((!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|I21wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I21wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I21wx4~0 .lut_mask = 64'h5055F0FF10113033;
+defparam \soc_inst|m0_1|u_logic|I21wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I21wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|I21wx4~combout = ( \soc_inst|m0_1|u_logic|Pjyvx4~0_combout & ( \soc_inst|m0_1|u_logic|I21wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout & (((\soc_inst|m0_1|u_logic|Fjlwx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Rkyvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Lstwx4~0_combout & (\soc_inst|m0_1|u_logic|Yilwx4~0_combout & ((\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rkyvx4~0_combout )))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Pjyvx4~0_combout & ( \soc_inst|m0_1|u_logic|I21wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rkyvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Rkyvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|I21wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|I21wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I21wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I21wx4 .lut_mask = 64'h000000003F3F2A3F;
+defparam \soc_inst|m0_1|u_logic|I21wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y13_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qjhvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qjhvx4~1_combout = ( \soc_inst|m0_1|u_logic|Add5~69_sumout & ( \soc_inst|m0_1|u_logic|I21wx4~combout & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout & (!\soc_inst|m0_1|u_logic|Qjhvx4~0_combout &
+// \soc_inst|m0_1|u_logic|Tjlwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~69_sumout & ( \soc_inst|m0_1|u_logic|I21wx4~combout & ( (!\soc_inst|m0_1|u_logic|Qjhvx4~0_combout & \soc_inst|m0_1|u_logic|Tjlwx4~0_combout ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Add5~69_sumout & ( !\soc_inst|m0_1|u_logic|I21wx4~combout & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout & (!\soc_inst|m0_1|u_logic|Qjhvx4~0_combout & (\soc_inst|m0_1|u_logic|Tjlwx4~0_combout &
+// !\soc_inst|m0_1|u_logic|H4nwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~69_sumout & ( !\soc_inst|m0_1|u_logic|I21wx4~combout & ( (!\soc_inst|m0_1|u_logic|Qjhvx4~0_combout & (\soc_inst|m0_1|u_logic|Tjlwx4~0_combout &
+// !\soc_inst|m0_1|u_logic|H4nwx4~combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qjhvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Add5~69_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|I21wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qjhvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qjhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qjhvx4~1 .lut_mask = 64'h0C0008000C0C0808;
+defparam \soc_inst|m0_1|u_logic|Qjhvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y13_N55
+dffeas \soc_inst|m0_1|u_logic|Dkx2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Qjhvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Dkx2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dkx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dkx2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X21_Y5_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vpovx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vpovx4~combout = ( \soc_inst|m0_1|u_logic|U11wx4~0_combout & ( \soc_inst|m0_1|u_logic|Add5~69_sumout & ( (((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout & \soc_inst|m0_1|u_logic|Add3~89_sumout )) #
+// (\soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|U11wx4~0_combout & ( \soc_inst|m0_1|u_logic|Add5~69_sumout & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout &
+// \soc_inst|m0_1|u_logic|Add3~89_sumout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|U11wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Add5~69_sumout & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout &
+// \soc_inst|m0_1|u_logic|Add3~89_sumout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|U11wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Add5~69_sumout & ( (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout &
+// \soc_inst|m0_1|u_logic|Add3~89_sumout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Add3~89_sumout ),
+ .datae(!\soc_inst|m0_1|u_logic|U11wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~69_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vpovx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vpovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vpovx4 .lut_mask = 64'h005533770F5F3F7F;
+defparam \soc_inst|m0_1|u_logic|Vpovx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y5_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eijvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eijvx4~0_combout = ( \soc_inst|m0_1|u_logic|Ym93z4~q & ( \soc_inst|m0_1|u_logic|Vpovx4~combout & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout & (((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # (\soc_inst|m0_1|u_logic|Dkx2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ym93z4~q & ( \soc_inst|m0_1|u_logic|Vpovx4~combout & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout &
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dkx2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ym93z4~q & ( !\soc_inst|m0_1|u_logic|Vpovx4~combout & (
+// ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # (\soc_inst|m0_1|u_logic|Dkx2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ym93z4~q & ( !\soc_inst|m0_1|u_logic|Vpovx4~combout & (
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dkx2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Dkx2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ym93z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Vpovx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Eijvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eijvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eijvx4~0 .lut_mask = 64'h00F3FFF300A2AAA2;
+defparam \soc_inst|m0_1|u_logic|Eijvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y5_N7
+dffeas \soc_inst|m0_1|u_logic|Ym93z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Eijvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ym93z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ym93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ym93z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X52_Y7_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|W21wx4~4_combout = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Ym93z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Y6o2z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Ym93z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Y6o2z4~q &
+// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Ym93z4~q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q &
+// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Y6o2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ym93z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|W21wx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W21wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~4 .lut_mask = 64'hA000400000004000;
+defparam \soc_inst|m0_1|u_logic|W21wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X52_Y9_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Skv2z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Skv2z4~feeder_combout = ( \soc_inst|m0_1|u_logic|Qz0wx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Skv2z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Skv2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Skv2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Skv2z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X52_Y9_N53
+dffeas \soc_inst|m0_1|u_logic|Skv2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Skv2z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Skv2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Skv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Skv2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y8_N52
+dffeas \soc_inst|m0_1|u_logic|Jbu2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Jbu2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jbu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jbu2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X52_Y9_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|W21wx4~0_combout = ( \soc_inst|m0_1|u_logic|Jbu2z4~q & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Skv2z4~q & (\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q &
+// \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jbu2z4~q & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|T1d3z4~q & ((!\soc_inst|m0_1|u_logic|Skv2z4~q ) #
+// (!\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Skv2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Jbu2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|W21wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W21wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~0 .lut_mask = 64'h0000000000E00020;
+defparam \soc_inst|m0_1|u_logic|W21wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y8_N38
+dffeas \soc_inst|m0_1|u_logic|J5o2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|J5o2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J5o2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J5o2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y8_N47
+dffeas \soc_inst|m0_1|u_logic|Ro43z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ro43z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ro43z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ro43z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y8_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|W21wx4~2_combout = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Svk2z4~q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q & ((!\soc_inst|m0_1|u_logic|T1d3z4~q & ((!\soc_inst|m0_1|u_logic|Ro43z4~DUPLICATE_q ))) #
+// (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|J5o2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|J5o2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ro43z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|W21wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W21wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~2 .lut_mask = 64'h0000541000000000;
+defparam \soc_inst|m0_1|u_logic|W21wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y7_N44
+dffeas \soc_inst|m0_1|u_logic|N8o2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|N8o2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N8o2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|N8o2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y7_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|W21wx4~1_combout = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Z523z4~q &
+// !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|N8o2z4~q &
+// \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Z523z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|N8o2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|W21wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W21wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~1 .lut_mask = 64'h00A0880000000000;
+defparam \soc_inst|m0_1|u_logic|W21wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y5_N37
+dffeas \soc_inst|m0_1|u_logic|O403z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|O403z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O403z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|O403z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y5_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|W21wx4~5_combout = ( !\soc_inst|m0_1|u_logic|I113z4~q & ( \soc_inst|m0_1|u_logic|O403z4~q & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q &
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|I113z4~q & ( !\soc_inst|m0_1|u_logic|O403z4~q & ( (\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q &
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I113z4~q & ( !\soc_inst|m0_1|u_logic|O403z4~q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) )
+// )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|I113z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|O403z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|W21wx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W21wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~5 .lut_mask = 64'h00C0004000800000;
+defparam \soc_inst|m0_1|u_logic|W21wx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X52_Y7_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|W21wx4~6_combout = ( !\soc_inst|m0_1|u_logic|W21wx4~1_combout & ( !\soc_inst|m0_1|u_logic|W21wx4~5_combout & ( (!\soc_inst|m0_1|u_logic|W21wx4~3_combout & (!\soc_inst|m0_1|u_logic|W21wx4~4_combout &
+// (!\soc_inst|m0_1|u_logic|W21wx4~0_combout & !\soc_inst|m0_1|u_logic|W21wx4~2_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|W21wx4~3_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|W21wx4~4_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|W21wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|W21wx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|W21wx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|W21wx4~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|W21wx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W21wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~6 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|W21wx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y8_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfawx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kfawx4~0_combout = ( \soc_inst|m0_1|u_logic|Y29wx4~combout & ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout & ( \soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Y29wx4~combout & (
+// !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kfawx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kfawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kfawx4~0 .lut_mask = 64'hFFFF0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|Kfawx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X52_Y7_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfawx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kfawx4~1_combout = ( \soc_inst|m0_1|u_logic|Mddwx4~0_combout & ( \soc_inst|m0_1|u_logic|Kfawx4~0_combout & ( ((\soc_inst|m0_1|u_logic|W21wx4~6_combout & \soc_inst|m0_1|u_logic|W21wx4~8_combout )) #
+// (\soc_inst|m0_1|u_logic|Pdi2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mddwx4~0_combout & ( \soc_inst|m0_1|u_logic|Kfawx4~0_combout & ( (((\soc_inst|m0_1|u_logic|W21wx4~6_combout & \soc_inst|m0_1|u_logic|W21wx4~8_combout )) #
+// (\soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|W21wx4~6_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|W21wx4~8_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kfawx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kfawx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kfawx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kfawx4~1 .lut_mask = 64'h00000000777F555F;
+defparam \soc_inst|m0_1|u_logic|Kfawx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X52_Y7_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G11wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G11wx4~1_combout = ( \soc_inst|m0_1|u_logic|Kfawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout & (\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout &
+// ((\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Kfawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout & ((\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout &
+// (\soc_inst|m0_1|u_logic|Muawx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Kfawx4~1_combout ),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G11wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G11wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G11wx4~1 .lut_mask = 64'h05F5505F05F5505F;
+defparam \soc_inst|m0_1|u_logic|G11wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y7_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G11wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G11wx4~0_combout = ( \soc_inst|m0_1|u_logic|U11wx4~0_combout & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout &
+// !\soc_inst|m0_1|u_logic|Pdi2z4~q ))) # (\soc_inst|m0_1|u_logic|G11wx4~1_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|U11wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout &
+// !\soc_inst|m0_1|u_logic|Pdi2z4~q )) # (\soc_inst|m0_1|u_logic|G11wx4~1_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|G11wx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|U11wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G11wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G11wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G11wx4~0 .lut_mask = 64'h00008F8F0000FF8F;
+defparam \soc_inst|m0_1|u_logic|G11wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y5_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qz0wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qz0wx4~1_combout = ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout & ( \soc_inst|m0_1|u_logic|W21wx4~combout & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout & (!\soc_inst|m0_1|u_logic|U11wx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Kfawx4~1_combout $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout & ( \soc_inst|m0_1|u_logic|W21wx4~combout & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout &
+// (!\soc_inst|m0_1|u_logic|U11wx4~0_combout & (!\soc_inst|m0_1|u_logic|Kfawx4~1_combout $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout & ( !\soc_inst|m0_1|u_logic|W21wx4~combout ) ) # (
+// !\soc_inst|m0_1|u_logic|Shyvx4~0_combout & ( !\soc_inst|m0_1|u_logic|W21wx4~combout & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout & (!\soc_inst|m0_1|u_logic|U11wx4~0_combout & (!\soc_inst|m0_1|u_logic|Kfawx4~1_combout $
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|U11wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Kfawx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|W21wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qz0wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qz0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qz0wx4~1 .lut_mask = 64'h0440FFFF04400440;
+defparam \soc_inst|m0_1|u_logic|Qz0wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y7_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qz0wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qz0wx4~2_combout = ( !\soc_inst|m0_1|u_logic|Qz0wx4~1_combout & ( \soc_inst|m0_1|u_logic|Add5~69_sumout & ( (!\soc_inst|m0_1|u_logic|G11wx4~0_combout & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout &
+// \soc_inst|m0_1|u_logic|Lhyvx4~2_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qz0wx4~1_combout & ( !\soc_inst|m0_1|u_logic|Add5~69_sumout & ( (!\soc_inst|m0_1|u_logic|G11wx4~0_combout & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|G11wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Qz0wx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~69_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qz0wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qz0wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qz0wx4~2 .lut_mask = 64'hC0C0000000C00000;
+defparam \soc_inst|m0_1|u_logic|Qz0wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y9_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qz0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qz0wx4~0_combout = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Qz0wx4~2_combout & \soc_inst|m0_1|u_logic|I21wx4~combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|B8nwx4~1_combout & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Qz0wx4~2_combout & (\soc_inst|m0_1|u_logic|I21wx4~combout & ((\soc_inst|m0_1|u_logic|D31wx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Qz0wx4~2_combout & (\soc_inst|m0_1|u_logic|I21wx4~combout &
+// ((\soc_inst|m0_1|u_logic|D31wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Qz0wx4~2_combout &
+// (\soc_inst|m0_1|u_logic|I21wx4~combout & ((\soc_inst|m0_1|u_logic|D31wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qz0wx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|I21wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qz0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qz0wx4~0 .lut_mask = 64'h0105010501050505;
+defparam \soc_inst|m0_1|u_logic|Qz0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X50_Y7_N25
+dffeas \soc_inst|m0_1|u_logic|Y6o2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Y6o2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y6o2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y6o2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y7_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nrvwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nrvwx4~3_combout = ( \soc_inst|m0_1|u_logic|Skv2z4~q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Y6o2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Skv2z4~q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & ((!\soc_inst|m0_1|u_logic|Y6o2z4~q ) #
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Y6o2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Skv2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nrvwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~3 .lut_mask = 64'h0405040000000000;
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y7_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nrvwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nrvwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|J773z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|N8o2z4~q &
+// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|J773z4~q & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q & (\soc_inst|m0_1|u_logic|Rni2z4~q & ((!\soc_inst|m0_1|u_logic|N8o2z4~q ) #
+// (\soc_inst|m0_1|u_logic|Wzy2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|N8o2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|J773z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nrvwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~0 .lut_mask = 64'h00C4000000800000;
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X48_Y9_N47
+dffeas \soc_inst|m0_1|u_logic|Jl93z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Jl93z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jl93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jl93z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y8_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nrvwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nrvwx4~1_combout = ( \soc_inst|m0_1|u_logic|Jl93z4~q & ( \soc_inst|m0_1|u_logic|Wzy2z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|J5o2z4~q & (\soc_inst|m0_1|u_logic|Rni2z4~q &
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jl93z4~q & ( \soc_inst|m0_1|u_logic|Wzy2z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (\soc_inst|m0_1|u_logic|Rni2z4~q & ((!\soc_inst|m0_1|u_logic|J5o2z4~q ) #
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|J5o2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Jl93z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nrvwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~1 .lut_mask = 64'h0000000004050400;
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y8_N47
+dffeas \soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y8_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nrvwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nrvwx4~2_combout = ( !\soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Jbu2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Jbu2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q &
+// (!\soc_inst|m0_1|u_logic|Fgm2z4~q & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Jbu2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Jbu2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nrvwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~2 .lut_mask = 64'h0050004000100000;
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y7_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nrvwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nrvwx4~combout = ( !\soc_inst|m0_1|u_logic|Nrvwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Nrvwx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Nrvwx4~3_combout & !\soc_inst|m0_1|u_logic|Nrvwx4~0_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Nrvwx4~3_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Nrvwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Nrvwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Nrvwx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nrvwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nrvwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nrvwx4 .lut_mask = 64'hF000000000000000;
+defparam \soc_inst|m0_1|u_logic|Nrvwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y10_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yxdwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yxdwx4~0_combout = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( \soc_inst|m0_1|u_logic|Nrvwx4~combout ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( \soc_inst|m0_1|u_logic|Ey9wx4~combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Nrvwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ey9wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yxdwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yxdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yxdwx4~0 .lut_mask = 64'h00FF00FF0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Yxdwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y9_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X0ewx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|X0ewx4~0_combout = ( \soc_inst|m0_1|u_logic|Xcuwx4~combout & ( (!\soc_inst|m0_1|u_logic|H1qwx4~combout & \soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Xcuwx4~combout & (
+// (!\soc_inst|m0_1|u_logic|H1qwx4~combout ) # (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|H1qwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xcuwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|X0ewx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X0ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X0ewx4~0 .lut_mask = 64'hFFF0FFF000F000F0;
+defparam \soc_inst|m0_1|u_logic|X0ewx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y9_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X0ewx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|X0ewx4~1_combout = ( \soc_inst|m0_1|u_logic|X0ewx4~0_combout & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yxdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|X0ewx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|D5ywx4~0_combout & \soc_inst|m0_1|u_logic|Yxdwx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Yxdwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|X0ewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|X0ewx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X0ewx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X0ewx4~1 .lut_mask = 64'h000F000FF0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|X0ewx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y9_N47
+dffeas \soc_inst|m0_1|u_logic|C9a3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|C9a3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C9a3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|C9a3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~13 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add0~13_sumout = SUM(( !\soc_inst|m0_1|u_logic|Zva3z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~26 ))
+// \soc_inst|m0_1|u_logic|Add0~14 = CARRY(( !\soc_inst|m0_1|u_logic|Zva3z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~26 ))
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Zva3z4~q ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add0~26 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add0~13_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add0~14 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add0~13 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~13 .lut_mask = 64'h000000000000CCCC;
+defparam \soc_inst|m0_1|u_logic|Add0~13 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mqmvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mqmvx4~0_combout = ( \soc_inst|m0_1|u_logic|Zva3z4~q & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) # (\soc_inst|m0_1|u_logic|C9a3z4~q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Zva3z4~q & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q & \soc_inst|m0_1|u_logic|C9a3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Zva3z4~q & (
+// !\soc_inst|m0_1|u_logic|Mxtvx4~combout & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Add0~13_sumout ) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zva3z4~q & (
+// !\soc_inst|m0_1|u_logic|Mxtvx4~combout & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q & !\soc_inst|m0_1|u_logic|Add0~13_sumout )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|C9a3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Add0~13_sumout ),
+ .datad(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Zva3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mqmvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mqmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mqmvx4~0 .lut_mask = 64'h50FFFAFF11FFBBFF;
+defparam \soc_inst|m0_1|u_logic|Mqmvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y11_N14
+dffeas \soc_inst|m0_1|u_logic|Zva3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Mqmvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Zva3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zva3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zva3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y11_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~49 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add0~49_sumout = SUM(( !\soc_inst|m0_1|u_logic|She3z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~14 ))
+// \soc_inst|m0_1|u_logic|Add0~50 = CARRY(( !\soc_inst|m0_1|u_logic|She3z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~14 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|She3z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add0~14 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add0~49_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add0~50 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add0~49 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~49 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~49 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y9_N38
+dffeas \soc_inst|m0_1|u_logic|Bge3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Bge3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bge3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bge3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fqmvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fqmvx4~0_combout = ( \soc_inst|m0_1|u_logic|She3z4~q & ( \soc_inst|m0_1|u_logic|Bge3z4~q & ( (((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (!\soc_inst|m0_1|u_logic|Add0~49_sumout )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Mxtvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|She3z4~q & ( \soc_inst|m0_1|u_logic|Bge3z4~q & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q & ((!\soc_inst|m0_1|u_logic|Add0~49_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|She3z4~q & ( !\soc_inst|m0_1|u_logic|Bge3z4~q & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout & !\soc_inst|m0_1|u_logic|Add0~49_sumout ))) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|She3z4~q & ( !\soc_inst|m0_1|u_logic|Bge3z4~q & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout & (\soc_inst|m0_1|u_logic|Tna3z4~q & !\soc_inst|m0_1|u_logic|Add0~49_sumout ))) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Add0~49_sumout ),
+ .datae(!\soc_inst|m0_1|u_logic|She3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Bge3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fqmvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fqmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fqmvx4~0 .lut_mask = 64'h3B33FBF33F37FFF7;
+defparam \soc_inst|m0_1|u_logic|Fqmvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X30_Y11_N55
+dffeas \soc_inst|m0_1|u_logic|She3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Fqmvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|She3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|She3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|She3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y9_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whlwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Whlwx4~1_combout = ( \soc_inst|m0_1|u_logic|G6owx4~combout & ( (!\soc_inst|m0_1|u_logic|Bge3z4~q ) # ((\soc_inst|m0_1|u_logic|B7owx4~combout & \soc_inst|interconnect_1|HRDATA[11]~24_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|G6owx4~combout & ( (\soc_inst|m0_1|u_logic|B7owx4~combout & \soc_inst|interconnect_1|HRDATA[11]~24_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Bge3z4~q ),
+ .datad(!\soc_inst|interconnect_1|HRDATA[11]~24_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Whlwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Whlwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Whlwx4~1 .lut_mask = 64'h00550055F0F5F0F5;
+defparam \soc_inst|m0_1|u_logic|Whlwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whlwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Whlwx4~0_combout = (!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout & (\soc_inst|m0_1|u_logic|M5tvx4~0_combout & ((\soc_inst|m0_1|u_logic|Lee3z4~q )))) # (\soc_inst|m0_1|u_logic|Ts5wx4~0_combout &
+// (((\soc_inst|m0_1|u_logic|M5tvx4~0_combout & \soc_inst|m0_1|u_logic|Lee3z4~q )) # (\soc_inst|m0_1|u_logic|Ble3z4~q )))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ble3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Lee3z4~q ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Whlwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Whlwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Whlwx4~0 .lut_mask = 64'h0537053705370537;
+defparam \soc_inst|m0_1|u_logic|Whlwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y9_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whlwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Whlwx4~2_combout = ( !\soc_inst|m0_1|u_logic|Whlwx4~1_combout & ( \soc_inst|m0_1|u_logic|Whlwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Whlwx4~1_combout & (
+// !\soc_inst|m0_1|u_logic|Whlwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ) # (\soc_inst|m0_1|u_logic|She3z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|She3z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Whlwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Whlwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Whlwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Whlwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Whlwx4~2 .lut_mask = 64'hEFEF0000AAAA0000;
+defparam \soc_inst|m0_1|u_logic|Whlwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y13_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whlwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Whlwx4~3_combout = ( \soc_inst|m0_1|u_logic|Vzdwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Whlwx4~2_combout & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|X0ewx4~1_combout ) #
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Vzdwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Whlwx4~2_combout & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout &
+// \soc_inst|m0_1|u_logic|X0ewx4~1_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|X0ewx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Whlwx4~2_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Vzdwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Whlwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Whlwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Whlwx4~3 .lut_mask = 64'h00AE00AE00BF00BF;
+defparam \soc_inst|m0_1|u_logic|Whlwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y13_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L6nwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|L6nwx4~combout = ( \soc_inst|m0_1|u_logic|Wxp2z4~q & ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout & ( (\soc_inst|m0_1|u_logic|O5t2z4~q & (!\soc_inst|m0_1|u_logic|C3w2z4~q & !\soc_inst|m0_1|u_logic|Aok2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|C3w2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|L6nwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L6nwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L6nwx4 .lut_mask = 64'h0000404000000000;
+defparam \soc_inst|m0_1|u_logic|L6nwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y13_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wjyvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wjyvx4~0_combout = ( \soc_inst|m0_1|u_logic|S1ewx4~0_combout & ( (!\soc_inst|m0_1|u_logic|S6nwx4~combout & (!\soc_inst|m0_1|u_logic|L6nwx4~combout & ((!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Y9nwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|S1ewx4~0_combout & ( (!\soc_inst|m0_1|u_logic|S6nwx4~combout & !\soc_inst|m0_1|u_logic|L6nwx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|S6nwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|L6nwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|S1ewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wjyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wjyvx4~0 .lut_mask = 64'hA0A0A0A080A080A0;
+defparam \soc_inst|m0_1|u_logic|Wjyvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y13_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U0vvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U0vvx4~0_combout = ( \soc_inst|m0_1|u_logic|Wjyvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Whlwx4~3_combout & \soc_inst|m0_1|u_logic|Omyvx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Wjyvx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Rilwx4~2_combout ) # ((!\soc_inst|m0_1|u_logic|Whlwx4~3_combout & \soc_inst|m0_1|u_logic|Omyvx4~1_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Whlwx4~3_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Rilwx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U0vvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U0vvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U0vvx4~0 .lut_mask = 64'hF0FCF0FC00CC00CC;
+defparam \soc_inst|m0_1|u_logic|U0vvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y13_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amyvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Amyvx4~1_combout = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Aok2z4~q & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q & (!\soc_inst|m0_1|u_logic|Fij2z4~q & \soc_inst|m0_1|u_logic|Sgj2z4~q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Aok2z4~q & ( \soc_inst|m0_1|u_logic|Sgj2z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Aok2z4~q & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q &
+// \soc_inst|m0_1|u_logic|Sgj2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Aok2z4~q & ( \soc_inst|m0_1|u_logic|Sgj2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Amyvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Amyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Amyvx4~1 .lut_mask = 64'h00FF00CC00FF00C0;
+defparam \soc_inst|m0_1|u_logic|Amyvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y13_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amyvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Amyvx4~0_combout = ( \soc_inst|m0_1|u_logic|Aok2z4~q & ( (!\soc_inst|m0_1|u_logic|Wxp2z4~q & (!\soc_inst|m0_1|u_logic|C3w2z4~q & (!\soc_inst|m0_1|u_logic|Fij2z4~q & !\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Aok2z4~q & ( (!\soc_inst|m0_1|u_logic|Wxp2z4~q & !\soc_inst|m0_1|u_logic|C3w2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|C3w2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Amyvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Amyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Amyvx4~0 .lut_mask = 64'h8888888880008000;
+defparam \soc_inst|m0_1|u_logic|Amyvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amyvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Amyvx4~2_combout = ( \soc_inst|m0_1|u_logic|Yilwx4~0_combout & ( ((\soc_inst|m0_1|u_logic|Amyvx4~1_combout & !\soc_inst|m0_1|u_logic|Amyvx4~0_combout )) # (\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Amyvx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Amyvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Amyvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Amyvx4~2 .lut_mask = 64'h000000003F333F33;
+defparam \soc_inst|m0_1|u_logic|Amyvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ykyvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ykyvx4~0_combout = ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|X77wx4~combout & ((!\soc_inst|m0_1|u_logic|Wxp2z4~q ) # ((!\soc_inst|m0_1|u_logic|C3w2z4~q ) # ((!\soc_inst|m0_1|u_logic|O5t2z4~q ) #
+// (\soc_inst|m0_1|u_logic|Aok2z4~q ))))) ) ) # ( \soc_inst|m0_1|u_logic|E6nwx4~0_combout & ( (((!\soc_inst|m0_1|u_logic|Qs7wx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|C3w2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Qs7wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datag(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ykyvx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Ykyvx4~0 .lut_mask = 64'hF0F0F0F0E0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Ykyvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U0vvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U0vvx4~1_combout = ( \soc_inst|m0_1|u_logic|Ihlwx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Mjlwx4~1_combout & !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ihlwx4~3_combout & (
+// (!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) # ((!\soc_inst|m0_1|u_logic|Mjlwx4~1_combout & !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Mjlwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U0vvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U0vvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U0vvx4~1 .lut_mask = 64'hFCF0FCF0CC00CC00;
+defparam \soc_inst|m0_1|u_logic|U0vvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U0vvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U0vvx4~2_combout = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|U0vvx4~0_combout & !\soc_inst|m0_1|u_logic|U0vvx4~1_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|B8nwx4~1_combout & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|U0vvx4~0_combout & (!\soc_inst|m0_1|u_logic|U0vvx4~1_combout & !\soc_inst|m0_1|u_logic|Kkyvx4~0_combout )) ) ) ) # (
+// \soc_inst|m0_1|u_logic|B8nwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|U0vvx4~0_combout & (!\soc_inst|m0_1|u_logic|U0vvx4~1_combout & !\soc_inst|m0_1|u_logic|Kkyvx4~0_combout )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|B8nwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|U0vvx4~0_combout & (!\soc_inst|m0_1|u_logic|U0vvx4~1_combout & !\soc_inst|m0_1|u_logic|Kkyvx4~0_combout )) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|U0vvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|U0vvx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U0vvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U0vvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U0vvx4~2 .lut_mask = 64'hC000C000C000C0C0;
+defparam \soc_inst|m0_1|u_logic|U0vvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y9_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I30wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|I30wx4~2_combout = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout & ( \soc_inst|m0_1|u_logic|U0vvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|I30wx4~1_combout & \soc_inst|m0_1|u_logic|I30wx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout & ( \soc_inst|m0_1|u_logic|U0vvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Add5~33_sumout & (!\soc_inst|m0_1|u_logic|I30wx4~1_combout & \soc_inst|m0_1|u_logic|I30wx4~0_combout )) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Add5~33_sumout ),
+ .datac(!\soc_inst|m0_1|u_logic|I30wx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|I30wx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|U0vvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I30wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I30wx4~2 .lut_mask = 64'h0000000000C000F0;
+defparam \soc_inst|m0_1|u_logic|I30wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y9_N2
+dffeas \soc_inst|m0_1|u_logic|H2m2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|H2m2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H2m2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H2m2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y9_N58
+dffeas \soc_inst|m0_1|u_logic|Hbv2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Hbv2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hbv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hbv2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y9_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ebbwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ebbwx4~3_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Hbv2z4~q & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|H2m2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H2m2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Hbv2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ebbwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~3 .lut_mask = 64'h0022003000000000;
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X48_Y9_N5
+dffeas \soc_inst|m0_1|u_logic|T0m2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|T0m2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T0m2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T0m2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y9_N11
+dffeas \soc_inst|m0_1|u_logic|Yb93z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Yb93z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yb93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yb93z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y9_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ebbwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ebbwx4~1_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Yb93z4~q & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|T0m2z4~q & (\soc_inst|m0_1|u_logic|Rni2z4~q & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T0m2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yb93z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ebbwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~1 .lut_mask = 64'h0000000000220030;
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X48_Y8_N38
+dffeas \soc_inst|m0_1|u_logic|Y1u2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Y1u2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y1u2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y1u2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y8_N17
+dffeas \soc_inst|m0_1|u_logic|H783z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|H783z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H783z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H783z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y8_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ebbwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ebbwx4~2_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|H783z4~q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Sjj2z4~q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Y1u2z4~q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Y1u2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H783z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ebbwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~2 .lut_mask = 64'h000000A0000000C0;
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y10_N59
+dffeas \soc_inst|m0_1|u_logic|Yx63z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Yx63z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yx63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yx63z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y10_N2
+dffeas \soc_inst|m0_1|u_logic|V3m2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|V3m2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V3m2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|V3m2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y10_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ebbwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ebbwx4~0_combout = ( \soc_inst|m0_1|u_logic|V3m2z4~q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Yx63z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~q & (\soc_inst|m0_1|u_logic|Rni2z4~q &
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|V3m2z4~q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q & ((!\soc_inst|m0_1|u_logic|Yx63z4~q ) #
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Yx63z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|V3m2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ebbwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~0 .lut_mask = 64'h0E00020000000000;
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y9_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ebbwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ebbwx4~combout = ( !\soc_inst|m0_1|u_logic|Ebbwx4~2_combout & ( !\soc_inst|m0_1|u_logic|Ebbwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ebbwx4~3_combout & !\soc_inst|m0_1|u_logic|Ebbwx4~1_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ebbwx4~3_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ebbwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ebbwx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ebbwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ebbwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ebbwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ebbwx4 .lut_mask = 64'hF000000000000000;
+defparam \soc_inst|m0_1|u_logic|Ebbwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y8_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jmdwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jmdwx4~0_combout = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( \soc_inst|m0_1|u_logic|Bdwwx4~combout ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( \soc_inst|m0_1|u_logic|Ebbwx4~combout ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Bdwwx4~combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Ebbwx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jmdwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jmdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jmdwx4~0 .lut_mask = 64'h00FF00FF33333333;
+defparam \soc_inst|m0_1|u_logic|Jmdwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y8_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jmdwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jmdwx4~1_combout = ( \soc_inst|m0_1|u_logic|Kw7wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Jmdwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Kw7wx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout & \soc_inst|m0_1|u_logic|Jmdwx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Jmdwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Kw7wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jmdwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jmdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jmdwx4~1 .lut_mask = 64'h00F000F00FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Jmdwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y13_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6twx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q6twx4~0_combout = ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout & ( ((\soc_inst|m0_1|u_logic|Mcc3z4~q & \soc_inst|m0_1|u_logic|M5tvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE_q ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Mcc3z4~q & \soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mcc3z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q6twx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q6twx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q6twx4~0 .lut_mask = 64'h005500550F5F0F5F;
+defparam \soc_inst|m0_1|u_logic|Q6twx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6twx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q6twx4~1_combout = ( !\soc_inst|m0_1|u_logic|Q6twx4~0_combout & ( (!\soc_inst|m0_1|u_logic|R0t2z4~q & ((!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|S5b3z4~q )))) # (\soc_inst|m0_1|u_logic|R0t2z4~q &
+// (!\soc_inst|m0_1|u_logic|B2uvx4~1_combout & ((!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|S5b3z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|R0t2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|S5b3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|B2uvx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Q6twx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q6twx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q6twx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q6twx4~1 .lut_mask = 64'hFCA8FCA800000000;
+defparam \soc_inst|m0_1|u_logic|Q6twx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rhfwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rhfwx4~0_combout = ( \soc_inst|m0_1|u_logic|G6owx4~combout & ( (!\soc_inst|m0_1|u_logic|Qfa3z4~q ) # ((\soc_inst|m0_1|u_logic|I7owx4~combout & !\soc_inst|m0_1|u_logic|C4b3z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|G6owx4~combout &
+// ( (\soc_inst|m0_1|u_logic|I7owx4~combout & !\soc_inst|m0_1|u_logic|C4b3z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Qfa3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|C4b3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rhfwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rhfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rhfwx4~0 .lut_mask = 64'h33003300F3F0F3F0;
+defparam \soc_inst|m0_1|u_logic|Rhfwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rhfwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rhfwx4~1_combout = ( \soc_inst|interconnect_1|HRDATA[1]~21_combout & ( !\soc_inst|m0_1|u_logic|Rhfwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout & ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Q6twx4~1_combout ))) ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[1]~21_combout & ( !\soc_inst|m0_1|u_logic|Rhfwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q6twx4~1_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Q6twx4~1_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|interconnect_1|HRDATA[1]~21_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rhfwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rhfwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rhfwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rhfwx4~1 .lut_mask = 64'hAFAF8C8C00000000;
+defparam \soc_inst|m0_1|u_logic|Rhfwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y12_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rhfwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rhfwx4~2_combout = ( \soc_inst|m0_1|u_logic|Fkdwx4~1_combout & ( \soc_inst|m0_1|u_logic|Rhfwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Jmdwx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fkdwx4~1_combout & ( \soc_inst|m0_1|u_logic|Rhfwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Oldwx4~0_combout &
+// \soc_inst|m0_1|u_logic|Jmdwx4~1_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Jmdwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Fkdwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rhfwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rhfwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rhfwx4~2 .lut_mask = 64'h00000000AAAFFAFF;
+defparam \soc_inst|m0_1|u_logic|Rhfwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y12_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mx0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mx0wx4~0_combout = ( \soc_inst|m0_1|u_logic|Phlwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Khfwx4~3_combout ) # ((!\soc_inst|m0_1|u_logic|Rhfwx4~2_combout & \soc_inst|m0_1|u_logic|W6iwx4~combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Phlwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Rhfwx4~2_combout & \soc_inst|m0_1|u_logic|W6iwx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Khfwx4~3_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mx0wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mx0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mx0wx4~0 .lut_mask = 64'h00AA00AAF0FAF0FA;
+defparam \soc_inst|m0_1|u_logic|Mx0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y12_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mx0wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mx0wx4~combout = ( \soc_inst|m0_1|u_logic|Pgfwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Mx0wx4~0_combout & ((\soc_inst|m0_1|u_logic|Yilwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Pgfwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout & (!\soc_inst|m0_1|u_logic|Mx0wx4~0_combout & ((\soc_inst|m0_1|u_logic|Yilwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bgfwx4~1_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Mx0wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pgfwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mx0wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mx0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mx0wx4 .lut_mask = 64'h1050105030F030F0;
+defparam \soc_inst|m0_1|u_logic|Mx0wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y13_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~89 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~89_sumout = SUM(( !\soc_inst|m0_1|u_logic|Plx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~94 ))
+// \soc_inst|m0_1|u_logic|Add2~90 = CARRY(( !\soc_inst|m0_1|u_logic|Plx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~94 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Plx2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add2~94 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add2~89_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add2~90 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~89 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~89 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~89 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jjhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jjhvx4~0_combout = ( \soc_inst|m0_1|u_logic|Add2~89_sumout & ( \soc_inst|m0_1|u_logic|Qaiwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Plx2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Add2~89_sumout & (
+// \soc_inst|m0_1|u_logic|Qaiwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Plx2z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|Add2~89_sumout & ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & ( \soc_inst|m0_1|u_logic|S5pvx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Plx2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Add2~89_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jjhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jjhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jjhvx4~0 .lut_mask = 64'h00005555F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Jjhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y13_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jjhvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jjhvx4~1_combout = ( \soc_inst|m0_1|u_logic|Add5~73_sumout & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Jjhvx4~0_combout & (!\soc_inst|m0_1|u_logic|Xdfwx4~combout &
+// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Mx0wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~73_sumout & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Jjhvx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Mx0wx4~combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mx0wx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Jjhvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Add5~73_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jjhvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jjhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jjhvx4~1 .lut_mask = 64'h00000000D0D0D000;
+defparam \soc_inst|m0_1|u_logic|Jjhvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y13_N52
+dffeas \soc_inst|m0_1|u_logic|Plx2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Jjhvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Plx2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Plx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Plx2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cjhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cjhvx4~0_combout = ( \soc_inst|m0_1|u_logic|Bnx2z4~q & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & (\soc_inst|m0_1|u_logic|S5pvx4~combout & \soc_inst|m0_1|u_logic|Add2~73_sumout )) ) ) # ( !\soc_inst|m0_1|u_logic|Bnx2z4~q & (
+// ((\soc_inst|m0_1|u_logic|S5pvx4~combout & \soc_inst|m0_1|u_logic|Add2~73_sumout )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Add2~73_sumout ),
+ .datae(!\soc_inst|m0_1|u_logic|Bnx2z4~q ),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cjhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cjhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cjhvx4~0 .lut_mask = 64'h333F000C333F000C;
+defparam \soc_inst|m0_1|u_logic|Cjhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y10_N53
+dffeas \soc_inst|switches_1|switch_store[1][2] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\SW[2]~input_o ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|switches_1|always0~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|switches_1|switch_store[1][2]~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[1][2] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[1][2] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y5_N6
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[18]~6 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[18]~6_combout = ( \soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18 & (\soc_inst|ram_1|write_cycle~DUPLICATE_q & !\soc_inst|ram_1|byte_select [2])) ) ) # (
+// !\soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & ((\soc_inst|ram_1|byte_select [2]) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18 ))) ) )
+
+ .dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18 ),
+ .datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .datac(gnd),
+ .datad(!\soc_inst|ram_1|byte_select [2]),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|data_to_memory[18]~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[18]~6 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[18]~6 .lut_mask = 64'h1133113311001100;
+defparam \soc_inst|ram_1|data_to_memory[18]~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X26_Y3_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 (
+ .portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|ram_1|data_to_memory[18]~6_combout ,\soc_inst|ram_1|data_to_memory[10]~5_combout }),
+ .portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+ .portabyteenamasks(1'b1),
+ .portbdatain(2'b00),
+ .portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_first_bit_number = 10;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_first_bit_number = 10;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003B659EF10300000010004040000020000000000000000000000000501555555555555412841000000000000000000000000";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y9_N0
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[10]~5 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[10]~5_combout = ( \soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout & (\soc_inst|ram_1|write_cycle~DUPLICATE_q & !\soc_inst|ram_1|byte_select [1]))
+// ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & ((\soc_inst|ram_1|byte_select [1]) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout ))) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout ),
+ .datac(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .datad(!\soc_inst|ram_1|byte_select [1]),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|data_to_memory[10]~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[10]~5 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[10]~5 .lut_mask = 64'h030F030F03000300;
+defparam \soc_inst|ram_1|data_to_memory[10]~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y10_N51
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[18]~13 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[18]~13_combout = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18 & ( (!\soc_inst|interconnect_1|HRDATA[20]~7_combout & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) #
+// (\soc_inst|interconnect_1|HRDATA[20]~7_combout & (((!\soc_inst|interconnect_1|Equal1~0_combout ) # (\soc_inst|switches_1|switch_store[1][2]~q )))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18 & (
+// (!\soc_inst|interconnect_1|HRDATA[20]~7_combout & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[20]~7_combout & (((\soc_inst|interconnect_1|Equal1~0_combout & \soc_inst|switches_1|switch_store[1][2]~q )))) ) )
+
+ .dataa(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+ .datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
+ .datac(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
+ .datad(!\soc_inst|switches_1|switch_store[1][2]~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18 ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[18]~13_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[18]~13 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[18]~13 .lut_mask = 64'hA0A3A0A3ACAFACAF;
+defparam \soc_inst|interconnect_1|HRDATA[18]~13 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y10_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajmwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ajmwx4~0_combout = ( \soc_inst|m0_1|u_logic|G6owx4~combout & ( (!\soc_inst|m0_1|u_logic|T2owx4~1_combout & (!\soc_inst|m0_1|u_logic|Ecowx4~combout & \soc_inst|m0_1|u_logic|Xyn2z4~q )) ) ) # (
+// !\soc_inst|m0_1|u_logic|G6owx4~combout & ( (!\soc_inst|m0_1|u_logic|T2owx4~1_combout & !\soc_inst|m0_1|u_logic|Ecowx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ecowx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Xyn2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ajmwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ajmwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajmwx4~0 .lut_mask = 64'hC0C0C0C000C000C0;
+defparam \soc_inst|m0_1|u_logic|Ajmwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y10_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajmwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ajmwx4~1_combout = ( \soc_inst|m0_1|u_logic|Ajmwx4~0_combout & ( (!\soc_inst|interconnect_1|HRDATA[18]~13_combout & (((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|O0o2z4~q )))) #
+// (\soc_inst|interconnect_1|HRDATA[18]~13_combout & (!\soc_inst|m0_1|u_logic|B7owx4~combout & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|O0o2z4~q )))) ) )
+
+ .dataa(!\soc_inst|interconnect_1|HRDATA[18]~13_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|O0o2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ajmwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ajmwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ajmwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajmwx4~1 .lut_mask = 64'h00000000EE0EEE0E;
+defparam \soc_inst|m0_1|u_logic|Ajmwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y12_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajmwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ajmwx4~2_combout = ( \soc_inst|m0_1|u_logic|Asdwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Ajmwx4~1_combout & ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Eudwx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Asdwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Ajmwx4~1_combout & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Oldwx4~0_combout &
+// \soc_inst|m0_1|u_logic|Eudwx4~1_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ajmwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Eudwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Asdwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ajmwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajmwx4~2 .lut_mask = 64'h0C0D0C0D0E0F0E0F;
+defparam \soc_inst|m0_1|u_logic|Ajmwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y11_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qkmwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qkmwx4~0_combout = ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout & ( ((\soc_inst|m0_1|u_logic|M5tvx4~0_combout & \soc_inst|m0_1|u_logic|Nnc3z4~q )) # (\soc_inst|m0_1|u_logic|Ipn2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout
+// & ( (\soc_inst|m0_1|u_logic|M5tvx4~0_combout & \soc_inst|m0_1|u_logic|Nnc3z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Nnc3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ipn2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qkmwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~0 .lut_mask = 64'h0505050505FF05FF;
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y9_N33
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[10]~12 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[10]~12_combout = ( \soc_inst|interconnect_1|HRDATA[11]~3_combout & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout ) ) # ( !\soc_inst|interconnect_1|HRDATA[11]~3_combout & (
+// !\soc_inst|interconnect_1|HRDATA[25]~1_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+ .datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[10]~12_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[10]~12 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[10]~12 .lut_mask = 64'hF0F0F0F000FF00FF;
+defparam \soc_inst|interconnect_1|HRDATA[10]~12 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qkmwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qkmwx4~1_combout = ( \soc_inst|interconnect_1|HRDATA[10]~12_combout & ( ((!\soc_inst|m0_1|u_logic|C9a3z4~q & \soc_inst|m0_1|u_logic|G6owx4~combout )) # (\soc_inst|m0_1|u_logic|B7owx4~combout ) ) ) # (
+// !\soc_inst|interconnect_1|HRDATA[10]~12_combout & ( (!\soc_inst|m0_1|u_logic|C9a3z4~q & \soc_inst|m0_1|u_logic|G6owx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|C9a3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[10]~12_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qkmwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~1 .lut_mask = 64'h00CC00CC0FCF0FCF;
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qkmwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qkmwx4~2_combout = ( \soc_inst|m0_1|u_logic|T4uvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Qkmwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Zva3z4~q &
+// !\soc_inst|m0_1|u_logic|Qkmwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|T4uvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Qkmwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Qkmwx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Zva3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Qkmwx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qkmwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qkmwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~2 .lut_mask = 64'hFAFABABA00000000;
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y12_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qkmwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qkmwx4~3_combout = ( \soc_inst|m0_1|u_logic|Sndwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Qkmwx4~2_combout & (((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mydwx4~1_combout )) #
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Sndwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Qkmwx4~2_combout & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout &
+// \soc_inst|m0_1|u_logic|Mydwx4~1_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Qkmwx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Mydwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Sndwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~3 .lut_mask = 64'h0C0E0C0E0D0F0D0F;
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Et0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Et0wx4~0_combout = ( \soc_inst|m0_1|u_logic|Yilwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Phlwx4~0_combout & !\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Yilwx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ) # ((\soc_inst|m0_1|u_logic|Phlwx4~0_combout & !\soc_inst|m0_1|u_logic|Qkmwx4~3_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Et0wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Et0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Et0wx4~0 .lut_mask = 64'hCFCCCFCC0F000F00;
+defparam \soc_inst|m0_1|u_logic|Et0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y12_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Et0wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Et0wx4~combout = ( \soc_inst|m0_1|u_logic|Jkmwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Et0wx4~0_combout & ((!\soc_inst|m0_1|u_logic|W6iwx4~combout ) # (\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Jkmwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Et0wx4~0_combout & (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout & ((!\soc_inst|m0_1|u_logic|W6iwx4~combout ) # (\soc_inst|m0_1|u_logic|Ojmwx4~2_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Et0wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Et0wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Et0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Et0wx4 .lut_mask = 64'h080C080C88CC88CC;
+defparam \soc_inst|m0_1|u_logic|Et0wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cjhvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cjhvx4~1_combout = ( \soc_inst|m0_1|u_logic|Add5~21_sumout & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout & (!\soc_inst|m0_1|u_logic|Cjhvx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Et0wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~21_sumout & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Cjhvx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Et0wx4~combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Cjhvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Et0wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Add5~21_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cjhvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cjhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cjhvx4~1 .lut_mask = 64'h00000000CC0C8808;
+defparam \soc_inst|m0_1|u_logic|Cjhvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y13_N1
+dffeas \soc_inst|m0_1|u_logic|Bnx2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Cjhvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Bnx2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bnx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bnx2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y6_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fq0wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fq0wx4~combout = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( \soc_inst|m0_1|u_logic|Add5~21_sumout & ( (((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout & \soc_inst|m0_1|u_logic|Add3~69_sumout )) #
+// (\soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( \soc_inst|m0_1|u_logic|Add5~21_sumout & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout &
+// \soc_inst|m0_1|u_logic|Add3~69_sumout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( !\soc_inst|m0_1|u_logic|Add5~21_sumout & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout &
+// \soc_inst|m0_1|u_logic|Add3~69_sumout )) # (\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( !\soc_inst|m0_1|u_logic|Add5~21_sumout & ( (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout &
+// \soc_inst|m0_1|u_logic|Add3~69_sumout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Add3~69_sumout ),
+ .datad(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~21_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fq0wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fq0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fq0wx4 .lut_mask = 64'h0505373705FF37FF;
+defparam \soc_inst|m0_1|u_logic|Fq0wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y6_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Irjvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Irjvx4~0_combout = ( \soc_inst|m0_1|u_logic|W5p2z4~q & ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Fq0wx4~combout & ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) #
+// ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bnx2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W5p2z4~q & ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout &
+// (!\soc_inst|m0_1|u_logic|Fq0wx4~combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bnx2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|W5p2z4~q & ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bnx2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|W5p2z4~q & ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bnx2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Bnx2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fq0wx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|W5p2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Irjvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Irjvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Irjvx4~0 .lut_mask = 64'h5151FBFB5100FB00;
+defparam \soc_inst|m0_1|u_logic|Irjvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y6_N19
+dffeas \soc_inst|m0_1|u_logic|W5p2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Irjvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|W5p2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W5p2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|W5p2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y7_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|St0wx4~1_combout = ( !\soc_inst|m0_1|u_logic|Psn2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|W5p2z4~q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|T1d3z4~q
+// & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Psn2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|W5p2z4~q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q &
+// (!\soc_inst|m0_1|u_logic|T1d3z4~q & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Psn2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|W5p2z4~q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q &
+// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q $ (\soc_inst|m0_1|u_logic|T1d3z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Psn2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|W5p2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|St0wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|St0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~1 .lut_mask = 64'h8200800002000000;
+defparam \soc_inst|m0_1|u_logic|St0wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y6_N10
+dffeas \soc_inst|m0_1|u_logic|Wu53z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wu53z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wu53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wu53z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y8_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|St0wx4~3_combout = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Ec33z4~q & ( (!\soc_inst|m0_1|u_logic|Wu53z4~q & (\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q &
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Ec33z4~q & ( (!\soc_inst|m0_1|u_logic|Wu53z4~q & (\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q &
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Ec33z4~q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q &
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wu53z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ec33z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|St0wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|St0wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~3 .lut_mask = 64'h0030002000000020;
+defparam \soc_inst|m0_1|u_logic|St0wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y7_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|St0wx4~5_combout = ( !\soc_inst|m0_1|u_logic|St0wx4~1_combout & ( !\soc_inst|m0_1|u_logic|St0wx4~3_combout & ( (!\soc_inst|m0_1|u_logic|St0wx4~2_combout & (!\soc_inst|m0_1|u_logic|St0wx4~4_combout &
+// (!\soc_inst|m0_1|u_logic|St0wx4~0_combout & !\soc_inst|m0_1|u_logic|Jq1xx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|St0wx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|St0wx4~4_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|St0wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Jq1xx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|St0wx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|St0wx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|St0wx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|St0wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|St0wx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y7_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ecawx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ecawx4~0_combout = ( \soc_inst|m0_1|u_logic|Y29wx4~combout & ( (\soc_inst|m0_1|u_logic|K9z2z4~q & !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Y29wx4~combout & (
+// !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|K9z2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ecawx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ecawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ecawx4~0 .lut_mask = 64'hFF00FF000F000F00;
+defparam \soc_inst|m0_1|u_logic|Ecawx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y7_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ecawx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ecawx4~1_combout = ( \soc_inst|m0_1|u_logic|St0wx4~8_combout & ( \soc_inst|m0_1|u_logic|Kcdwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Ecawx4~0_combout & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Pdi2z4~q )) # (\soc_inst|m0_1|u_logic|St0wx4~5_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|St0wx4~8_combout & ( \soc_inst|m0_1|u_logic|Kcdwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Ecawx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|St0wx4~8_combout & ( !\soc_inst|m0_1|u_logic|Kcdwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Ecawx4~0_combout &
+// ((\soc_inst|m0_1|u_logic|Pdi2z4~q ) # (\soc_inst|m0_1|u_logic|St0wx4~5_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|St0wx4~8_combout & ( !\soc_inst|m0_1|u_logic|Kcdwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Ecawx4~0_combout &
+// \soc_inst|m0_1|u_logic|Pdi2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|St0wx4~5_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ecawx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|St0wx4~8_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ecawx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ecawx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ecawx4~1 .lut_mask = 64'h0303131333033313;
+defparam \soc_inst|m0_1|u_logic|Ecawx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y7_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cs0wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cs0wx4~1_combout = ( \soc_inst|m0_1|u_logic|Wzawx4~combout & ( (!\soc_inst|m0_1|u_logic|Ecawx4~1_combout & (\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Ecawx4~1_combout &
+// ((\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout & ( (!\soc_inst|m0_1|u_logic|Ecawx4~1_combout & ((\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Ecawx4~1_combout &
+// (\soc_inst|m0_1|u_logic|Muawx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ecawx4~1_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cs0wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cs0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cs0wx4~1 .lut_mask = 64'h05AF05AF0A5F0A5F;
+defparam \soc_inst|m0_1|u_logic|Cs0wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y7_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cs0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cs0wx4~0_combout = ( \soc_inst|m0_1|u_logic|Qs0wx4~0_combout & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # (((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout &
+// !\soc_inst|m0_1|u_logic|Pdi2z4~q )) # (\soc_inst|m0_1|u_logic|Cs0wx4~1_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Qs0wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout &
+// !\soc_inst|m0_1|u_logic|Pdi2z4~q )) # (\soc_inst|m0_1|u_logic|Cs0wx4~1_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Cs0wx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cs0wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cs0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cs0wx4~0 .lut_mask = 64'h0000F3330000FBBB;
+defparam \soc_inst|m0_1|u_logic|Cs0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y5_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mq0wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mq0wx4~1_combout = ( \soc_inst|m0_1|u_logic|Ecawx4~1_combout & ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|St0wx4~combout ) # ((!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout & \soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ecawx4~1_combout & ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|St0wx4~combout ) #
+// ((!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout & (\soc_inst|m0_1|u_logic|Wzawx4~combout & \soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ecawx4~1_combout & ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout & (!\soc_inst|m0_1|u_logic|Wzawx4~combout & \soc_inst|m0_1|u_logic|X8zvx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ecawx4~1_combout & ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout & (\soc_inst|m0_1|u_logic|Wzawx4~combout & \soc_inst|m0_1|u_logic|X8zvx4~combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|St0wx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ecawx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mq0wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mq0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mq0wx4~1 .lut_mask = 64'h000C00C0AAAEAAEA;
+defparam \soc_inst|m0_1|u_logic|Mq0wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y6_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mq0wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mq0wx4~2_combout = ( !\soc_inst|m0_1|u_logic|Mq0wx4~1_combout & ( \soc_inst|m0_1|u_logic|Add5~21_sumout & ( (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout &
+// !\soc_inst|m0_1|u_logic|Cs0wx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mq0wx4~1_combout & ( !\soc_inst|m0_1|u_logic|Add5~21_sumout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & !\soc_inst|m0_1|u_logic|Cs0wx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Cs0wx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Mq0wx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~21_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mq0wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mq0wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mq0wx4~2 .lut_mask = 64'hC0C0000040400000;
+defparam \soc_inst|m0_1|u_logic|Mq0wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y6_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mq0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mq0wx4~0_combout = ( \soc_inst|m0_1|u_logic|Et0wx4~combout & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Mq0wx4~2_combout & (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout ) #
+// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Et0wx4~combout & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Mq0wx4~2_combout &
+// ((\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Mq0wx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Et0wx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mq0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mq0wx4~0 .lut_mask = 64'h000000770000007F;
+defparam \soc_inst|m0_1|u_logic|Mq0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y7_N56
+dffeas \soc_inst|m0_1|u_logic|Psn2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Psn2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Psn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Psn2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y6_N14
+dffeas \soc_inst|m0_1|u_logic|Ohv2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ohv2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ohv2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ohv2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y7_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H1qwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H1qwx4~0_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Fi93z4~q & ( (\soc_inst|m0_1|u_logic|Ohv2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Wzy2z4~q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Fi93z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q & (\soc_inst|m0_1|u_logic|Psn2z4~q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~q & ((\soc_inst|m0_1|u_logic|Arn2z4~q ))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Fi93z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q & \soc_inst|m0_1|u_logic|Ohv2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (
+// !\soc_inst|m0_1|u_logic|Fi93z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q & (\soc_inst|m0_1|u_logic|Psn2z4~q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~q & ((\soc_inst|m0_1|u_logic|Arn2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Psn2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Arn2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ohv2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fi93z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H1qwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H1qwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H1qwx4~0 .lut_mask = 64'h474700CC474733FF;
+defparam \soc_inst|m0_1|u_logic|H1qwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y7_N20
+dffeas \soc_inst|m0_1|u_logic|F8u2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|F8u2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F8u2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F8u2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y7_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H1qwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H1qwx4~1_combout = ( \soc_inst|m0_1|u_logic|F473z4~q & ( \soc_inst|m0_1|u_logic|Eun2z4~q & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Wzy2z4~q & (\soc_inst|m0_1|u_logic|F8u2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Wzy2z4~q & ((\soc_inst|m0_1|u_logic|Od83z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F473z4~q & ( \soc_inst|m0_1|u_logic|Eun2z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q & (((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) #
+// (\soc_inst|m0_1|u_logic|F8u2z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q & (((\soc_inst|m0_1|u_logic|Od83z4~q & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|F473z4~q & ( !\soc_inst|m0_1|u_logic|Eun2z4~q & (
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~q & (\soc_inst|m0_1|u_logic|F8u2z4~q & ((\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q & (((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Od83z4~q )))) ) ) ) #
+// ( !\soc_inst|m0_1|u_logic|F473z4~q & ( !\soc_inst|m0_1|u_logic|Eun2z4~q & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q & (\soc_inst|m0_1|u_logic|F8u2z4~q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~q &
+// ((\soc_inst|m0_1|u_logic|Od83z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|F8u2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Od83z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|F473z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Eun2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H1qwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H1qwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H1qwx4~1 .lut_mask = 64'h00473347CC47FF47;
+defparam \soc_inst|m0_1|u_logic|H1qwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y7_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H1qwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H1qwx4~combout = ( \soc_inst|m0_1|u_logic|H1qwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & !\soc_inst|m0_1|u_logic|H1qwx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|H1qwx4~1_combout &
+// ( (\soc_inst|m0_1|u_logic|Rni2z4~q & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q ) # (!\soc_inst|m0_1|u_logic|H1qwx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|H1qwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|H1qwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H1qwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H1qwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H1qwx4 .lut_mask = 64'h5550555005000500;
+defparam \soc_inst|m0_1|u_logic|H1qwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y10_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eudwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eudwx4~0_combout = ( \soc_inst|m0_1|u_logic|H1qwx4~combout & ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( !\soc_inst|m0_1|u_logic|Bjxwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|H1qwx4~combout & (
+// \soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( !\soc_inst|m0_1|u_logic|Bjxwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|H1qwx4~combout & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Bjxwx4~combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|H1qwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Eudwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eudwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eudwx4~0 .lut_mask = 64'hFFFF0000F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Eudwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eudwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eudwx4~1_combout = ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout & ( \soc_inst|m0_1|u_logic|Eudwx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout & ( \soc_inst|m0_1|u_logic|Xtdwx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Eudwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Xtdwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Eudwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eudwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eudwx4~1 .lut_mask = 64'h00FF00FF0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Eudwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y8_N48
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[30]~29 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[30]~29_combout = ( \soc_inst|ram_1|write_cycle~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|hwdata_o~2_combout & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30 ) # (\soc_inst|ram_1|byte_select [3]) ) ) ) # (
+// \soc_inst|ram_1|write_cycle~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|hwdata_o~2_combout & ( (!\soc_inst|ram_1|byte_select [3] & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30 ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|ram_1|byte_select [3]),
+ .datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30 ),
+ .datad(gnd),
+ .datae(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|data_to_memory[30]~29_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[30]~29 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[30]~29 .lut_mask = 64'h00000C0C00003F3F;
+defparam \soc_inst|ram_1|data_to_memory[30]~29 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X14_Y6_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 (
+ .portawe(\soc_inst|ram_1|write_cycle~q ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|ram_1|data_to_memory[30]~29_combout ,\soc_inst|ram_1|data_to_memory[14]~30_combout }),
+ .portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+ .portabyteenamasks(1'b1),
+ .portbdatain(2'b00),
+ .portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_first_bit_number = 14;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_first_bit_number = 14;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002BB6DB6C3D723122C3230DCF739CE739CCB30B30B30B30B30B30B30DB3FFFFFFFFFFFFC3FA14000000000000000000000001";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y9_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qapwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qapwx4~0_combout = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout & ( (\soc_inst|m0_1|u_logic|B7owx4~combout & \soc_inst|interconnect_1|HRDATA[11]~3_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+ .datad(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qapwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qapwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qapwx4~0 .lut_mask = 64'h00000000000F000F;
+defparam \soc_inst|m0_1|u_logic|Qapwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y12_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D7iwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D7iwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Qapwx4~0_combout & ( \soc_inst|m0_1|u_logic|Mydwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Eudwx4~1_combout ) #
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qapwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Mydwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout &
+// \soc_inst|m0_1|u_logic|Eudwx4~1_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Eudwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Qapwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mydwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|D7iwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D7iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D7iwx4~0 .lut_mask = 64'hAAFA0000AFFF0000;
+defparam \soc_inst|m0_1|u_logic|D7iwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D7iwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D7iwx4~1_combout = ( \soc_inst|m0_1|u_logic|D7iwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|M1pwx4~4_combout & ((!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ) #
+// (!\soc_inst|m0_1|u_logic|Wfuwx4~combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|M1pwx4~4_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|D7iwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|D7iwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D7iwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D7iwx4~1 .lut_mask = 64'h00000000AFAEAFAE;
+defparam \soc_inst|m0_1|u_logic|D7iwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zuzvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zuzvx4~0_combout = ( \soc_inst|m0_1|u_logic|Ykyvx4~0_combout & ( \soc_inst|m0_1|u_logic|A9iwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Y7iwx4~2_combout & (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout &
+// ((\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) # (\soc_inst|m0_1|u_logic|O9iwx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Y7iwx4~2_combout & (((\soc_inst|m0_1|u_logic|Amyvx4~2_combout )) # (\soc_inst|m0_1|u_logic|O9iwx4~1_combout ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout & ( \soc_inst|m0_1|u_logic|A9iwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Y7iwx4~2_combout & (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout & ((\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) #
+// (\soc_inst|m0_1|u_logic|O9iwx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Y7iwx4~2_combout & (((\soc_inst|m0_1|u_logic|Amyvx4~2_combout )) # (\soc_inst|m0_1|u_logic|O9iwx4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ykyvx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|A9iwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Y7iwx4~2_combout & (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout & ((\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) # (\soc_inst|m0_1|u_logic|O9iwx4~1_combout )))) #
+// (\soc_inst|m0_1|u_logic|Y7iwx4~2_combout & (((\soc_inst|m0_1|u_logic|Amyvx4~2_combout )) # (\soc_inst|m0_1|u_logic|O9iwx4~1_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Y7iwx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|O9iwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|A9iwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zuzvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zuzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zuzvx4~0 .lut_mask = 64'h0000135F135F135F;
+defparam \soc_inst|m0_1|u_logic|Zuzvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y13_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zuzvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zuzvx4~1_combout = ( \soc_inst|m0_1|u_logic|D7iwx4~1_combout & ( \soc_inst|m0_1|u_logic|Zuzvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|B8nwx4~1_combout &
+// \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|D7iwx4~1_combout & ( \soc_inst|m0_1|u_logic|Zuzvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Omyvx4~1_combout & ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) #
+// ((\soc_inst|m0_1|u_logic|B8nwx4~1_combout & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|D7iwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Zuzvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zuzvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zuzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zuzvx4~1 .lut_mask = 64'h00000000A0A2F0F3;
+defparam \soc_inst|m0_1|u_logic|Zuzvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oszvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oszvx4~1_combout = ( !\soc_inst|m0_1|u_logic|Luzvx4~0_combout & ( \soc_inst|m0_1|u_logic|Zuzvx4~1_combout & ( (\soc_inst|m0_1|u_logic|Oszvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Add5~37_sumout ) #
+// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ))) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Oszvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Add5~37_sumout ),
+ .datae(!\soc_inst|m0_1|u_logic|Luzvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Zuzvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oszvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oszvx4~1 .lut_mask = 64'h000000000F030000;
+defparam \soc_inst|m0_1|u_logic|Oszvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y11_N25
+dffeas \soc_inst|m0_1|u_logic|Mvm2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Mvm2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mvm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mvm2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y12_N41
+dffeas \soc_inst|m0_1|u_logic|Ytm2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ytm2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ytm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ytm2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y11_N11
+dffeas \soc_inst|m0_1|u_logic|G493z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|G493z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G493z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G493z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y9_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qowwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qowwx4~0_combout = ( \soc_inst|m0_1|u_logic|Ipm2z4~q & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|R6v2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|G493z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ipm2z4~q & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q &
+// (!\soc_inst|m0_1|u_logic|R6v2z4~q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|G493z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ipm2z4~q & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (
+// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Wqm2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ipm2z4~q & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Wqm2z4~q ) #
+// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|R6v2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wqm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|G493z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ipm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qowwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qowwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qowwx4~0 .lut_mask = 64'hF3F3C0C0BB88BB88;
+defparam \soc_inst|m0_1|u_logic|Qowwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y13_N43
+dffeas \soc_inst|m0_1|u_logic|It63z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|It63z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|It63z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|It63z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y10_N25
+dffeas \soc_inst|m0_1|u_logic|Ixt2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ixt2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ixt2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ixt2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qowwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qowwx4~1_combout = ( \soc_inst|m0_1|u_logic|Svk2z4~q & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|R283z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q &
+// ( !\soc_inst|m0_1|u_logic|It63z4~DUPLICATE_q ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~q & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Ixt2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q & (
+// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Ksm2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|It63z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ixt2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ksm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|R283z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qowwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qowwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qowwx4~1 .lut_mask = 64'hF0F0CCCCAAAAFF00;
+defparam \soc_inst|m0_1|u_logic|Qowwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y8_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qowwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qowwx4~combout = ( \soc_inst|m0_1|u_logic|Qowwx4~1_combout & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & ((!\soc_inst|m0_1|u_logic|H3d3z4~q ) # (\soc_inst|m0_1|u_logic|Qowwx4~0_combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Qowwx4~1_combout & ( (\soc_inst|m0_1|u_logic|H3d3z4~q & (\soc_inst|m0_1|u_logic|T1d3z4~q & \soc_inst|m0_1|u_logic|Qowwx4~0_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Qowwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qowwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qowwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qowwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qowwx4 .lut_mask = 64'h000300030C0F0C0F;
+defparam \soc_inst|m0_1|u_logic|Qowwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X37_Y8_N38
+dffeas \soc_inst|m0_1|u_logic|H133z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|H133z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H133z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H133z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y11_N59
+dffeas \soc_inst|m0_1|u_logic|Yr13z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Yr13z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yr13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yr13z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y13_N10
+dffeas \soc_inst|m0_1|u_logic|Lq03z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Lq03z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lq03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lq03z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y8_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uvzvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uvzvx4~2_combout = ( \soc_inst|m0_1|u_logic|Lq03z4~q & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|H133z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lq03z4~q
+// & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|H133z4~q & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Lq03z4~q & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (
+// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|U593z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Yr13z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lq03z4~q & (
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|U593z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Yr13z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H133z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yr13z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|U593z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Lq03z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Uvzvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uvzvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uvzvx4~2 .lut_mask = 64'h03F303F30505F5F5;
+defparam \soc_inst|m0_1|u_logic|Uvzvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y13_N44
+dffeas \soc_inst|m0_1|u_logic|Zj53z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Zj53z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zj53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zj53z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y13_N17
+dffeas \soc_inst|m0_1|u_logic|Rtz2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rtz2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rtz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rtz2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y11_N1
+dffeas \soc_inst|m0_1|u_logic|Qa43z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Qa43z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qa43z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qa43z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y13_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uvzvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uvzvx4~1_combout = ( \soc_inst|m0_1|u_logic|Svk2z4~q & ( \soc_inst|m0_1|u_logic|Yaz2z4~q & ( !\soc_inst|m0_1|u_logic|Zj53z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q & ( \soc_inst|m0_1|u_logic|Yaz2z4~q & (
+// !\soc_inst|m0_1|u_logic|Qa43z4~DUPLICATE_q ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~q & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q & ( !\soc_inst|m0_1|u_logic|Rtz2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Zj53z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rtz2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Qa43z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Uvzvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uvzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uvzvx4~1 .lut_mask = 64'h0000F0F0FF00CCCC;
+defparam \soc_inst|m0_1|u_logic|Uvzvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y8_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uvzvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uvzvx4~0_combout = ( \soc_inst|m0_1|u_logic|H3d3z4~q & ( \soc_inst|m0_1|u_logic|Uvzvx4~1_combout & ( !\soc_inst|m0_1|u_logic|T1d3z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~q & ( \soc_inst|m0_1|u_logic|Uvzvx4~1_combout & (
+// (!\soc_inst|m0_1|u_logic|Uvzvx4~2_combout & !\soc_inst|m0_1|u_logic|T1d3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~q & ( !\soc_inst|m0_1|u_logic|Uvzvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Uvzvx4~2_combout & !\soc_inst|m0_1|u_logic|T1d3z4~q ) )
+// ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Uvzvx4~2_combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Uvzvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Uvzvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uvzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uvzvx4~0 .lut_mask = 64'hCC000000CC00FF00;
+defparam \soc_inst|m0_1|u_logic|Uvzvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y8_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uvzvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uvzvx4~combout = ( !\soc_inst|m0_1|u_logic|Qowwx4~combout & ( !\soc_inst|m0_1|u_logic|Uvzvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Y21xx4~0_combout & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) #
+// ((\soc_inst|m0_1|u_logic|Ytm2z4~q )))) # (\soc_inst|m0_1|u_logic|Y21xx4~0_combout & (\soc_inst|m0_1|u_logic|Mvm2z4~q & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ytm2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Mvm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ytm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Qowwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Uvzvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uvzvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uvzvx4 .lut_mask = 64'h8CAF000000000000;
+defparam \soc_inst|m0_1|u_logic|Uvzvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hwdata_o~4_combout = ( !\soc_inst|m0_1|u_logic|Uvzvx4~combout & ( \soc_inst|m0_1|u_logic|Y9t2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hwdata_o~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~4 .lut_mask = 64'h0F0F0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|hwdata_o~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y12_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J7b3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|J7b3z4~0_combout = ( !\soc_inst|m0_1|u_logic|hwdata_o~4_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|J7b3z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J7b3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J7b3z4~0 .lut_mask = 64'hFFFFFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|J7b3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y12_N22
+dffeas \soc_inst|m0_1|u_logic|J7b3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|J7b3z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|J7b3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J7b3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J7b3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ormvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ormvx4~0_combout = ( \soc_inst|m0_1|u_logic|Z8b3z4~q & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((\soc_inst|m0_1|u_logic|J7b3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ))
+// ) ) ) # ( !\soc_inst|m0_1|u_logic|Z8b3z4~q & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q & \soc_inst|m0_1|u_logic|J7b3z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Z8b3z4~q & ( !\soc_inst|m0_1|u_logic|Mxtvx4~combout & ( (!\soc_inst|m0_1|u_logic|Add0~89_sumout ) # ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z8b3z4~q & (
+// !\soc_inst|m0_1|u_logic|Mxtvx4~combout & ( ((!\soc_inst|m0_1|u_logic|Add0~89_sumout & \soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Add0~89_sumout ),
+ .datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|J7b3z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Z8b3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ormvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ormvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ormvx4~0 .lut_mask = 64'h2F2FEFEF0F3FCFFF;
+defparam \soc_inst|m0_1|u_logic|Ormvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y12_N32
+dffeas \soc_inst|m0_1|u_logic|Z8b3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Ormvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Z8b3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z8b3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z8b3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hrmvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hrmvx4~0_combout = ( \soc_inst|m0_1|u_logic|Dhb3z4~q & ( \soc_inst|m0_1|u_logic|Add0~9_sumout & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((\soc_inst|m0_1|u_logic|Mxtvx4~combout & \soc_inst|m0_1|u_logic|Nfb3z4~q )) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dhb3z4~q & ( \soc_inst|m0_1|u_logic|Add0~9_sumout & ( ((\soc_inst|m0_1|u_logic|Mxtvx4~combout & (\soc_inst|m0_1|u_logic|Nfb3z4~q & \soc_inst|m0_1|u_logic|Tna3z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Dhb3z4~q & ( !\soc_inst|m0_1|u_logic|Add0~9_sumout & ( (!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # (((!\soc_inst|m0_1|u_logic|Tna3z4~q ) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nfb3z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dhb3z4~q & ( !\soc_inst|m0_1|u_logic|Add0~9_sumout & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) #
+// (\soc_inst|m0_1|u_logic|Nfb3z4~q )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Nfb3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Dhb3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add0~9_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hrmvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hrmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hrmvx4~0 .lut_mask = 64'h0BFFFBFF01FFF1FF;
+defparam \soc_inst|m0_1|u_logic|Hrmvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X30_Y12_N14
+dffeas \soc_inst|m0_1|u_logic|Dhb3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Hrmvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Dhb3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dhb3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dhb3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oytvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oytvx4~1_combout = ( \soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Dhb3z4~q & (\soc_inst|m0_1|u_logic|Z8b3z4~q & \soc_inst|m0_1|u_logic|She3z4~q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Dhb3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Z8b3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|She3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Oytvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oytvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oytvx4~1 .lut_mask = 64'h0000000000030003;
+defparam \soc_inst|m0_1|u_logic|Oytvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y11_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oytvx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oytvx4~3_combout = ( \soc_inst|m0_1|u_logic|Iua3z4~q & ( (\soc_inst|m0_1|u_logic|Qxa3z4~q & (\soc_inst|m0_1|u_logic|Zva3z4~q & \soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE_q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Qxa3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Zva3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Iua3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Oytvx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oytvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oytvx4~3 .lut_mask = 64'h0000000000030003;
+defparam \soc_inst|m0_1|u_logic|Oytvx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oytvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oytvx4~2_combout = ( \soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Ara3z4~q & (\soc_inst|m0_1|u_logic|Xeo2z4~q & (\soc_inst|m0_1|u_logic|O0o2z4~q & \soc_inst|m0_1|u_logic|Jpa3z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ara3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Xeo2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|O0o2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Jpa3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Oytvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oytvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oytvx4~2 .lut_mask = 64'h0000000000010001;
+defparam \soc_inst|m0_1|u_logic|Oytvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oytvx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oytvx4~4_combout = ( \soc_inst|m0_1|u_logic|Rsa3z4~q & ( \soc_inst|m0_1|u_logic|W0b3z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|M2b3z4~q & (\soc_inst|m0_1|u_logic|Oytvx4~3_combout & \soc_inst|m0_1|u_logic|Oytvx4~2_combout )) ) )
+// )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|M2b3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Oytvx4~3_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Oytvx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Rsa3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|W0b3z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Oytvx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oytvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oytvx4~4 .lut_mask = 64'h0000000000000003;
+defparam \soc_inst|m0_1|u_logic|Oytvx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y11_N56
+dffeas \soc_inst|m0_1|u_logic|K7g3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Rpmvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|K7g3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K7g3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K7g3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oytvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oytvx4~0_combout = ( \soc_inst|m0_1|u_logic|Z2h3z4~q & ( (\soc_inst|m0_1|u_logic|S3i3z4~q & (\soc_inst|m0_1|u_logic|Ddi3z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|K7g3z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Uei3z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|S3i3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ddi3z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|K7g3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Uei3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Z2h3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Oytvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oytvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oytvx4~0 .lut_mask = 64'h0000000000010001;
+defparam \soc_inst|m0_1|u_logic|Oytvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oytvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oytvx4~combout = ( \soc_inst|m0_1|u_logic|Oytvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Oytvx4~1_combout & (\soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Aze3z4~q & \soc_inst|m0_1|u_logic|Oytvx4~4_combout
+// ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Oytvx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Aze3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Oytvx4~4_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Oytvx4~0_combout ),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Oytvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oytvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oytvx4 .lut_mask = 64'h0000000100000001;
+defparam \soc_inst|m0_1|u_logic|Oytvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y13_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Etmvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Etmvx4~0_combout = ( \soc_inst|m0_1|u_logic|Oytvx4~combout & ( ((!\soc_inst|m0_1|u_logic|F2o2z4~q & ((\soc_inst|m0_1|u_logic|Tna3z4~q ))) # (\soc_inst|m0_1|u_logic|F2o2z4~q & ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) #
+// (\soc_inst|m0_1|u_logic|Aea3z4~q )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Oytvx4~combout & ( (!\soc_inst|m0_1|u_logic|F2o2z4~q $ (!\soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) )
+// )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Aea3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|F2o2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Oytvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Etmvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Etmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Etmvx4~0 .lut_mask = 64'h3CFF3CFF3DFF3DFF;
+defparam \soc_inst|m0_1|u_logic|Etmvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y13_N59
+dffeas \soc_inst|m0_1|u_logic|F2o2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Etmvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|F2o2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F2o2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F2o2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mxtvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mxtvx4~combout = ( \soc_inst|m0_1|u_logic|Oytvx4~combout & ( \soc_inst|m0_1|u_logic|F2o2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|F2o2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Oytvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mxtvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mxtvx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Mxtvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y9_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bomvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bomvx4~0_combout = ( \soc_inst|m0_1|u_logic|Jpa3z4~q & ( \soc_inst|m0_1|u_logic|Add0~53_sumout & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((\soc_inst|m0_1|u_logic|L8m2z4~q & \soc_inst|m0_1|u_logic|Mxtvx4~combout )) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jpa3z4~q & ( \soc_inst|m0_1|u_logic|Add0~53_sumout & ( ((\soc_inst|m0_1|u_logic|L8m2z4~q & (\soc_inst|m0_1|u_logic|Tna3z4~q & \soc_inst|m0_1|u_logic|Mxtvx4~combout ))) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Jpa3z4~q & ( !\soc_inst|m0_1|u_logic|Add0~53_sumout & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|L8m2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jpa3z4~q & ( !\soc_inst|m0_1|u_logic|Add0~53_sumout & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) #
+// (\soc_inst|m0_1|u_logic|L8m2z4~q )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|L8m2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Jpa3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add0~53_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bomvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bomvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bomvx4~0 .lut_mask = 64'h31FFFDFF01FFCDFF;
+defparam \soc_inst|m0_1|u_logic|Bomvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y9_N2
+dffeas \soc_inst|m0_1|u_logic|Jpa3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Bomvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Jpa3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jpa3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jpa3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y9_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rilwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rilwx4~1_combout = ( \soc_inst|m0_1|u_logic|Jpa3z4~q & ( \soc_inst|m0_1|u_logic|I7owx4~combout & ( (\soc_inst|m0_1|u_logic|Rilwx4~0_combout & ((!\soc_inst|interconnect_1|HRDATA[19]~25_combout ) #
+// (!\soc_inst|m0_1|u_logic|B7owx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Jpa3z4~q & ( !\soc_inst|m0_1|u_logic|I7owx4~combout & ( (\soc_inst|m0_1|u_logic|Rilwx4~0_combout & ((!\soc_inst|interconnect_1|HRDATA[19]~25_combout ) #
+// (!\soc_inst|m0_1|u_logic|B7owx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jpa3z4~q & ( !\soc_inst|m0_1|u_logic|I7owx4~combout & ( (\soc_inst|m0_1|u_logic|Rilwx4~0_combout & ((!\soc_inst|interconnect_1|HRDATA[19]~25_combout ) #
+// (!\soc_inst|m0_1|u_logic|B7owx4~combout ))) ) ) )
+
+ .dataa(!\soc_inst|interconnect_1|HRDATA[19]~25_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Rilwx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Jpa3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rilwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rilwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rilwx4~1 .lut_mask = 64'h0E0E0E0E00000E0E;
+defparam \soc_inst|m0_1|u_logic|Rilwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rilwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rilwx4~2_combout = ( \soc_inst|m0_1|u_logic|Uvdwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Rilwx4~1_combout & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Qtdwx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Uvdwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Rilwx4~1_combout & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Oldwx4~0_combout &
+// \soc_inst|m0_1|u_logic|Qtdwx4~1_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Rilwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qtdwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Uvdwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rilwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rilwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rilwx4~2 .lut_mask = 64'h0A0B0A0B0E0F0E0F;
+defparam \soc_inst|m0_1|u_logic|Rilwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ll1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ll1wx4~0_combout = ( \soc_inst|m0_1|u_logic|Ihlwx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Sknwx4~2_combout & !\soc_inst|m0_1|u_logic|Whlwx4~3_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ihlwx4~3_combout & (
+// (!\soc_inst|m0_1|u_logic|Pmnwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Sknwx4~2_combout & !\soc_inst|m0_1|u_logic|Whlwx4~3_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Whlwx4~3_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ll1wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ll1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ll1wx4~0 .lut_mask = 64'hF8F8F8F888888888;
+defparam \soc_inst|m0_1|u_logic|Ll1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y13_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ll1wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ll1wx4~1_combout = ( \soc_inst|m0_1|u_logic|Imnwx4~combout & ( (!\soc_inst|m0_1|u_logic|Ll1wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rilwx4~2_combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Imnwx4~combout & ( (\soc_inst|m0_1|u_logic|Mjlwx4~1_combout & (!\soc_inst|m0_1|u_logic|Ll1wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rilwx4~2_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Mjlwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Rilwx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ll1wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ll1wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ll1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ll1wx4~1 .lut_mask = 64'h23002300AF00AF00;
+defparam \soc_inst|m0_1|u_logic|Ll1wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y13_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aj1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Aj1wx4~0_combout = ( \soc_inst|m0_1|u_logic|Ll1wx4~1_combout & ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Xk1wx4~0_combout & (\soc_inst|m0_1|u_logic|Aj1wx4~2_combout &
+// ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Mtwwx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ll1wx4~1_combout & ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Xk1wx4~0_combout &
+// (\soc_inst|m0_1|u_logic|Aj1wx4~2_combout & !\soc_inst|m0_1|u_logic|Glnwx4~1_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Xk1wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Aj1wx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ll1wx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Aj1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aj1wx4~0 .lut_mask = 64'h0000220000002202;
+defparam \soc_inst|m0_1|u_logic|Aj1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y6_N50
+dffeas \soc_inst|m0_1|u_logic|Ibe3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ibe3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ibe3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ibe3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X52_Y9_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cc9wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cc9wx4~2_combout = ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|Q6e3z4~q & (\soc_inst|m0_1|u_logic|Sjj2z4~q & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|F8e3z4~q & (\soc_inst|m0_1|u_logic|Sjj2z4~q & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|F8e3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Q6e3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cc9wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~2 .lut_mask = 64'h0A0000000C000000;
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y6_N35
+dffeas \soc_inst|m0_1|u_logic|U9e3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|U9e3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U9e3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U9e3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y6_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ge9wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ge9wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|U9e3z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q &
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|U9e3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ge9wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ge9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ge9wx4~0 .lut_mask = 64'h1000000000000000;
+defparam \soc_inst|m0_1|u_logic|Ge9wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cc9wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cc9wx4~0_combout = ( \soc_inst|m0_1|u_logic|Aud3z4~q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|Pvd3z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aud3z4~q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Pvd3z4~q ) #
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pvd3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Aud3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cc9wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~0 .lut_mask = 64'h00000000080C0800;
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y12_N20
+dffeas \soc_inst|m0_1|u_logic|Tyd3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Tyd3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tyd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tyd3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X50_Y9_N31
+dffeas \soc_inst|m0_1|u_logic|Exd3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Exd3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Exd3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Exd3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y12_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cc9wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cc9wx4~1_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|Exd3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Rni2z4~q & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
+// # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|Tyd3z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~q & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tyd3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Exd3z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cc9wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~1 .lut_mask = 64'h00A000C000000000;
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y6_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cc9wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cc9wx4~3_combout = ( !\soc_inst|m0_1|u_logic|Cc9wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Cc9wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Cc9wx4~2_combout & (!\soc_inst|m0_1|u_logic|Ge9wx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ibe3z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ibe3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Cc9wx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ge9wx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Cc9wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Cc9wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cc9wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~3 .lut_mask = 64'hD000000000000000;
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y6_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qk1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qk1wx4~0_combout = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( \soc_inst|m0_1|u_logic|Ai9wx4~combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Rkd3z4~q )) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Cc9wx4~3_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( \soc_inst|m0_1|u_logic|Ai9wx4~combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Rkd3z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Wce3z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( !\soc_inst|m0_1|u_logic|Ai9wx4~combout & ( (!\soc_inst|m0_1|u_logic|Rkd3z4~q
+// ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( !\soc_inst|m0_1|u_logic|Ai9wx4~combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Rkd3z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Wce3z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Wce3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rkd3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Cc9wx4~3_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ai9wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qk1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qk1wx4~0 .lut_mask = 64'hE4E4F5F5E4E4F5A0;
+defparam \soc_inst|m0_1|u_logic|Qk1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y6_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Owovx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Owovx4~combout = ( \soc_inst|m0_1|u_logic|Add5~45_sumout & ( \soc_inst|m0_1|u_logic|K1wvx4~combout ) ) # ( !\soc_inst|m0_1|u_logic|Add5~45_sumout & ( \soc_inst|m0_1|u_logic|K1wvx4~combout & (
+// (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout & (\soc_inst|m0_1|u_logic|Add3~81_sumout ))) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & (((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout &
+// \soc_inst|m0_1|u_logic|Add3~81_sumout )) # (\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~45_sumout & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout &
+// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout & (\soc_inst|m0_1|u_logic|Add3~81_sumout ))) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & (((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout & \soc_inst|m0_1|u_logic|Add3~81_sumout )) #
+// (\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~45_sumout & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout &
+// (\soc_inst|m0_1|u_logic|Add3~81_sumout ))) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & (((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout & \soc_inst|m0_1|u_logic|Add3~81_sumout )) # (\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Add3~81_sumout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Add5~45_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Owovx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Owovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Owovx4 .lut_mask = 64'h035703570357FFFF;
+defparam \soc_inst|m0_1|u_logic|Owovx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X19_Y6_N4
+dffeas \soc_inst|ram_1|saved_word_address[9] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Owovx4~combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|ram_1|always1~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|ram_1|saved_word_address [9]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|saved_word_address[9] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[9] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y5_N48
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[9]~9 (
+// Equation(s):
+// \soc_inst|ram_1|memory.raddr_a[9]~9_combout = ( \soc_inst|ram_1|always1~0_combout & ( (!\soc_inst|ram_1|write_cycle~q & (\soc_inst|m0_1|u_logic|Owovx4~combout )) # (\soc_inst|ram_1|write_cycle~q & ((\soc_inst|ram_1|saved_word_address [9]))) ) ) # (
+// !\soc_inst|ram_1|always1~0_combout & ( \soc_inst|ram_1|saved_word_address [9] ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Owovx4~combout ),
+ .datab(!\soc_inst|ram_1|saved_word_address [9]),
+ .datac(gnd),
+ .datad(!\soc_inst|ram_1|write_cycle~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|always1~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|memory.raddr_a[9]~9_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory.raddr_a[9]~9 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[9]~9 .lut_mask = 64'h3333333355335533;
+defparam \soc_inst|ram_1|memory.raddr_a[9]~9 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y9_N9
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[7]~11 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[7]~11_combout = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout & ( (!\soc_inst|interconnect_1|HRDATA[7]~10_combout & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) #
+// (\soc_inst|interconnect_1|HRDATA[7]~10_combout & (((!\soc_inst|interconnect_1|Equal1~0_combout ) # (\soc_inst|switches_1|switch_store[0][7]~q )))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout & (
+// (!\soc_inst|interconnect_1|HRDATA[7]~10_combout & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[7]~10_combout & (((\soc_inst|interconnect_1|Equal1~0_combout & \soc_inst|switches_1|switch_store[0][7]~q )))) ) )
+
+ .dataa(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+ .datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
+ .datac(!\soc_inst|interconnect_1|HRDATA[7]~10_combout ),
+ .datad(!\soc_inst|switches_1|switch_store[0][7]~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[7]~11_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[7]~11 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[7]~11 .lut_mask = 64'hA0A3A0A3ACAFACAF;
+defparam \soc_inst|interconnect_1|HRDATA[7]~11 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y12_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wywwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wywwx4~0_combout = ( \soc_inst|m0_1|u_logic|X0c3z4~q & ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|X0c3z4~q & ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Ylc3z4~q &
+// \soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|X0c3z4~q & ( !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Ylc3z4~q & \soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|X0c3z4~q
+// & ( !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Ylc3z4~q & \soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ylc3z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|X0c3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wywwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wywwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wywwx4~0 .lut_mask = 64'h050505050505FFFF;
+defparam \soc_inst|m0_1|u_logic|Wywwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y12_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wywwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wywwx4~1_combout = ( !\soc_inst|m0_1|u_logic|Wywwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|E0uvx4~combout & (((!\soc_inst|m0_1|u_logic|Tib3z4~q ) # (!\soc_inst|m0_1|u_logic|Qwowx4~combout )))) #
+// (\soc_inst|m0_1|u_logic|E0uvx4~combout & (!\soc_inst|m0_1|u_logic|Kkb3z4~q & ((!\soc_inst|m0_1|u_logic|Tib3z4~q ) # (!\soc_inst|m0_1|u_logic|Qwowx4~combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Kkb3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Tib3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wywwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wywwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wywwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wywwx4~1 .lut_mask = 64'hEEE0EEE000000000;
+defparam \soc_inst|m0_1|u_logic|Wywwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y12_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wywwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wywwx4~2_combout = ( \soc_inst|m0_1|u_logic|Wywwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|H6tvx4~0_combout & (((!\soc_inst|m0_1|u_logic|T4uvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Dhb3z4~q ))) #
+// (\soc_inst|m0_1|u_logic|H6tvx4~0_combout & (\soc_inst|m0_1|u_logic|Nfb3z4~q & ((!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dhb3z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Dhb3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Nfb3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wywwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wywwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wywwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wywwx4~2 .lut_mask = 64'h00000000AF23AF23;
+defparam \soc_inst|m0_1|u_logic|Wywwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y12_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wywwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wywwx4~3_combout = ( \soc_inst|m0_1|u_logic|K7pwx4~combout & ( \soc_inst|m0_1|u_logic|Wywwx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Bmb3z4~q & ((!\soc_inst|m0_1|u_logic|Zad3z4~q ) # (!\soc_inst|m0_1|u_logic|N1uvx4~combout ))) )
+// ) ) # ( !\soc_inst|m0_1|u_logic|K7pwx4~combout & ( \soc_inst|m0_1|u_logic|Wywwx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Zad3z4~q ) # (!\soc_inst|m0_1|u_logic|N1uvx4~combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Zad3z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Bmb3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wywwx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wywwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wywwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wywwx4~3 .lut_mask = 64'h00000000FFAAF0A0;
+defparam \soc_inst|m0_1|u_logic|Wywwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G9lwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G9lwx4~0_combout = ( \soc_inst|m0_1|u_logic|Wywwx4~3_combout & ( \soc_inst|m0_1|u_logic|Fq7wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[7]~11_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Wywwx4~3_combout & ( \soc_inst|m0_1|u_logic|Fq7wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[7]~11_combout ))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Wywwx4~3_combout & ( !\soc_inst|m0_1|u_logic|Fq7wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[7]~11_combout ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Wywwx4~3_combout & ( !\soc_inst|m0_1|u_logic|Fq7wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout & (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) #
+// (!\soc_inst|interconnect_1|HRDATA[7]~11_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+ .datad(!\soc_inst|interconnect_1|HRDATA[7]~11_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Wywwx4~3_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fq7wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G9lwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G9lwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G9lwx4~0 .lut_mask = 64'h8880CCC0AAA0FFF0;
+defparam \soc_inst|m0_1|u_logic|G9lwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R5zvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R5zvx4~0_combout = ( \soc_inst|m0_1|u_logic|Walwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|G9lwx4~0_combout & \soc_inst|m0_1|u_logic|V9iwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Walwx4~1_combout & (
+// ((!\soc_inst|m0_1|u_logic|G9lwx4~0_combout & \soc_inst|m0_1|u_logic|V9iwx4~0_combout )) # (\soc_inst|m0_1|u_logic|F8iwx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|G9lwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Walwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R5zvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R5zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R5zvx4~0 .lut_mask = 64'h0FCF0FCF00CC00CC;
+defparam \soc_inst|m0_1|u_logic|R5zvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y13_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R5zvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R5zvx4~1_combout = ( \soc_inst|m0_1|u_logic|U9lwx4~1_combout & ( !\soc_inst|m0_1|u_logic|R5zvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|W6iwx4~combout & ((!\soc_inst|m0_1|u_logic|Palwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|H9iwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U9lwx4~1_combout & ( !\soc_inst|m0_1|u_logic|R5zvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Palwx4~0_combout ) # (\soc_inst|m0_1|u_logic|H9iwx4~1_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|R5zvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R5zvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R5zvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R5zvx4~1 .lut_mask = 64'hCFCFCF0000000000;
+defparam \soc_inst|m0_1|u_logic|R5zvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R5zvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R5zvx4~2_combout = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (\soc_inst|m0_1|u_logic|R5zvx4~1_combout & (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|R7iwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (\soc_inst|m0_1|u_logic|R5zvx4~1_combout & ((\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) # (\soc_inst|m0_1|u_logic|R7iwx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|R5zvx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R5zvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R5zvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R5zvx4~2 .lut_mask = 64'h1313131313331333;
+defparam \soc_inst|m0_1|u_logic|R5zvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Po7wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Po7wx4~0_combout = ( \soc_inst|m0_1|u_logic|Fq7wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout & (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout & (!\soc_inst|m0_1|u_logic|Manwx4~0_combout &
+// !\soc_inst|m0_1|u_logic|Tq7wx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Fq7wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Manwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout & (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout &
+// !\soc_inst|m0_1|u_logic|Tq7wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout & (!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Tq7wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fq7wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Po7wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Po7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Po7wx4~0 .lut_mask = 64'h6040604020002000;
+defparam \soc_inst|m0_1|u_logic|Po7wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y11_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fc7wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fc7wx4~0_combout = ( \soc_inst|m0_1|u_logic|S8ewx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Hr7wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Vr7wx4~0_combout & \soc_inst|m0_1|u_logic|U2ewx4~0_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|S8ewx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Vr7wx4~0_combout & \soc_inst|m0_1|u_logic|U2ewx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Hr7wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Vr7wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|S8ewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fc7wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fc7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fc7wx4~0 .lut_mask = 64'h00F000F0CCFCCCFC;
+defparam \soc_inst|m0_1|u_logic|Fc7wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fc7wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fc7wx4~1_combout = ( !\soc_inst|m0_1|u_logic|Fc7wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout & (!\soc_inst|m0_1|u_logic|Po7wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Qs7wx4~1_combout ) #
+// (\soc_inst|m0_1|u_logic|Xs7wx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Z1ewx4~0_combout & (((!\soc_inst|m0_1|u_logic|Qs7wx4~1_combout )) # (\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Po7wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qs7wx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fc7wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fc7wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fc7wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fc7wx4~1 .lut_mask = 64'hF531F53100000000;
+defparam \soc_inst|m0_1|u_logic|Fc7wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cb3wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cb3wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|X4pvx4~combout & (((\soc_inst|m0_1|u_logic|R5zvx4~2_combout & ((!\soc_inst|m0_1|u_logic|Nd3wx4~combout ) #
+// (\soc_inst|m0_1|u_logic|K0qvx4~combout )))))) # (\soc_inst|m0_1|u_logic|X4pvx4~combout & ((!\soc_inst|m0_1|u_logic|K0qvx4~combout & (!\soc_inst|m0_1|u_logic|Nd3wx4~combout )) # (\soc_inst|m0_1|u_logic|K0qvx4~combout &
+// (((\soc_inst|m0_1|u_logic|Fc7wx4~1_combout )))))) ) ) # ( \soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|X4pvx4~combout & (((\soc_inst|m0_1|u_logic|R5zvx4~2_combout & ((!\soc_inst|m0_1|u_logic|Nd3wx4~combout ) #
+// (\soc_inst|m0_1|u_logic|K0qvx4~combout )))))) # (\soc_inst|m0_1|u_logic|X4pvx4~combout & ((!\soc_inst|m0_1|u_logic|K0qvx4~combout & (!\soc_inst|m0_1|u_logic|Nd3wx4~combout )) # (\soc_inst|m0_1|u_logic|K0qvx4~combout &
+// (((\soc_inst|m0_1|u_logic|Y5zvx4~2_combout )))))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Nd3wx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Y5zvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|K0qvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|R5zvx4~2_combout ),
+ .datag(!\soc_inst|m0_1|u_logic|Fc7wx4~1_combout ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cb3wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cb3wx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Cb3wx4~0 .lut_mask = 64'h44054405CCAFCCAF;
+defparam \soc_inst|m0_1|u_logic|Cb3wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X40_Y13_N1
+dffeas \soc_inst|m0_1|u_logic|Gci2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Cb3wx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Z9zvx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Gci2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gci2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gci2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y6_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y5zvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y5zvx4~0_combout = ( \soc_inst|m0_1|u_logic|Nd3wx4~combout & ( ((!\soc_inst|m0_1|u_logic|Gci2z4~q & \soc_inst|m0_1|u_logic|Rmawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Nd3wx4~combout & ( (!\soc_inst|m0_1|u_logic|Gci2z4~q & \soc_inst|m0_1|u_logic|Rmawx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Gci2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nd3wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Y5zvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y5zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y5zvx4~0 .lut_mask = 64'h00F000F033F333F3;
+defparam \soc_inst|m0_1|u_logic|Y5zvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y6_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y5zvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y5zvx4~1_combout = ( \soc_inst|m0_1|u_logic|A67wx4~0_combout & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Y5zvx4~0_combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) #
+// (\soc_inst|m0_1|u_logic|Phh2z4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|A67wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Y5zvx4~0_combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) #
+// (\soc_inst|m0_1|u_logic|Phh2z4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|A67wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Y5zvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Phh2z4~1_combout &
+// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Phh2z4~1_combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Y5zvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Phh2z4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|A67wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Y5zvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y5zvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y5zvx4~1 .lut_mask = 64'hA280AA220000AA22;
+defparam \soc_inst|m0_1|u_logic|Y5zvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y5_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y5zvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y5zvx4~2_combout = ( \soc_inst|m0_1|u_logic|Add5~77_sumout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout & \soc_inst|m0_1|u_logic|Y5zvx4~1_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Add5~77_sumout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & \soc_inst|m0_1|u_logic|Y5zvx4~1_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Y5zvx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~77_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Y5zvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y5zvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y5zvx4~2 .lut_mask = 64'h00CC00CC000C000C;
+defparam \soc_inst|m0_1|u_logic|Y5zvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y5_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J3qvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|J3qvx4~0_combout = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( \soc_inst|m0_1|u_logic|R5zvx4~1_combout & ( (\soc_inst|m0_1|u_logic|Y5zvx4~2_combout & (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout ) #
+// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) # (\soc_inst|m0_1|u_logic|R7iwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( \soc_inst|m0_1|u_logic|R5zvx4~1_combout & ( (\soc_inst|m0_1|u_logic|Y5zvx4~2_combout &
+// ((\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) # (\soc_inst|m0_1|u_logic|R7iwx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Y5zvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|R5zvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J3qvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J3qvx4~0 .lut_mask = 64'h000000000707070F;
+defparam \soc_inst|m0_1|u_logic|J3qvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y8_N19
+dffeas \soc_inst|m0_1|u_logic|Cc63z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Cc63z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cc63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cc63z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y7_N32
+dffeas \soc_inst|m0_1|u_logic|Isi2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Isi2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Isi2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Isi2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y7_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N3ywx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N3ywx4~0_combout = ( !\soc_inst|m0_1|u_logic|Cc63z4~q & ( \soc_inst|m0_1|u_logic|Isi2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Cc63z4~q & ( !\soc_inst|m0_1|u_logic|Isi2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cc63z4~q & ( !\soc_inst|m0_1|u_logic|Isi2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) )
+// )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Cc63z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Isi2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N3ywx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N3ywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N3ywx4~0 .lut_mask = 64'h4040400000400000;
+defparam \soc_inst|m0_1|u_logic|N3ywx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X50_Y6_N7
+dffeas \soc_inst|m0_1|u_logic|Glj2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Glj2z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Glj2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Glj2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Glj2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y6_N32
+dffeas \soc_inst|m0_1|u_logic|Lpu2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Lpu2z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Lpu2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lpu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lpu2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y6_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N3ywx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N3ywx4~3_combout = ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & !\soc_inst|m0_1|u_logic|Lpu2z4~q )) ) ) ) #
+// ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Glj2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Glj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Lpu2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N3ywx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N3ywx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N3ywx4~3 .lut_mask = 64'h0000080800000A00;
+defparam \soc_inst|m0_1|u_logic|N3ywx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y7_N25
+dffeas \soc_inst|m0_1|u_logic|Cgt2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Cgt2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cgt2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cgt2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y7_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N3ywx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N3ywx4~2_combout = ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Wzy2z4~q & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Ll73z4~q )) ) ) ) #
+// ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Cgt2z4~q & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Cgt2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ll73z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N3ywx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N3ywx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N3ywx4~2 .lut_mask = 64'h0000080800000A00;
+defparam \soc_inst|m0_1|u_logic|N3ywx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y7_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N3ywx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N3ywx4~1_combout = ( !\soc_inst|m0_1|u_logic|Xti2z4~q & ( \soc_inst|m0_1|u_logic|Koj2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Wzy2z4~q &
+// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Xti2z4~q & ( !\soc_inst|m0_1|u_logic|Koj2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Wzy2z4~q &
+// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xti2z4~q & ( !\soc_inst|m0_1|u_logic|Koj2z4~q & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Wzy2z4~q & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Xti2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Koj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N3ywx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N3ywx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N3ywx4~1 .lut_mask = 64'h0005000400010000;
+defparam \soc_inst|m0_1|u_logic|N3ywx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y7_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N3ywx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N3ywx4~combout = ( !\soc_inst|m0_1|u_logic|N3ywx4~2_combout & ( !\soc_inst|m0_1|u_logic|N3ywx4~1_combout & ( (!\soc_inst|m0_1|u_logic|N3ywx4~0_combout & !\soc_inst|m0_1|u_logic|N3ywx4~3_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|N3ywx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|N3ywx4~3_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|N3ywx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|N3ywx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N3ywx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N3ywx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N3ywx4 .lut_mask = 64'hA0A0000000000000;
+defparam \soc_inst|m0_1|u_logic|N3ywx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y9_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U2ewx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U2ewx4~0_combout = ( !\soc_inst|m0_1|u_logic|N3ywx4~combout & ( (!\soc_inst|m0_1|u_logic|Wai2z4~q & ((!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ark2z4~q & \soc_inst|m0_1|u_logic|X77wx4~combout )))) )
+// )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|N3ywx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U2ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U2ewx4~0 .lut_mask = 64'hAA08AA0800000000;
+defparam \soc_inst|m0_1|u_logic|U2ewx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y9_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M7qwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|M7qwx4~0_combout = ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout & ( (\soc_inst|m0_1|u_logic|U2ewx4~0_combout & (((\soc_inst|m0_1|u_logic|Npk2z4~q & \soc_inst|m0_1|u_logic|Aok2z4~q )) # (\soc_inst|m0_1|u_logic|Qxc2z4~combout ))) ) )
+// # ( !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout & ( (\soc_inst|m0_1|u_logic|U2ewx4~0_combout & ((\soc_inst|m0_1|u_logic|Aok2z4~q ) # (\soc_inst|m0_1|u_logic|Qxc2z4~combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Qxc2z4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|M7qwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M7qwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M7qwx4~0 .lut_mask = 64'h0333033303130313;
+defparam \soc_inst|m0_1|u_logic|M7qwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y9_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mjlwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mjlwx4~0_combout = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 & ( (!\soc_inst|m0_1|u_logic|T2owx4~1_combout & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # ((!\soc_inst|interconnect_1|HRDATA[29]~0_combout &
+// \soc_inst|interconnect_1|HRDATA[25]~1_combout )))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 & ( (!\soc_inst|m0_1|u_logic|T2owx4~1_combout & (((!\soc_inst|m0_1|u_logic|B7owx4~combout ) #
+// (\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[29]~0_combout ))) ) )
+
+ .dataa(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+ .datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mjlwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mjlwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mjlwx4~0 .lut_mask = 64'hF700F700F200F200;
+defparam \soc_inst|m0_1|u_logic|Mjlwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y13_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mjlwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mjlwx4~1_combout = ( \soc_inst|m0_1|u_logic|Iutwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Mjlwx4~0_combout & (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout & ((!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Kvtwx4~combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Iutwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Mjlwx4~0_combout & ((!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Kvtwx4~combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Kvtwx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Mjlwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Iutwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mjlwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mjlwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mjlwx4~1 .lut_mask = 64'h0E0E0E0E0E000E00;
+defparam \soc_inst|m0_1|u_logic|Mjlwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y13_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bo0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bo0wx4~0_combout = ( \soc_inst|m0_1|u_logic|Ihlwx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Whlwx4~3_combout & \soc_inst|m0_1|u_logic|Phlwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ihlwx4~3_combout & (
+// ((!\soc_inst|m0_1|u_logic|Whlwx4~3_combout & \soc_inst|m0_1|u_logic|Phlwx4~0_combout )) # (\soc_inst|m0_1|u_logic|W6iwx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Whlwx4~3_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bo0wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bo0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bo0wx4~0 .lut_mask = 64'h0CFF0CFF0C0C0C0C;
+defparam \soc_inst|m0_1|u_logic|Bo0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y13_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bo0wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bo0wx4~combout = ( \soc_inst|m0_1|u_logic|Yilwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Bo0wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Mjlwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Yilwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Bo0wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Rilwx4~2_combout & ((\soc_inst|m0_1|u_logic|Mjlwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Mjlwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Rilwx4~2_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Bo0wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bo0wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bo0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bo0wx4 .lut_mask = 64'h0707777700000000;
+defparam \soc_inst|m0_1|u_logic|Bo0wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X50_Y10_N26
+dffeas \soc_inst|m0_1|u_logic|Zjq2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Ithvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Zjq2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zjq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zjq2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y10_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ithvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ithvx4~0_combout = ( \soc_inst|m0_1|u_logic|S5pvx4~combout & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & ((\soc_inst|m0_1|u_logic|Add2~69_sumout ))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Zjq2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|S5pvx4~combout & ( (!\soc_inst|m0_1|u_logic|Zjq2z4~q & \soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Zjq2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Add2~69_sumout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ithvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ithvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ithvx4~0 .lut_mask = 64'h00AA33AA00AA33AA;
+defparam \soc_inst|m0_1|u_logic|Ithvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y10_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ithvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ithvx4~1_combout = ( \soc_inst|m0_1|u_logic|Add5~49_sumout & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout & (!\soc_inst|m0_1|u_logic|Ithvx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Bo0wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~49_sumout & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ithvx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Bo0wx4~combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Bo0wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ithvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Add5~49_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ithvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ithvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ithvx4~1 .lut_mask = 64'h00000000CF008A00;
+defparam \soc_inst|m0_1|u_logic|Ithvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X50_Y10_N25
+dffeas \soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Ithvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y5_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ql0wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ql0wx4~combout = ( \soc_inst|m0_1|u_logic|Add3~65_sumout & ( \soc_inst|m0_1|u_logic|Add5~49_sumout & ( (((\soc_inst|m0_1|u_logic|Wo0wx4~0_combout & \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) #
+// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~65_sumout & ( \soc_inst|m0_1|u_logic|Add5~49_sumout & ( ((\soc_inst|m0_1|u_logic|Wo0wx4~0_combout &
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~65_sumout & ( !\soc_inst|m0_1|u_logic|Add5~49_sumout & ( ((\soc_inst|m0_1|u_logic|Wo0wx4~0_combout &
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~65_sumout & ( !\soc_inst|m0_1|u_logic|Add5~49_sumout & ( (\soc_inst|m0_1|u_logic|Wo0wx4~0_combout &
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Add3~65_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~49_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ql0wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ql0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ql0wx4 .lut_mask = 64'h00330F3F55775F7F;
+defparam \soc_inst|m0_1|u_logic|Ql0wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y6_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xvjvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xvjvx4~0_combout = ( \soc_inst|m0_1|u_logic|L7p2z4~q & ( \soc_inst|m0_1|u_logic|Ql0wx4~combout & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) #
+// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L7p2z4~q & ( \soc_inst|m0_1|u_logic|Ql0wx4~combout & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout &
+// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|L7p2z4~q & ( !\soc_inst|m0_1|u_logic|Ql0wx4~combout & (
+// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|L7p2z4~q & ( !\soc_inst|m0_1|u_logic|Ql0wx4~combout & (
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|L7p2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ql0wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xvjvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xvjvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xvjvx4~0 .lut_mask = 64'h0B0BFBFB0B00FB00;
+defparam \soc_inst|m0_1|u_logic|Xvjvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y6_N25
+dffeas \soc_inst|m0_1|u_logic|L7p2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Xvjvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|L7p2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L7p2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|L7p2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y9_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nn0wx4~1_combout = ( !\soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|L7p2z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~q & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|L7p2z4~q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~q &
+// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|L7p2z4~q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q &
+// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|T1d3z4~q $ (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|L7p2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nn0wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~1 .lut_mask = 64'h8400800004000000;
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y10_N40
+dffeas \soc_inst|m0_1|u_logic|Ht53z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ht53z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ht53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ht53z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y11_N10
+dffeas \soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nn0wx4~3_combout = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( (\soc_inst|m0_1|u_logic|Svk2z4~q & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Ht53z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ht53z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nn0wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~3 .lut_mask = 64'h000000CA00000000;
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X36_Y9_N2
+dffeas \soc_inst|m0_1|u_logic|Yj43z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Yj43z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yj43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yj43z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X36_Y9_N59
+dffeas \soc_inst|m0_1|u_logic|A9p2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|A9p2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|A9p2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|A9p2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y9_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nn0wx4~2_combout = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|T1d3z4~q & ( (!\soc_inst|m0_1|u_logic|A9p2z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q
+// )) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( (!\soc_inst|m0_1|u_logic|Yj43z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Yj43z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|A9p2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nn0wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~2 .lut_mask = 64'h000000A0000000C0;
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y9_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nn0wx4~5_combout = ( !\soc_inst|m0_1|u_logic|Nn0wx4~3_combout & ( !\soc_inst|m0_1|u_logic|Nn0wx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Nn0wx4~4_combout & (!\soc_inst|m0_1|u_logic|Nn0wx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Nr2xx4~0_combout & !\soc_inst|m0_1|u_logic|Nn0wx4~1_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nn0wx4~4_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Nn0wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Nr2xx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Nn0wx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Nn0wx4~3_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Nn0wx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nn0wx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y9_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nn0wx4~combout = (\soc_inst|m0_1|u_logic|Nn0wx4~5_combout & \soc_inst|m0_1|u_logic|Nn0wx4~8_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Nn0wx4~5_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Nn0wx4~8_combout ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nn0wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nn0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4 .lut_mask = 64'h000F000F000F000F;
+defparam \soc_inst|m0_1|u_logic|Nn0wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y7_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Un0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Un0wx4~0_combout = ( \soc_inst|m0_1|u_logic|Muawx4~0_combout & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) #
+// (!\soc_inst|m0_1|u_logic|Oaawx4~1_combout $ (\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Muawx4~0_combout & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Oaawx4~1_combout $ (\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Muawx4~0_combout & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout & (
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout & ((!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Oaawx4~1_combout $ (\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|X8zvx4~combout &
+// (!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout & (!\soc_inst|m0_1|u_logic|Oaawx4~1_combout $ (\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Muawx4~0_combout & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout & (
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Oaawx4~1_combout $ (!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Oaawx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Un0wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Un0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Un0wx4~0 .lut_mask = 64'hEDDEE8D4E0D0E0D0;
+defparam \soc_inst|m0_1|u_logic|Un0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y10_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xl0wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xl0wx4~1_combout = ( \soc_inst|m0_1|u_logic|Un0wx4~0_combout & ( \soc_inst|m0_1|u_logic|Add5~49_sumout & ( (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout &
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nn0wx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Un0wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Add5~49_sumout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout &
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nn0wx4~combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Nn0wx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Un0wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~49_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xl0wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xl0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xl0wx4~1 .lut_mask = 64'h0000F03000005010;
+defparam \soc_inst|m0_1|u_logic|Xl0wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y10_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xl0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xl0wx4~0_combout = ( \soc_inst|m0_1|u_logic|Xl0wx4~1_combout & ( \soc_inst|m0_1|u_logic|Bo0wx4~combout & ( (((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & \soc_inst|m0_1|u_logic|B8nwx4~1_combout )) #
+// (\soc_inst|m0_1|u_logic|D31wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Xl0wx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Bo0wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xl0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xl0wx4~0 .lut_mask = 64'h0000000000003F7F;
+defparam \soc_inst|m0_1|u_logic|Xl0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X39_Y10_N2
+dffeas \soc_inst|m0_1|u_logic|Q6u2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Q6u2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q6u2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Q6u2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y10_N25
+dffeas \soc_inst|m0_1|u_logic|Q273z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Q273z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q273z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Q273z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X50_Y9_N55
+dffeas \soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y10_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bjxwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bjxwx4~1_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Wzy2z4~q & ( \soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (
+// \soc_inst|m0_1|u_logic|Wzy2z4~q & ( \soc_inst|m0_1|u_logic|Q273z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q & ( \soc_inst|m0_1|u_logic|Q6u2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (
+// !\soc_inst|m0_1|u_logic|Wzy2z4~q & ( \soc_inst|m0_1|u_logic|Ecp2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Q6u2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Q273z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ecp2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bjxwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bjxwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bjxwx4~1 .lut_mask = 64'h00FF555533330F0F;
+defparam \soc_inst|m0_1|u_logic|Bjxwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X39_Y10_N26
+dffeas \soc_inst|m0_1|u_logic|Pap2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Pap2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pap2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pap2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y10_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bjxwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bjxwx4~0_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Wzy2z4~q & ( \soc_inst|m0_1|u_logic|Qg93z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Wzy2z4~q &
+// ( \soc_inst|m0_1|u_logic|A9p2z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q & ( \soc_inst|m0_1|u_logic|Zfv2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q
+// & ( \soc_inst|m0_1|u_logic|Pap2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pap2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|A9p2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Qg93z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Zfv2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bjxwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bjxwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bjxwx4~0 .lut_mask = 64'h555500FF33330F0F;
+defparam \soc_inst|m0_1|u_logic|Bjxwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y10_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bjxwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bjxwx4~combout = ( \soc_inst|m0_1|u_logic|Rni2z4~q & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Bjxwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Fgm2z4~q & ((!\soc_inst|m0_1|u_logic|Bjxwx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Bjxwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Bjxwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bjxwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bjxwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bjxwx4 .lut_mask = 64'h00000000F5A0F5A0;
+defparam \soc_inst|m0_1|u_logic|Bjxwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y10_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jtdwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jtdwx4~0_combout = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( !\soc_inst|m0_1|u_logic|Dmvwx4~combout ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout & ( !\soc_inst|m0_1|u_logic|Bjxwx4~combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Bjxwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Dmvwx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jtdwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jtdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jtdwx4~0 .lut_mask = 64'hF0F0F0F0FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Jtdwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y12_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jtdwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jtdwx4~1_combout = ( \soc_inst|m0_1|u_logic|X0ewx4~0_combout & ( (\soc_inst|m0_1|u_logic|Jtdwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|X0ewx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout & \soc_inst|m0_1|u_logic|Jtdwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Jtdwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|X0ewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jtdwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jtdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jtdwx4~1 .lut_mask = 64'h00AA00AA55FF55FF;
+defparam \soc_inst|m0_1|u_logic|Jtdwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: IOIBUF_X16_Y0_N1
+cyclonev_io_ibuf \SW[1]~input (
+ .i(SW[1]),
+ .ibar(gnd),
+ .dynamicterminationcontrol(gnd),
+ .o(\SW[1]~input_o ));
+// synopsys translate_off
+defparam \SW[1]~input .bus_hold = "false";
+defparam \SW[1]~input .simulate_z_as = "z";
+// synopsys translate_on
+
+// Location: FF_X24_Y10_N47
+dffeas \soc_inst|switches_1|switch_store[1][1] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\SW[1]~input_o ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|switches_1|always0~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|switches_1|switch_store[1][1]~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[1][1] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[1][1] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y10_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mbtwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mbtwx4~0_combout = ( \soc_inst|interconnect_1|Equal1~0_combout & ( \soc_inst|m0_1|u_logic|B7owx4~combout & ( (\soc_inst|interconnect_1|HRDATA[20]~7_combout & \soc_inst|switches_1|switch_store[1][1]~q ) ) ) ) # (
+// !\soc_inst|interconnect_1|Equal1~0_combout & ( \soc_inst|m0_1|u_logic|B7owx4~combout & ( (\soc_inst|interconnect_1|HRDATA[20]~7_combout & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
+ .datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 ),
+ .datad(!\soc_inst|switches_1|switch_store[1][1]~q ),
+ .datae(!\soc_inst|interconnect_1|Equal1~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mbtwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mbtwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mbtwx4~0 .lut_mask = 64'h0000000003030033;
+defparam \soc_inst|m0_1|u_logic|Mbtwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bgfwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bgfwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Mbtwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # ((\soc_inst|m0_1|u_logic|B2i3z4~q )))) #
+// (\soc_inst|m0_1|u_logic|I7owx4~combout & (\soc_inst|m0_1|u_logic|S3i3z4~q & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|B2i3z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|S3i3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|B2i3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Mbtwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bgfwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bgfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bgfwx4~0 .lut_mask = 64'h8CAF8CAF00000000;
+defparam \soc_inst|m0_1|u_logic|Bgfwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bgfwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bgfwx4~1_combout = ( \soc_inst|m0_1|u_logic|Bgfwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout & ((\soc_inst|m0_1|u_logic|Mrdwx4~1_combout ))) #
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout & (\soc_inst|m0_1|u_logic|Jtdwx4~1_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Jtdwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Mrdwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Bgfwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bgfwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bgfwx4~1 .lut_mask = 64'h00000000ABEFABEF;
+defparam \soc_inst|m0_1|u_logic|Bgfwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C2rvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C2rvx4~0_combout = ( \soc_inst|m0_1|u_logic|Wjyvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Khfwx4~3_combout & \soc_inst|m0_1|u_logic|Omyvx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Wjyvx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Khfwx4~3_combout & \soc_inst|m0_1|u_logic|Omyvx4~1_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Khfwx4~3_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C2rvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C2rvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C2rvx4~0 .lut_mask = 64'hCCFCCCFC00F000F0;
+defparam \soc_inst|m0_1|u_logic|C2rvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y12_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C2rvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C2rvx4~1_combout = ( \soc_inst|m0_1|u_logic|Pgfwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Amyvx4~2_combout & !\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Pgfwx4~1_combout & (
+// (!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Amyvx4~2_combout & !\soc_inst|m0_1|u_logic|Rhfwx4~2_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pgfwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C2rvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C2rvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C2rvx4~1 .lut_mask = 64'hFFC0FFC0C0C0C0C0;
+defparam \soc_inst|m0_1|u_logic|C2rvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C2rvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C2rvx4~2_combout = ( !\soc_inst|m0_1|u_logic|C2rvx4~1_combout & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|C2rvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|B8nwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C2rvx4~1_combout & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout & !\soc_inst|m0_1|u_logic|C2rvx4~0_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|C2rvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|C2rvx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C2rvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C2rvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C2rvx4~2 .lut_mask = 64'hCC000000CF000000;
+defparam \soc_inst|m0_1|u_logic|C2rvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qppvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qppvx4~2_combout = ( \soc_inst|m0_1|u_logic|C2rvx4~2_combout & ( (\soc_inst|m0_1|u_logic|Qppvx4~1_combout & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Htyvx4~3_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qppvx4~1_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|C2rvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qppvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qppvx4~2 .lut_mask = 64'h0000000050555055;
+defparam \soc_inst|m0_1|u_logic|Qppvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X48_Y8_N23
+dffeas \soc_inst|m0_1|u_logic|Ukt2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ukt2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ukt2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ukt2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y9_N44
+dffeas \soc_inst|m0_1|u_logic|Ug63z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ug63z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ug63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ug63z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y8_N52
+dffeas \soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y9_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V7ywx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|V7ywx4~1_combout = ( \soc_inst|m0_1|u_logic|Ruj2z4~q & ( \soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Svk2z4~q & (!\soc_inst|m0_1|u_logic|Ukt2z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Svk2z4~q & ((!\soc_inst|m0_1|u_logic|Ug63z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ruj2z4~q & ( \soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE_q & (
+// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Svk2z4~q ) # ((!\soc_inst|m0_1|u_logic|Ukt2z4~q )))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Svk2z4~q & ((!\soc_inst|m0_1|u_logic|Ug63z4~q )))) ) )
+// ) # ( \soc_inst|m0_1|u_logic|Ruj2z4~q & ( !\soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Svk2z4~q & (!\soc_inst|m0_1|u_logic|Ukt2z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (((!\soc_inst|m0_1|u_logic|Ug63z4~q )) # (\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ruj2z4~q & ( !\soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE_q & (
+// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Svk2z4~q ) # ((!\soc_inst|m0_1|u_logic|Ukt2z4~q )))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (((!\soc_inst|m0_1|u_logic|Ug63z4~q )) # (\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) )
+// )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ukt2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ug63z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ruj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|V7ywx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V7ywx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V7ywx4~1 .lut_mask = 64'hFDB97531ECA86420;
+defparam \soc_inst|m0_1|u_logic|V7ywx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y9_N19
+dffeas \soc_inst|m0_1|u_logic|Txj2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Txj2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Txj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Txj2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y9_N28
+dffeas \soc_inst|m0_1|u_logic|Duu2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Duu2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Duu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Duu2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y12_N55
+dffeas \soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y9_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V7ywx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|V7ywx4~0_combout = ( \soc_inst|m0_1|u_logic|Svk2z4~q & ( \soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q & ((!\soc_inst|m0_1|u_logic|Duu2z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q &
+// (!\soc_inst|m0_1|u_logic|Txj2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q & ( \soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Fwj2z4~q & \soc_inst|m0_1|u_logic|Yaz2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~q & (
+// !\soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q & ((!\soc_inst|m0_1|u_logic|Duu2z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|Txj2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q & (
+// !\soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Fwj2z4~q ) # (!\soc_inst|m0_1|u_logic|Yaz2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fwj2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Txj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Duu2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|V7ywx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V7ywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V7ywx4~0 .lut_mask = 64'hFAFAFC0C0A0AFC0C;
+defparam \soc_inst|m0_1|u_logic|V7ywx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y9_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V7ywx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|V7ywx4~combout = ( \soc_inst|m0_1|u_logic|V7ywx4~0_combout & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & ((\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|V7ywx4~1_combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|V7ywx4~0_combout & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|V7ywx4~1_combout & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|V7ywx4~1_combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|V7ywx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|V7ywx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V7ywx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V7ywx4 .lut_mask = 64'h1100110011551155;
+defparam \soc_inst|m0_1|u_logic|V7ywx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y9_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A7ywx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|A7ywx4~0_combout = ( \soc_inst|m0_1|u_logic|V7ywx4~combout & ( (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q & (((!\soc_inst|m0_1|u_logic|Fzl2z4~q & \soc_inst|m0_1|u_logic|Sy2wx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|V7ywx4~combout & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q & (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout & !\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|V7ywx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|A7ywx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|A7ywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A7ywx4~0 .lut_mask = 64'h220022002F002F00;
+defparam \soc_inst|m0_1|u_logic|A7ywx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y9_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D5ywx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D5ywx4~0_combout = ( \soc_inst|m0_1|u_logic|A7ywx4~0_combout & ( (\soc_inst|m0_1|u_logic|Ark2z4~q & \soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|A7ywx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q
+// ) # (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|A7ywx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D5ywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D5ywx4~0 .lut_mask = 64'hFFF0FFF0000F000F;
+defparam \soc_inst|m0_1|u_logic|D5ywx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y12_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F7qwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|F7qwx4~combout = ( \soc_inst|m0_1|u_logic|Xuxwx4~combout & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout & (\soc_inst|m0_1|u_logic|Fij2z4~q & !\soc_inst|m0_1|u_logic|D5ywx4~0_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Xuxwx4~combout & ( (\soc_inst|m0_1|u_logic|Fij2z4~q & ((\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|F7qwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F7qwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F7qwx4 .lut_mask = 64'h050F050F0A000A00;
+defparam \soc_inst|m0_1|u_logic|F7qwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y8_N36
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[26]~8 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[26]~8_combout = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & ((!\soc_inst|ram_1|byte_select [3]) # (\soc_inst|m0_1|u_logic|hwdata_o~10_combout ))) ) ) # (
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & (\soc_inst|m0_1|u_logic|hwdata_o~10_combout & \soc_inst|ram_1|byte_select [3])) ) )
+
+ .dataa(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|hwdata_o~10_combout ),
+ .datad(!\soc_inst|ram_1|byte_select [3]),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|data_to_memory[26]~8_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[26]~8 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[26]~8 .lut_mask = 64'h0005000555055505;
+defparam \soc_inst|ram_1|data_to_memory[26]~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X26_Y8_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 (
+ .portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|ram_1|data_to_memory[26]~8_combout ,\soc_inst|ram_1|data_to_memory[2]~7_combout }),
+ .portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+ .portabyteenamasks(1'b1),
+ .portbdatain(2'b00),
+ .portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_first_bit_number = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_first_bit_number = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003B2CF7C680700001601080A0501005014A40A00A40A00A40A00A40803FFFFFFFFFFFFD70014110404444400000041001110";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y9_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T7qwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T7qwx4~0_combout = ( \soc_inst|interconnect_1|HRDATA[29]~0_combout & ( (\soc_inst|m0_1|u_logic|B7owx4~combout & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[29]~0_combout &
+// ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout & \soc_inst|m0_1|u_logic|B7owx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+ .datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 ),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|T7qwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T7qwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T7qwx4~0 .lut_mask = 64'h0C0C0C0C000F000F;
+defparam \soc_inst|m0_1|u_logic|T7qwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y9_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jkmwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jkmwx4~0_combout = ( !\soc_inst|m0_1|u_logic|T7qwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Wfuwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Hzj2z4~q ) # (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Hzj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|T7qwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jkmwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jkmwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jkmwx4~0 .lut_mask = 64'hFFFCFFFC00000000;
+defparam \soc_inst|m0_1|u_logic|Jkmwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y12_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jkmwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jkmwx4~1_combout = ( \soc_inst|m0_1|u_logic|A6ewx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout & (\soc_inst|m0_1|u_logic|Jkmwx4~0_combout & ((!\soc_inst|m0_1|u_logic|F7qwx4~combout ) #
+// (!\soc_inst|m0_1|u_logic|M7qwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|A6ewx4~0_combout & ( (\soc_inst|m0_1|u_logic|Jkmwx4~0_combout & ((!\soc_inst|m0_1|u_logic|F7qwx4~combout ) # (!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|F7qwx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Jkmwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|A6ewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jkmwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jkmwx4~1 .lut_mask = 64'h0F0C0F0C0A080A08;
+defparam \soc_inst|m0_1|u_logic|Jkmwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y12_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yjzvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yjzvx4~0_combout = ( \soc_inst|m0_1|u_logic|F8iwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ) # ((\soc_inst|m0_1|u_logic|W6iwx4~combout & !\soc_inst|m0_1|u_logic|Qkmwx4~3_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|F8iwx4~0_combout & ( (\soc_inst|m0_1|u_logic|W6iwx4~combout & !\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yjzvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yjzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yjzvx4~0 .lut_mask = 64'h55005500F5F0F5F0;
+defparam \soc_inst|m0_1|u_logic|Yjzvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y10_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yjzvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yjzvx4~1_combout = ( \soc_inst|m0_1|u_logic|H9iwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Yjzvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|H9iwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Yjzvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Jkmwx4~1_combout & ((!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yjzvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yjzvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yjzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yjzvx4~1 .lut_mask = 64'h2323AFAF00000000;
+defparam \soc_inst|m0_1|u_logic|Yjzvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y14_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hihvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hihvx4~2_combout = ( \soc_inst|m0_1|u_logic|R7iwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Yjzvx4~1_combout & \soc_inst|m0_1|u_logic|H4nwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|R7iwx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|H4nwx4~combout & ((!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Yjzvx4~1_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Yjzvx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hihvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hihvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hihvx4~2 .lut_mask = 64'h00FA00F000FA00F0;
+defparam \soc_inst|m0_1|u_logic|Hihvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hihvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hihvx4~1_combout = ( \soc_inst|m0_1|u_logic|Add5~5_sumout & ( \soc_inst|m0_1|u_logic|Lrx2z4~q & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Add2~29_sumout )
+// # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~5_sumout & ( \soc_inst|m0_1|u_logic|Lrx2z4~q & ( (!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Add2~29_sumout ) #
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~5_sumout & ( !\soc_inst|m0_1|u_logic|Lrx2z4~q & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & (!\soc_inst|m0_1|u_logic|Xdfwx4~combout &
+// ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # (!\soc_inst|m0_1|u_logic|Add2~29_sumout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~5_sumout & ( !\soc_inst|m0_1|u_logic|Lrx2z4~q & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # (!\soc_inst|m0_1|u_logic|Add2~29_sumout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Add2~29_sumout ),
+ .datae(!\soc_inst|m0_1|u_logic|Add5~5_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Lrx2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hihvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hihvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hihvx4~1 .lut_mask = 64'hCC88C080FFBBF0B0;
+defparam \soc_inst|m0_1|u_logic|Hihvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y14_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hihvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hihvx4~0_combout = ( \soc_inst|m0_1|u_logic|Hihvx4~2_combout & ( \soc_inst|m0_1|u_logic|Hihvx4~1_combout & ( (\soc_inst|m0_1|u_logic|B8nwx4~1_combout & (\soc_inst|m0_1|u_logic|Yjzvx4~1_combout &
+// (\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & !\soc_inst|m0_1|u_logic|Lefwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hihvx4~2_combout & ( \soc_inst|m0_1|u_logic|Hihvx4~1_combout & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Yjzvx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Hihvx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Hihvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hihvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hihvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hihvx4~0 .lut_mask = 64'h00000000FF000100;
+defparam \soc_inst|m0_1|u_logic|Hihvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X37_Y14_N28
+dffeas \soc_inst|m0_1|u_logic|Lrx2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Hihvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Lrx2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lrx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lrx2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y5_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~21 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~21_sumout = SUM(( !\soc_inst|m0_1|u_logic|Lrx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~74 ))
+// \soc_inst|m0_1|u_logic|Add3~22 = CARRY(( !\soc_inst|m0_1|u_logic|Lrx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~74 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Lrx2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add3~74 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add3~21_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add3~22 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add3~21 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~21 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~21 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y5_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nhzvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nhzvx4~combout = ( \soc_inst|m0_1|u_logic|Add5~5_sumout & ( \soc_inst|m0_1|u_logic|Add3~21_sumout & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout & (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout &
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~5_sumout & ( \soc_inst|m0_1|u_logic|Add3~21_sumout & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout &
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~5_sumout & ( !\soc_inst|m0_1|u_logic|Add3~21_sumout & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout &
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~5_sumout & ( !\soc_inst|m0_1|u_logic|Add3~21_sumout & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) #
+// (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Add5~5_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add3~21_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nhzvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nhzvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nhzvx4 .lut_mask = 64'hFF33AA22F030A020;
+defparam \soc_inst|m0_1|u_logic|Nhzvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y4_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R5lvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R5lvx4~0_combout = ( \soc_inst|m0_1|u_logic|S8k2z4~q & ( \soc_inst|m0_1|u_logic|Nhzvx4~combout & ( (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Lrx2z4~q )) )
+// ) ) # ( !\soc_inst|m0_1|u_logic|S8k2z4~q & ( \soc_inst|m0_1|u_logic|Nhzvx4~combout & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Lrx2z4~q ))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|S8k2z4~q & ( !\soc_inst|m0_1|u_logic|Nhzvx4~combout & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Lrx2z4~q
+// )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S8k2z4~q & ( !\soc_inst|m0_1|u_logic|Nhzvx4~combout & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout & (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Lrx2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lrx2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|S8k2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Nhzvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R5lvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R5lvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R5lvx4~0 .lut_mask = 64'h2030E0F02233EEFF;
+defparam \soc_inst|m0_1|u_logic|R5lvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X39_Y4_N46
+dffeas \soc_inst|m0_1|u_logic|S8k2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|R5lvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|S8k2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S8k2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|S8k2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y7_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fm72z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fm72z4~0_combout = ( !\soc_inst|m0_1|u_logic|Rd53z4~q & ( \soc_inst|m0_1|u_logic|I443z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (\soc_inst|m0_1|u_logic|Sjj2z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~q &
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rd53z4~q & ( !\soc_inst|m0_1|u_logic|I443z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Sjj2z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~q &
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rd53z4~q & ( !\soc_inst|m0_1|u_logic|I443z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~q & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rd53z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|I443z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fm72z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fm72z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fm72z4~0 .lut_mask = 64'h0050004000100000;
+defparam \soc_inst|m0_1|u_logic|Fm72z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y5_N14
+dffeas \soc_inst|m0_1|u_logic|Wnh3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wnh3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wnh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wnh3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y5_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fm72z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fm72z4~2_combout = ( !\soc_inst|m0_1|u_logic|Djh3z4~q & ( \soc_inst|m0_1|u_logic|Skh3z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Djh3z4~q & ( !\soc_inst|m0_1|u_logic|Skh3z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Djh3z4~q & ( !\soc_inst|m0_1|u_logic|Skh3z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Djh3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Skh3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fm72z4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fm72z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fm72z4~2 .lut_mask = 64'h0A00080002000000;
+defparam \soc_inst|m0_1|u_logic|Fm72z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y4_N2
+dffeas \soc_inst|m0_1|u_logic|Zu23z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Zu23z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zu23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zu23z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y4_N13
+dffeas \soc_inst|m0_1|u_logic|Ql13z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ql13z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ql13z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ql13z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y4_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fm72z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fm72z4~1_combout = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|Ql13z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Zu23z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Zu23z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ql13z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fm72z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fm72z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fm72z4~1 .lut_mask = 64'h00000000E2000000;
+defparam \soc_inst|m0_1|u_logic|Fm72z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y7_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Co72z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Co72z4~0_combout = ( !\soc_inst|m0_1|u_logic|Sjj2z4~q & ( !\soc_inst|m0_1|u_logic|Hmh3z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// \soc_inst|m0_1|u_logic|M1j2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Hmh3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Co72z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Co72z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Co72z4~0 .lut_mask = 64'h0008000000000000;
+defparam \soc_inst|m0_1|u_logic|Co72z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y5_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fm72z4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fm72z4~3_combout = ( !\soc_inst|m0_1|u_logic|Fm72z4~1_combout & ( !\soc_inst|m0_1|u_logic|Co72z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Fm72z4~0_combout & (!\soc_inst|m0_1|u_logic|Fm72z4~2_combout &
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wnh3z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fm72z4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Wnh3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fm72z4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Fm72z4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Co72z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fm72z4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fm72z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fm72z4~3 .lut_mask = 64'hA020000000000000;
+defparam \soc_inst|m0_1|u_logic|Fm72z4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y5_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lsnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lsnvx4~0_combout = ( \soc_inst|m0_1|u_logic|Fexwx4~combout & ( \soc_inst|m0_1|u_logic|Fm72z4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((\soc_inst|m0_1|u_logic|S8k2z4~q )))) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ((\soc_inst|m0_1|u_logic|Hak2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fexwx4~combout & ( \soc_inst|m0_1|u_logic|Fm72z4~3_combout & (
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((\soc_inst|m0_1|u_logic|S8k2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((\soc_inst|m0_1|u_logic|Hak2z4~q )) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Fexwx4~combout & ( !\soc_inst|m0_1|u_logic|Fm72z4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((\soc_inst|m0_1|u_logic|S8k2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ((\soc_inst|m0_1|u_logic|Hak2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fexwx4~combout & ( !\soc_inst|m0_1|u_logic|Fm72z4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// (((\soc_inst|m0_1|u_logic|S8k2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ((\soc_inst|m0_1|u_logic|Hak2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|S8k2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hak2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fexwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fm72z4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lsnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lsnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lsnvx4~0 .lut_mask = 64'h303A303A353F303A;
+defparam \soc_inst|m0_1|u_logic|Lsnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y5_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~17 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~17_sumout = SUM(( !\soc_inst|m0_1|u_logic|Xsx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~22 ))
+// \soc_inst|m0_1|u_logic|Add3~18 = CARRY(( !\soc_inst|m0_1|u_logic|Xsx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~22 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Xsx2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add3~22 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add3~17_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add3~18 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add3~17 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~17 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~17 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y5_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vezvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vezvx4~combout = ( \soc_inst|m0_1|u_logic|Add3~17_sumout & ( \soc_inst|m0_1|u_logic|Add5~89_sumout & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout & (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout &
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Lsnvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~17_sumout & ( \soc_inst|m0_1|u_logic|Add5~89_sumout & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout &
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Lsnvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~17_sumout & ( !\soc_inst|m0_1|u_logic|Add5~89_sumout & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout &
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Lsnvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~17_sumout & ( !\soc_inst|m0_1|u_logic|Add5~89_sumout & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) #
+// (\soc_inst|m0_1|u_logic|Lsnvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Lsnvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Add3~17_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~89_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vezvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vezvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vezvx4 .lut_mask = 64'hCFCFCF008A8A8A00;
+defparam \soc_inst|m0_1|u_logic|Vezvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y5_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Galvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Galvx4~0_combout = ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout & ( \soc_inst|m0_1|u_logic|Vezvx4~combout & ( (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout & (((\soc_inst|m0_1|u_logic|Hak2z4~q )))) #
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Xsx2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout & ( \soc_inst|m0_1|u_logic|Vezvx4~combout & (
+// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout & (((\soc_inst|m0_1|u_logic|Hak2z4~q )))) # (\soc_inst|m0_1|u_logic|Df3wx4~9_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Xsx2z4~q )))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|R1pvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Vezvx4~combout & ( (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout & (((\soc_inst|m0_1|u_logic|Hak2z4~q )))) # (\soc_inst|m0_1|u_logic|Df3wx4~9_combout &
+// ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Xsx2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Hak2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Xsx2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Vezvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Galvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Galvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Galvx4~0 .lut_mask = 64'h2E3F00002E3F2E3F;
+defparam \soc_inst|m0_1|u_logic|Galvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X36_Y5_N14
+dffeas \soc_inst|m0_1|u_logic|Hak2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Galvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Hak2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hak2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hak2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y4_N20
+dffeas \soc_inst|m0_1|u_logic|Aez2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Aez2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Aez2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Aez2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y4_N1
+dffeas \soc_inst|m0_1|u_logic|Zu33z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Zu33z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zu33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zu33z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y4_N55
+dffeas \soc_inst|m0_1|u_logic|I453z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|I453z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I453z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I453z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y4_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tf72z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tf72z4~0_combout = ( !\soc_inst|m0_1|u_logic|Zu33z4~q & ( \soc_inst|m0_1|u_logic|I453z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Zu33z4~q & ( !\soc_inst|m0_1|u_logic|I453z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zu33z4~q & ( !\soc_inst|m0_1|u_logic|I453z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Zu33z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|I453z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tf72z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tf72z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tf72z4~0 .lut_mask = 64'h0044000400400000;
+defparam \soc_inst|m0_1|u_logic|Tf72z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y4_N32
+dffeas \soc_inst|m0_1|u_logic|Ql23z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ql23z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ql23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ql23z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y7_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc13z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hc13z4~feeder_combout = ( \soc_inst|m0_1|u_logic|C3qvx4~1_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hc13z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hc13z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hc13z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Hc13z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y7_N59
+dffeas \soc_inst|m0_1|u_logic|Hc13z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Hc13z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Hc13z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hc13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hc13z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y4_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tf72z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tf72z4~1_combout = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( \soc_inst|m0_1|u_logic|Hc13z4~q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Ql23z4~q &
+// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( !\soc_inst|m0_1|u_logic|Hc13z4~q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|Ql23z4~q ) # (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ql23z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Hc13z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tf72z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tf72z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tf72z4~1 .lut_mask = 64'h2220000000200000;
+defparam \soc_inst|m0_1|u_logic|Tf72z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y4_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tiz2z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tiz2z4~feeder_combout = ( \soc_inst|m0_1|u_logic|C3qvx4~1_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tiz2z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tiz2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tiz2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Tiz2z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y4_N59
+dffeas \soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Tiz2z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y5_N4
+dffeas \soc_inst|m0_1|u_logic|Nf03z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Nf03z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nf03z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nf03z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y4_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tf72z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tf72z4~2_combout = ( \soc_inst|m0_1|u_logic|Nf03z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sjj2z4~q
+// & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nf03z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|Fgm2z4~q ) # (!\soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Nf03z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tf72z4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tf72z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tf72z4~2 .lut_mask = 64'h0E00040000000000;
+defparam \soc_inst|m0_1|u_logic|Tf72z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y5_N44
+dffeas \soc_inst|m0_1|u_logic|Rek2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rek2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rek2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rek2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y5_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qh72z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qh72z4~0_combout = ( !\soc_inst|m0_1|u_logic|Rek2z4~q & ( \soc_inst|m0_1|u_logic|M1j2z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rek2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qh72z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qh72z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qh72z4~0 .lut_mask = 64'h0000000020000000;
+defparam \soc_inst|m0_1|u_logic|Qh72z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y4_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tf72z4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tf72z4~3_combout = ( !\soc_inst|m0_1|u_logic|Tf72z4~2_combout & ( !\soc_inst|m0_1|u_logic|Qh72z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Tf72z4~0_combout & (!\soc_inst|m0_1|u_logic|Tf72z4~1_combout &
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Aez2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Aez2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Tf72z4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Tf72z4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Tf72z4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qh72z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tf72z4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tf72z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tf72z4~3 .lut_mask = 64'hC400000000000000;
+defparam \soc_inst|m0_1|u_logic|Tf72z4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y5_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Esnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Esnvx4~0_combout = ( \soc_inst|m0_1|u_logic|F8wwx4~combout & ( \soc_inst|m0_1|u_logic|Tf72z4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((\soc_inst|m0_1|u_logic|Hak2z4~q )))) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & (\soc_inst|m0_1|u_logic|Ohh3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F8wwx4~combout & ( \soc_inst|m0_1|u_logic|Tf72z4~3_combout & (
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((\soc_inst|m0_1|u_logic|Hak2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((\soc_inst|m0_1|u_logic|Ohh3z4~q )) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|F8wwx4~combout & ( !\soc_inst|m0_1|u_logic|Tf72z4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((\soc_inst|m0_1|u_logic|Hak2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & (\soc_inst|m0_1|u_logic|Ohh3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F8wwx4~combout & ( !\soc_inst|m0_1|u_logic|Tf72z4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// (((\soc_inst|m0_1|u_logic|Hak2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & (\soc_inst|m0_1|u_logic|Ohh3z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ohh3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hak2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|F8wwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Tf72z4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Esnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Esnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Esnvx4~0 .lut_mask = 64'h02F202F207F702F2;
+defparam \soc_inst|m0_1|u_logic|Esnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y5_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sscvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sscvx4~combout = ( \soc_inst|m0_1|u_logic|Donvx4~2_combout & ( \soc_inst|m0_1|u_logic|Esnvx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|Donvx4~2_combout & ( \soc_inst|m0_1|u_logic|Esnvx4~0_combout ) ) # (
+// \soc_inst|m0_1|u_logic|Donvx4~2_combout & ( !\soc_inst|m0_1|u_logic|Esnvx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Esnvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sscvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sscvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sscvx4 .lut_mask = 64'h0000FFFFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Sscvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y5_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C3qvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C3qvx4~1_combout = ( !\soc_inst|m0_1|u_logic|R7iwx4~1_combout & ( \soc_inst|m0_1|u_logic|Wzpvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & (\soc_inst|m0_1|u_logic|C3qvx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Add5~85_sumout ) # (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Add5~85_sumout ),
+ .datac(!\soc_inst|m0_1|u_logic|C3qvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzpvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C3qvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C3qvx4~1 .lut_mask = 64'h00000000080A0000;
+defparam \soc_inst|m0_1|u_logic|C3qvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y5_N26
+dffeas \soc_inst|m0_1|u_logic|Vhk2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Vhk2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vhk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vhk2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y5_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Izpvx4~0_combout = ( \soc_inst|m0_1|u_logic|Hc13z4~q & ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Vhk2z4~q & \soc_inst|m0_1|u_logic|Jc1xx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hc13z4~q & (
+// \soc_inst|m0_1|u_logic|Y91xx4~0_combout ) ) # ( \soc_inst|m0_1|u_logic|Hc13z4~q & ( !\soc_inst|m0_1|u_logic|Y91xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Vhk2z4~q & \soc_inst|m0_1|u_logic|Jc1xx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hc13z4~q
+// & ( !\soc_inst|m0_1|u_logic|Y91xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Vhk2z4~q & \soc_inst|m0_1|u_logic|Jc1xx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vhk2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Hc13z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Izpvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Izpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~0 .lut_mask = 64'h0A0A0A0AFFFF0A0A;
+defparam \soc_inst|m0_1|u_logic|Izpvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y4_N41
+dffeas \soc_inst|m0_1|u_logic|Ggk2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ggk2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ggk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ggk2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y4_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Izpvx4~1_combout = ( \soc_inst|m0_1|u_logic|U71xx4~0_combout & ( \soc_inst|m0_1|u_logic|Ta1xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ggk2z4~q ) # (!\soc_inst|m0_1|u_logic|Ohh3z4~q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|U71xx4~0_combout & ( \soc_inst|m0_1|u_logic|Ta1xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ohh3z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|U71xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ta1xx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Ggk2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Ggk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ohh3z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Izpvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Izpvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~1 .lut_mask = 64'h0000CCCCF0F0FCFC;
+defparam \soc_inst|m0_1|u_logic|Izpvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y5_N5
+dffeas \soc_inst|m0_1|u_logic|Nf03z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Nf03z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nf03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nf03z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y4_N19
+dffeas \soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y4_N58
+dffeas \soc_inst|m0_1|u_logic|Tiz2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Tiz2z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Tiz2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tiz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tiz2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y5_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Izpvx4~4_combout = ( \soc_inst|m0_1|u_logic|N71xx4~0_combout & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout & ( (\soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Tiz2z4~q &
+// ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nf03z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N71xx4~0_combout & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout & ( (\soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nf03z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|N71xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout & ( (\soc_inst|m0_1|u_logic|Tiz2z4~q &
+// ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nf03z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N71xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Nf03z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nf03z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Tiz2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|N71xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Izpvx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Izpvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~4 .lut_mask = 64'hF5F500F531310031;
+defparam \soc_inst|m0_1|u_logic|Izpvx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X48_Y7_N41
+dffeas \soc_inst|m0_1|u_logic|Rd63z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Rd63z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rd63z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rd63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rd63z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y7_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Izpvx4~5_combout = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Zkk2z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Rd63z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Zkk2z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & ((!\soc_inst|m0_1|u_logic|H3d3z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Rd63z4~q )) # (\soc_inst|m0_1|u_logic|H3d3z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rd63z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Zkk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Izpvx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Izpvx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~5 .lut_mask = 64'h0000410100004000;
+defparam \soc_inst|m0_1|u_logic|Izpvx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y5_N50
+dffeas \soc_inst|m0_1|u_logic|Aru2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Aru2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Aru2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Aru2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y5_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Izpvx4~6_combout = ( \soc_inst|m0_1|u_logic|T1d3z4~q & ( \soc_inst|m0_1|u_logic|Aru2z4~q & ( (!\soc_inst|m0_1|u_logic|Rht2z4~q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|T1d3z4~q & ( !\soc_inst|m0_1|u_logic|Aru2z4~q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Rht2z4~q ) #
+// (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rht2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Aru2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Izpvx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Izpvx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~6 .lut_mask = 64'h0000080C00000800;
+defparam \soc_inst|m0_1|u_logic|Izpvx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y5_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Izpvx4~7_combout = ( !\soc_inst|m0_1|u_logic|Izpvx4~6_combout & ( \soc_inst|m0_1|u_logic|S61xx4~0_combout & ( (\soc_inst|m0_1|u_logic|An73z4~q & (!\soc_inst|m0_1|u_logic|Izpvx4~5_combout &
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rek2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Izpvx4~6_combout & ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Izpvx4~5_combout &
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rek2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|An73z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Rek2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Izpvx4~5_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Izpvx4~6_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Izpvx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Izpvx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~7 .lut_mask = 64'hF030000050100000;
+defparam \soc_inst|m0_1|u_logic|Izpvx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y4_N31
+dffeas \soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y5_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Izpvx4~3_combout = ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|I453z4~q ) # ((\soc_inst|m0_1|u_logic|Ld1xx4~0_combout & !\soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE_q )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Sd1xx4~0_combout & ( (\soc_inst|m0_1|u_logic|Ld1xx4~0_combout & !\soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE_q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|I453z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Izpvx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Izpvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~3 .lut_mask = 64'h0F000F00AFAAAFAA;
+defparam \soc_inst|m0_1|u_logic|Izpvx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y4_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Izpvx4~2_combout = ( \soc_inst|m0_1|u_logic|V41xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Kjk2z4~q ) # ((!\soc_inst|m0_1|u_logic|Zu33z4~q & \soc_inst|m0_1|u_logic|Ab1xx4~0_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|V41xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Zu33z4~q & \soc_inst|m0_1|u_logic|Ab1xx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Kjk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Zu33z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Izpvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Izpvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~2 .lut_mask = 64'h00F000F0CCFCCCFC;
+defparam \soc_inst|m0_1|u_logic|Izpvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y5_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Izpvx4~combout = ( !\soc_inst|m0_1|u_logic|Izpvx4~3_combout & ( !\soc_inst|m0_1|u_logic|Izpvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Izpvx4~0_combout & (!\soc_inst|m0_1|u_logic|Izpvx4~1_combout &
+// (\soc_inst|m0_1|u_logic|Izpvx4~4_combout & \soc_inst|m0_1|u_logic|Izpvx4~7_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Izpvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Izpvx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Izpvx4~4_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Izpvx4~7_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Izpvx4~3_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Izpvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Izpvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Izpvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4 .lut_mask = 64'h0008000000000000;
+defparam \soc_inst|m0_1|u_logic|Izpvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y8_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sx3wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sx3wx4~0_combout = ( \soc_inst|m0_1|u_logic|Ze1wx4~combout & ( \soc_inst|m0_1|u_logic|Izpvx4~combout & ( (!\soc_inst|m0_1|u_logic|Am5wx4~1_combout & (\soc_inst|m0_1|u_logic|Qr42z4~1_combout &
+// (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout & \soc_inst|m0_1|u_logic|Y9t2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ze1wx4~combout & ( \soc_inst|m0_1|u_logic|Izpvx4~combout & ( (\soc_inst|m0_1|u_logic|Qr42z4~1_combout & (\soc_inst|m0_1|u_logic|Y9t2z4~q
+// & ((!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ) # (!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ze1wx4~combout & ( !\soc_inst|m0_1|u_logic|Izpvx4~combout & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q &
+// ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Am5wx4~1_combout & \soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ze1wx4~combout & ( !\soc_inst|m0_1|u_logic|Izpvx4~combout & (
+// (\soc_inst|m0_1|u_logic|Y9t2z4~q & ((!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # (!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ze1wx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Izpvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sx3wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sx3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sx3wx4~0 .lut_mask = 64'h00FE00CE00320002;
+defparam \soc_inst|m0_1|u_logic|Sx3wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y10_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Imvvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Imvvx4~0_combout = (\soc_inst|m0_1|u_logic|Wfuwx4~combout & (\soc_inst|m0_1|u_logic|K3l2z4~q & \soc_inst|m0_1|u_logic|Sx3wx4~0_combout ))
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sx3wx4~0_combout ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Imvvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Imvvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Imvvx4~0 .lut_mask = 64'h0003000300030003;
+defparam \soc_inst|m0_1|u_logic|Imvvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y10_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T5mvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T5mvx4~0_combout = ( \soc_inst|m0_1|u_logic|Uaj2z4~q & ( (\soc_inst|m0_1|u_logic|Wbk2z4~q & ((!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Sta2z4~0_combout
+// )))) ) ) # ( !\soc_inst|m0_1|u_logic|Uaj2z4~q & ( \soc_inst|m0_1|u_logic|Wbk2z4~q ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wbk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|T5mvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T5mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T5mvx4~0 .lut_mask = 64'h5555555555545554;
+defparam \soc_inst|m0_1|u_logic|T5mvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y10_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T5mvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T5mvx4~1_combout = ( \soc_inst|m0_1|u_logic|T5mvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|K3l2z4~q ) # ((!\soc_inst|m0_1|u_logic|Wfuwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Knvvx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Imvvx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|T5mvx4~0_combout & ( \soc_inst|m0_1|u_logic|Imvvx4~0_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Imvvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Knvvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|T5mvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|T5mvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T5mvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T5mvx4~1 .lut_mask = 64'h0F0F0F0FFFEFFFEF;
+defparam \soc_inst|m0_1|u_logic|T5mvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y10_N20
+dffeas \soc_inst|m0_1|u_logic|Wbk2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|T5mvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wbk2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wbk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wbk2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y10_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wwywx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wwywx4~0_combout = (!\soc_inst|m0_1|u_logic|Wbk2z4~q & !\soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Wbk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wwywx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wwywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wwywx4~0 .lut_mask = 64'hF000F000F000F000;
+defparam \soc_inst|m0_1|u_logic|Wwywx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I6pwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|I6pwx4~0_combout = ( \soc_inst|m0_1|u_logic|H6zwx4~0_combout & ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|H6zwx4~0_combout & (
+// \soc_inst|m0_1|u_logic|G2zwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ) ) ) # ( \soc_inst|m0_1|u_logic|H6zwx4~0_combout & ( !\soc_inst|m0_1|u_logic|G2zwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout &
+// ((!\soc_inst|m0_1|u_logic|A6zwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|R4zwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Vzywx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H6zwx4~0_combout & ( !\soc_inst|m0_1|u_logic|G2zwx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|A6zwx4~0_combout & (!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout & ((!\soc_inst|m0_1|u_logic|R4zwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Vzywx4~0_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|A6zwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|R4zwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Vzywx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|H6zwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|I6pwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I6pwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I6pwx4~0 .lut_mask = 64'h8A00EF00FF00FF00;
+defparam \soc_inst|m0_1|u_logic|I6pwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y11_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N4rvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N4rvx4~0_combout = ( \soc_inst|m0_1|u_logic|I6pwx4~0_combout & ( \soc_inst|m0_1|u_logic|E5owx4~0_combout & ( (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ) #
+// ((!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ) # (\soc_inst|m0_1|u_logic|C0zwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I6pwx4~0_combout & ( \soc_inst|m0_1|u_logic|E5owx4~0_combout & ( (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ) # (\soc_inst|m0_1|u_logic|C0zwx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|I6pwx4~0_combout & ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout & \soc_inst|m0_1|u_logic|C0zwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|I6pwx4~0_combout & ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout & ( (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ) # (\soc_inst|m0_1|u_logic|C0zwx4~0_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|C0zwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|I6pwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N4rvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N4rvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N4rvx4~0 .lut_mask = 64'h3233003332333233;
+defparam \soc_inst|m0_1|u_logic|N4rvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y10_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mbnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mbnvx4~0_combout = ( \soc_inst|m0_1|u_logic|Gtp2z4~q & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[3]~26_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Gtp2z4~q & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[3]~26_combout ))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Gtp2z4~q & ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout & ( (!\soc_inst|m0_1|u_logic|N4rvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[3]~26_combout ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Gtp2z4~q & ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout & (!\soc_inst|m0_1|u_logic|N4rvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) #
+// (!\soc_inst|interconnect_1|HRDATA[3]~26_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|N4rvx4~0_combout ),
+ .datad(!\soc_inst|interconnect_1|HRDATA[3]~26_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Gtp2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mbnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mbnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mbnvx4~0 .lut_mask = 64'hC080F0A0CC88FFAA;
+defparam \soc_inst|m0_1|u_logic|Mbnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y10_N13
+dffeas \soc_inst|m0_1|u_logic|Gtp2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Mbnvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Gtp2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gtp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gtp2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y14_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L8mvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|L8mvx4~0_combout = ( \soc_inst|m0_1|u_logic|Cam2z4~q & ( \soc_inst|m0_1|u_logic|U0vvx4~2_combout & ( ((!\soc_inst|m0_1|u_logic|Gtp2z4~q & \soc_inst|m0_1|u_logic|H1rvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) )
+// ) ) # ( !\soc_inst|m0_1|u_logic|Cam2z4~q & ( \soc_inst|m0_1|u_logic|U0vvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Gtp2z4~q & \soc_inst|m0_1|u_logic|H1rvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Cam2z4~q & (
+// !\soc_inst|m0_1|u_logic|U0vvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # (((!\soc_inst|m0_1|u_logic|Gtp2z4~q & \soc_inst|m0_1|u_logic|H1rvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Cam2z4~q & ( !\soc_inst|m0_1|u_logic|U0vvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Gtp2z4~q & \soc_inst|m0_1|u_logic|H1rvx4~0_combout
+// )))) # (\soc_inst|m0_1|u_logic|B1vvx4~0_combout & (!\soc_inst|m0_1|u_logic|Gtp2z4~q & ((\soc_inst|m0_1|u_logic|H1rvx4~0_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Gtp2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|U0vvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|L8mvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L8mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L8mvx4~0 .lut_mask = 64'hA0ECAFEF00CC0FCF;
+defparam \soc_inst|m0_1|u_logic|L8mvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y14_N2
+dffeas \soc_inst|m0_1|u_logic|Cam2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|L8mvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Cam2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cam2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cam2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y14_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kwa2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kwa2z4~0_combout = ( \soc_inst|m0_1|u_logic|Cam2z4~q & ( \soc_inst|m0_1|u_logic|Uaj2z4~q & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|R1w2z4~q & (\soc_inst|m0_1|u_logic|Trq2z4~q &
+// \soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kwa2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kwa2z4~0 .lut_mask = 64'h0000000000000002;
+defparam \soc_inst|m0_1|u_logic|Kwa2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nzhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nzhvx4~0_combout = ( \soc_inst|m0_1|u_logic|Oar2z4~q & ( \soc_inst|m0_1|u_logic|Yz4wx4~combout & ( (!\soc_inst|m0_1|u_logic|D9ovx4~combout & (\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout &
+// ((!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout )))) # (\soc_inst|m0_1|u_logic|D9ovx4~combout & ((!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout )))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Oar2z4~q & ( \soc_inst|m0_1|u_logic|Yz4wx4~combout & ( (\soc_inst|m0_1|u_logic|D9ovx4~combout & (!\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout & ((!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Oar2z4~q & ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout & ( (!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Oar2z4~q & ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout & ( (\soc_inst|m0_1|u_logic|D9ovx4~combout & (!\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout & ((!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Oar2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nzhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nzhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nzhvx4~0 .lut_mask = 64'h5400FCFC540054FC;
+defparam \soc_inst|m0_1|u_logic|Nzhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y12_N37
+dffeas \soc_inst|m0_1|u_logic|Oar2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Nzhvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Oar2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oar2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Oar2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zxvwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zxvwx4~0_combout = ( \soc_inst|m0_1|u_logic|Tib3z4~q & ( \soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|D4g3z4~q & ((!\soc_inst|m0_1|u_logic|Vgs2z4~q ) #
+// (!\soc_inst|m0_1|u_logic|Mis2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tib3z4~q & ( \soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Vgs2z4~q & (!\soc_inst|m0_1|u_logic|Mis2z4~q & (\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|D4g3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tib3z4~q & ( !\soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Vgs2z4~q & (\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|D4g3z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vgs2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Mis2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|D4g3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Tib3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zxvwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zxvwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zxvwx4~0 .lut_mask = 64'h0000000A0008000E;
+defparam \soc_inst|m0_1|u_logic|Zxvwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y13_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zxvwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zxvwx4~1_combout = ( !\soc_inst|m0_1|u_logic|Zxvwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Oar2z4~q & \soc_inst|m0_1|u_logic|Dpc3z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Oar2z4~q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Dpc3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Zxvwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zxvwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zxvwx4~1 .lut_mask = 64'h0055005500000000;
+defparam \soc_inst|m0_1|u_logic|Zxvwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y13_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Arzwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Arzwx4~0_combout = ( \soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Mis2z4~q & !\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q & (
+// (!\soc_inst|m0_1|u_logic|Mis2z4~q ) # (\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Mis2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Arzwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Arzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Arzwx4~0 .lut_mask = 64'hF0FFF0FFF000F000;
+defparam \soc_inst|m0_1|u_logic|Arzwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y13_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pazwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pazwx4~combout = ( \soc_inst|m0_1|u_logic|Dizwx4~0_combout & ( \soc_inst|m0_1|u_logic|Kizwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Tqzwx4~0_combout & (((\soc_inst|m0_1|u_logic|Arzwx4~1_combout ) #
+// (\soc_inst|m0_1|u_logic|Iazwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Arzwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dizwx4~0_combout & ( \soc_inst|m0_1|u_logic|Kizwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Tqzwx4~0_combout ) ) ) # (
+// \soc_inst|m0_1|u_logic|Dizwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Kizwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Tqzwx4~0_combout & \soc_inst|m0_1|u_logic|Arzwx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dizwx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Kizwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Tqzwx4~0_combout & (((\soc_inst|m0_1|u_logic|Arzwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Iazwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Arzwx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Arzwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Tqzwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Iazwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Dizwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kizwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pazwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pazwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pazwx4 .lut_mask = 64'h4CCC00CCCCCC4CCC;
+defparam \soc_inst|m0_1|u_logic|Pazwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y11_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G2zwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G2zwx4~0_combout = ( \soc_inst|m0_1|u_logic|B6pwx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Pazwx4~combout & (\soc_inst|m0_1|u_logic|Arzwx4~1_combout & ((\soc_inst|m0_1|u_logic|J7zwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|B6pwx4~3_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|B6pwx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Pazwx4~combout & (\soc_inst|m0_1|u_logic|Arzwx4~1_combout & \soc_inst|m0_1|u_logic|B6pwx4~3_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pazwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|B6pwx4~3_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|J7zwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|B6pwx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G2zwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G2zwx4~0 .lut_mask = 64'h0202020202220222;
+defparam \soc_inst|m0_1|u_logic|G2zwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G2zwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G2zwx4~1_combout = ( \soc_inst|m0_1|u_logic|Wvzwx4~1_combout & ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G2zwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G2zwx4~1 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|G2zwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y10_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W5rvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|W5rvx4~combout = ( \soc_inst|m0_1|u_logic|X2rvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|G2zwx4~1_combout & \soc_inst|m0_1|u_logic|Q6mwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|X2rvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|W5rvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W5rvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W5rvx4 .lut_mask = 64'h0000000000AA00AA;
+defparam \soc_inst|m0_1|u_logic|W5rvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y10_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fbnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fbnvx4~0_combout = ( \soc_inst|m0_1|u_logic|Owq2z4~q & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[4]~23_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Owq2z4~q & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[4]~23_combout ))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Owq2z4~q & ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout & ( (!\soc_inst|m0_1|u_logic|W5rvx4~combout & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[4]~23_combout ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Owq2z4~q & ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout & ( (!\soc_inst|m0_1|u_logic|W5rvx4~combout & (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) #
+// (!\soc_inst|interconnect_1|HRDATA[4]~23_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+ .datab(!\soc_inst|interconnect_1|HRDATA[4]~23_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|W5rvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Owq2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fbnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fbnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fbnvx4~0 .lut_mask = 64'hE000E0E0EE00EEEE;
+defparam \soc_inst|m0_1|u_logic|Fbnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y10_N55
+dffeas \soc_inst|m0_1|u_logic|Owq2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Fbnvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Owq2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Owq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Owq2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Leuvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Leuvx4~0_combout = ( \soc_inst|m0_1|u_logic|Gtmwx4~2_combout & ( \soc_inst|m0_1|u_logic|Amyvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout & (\soc_inst|m0_1|u_logic|Ntmwx4~1_combout &
+// ((\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Ykyvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout & (((\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Ykyvx4~0_combout )))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Gtmwx4~2_combout & ( \soc_inst|m0_1|u_logic|Amyvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout & (\soc_inst|m0_1|u_logic|Ntmwx4~1_combout & ((\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ) #
+// (\soc_inst|m0_1|u_logic|Ykyvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout & (((\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Ykyvx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Gtmwx4~2_combout & (
+// !\soc_inst|m0_1|u_logic|Amyvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout & (\soc_inst|m0_1|u_logic|Ntmwx4~1_combout & ((\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Ykyvx4~0_combout )))) #
+// (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout & (((\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Ykyvx4~0_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Leuvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Leuvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Leuvx4~0 .lut_mask = 64'h0000077707770777;
+defparam \soc_inst|m0_1|u_logic|Leuvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y13_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Leuvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Leuvx4~1_combout = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( \soc_inst|m0_1|u_logic|Kkyvx4~0_combout & ( (\soc_inst|m0_1|u_logic|B8nwx4~1_combout & (\soc_inst|m0_1|u_logic|Leuvx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Xrmwx4~2_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Kkyvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Leuvx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Kkyvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Leuvx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Leuvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Leuvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Leuvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Leuvx4~1 .lut_mask = 64'h00AF00AF00000023;
+defparam \soc_inst|m0_1|u_logic|Leuvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y14_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pamvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pamvx4~0_combout = ( \soc_inst|m0_1|u_logic|Trq2z4~q & ( \soc_inst|m0_1|u_logic|Leuvx4~1_combout & ( ((!\soc_inst|m0_1|u_logic|Owq2z4~q & \soc_inst|m0_1|u_logic|H1rvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) )
+// ) ) # ( !\soc_inst|m0_1|u_logic|Trq2z4~q & ( \soc_inst|m0_1|u_logic|Leuvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Owq2z4~q & \soc_inst|m0_1|u_logic|H1rvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Trq2z4~q & (
+// !\soc_inst|m0_1|u_logic|Leuvx4~1_combout & ( ((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Owq2z4~q & \soc_inst|m0_1|u_logic|H1rvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Trq2z4~q & ( !\soc_inst|m0_1|u_logic|Leuvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout & ((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Owq2z4~q & \soc_inst|m0_1|u_logic|H1rvx4~0_combout
+// )))) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout & (!\soc_inst|m0_1|u_logic|Owq2z4~q & ((\soc_inst|m0_1|u_logic|H1rvx4~0_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Owq2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Leuvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pamvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pamvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pamvx4~0 .lut_mask = 64'hA0ECF5FD00CC55DD;
+defparam \soc_inst|m0_1|u_logic|Pamvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y14_N43
+dffeas \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Pamvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X37_Y4_N14
+dffeas \soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Bjkvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y4_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bjkvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bjkvx4~0_combout = ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout & ( \soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ) ) ) # ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|P0pvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE_q & (
+// !\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bjkvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bjkvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bjkvx4~0 .lut_mask = 64'hCCCCCFCF00000F0F;
+defparam \soc_inst|m0_1|u_logic|Bjkvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y4_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bjkvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bjkvx4~1_combout = ( \soc_inst|m0_1|u_logic|Yuovx4~combout & ( !\soc_inst|m0_1|u_logic|Bjkvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout & ((!\soc_inst|m0_1|u_logic|W0pvx4~combout ) #
+// (\soc_inst|m0_1|u_logic|R8x2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yuovx4~combout & ( !\soc_inst|m0_1|u_logic|Bjkvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # (\soc_inst|m0_1|u_logic|R8x2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|R8x2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Yuovx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Bjkvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bjkvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bjkvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bjkvx4~1 .lut_mask = 64'hF3F3A2A200000000;
+defparam \soc_inst|m0_1|u_logic|Bjkvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X37_Y4_N13
+dffeas \soc_inst|m0_1|u_logic|Ovc3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Bjkvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ovc3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ovc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ovc3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y11_N44
+dffeas \soc_inst|m0_1|u_logic|Nl53z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Nl53z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nl53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nl53z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y11_N59
+dffeas \soc_inst|m0_1|u_logic|Ec43z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ec43z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ec43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ec43z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qw62z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qw62z4~0_combout = ( !\soc_inst|m0_1|u_logic|Rni2z4~q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Ec43z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Nl53z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nl53z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ec43z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qw62z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qw62z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qw62z4~0 .lut_mask = 64'h000000000E040000;
+defparam \soc_inst|m0_1|u_logic|Qw62z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y11_N14
+dffeas \soc_inst|m0_1|u_logic|Wmp2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wmp2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wmp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wmp2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y11_N29
+dffeas \soc_inst|m0_1|u_logic|Mt13z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Mt13z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mt13z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mt13z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y11_N35
+dffeas \soc_inst|m0_1|u_logic|V233z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|V233z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V233z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|V233z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qw62z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qw62z4~1_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q & (!\soc_inst|m0_1|u_logic|V233z4~q & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|Mt13z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Wzy2z4~q & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mt13z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|V233z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qw62z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qw62z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qw62z4~1 .lut_mask = 64'h2200300000000000;
+defparam \soc_inst|m0_1|u_logic|Qw62z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y10_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny62z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ny62z4~0_combout = ( !\soc_inst|m0_1|u_logic|Sjj2z4~q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (\soc_inst|m0_1|u_logic|M1j2z4~q & (!\soc_inst|m0_1|u_logic|Ilp2z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~q &
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ilp2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ny62z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ny62z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ny62z4~0 .lut_mask = 64'h0000000040000000;
+defparam \soc_inst|m0_1|u_logic|Ny62z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y13_N14
+dffeas \soc_inst|m0_1|u_logic|Zr03z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Zr03z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zr03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zr03z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y12_N47
+dffeas \soc_inst|m0_1|u_logic|Fvz2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Fvz2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fvz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fvz2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qw62z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qw62z4~2_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|Fvz2z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~q & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|Zr03z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~q & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Zr03z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fvz2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qw62z4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qw62z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qw62z4~2 .lut_mask = 64'h0000A0000000C000;
+defparam \soc_inst|m0_1|u_logic|Qw62z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qw62z4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qw62z4~3_combout = ( !\soc_inst|m0_1|u_logic|Ny62z4~0_combout & ( !\soc_inst|m0_1|u_logic|Qw62z4~2_combout & ( (!\soc_inst|m0_1|u_logic|Qw62z4~0_combout & (!\soc_inst|m0_1|u_logic|Qw62z4~1_combout &
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wmp2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qw62z4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Wmp2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qw62z4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ny62z4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qw62z4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qw62z4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qw62z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qw62z4~3 .lut_mask = 64'hA200000000000000;
+defparam \soc_inst|m0_1|u_logic|Qw62z4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mpnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mpnvx4~0_combout = ( \soc_inst|m0_1|u_logic|Qxuwx4~combout & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Ovc3z4~q )) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Qw62z4~3_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qxuwx4~combout & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Ovc3z4~q ) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Qxuwx4~combout & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Ovc3z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qxuwx4~combout & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Ovc3z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ovc3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Qw62z4~3_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Qxuwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mpnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mpnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mpnvx4~0 .lut_mask = 64'hCCAACCAACCFFCCF0;
+defparam \soc_inst|m0_1|u_logic|Mpnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vcuvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vcuvx4~0_combout = ( \soc_inst|m0_1|u_logic|Ykyvx4~0_combout & ( \soc_inst|m0_1|u_logic|Hxmwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout & (\soc_inst|m0_1|u_logic|Jymwx4~1_combout &
+// ((\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Cymwx4~3_combout )))) # (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout & (((\soc_inst|m0_1|u_logic|Amyvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Cymwx4~3_combout ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout & ( \soc_inst|m0_1|u_logic|Hxmwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout & (\soc_inst|m0_1|u_logic|Jymwx4~1_combout & ((\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) #
+// (\soc_inst|m0_1|u_logic|Cymwx4~3_combout )))) # (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout & (((\soc_inst|m0_1|u_logic|Amyvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Cymwx4~3_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ykyvx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Hxmwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout & (\soc_inst|m0_1|u_logic|Jymwx4~1_combout & ((\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Cymwx4~3_combout )))) #
+// (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout & (((\soc_inst|m0_1|u_logic|Amyvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Cymwx4~3_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Cymwx4~3_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Jymwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vcuvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vcuvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vcuvx4~0 .lut_mask = 64'h0000153F153F153F;
+defparam \soc_inst|m0_1|u_logic|Vcuvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vcuvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vcuvx4~1_combout = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( \soc_inst|m0_1|u_logic|Vcuvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Omyvx4~1_combout & ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) #
+// ((\soc_inst|m0_1|u_logic|B8nwx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Omyvx4~1_combout & (\soc_inst|m0_1|u_logic|Twmwx4~2_combout & ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|B8nwx4~1_combout )))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( \soc_inst|m0_1|u_logic|Vcuvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Twmwx4~2_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Twmwx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Vcuvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vcuvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vcuvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vcuvx4~1 .lut_mask = 64'h000000008C8C8CAF;
+defparam \soc_inst|m0_1|u_logic|Vcuvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yxzvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yxzvx4~0_combout = ( \soc_inst|m0_1|u_logic|Vcuvx4~1_combout & ( (\soc_inst|m0_1|u_logic|Fyzvx4~0_combout & (\soc_inst|m0_1|u_logic|Wccwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Add5~109_sumout ) #
+// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Add5~109_sumout ),
+ .datab(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Fyzvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wccwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Vcuvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yxzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yxzvx4~0 .lut_mask = 64'h00000000000B000B;
+defparam \soc_inst|m0_1|u_logic|Yxzvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y10_N32
+dffeas \soc_inst|m0_1|u_logic|Ilp2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ilp2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ilp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ilp2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y11_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eo5wx4~6_combout = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Svk2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (
+// \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Fvz2z4~q & \soc_inst|m0_1|u_logic|Svk2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Svk2z4~q
+// ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q & ((!\soc_inst|m0_1|u_logic|Wmp2z4~q ))) # (\soc_inst|m0_1|u_logic|Svk2z4~q & (!\soc_inst|m0_1|u_logic|Fvz2z4~q
+// )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fvz2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wmp2z4~q ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Eo5wx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~6 .lut_mask = 64'hCCAAFF0000AAFF00;
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y11_N28
+dffeas \soc_inst|m0_1|u_logic|Mt13z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Mt13z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mt13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mt13z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y11_N34
+dffeas \soc_inst|m0_1|u_logic|V233z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|V233z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V233z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|V233z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eo5wx4~5_combout = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q & (!\soc_inst|m0_1|u_logic|Mt13z4~q )) # (\soc_inst|m0_1|u_logic|Svk2z4~q &
+// ((!\soc_inst|m0_1|u_logic|V233z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Svk2z4~q & !\soc_inst|m0_1|u_logic|Zr03z4~q ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q & (!\soc_inst|m0_1|u_logic|Mt13z4~q )) # (\soc_inst|m0_1|u_logic|Svk2z4~q & ((!\soc_inst|m0_1|u_logic|V233z4~DUPLICATE_q )))
+// ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q ) # (!\soc_inst|m0_1|u_logic|Zr03z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mt13z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|V233z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Zr03z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Eo5wx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~5 .lut_mask = 64'hFFF0ACAC0F00ACAC;
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eo5wx4~1_combout = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Eo5wx4~5_combout & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) #
+// ((!\soc_inst|m0_1|u_logic|Ec43z4~q & \soc_inst|m0_1|u_logic|Eo5wx4~6_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Eo5wx4~5_combout & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q &
+// ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Eo5wx4~6_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Eo5wx4~5_combout & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q &
+// (!\soc_inst|m0_1|u_logic|Ec43z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q & \soc_inst|m0_1|u_logic|Eo5wx4~6_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Eo5wx4~5_combout & (
+// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|T1d3z4~q & \soc_inst|m0_1|u_logic|Eo5wx4~6_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ec43z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Eo5wx4~6_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Eo5wx4~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Eo5wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~1 .lut_mask = 64'h00500040A0F0A0E0;
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y11_N38
+dffeas \soc_inst|m0_1|u_logic|Sgp2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Sgp2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sgp2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sgp2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y11_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eo5wx4~3_combout = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Svk2z4~q & ( \soc_inst|m0_1|u_logic|W893z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Svk2z4~q &
+// ( \soc_inst|m0_1|u_logic|F8v2z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Svk2z4~q & ( \soc_inst|m0_1|u_logic|Sgp2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (
+// !\soc_inst|m0_1|u_logic|Svk2z4~q & ( \soc_inst|m0_1|u_logic|Gip2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sgp2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|F8v2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|W893z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Gip2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Eo5wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~3 .lut_mask = 64'h00FF555533330F0F;
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y10_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eo5wx4~4_combout = ( \soc_inst|m0_1|u_logic|F483z4~q & ( \soc_inst|m0_1|u_logic|Svk2z4~q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Wyt2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|F483z4~q & (
+// \soc_inst|m0_1|u_logic|Svk2z4~q & ( (\soc_inst|m0_1|u_logic|Wyt2z4~q & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|F483z4~q & ( !\soc_inst|m0_1|u_logic|Svk2z4~q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|Ujp2z4~q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Wu63z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F483z4~q & ( !\soc_inst|m0_1|u_logic|Svk2z4~q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|Ujp2z4~q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Wu63z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wyt2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ujp2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wu63z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|F483z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Eo5wx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~4 .lut_mask = 64'h330F330F550055FF;
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y11_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eo5wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Eo5wx4~3_combout & ( \soc_inst|m0_1|u_logic|Eo5wx4~4_combout & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Eo5wx4~3_combout & ( !\soc_inst|m0_1|u_logic|Eo5wx4~4_combout & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Eo5wx4~3_combout & (
+// !\soc_inst|m0_1|u_logic|Eo5wx4~4_combout & ( \soc_inst|m0_1|u_logic|T1d3z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Eo5wx4~3_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Eo5wx4~4_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Eo5wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~0 .lut_mask = 64'h5555550000550000;
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y11_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eo5wx4~2_combout = ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Eo5wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Nl53z4~q & (!\soc_inst|m0_1|u_logic|Eo5wx4~1_combout &
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ilp2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sd1xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Eo5wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Eo5wx4~1_combout &
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ilp2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ilp2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nl53z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Eo5wx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Eo5wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~2 .lut_mask = 64'hF500310000000000;
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y9_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[13]~11 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout = ( \soc_inst|m0_1|u_logic|Hc1wx4~combout & ( (!\soc_inst|m0_1|u_logic|Wq5wx4~combout ) # (\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Hc1wx4~combout & (
+// (\soc_inst|m0_1|u_logic|Wq5wx4~combout & \soc_inst|m0_1|u_logic|Eo5wx4~2_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Hc1wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hwdata_o[13]~11 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[13]~11 .lut_mask = 64'h05050505AFAFAFAF;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[13]~11 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D4g3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D4g3z4~0_combout = ( \soc_inst|m0_1|u_logic|Zyovx4~combout & ( (!\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) # (\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout &
+// ((\soc_inst|m0_1|u_logic|D4g3z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Zyovx4~combout & ( \soc_inst|m0_1|u_logic|D4g3z4~q ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|D4g3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|D4g3z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D4g3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D4g3z4~0 .lut_mask = 64'h00FF00FFA0F5A0F5;
+defparam \soc_inst|m0_1|u_logic|D4g3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y13_N20
+dffeas \soc_inst|m0_1|u_logic|D4g3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|D4g3z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|D4g3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D4g3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|D4g3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y13_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Geuwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Geuwx4~0_combout = ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout & ( ((\soc_inst|m0_1|u_logic|D4g3z4~q & \soc_inst|m0_1|u_logic|M5tvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout & ( (\soc_inst|m0_1|u_logic|D4g3z4~q & \soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|D4g3z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Geuwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Geuwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Geuwx4~0 .lut_mask = 64'h005500550F5F0F5F;
+defparam \soc_inst|m0_1|u_logic|Geuwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y12_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jjuwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jjuwx4~2_combout = ( \soc_inst|m0_1|u_logic|N10xx4~0_combout & ( \soc_inst|m0_1|u_logic|Qzzwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout & ((\soc_inst|m0_1|u_logic|F40xx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N10xx4~0_combout & ( \soc_inst|m0_1|u_logic|Qzzwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ) ) ) # ( \soc_inst|m0_1|u_logic|N10xx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Qzzwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout & (((!\soc_inst|m0_1|u_logic|Jzzwx4~0_combout & \soc_inst|m0_1|u_logic|F40xx4~0_combout )) # (\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|N10xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Qzzwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout & (((!\soc_inst|m0_1|u_logic|Jzzwx4~0_combout ) # (\soc_inst|m0_1|u_logic|F40xx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Jzzwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|F40xx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|N10xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qzzwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jjuwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jjuwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jjuwx4~2 .lut_mask = 64'hA2AA22A2AAAA22AA;
+defparam \soc_inst|m0_1|u_logic|Jjuwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U5pwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U5pwx4~0_combout = ( !\soc_inst|m0_1|u_logic|I90xx4~2_combout & ( \soc_inst|m0_1|u_logic|Czzwx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Hdzwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wvzwx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Adzwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|I90xx4~2_combout & ( !\soc_inst|m0_1|u_logic|Czzwx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Kbzwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Hdzwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Adzwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Kbzwx4~0_combout & (\soc_inst|m0_1|u_logic|Adzwx4~0_combout & !\soc_inst|m0_1|u_logic|Hdzwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wvzwx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Kbzwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Adzwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Hdzwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wvzwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|I90xx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Czzwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U5pwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U5pwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U5pwx4~0 .lut_mask = 64'hB2FF0000F3FF0000;
+defparam \soc_inst|m0_1|u_logic|U5pwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y12_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kzqvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kzqvx4~1_combout = ( \soc_inst|m0_1|u_logic|U5pwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Cjuwx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|U5pwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Jjuwx4~2_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Jjuwx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Cjuwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|U5pwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kzqvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kzqvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kzqvx4~1 .lut_mask = 64'hF0F0F0F0FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Kzqvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y11_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Viuwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Viuwx4~0_combout = ( \soc_inst|m0_1|u_logic|Ihzwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Fjzwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Qlzwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Yizwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|B6pwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ihzwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Fjzwx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Clzwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Qlzwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Yizwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Clzwx4~0_combout & (!\soc_inst|m0_1|u_logic|Qlzwx4~0_combout & \soc_inst|m0_1|u_logic|Yizwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|B6pwx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Clzwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qlzwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|B6pwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Yizwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ihzwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Viuwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Viuwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Viuwx4~0 .lut_mask = 64'h8FEFCFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Viuwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y12_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B6pwx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|B6pwx4~4_combout = ( \soc_inst|m0_1|u_logic|B6pwx4~2_combout & ( (!\soc_inst|m0_1|u_logic|B6pwx4~3_combout & !\soc_inst|m0_1|u_logic|J7zwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|B6pwx4~2_combout & (
+// !\soc_inst|m0_1|u_logic|B6pwx4~3_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|B6pwx4~3_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|J7zwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|B6pwx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|B6pwx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B6pwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B6pwx4~4 .lut_mask = 64'hF0F0F0F0F000F000;
+defparam \soc_inst|m0_1|u_logic|B6pwx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kzqvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kzqvx4~2_combout = ( \soc_inst|m0_1|u_logic|Pazwx4~combout & ( (!\soc_inst|m0_1|u_logic|Viuwx4~0_combout & \soc_inst|m0_1|u_logic|B6pwx4~4_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Pazwx4~combout & (
+// (!\soc_inst|m0_1|u_logic|B6pwx4~4_combout & ((!\soc_inst|m0_1|u_logic|Arzwx4~1_combout ))) # (\soc_inst|m0_1|u_logic|B6pwx4~4_combout & (!\soc_inst|m0_1|u_logic|Viuwx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Viuwx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|B6pwx4~4_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pazwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kzqvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kzqvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kzqvx4~2 .lut_mask = 64'hFA0AFA0A0A0A0A0A;
+defparam \soc_inst|m0_1|u_logic|Kzqvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kzqvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kzqvx4~0_combout = ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout & ( !\soc_inst|m0_1|u_logic|C0zwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout & ((!\soc_inst|m0_1|u_logic|I6pwx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Kzqvx4~2_combout ))) # (\soc_inst|m0_1|u_logic|I6pwx4~0_combout & (!\soc_inst|m0_1|u_logic|Kzqvx4~1_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Kzqvx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|I6pwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Kzqvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|C0zwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kzqvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kzqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kzqvx4~0 .lut_mask = 64'h00E2000000000000;
+defparam \soc_inst|m0_1|u_logic|Kzqvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y11_N13
+dffeas \soc_inst|m0_1|u_logic|T5g3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|T5g3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T5g3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T5g3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y8_N15
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[13]~27 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[13]~27_combout = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # (\soc_inst|interconnect_1|HRDATA[11]~3_combout ) ) ) # (
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout & !\soc_inst|interconnect_1|HRDATA[11]~3_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+ .datad(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[13]~27_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[13]~27 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[13]~27 .lut_mask = 64'hF000F000F0FFF0FF;
+defparam \soc_inst|interconnect_1|HRDATA[13]~27 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Twmwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Twmwx4~0_combout = ( \soc_inst|m0_1|u_logic|T5g3z4~q & ( \soc_inst|interconnect_1|HRDATA[13]~27_combout & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) #
+// (\soc_inst|m0_1|u_logic|K7g3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|T5g3z4~q & ( \soc_inst|interconnect_1|HRDATA[13]~27_combout & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout & (!\soc_inst|m0_1|u_logic|G6owx4~combout &
+// ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|K7g3z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|T5g3z4~q & ( !\soc_inst|interconnect_1|HRDATA[13]~27_combout & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout ) #
+// (\soc_inst|m0_1|u_logic|K7g3z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|T5g3z4~q & ( !\soc_inst|interconnect_1|HRDATA[13]~27_combout & ( (!\soc_inst|m0_1|u_logic|G6owx4~combout & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) #
+// (\soc_inst|m0_1|u_logic|K7g3z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|K7g3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|T5g3z4~q ),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[13]~27_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Twmwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Twmwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Twmwx4~0 .lut_mask = 64'hCC0CFF0F8808AA0A;
+defparam \soc_inst|m0_1|u_logic|Twmwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Twmwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Twmwx4~1_combout = ( \soc_inst|m0_1|u_logic|Twmwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout & (\soc_inst|m0_1|u_logic|Jtdwx4~1_combout )) #
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout & ((\soc_inst|m0_1|u_logic|Yxdwx4~1_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Jtdwx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Yxdwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Twmwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Twmwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Twmwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Twmwx4~1 .lut_mask = 64'h00000000F4F7F4F7;
+defparam \soc_inst|m0_1|u_logic|Twmwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Twmwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Twmwx4~2_combout = ( \soc_inst|m0_1|u_logic|Kzqvx4~0_combout & ( \soc_inst|m0_1|u_logic|Twmwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Geuwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Kzqvx4~0_combout & ( \soc_inst|m0_1|u_logic|Twmwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Wfuwx4~combout & !\soc_inst|m0_1|u_logic|Geuwx4~0_combout )) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Geuwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Kzqvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Twmwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Twmwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Twmwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Twmwx4~2 .lut_mask = 64'h00000000FFC0FFF0;
+defparam \soc_inst|m0_1|u_logic|Twmwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bspvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bspvx4~0_combout = ( \soc_inst|m0_1|u_logic|Jymwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Cymwx4~3_combout & \soc_inst|m0_1|u_logic|V9iwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Jymwx4~1_combout & (
+// ((!\soc_inst|m0_1|u_logic|Cymwx4~3_combout & \soc_inst|m0_1|u_logic|V9iwx4~0_combout )) # (\soc_inst|m0_1|u_logic|F8iwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Cymwx4~3_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Jymwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bspvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bspvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bspvx4~0 .lut_mask = 64'h0AFF0AFF0A0A0A0A;
+defparam \soc_inst|m0_1|u_logic|Bspvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y12_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bspvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bspvx4~1_combout = ( !\soc_inst|m0_1|u_logic|Bspvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|W6iwx4~combout & (((\soc_inst|m0_1|u_logic|H9iwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Hxmwx4~1_combout )))) #
+// (\soc_inst|m0_1|u_logic|W6iwx4~combout & (\soc_inst|m0_1|u_logic|Twmwx4~2_combout & ((\soc_inst|m0_1|u_logic|H9iwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Hxmwx4~1_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Twmwx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Bspvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bspvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bspvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bspvx4~1 .lut_mask = 64'h0BBB0BBB00000000;
+defparam \soc_inst|m0_1|u_logic|Bspvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y9_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xowwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xowwx4~0_combout = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Grl2z4~q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Spl2z4~q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Grl2z4~q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Qml2z4~q ))) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Psu2z4~q ))
+// ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Grl2z4~q & ( (!\soc_inst|m0_1|u_logic|Spl2z4~q ) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (
+// !\soc_inst|m0_1|u_logic|Grl2z4~q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Qml2z4~q ))) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Psu2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Psu2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Spl2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Qml2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Grl2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xowwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xowwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xowwx4~0 .lut_mask = 64'hEE22F3F3EE22C0C0;
+defparam \soc_inst|m0_1|u_logic|Xowwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y10_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xowwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xowwx4~1_combout = ( \soc_inst|m0_1|u_logic|Yaz2z4~q & ( \soc_inst|m0_1|u_logic|Svk2z4~q & ( !\soc_inst|m0_1|u_logic|Po73z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q & ( \soc_inst|m0_1|u_logic|Svk2z4~q & (
+// !\soc_inst|m0_1|u_logic|Gjt2z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~q & ( !\soc_inst|m0_1|u_logic|Svk2z4~q & ( !\soc_inst|m0_1|u_logic|Gf63z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q & ( !\soc_inst|m0_1|u_logic|Svk2z4~q & (
+// !\soc_inst|m0_1|u_logic|Eol2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Eol2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Gjt2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Gf63z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Po73z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xowwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xowwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xowwx4~1 .lut_mask = 64'hAAAAF0F0CCCCFF00;
+defparam \soc_inst|m0_1|u_logic|Xowwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y9_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xowwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xowwx4~combout = ( \soc_inst|m0_1|u_logic|Xowwx4~1_combout & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Xowwx4~0_combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Xowwx4~1_combout & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Xowwx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Xowwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xowwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xowwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xowwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xowwx4 .lut_mask = 64'h0011001144554455;
+defparam \soc_inst|m0_1|u_logic|Xowwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y9_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ok7wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ok7wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Qowwx4~combout & ( !\soc_inst|m0_1|u_logic|Xowwx4~combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Xowwx4~combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qowwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ok7wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ok7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ok7wx4~0 .lut_mask = 64'hF0F0F0F000000000;
+defparam \soc_inst|m0_1|u_logic|Ok7wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mj7wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mj7wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Tzxwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Mzxwx4~0_combout & (!\soc_inst|m0_1|u_logic|Wxxwx4~0_combout & !\soc_inst|m0_1|u_logic|Svxwx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Svxwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mj7wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mj7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mj7wx4~0 .lut_mask = 64'h5000500000000000;
+defparam \soc_inst|m0_1|u_logic|Mj7wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y11_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jl7wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jl7wx4~0_combout = ( \soc_inst|m0_1|u_logic|Mj7wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ok7wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Ok7wx4~0_combout & (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout &
+// !\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mj7wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ok7wx4~1_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ok7wx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Mj7wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ok7wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jl7wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jl7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jl7wx4~0 .lut_mask = 64'hFFFF0A0000000000;
+defparam \soc_inst|m0_1|u_logic|Jl7wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Et7wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Et7wx4~0_combout = ( \soc_inst|m0_1|u_logic|Tq7wx4~0_combout & ( \soc_inst|m0_1|u_logic|Xs7wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout &
+// (\soc_inst|m0_1|u_logic|Fq7wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout & ((\soc_inst|m0_1|u_logic|Cuxwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tq7wx4~0_combout & ( \soc_inst|m0_1|u_logic|Xs7wx4~1_combout & (
+// (!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout & (((!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Fq7wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout & (((\soc_inst|m0_1|u_logic|Vy7wx4~0_combout &
+// \soc_inst|m0_1|u_logic|Cuxwx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tq7wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Xs7wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout & (\soc_inst|m0_1|u_logic|Fq7wx4~0_combout &
+// (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout & (((!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cuxwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tq7wx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Xs7wx4~1_combout & ( (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout & (\soc_inst|m0_1|u_logic|Fq7wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout &
+// ((\soc_inst|m0_1|u_logic|Cuxwx4~0_combout ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fq7wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Cuxwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Tq7wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Et7wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Et7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Et7wx4~0 .lut_mask = 64'h04073437C4C7F4F7;
+defparam \soc_inst|m0_1|u_logic|Et7wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nu7wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nu7wx4~0_combout = ( \soc_inst|m0_1|u_logic|S08wx4~0_combout & ( \soc_inst|m0_1|u_logic|Q7ewx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout &
+// ((\soc_inst|m0_1|u_logic|U18wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout & (\soc_inst|m0_1|u_logic|B28wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S08wx4~0_combout & ( \soc_inst|m0_1|u_logic|Q7ewx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|U18wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout & (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout &
+// (\soc_inst|m0_1|u_logic|B28wx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|S08wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Q7ewx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout & (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout &
+// ((\soc_inst|m0_1|u_logic|U18wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|B28wx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S08wx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Q7ewx4~0_combout & ( (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout & ((\soc_inst|m0_1|u_logic|U18wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout &
+// (\soc_inst|m0_1|u_logic|B28wx4~0_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|B28wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|U18wx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|S08wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Q7ewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nu7wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nu7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nu7wx4~0 .lut_mask = 64'h0123456789ABCDEF;
+defparam \soc_inst|m0_1|u_logic|Nu7wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y11_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mj7wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mj7wx4~1_combout = ( \soc_inst|m0_1|u_logic|Ok7wx4~1_combout & ( \soc_inst|m0_1|u_logic|Mj7wx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Mj7wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ok7wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mj7wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mj7wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mj7wx4~1 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Mj7wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dtpvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dtpvx4~2_combout = ( !\soc_inst|m0_1|u_logic|Jl7wx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Mj7wx4~1_combout & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Et7wx4~0_combout ))) #
+// (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Nu7wx4~0_combout ))))) ) ) # ( \soc_inst|m0_1|u_logic|Jl7wx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Mj7wx4~1_combout & ((!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ) #
+// ((!\soc_inst|m0_1|u_logic|Fij2z4~q ))))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nu7wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Mj7wx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Jl7wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Et7wx4~0_combout ),
+ .datag(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dtpvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dtpvx4~2 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Dtpvx4~2 .lut_mask = 64'hFA00FC000A00FC00;
+defparam \soc_inst|m0_1|u_logic|Dtpvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dtpvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dtpvx4~0_combout = ( \soc_inst|m0_1|u_logic|Dtpvx4~2_combout & ( \soc_inst|m0_1|u_logic|Fc7wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Jl7wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Fij2z4~q &
+// !\soc_inst|m0_1|u_logic|Et7wx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Dtpvx4~2_combout & ( !\soc_inst|m0_1|u_logic|Fc7wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Jl7wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Et7wx4~0_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Jl7wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Et7wx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Dtpvx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fc7wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dtpvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dtpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dtpvx4~0 .lut_mask = 64'h0000FFEE0000FAAA;
+defparam \soc_inst|m0_1|u_logic|Dtpvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y5_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~129 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~129_sumout = SUM(( GND ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add5~78 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add5~78 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add5~129_sumout ),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~129 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~129 .lut_mask = 64'h0000FFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Add5~129 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dtpvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dtpvx4~1_combout = ( \soc_inst|m0_1|u_logic|Add5~129_sumout & ( (!\soc_inst|m0_1|u_logic|Dtpvx4~0_combout & (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Mj7wx4~1_combout ) #
+// (!\soc_inst|m0_1|u_logic|Zei2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~129_sumout & ( ((!\soc_inst|m0_1|u_logic|Dtpvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Mj7wx4~1_combout ) # (!\soc_inst|m0_1|u_logic|Zei2z4~q )))) #
+// (\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Dtpvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Mj7wx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Zei2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~129_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dtpvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dtpvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dtpvx4~1 .lut_mask = 64'hA8FFA8FFA800A800;
+defparam \soc_inst|m0_1|u_logic|Dtpvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zei2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zei2z4~0_combout = ( !\soc_inst|m0_1|u_logic|Rtpvx4~combout & ( \soc_inst|m0_1|u_logic|Dtpvx4~1_combout & ( !\soc_inst|m0_1|u_logic|K0qvx4~combout ) ) ) # ( \soc_inst|m0_1|u_logic|Rtpvx4~combout & (
+// !\soc_inst|m0_1|u_logic|Dtpvx4~1_combout & ( (\soc_inst|m0_1|u_logic|X4pvx4~combout & \soc_inst|m0_1|u_logic|K0qvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rtpvx4~combout & ( !\soc_inst|m0_1|u_logic|Dtpvx4~1_combout & (
+// (!\soc_inst|m0_1|u_logic|K0qvx4~combout ) # (\soc_inst|m0_1|u_logic|X4pvx4~combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|K0qvx4~combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Rtpvx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Dtpvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zei2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zei2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zei2z4~0 .lut_mask = 64'hF5F50505F0F00000;
+defparam \soc_inst|m0_1|u_logic|Zei2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y13_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zei2z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zei2z4~1_combout = ( \soc_inst|m0_1|u_logic|Zei2z4~q & ( \soc_inst|m0_1|u_logic|Zei2z4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|Zei2z4~q & ( \soc_inst|m0_1|u_logic|Zei2z4~0_combout & ( \soc_inst|m0_1|u_logic|Lqpvx4~0_combout
+// ) ) ) # ( \soc_inst|m0_1|u_logic|Zei2z4~q & ( !\soc_inst|m0_1|u_logic|Zei2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lqpvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|X4pvx4~combout & ((!\soc_inst|m0_1|u_logic|Bspvx4~1_combout ) #
+// (\soc_inst|m0_1|u_logic|R7iwx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zei2z4~q & ( !\soc_inst|m0_1|u_logic|Zei2z4~0_combout & ( (\soc_inst|m0_1|u_logic|Lqpvx4~0_combout & (!\soc_inst|m0_1|u_logic|X4pvx4~combout &
+// ((!\soc_inst|m0_1|u_logic|Bspvx4~1_combout ) # (\soc_inst|m0_1|u_logic|R7iwx4~1_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Lqpvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Bspvx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Zei2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Zei2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zei2z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zei2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zei2z4~1 .lut_mask = 64'h3010FCDC3333FFFF;
+defparam \soc_inst|m0_1|u_logic|Zei2z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X40_Y13_N56
+dffeas \soc_inst|m0_1|u_logic|Zei2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Zei2z4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Zei2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zei2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zei2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y6_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qynvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qynvx4~0_combout = ( \soc_inst|m0_1|u_logic|Zei2z4~q & ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Fij2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Zei2z4~q &
+// ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q & (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Fij2z4~q & (((\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Aok2z4~q ))))
+// ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Zei2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qynvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qynvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qynvx4~0 .lut_mask = 64'h0000550300005500;
+defparam \soc_inst|m0_1|u_logic|Qynvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y6_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qynvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qynvx4~1_combout = ( \soc_inst|m0_1|u_logic|Qynvx4~0_combout & ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) # ( !\soc_inst|m0_1|u_logic|Qynvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Npk2z4~q &
+// (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|O9qvx4~0_combout & \soc_inst|m0_1|u_logic|Ffj2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qynvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qynvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qynvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qynvx4~1 .lut_mask = 64'h0001000133333333;
+defparam \soc_inst|m0_1|u_logic|Qynvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y7_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vxnvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vxnvx4~1_combout = ( \soc_inst|m0_1|u_logic|Vxnvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Qynvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Zznvx4~0_combout &
+// !\soc_inst|m0_1|u_logic|Pkxvx4~0_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Zznvx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Vxnvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qynvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vxnvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vxnvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vxnvx4~1 .lut_mask = 64'h0000FAF000000000;
+defparam \soc_inst|m0_1|u_logic|Vxnvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y7_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~134 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~134_cout = CARRY(( !\soc_inst|m0_1|u_logic|Pdi2z4~q ) + ( !\soc_inst|m0_1|u_logic|Vxnvx4~1_combout ) + ( !VCC ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Vxnvx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(),
+ .sumout(),
+ .cout(\soc_inst|m0_1|u_logic|Add5~134_cout ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~134 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~134 .lut_mask = 64'h00000F0F0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add5~134 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y13_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G5qvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G5qvx4~2_combout = ( \soc_inst|m0_1|u_logic|Add5~29_sumout & ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & (!\soc_inst|m0_1|u_logic|G5qvx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zhyvx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~29_sumout & ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout &
+// (!\soc_inst|m0_1|u_logic|G5qvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zhyvx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~29_sumout & ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout & (
+// (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & (!\soc_inst|m0_1|u_logic|G5qvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zhyvx4~combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|G5qvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Add5~29_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G5qvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G5qvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G5qvx4~2 .lut_mask = 64'h8088000080888088;
+defparam \soc_inst|m0_1|u_logic|G5qvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y13_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G5qvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G5qvx4~1_combout = ( \soc_inst|m0_1|u_logic|F9pvx4~1_combout & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (\soc_inst|m0_1|u_logic|G5qvx4~2_combout & (!\soc_inst|m0_1|u_logic|Nyawx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|B8nwx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|F9pvx4~1_combout & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (\soc_inst|m0_1|u_logic|G5qvx4~2_combout &
+// (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout & !\soc_inst|m0_1|u_logic|Nyawx4~0_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|G5qvx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Nyawx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|F9pvx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G5qvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G5qvx4~1 .lut_mask = 64'h0000440000004500;
+defparam \soc_inst|m0_1|u_logic|G5qvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y9_N47
+dffeas \soc_inst|m0_1|u_logic|Ejm2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ejm2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ejm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ejm2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y9_N17
+dffeas \soc_inst|m0_1|u_logic|Gmm2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Gmm2z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Gmm2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gmm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gmm2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y9_N52
+dffeas \soc_inst|m0_1|u_logic|Unm2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Unm2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Unm2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Unm2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y9_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q8ywx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q8ywx4~1_combout = ( \soc_inst|m0_1|u_logic|Rvu2z4~q & ( \soc_inst|m0_1|u_logic|Unm2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q & ((!\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|Ejm2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Yaz2z4~q & ((!\soc_inst|m0_1|u_logic|Gmm2z4~q ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rvu2z4~q & ( \soc_inst|m0_1|u_logic|Unm2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q & ((!\soc_inst|m0_1|u_logic|Ejm2z4~q ) #
+// ((\soc_inst|m0_1|u_logic|Svk2z4~q )))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q & (((!\soc_inst|m0_1|u_logic|Svk2z4~q & !\soc_inst|m0_1|u_logic|Gmm2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rvu2z4~q & ( !\soc_inst|m0_1|u_logic|Unm2z4~DUPLICATE_q & (
+// (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|Ejm2z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q & (((!\soc_inst|m0_1|u_logic|Gmm2z4~q ) # (\soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Rvu2z4~q & ( !\soc_inst|m0_1|u_logic|Unm2z4~DUPLICATE_q & ( ((!\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|Ejm2z4~q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~q & ((!\soc_inst|m0_1|u_logic|Gmm2z4~q )))) #
+// (\soc_inst|m0_1|u_logic|Svk2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ejm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Gmm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rvu2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Unm2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q8ywx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q8ywx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q8ywx4~1 .lut_mask = 64'hBF8FB383BC8CB080;
+defparam \soc_inst|m0_1|u_logic|Q8ywx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y8_N41
+dffeas \soc_inst|m0_1|u_logic|Imt2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Imt2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Imt2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Imt2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y8_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q8ywx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q8ywx4~0_combout = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Rr73z4~q & ( (!\soc_inst|m0_1|u_logic|Ii63z4~q & !\soc_inst|m0_1|u_logic|Svk2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q
+// & ( \soc_inst|m0_1|u_logic|Rr73z4~q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q & (!\soc_inst|m0_1|u_logic|Skm2z4~q )) # (\soc_inst|m0_1|u_logic|Svk2z4~q & ((!\soc_inst|m0_1|u_logic|Imt2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (
+// !\soc_inst|m0_1|u_logic|Rr73z4~q & ( (!\soc_inst|m0_1|u_logic|Ii63z4~q ) # (\soc_inst|m0_1|u_logic|Svk2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Rr73z4~q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q &
+// (!\soc_inst|m0_1|u_logic|Skm2z4~q )) # (\soc_inst|m0_1|u_logic|Svk2z4~q & ((!\soc_inst|m0_1|u_logic|Imt2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ii63z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Skm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Imt2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rr73z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q8ywx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q8ywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q8ywx4~0 .lut_mask = 64'hCCF0AAFFCCF0AA00;
+defparam \soc_inst|m0_1|u_logic|Q8ywx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y9_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q8ywx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q8ywx4~combout = ( \soc_inst|m0_1|u_logic|Q8ywx4~0_combout & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Q8ywx4~1_combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Q8ywx4~0_combout & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|T1d3z4~q & \soc_inst|m0_1|u_logic|Q8ywx4~1_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Q8ywx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Q8ywx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q8ywx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q8ywx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q8ywx4 .lut_mask = 64'h000300030C0F0C0F;
+defparam \soc_inst|m0_1|u_logic|Q8ywx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y9_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W4ywx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|W4ywx4~0_combout = ( \soc_inst|m0_1|u_logic|Wkxvx4~0_combout & ( \soc_inst|m0_1|u_logic|Q8ywx4~combout & ( !\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Wkxvx4~0_combout & (
+// \soc_inst|m0_1|u_logic|Q8ywx4~combout & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout & !\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Wkxvx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Q8ywx4~combout & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout & !\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wkxvx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Q8ywx4~combout & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout & !\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Q8ywx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W4ywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W4ywx4~0 .lut_mask = 64'h0A000A000A00FF00;
+defparam \soc_inst|m0_1|u_logic|W4ywx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y9_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mzxwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mzxwx4~0_combout = ( !\soc_inst|m0_1|u_logic|A7ywx4~0_combout & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|A7ywx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mzxwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mzxwx4~0 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|Mzxwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y9_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oldwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oldwx4~0_combout = ( \soc_inst|m0_1|u_logic|Mzxwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|Mzxwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Tzxwx4~0_combout $
+// (\soc_inst|m0_1|u_logic|Ark2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oldwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oldwx4~0 .lut_mask = 64'hF00FF00FF0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Oldwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y11_N2
+dffeas \soc_inst|m0_1|u_logic|M2b3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Qsmvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|M2b3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M2b3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M2b3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X24_Y12_N5
+dffeas \soc_inst|m0_1|u_logic|Mbt2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o [2]),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|U1uvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Mbt2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mbt2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mbt2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yrqwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yrqwx4~0_combout = ( !\soc_inst|m0_1|u_logic|A5uvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Pxb3z4~q & ((!\soc_inst|m0_1|u_logic|B2uvx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Mbt2z4~q )))) # (\soc_inst|m0_1|u_logic|Pxb3z4~q &
+// (!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout & ((!\soc_inst|m0_1|u_logic|B2uvx4~1_combout ) # (!\soc_inst|m0_1|u_logic|Mbt2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pxb3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|B2uvx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Mbt2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yrqwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yrqwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yrqwx4~0 .lut_mask = 64'hFCA8FCA800000000;
+defparam \soc_inst|m0_1|u_logic|Yrqwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ojmwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ojmwx4~0_combout = ( \soc_inst|m0_1|u_logic|M5tvx4~0_combout & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Yrqwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Gha3z4~q &
+// \soc_inst|m0_1|u_logic|H6tvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Bec3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|M5tvx4~0_combout & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Yrqwx4~0_combout ) #
+// ((!\soc_inst|m0_1|u_logic|Gha3z4~q & \soc_inst|m0_1|u_logic|H6tvx4~0_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Gha3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Bec3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Yrqwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ojmwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ojmwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ojmwx4~0 .lut_mask = 64'h00000000FF0AFF3B;
+defparam \soc_inst|m0_1|u_logic|Ojmwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y11_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ojmwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ojmwx4~1_combout = ( \soc_inst|interconnect_1|HRDATA[2]~14_combout & ( !\soc_inst|m0_1|u_logic|Ojmwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) #
+// (\soc_inst|m0_1|u_logic|M2b3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[2]~14_combout & ( !\soc_inst|m0_1|u_logic|Ojmwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|M2b3z4~DUPLICATE_q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|M2b3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|interconnect_1|HRDATA[2]~14_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ojmwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ojmwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ojmwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ojmwx4~1 .lut_mask = 64'hDDDDD0D000000000;
+defparam \soc_inst|m0_1|u_logic|Ojmwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ojmwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ojmwx4~2_combout = ( \soc_inst|m0_1|u_logic|Ojmwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout & ((\soc_inst|m0_1|u_logic|Tkdwx4~1_combout ))) #
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout & (\soc_inst|m0_1|u_logic|Xmdwx4~1_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Xmdwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Tkdwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ojmwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ojmwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ojmwx4~2 .lut_mask = 64'h00000000CDEFCDEF;
+defparam \soc_inst|m0_1|u_logic|Ojmwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y12_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wn1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wn1wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Qkmwx4~3_combout & ( \soc_inst|m0_1|u_logic|Imnwx4~combout & ( !\soc_inst|m0_1|u_logic|Sknwx4~2_combout ) ) ) # ( \soc_inst|m0_1|u_logic|Qkmwx4~3_combout & (
+// !\soc_inst|m0_1|u_logic|Imnwx4~combout & ( !\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qkmwx4~3_combout & ( !\soc_inst|m0_1|u_logic|Imnwx4~combout & ( (!\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ) #
+// (!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wn1wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wn1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wn1wx4~0 .lut_mask = 64'hFFF0F0F0FF000000;
+defparam \soc_inst|m0_1|u_logic|Wn1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wn1wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wn1wx4~1_combout = ( !\soc_inst|m0_1|u_logic|Wn1wx4~0_combout & ( \soc_inst|m0_1|u_logic|Pmnwx4~combout & ( (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Wn1wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Pmnwx4~combout & ( (\soc_inst|m0_1|u_logic|Ojmwx4~2_combout & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ))) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Wn1wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wn1wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wn1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wn1wx4~1 .lut_mask = 64'h33030000FF0F0000;
+defparam \soc_inst|m0_1|u_logic|Wn1wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~41 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~41_sumout = SUM(( !\soc_inst|m0_1|u_logic|Ufx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~46 ))
+// \soc_inst|m0_1|u_logic|Add2~42 = CARRY(( !\soc_inst|m0_1|u_logic|Ufx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~46 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ufx2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add2~46 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add2~41_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add2~42 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~41 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~41 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~41 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lkhvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lkhvx4~1_combout = ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Lefwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & (!\soc_inst|m0_1|u_logic|Add5~105_sumout )) #
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & ((\soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE_q )))))) ) ) # ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Add2~41_sumout )))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & (((\soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE_q )))))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Add2~41_sumout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE_q ),
+ .datag(!\soc_inst|m0_1|u_logic|Add5~105_sumout ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lkhvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lkhvx4~1 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Lkhvx4~1 .lut_mask = 64'hC000C800F300FB00;
+defparam \soc_inst|m0_1|u_logic|Lkhvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lkhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lkhvx4~0_combout = ( \soc_inst|m0_1|u_logic|Wn1wx4~1_combout & ( \soc_inst|m0_1|u_logic|Lkhvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) #
+// ((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & \soc_inst|m0_1|u_logic|B8nwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wn1wx4~1_combout & ( \soc_inst|m0_1|u_logic|Lkhvx4~1_combout & ( !\soc_inst|m0_1|u_logic|H4nwx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Wn1wx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Lkhvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lkhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lkhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lkhvx4~0 .lut_mask = 64'h00000000AAAAFAFB;
+defparam \soc_inst|m0_1|u_logic|Lkhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X33_Y12_N52
+dffeas \soc_inst|m0_1|u_logic|Ufx2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Lkhvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ufx2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ufx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ufx2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y13_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~85 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~85_sumout = SUM(( !\soc_inst|m0_1|u_logic|Gmd3z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~42 ))
+// \soc_inst|m0_1|u_logic|Add2~86 = CARRY(( !\soc_inst|m0_1|u_logic|Gmd3z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~42 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Gmd3z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add2~42 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add2~85_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add2~86 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~85 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~85 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~85 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y10_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uehvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uehvx4~1_combout = ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Lefwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Add5~45_sumout ))) #
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & (\soc_inst|m0_1|u_logic|Gmd3z4~q ))))) ) ) # ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout &
+// (((!\soc_inst|m0_1|u_logic|Add2~85_sumout ) # (!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & (\soc_inst|m0_1|u_logic|Gmd3z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Gmd3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Add2~85_sumout ),
+ .datad(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+ .datag(!\soc_inst|m0_1|u_logic|Add5~45_sumout ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Uehvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uehvx4~1 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Uehvx4~1 .lut_mask = 64'hB1B1BBB100000000;
+defparam \soc_inst|m0_1|u_logic|Uehvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y9_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uehvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uehvx4~0_combout = ( \soc_inst|m0_1|u_logic|Ll1wx4~1_combout & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Uehvx4~1_combout & (((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) #
+// (!\soc_inst|m0_1|u_logic|H4nwx4~combout )) # (\soc_inst|m0_1|u_logic|B8nwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ll1wx4~1_combout & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Uehvx4~1_combout &
+// !\soc_inst|m0_1|u_logic|H4nwx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ll1wx4~1_combout & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Uehvx4~1_combout & ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) #
+// (!\soc_inst|m0_1|u_logic|H4nwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ll1wx4~1_combout & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Uehvx4~1_combout & !\soc_inst|m0_1|u_logic|H4nwx4~combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Uehvx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ll1wx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Uehvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uehvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uehvx4~0 .lut_mask = 64'h0F000F0C0F000F0D;
+defparam \soc_inst|m0_1|u_logic|Uehvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y9_N1
+dffeas \soc_inst|m0_1|u_logic|Gmd3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Uehvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Gmd3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gmd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gmd3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X34_Y13_N47
+dffeas \soc_inst|m0_1|u_logic|Fhx2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Ekhvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Fhx2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fhx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fhx2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ekhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ekhvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Add2~81_sumout )))) #
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & (((\soc_inst|m0_1|u_logic|Fhx2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Add2~81_sumout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fhx2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ekhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ekhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ekhvx4~0 .lut_mask = 64'hC8FBC8FB00000000;
+defparam \soc_inst|m0_1|u_logic|Ekhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uf1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uf1wx4~0_combout = ( \soc_inst|m0_1|u_logic|Ntmwx4~1_combout & ( \soc_inst|m0_1|u_logic|Pmnwx4~combout & ( (\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Imnwx4~combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Ntmwx4~1_combout & ( \soc_inst|m0_1|u_logic|Pmnwx4~combout & ( (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout & ((\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Imnwx4~combout ))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Ntmwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Pmnwx4~combout & ( (\soc_inst|m0_1|u_logic|Gtmwx4~2_combout & ((\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Imnwx4~combout ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Ntmwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Pmnwx4~combout & ( (\soc_inst|m0_1|u_logic|Gtmwx4~2_combout & (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout & ((\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ) #
+// (\soc_inst|m0_1|u_logic|Imnwx4~combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Uf1wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uf1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uf1wx4~0 .lut_mask = 64'h1050115530F033FF;
+defparam \soc_inst|m0_1|u_logic|Uf1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uf1wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uf1wx4~1_combout = ( \soc_inst|m0_1|u_logic|Xrmwx4~2_combout & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Uf1wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) #
+// (\soc_inst|m0_1|u_logic|B8nwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xrmwx4~2_combout & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Sknwx4~2_combout & (\soc_inst|m0_1|u_logic|Uf1wx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # (\soc_inst|m0_1|u_logic|B8nwx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Xrmwx4~2_combout & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Glnwx4~1_combout &
+// \soc_inst|m0_1|u_logic|Uf1wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xrmwx4~2_combout & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Glnwx4~1_combout & (\soc_inst|m0_1|u_logic|Sknwx4~2_combout &
+// \soc_inst|m0_1|u_logic|Uf1wx4~0_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Uf1wx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Uf1wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uf1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uf1wx4~1 .lut_mask = 64'h000A00AA000B00BB;
+defparam \soc_inst|m0_1|u_logic|Uf1wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y13_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ekhvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ekhvx4~1_combout = ( \soc_inst|m0_1|u_logic|Add5~13_sumout & ( \soc_inst|m0_1|u_logic|Uf1wx4~1_combout & ( (\soc_inst|m0_1|u_logic|Ekhvx4~0_combout & !\soc_inst|m0_1|u_logic|Xdfwx4~combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Add5~13_sumout & ( \soc_inst|m0_1|u_logic|Uf1wx4~1_combout & ( \soc_inst|m0_1|u_logic|Ekhvx4~0_combout ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~13_sumout & ( !\soc_inst|m0_1|u_logic|Uf1wx4~1_combout & (
+// (\soc_inst|m0_1|u_logic|Ekhvx4~0_combout & (!\soc_inst|m0_1|u_logic|H4nwx4~combout & !\soc_inst|m0_1|u_logic|Xdfwx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~13_sumout & ( !\soc_inst|m0_1|u_logic|Uf1wx4~1_combout & (
+// (\soc_inst|m0_1|u_logic|Ekhvx4~0_combout & !\soc_inst|m0_1|u_logic|H4nwx4~combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ekhvx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Add5~13_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Uf1wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ekhvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ekhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ekhvx4~1 .lut_mask = 64'h5050500055555500;
+defparam \soc_inst|m0_1|u_logic|Ekhvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y13_N46
+dffeas \soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Ekhvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y4_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L4jvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|L4jvx4~0_combout = ( \soc_inst|m0_1|u_logic|Dkr2z4~q & ( \soc_inst|m0_1|u_logic|Cqovx4~combout & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) #
+// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dkr2z4~q & ( \soc_inst|m0_1|u_logic|Cqovx4~combout & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout &
+// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Dkr2z4~q & ( !\soc_inst|m0_1|u_logic|Cqovx4~combout & (
+// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dkr2z4~q & ( !\soc_inst|m0_1|u_logic|Cqovx4~combout & (
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Dkr2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Cqovx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|L4jvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L4jvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L4jvx4~0 .lut_mask = 64'h2323EFEF2300EF00;
+defparam \soc_inst|m0_1|u_logic|L4jvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X35_Y4_N43
+dffeas \soc_inst|m0_1|u_logic|Dkr2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|L4jvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Dkr2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dkr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dkr2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y10_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ze1wx4~7_combout = ( !\soc_inst|m0_1|u_logic|Dkr2z4~q & ( \soc_inst|m0_1|u_logic|T263z4~q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Dkr2z4~q & ( !\soc_inst|m0_1|u_logic|T263z4~q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dkr2z4~q & ( !\soc_inst|m0_1|u_logic|T263z4~q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & ((!\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Svk2z4~q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Dkr2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|T263z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ze1wx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~7 .lut_mask = 64'h8004000480000000;
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y10_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~8 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ze1wx4~8_combout = ( \soc_inst|m0_1|u_logic|Qc1xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ze1wx4~7_combout & ( (\soc_inst|m0_1|u_logic|Cc73z4~q & (!\soc_inst|m0_1|u_logic|Ze1wx4~6_combout &
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zgr2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qc1xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ze1wx4~7_combout & ( (!\soc_inst|m0_1|u_logic|Ze1wx4~6_combout &
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zgr2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Zgr2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Cc73z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ze1wx4~6_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ze1wx4~7_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ze1wx4~8_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~8 .lut_mask = 64'hBB000B0000000000;
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y6_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ejawx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ejawx4~1_combout = ( \soc_inst|m0_1|u_logic|Ze1wx4~5_combout & ( \soc_inst|m0_1|u_logic|Ze1wx4~8_combout & ( \soc_inst|m0_1|u_logic|Ejawx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ze1wx4~5_combout & (
+// \soc_inst|m0_1|u_logic|Ze1wx4~8_combout & ( (\soc_inst|m0_1|u_logic|Ejawx4~0_combout & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Ze1wx4~5_combout & ( !\soc_inst|m0_1|u_logic|Ze1wx4~8_combout & ( (\soc_inst|m0_1|u_logic|Ejawx4~0_combout & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) #
+// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ze1wx4~5_combout & ( !\soc_inst|m0_1|u_logic|Ze1wx4~8_combout & ( (\soc_inst|m0_1|u_logic|Ejawx4~0_combout & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout &
+// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ejawx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ze1wx4~5_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ze1wx4~8_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ejawx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ejawx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ejawx4~1 .lut_mask = 64'h002F002F002F00FF;
+defparam \soc_inst|m0_1|u_logic|Ejawx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y6_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nf1wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nf1wx4~1_combout = ( !\soc_inst|m0_1|u_logic|Pg1wx4~0_combout & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Ejawx4~1_combout $
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Pg1wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Ejawx4~1_combout & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout &
+// ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Ejawx4~1_combout & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout &
+// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pg1wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout & (
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Ejawx4~1_combout $ (\soc_inst|m0_1|u_logic|Wzawx4~combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ejawx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nf1wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nf1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nf1wx4~1 .lut_mask = 64'hFAF5E4D8FAF50000;
+defparam \soc_inst|m0_1|u_logic|Nf1wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y10_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qd1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qd1wx4~0_combout = ( \soc_inst|m0_1|u_logic|Nf1wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ze1wx4~combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ze1wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nf1wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qd1wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qd1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qd1wx4~0 .lut_mask = 64'h00000000A0AAA0AA;
+defparam \soc_inst|m0_1|u_logic|Qd1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y10_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qd1wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qd1wx4~1_combout = ( \soc_inst|m0_1|u_logic|Uf1wx4~1_combout & ( (\soc_inst|m0_1|u_logic|Qd1wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Add5~13_sumout ) # (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ))) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Add5~13_sumout ),
+ .datac(!\soc_inst|m0_1|u_logic|Qd1wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Uf1wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qd1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qd1wx4~1 .lut_mask = 64'h000000000C0F0C0F;
+defparam \soc_inst|m0_1|u_logic|Qd1wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y6_N25
+dffeas \soc_inst|m0_1|u_logic|Oir2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Oir2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oir2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Oir2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y6_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dy4xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dy4xx4~0_combout = ( \soc_inst|m0_1|u_logic|H3d3z4~q & ( !\soc_inst|m0_1|u_logic|M1j2z4~q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|Oir2z4~q &
+// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Oir2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dy4xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dy4xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dy4xx4~0 .lut_mask = 64'h0000800000000000;
+defparam \soc_inst|m0_1|u_logic|Dy4xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y8_N19
+dffeas \soc_inst|m0_1|u_logic|Cgu2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Cgu2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cgu2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cgu2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y10_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ze1wx4~4_combout = ( \soc_inst|m0_1|u_logic|T1d3z4~q & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q & ((!\soc_inst|m0_1|u_logic|Svk2z4~q & (!\soc_inst|m0_1|u_logic|Kfr2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Svk2z4~q & ((!\soc_inst|m0_1|u_logic|Cgu2z4~DUPLICATE_q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Kfr2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Cgu2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ze1wx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~4 .lut_mask = 64'h0000A0C000000000;
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y12_N37
+dffeas \soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y10_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ze1wx4~3_combout = ( \soc_inst|m0_1|u_logic|Yaz2z4~q & ( \soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q & (\soc_inst|m0_1|u_logic|H3d3z4~q & (\soc_inst|m0_1|u_logic|T1d3z4~q &
+// !\soc_inst|m0_1|u_logic|Gcr2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~q & ( !\soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|H3d3z4~q & (\soc_inst|m0_1|u_logic|T1d3z4~q & ((!\soc_inst|m0_1|u_logic|Gcr2z4~q ) #
+// (\soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Gcr2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ze1wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~3 .lut_mask = 64'h0000030100000200;
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y12_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ze1wx4~1_combout = ( \soc_inst|m0_1|u_logic|H3d3z4~q & ( \soc_inst|m0_1|u_logic|Svk2z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Lpv2z4~q & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) ) # (
+// \soc_inst|m0_1|u_logic|H3d3z4~q & ( !\soc_inst|m0_1|u_logic|Svk2z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Vdr2z4~q & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Vdr2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Lpv2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ze1wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~1 .lut_mask = 64'h0000440000005000;
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X50_Y9_N50
+dffeas \soc_inst|m0_1|u_logic|M413z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|M413z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M413z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M413z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y9_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ze1wx4~2_combout = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q & ( \soc_inst|m0_1|u_logic|S703z4~q & ( (!\soc_inst|m0_1|u_logic|M413z4~q & (!\soc_inst|m0_1|u_logic|H3d3z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q & ( !\soc_inst|m0_1|u_logic|S703z4~q & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|T1d3z4~q & ((!\soc_inst|m0_1|u_logic|M413z4~q ) #
+// (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|M413z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|S703z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ze1wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~2 .lut_mask = 64'h0B00000008000000;
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X50_Y9_N46
+dffeas \soc_inst|m0_1|u_logic|Ll83z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ll83z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ll83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ll83z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y9_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ze1wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Bk33z4~q & ( \soc_inst|m0_1|u_logic|Ll83z4~q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|H3d3z4~q &
+// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Bk33z4~q & ( !\soc_inst|m0_1|u_logic|Ll83z4~q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|H3d3z4~q &
+// \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bk33z4~q & ( !\soc_inst|m0_1|u_logic|Ll83z4~q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Bk33z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ll83z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ze1wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~0 .lut_mask = 64'h1010001010000000;
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y6_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ze1wx4~5_combout = ( !\soc_inst|m0_1|u_logic|Ze1wx4~2_combout & ( !\soc_inst|m0_1|u_logic|Ze1wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Dy4xx4~0_combout & (!\soc_inst|m0_1|u_logic|Ze1wx4~4_combout &
+// (!\soc_inst|m0_1|u_logic|Ze1wx4~3_combout & !\soc_inst|m0_1|u_logic|Ze1wx4~1_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Dy4xx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ze1wx4~4_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ze1wx4~3_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ze1wx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ze1wx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ze1wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ze1wx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y6_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ze1wx4~combout = ( \soc_inst|m0_1|u_logic|Ze1wx4~5_combout & ( \soc_inst|m0_1|u_logic|Ze1wx4~8_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Ze1wx4~5_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ze1wx4~8_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ze1wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ze1wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4 .lut_mask = 64'h000000000000FFFF;
+defparam \soc_inst|m0_1|u_logic|Ze1wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y10_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[12]~19 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout = ( \soc_inst|m0_1|u_logic|Ze1wx4~combout & ( (!\soc_inst|m0_1|u_logic|Wq5wx4~combout ) # (\soc_inst|m0_1|u_logic|Am5wx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ze1wx4~combout & (
+// (\soc_inst|m0_1|u_logic|Am5wx4~1_combout & \soc_inst|m0_1|u_logic|Wq5wx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ze1wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hwdata_o[12]~19 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[12]~19 .lut_mask = 64'h05050505F5F5F5F5;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[12]~19 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y9_N19
+dffeas \soc_inst|m0_1|u_logic|L7a3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|L7a3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L7a3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|L7a3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~37 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add0~37_sumout = SUM(( !\soc_inst|m0_1|u_logic|Iua3z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~50 ))
+// \soc_inst|m0_1|u_logic|Add0~38 = CARRY(( !\soc_inst|m0_1|u_logic|Iua3z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~50 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Iua3z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add0~50 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add0~37_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add0~38 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add0~37 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~37 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~37 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ypmvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ypmvx4~0_combout = ( \soc_inst|m0_1|u_logic|Iua3z4~q & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) # (\soc_inst|m0_1|u_logic|L7a3z4~q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Iua3z4~q & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout & ( ((\soc_inst|m0_1|u_logic|L7a3z4~q & \soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Iua3z4~q & (
+// !\soc_inst|m0_1|u_logic|Mxtvx4~combout & ( ((!\soc_inst|m0_1|u_logic|Add0~37_sumout ) # (!\soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Iua3z4~q & (
+// !\soc_inst|m0_1|u_logic|Mxtvx4~combout & ( ((!\soc_inst|m0_1|u_logic|Add0~37_sumout & \soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|L7a3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Add0~37_sumout ),
+ .datad(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Iua3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ypmvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ypmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ypmvx4~0 .lut_mask = 64'h33F3FFF33377FF77;
+defparam \soc_inst|m0_1|u_logic|Ypmvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y11_N20
+dffeas \soc_inst|m0_1|u_logic|Iua3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Ypmvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Iua3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Iua3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Iua3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y11_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~61 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add0~61_sumout = SUM(( !\soc_inst|m0_1|u_logic|K7g3z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~38 ))
+// \soc_inst|m0_1|u_logic|Add0~62 = CARRY(( !\soc_inst|m0_1|u_logic|K7g3z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~38 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|K7g3z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add0~38 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add0~61_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add0~62 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add0~61 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~61 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~61 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rpmvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rpmvx4~0_combout = ( \soc_inst|m0_1|u_logic|K7g3z4~q & ( \soc_inst|m0_1|u_logic|T5g3z4~q & ( (!\soc_inst|m0_1|u_logic|Add0~61_sumout ) # (((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Mxtvx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|K7g3z4~q & ( \soc_inst|m0_1|u_logic|T5g3z4~q & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q & ((!\soc_inst|m0_1|u_logic|Add0~61_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|K7g3z4~q & ( !\soc_inst|m0_1|u_logic|T5g3z4~q & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((!\soc_inst|m0_1|u_logic|Add0~61_sumout & !\soc_inst|m0_1|u_logic|Mxtvx4~combout )) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|K7g3z4~q & ( !\soc_inst|m0_1|u_logic|T5g3z4~q & ( ((!\soc_inst|m0_1|u_logic|Add0~61_sumout & (!\soc_inst|m0_1|u_logic|Mxtvx4~combout & \soc_inst|m0_1|u_logic|Tna3z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Add0~61_sumout ),
+ .datab(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|K7g3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|T5g3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rpmvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rpmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rpmvx4~0 .lut_mask = 64'h08FFF8FF0BFFFBFF;
+defparam \soc_inst|m0_1|u_logic|Rpmvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y11_N55
+dffeas \soc_inst|m0_1|u_logic|K7g3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Rpmvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|K7g3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K7g3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K7g3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~81 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add0~81_sumout = SUM(( !\soc_inst|m0_1|u_logic|Rsa3z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~62 ))
+// \soc_inst|m0_1|u_logic|Add0~82 = CARRY(( !\soc_inst|m0_1|u_logic|Rsa3z4~q ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~62 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Rsa3z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add0~62 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add0~81_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add0~82 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add0~81 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~81 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~81 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kpmvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kpmvx4~0_combout = ( \soc_inst|m0_1|u_logic|Rsa3z4~q & ( \soc_inst|m0_1|u_logic|U5a3z4~q & ( ((!\soc_inst|m0_1|u_logic|Add0~81_sumout ) # ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout ))) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rsa3z4~q & ( \soc_inst|m0_1|u_logic|U5a3z4~q & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q & ((!\soc_inst|m0_1|u_logic|Add0~81_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Rsa3z4~q & ( !\soc_inst|m0_1|u_logic|U5a3z4~q & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Add0~81_sumout & !\soc_inst|m0_1|u_logic|Mxtvx4~combout ))) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rsa3z4~q & ( !\soc_inst|m0_1|u_logic|U5a3z4~q & ( ((!\soc_inst|m0_1|u_logic|Add0~81_sumout & (!\soc_inst|m0_1|u_logic|Mxtvx4~combout & \soc_inst|m0_1|u_logic|Tna3z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Add0~81_sumout ),
+ .datac(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rsa3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|U5a3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kpmvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kpmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kpmvx4~0 .lut_mask = 64'h55D5FFD555DFFFDF;
+defparam \soc_inst|m0_1|u_logic|Kpmvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y12_N1
+dffeas \soc_inst|m0_1|u_logic|Rsa3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Kpmvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rsa3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rsa3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rsa3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y12_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D4a3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D4a3z4~0_combout = !\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|D4a3z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D4a3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D4a3z4~0 .lut_mask = 64'hFF00FF00FF00FF00;
+defparam \soc_inst|m0_1|u_logic|D4a3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y12_N28
+dffeas \soc_inst|m0_1|u_logic|D4a3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|D4a3z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|D4a3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D4a3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|D4a3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dpmvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dpmvx4~0_combout = ( \soc_inst|m0_1|u_logic|Ara3z4~q & ( \soc_inst|m0_1|u_logic|D4a3z4~q & ( (!\soc_inst|m0_1|u_logic|Add0~1_sumout ) # ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((\soc_inst|m0_1|u_logic|Mxtvx4~combout ) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ara3z4~q & ( \soc_inst|m0_1|u_logic|D4a3z4~q & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q & ((!\soc_inst|m0_1|u_logic|Add0~1_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout ))))
+// # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ara3z4~q & ( !\soc_inst|m0_1|u_logic|D4a3z4~q & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((!\soc_inst|m0_1|u_logic|Add0~1_sumout & !\soc_inst|m0_1|u_logic|Mxtvx4~combout )) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ara3z4~q & ( !\soc_inst|m0_1|u_logic|D4a3z4~q & ( ((!\soc_inst|m0_1|u_logic|Add0~1_sumout & (\soc_inst|m0_1|u_logic|Tna3z4~q & !\soc_inst|m0_1|u_logic|Mxtvx4~combout ))) #
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Add0~1_sumout ),
+ .datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ara3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|D4a3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dpmvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dpmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dpmvx4~0 .lut_mask = 64'h2F0FEFCF2F3FEFFF;
+defparam \soc_inst|m0_1|u_logic|Dpmvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y12_N43
+dffeas \soc_inst|m0_1|u_logic|Ara3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Dpmvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ara3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ara3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ara3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y12_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wjxwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wjxwx4~1_combout = ( \soc_inst|m0_1|u_logic|Jsc3z4~q & ( ((\soc_inst|m0_1|u_logic|Ts5wx4~0_combout & \soc_inst|m0_1|u_logic|Lul2z4~q )) # (\soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Jsc3z4~q & (
+// (\soc_inst|m0_1|u_logic|Ts5wx4~0_combout & \soc_inst|m0_1|u_logic|Lul2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Lul2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Jsc3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wjxwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~1 .lut_mask = 64'h0055005533773377;
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y12_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wjxwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wjxwx4~0_combout = ( \soc_inst|m0_1|u_logic|Vgs2z4~q & ( ((!\soc_inst|m0_1|u_logic|J6i2z4~q & (\soc_inst|m0_1|u_logic|Lz93z4~q & \soc_inst|m0_1|u_logic|B2uvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Qwowx4~combout ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Vgs2z4~q & ( (!\soc_inst|m0_1|u_logic|J6i2z4~q & (\soc_inst|m0_1|u_logic|Lz93z4~q & \soc_inst|m0_1|u_logic|B2uvx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Vgs2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wjxwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~0 .lut_mask = 64'h0202020202FF02FF;
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y12_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wjxwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wjxwx4~2_combout = ( !\soc_inst|m0_1|u_logic|Wjxwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Wjxwx4~1_combout & ((!\soc_inst|m0_1|u_logic|E0uvx4~combout ) # (!\soc_inst|m0_1|u_logic|Tqs2z4~q ))) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Tqs2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wjxwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wjxwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wjxwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~2 .lut_mask = 64'hFC00FC0000000000;
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y12_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wjxwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wjxwx4~3_combout = ( \soc_inst|m0_1|u_logic|Wjxwx4~2_combout & ( (!\soc_inst|m0_1|u_logic|H6tvx4~0_combout & ((!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Ara3z4~q )))) #
+// (\soc_inst|m0_1|u_logic|H6tvx4~0_combout & (\soc_inst|m0_1|u_logic|D4a3z4~q & ((!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ara3z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ara3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|D4a3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wjxwx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wjxwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~3 .lut_mask = 64'h000000008ACF8ACF;
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y12_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wjxwx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wjxwx4~4_combout = ( \soc_inst|m0_1|u_logic|Usl2z4~q & ( (!\soc_inst|m0_1|u_logic|K7pwx4~combout & (\soc_inst|m0_1|u_logic|Wjxwx4~3_combout & ((!\soc_inst|m0_1|u_logic|N1uvx4~combout ) #
+// (!\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Usl2z4~q & ( (\soc_inst|m0_1|u_logic|Wjxwx4~3_combout & ((!\soc_inst|m0_1|u_logic|N1uvx4~combout ) # (!\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wjxwx4~3_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Usl2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wjxwx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~4 .lut_mask = 64'h00FC00FC00A800A8;
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y8_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hwdata_o~0_combout = ( \soc_inst|m0_1|u_logic|Nd3wx4~combout & ( \soc_inst|m0_1|u_logic|Z62wx4~combout & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q & ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) #
+// ((\soc_inst|m0_1|u_logic|Hdh2z4~1_combout & !\soc_inst|m0_1|u_logic|Ht5wx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nd3wx4~combout & ( \soc_inst|m0_1|u_logic|Z62wx4~combout & ( (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout &
+// (\soc_inst|m0_1|u_logic|Qr42z4~1_combout & (!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout & \soc_inst|m0_1|u_logic|Y9t2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Nd3wx4~combout & ( !\soc_inst|m0_1|u_logic|Z62wx4~combout & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q
+// & ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # (!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nd3wx4~combout & ( !\soc_inst|m0_1|u_logic|Z62wx4~combout & (
+// (\soc_inst|m0_1|u_logic|Qr42z4~1_combout & (\soc_inst|m0_1|u_logic|Y9t2z4~q & ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ) # (!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Nd3wx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Z62wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hwdata_o~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hwdata_o~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~0 .lut_mask = 64'h003200FE001000DC;
+defparam \soc_inst|m0_1|u_logic|hwdata_o~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y8_N39
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[31]~1 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[31]~1_combout = ( \soc_inst|ram_1|byte_select [3] & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & \soc_inst|m0_1|u_logic|hwdata_o~0_combout ) ) ) # ( !\soc_inst|ram_1|byte_select [3] & (
+// (\soc_inst|ram_1|write_cycle~DUPLICATE_q & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31 ) ) )
+
+ .dataa(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31 ),
+ .datad(!\soc_inst|m0_1|u_logic|hwdata_o~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|byte_select [3]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|data_to_memory[31]~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[31]~1 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[31]~1 .lut_mask = 64'h0505050500550055;
+defparam \soc_inst|ram_1|data_to_memory[31]~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X26_Y7_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 (
+ .portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|ram_1|data_to_memory[31]~1_combout ,\soc_inst|ram_1|data_to_memory[15]~2_combout }),
+ .portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+ .portabyteenamasks(1'b1),
+ .portbdatain(2'b00),
+ .portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_first_bit_number = 15;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_first_bit_number = 15;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003B6DB6D0401461C3084C000000000000048C48C48C48C48C48C48C24D55555555555541E4BB000000000000000000000000";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y9_N36
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[15]~4 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[15]~4_combout = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # (\soc_inst|interconnect_1|HRDATA[11]~3_combout ) ) ) # (
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout & !\soc_inst|interconnect_1|HRDATA[11]~3_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+ .datad(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[15]~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[15]~4 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[15]~4 .lut_mask = 64'hF000F000F0FFF0FF;
+defparam \soc_inst|interconnect_1|HRDATA[15]~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y13_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9lwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U9lwx4~0_combout = ( \soc_inst|m0_1|u_logic|B7owx4~combout & ( \soc_inst|m0_1|u_logic|Tq7wx4~0_combout & ( \soc_inst|interconnect_1|HRDATA[15]~4_combout ) ) ) # ( \soc_inst|m0_1|u_logic|B7owx4~combout & (
+// !\soc_inst|m0_1|u_logic|Tq7wx4~0_combout & ( (\soc_inst|interconnect_1|HRDATA[15]~4_combout ) # (\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|B7owx4~combout & ( !\soc_inst|m0_1|u_logic|Tq7wx4~0_combout & (
+// \soc_inst|m0_1|u_logic|Lcowx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+ .datad(!\soc_inst|interconnect_1|HRDATA[15]~4_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Tq7wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U9lwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U9lwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U9lwx4~0 .lut_mask = 64'h0F0F0FFF000000FF;
+defparam \soc_inst|m0_1|u_logic|U9lwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9lwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U9lwx4~1_combout = ( \soc_inst|m0_1|u_logic|U9lwx4~0_combout & ( \soc_inst|m0_1|u_logic|N4rvx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|U9lwx4~0_combout & ( \soc_inst|m0_1|u_logic|N4rvx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|Lstwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Wjxwx4~4_combout ) # (\soc_inst|m0_1|u_logic|Wfuwx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|U9lwx4~0_combout & ( !\soc_inst|m0_1|u_logic|N4rvx4~0_combout ) ) # (
+// !\soc_inst|m0_1|u_logic|U9lwx4~0_combout & ( !\soc_inst|m0_1|u_logic|N4rvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Wjxwx4~4_combout & \soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Wjxwx4~4_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|U9lwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|N4rvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U9lwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U9lwx4~1 .lut_mask = 64'h00F0FFFF00F3FFFF;
+defparam \soc_inst|m0_1|u_logic|U9lwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mtwwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mtwwx4~0_combout = ( !\soc_inst|m0_1|u_logic|C3w2z4~q & ( ((!\soc_inst|m0_1|u_logic|Wxp2z4~q ) # (((\soc_inst|m0_1|u_logic|Ffj2z4~q )) # (\soc_inst|m0_1|u_logic|Walwx4~1_combout ))) # (\soc_inst|m0_1|u_logic|Aok2z4~q ) ) ) # (
+// \soc_inst|m0_1|u_logic|C3w2z4~q & ( (((!\soc_inst|m0_1|u_logic|Wxp2z4~q & ((!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ))) # (\soc_inst|m0_1|u_logic|Wxp2z4~q & (!\soc_inst|m0_1|u_logic|Palwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Ffj2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Aok2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|C3w2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
+ .datag(!\soc_inst|m0_1|u_logic|Walwx4~1_combout ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mtwwx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Mtwwx4~0 .lut_mask = 64'hDFFFFDFFDFFF75FF;
+defparam \soc_inst|m0_1|u_logic|Mtwwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zz1wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zz1wx4~2_combout = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|P12wx4~combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & (!\soc_inst|m0_1|u_logic|Add5~41_sumout & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|P12wx4~combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|P12wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Add5~41_sumout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zz1wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zz1wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zz1wx4~2 .lut_mask = 64'h8A008A008A8A8A8A;
+defparam \soc_inst|m0_1|u_logic|Zz1wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y10_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zz1wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zz1wx4~1_combout = ( \soc_inst|m0_1|u_logic|F32wx4~0_combout & ( \soc_inst|m0_1|u_logic|Lk9wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout &
+// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F32wx4~0_combout & ( \soc_inst|m0_1|u_logic|Lk9wx4~1_combout & (
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|F32wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Lk9wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout &
+// ((!\soc_inst|m0_1|u_logic|Wzawx4~combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F32wx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Lk9wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zz1wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zz1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zz1wx4~1 .lut_mask = 64'hFFAAE040FF55D080;
+defparam \soc_inst|m0_1|u_logic|Zz1wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K22wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K22wx4~1_combout = ( \soc_inst|m0_1|u_logic|Nlnwx4~0_combout & ( \soc_inst|m0_1|u_logic|Rkyvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Pjyvx4~2_combout & ((\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ) #
+// (\soc_inst|m0_1|u_logic|Sknwx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nlnwx4~0_combout & ( \soc_inst|m0_1|u_logic|Rkyvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Sknwx4~2_combout ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Nlnwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Rkyvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Imnwx4~combout & (\soc_inst|m0_1|u_logic|Pjyvx4~2_combout & ((\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ) #
+// (\soc_inst|m0_1|u_logic|Sknwx4~2_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nlnwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Rkyvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Imnwx4~combout & ((\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ) #
+// (\soc_inst|m0_1|u_logic|Sknwx4~2_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rkyvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|K22wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K22wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K22wx4~1 .lut_mask = 64'h1133010355FF050F;
+defparam \soc_inst|m0_1|u_logic|K22wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K22wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K22wx4~0_combout = ( \soc_inst|m0_1|u_logic|Pjyvx4~0_combout & ( \soc_inst|m0_1|u_logic|Pmnwx4~combout & ( (\soc_inst|m0_1|u_logic|K22wx4~1_combout & ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pjyvx4~0_combout & ( \soc_inst|m0_1|u_logic|Pmnwx4~combout & ( \soc_inst|m0_1|u_logic|K22wx4~1_combout ) ) ) # ( \soc_inst|m0_1|u_logic|Pjyvx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Pmnwx4~combout & ( (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout & (\soc_inst|m0_1|u_logic|K22wx4~1_combout & ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout )))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Pjyvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Pmnwx4~combout & ( (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout & \soc_inst|m0_1|u_logic|K22wx4~1_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|K22wx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|K22wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K22wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K22wx4~0 .lut_mask = 64'h030303020F0F0F0A;
+defparam \soc_inst|m0_1|u_logic|K22wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y13_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zz1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zz1wx4~0_combout = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout & ( \soc_inst|m0_1|u_logic|K22wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Zz1wx4~2_combout & (\soc_inst|m0_1|u_logic|Zz1wx4~1_combout &
+// ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Mtwwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout & ( \soc_inst|m0_1|u_logic|K22wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Glnwx4~1_combout &
+// (\soc_inst|m0_1|u_logic|Zz1wx4~2_combout & \soc_inst|m0_1|u_logic|Zz1wx4~1_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Zz1wx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Zz1wx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|K22wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zz1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zz1wx4~0 .lut_mask = 64'h00000000000A000B;
+defparam \soc_inst|m0_1|u_logic|Zz1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X40_Y6_N25
+dffeas \soc_inst|m0_1|u_logic|Hq33z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Hq33z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hq33z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hq33z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X40_Y9_N47
+dffeas \soc_inst|m0_1|u_logic|E913z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|E913z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E913z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|E913z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y9_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P12wx4~7_combout = ( \soc_inst|m0_1|u_logic|T1d3z4~q & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~q & (
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|E913z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|T1d3z4~q & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (
+// !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|E913z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|P12wx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P12wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~7 .lut_mask = 64'hF3F3F0F000F0F0F0;
+defparam \soc_inst|m0_1|u_logic|P12wx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y8_N1
+dffeas \soc_inst|m0_1|u_logic|Imu2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Imu2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Imu2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Imu2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y9_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P12wx4~4_combout = ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Cvr2z4~q & ( (!\soc_inst|m0_1|u_logic|Imu2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Svk2z4~q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Cvr2z4~q & ( (!\soc_inst|m0_1|u_logic|Imu2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Svk2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Imu2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Cvr2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|P12wx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P12wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~4 .lut_mask = 64'hFAFA00000A0A0000;
+defparam \soc_inst|m0_1|u_logic|P12wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X40_Y9_N26
+dffeas \soc_inst|m0_1|u_logic|Eyr2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Eyr2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eyr2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Eyr2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X40_Y9_N17
+dffeas \soc_inst|m0_1|u_logic|Otr2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Otr2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Otr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Otr2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y9_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P12wx4~5_combout = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Otr2z4~q & ( (!\soc_inst|m0_1|u_logic|Asr2z4~q & \soc_inst|m0_1|u_logic|T1d3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q &
+// ( \soc_inst|m0_1|u_logic|Otr2z4~q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & !\soc_inst|m0_1|u_logic|Eyr2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Otr2z4~q & ( (!\soc_inst|m0_1|u_logic|Asr2z4~q &
+// \soc_inst|m0_1|u_logic|T1d3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Otr2z4~q & ( (!\soc_inst|m0_1|u_logic|Eyr2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|T1d3z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Asr2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Eyr2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Otr2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|P12wx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P12wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~5 .lut_mask = 64'hFF0F0A0AF0000A0A;
+defparam \soc_inst|m0_1|u_logic|P12wx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y9_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P12wx4~6_combout = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Qyc3z4~q & \soc_inst|m0_1|u_logic|T1d3z4~q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Kc03z4~q )) # (\soc_inst|m0_1|u_logic|T1d3z4~q & ((!\soc_inst|m0_1|u_logic|Rvv2z4~q ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|T1d3z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qyc3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Kc03z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rvv2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|P12wx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P12wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~6 .lut_mask = 64'hF0F00000CFC00A0A;
+defparam \soc_inst|m0_1|u_logic|P12wx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y9_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P12wx4~0_combout = ( \soc_inst|m0_1|u_logic|P12wx4~5_combout & ( \soc_inst|m0_1|u_logic|P12wx4~6_combout & ( (!\soc_inst|m0_1|u_logic|P12wx4~7_combout ) # ((\soc_inst|m0_1|u_logic|Svk2z4~q &
+// \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|P12wx4~5_combout & ( \soc_inst|m0_1|u_logic|P12wx4~6_combout & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|P12wx4~7_combout ))) #
+// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Svk2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|P12wx4~5_combout & ( !\soc_inst|m0_1|u_logic|P12wx4~6_combout & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q &
+// (((\soc_inst|m0_1|u_logic|P12wx4~4_combout )))) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Svk2z4~q & (!\soc_inst|m0_1|u_logic|P12wx4~7_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P12wx4~5_combout & (
+// !\soc_inst|m0_1|u_logic|P12wx4~6_combout & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|P12wx4~4_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|P12wx4~7_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|P12wx4~4_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|P12wx4~5_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|P12wx4~6_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|P12wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P12wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~0 .lut_mask = 64'h00F008F8C5C5CDCD;
+defparam \soc_inst|m0_1|u_logic|P12wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X40_Y6_N38
+dffeas \soc_inst|m0_1|u_logic|Rr83z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rr83z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rr83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rr83z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y10_N13
+dffeas \soc_inst|m0_1|u_logic|Qz43z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Qz43z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qz43z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qz43z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y12_N13
+dffeas \soc_inst|m0_1|u_logic|Yg23z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Yg23z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yg23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yg23z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y10_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P12wx4~1_combout = ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( \soc_inst|m0_1|u_logic|Yg23z4~q & ( (!\soc_inst|m0_1|u_logic|Qz43z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Svk2z4~q &
+// \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~q & ( !\soc_inst|m0_1|u_logic|Yg23z4~q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q & (\soc_inst|m0_1|u_logic|Yaz2z4~q & ((!\soc_inst|m0_1|u_logic|Qz43z4~DUPLICATE_q ) #
+// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qz43z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yg23z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|P12wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P12wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~1 .lut_mask = 64'h00E0000000200000;
+defparam \soc_inst|m0_1|u_logic|P12wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y13_N26
+dffeas \soc_inst|m0_1|u_logic|Z863z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Z863z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z863z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z863z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y10_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P12wx4~2_combout = ( !\soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Z863z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~q &
+// !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Z863z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q &
+// (\soc_inst|m0_1|u_logic|Svk2z4~q & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Z863z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q &
+// ((!\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~q & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~q & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Z863z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|P12wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P12wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~2 .lut_mask = 64'h8004000480000000;
+defparam \soc_inst|m0_1|u_logic|P12wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y10_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P12wx4~3_combout = ( \soc_inst|m0_1|u_logic|Qc1xx4~0_combout & ( !\soc_inst|m0_1|u_logic|P12wx4~2_combout & ( (\soc_inst|m0_1|u_logic|Ii73z4~q & (!\soc_inst|m0_1|u_logic|P12wx4~1_combout &
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Qwr2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qc1xx4~0_combout & ( !\soc_inst|m0_1|u_logic|P12wx4~2_combout & ( (!\soc_inst|m0_1|u_logic|P12wx4~1_combout &
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Qwr2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ii73z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Qwr2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|P12wx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|P12wx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|P12wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P12wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~3 .lut_mask = 64'hF030501000000000;
+defparam \soc_inst|m0_1|u_logic|P12wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y6_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P12wx4~combout = ( \soc_inst|m0_1|u_logic|Rr83z4~q & ( \soc_inst|m0_1|u_logic|P12wx4~3_combout & ( (!\soc_inst|m0_1|u_logic|P12wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Hq33z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rr83z4~q & ( \soc_inst|m0_1|u_logic|P12wx4~3_combout & ( (!\soc_inst|m0_1|u_logic|S61xx4~0_combout & (!\soc_inst|m0_1|u_logic|P12wx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hq33z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Hq33z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|P12wx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Rr83z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|P12wx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|P12wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P12wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4 .lut_mask = 64'h00000000A200F300;
+defparam \soc_inst|m0_1|u_logic|P12wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y6_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lk9wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lk9wx4~1_combout = ( \soc_inst|m0_1|u_logic|P12wx4~combout & ( (!\soc_inst|m0_1|u_logic|Lk9wx4~0_combout & ((!\soc_inst|m0_1|u_logic|D1awx4~0_combout ) # (\soc_inst|m0_1|u_logic|W7z2z4~q ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|P12wx4~combout & ( (!\soc_inst|m0_1|u_logic|Lk9wx4~0_combout & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout & ((!\soc_inst|m0_1|u_logic|D1awx4~0_combout ) # (\soc_inst|m0_1|u_logic|W7z2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|D1awx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Lk9wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|P12wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lk9wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lk9wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lk9wx4~1 .lut_mask = 64'hD000D000D0D0D0D0;
+defparam \soc_inst|m0_1|u_logic|Lk9wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y10_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfhvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bfhvx4~1_combout = ( \soc_inst|m0_1|u_logic|H4nwx4~combout & ( \soc_inst|m0_1|u_logic|Vq1wx4~combout & ( (\soc_inst|m0_1|u_logic|Bfhvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) #
+// (!\soc_inst|m0_1|u_logic|Add5~113_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H4nwx4~combout & ( \soc_inst|m0_1|u_logic|Vq1wx4~combout & ( (\soc_inst|m0_1|u_logic|Bfhvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) #
+// (!\soc_inst|m0_1|u_logic|Add5~113_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H4nwx4~combout & ( !\soc_inst|m0_1|u_logic|Vq1wx4~combout & ( (\soc_inst|m0_1|u_logic|Bfhvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) #
+// (!\soc_inst|m0_1|u_logic|Add5~113_sumout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Bfhvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Add5~113_sumout ),
+ .datae(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Vq1wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bfhvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bfhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfhvx4~1 .lut_mask = 64'h0F0A00000F0A0F0A;
+defparam \soc_inst|m0_1|u_logic|Bfhvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X33_Y10_N53
+dffeas \soc_inst|m0_1|u_logic|V4d3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Bfhvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|V4d3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V4d3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|V4d3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y6_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xxovx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xxovx4~combout = ( \soc_inst|m0_1|u_logic|Add5~113_sumout & ( \soc_inst|m0_1|u_logic|K1wvx4~combout ) ) # ( !\soc_inst|m0_1|u_logic|Add5~113_sumout & ( \soc_inst|m0_1|u_logic|K1wvx4~combout & (
+// (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & (\soc_inst|m0_1|u_logic|Add3~41_sumout & ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )))) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & (((\soc_inst|m0_1|u_logic|Add3~41_sumout &
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Konvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~113_sumout & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout &
+// (\soc_inst|m0_1|u_logic|Add3~41_sumout & ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )))) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & (((\soc_inst|m0_1|u_logic|Add3~41_sumout & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) #
+// (\soc_inst|m0_1|u_logic|Konvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~113_sumout & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & (\soc_inst|m0_1|u_logic|Add3~41_sumout &
+// ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )))) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & (((\soc_inst|m0_1|u_logic|Add3~41_sumout & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Konvx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Add3~41_sumout ),
+ .datac(!\soc_inst|m0_1|u_logic|Konvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Add5~113_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xxovx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xxovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xxovx4 .lut_mask = 64'h053705370537FFFF;
+defparam \soc_inst|m0_1|u_logic|Xxovx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X37_Y4_N11
+dffeas \soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Dmivx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y4_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dmivx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dmivx4~0_combout = ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout & ( \soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|G6d3z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (!\soc_inst|m0_1|u_logic|G6d3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|P0pvx4~0_combout & ( !\soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE_q & (
+// !\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|G6d3z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dmivx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dmivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dmivx4~0 .lut_mask = 64'hCCCCFCFC0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Dmivx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y4_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dmivx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dmivx4~1_combout = ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Dmivx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Xxovx4~combout & ((!\soc_inst|m0_1|u_logic|W0pvx4~combout ) #
+// (\soc_inst|m0_1|u_logic|V4d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Dmivx4~0_combout & ( (!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # (\soc_inst|m0_1|u_logic|V4d3z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Xxovx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|V4d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Dmivx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dmivx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dmivx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dmivx4~1 .lut_mask = 64'hAAFFA0F000000000;
+defparam \soc_inst|m0_1|u_logic|Dmivx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X37_Y4_N10
+dffeas \soc_inst|m0_1|u_logic|G1s2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Dmivx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|G1s2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G1s2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G1s2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y6_N38
+dffeas \soc_inst|m0_1|u_logic|Rds2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rds2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rds2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rds2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y6_N59
+dffeas \soc_inst|m0_1|u_logic|Dcs2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Dcs2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dcs2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dcs2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y6_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ria2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ria2z4~0_combout = ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Dcs2z4~q &
+// (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Dcs2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ria2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ria2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ria2z4~0 .lut_mask = 64'h0400000000000000;
+defparam \soc_inst|m0_1|u_logic|Ria2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X37_Y10_N34
+dffeas \soc_inst|m0_1|u_logic|H903z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|H903z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H903z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H903z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y9_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uga2z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uga2z4~2_combout = ( !\soc_inst|m0_1|u_logic|Rni2z4~q & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|B613z4~q )) #
+// (\soc_inst|m0_1|u_logic|Fgm2z4~q & ((!\soc_inst|m0_1|u_logic|H903z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|B613z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|H903z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Uga2z4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uga2z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uga2z4~2 .lut_mask = 64'h000000008C800000;
+defparam \soc_inst|m0_1|u_logic|Uga2z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y11_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uga2z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uga2z4~1_combout = ( \soc_inst|m0_1|u_logic|Wzy2z4~q & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q & ((!\soc_inst|m0_1|u_logic|Hc23z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q & (!\soc_inst|m0_1|u_logic|Ql33z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ql33z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Hc23z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Uga2z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uga2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uga2z4~1 .lut_mask = 64'h0000E20000000000;
+defparam \soc_inst|m0_1|u_logic|Uga2z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y12_N13
+dffeas \soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Zu43z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y11_N41
+dffeas \soc_inst|m0_1|u_logic|I463z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|I463z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I463z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I463z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uga2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uga2z4~0_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~q & !\soc_inst|m0_1|u_logic|I463z4~q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q & (!\soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|I463z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Uga2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uga2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uga2z4~0 .lut_mask = 64'h0000000040405000;
+defparam \soc_inst|m0_1|u_logic|Uga2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y6_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uga2z4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uga2z4~3_combout = ( !\soc_inst|m0_1|u_logic|Uga2z4~1_combout & ( !\soc_inst|m0_1|u_logic|Uga2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ria2z4~0_combout & (!\soc_inst|m0_1|u_logic|Uga2z4~2_combout &
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rds2z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rds2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ria2z4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Uga2z4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Uga2z4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Uga2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Uga2z4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uga2z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uga2z4~3 .lut_mask = 64'hC040000000000000;
+defparam \soc_inst|m0_1|u_logic|Uga2z4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y6_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hxnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hxnvx4~0_combout = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( \soc_inst|m0_1|u_logic|Pjqwx4~combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|G1s2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Uga2z4~3_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( \soc_inst|m0_1|u_logic|Pjqwx4~combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// (!\soc_inst|m0_1|u_logic|G1s2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Rkd3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( !\soc_inst|m0_1|u_logic|Pjqwx4~combout & ( (!\soc_inst|m0_1|u_logic|G1s2z4~q
+// ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( !\soc_inst|m0_1|u_logic|Pjqwx4~combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|G1s2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Rkd3z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|G1s2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Rkd3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Uga2z4~3_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Pjqwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hxnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hxnvx4~0 .lut_mask = 64'hACACAFAFACACAFA0;
+defparam \soc_inst|m0_1|u_logic|Hxnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y6_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jxovx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jxovx4~combout = ( \soc_inst|m0_1|u_logic|Add5~105_sumout & ( \soc_inst|m0_1|u_logic|K1wvx4~combout ) ) # ( !\soc_inst|m0_1|u_logic|Add5~105_sumout & ( \soc_inst|m0_1|u_logic|K1wvx4~combout & (
+// (!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout & (\soc_inst|m0_1|u_logic|Add3~37_sumout & (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ))) # (\soc_inst|m0_1|u_logic|Hxnvx4~0_combout & (((\soc_inst|m0_1|u_logic|Add3~37_sumout &
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~105_sumout & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout & ( (!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout &
+// (\soc_inst|m0_1|u_logic|Add3~37_sumout & (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ))) # (\soc_inst|m0_1|u_logic|Hxnvx4~0_combout & (((\soc_inst|m0_1|u_logic|Add3~37_sumout & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) #
+// (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~105_sumout & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout & ( (!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout & (\soc_inst|m0_1|u_logic|Add3~37_sumout &
+// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ))) # (\soc_inst|m0_1|u_logic|Hxnvx4~0_combout & (((\soc_inst|m0_1|u_logic|Add3~37_sumout & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Add3~37_sumout ),
+ .datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Add5~105_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jxovx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jxovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jxovx4 .lut_mask = 64'h035703570357FFFF;
+defparam \soc_inst|m0_1|u_logic|Jxovx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y5_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qknvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qknvx4~0_combout = ( \soc_inst|m0_1|u_logic|Ffs2z4~q & ( \soc_inst|m0_1|u_logic|Nlovx4~7_combout & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # ((\soc_inst|m0_1|u_logic|S6ovx4~3_combout &
+// (!\soc_inst|m0_1|u_logic|Ekovx4~combout $ (!\soc_inst|m0_1|u_logic|Jxovx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffs2z4~q & ( \soc_inst|m0_1|u_logic|Nlovx4~7_combout & ( (\soc_inst|m0_1|u_logic|S6ovx4~3_combout &
+// (!\soc_inst|m0_1|u_logic|Ekovx4~combout $ (!\soc_inst|m0_1|u_logic|Jxovx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ffs2z4~q & ( !\soc_inst|m0_1|u_logic|Nlovx4~7_combout & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) #
+// (\soc_inst|m0_1|u_logic|S6ovx4~3_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffs2z4~q & ( !\soc_inst|m0_1|u_logic|Nlovx4~7_combout & ( \soc_inst|m0_1|u_logic|S6ovx4~3_combout ) ) )
+
+ .dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ekovx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Jxovx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Nlovx4~7_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qknvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qknvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qknvx4~0 .lut_mask = 64'h0F0FAFAF030CABAE;
+defparam \soc_inst|m0_1|u_logic|Qknvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X17_Y5_N50
+dffeas \soc_inst|m0_1|u_logic|Ffs2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Qknvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ffs2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ffs2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ffs2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y9_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F4nvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|F4nvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Kop2z4~q & ( !\soc_inst|m0_1|u_logic|Ffs2z4~q & ( (!\soc_inst|m0_1|u_logic|Lz93z4~q & !\soc_inst|m0_1|u_logic|J6i2z4~q ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|F4nvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F4nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F4nvx4~0 .lut_mask = 64'hC0C0000000000000;
+defparam \soc_inst|m0_1|u_logic|F4nvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y6_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F4nvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|F4nvx4~1_combout = ( \soc_inst|m0_1|u_logic|K3l2z4~q & ( \soc_inst|m0_1|u_logic|S6ovx4~3_combout & ( \soc_inst|m0_1|u_logic|hwrite_o~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|K3l2z4~q & (
+// \soc_inst|m0_1|u_logic|S6ovx4~3_combout & ( \soc_inst|m0_1|u_logic|hwrite_o~0_combout ) ) ) # ( \soc_inst|m0_1|u_logic|K3l2z4~q & ( !\soc_inst|m0_1|u_logic|S6ovx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Mjl2z4~q &
+// \soc_inst|m0_1|u_logic|F4nvx4~0_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|F4nvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|F4nvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F4nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F4nvx4~1 .lut_mask = 64'h000000CC0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|F4nvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X19_Y6_N40
+dffeas \soc_inst|m0_1|u_logic|K3l2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|F4nvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|K3l2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K3l2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K3l2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y10_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ux4wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ux4wx4~0_combout = ( \soc_inst|m0_1|u_logic|hwdata_o~0_combout & ( \soc_inst|m0_1|u_logic|K3l2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ux4wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ux4wx4~0 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Ux4wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y10_N14
+dffeas \soc_inst|m0_1|u_logic|P2a3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|I2uvx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|P2a3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P2a3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|P2a3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y10_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Inb2z4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Inb2z4~combout = ( \soc_inst|m0_1|u_logic|Yauvx4~0_combout & ( \soc_inst|m0_1|u_logic|Vgs2z4~q ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vgs2z4~q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Yauvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Inb2z4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Inb2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Inb2z4 .lut_mask = 64'h0000000055555555;
+defparam \soc_inst|m0_1|u_logic|Inb2z4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vsywx4~3_combout = ( \soc_inst|m0_1|u_logic|Wva2z4~0_combout & ( \soc_inst|m0_1|u_logic|Mhvvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Kkb3z4~q & (!\soc_inst|m0_1|u_logic|Svs2z4~q & ((!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Zad3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wva2z4~0_combout & ( \soc_inst|m0_1|u_logic|Mhvvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Kkb3z4~q & ((!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Zad3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wva2z4~0_combout & ( !\soc_inst|m0_1|u_logic|Mhvvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Svs2z4~q & ((!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Zad3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wva2z4~0_combout & ( !\soc_inst|m0_1|u_logic|Mhvvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Zad3z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Kkb3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Zad3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svs2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wva2z4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vsywx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vsywx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~3 .lut_mask = 64'hFCFCFC00A8A8A800;
+defparam \soc_inst|m0_1|u_logic|Vsywx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y14_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vsywx4~1_combout = ( \soc_inst|m0_1|u_logic|K9vvx4~0_combout & ( \soc_inst|m0_1|u_logic|Jsa2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Azs2z4~q & (!\soc_inst|m0_1|u_logic|Cps2z4~q & ((!\soc_inst|m0_1|u_logic|Mxa2z4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Tqs2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K9vvx4~0_combout & ( \soc_inst|m0_1|u_logic|Jsa2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Cps2z4~q & ((!\soc_inst|m0_1|u_logic|Mxa2z4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Tqs2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|K9vvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Jsa2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Azs2z4~q & ((!\soc_inst|m0_1|u_logic|Mxa2z4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Tqs2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K9vvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Jsa2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Mxa2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Tqs2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Azs2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Mxa2z4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Cps2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Tqs2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vsywx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vsywx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~1 .lut_mask = 64'hFFCCAA88F0C0A080;
+defparam \soc_inst|m0_1|u_logic|Vsywx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y13_N28
+dffeas \soc_inst|m0_1|u_logic|Bjd3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Bjd3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bjd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bjd3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vsywx4~0_combout = ( \soc_inst|m0_1|u_logic|Pguvx4~0_combout & ( \soc_inst|m0_1|u_logic|Ckuvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Bjd3z4~q & ((!\soc_inst|m0_1|u_logic|Uls2z4~q )
+// # (!\soc_inst|m0_1|u_logic|Txa2z4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pguvx4~0_combout & ( \soc_inst|m0_1|u_logic|Ckuvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Uls2z4~q ) #
+// (!\soc_inst|m0_1|u_logic|Txa2z4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Pguvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ckuvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Bjd3z4~q & ((!\soc_inst|m0_1|u_logic|Uls2z4~q ) #
+// (!\soc_inst|m0_1|u_logic|Txa2z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pguvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ckuvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Uls2z4~q ) # (!\soc_inst|m0_1|u_logic|Txa2z4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Uls2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Txa2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Bjd3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vsywx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vsywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~0 .lut_mask = 64'hFCFCFC00A8A8A800;
+defparam \soc_inst|m0_1|u_logic|Vsywx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y10_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vsywx4~4_combout = ( \soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Sta2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q & (((!\soc_inst|m0_1|u_logic|Uaj2z4~q ) #
+// (\soc_inst|m0_1|u_logic|Qrp2z4~q )))) # (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Uqi2z4~q & ((\soc_inst|m0_1|u_logic|Uaj2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q & (
+// \soc_inst|m0_1|u_logic|Sta2z4~0_combout & ( (\soc_inst|m0_1|u_logic|Uaj2z4~q & ((!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Qrp2z4~q ))) # (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Uqi2z4~q )))) )
+// ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Uqi2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Qrp2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vsywx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vsywx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~4 .lut_mask = 64'h000000000035F035;
+defparam \soc_inst|m0_1|u_logic|Vsywx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y14_N14
+dffeas \soc_inst|m0_1|u_logic|T7d3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|T7d3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T7d3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T7d3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y14_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vsywx4~5_combout = ( \soc_inst|m0_1|u_logic|Ruvvx4~0_combout & ( \soc_inst|m0_1|u_logic|Douvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|T7d3z4~q & (!\soc_inst|m0_1|u_logic|H8l2z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Usl2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ruvvx4~0_combout & ( \soc_inst|m0_1|u_logic|Douvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|H8l2z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Usl2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ruvvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Douvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|T7d3z4~q &
+// ((!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Usl2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ruvvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Douvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Usl2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|T7d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|H8l2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Usl2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ruvvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Douvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vsywx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vsywx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~5 .lut_mask = 64'hFFAACC88F0A0C080;
+defparam \soc_inst|m0_1|u_logic|Vsywx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vsywx4~2_combout = ( !\soc_inst|m0_1|u_logic|Bmb3z4~q & ( \soc_inst|m0_1|u_logic|Oxuvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout & (((!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Z4l2z4~q
+// )))) # (\soc_inst|m0_1|u_logic|Kwa2z4~0_combout & (!\soc_inst|m0_1|u_logic|Tib3z4~q & ((!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Z4l2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Bmb3z4~q & (
+// !\soc_inst|m0_1|u_logic|Oxuvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout & (((!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Z4l2z4~q )))) # (\soc_inst|m0_1|u_logic|Kwa2z4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Tib3z4~q & ((!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Z4l2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bmb3z4~q & ( !\soc_inst|m0_1|u_logic|Oxuvx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout & (((!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Z4l2z4~q )))) # (\soc_inst|m0_1|u_logic|Kwa2z4~0_combout & (!\soc_inst|m0_1|u_logic|Tib3z4~q &
+// ((!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Z4l2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Tib3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Z4l2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Bmb3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vsywx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vsywx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~2 .lut_mask = 64'hEEE0EEE0EEE00000;
+defparam \soc_inst|m0_1|u_logic|Vsywx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y10_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vsywx4~6_combout = ( \soc_inst|m0_1|u_logic|Vsywx4~5_combout & ( \soc_inst|m0_1|u_logic|Vsywx4~2_combout & ( (\soc_inst|m0_1|u_logic|Vsywx4~3_combout & (\soc_inst|m0_1|u_logic|Vsywx4~1_combout &
+// (\soc_inst|m0_1|u_logic|Vsywx4~0_combout & !\soc_inst|m0_1|u_logic|Vsywx4~4_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vsywx4~3_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Vsywx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Vsywx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Vsywx4~4_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Vsywx4~5_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Vsywx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vsywx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vsywx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~6 .lut_mask = 64'h0000000000000100;
+defparam \soc_inst|m0_1|u_logic|Vsywx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xtywx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xtywx4~0_combout = ( \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Uaj2z4~q & ( !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q & (
+// \soc_inst|m0_1|u_logic|Uaj2z4~q & ( (\soc_inst|m0_1|u_logic|Cam2z4~q & (!\soc_inst|m0_1|u_logic|G0w2z4~q & !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Uaj2z4~q & (
+// !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Uaj2z4~q & ( (\soc_inst|m0_1|u_logic|Cam2z4~q & (!\soc_inst|m0_1|u_logic|R1w2z4~q & (!\soc_inst|m0_1|u_logic|G0w2z4~q &
+// !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xtywx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xtywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xtywx4~0 .lut_mask = 64'h4000FF005000FF00;
+defparam \soc_inst|m0_1|u_logic|Xtywx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y10_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ypa2z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ypa2z4~1_combout = ( \soc_inst|m0_1|u_logic|Xtywx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Inb2z4~combout & \soc_inst|m0_1|u_logic|Vsywx4~6_combout )) # (\soc_inst|m0_1|u_logic|P2a3z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|P2a3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Inb2z4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Vsywx4~6_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xtywx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ypa2z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ypa2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ypa2z4~1 .lut_mask = 64'h0000000033F333F3;
+defparam \soc_inst|m0_1|u_logic|Ypa2z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y14_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N8b2z4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N8b2z4~combout = ( \soc_inst|m0_1|u_logic|Txa2z4~0_combout & ( !\soc_inst|m0_1|u_logic|Dks2z4~q ) ) # ( !\soc_inst|m0_1|u_logic|Txa2z4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Dks2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Txa2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N8b2z4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N8b2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N8b2z4 .lut_mask = 64'hFFFFFFFFF0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|N8b2z4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y10_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ypa2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ypa2z4~0_combout = ( \soc_inst|m0_1|u_logic|Vsywx4~6_combout & ( \soc_inst|m0_1|u_logic|Luywx4~6_combout & ( (!\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|N8b2z4~combout &
+// ((!\soc_inst|m0_1|u_logic|P2a3z4~q ) # (\soc_inst|m0_1|u_logic|Inb2z4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vsywx4~6_combout & ( \soc_inst|m0_1|u_logic|Luywx4~6_combout & ( (!\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|N8b2z4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Vsywx4~6_combout & ( !\soc_inst|m0_1|u_logic|Luywx4~6_combout & ( (!\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|P2a3z4~q ) #
+// (\soc_inst|m0_1|u_logic|Inb2z4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vsywx4~6_combout & ( !\soc_inst|m0_1|u_logic|Luywx4~6_combout & ( !\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|N8b2z4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|P2a3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Inb2z4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Vsywx4~6_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Luywx4~6_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ypa2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ypa2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ypa2z4~0 .lut_mask = 64'hAAAAA0AA88888088;
+defparam \soc_inst|m0_1|u_logic|Ypa2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y10_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C34wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C34wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Ye4wx4~combout & ( !\soc_inst|m0_1|u_logic|Thm2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Thm2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C34wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C34wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C34wx4~0 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|C34wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y10_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C34wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C34wx4~combout = ( \soc_inst|m0_1|u_logic|C34wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ypa2z4~1_combout ) # (\soc_inst|m0_1|u_logic|Ypa2z4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ypa2z4~1_combout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Ypa2z4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|C34wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C34wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C34wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C34wx4 .lut_mask = 64'h00000000AAFFAAFF;
+defparam \soc_inst|m0_1|u_logic|C34wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y10_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cr0xx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cr0xx4~1_combout = ( \soc_inst|m0_1|u_logic|Cr0xx4~0_combout & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q & \soc_inst|m0_1|u_logic|Sy2wx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Cr0xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cr0xx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cr0xx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cr0xx4~1 .lut_mask = 64'h0000222200000000;
+defparam \soc_inst|m0_1|u_logic|Cr0xx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y7_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F5mvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|F5mvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Y9t2z4~q & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q & \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|F5mvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F5mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F5mvx4~0 .lut_mask = 64'h00CC000000CC0000;
+defparam \soc_inst|m0_1|u_logic|F5mvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y10_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q5vvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q5vvx4~0_combout = ( \soc_inst|m0_1|u_logic|Mtqvx4~combout & ( \soc_inst|m0_1|u_logic|Ye4wx4~combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q5vvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q5vvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q5vvx4~0 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Q5vvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y8_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kofwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kofwx4~0_combout = ( \soc_inst|m0_1|u_logic|Wdxvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q & (\soc_inst|m0_1|u_logic|Z7fwx4~0_combout & !\soc_inst|m0_1|u_logic|Sgj2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kofwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kofwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kofwx4~0 .lut_mask = 64'h000000000A000A00;
+defparam \soc_inst|m0_1|u_logic|Kofwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y6_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bk4wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bk4wx4~combout = ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Rngwx4~combout & \soc_inst|m0_1|u_logic|Socwx4~0_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bk4wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bk4wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bk4wx4 .lut_mask = 64'h0000000000300030;
+defparam \soc_inst|m0_1|u_logic|Bk4wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y5_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Si4wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Si4wx4~0_combout = ( \soc_inst|m0_1|u_logic|Aok2z4~q & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Pcyvx4~combout & \soc_inst|m0_1|u_logic|O9qvx4~0_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Si4wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Si4wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Si4wx4~0 .lut_mask = 64'h00000000000C000C;
+defparam \soc_inst|m0_1|u_logic|Si4wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y5_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pd4wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pd4wx4~0_combout = ( \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Si4wx4~0_combout & (((\soc_inst|m0_1|u_logic|Y9t2z4~q & !\soc_inst|m0_1|u_logic|O5t2z4~q )))) # (\soc_inst|m0_1|u_logic|Si4wx4~0_combout
+// & (((\soc_inst|m0_1|u_logic|Y9t2z4~q & !\soc_inst|m0_1|u_logic|O5t2z4~q )) # (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Si4wx4~0_combout &
+// \soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Si4wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pd4wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pd4wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pd4wx4~0 .lut_mask = 64'h11111F1111111F11;
+defparam \soc_inst|m0_1|u_logic|Pd4wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y5_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pd4wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pd4wx4~1_combout = ( !\soc_inst|m0_1|u_logic|Pd4wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|X77wx4~combout ) # ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Bk4wx4~combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Bk4wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pd4wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pd4wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pd4wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pd4wx4~1 .lut_mask = 64'hFFFCFFFC00000000;
+defparam \soc_inst|m0_1|u_logic|Pd4wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X30_Y6_N50
+dffeas \soc_inst|m0_1|u_logic|H9i2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|M4nvx4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|H9i2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H9i2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H9i2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X30_Y6_N2
+dffeas \soc_inst|m0_1|u_logic|Lny2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Q6nvx4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Lny2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lny2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lny2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y6_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W7hwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|W7hwx4~0_combout = ( \soc_inst|m0_1|u_logic|Xly2z4~q & ( (!\soc_inst|m0_1|u_logic|Zoy2z4~q & \soc_inst|m0_1|u_logic|Nqy2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Xly2z4~q & ( (!\soc_inst|m0_1|u_logic|Zoy2z4~q &
+// (\soc_inst|m0_1|u_logic|Nqy2z4~q & \soc_inst|m0_1|u_logic|Lny2z4~q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Lny2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|W7hwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W7hwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W7hwx4~0 .lut_mask = 64'h000C000C0C0C0C0C;
+defparam \soc_inst|m0_1|u_logic|W7hwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y6_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Poa2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Poa2z4~0_combout = ( \soc_inst|m0_1|u_logic|H9i2z4~q & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q & (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Poa2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Poa2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Poa2z4~0 .lut_mask = 64'h0000000022002200;
+defparam \soc_inst|m0_1|u_logic|Poa2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y6_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ik4wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ik4wx4~0_combout = ( \soc_inst|m0_1|u_logic|Pcyvx4~combout & ( !\soc_inst|m0_1|u_logic|Wpsvx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Poa2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ffj2z4~q ) # (\soc_inst|m0_1|u_logic|Ark2z4~q
+// ))) # (\soc_inst|m0_1|u_logic|W7hwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pcyvx4~combout & ( !\soc_inst|m0_1|u_logic|Wpsvx4~0_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|W7hwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Poa2z4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wpsvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ik4wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ik4wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ik4wx4~0 .lut_mask = 64'hFFFFFFDF00000000;
+defparam \soc_inst|m0_1|u_logic|Ik4wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X30_Y6_N23
+dffeas \soc_inst|m0_1|u_logic|Qdj2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Llnvx4~combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Qdj2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qdj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qdj2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y6_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ik4wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ik4wx4~1_combout = ( \soc_inst|m0_1|u_logic|Qdj2z4~q & ( \soc_inst|m0_1|u_logic|Bk4wx4~combout & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q & (\soc_inst|m0_1|u_logic|Ik4wx4~0_combout & (!\soc_inst|m0_1|u_logic|H9i2z4~q $
+// (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qdj2z4~q & ( \soc_inst|m0_1|u_logic|Bk4wx4~combout & ( (\soc_inst|m0_1|u_logic|Ik4wx4~0_combout & ((!\soc_inst|m0_1|u_logic|H9i2z4~q ) #
+// ((\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|U2x2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Qdj2z4~q & ( !\soc_inst|m0_1|u_logic|Bk4wx4~combout & ( \soc_inst|m0_1|u_logic|Ik4wx4~0_combout ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Qdj2z4~q & ( !\soc_inst|m0_1|u_logic|Bk4wx4~combout & ( \soc_inst|m0_1|u_logic|Ik4wx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ik4wx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Bk4wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ik4wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ik4wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ik4wx4~1 .lut_mask = 64'h00FF00FF00BA0090;
+defparam \soc_inst|m0_1|u_logic|Ik4wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y10_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pd4wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pd4wx4~2_combout = ( \soc_inst|m0_1|u_logic|Pd4wx4~1_combout & ( \soc_inst|m0_1|u_logic|Ik4wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|C34wx4~combout & (\soc_inst|m0_1|u_logic|Kofwx4~0_combout & !\soc_inst|m0_1|u_logic|S4w2z4~q
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pd4wx4~1_combout & ( \soc_inst|m0_1|u_logic|Ik4wx4~1_combout & ( !\soc_inst|m0_1|u_logic|S4w2z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|Pd4wx4~1_combout & ( !\soc_inst|m0_1|u_logic|Ik4wx4~1_combout & (
+// !\soc_inst|m0_1|u_logic|S4w2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Pd4wx4~1_combout & ( !\soc_inst|m0_1|u_logic|Ik4wx4~1_combout & ( !\soc_inst|m0_1|u_logic|S4w2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|C34wx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Kofwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Pd4wx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ik4wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pd4wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pd4wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pd4wx4~2 .lut_mask = 64'hF0F0F0F0F0F02020;
+defparam \soc_inst|m0_1|u_logic|Pd4wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y10_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q5vvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q5vvx4~1_combout = ( !\soc_inst|m0_1|u_logic|Pd4wx4~2_combout & ( (!\soc_inst|m0_1|u_logic|C34wx4~combout & (!\soc_inst|m0_1|u_logic|Cr0xx4~1_combout & ((!\soc_inst|m0_1|u_logic|F5mvx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Q5vvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|C34wx4~combout & (((!\soc_inst|m0_1|u_logic|F5mvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q5vvx4~0_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|C34wx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Cr0xx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|F5mvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Q5vvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pd4wx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q5vvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q5vvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q5vvx4~1 .lut_mask = 64'hD0DDD0DD00000000;
+defparam \soc_inst|m0_1|u_logic|Q5vvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y10_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q7mvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q7mvx4~0_combout = ( \soc_inst|m0_1|u_logic|U7w2z4~q & ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Q5vvx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Ye4wx4~combout ) #
+// (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|U7w2z4~q & ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout & ( !\soc_inst|m0_1|u_logic|Q5vvx4~1_combout ) ) ) # ( \soc_inst|m0_1|u_logic|U7w2z4~q & (
+// !\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|U7w2z4~q & ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout & ( !\soc_inst|m0_1|u_logic|Q5vvx4~1_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Q5vvx4~1_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|U7w2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q7mvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q7mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q7mvx4~0 .lut_mask = 64'hAAAAFFFFAAAAFFAF;
+defparam \soc_inst|m0_1|u_logic|Q7mvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X22_Y10_N56
+dffeas \soc_inst|m0_1|u_logic|U7w2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Q7mvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|U7w2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U7w2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U7w2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y12_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kkrvx4~1_combout = ( \soc_inst|m0_1|u_logic|Viuwx4~0_combout & ( \soc_inst|m0_1|u_logic|Whzwx4~1_combout ) ) # ( !\soc_inst|m0_1|u_logic|Viuwx4~0_combout & ( \soc_inst|m0_1|u_logic|Gyvwx4~1_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Gyvwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Whzwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Viuwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kkrvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~1 .lut_mask = 64'h0F0F0F0F00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y15_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Arzwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Arzwx4~2_combout = ( \soc_inst|m0_1|u_logic|Arzwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Arzwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Dizwx4~0_combout & !\soc_inst|m0_1|u_logic|Kizwx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Arzwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Arzwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Iazwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Kizwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dizwx4~0_combout ))) #
+// (\soc_inst|m0_1|u_logic|Iazwx4~0_combout & (\soc_inst|m0_1|u_logic|Dizwx4~0_combout & !\soc_inst|m0_1|u_logic|Kizwx4~0_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Iazwx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Dizwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Kizwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Arzwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Arzwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Arzwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Arzwx4~2 .lut_mask = 64'hAF0A0F0000000000;
+defparam \soc_inst|m0_1|u_logic|Arzwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y13_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kkrvx4~0_combout = ( \soc_inst|m0_1|u_logic|Zxvwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Xwvwx4~1_combout & \soc_inst|m0_1|u_logic|Arzwx4~2_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Zxvwx4~1_combout & (
+// (!\soc_inst|m0_1|u_logic|Xwvwx4~1_combout ) # ((\soc_inst|m0_1|u_logic|D4g3z4~q & (\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Arzwx4~2_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|D4g3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Xwvwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Arzwx4~2_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kkrvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~0 .lut_mask = 64'hCDCCCDCC00CC00CC;
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y11_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kkrvx4~2_combout = ( \soc_inst|m0_1|u_logic|G10xx4~1_combout & ( \soc_inst|m0_1|u_logic|Cjuwx4~0_combout ) ) # ( \soc_inst|m0_1|u_logic|G10xx4~1_combout & ( !\soc_inst|m0_1|u_logic|Cjuwx4~0_combout & (
+// \soc_inst|m0_1|u_logic|D0wwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|G10xx4~1_combout & ( !\soc_inst|m0_1|u_logic|Cjuwx4~0_combout & ( \soc_inst|m0_1|u_logic|D0wwx4~1_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|D0wwx4~1_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|G10xx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Cjuwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kkrvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~2 .lut_mask = 64'h0F0F0F0F0000FFFF;
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kkrvx4~3_combout = ( \soc_inst|m0_1|u_logic|U5pwx4~0_combout & ( \soc_inst|m0_1|u_logic|Kkrvx4~2_combout ) ) # ( !\soc_inst|m0_1|u_logic|U5pwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Jjuwx4~2_combout &
+// (\soc_inst|m0_1|u_logic|Ayzwx4~combout )) # (\soc_inst|m0_1|u_logic|Jjuwx4~2_combout & ((\soc_inst|m0_1|u_logic|Wzvwx4~1_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Kkrvx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ayzwx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzvwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Jjuwx4~2_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|U5pwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kkrvx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~3 .lut_mask = 64'h330F330F55555555;
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kkrvx4~4_combout = ( \soc_inst|m0_1|u_logic|I6pwx4~0_combout & ( \soc_inst|m0_1|u_logic|Kkrvx4~3_combout ) ) # ( !\soc_inst|m0_1|u_logic|I6pwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|B6pwx4~4_combout &
+// ((!\soc_inst|m0_1|u_logic|Kkrvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|B6pwx4~4_combout & (\soc_inst|m0_1|u_logic|Kkrvx4~1_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|B6pwx4~4_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Kkrvx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Kkrvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Kkrvx4~3_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|I6pwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kkrvx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~4 .lut_mask = 64'hB1B1B1B100FF00FF;
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kkrvx4~5_combout = ( \soc_inst|m0_1|u_logic|E5owx4~0_combout & ( \soc_inst|m0_1|u_logic|Kkrvx4~4_combout & ( (!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|G2zwx4~1_combout &
+// (\soc_inst|m0_1|u_logic|Wwywx4~0_combout & !\soc_inst|m0_1|u_logic|C0zwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout & ( \soc_inst|m0_1|u_logic|Kkrvx4~4_combout & ( (!\soc_inst|m0_1|u_logic|C0zwx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Wwywx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|E5owx4~0_combout & ( !\soc_inst|m0_1|u_logic|Kkrvx4~4_combout & ( (!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ) #
+// ((\soc_inst|m0_1|u_logic|G2zwx4~1_combout & (\soc_inst|m0_1|u_logic|Wwywx4~0_combout & !\soc_inst|m0_1|u_logic|C0zwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout & ( !\soc_inst|m0_1|u_logic|Kkrvx4~4_combout & (
+// (\soc_inst|m0_1|u_logic|G2zwx4~1_combout & (\soc_inst|m0_1|u_logic|Wwywx4~0_combout & !\soc_inst|m0_1|u_logic|C0zwx4~0_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|C0zwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kkrvx4~4_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kkrvx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~5 .lut_mask = 64'h1100F1F0BB00F1F0;
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y11_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kkrvx4~6_combout = ( \soc_inst|m0_1|u_logic|Kkrvx4~5_combout & ( (\soc_inst|m0_1|u_logic|U7w2z4~q & !\soc_inst|m0_1|u_logic|Ywi2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Kkrvx4~5_combout & ( !\soc_inst|m0_1|u_logic|Ywi2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|U7w2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ywi2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Kkrvx4~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kkrvx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~6 .lut_mask = 64'hFF00FF000F000F00;
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y9_N50
+dffeas \soc_inst|m0_1|u_logic|Kyi2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Vcnvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Kyi2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kyi2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kyi2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y9_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vcnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vcnvx4~0_combout = ( \soc_inst|m0_1|u_logic|Kyi2z4~q & ( \soc_inst|m0_1|u_logic|Lwqvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Abovx4~0_combout & (!\soc_inst|m0_1|u_logic|Kkrvx4~6_combout &
+// ((!\soc_inst|interconnect_1|HRDATA[0]~32_combout ) # (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout & ((!\soc_inst|interconnect_1|HRDATA[0]~32_combout ) # ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout )))) ) ) ) #
+// ( \soc_inst|m0_1|u_logic|Kyi2z4~q & ( !\soc_inst|m0_1|u_logic|Lwqvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Abovx4~0_combout & (!\soc_inst|m0_1|u_logic|Kkrvx4~6_combout & ((!\soc_inst|interconnect_1|HRDATA[0]~32_combout ) #
+// (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout & ((!\soc_inst|interconnect_1|HRDATA[0]~32_combout ) # ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kyi2z4~q & (
+// !\soc_inst|m0_1|u_logic|Lwqvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Abovx4~0_combout & (!\soc_inst|m0_1|u_logic|Kkrvx4~6_combout & ((!\soc_inst|interconnect_1|HRDATA[0]~32_combout ) # (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout )))) #
+// (\soc_inst|m0_1|u_logic|Abovx4~0_combout & ((!\soc_inst|interconnect_1|HRDATA[0]~32_combout ) # ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+ .datab(!\soc_inst|interconnect_1|HRDATA[0]~32_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Kkrvx4~6_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Kyi2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vcnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vcnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vcnvx4~0 .lut_mask = 64'hF5C4F5C40000F5C4;
+defparam \soc_inst|m0_1|u_logic|Vcnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y9_N49
+dffeas \soc_inst|m0_1|u_logic|Kyi2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Vcnvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Kyi2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kyi2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kyi2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y9_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C9rvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C9rvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Kyi2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Nbm2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Kyi2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C9rvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C9rvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C9rvx4~0 .lut_mask = 64'h00000000FFFF0000;
+defparam \soc_inst|m0_1|u_logic|C9rvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y4_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfpvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kfpvx4~1_combout = ( \soc_inst|m0_1|u_logic|Ilpvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Aok2z4~q & ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|A0zvx4~0_combout &
+// !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Ilpvx4~0_combout & ( (\soc_inst|m0_1|u_logic|A0zvx4~0_combout & (\soc_inst|m0_1|u_logic|Aok2z4~q & !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kfpvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~1 .lut_mask = 64'h1010101033103310;
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y4_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfpvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kfpvx4~2_combout = ( \soc_inst|m0_1|u_logic|Ukpvx4~combout & ( (!\soc_inst|m0_1|u_logic|Kfpvx4~1_combout & ((!\soc_inst|m0_1|u_logic|Qem2z4~q ) # (!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Ukpvx4~combout & ( !\soc_inst|m0_1|u_logic|Kfpvx4~1_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Kfpvx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kfpvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~2 .lut_mask = 64'hF0F0F0F0F0A0F0A0;
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y4_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfpvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kfpvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Jppvx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Jppvx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|Npk2z4~q & !\soc_inst|m0_1|u_logic|O5t2z4~q ) ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kfpvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~0 .lut_mask = 64'h0F000000FFFF0000;
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y7_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfpvx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kfpvx4~3_combout = ( !\soc_inst|m0_1|u_logic|Kfpvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Kfpvx4~2_combout & (!\soc_inst|m0_1|u_logic|Hhpvx4~0_combout & ((!\soc_inst|m0_1|u_logic|C9rvx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Irqvx4~0_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|C9rvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Irqvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Kfpvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hhpvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Kfpvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kfpvx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~3 .lut_mask = 64'h0E000E0000000000;
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y7_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfpvx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kfpvx4~4_combout = ( \soc_inst|m0_1|u_logic|Mnpvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Zoy2z4~q ) # ((\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Vopvx4~0_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Mnpvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Vopvx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Vopvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Mnpvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kfpvx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~4 .lut_mask = 64'h50505050FF50FF50;
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y6_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jipvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jipvx4~0_combout = ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Xipvx4~0_combout & ( \soc_inst|m0_1|u_logic|Ljpvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & (
+// \soc_inst|m0_1|u_logic|Xipvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q $ (\soc_inst|m0_1|u_logic|Ljpvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ljpvx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Xipvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jipvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jipvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jipvx4~0 .lut_mask = 64'h00000000A5A50F0F;
+defparam \soc_inst|m0_1|u_logic|Jipvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y8_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfpvx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kfpvx4~5_combout = ( !\soc_inst|m0_1|u_logic|Kfpvx4~4_combout & ( !\soc_inst|m0_1|u_logic|Jipvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Kfpvx4~3_combout & ((\soc_inst|m0_1|u_logic|Yzi2z4~q ) #
+// (\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Kfpvx4~3_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Kfpvx4~4_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Jipvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kfpvx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~5 .lut_mask = 64'h050F000000000000;
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X36_Y8_N28
+dffeas \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Kfpvx4~5_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y10_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zz8wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zz8wx4~combout = ( \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Ez8wx4~0_combout & !\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ez8wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zz8wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zz8wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zz8wx4 .lut_mask = 64'h000000000F000F00;
+defparam \soc_inst|m0_1|u_logic|Zz8wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y10_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J00wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|J00wx4~0_combout = ( \soc_inst|m0_1|u_logic|Am5wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & ((!\soc_inst|m0_1|u_logic|Zz8wx4~combout ) # (!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Am5wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout & (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Zz8wx4~combout ) # (!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Zz8wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|J00wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J00wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J00wx4~0 .lut_mask = 64'h88808880AAA0AAA0;
+defparam \soc_inst|m0_1|u_logic|J00wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y10_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gpcwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gpcwx4~0_combout = ( \soc_inst|m0_1|u_logic|Xucwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout & (((\soc_inst|m0_1|u_logic|Tpnvx4~0_combout & !\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) #
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Xucwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) #
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout & (((\soc_inst|m0_1|u_logic|Tpnvx4~0_combout & !\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Tpnvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xucwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gpcwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gpcwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gpcwx4~0 .lut_mask = 64'h8D888D884E444E44;
+defparam \soc_inst|m0_1|u_logic|Gpcwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y8_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gpcwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gpcwx4~1_combout = ( \soc_inst|m0_1|u_logic|X8zvx4~combout & ( \soc_inst|m0_1|u_logic|Xucwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Tpnvx4~0_combout & \soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|X8zvx4~combout & ( \soc_inst|m0_1|u_logic|Xucwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Tpnvx4~0_combout ) ) ) # ( \soc_inst|m0_1|u_logic|X8zvx4~combout & ( !\soc_inst|m0_1|u_logic|Xucwx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Tpnvx4~0_combout & !\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|X8zvx4~combout & ( !\soc_inst|m0_1|u_logic|Xucwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Tpnvx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Tpnvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Xucwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gpcwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gpcwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gpcwx4~1 .lut_mask = 64'hCCCCC0C0CCCC0C0C;
+defparam \soc_inst|m0_1|u_logic|Gpcwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y7_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J00wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|J00wx4~1_combout = ( \soc_inst|m0_1|u_logic|Gpcwx4~1_combout & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (\soc_inst|m0_1|u_logic|J00wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Add5~97_sumout ) #
+// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Gpcwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (\soc_inst|m0_1|u_logic|J00wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Add5~97_sumout ) #
+// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gpcwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( (\soc_inst|m0_1|u_logic|J00wx4~0_combout & (\soc_inst|m0_1|u_logic|Gpcwx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Add5~97_sumout ) # (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Add5~97_sumout ),
+ .datab(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|J00wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Gpcwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Gpcwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|J00wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J00wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J00wx4~1 .lut_mask = 64'h000B0B0B00000B0B;
+defparam \soc_inst|m0_1|u_logic|J00wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y10_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C00wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C00wx4~0_combout = ( \soc_inst|m0_1|u_logic|Leuvx4~1_combout & ( \soc_inst|m0_1|u_logic|J00wx4~1_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|J00wx4~1_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Leuvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C00wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C00wx4~0 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|C00wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y8_N29
+dffeas \soc_inst|m0_1|u_logic|Bn53z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Bn53z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bn53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bn53z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y10_N8
+dffeas \soc_inst|m0_1|u_logic|U5r2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|U5r2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U5r2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U5r2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y10_N49
+dffeas \soc_inst|m0_1|u_logic|Twz2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Twz2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Twz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Twz2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y6_N2
+dffeas \soc_inst|m0_1|u_logic|J433z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|J433z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J433z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J433z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X40_Y5_N53
+dffeas \soc_inst|m0_1|u_logic|Av13z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Av13z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Av13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Av13z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X39_Y8_N19
+dffeas \soc_inst|m0_1|u_logic|Nt03z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Nt03z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nt03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nt03z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y8_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Am5wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Am5wx4~2_combout = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|J433z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (
+// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Av13z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Nt03z4~q ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE_q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|J433z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Av13z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Nt03z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Am5wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Am5wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Am5wx4~2 .lut_mask = 64'hCCCCFF00F0F0AAAA;
+defparam \soc_inst|m0_1|u_logic|Am5wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X39_Y8_N50
+dffeas \soc_inst|m0_1|u_logic|I7r2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|I7r2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I7r2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I7r2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y10_N44
+dffeas \soc_inst|m0_1|u_logic|Sd43z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Sd43z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sd43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sd43z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y8_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Am5wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Am5wx4~3_combout = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|M1j2z4~q & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (
+// \soc_inst|m0_1|u_logic|M1j2z4~q & ( (!\soc_inst|m0_1|u_logic|Sd43z4~q & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|M1j2z4~q & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q
+// ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|M1j2z4~q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|I7r2z4~q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|Sd43z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|I7r2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Sd43z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Am5wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Am5wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Am5wx4~3 .lut_mask = 64'hAAF0FF0000F0FF00;
+defparam \soc_inst|m0_1|u_logic|Am5wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y8_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Am5wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Am5wx4~0_combout = ( \soc_inst|m0_1|u_logic|Am5wx4~2_combout & ( \soc_inst|m0_1|u_logic|Am5wx4~3_combout & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Twz2z4~q
+// ) # (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Am5wx4~2_combout & ( \soc_inst|m0_1|u_logic|Am5wx4~3_combout & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|Twz2z4~q ) # (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Am5wx4~2_combout & ( !\soc_inst|m0_1|u_logic|Am5wx4~3_combout & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q &
+// !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Twz2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Am5wx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Am5wx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Am5wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Am5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Am5wx4~0 .lut_mask = 64'h000088882220AAA8;
+defparam \soc_inst|m0_1|u_logic|Am5wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y8_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Am5wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Am5wx4~1_combout = ( !\soc_inst|m0_1|u_logic|Am5wx4~0_combout & ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout & ( (\soc_inst|m0_1|u_logic|Bn53z4~q & (!\soc_inst|m0_1|u_logic|Ixxwx4~combout &
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|U5r2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Am5wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Sd1xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ixxwx4~combout &
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|U5r2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bn53z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|U5r2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ixxwx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Am5wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Am5wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Am5wx4~1 .lut_mask = 64'hCF00000045000000;
+defparam \soc_inst|m0_1|u_logic|Am5wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y4_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H0dwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H0dwx4~0_combout = ( \soc_inst|m0_1|u_logic|Aok2z4~q & ( !\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q &
+// (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H0dwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H0dwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H0dwx4~0 .lut_mask = 64'h0000100000000000;
+defparam \soc_inst|m0_1|u_logic|H0dwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y11_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O0dwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O0dwx4~0_combout = ( \soc_inst|m0_1|u_logic|I4dwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Z4bwx4~2_combout ) #
+// (\soc_inst|m0_1|u_logic|Z4bwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|I4dwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Z4bwx4~2_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|I4dwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|O0dwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O0dwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O0dwx4~0 .lut_mask = 64'h8888888808880888;
+defparam \soc_inst|m0_1|u_logic|O0dwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y8_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xucwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xucwx4~0_combout = ( \soc_inst|m0_1|u_logic|W19wx4~0_combout & ( !\soc_inst|m0_1|u_logic|O0dwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Am5wx4~1_combout & (!\soc_inst|m0_1|u_logic|H0dwx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W19wx4~0_combout & ( !\soc_inst|m0_1|u_logic|O0dwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|H0dwx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|H0dwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|O0dwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xucwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xucwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xucwx4~0 .lut_mask = 64'hF500310000000000;
+defparam \soc_inst|m0_1|u_logic|Xucwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~25 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~25_sumout = SUM(( !\soc_inst|m0_1|u_logic|J4x2z4~q ) + ( !\soc_inst|m0_1|u_logic|Fcj2z4~q ) + ( !VCC ))
+// \soc_inst|m0_1|u_logic|Add2~26 = CARRY(( !\soc_inst|m0_1|u_logic|J4x2z4~q ) + ( !\soc_inst|m0_1|u_logic|Fcj2z4~q ) + ( !VCC ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add2~25_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add2~26 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~25 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~25 .lut_mask = 64'h000055550000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~25 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y13_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~17 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~17_sumout = SUM(( !\soc_inst|m0_1|u_logic|G7x2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~26 ))
+// \soc_inst|m0_1|u_logic|Add2~18 = CARRY(( !\soc_inst|m0_1|u_logic|G7x2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~26 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|G7x2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add2~26 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add2~17_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add2~18 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~17 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~17 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~17 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~33 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~33_sumout = SUM(( !\soc_inst|m0_1|u_logic|R8x2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~18 ))
+// \soc_inst|m0_1|u_logic|Add2~34 = CARRY(( !\soc_inst|m0_1|u_logic|R8x2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~18 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|R8x2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add2~18 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add2~33_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add2~34 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~33 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~33 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~33 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ulhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ulhvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Add2~33_sumout )))) #
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & (((\soc_inst|m0_1|u_logic|R8x2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|R8x2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Add2~33_sumout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ulhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ulhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ulhvx4~0 .lut_mask = 64'hCF8BCF8B00000000;
+defparam \soc_inst|m0_1|u_logic|Ulhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y10_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ulhvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ulhvx4~1_combout = ( \soc_inst|m0_1|u_logic|Ulhvx4~0_combout & ( \soc_inst|m0_1|u_logic|Leuvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~97_sumout ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Ulhvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Leuvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~97_sumout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Add5~97_sumout ),
+ .datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Ulhvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Leuvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ulhvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ulhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ulhvx4~1 .lut_mask = 64'h0000E0E00000EEEE;
+defparam \soc_inst|m0_1|u_logic|Ulhvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X33_Y10_N8
+dffeas \soc_inst|m0_1|u_logic|R8x2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Ulhvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|R8x2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R8x2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|R8x2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y6_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~29 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~29_sumout = SUM(( (!\soc_inst|m0_1|u_logic|Bnnvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|J4x2z4~q & \soc_inst|m0_1|u_logic|B8c2z4~0_combout ))) ) + (
+// !\soc_inst|m0_1|u_logic|G7x2z4~q ) + ( !VCC ))
+// \soc_inst|m0_1|u_logic|Add3~30 = CARRY(( (!\soc_inst|m0_1|u_logic|Bnnvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|J4x2z4~q & \soc_inst|m0_1|u_logic|B8c2z4~0_combout ))) ) + ( !\soc_inst|m0_1|u_logic|G7x2z4~q
+// ) + ( !VCC ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Bnnvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|G7x2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add3~29_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add3~30 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add3~29 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~29 .lut_mask = 64'h000000FF0000FF08;
+defparam \soc_inst|m0_1|u_logic|Add3~29 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y6_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~25 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~25_sumout = SUM(( !\soc_inst|m0_1|u_logic|R8x2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~30 ))
+// \soc_inst|m0_1|u_logic|Add3~26 = CARRY(( !\soc_inst|m0_1|u_logic|R8x2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~30 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|R8x2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add3~30 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add3~25_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add3~26 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add3~25 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~25 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~25 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y6_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~33 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~33_sumout = SUM(( !\soc_inst|m0_1|u_logic|Cax2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~26 ))
+// \soc_inst|m0_1|u_logic|Add3~34 = CARRY(( !\soc_inst|m0_1|u_logic|Cax2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~26 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Cax2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add3~26 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add3~33_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add3~34 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add3~33 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~33 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~33 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y6_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~53 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~53_sumout = SUM(( !\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~34 ))
+// \soc_inst|m0_1|u_logic|Add3~54 = CARRY(( !\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~34 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add3~34 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add3~53_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add3~54 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add3~53 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~53 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~53 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y6_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~49 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~49_sumout = SUM(( !\soc_inst|m0_1|u_logic|Ycx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~54 ))
+// \soc_inst|m0_1|u_logic|Add3~50 = CARRY(( !\soc_inst|m0_1|u_logic|Ycx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~54 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ycx2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add3~54 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add3~49_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add3~50 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add3~49 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~49 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~49 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y7_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S4qvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S4qvx4~combout = ( \soc_inst|m0_1|u_logic|Add3~49_sumout & ( \soc_inst|m0_1|u_logic|Add5~81_sumout & ( (((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & \soc_inst|m0_1|u_logic|Yonvx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~49_sumout & ( \soc_inst|m0_1|u_logic|Add5~81_sumout & ( ((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout &
+// \soc_inst|m0_1|u_logic|Yonvx4~0_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~49_sumout & ( !\soc_inst|m0_1|u_logic|Add5~81_sumout & ( ((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout &
+// \soc_inst|m0_1|u_logic|Yonvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~49_sumout & ( !\soc_inst|m0_1|u_logic|Add5~81_sumout & ( (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout &
+// \soc_inst|m0_1|u_logic|Yonvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Yonvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Add3~49_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~81_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S4qvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S4qvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S4qvx4 .lut_mask = 64'h000F333F555F777F;
+defparam \soc_inst|m0_1|u_logic|S4qvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X18_Y5_N17
+dffeas \soc_inst|ram_1|saved_word_address[5] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|S4qvx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|ram_1|always1~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|ram_1|saved_word_address [5]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|saved_word_address[5] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[5] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y5_N9
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[5]~5 (
+// Equation(s):
+// \soc_inst|ram_1|memory.raddr_a[5]~5_combout = ( \soc_inst|ram_1|always1~0_combout & ( (!\soc_inst|ram_1|write_cycle~q & ((\soc_inst|m0_1|u_logic|S4qvx4~combout ))) # (\soc_inst|ram_1|write_cycle~q & (\soc_inst|ram_1|saved_word_address [5])) ) ) # (
+// !\soc_inst|ram_1|always1~0_combout & ( \soc_inst|ram_1|saved_word_address [5] ) )
+
+ .dataa(!\soc_inst|ram_1|write_cycle~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|ram_1|saved_word_address [5]),
+ .datad(!\soc_inst|m0_1|u_logic|S4qvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|always1~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|memory.raddr_a[5]~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory.raddr_a[5]~5 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[5]~5 .lut_mask = 64'h0F0F0F0F05AF05AF;
+defparam \soc_inst|ram_1|memory.raddr_a[5]~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y9_N57
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[19]~18 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[19]~18_combout = ( \soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19 & (!\soc_inst|ram_1|byte_select [2] & \soc_inst|ram_1|write_cycle~DUPLICATE_q )) ) ) # (
+// !\soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & ((\soc_inst|ram_1|byte_select [2]) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19 ))) ) )
+
+ .dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19 ),
+ .datab(gnd),
+ .datac(!\soc_inst|ram_1|byte_select [2]),
+ .datad(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|data_to_memory[19]~18_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[19]~18 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[19]~18 .lut_mask = 64'h005F005F00500050;
+defparam \soc_inst|ram_1|data_to_memory[19]~18 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X26_Y9_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 (
+ .portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|ram_1|data_to_memory[19]~18_combout ,\soc_inst|ram_1|data_to_memory[11]~17_combout }),
+ .portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+ .portabyteenamasks(1'b1),
+ .portbdatain(2'b00),
+ .portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_first_bit_number = 11;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_first_bit_number = 11;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001A6BA6001C08432C03F03C043B8E63B0C0300300300300300300300F0000000000000000644000000000000000000000000";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y9_N18
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[19]~25 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[19]~25_combout = ( \soc_inst|switches_1|switch_store[1][3]~q & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19 & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) #
+// (\soc_inst|interconnect_1|HRDATA[20]~7_combout ) ) ) ) # ( !\soc_inst|switches_1|switch_store[1][3]~q & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19 & ( (!\soc_inst|interconnect_1|HRDATA[20]~7_combout &
+// (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[20]~7_combout & ((!\soc_inst|interconnect_1|Equal1~0_combout ))) ) ) ) # ( \soc_inst|switches_1|switch_store[1][3]~q & (
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19 & ( (!\soc_inst|interconnect_1|HRDATA[20]~7_combout & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[20]~7_combout &
+// ((\soc_inst|interconnect_1|Equal1~0_combout ))) ) ) ) # ( !\soc_inst|switches_1|switch_store[1][3]~q & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19 & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout &
+// !\soc_inst|interconnect_1|HRDATA[20]~7_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+ .datac(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
+ .datad(!\soc_inst|interconnect_1|Equal1~0_combout ),
+ .datae(!\soc_inst|switches_1|switch_store[1][3]~q ),
+ .dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19 ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[19]~25_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[19]~25 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[19]~25 .lut_mask = 64'hC0C0C0CFCFC0CFCF;
+defparam \soc_inst|interconnect_1|HRDATA[19]~25 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y9_N50
+dffeas \soc_inst|m0_1|u_logic|Jky2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|E7nvx4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Jky2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jky2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jky2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y9_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E7nvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|E7nvx4~0_combout = ( \soc_inst|m0_1|u_logic|Vapvx4~combout & ( ((!\soc_inst|m0_1|u_logic|Scpvx4~2_combout & !\soc_inst|m0_1|u_logic|Jky2z4~q )) # (\soc_inst|interconnect_1|HRDATA[3]~26_combout ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Vapvx4~combout & ( (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout & !\soc_inst|m0_1|u_logic|Jky2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
+ .datad(!\soc_inst|interconnect_1|HRDATA[3]~26_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|E7nvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E7nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E7nvx4~0 .lut_mask = 64'hC0C0C0C0C0FFC0FF;
+defparam \soc_inst|m0_1|u_logic|E7nvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y9_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vphvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vphvx4~0_combout = ( \soc_inst|interconnect_1|HRDATA[19]~25_combout & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) ) # ( !\soc_inst|interconnect_1|HRDATA[19]~25_combout )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[19]~25_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vphvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vphvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vphvx4~0 .lut_mask = 64'hFFFFFFFFAAAAAAAA;
+defparam \soc_inst|m0_1|u_logic|Vphvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y9_N59
+dffeas \soc_inst|m0_1|u_logic|Oiw2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Vphvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Oiw2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oiw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Oiw2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y9_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E7nvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|E7nvx4~1_combout = ( \soc_inst|m0_1|u_logic|Wfovx4~combout & ( (!\soc_inst|m0_1|u_logic|Gtp2z4~q ) # ((!\soc_inst|m0_1|u_logic|Oiw2z4~q & \soc_inst|m0_1|u_logic|Pfovx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Wfovx4~combout
+// & ( (!\soc_inst|m0_1|u_logic|Oiw2z4~q & \soc_inst|m0_1|u_logic|Pfovx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Oiw2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Gtp2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|E7nvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E7nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E7nvx4~1 .lut_mask = 64'h0C0C0C0CFF0CFF0C;
+defparam \soc_inst|m0_1|u_logic|E7nvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y9_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E7nvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|E7nvx4~2_combout = ( !\soc_inst|m0_1|u_logic|E7nvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|E7nvx4~0_combout & ((!\soc_inst|interconnect_1|HRDATA[19]~25_combout ) # (!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|interconnect_1|HRDATA[19]~25_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|E7nvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|E7nvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|E7nvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E7nvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E7nvx4~2 .lut_mask = 64'hFA00FA0000000000;
+defparam \soc_inst|m0_1|u_logic|E7nvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y9_N49
+dffeas \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|E7nvx4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y8_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fjswx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fjswx4~0_combout = ( !\soc_inst|m0_1|u_logic|Dvy2z4~q & ( \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Zoy2z4~q & (\soc_inst|m0_1|u_logic|Tki2z4~q & ((!\soc_inst|m0_1|u_logic|Qem2z4~q ) #
+// (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Dvy2z4~q & ( !\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q & \soc_inst|m0_1|u_logic|Tki2z4~q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Dvy2z4~q & ( !\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Zoy2z4~q & (\soc_inst|m0_1|u_logic|Tki2z4~q & ((!\soc_inst|m0_1|u_logic|Qem2z4~q ) # (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fjswx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fjswx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fjswx4~0 .lut_mask = 64'h008A00CC008A0000;
+defparam \soc_inst|m0_1|u_logic|Fjswx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y8_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Emewx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Emewx4~0_combout = ( \soc_inst|m0_1|u_logic|Qtrwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|W7z2z4~q ) # ((!\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Qtrwx4~0_combout )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Emewx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Emewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Emewx4~0 .lut_mask = 64'hFFFFFFFFFFFCFFFC;
+defparam \soc_inst|m0_1|u_logic|Emewx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y7_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wvswx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wvswx4~0_combout = ( \soc_inst|m0_1|u_logic|C9yvx4~combout & ( \soc_inst|m0_1|u_logic|Emewx4~0_combout & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q & (\soc_inst|m0_1|u_logic|E4xvx4~0_combout &
+// !\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|C9yvx4~combout & ( !\soc_inst|m0_1|u_logic|Emewx4~0_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|E4xvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Emewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wvswx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wvswx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wvswx4~0 .lut_mask = 64'h0000FFFF00002020;
+defparam \soc_inst|m0_1|u_logic|Wvswx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y9_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fjswx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fjswx4~1_combout = ( !\soc_inst|m0_1|u_logic|Fjswx4~0_combout & ( !\soc_inst|m0_1|u_logic|Wvswx4~0_combout & ( (\soc_inst|m0_1|u_logic|G2lwx4~combout & ((!\soc_inst|m0_1|u_logic|Pcyvx4~combout ) #
+// (\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|G2lwx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Fjswx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wvswx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fjswx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fjswx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fjswx4~1 .lut_mask = 64'h2323000000000000;
+defparam \soc_inst|m0_1|u_logic|Fjswx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y9_N32
+dffeas \soc_inst|m0_1|u_logic|T1d3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fjswx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T1d3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T1d3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y9_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L61xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|L61xx4~0_combout = ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~q & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L61xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L61xx4~0 .lut_mask = 64'h0C000C0000000000;
+defparam \soc_inst|m0_1|u_logic|L61xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X37_Y9_N25
+dffeas \soc_inst|m0_1|u_logic|Ek03z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ek03z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ek03z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ek03z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X37_Y9_N14
+dffeas \soc_inst|m0_1|u_logic|Hq23z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Hq23z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hq23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hq23z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X37_Y9_N23
+dffeas \soc_inst|m0_1|u_logic|Z853z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Z853z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z853z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z853z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y13_N56
+dffeas \soc_inst|m0_1|u_logic|Knz2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Knz2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Knz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Knz2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y9_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zhyvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zhyvx4~2_combout = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Knz2z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|Z853z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Z853z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Knz2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zhyvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zhyvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zhyvx4~2 .lut_mask = 64'hFF00FF000F550F55;
+defparam \soc_inst|m0_1|u_logic|Zhyvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y9_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zhyvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zhyvx4~1_combout = ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Zhyvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|T1d3z4~q &
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Zhyvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Zhyvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Hq23z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Hq23z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Zhyvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zhyvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zhyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zhyvx4~1 .lut_mask = 64'h00C000F0A0000000;
+defparam \soc_inst|m0_1|u_logic|Zhyvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y13_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qz33z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qz33z4~feeder_combout = ( \soc_inst|m0_1|u_logic|G5qvx4~1_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qz33z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qz33z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qz33z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Qz33z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y13_N53
+dffeas \soc_inst|m0_1|u_logic|Qz33z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Qz33z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Qz33z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qz33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qz33z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y13_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yg13z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yg13z4~feeder_combout = ( \soc_inst|m0_1|u_logic|G5qvx4~1_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yg13z4~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yg13z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yg13z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Yg13z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y13_N16
+dffeas \soc_inst|m0_1|u_logic|Yg13z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Yg13z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Yg13z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yg13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yg13z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zhyvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zhyvx4~0_combout = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Qz33z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q & !\soc_inst|m0_1|u_logic|Svk2z4~q )) ) ) )
+// # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~q & !\soc_inst|m0_1|u_logic|Yg13z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qz33z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yg13z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zhyvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zhyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zhyvx4~0 .lut_mask = 64'h0000C00000008080;
+defparam \soc_inst|m0_1|u_logic|Zhyvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y9_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zhyvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zhyvx4~combout = ( !\soc_inst|m0_1|u_logic|Q8ywx4~combout & ( (!\soc_inst|m0_1|u_logic|Zhyvx4~1_combout & (!\soc_inst|m0_1|u_logic|Zhyvx4~0_combout & ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Ek03z4~DUPLICATE_q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ek03z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Zhyvx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Zhyvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Q8ywx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zhyvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zhyvx4 .lut_mask = 64'hB000B00000000000;
+defparam \soc_inst|m0_1|u_logic|Zhyvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y10_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hwdata_o~5_combout = ( !\soc_inst|m0_1|u_logic|Zhyvx4~combout & ( \soc_inst|m0_1|u_logic|Y9t2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hwdata_o~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hwdata_o~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~5 .lut_mask = 64'h0F0F0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|hwdata_o~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y9_N27
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[0]~27 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[0]~27_combout = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout & ( \soc_inst|m0_1|u_logic|hwdata_o~5_combout & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q ) ) ) # (
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout & ( \soc_inst|m0_1|u_logic|hwdata_o~5_combout & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & \soc_inst|ram_1|byte_select [0]) ) ) ) # (
+// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout & ( !\soc_inst|m0_1|u_logic|hwdata_o~5_combout & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & !\soc_inst|ram_1|byte_select [0]) ) ) )
+
+ .dataa(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .datab(!\soc_inst|ram_1|byte_select [0]),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout ),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|data_to_memory[0]~27_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[0]~27 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[0]~27 .lut_mask = 64'h0000444411115555;
+defparam \soc_inst|ram_1|data_to_memory[0]~27 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y5_N0
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[0]~32 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[0]~32_combout = ( \soc_inst|switches_1|switch_store[0][0]~q & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout & ( ((!\soc_inst|interconnect_1|HRDATA[1]~19_combout &
+// (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[1]~19_combout & ((\soc_inst|switches_1|DataValid [0])))) # (\soc_inst|interconnect_1|HRDATA[1]~20_combout ) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][0]~q & (
+// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout & ( (!\soc_inst|interconnect_1|HRDATA[1]~20_combout & ((!\soc_inst|interconnect_1|HRDATA[1]~19_combout & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) #
+// (\soc_inst|interconnect_1|HRDATA[1]~19_combout & ((\soc_inst|switches_1|DataValid [0]))))) # (\soc_inst|interconnect_1|HRDATA[1]~20_combout & (((\soc_inst|interconnect_1|HRDATA[1]~19_combout )))) ) ) ) # ( \soc_inst|switches_1|switch_store[0][0]~q & (
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout & ( (!\soc_inst|interconnect_1|HRDATA[1]~20_combout & ((!\soc_inst|interconnect_1|HRDATA[1]~19_combout & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) #
+// (\soc_inst|interconnect_1|HRDATA[1]~19_combout & ((\soc_inst|switches_1|DataValid [0]))))) # (\soc_inst|interconnect_1|HRDATA[1]~20_combout & (((!\soc_inst|interconnect_1|HRDATA[1]~19_combout )))) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][0]~q &
+// ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout & ( (!\soc_inst|interconnect_1|HRDATA[1]~20_combout & ((!\soc_inst|interconnect_1|HRDATA[1]~19_combout & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) #
+// (\soc_inst|interconnect_1|HRDATA[1]~19_combout & ((\soc_inst|switches_1|DataValid [0]))))) ) ) )
+
+ .dataa(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+ .datab(!\soc_inst|switches_1|DataValid [0]),
+ .datac(!\soc_inst|interconnect_1|HRDATA[1]~20_combout ),
+ .datad(!\soc_inst|interconnect_1|HRDATA[1]~19_combout ),
+ .datae(!\soc_inst|switches_1|switch_store[0][0]~q ),
+ .dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[0]~32_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[0]~32 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[0]~32 .lut_mask = 64'hA030AF30A03FAF3F;
+defparam \soc_inst|interconnect_1|HRDATA[0]~32 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y9_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qdnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qdnvx4~0_combout = ( \soc_inst|m0_1|u_logic|Yzi2z4~q & ( (\soc_inst|interconnect_1|HRDATA[0]~32_combout & \soc_inst|m0_1|u_logic|Vapvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Yzi2z4~q & (
+// (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) # ((\soc_inst|interconnect_1|HRDATA[0]~32_combout & \soc_inst|m0_1|u_logic|Vapvx4~combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|interconnect_1|HRDATA[0]~32_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qdnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qdnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qdnvx4~0 .lut_mask = 64'hAAAFAAAF000F000F;
+defparam \soc_inst|m0_1|u_logic|Qdnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y10_N54
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[16]~25 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[16]~25_combout = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q & ( (!\soc_inst|ram_1|byte_select [2]) # (!\soc_inst|m0_1|u_logic|O24wx4~0_combout ) )
+// ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q & ( (\soc_inst|ram_1|byte_select [2] & !\soc_inst|m0_1|u_logic|O24wx4~0_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|ram_1|byte_select [2]),
+ .datac(!\soc_inst|m0_1|u_logic|O24wx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout ),
+ .dataf(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|data_to_memory[16]~25_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[16]~25 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[16]~25 .lut_mask = 64'h000000003030FCFC;
+defparam \soc_inst|ram_1|data_to_memory[16]~25 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y8_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny3wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ny3wx4~1_combout = ( \soc_inst|m0_1|u_logic|Qr42z4~1_combout & ( \soc_inst|m0_1|u_logic|Eacwx4~9_combout & ( (!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout & (!\soc_inst|m0_1|u_logic|P12wx4~combout )) #
+// (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout & ((!\soc_inst|m0_1|u_logic|Zhyvx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Qr42z4~1_combout & ( !\soc_inst|m0_1|u_logic|Eacwx4~9_combout & ( (!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout &
+// (!\soc_inst|m0_1|u_logic|P12wx4~combout )) # (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout & ((!\soc_inst|m0_1|u_logic|Zhyvx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qr42z4~1_combout & ( !\soc_inst|m0_1|u_logic|Eacwx4~9_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|P12wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Eacwx4~9_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ny3wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~1 .lut_mask = 64'hFFFFF5A00000F5A0;
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X26_Y4_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 (
+ .portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|ram_1|data_to_memory[24]~26_combout ,\soc_inst|ram_1|data_to_memory[16]~25_combout }),
+ .portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+ .portabyteenamasks(1'b1),
+ .portbdatain(2'b00),
+ .portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_first_bit_number = 16;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_first_bit_number = 16;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002E38E3802A23E655014404031284B128485485485485485485485401400000000000000A87D000000000000000000000000";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y8_N57
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[24]~26 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[24]~26_combout = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24 & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & ((!\soc_inst|ram_1|byte_select [3]) # ((\soc_inst|m0_1|u_logic|Y9t2z4~q &
+// \soc_inst|m0_1|u_logic|Ny3wx4~1_combout )))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24 & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Y9t2z4~q & (\soc_inst|ram_1|byte_select [3] &
+// \soc_inst|m0_1|u_logic|Ny3wx4~1_combout ))) ) )
+
+ .dataa(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+ .datac(!\soc_inst|ram_1|byte_select [3]),
+ .datad(!\soc_inst|m0_1|u_logic|Ny3wx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24 ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|data_to_memory[24]~26_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[24]~26 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[24]~26 .lut_mask = 64'h0001000150515051;
+defparam \soc_inst|ram_1|data_to_memory[24]~26 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y9_N8
+dffeas \soc_inst|switches_1|switch_store[1][0] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\SW[0]~input_o ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|switches_1|always0~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|switches_1|switch_store[1][0]~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[1][0] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[1][0] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y9_N6
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[16]~30 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[16]~30_combout = ( \soc_inst|interconnect_1|Equal1~0_combout & ( (!\soc_inst|interconnect_1|HRDATA[20]~7_combout & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[20]~7_combout &
+// ((\soc_inst|switches_1|switch_store[1][0]~q ))) ) ) # ( !\soc_inst|interconnect_1|Equal1~0_combout & ( (!\soc_inst|interconnect_1|HRDATA[20]~7_combout & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[20]~7_combout
+// & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout ))) ) )
+
+ .dataa(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
+ .datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+ .datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout ),
+ .datad(!\soc_inst|switches_1|switch_store[1][0]~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|Equal1~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[16]~30_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[16]~30 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[16]~30 .lut_mask = 64'h8D8D8D8D88DD88DD;
+defparam \soc_inst|interconnect_1|HRDATA[16]~30 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y9_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qqhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qqhvx4~0_combout = ( !\soc_inst|interconnect_1|HRDATA[16]~30_combout & ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout ) ) # ( \soc_inst|interconnect_1|HRDATA[16]~30_combout & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) ) # (
+// !\soc_inst|interconnect_1|HRDATA[16]~30_combout & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|interconnect_1|HRDATA[16]~30_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qqhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qqhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qqhvx4~0 .lut_mask = 64'hFFFFFFFFFFFF0000;
+defparam \soc_inst|m0_1|u_logic|Qqhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y9_N32
+dffeas \soc_inst|m0_1|u_logic|Ydw2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qqhvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ydw2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ydw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ydw2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y9_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qdnvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qdnvx4~1_combout = ( \soc_inst|m0_1|u_logic|Wfovx4~combout & ( (!\soc_inst|m0_1|u_logic|Kyi2z4~q ) # ((\soc_inst|m0_1|u_logic|Pfovx4~0_combout & !\soc_inst|m0_1|u_logic|Ydw2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Wfovx4~combout
+// & ( (\soc_inst|m0_1|u_logic|Pfovx4~0_combout & !\soc_inst|m0_1|u_logic|Ydw2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Kyi2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ydw2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qdnvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qdnvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qdnvx4~1 .lut_mask = 64'h33003300F3F0F3F0;
+defparam \soc_inst|m0_1|u_logic|Qdnvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y9_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qdnvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qdnvx4~2_combout = ( \soc_inst|interconnect_1|HRDATA[16]~30_combout & ( !\soc_inst|m0_1|u_logic|Qdnvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Qdnvx4~0_combout & !\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) ) ) ) # (
+// !\soc_inst|interconnect_1|HRDATA[16]~30_combout & ( !\soc_inst|m0_1|u_logic|Qdnvx4~1_combout & ( !\soc_inst|m0_1|u_logic|Qdnvx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qdnvx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|interconnect_1|HRDATA[16]~30_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qdnvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qdnvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qdnvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qdnvx4~2 .lut_mask = 64'hAAAAA0A000000000;
+defparam \soc_inst|m0_1|u_logic|Qdnvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y9_N19
+dffeas \soc_inst|m0_1|u_logic|Yzi2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Qdnvx4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yzi2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yzi2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y3_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A2iwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|A2iwx4~0_combout = ( \soc_inst|m0_1|u_logic|V2iwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|J3iwx4~0_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|V2iwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|J3iwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|J3iwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|V2iwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|A2iwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|A2iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A2iwx4~0 .lut_mask = 64'h0A0A0A0AFF0AFF0A;
+defparam \soc_inst|m0_1|u_logic|A2iwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y7_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A2iwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|A2iwx4~1_combout = ( !\soc_inst|m0_1|u_logic|A2iwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Fbfwx4~1_combout & ((\soc_inst|m0_1|u_logic|E4iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yzi2z4~q ))) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fbfwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|E4iwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|A2iwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|A2iwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|A2iwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A2iwx4~1 .lut_mask = 64'h030F030F00000000;
+defparam \soc_inst|m0_1|u_logic|A2iwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y7_N17
+dffeas \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|A2iwx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y7_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mvc2z4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mvc2z4~combout = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Rni2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mvc2z4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mvc2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mvc2z4 .lut_mask = 64'hAA00000000000000;
+defparam \soc_inst|m0_1|u_logic|Mvc2z4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y7_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kuc2z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kuc2z4~1_combout = ( \soc_inst|m0_1|u_logic|Awc2z4~1_combout & ( !\soc_inst|m0_1|u_logic|Mvc2z4~combout & ( (!\soc_inst|m0_1|u_logic|Cxc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Kuc2z4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Vwc2z4~0_combout & \soc_inst|m0_1|u_logic|Awc2z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Awc2z4~1_combout & ( !\soc_inst|m0_1|u_logic|Mvc2z4~combout & ( (!\soc_inst|m0_1|u_logic|Cxc2z4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Kuc2z4~0_combout & !\soc_inst|m0_1|u_logic|Vwc2z4~0_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Cxc2z4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Kuc2z4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Vwc2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Awc2z4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Awc2z4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mvc2z4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kuc2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kuc2z4~1 .lut_mask = 64'h8080008000000000;
+defparam \soc_inst|m0_1|u_logic|Kuc2z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y11_N2
+dffeas \soc_inst|m0_1|u_logic|Qa43z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Qa43z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qa43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qa43z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y11_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qp62z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qp62z4~0_combout = ( !\soc_inst|m0_1|u_logic|Rni2z4~q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Qa43z4~q )) #
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Zj53z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qa43z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Zj53z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qp62z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qp62z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qp62z4~0 .lut_mask = 64'h0000000022300000;
+defparam \soc_inst|m0_1|u_logic|Qp62z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X37_Y8_N37
+dffeas \soc_inst|m0_1|u_logic|H133z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|H133z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H133z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H133z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qp62z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qp62z4~1_combout = ( !\soc_inst|m0_1|u_logic|Rni2z4~q & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Yr13z4~q )) #
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|H133z4~DUPLICATE_q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yr13z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|H133z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qp62z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qp62z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qp62z4~1 .lut_mask = 64'h0D08000000000000;
+defparam \soc_inst|m0_1|u_logic|Qp62z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qp62z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qp62z4~2_combout = ( !\soc_inst|m0_1|u_logic|Wzy2z4~q & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Lq03z4~q )) #
+// (\soc_inst|m0_1|u_logic|Fgm2z4~q & ((!\soc_inst|m0_1|u_logic|Rtz2z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Lq03z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rtz2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qp62z4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qp62z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qp62z4~2 .lut_mask = 64'h00000000D0800000;
+defparam \soc_inst|m0_1|u_logic|Qp62z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nr62z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nr62z4~0_combout = ( !\soc_inst|m0_1|u_logic|Rni2z4~q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q & (!\soc_inst|m0_1|u_logic|Ytm2z4~q & (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ytm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nr62z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nr62z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nr62z4~0 .lut_mask = 64'h0008000000000000;
+defparam \soc_inst|m0_1|u_logic|Nr62z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y11_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qp62z4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qp62z4~3_combout = ( !\soc_inst|m0_1|u_logic|Qp62z4~2_combout & ( !\soc_inst|m0_1|u_logic|Nr62z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Qp62z4~0_combout & (!\soc_inst|m0_1|u_logic|Qp62z4~1_combout &
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mvm2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qp62z4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Mvm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qp62z4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Qp62z4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Nr62z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qp62z4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qp62z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qp62z4~3 .lut_mask = 64'hA200000000000000;
+defparam \soc_inst|m0_1|u_logic|Qp62z4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y9_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Euzvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Euzvx4~0_combout = ( \soc_inst|m0_1|u_logic|Svqwx4~combout & ( \soc_inst|m0_1|u_logic|Qp62z4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Efp2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & !\soc_inst|m0_1|u_logic|U593z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svqwx4~combout & ( \soc_inst|m0_1|u_logic|Qp62z4~3_combout & (
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Efp2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((!\soc_inst|m0_1|u_logic|U593z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Svqwx4~combout & ( !\soc_inst|m0_1|u_logic|Qp62z4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Efp2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((!\soc_inst|m0_1|u_logic|U593z4~q )
+// # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svqwx4~combout & ( !\soc_inst|m0_1|u_logic|Qp62z4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Efp2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((!\soc_inst|m0_1|u_logic|U593z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Efp2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|U593z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Svqwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qp62z4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Euzvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Euzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Euzvx4~0 .lut_mask = 64'hAAF3AAF3AAF3AAC0;
+defparam \soc_inst|m0_1|u_logic|Euzvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y5_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hszvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hszvx4~combout = ( \soc_inst|m0_1|u_logic|Add3~53_sumout & ( \soc_inst|m0_1|u_logic|Add5~37_sumout & ( (((\soc_inst|m0_1|u_logic|Euzvx4~0_combout & \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) #
+// (\soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~53_sumout & ( \soc_inst|m0_1|u_logic|Add5~37_sumout & ( ((\soc_inst|m0_1|u_logic|Euzvx4~0_combout &
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~53_sumout & ( !\soc_inst|m0_1|u_logic|Add5~37_sumout & ( ((\soc_inst|m0_1|u_logic|Euzvx4~0_combout &
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~53_sumout & ( !\soc_inst|m0_1|u_logic|Add5~37_sumout & ( (\soc_inst|m0_1|u_logic|Euzvx4~0_combout &
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Euzvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Add3~53_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~37_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hszvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hszvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hszvx4 .lut_mask = 64'h003355770F3F5F7F;
+defparam \soc_inst|m0_1|u_logic|Hszvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y5_N31
+dffeas \soc_inst|ram_1|saved_word_address[4] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Hszvx4~combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|ram_1|always1~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|ram_1|saved_word_address [4]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|saved_word_address[4] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[4] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y5_N27
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[4]~4 (
+// Equation(s):
+// \soc_inst|ram_1|memory.raddr_a[4]~4_combout = ( \soc_inst|m0_1|u_logic|Hszvx4~combout & ( \soc_inst|ram_1|always1~0_combout & ( (!\soc_inst|ram_1|write_cycle~q ) # (\soc_inst|ram_1|saved_word_address [4]) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Hszvx4~combout & ( \soc_inst|ram_1|always1~0_combout & ( (\soc_inst|ram_1|saved_word_address [4] & \soc_inst|ram_1|write_cycle~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Hszvx4~combout & ( !\soc_inst|ram_1|always1~0_combout & (
+// \soc_inst|ram_1|saved_word_address [4] ) ) ) # ( !\soc_inst|m0_1|u_logic|Hszvx4~combout & ( !\soc_inst|ram_1|always1~0_combout & ( \soc_inst|ram_1|saved_word_address [4] ) ) )
+
+ .dataa(!\soc_inst|ram_1|saved_word_address [4]),
+ .datab(!\soc_inst|ram_1|write_cycle~q ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Hszvx4~combout ),
+ .dataf(!\soc_inst|ram_1|always1~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|memory.raddr_a[4]~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory.raddr_a[4]~4 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[4]~4 .lut_mask = 64'h555555551111DDDD;
+defparam \soc_inst|ram_1|memory.raddr_a[4]~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y10_N9
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[20]~16 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[20]~16_combout = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 & ( \soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & !\soc_inst|ram_1|byte_select [2]) ) ) ) # (
+// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 & ( !\soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q ) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 & (
+// !\soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & \soc_inst|ram_1|byte_select [2]) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .datac(!\soc_inst|ram_1|byte_select [2]),
+ .datad(gnd),
+ .datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 ),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|data_to_memory[20]~16_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[20]~16 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[20]~16 .lut_mask = 64'h0303333300003030;
+defparam \soc_inst|ram_1|data_to_memory[20]~16 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X14_Y4_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 (
+ .portawe(\soc_inst|ram_1|write_cycle~q ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|ram_1|data_to_memory[20]~16_combout ,\soc_inst|ram_1|data_to_memory[4]~15_combout }),
+ .portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+ .portabyteenamasks(1'b1),
+ .portbdatain(2'b00),
+ .portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_first_bit_number = 4;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_first_bit_number = 4;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001DAD96D5546F162857A17955294AD6BDD9619619619619219219214A1555555555555553240400505005555555500001540";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y8_N54
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[4]~15 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[4]~15_combout = ( \soc_inst|m0_1|u_logic|hwdata_o [4] & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout ) # (\soc_inst|ram_1|byte_select [0]))) ) ) # (
+// !\soc_inst|m0_1|u_logic|hwdata_o [4] & ( (!\soc_inst|ram_1|byte_select [0] & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout & \soc_inst|ram_1|write_cycle~DUPLICATE_q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|ram_1|byte_select [0]),
+ .datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout ),
+ .datad(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|hwdata_o [4]),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|data_to_memory[4]~15_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[4]~15 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[4]~15 .lut_mask = 64'h000C003F000C003F;
+defparam \soc_inst|ram_1|data_to_memory[4]~15 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y9_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ophvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ophvx4~0_combout = ( \soc_inst|switches_1|switch_store[1][4]~q & ( (!\soc_inst|interconnect_1|HRDATA[20]~7_combout ) # ((!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) # ((!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 &
+// !\soc_inst|interconnect_1|Equal1~0_combout ))) ) ) # ( !\soc_inst|switches_1|switch_store[1][4]~q & ( (!\soc_inst|interconnect_1|HRDATA[20]~7_combout ) # ((!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) #
+// ((!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 ) # (\soc_inst|interconnect_1|Equal1~0_combout ))) ) )
+
+ .dataa(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+ .datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 ),
+ .datad(!\soc_inst|interconnect_1|Equal1~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|switches_1|switch_store[1][4]~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ophvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ophvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ophvx4~0 .lut_mask = 64'hFEFFFEFFFEEEFEEE;
+defparam \soc_inst|m0_1|u_logic|Ophvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y9_N31
+dffeas \soc_inst|m0_1|u_logic|Ckw2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Ophvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ckw2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ckw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ckw2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y9_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pxrvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pxrvx4~0_combout = ( \soc_inst|interconnect_1|HRDATA[20]~7_combout & ( \soc_inst|m0_1|u_logic|Qbpvx4~0_combout & ( (!\soc_inst|interconnect_1|Equal1~0_combout & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 )) #
+// (\soc_inst|interconnect_1|Equal1~0_combout & ((\soc_inst|switches_1|switch_store[1][4]~q ))) ) ) )
+
+ .dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 ),
+ .datab(!\soc_inst|switches_1|switch_store[1][4]~q ),
+ .datac(!\soc_inst|interconnect_1|Equal1~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pxrvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pxrvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pxrvx4~0 .lut_mask = 64'h0000000000005353;
+defparam \soc_inst|m0_1|u_logic|Pxrvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y9_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X6nvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|X6nvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Pxrvx4~0_combout & ( (!\soc_inst|interconnect_1|HRDATA[4]~23_combout & (((\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Scpvx4~2_combout ))) #
+// (\soc_inst|interconnect_1|HRDATA[4]~23_combout & (!\soc_inst|m0_1|u_logic|Vapvx4~combout & ((\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Scpvx4~2_combout )))) ) )
+
+ .dataa(!\soc_inst|interconnect_1|HRDATA[4]~23_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pxrvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|X6nvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X6nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X6nvx4~0 .lut_mask = 64'h32FA32FA00000000;
+defparam \soc_inst|m0_1|u_logic|X6nvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y6_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X6nvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|X6nvx4~1_combout = ( \soc_inst|m0_1|u_logic|X6nvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ckw2z4~q & (!\soc_inst|m0_1|u_logic|Pfovx4~0_combout & ((!\soc_inst|m0_1|u_logic|Wfovx4~combout ) # (\soc_inst|m0_1|u_logic|Owq2z4~q ))))
+// # (\soc_inst|m0_1|u_logic|Ckw2z4~q & (((!\soc_inst|m0_1|u_logic|Wfovx4~combout )) # (\soc_inst|m0_1|u_logic|Owq2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ckw2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Owq2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|X6nvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|X6nvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X6nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X6nvx4~1 .lut_mask = 64'h00000000F351F351;
+defparam \soc_inst|m0_1|u_logic|X6nvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X30_Y6_N31
+dffeas \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|X6nvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y4_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ctrwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ctrwx4~0_combout = ( \soc_inst|m0_1|u_logic|Qslwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Nbm2z4~q & (\soc_inst|m0_1|u_logic|Gvrwx4~0_combout & !\soc_inst|m0_1|u_logic|F0y2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Qslwx4~0_combout
+// & ( (!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Nbm2z4~q & (\soc_inst|m0_1|u_logic|Gvrwx4~0_combout & !\soc_inst|m0_1|u_logic|F0y2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Gvrwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|F0y2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qslwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ctrwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ctrwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ctrwx4~0 .lut_mask = 64'hFF10FF1010101010;
+defparam \soc_inst|m0_1|u_logic|Ctrwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y8_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ctrwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ctrwx4~1_combout = ( \soc_inst|m0_1|u_logic|Dvy2z4~q & ( (!\soc_inst|m0_1|u_logic|Ctrwx4~0_combout & ((\soc_inst|m0_1|u_logic|Surwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Dvy2z4~q & ( (!\soc_inst|m0_1|u_logic|Ctrwx4~0_combout & (!\soc_inst|m0_1|u_logic|Dsqvx4~combout & ((\soc_inst|m0_1|u_logic|Surwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Surwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ctrwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Dsqvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ctrwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ctrwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ctrwx4~1 .lut_mask = 64'h7000700070707070;
+defparam \soc_inst|m0_1|u_logic|Ctrwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y8_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kghvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kghvx4~0_combout = ( \soc_inst|m0_1|u_logic|I6z2z4~q & ( \soc_inst|m0_1|u_logic|Qllwx4~4_combout & ( \soc_inst|m0_1|u_logic|Ctrwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|I6z2z4~q & ( \soc_inst|m0_1|u_logic|Qllwx4~4_combout
+// & ( (\soc_inst|m0_1|u_logic|Ctrwx4~1_combout & ((\soc_inst|m0_1|u_logic|Cllwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|I6z2z4~q & ( !\soc_inst|m0_1|u_logic|Qllwx4~4_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ctrwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Cllwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|I6z2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qllwx4~4_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kghvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kghvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kghvx4~0 .lut_mask = 64'h0000FFFF050F0F0F;
+defparam \soc_inst|m0_1|u_logic|Kghvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X36_Y8_N13
+dffeas \soc_inst|m0_1|u_logic|I6z2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Kghvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|I6z2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I6z2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I6z2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y8_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dghvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dghvx4~1_combout = ( \soc_inst|m0_1|u_logic|W7z2z4~q & ( \soc_inst|m0_1|u_logic|I6z2z4~q & ( (!\soc_inst|m0_1|u_logic|Dghvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Qllwx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|W7z2z4~q &
+// ( \soc_inst|m0_1|u_logic|I6z2z4~q & ( (!\soc_inst|m0_1|u_logic|Dghvx4~0_combout & (\soc_inst|m0_1|u_logic|Qllwx4~4_combout & ((\soc_inst|m0_1|u_logic|Cllwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Qtrwx4~0_combout )))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|W7z2z4~q & ( !\soc_inst|m0_1|u_logic|I6z2z4~q & ( (!\soc_inst|m0_1|u_logic|Dghvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Qllwx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|W7z2z4~q & ( !\soc_inst|m0_1|u_logic|I6z2z4~q & (
+// (\soc_inst|m0_1|u_logic|Cllwx4~0_combout & (!\soc_inst|m0_1|u_logic|Dghvx4~0_combout & \soc_inst|m0_1|u_logic|Qllwx4~4_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Cllwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Dghvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qllwx4~4_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|I6z2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dghvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dghvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dghvx4~1 .lut_mask = 64'h0030FFF00070FFF0;
+defparam \soc_inst|m0_1|u_logic|Dghvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X36_Y8_N44
+dffeas \soc_inst|m0_1|u_logic|W7z2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Dghvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|W7z2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W7z2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|W7z2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y7_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uz9wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uz9wx4~0_combout = ( \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Xwawx4~0_combout & !\soc_inst|m0_1|u_logic|W7z2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q & (
+// ((\soc_inst|m0_1|u_logic|Xwawx4~0_combout & !\soc_inst|m0_1|u_logic|W7z2z4~q )) # (\soc_inst|m0_1|u_logic|Y29wx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Uz9wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uz9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uz9wx4~0 .lut_mask = 64'h50FF50FF50505050;
+defparam \soc_inst|m0_1|u_logic|Uz9wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y8_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uz9wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uz9wx4~1_combout = ( \soc_inst|m0_1|u_logic|W19wx4~0_combout & ( \soc_inst|m0_1|u_logic|Uvzvx4~combout & ( (!\soc_inst|m0_1|u_logic|Uz9wx4~0_combout & ((!\soc_inst|m0_1|u_logic|D1awx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W19wx4~0_combout & ( \soc_inst|m0_1|u_logic|Uvzvx4~combout & ( (!\soc_inst|m0_1|u_logic|Uz9wx4~0_combout & ((!\soc_inst|m0_1|u_logic|D1awx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W19wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Uvzvx4~combout & ( (!\soc_inst|m0_1|u_logic|Uz9wx4~0_combout & ((!\soc_inst|m0_1|u_logic|D1awx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Uz9wx4~0_combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|D1awx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Uz9wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uz9wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uz9wx4~1 .lut_mask = 64'hCC440000CC44CC44;
+defparam \soc_inst|m0_1|u_logic|Uz9wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y13_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~37 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~37_sumout = SUM(( !\soc_inst|m0_1|u_logic|Cax2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~34 ))
+// \soc_inst|m0_1|u_logic|Add2~38 = CARRY(( !\soc_inst|m0_1|u_logic|Cax2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~34 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Cax2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add2~34 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add2~37_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add2~38 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~37 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~37 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~37 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~57 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~57_sumout = SUM(( !\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~38 ))
+// \soc_inst|m0_1|u_logic|Add2~58 = CARRY(( !\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~38 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add2~38 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add2~57_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add2~58 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~57 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~57 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~57 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y13_N22
+dffeas \soc_inst|m0_1|u_logic|Nbx2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Glhvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Nbx2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nbx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nbx2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y13_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Glhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Glhvx4~0_combout = ( \soc_inst|m0_1|u_logic|Nbx2z4~q & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout & (((!\soc_inst|m0_1|u_logic|Add2~57_sumout ) # (!\soc_inst|m0_1|u_logic|S5pvx4~combout )) #
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Nbx2z4~q & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout & (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Add2~57_sumout ) #
+// (!\soc_inst|m0_1|u_logic|S5pvx4~combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Add2~57_sumout ),
+ .datad(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nbx2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Glhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Glhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Glhvx4~0 .lut_mask = 64'h88808880AAA2AAA2;
+defparam \soc_inst|m0_1|u_logic|Glhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y13_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Glhvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Glhvx4~1_combout = ( \soc_inst|m0_1|u_logic|Xdfwx4~combout & ( \soc_inst|m0_1|u_logic|Zuzvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Add5~37_sumout & \soc_inst|m0_1|u_logic|Glhvx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Xdfwx4~combout & ( \soc_inst|m0_1|u_logic|Zuzvx4~1_combout & ( \soc_inst|m0_1|u_logic|Glhvx4~0_combout ) ) ) # ( \soc_inst|m0_1|u_logic|Xdfwx4~combout & ( !\soc_inst|m0_1|u_logic|Zuzvx4~1_combout & (
+// (!\soc_inst|m0_1|u_logic|Add5~37_sumout & (\soc_inst|m0_1|u_logic|Glhvx4~0_combout & !\soc_inst|m0_1|u_logic|H4nwx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xdfwx4~combout & ( !\soc_inst|m0_1|u_logic|Zuzvx4~1_combout & (
+// (\soc_inst|m0_1|u_logic|Glhvx4~0_combout & !\soc_inst|m0_1|u_logic|H4nwx4~combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Add5~37_sumout ),
+ .datab(!\soc_inst|m0_1|u_logic|Glhvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Zuzvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Glhvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Glhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Glhvx4~1 .lut_mask = 64'h3030202033332222;
+defparam \soc_inst|m0_1|u_logic|Glhvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y13_N23
+dffeas \soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Glhvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y10_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkhvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zkhvx4~1_combout = ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout & ( (((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & (\soc_inst|m0_1|u_logic|Add5~81_sumout )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Ycx2z4~q )))) # (\soc_inst|m0_1|u_logic|Lefwx4~0_combout )) ) ) # ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & (\soc_inst|m0_1|u_logic|Y8pvx4~0_combout &
+// (\soc_inst|m0_1|u_logic|Add2~53_sumout ))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & (((!\soc_inst|m0_1|u_logic|Ycx2z4~q ))))) # (\soc_inst|m0_1|u_logic|Lefwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Add2~53_sumout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ycx2z4~q ),
+ .datag(!\soc_inst|m0_1|u_logic|Add5~81_sumout ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zkhvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zkhvx4~1 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Zkhvx4~1 .lut_mask = 64'h5FFF57FF0AFF02FF;
+defparam \soc_inst|m0_1|u_logic|Zkhvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y13_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W4zvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|W4zvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout & ( \soc_inst|m0_1|u_logic|Amyvx4~2_combout & ( \soc_inst|m0_1|u_logic|Palwx4~0_combout ) ) ) # ( \soc_inst|m0_1|u_logic|Ykyvx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Amyvx4~2_combout & ( !\soc_inst|m0_1|u_logic|G9lwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Amyvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|G9lwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Palwx4~0_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|G9lwx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|W4zvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W4zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W4zvx4~0 .lut_mask = 64'hF3F3F0F033330000;
+defparam \soc_inst|m0_1|u_logic|W4zvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W4zvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|W4zvx4~1_combout = ( \soc_inst|m0_1|u_logic|U9lwx4~1_combout & ( \soc_inst|m0_1|u_logic|Walwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Omyvx4~1_combout & !\soc_inst|m0_1|u_logic|W4zvx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|U9lwx4~1_combout & ( \soc_inst|m0_1|u_logic|Walwx4~1_combout & ( !\soc_inst|m0_1|u_logic|W4zvx4~0_combout ) ) ) # ( \soc_inst|m0_1|u_logic|U9lwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Walwx4~1_combout & (
+// (!\soc_inst|m0_1|u_logic|Omyvx4~1_combout & (!\soc_inst|m0_1|u_logic|W4zvx4~0_combout & \soc_inst|m0_1|u_logic|Wjyvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|U9lwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Walwx4~1_combout & (
+// (!\soc_inst|m0_1|u_logic|W4zvx4~0_combout & \soc_inst|m0_1|u_logic|Wjyvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|W4zvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Walwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|W4zvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W4zvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W4zvx4~1 .lut_mask = 64'h0C0C0808CCCC8888;
+defparam \soc_inst|m0_1|u_logic|W4zvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y10_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zkhvx4~0_combout = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Zkhvx4~1_combout & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) #
+// (\soc_inst|m0_1|u_logic|W4zvx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Zkhvx4~1_combout & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) #
+// ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout & \soc_inst|m0_1|u_logic|W4zvx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Zkhvx4~1_combout &
+// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout & \soc_inst|m0_1|u_logic|W4zvx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Zkhvx4~1_combout & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout & \soc_inst|m0_1|u_logic|W4zvx4~1_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Zkhvx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|W4zvx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zkhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zkhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zkhvx4~0 .lut_mask = 64'h88A888A888A888AA;
+defparam \soc_inst|m0_1|u_logic|Zkhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y10_N1
+dffeas \soc_inst|m0_1|u_logic|Ycx2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Zkhvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ycx2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ycx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ycx2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y6_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z6ovx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z6ovx4~combout = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( \soc_inst|m0_1|u_logic|Add5~41_sumout & ( (((\soc_inst|m0_1|u_logic|Add3~45_sumout & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) #
+// (\soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|F32wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( \soc_inst|m0_1|u_logic|Add5~41_sumout & ( ((\soc_inst|m0_1|u_logic|Add3~45_sumout &
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( !\soc_inst|m0_1|u_logic|Add5~41_sumout & ( ((\soc_inst|m0_1|u_logic|Add3~45_sumout &
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|F32wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( !\soc_inst|m0_1|u_logic|Add5~41_sumout & ( (\soc_inst|m0_1|u_logic|Add3~45_sumout &
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Add3~45_sumout ),
+ .datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~41_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z6ovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z6ovx4 .lut_mask = 64'h11111F1F11FF1FFF;
+defparam \soc_inst|m0_1|u_logic|Z6ovx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y6_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nlovx4~3_combout = ( \soc_inst|m0_1|u_logic|Fvovx4~combout & ( \soc_inst|m0_1|u_logic|Owovx4~combout & ( !\soc_inst|m0_1|u_logic|Rxzvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Fvovx4~combout & (
+// \soc_inst|m0_1|u_logic|Owovx4~combout & ( (!\soc_inst|m0_1|u_logic|Rxzvx4~combout & (((!\soc_inst|m0_1|u_logic|Z6ovx4~combout ) # (!\soc_inst|m0_1|u_logic|Ekovx4~combout )))) # (\soc_inst|m0_1|u_logic|Rxzvx4~combout &
+// (!\soc_inst|m0_1|u_logic|Yuovx4~combout & ((!\soc_inst|m0_1|u_logic|Z6ovx4~combout ) # (!\soc_inst|m0_1|u_logic|Ekovx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fvovx4~combout & ( !\soc_inst|m0_1|u_logic|Owovx4~combout & (
+// !\soc_inst|m0_1|u_logic|Rxzvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Fvovx4~combout & ( !\soc_inst|m0_1|u_logic|Owovx4~combout & ( (!\soc_inst|m0_1|u_logic|Rxzvx4~combout & ((!\soc_inst|m0_1|u_logic|Z6ovx4~combout ) #
+// (!\soc_inst|m0_1|u_logic|Ekovx4~combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rxzvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Yuovx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ekovx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Fvovx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Owovx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nlovx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nlovx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~3 .lut_mask = 64'hAAA0AAAAEEE0AAAA;
+defparam \soc_inst|m0_1|u_logic|Nlovx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y5_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nlovx4~1_combout = ( \soc_inst|m0_1|u_logic|haddr_o~3_combout & ( (!\soc_inst|m0_1|u_logic|Vpovx4~combout & (!\soc_inst|m0_1|u_logic|hsize_o~0_combout & !\soc_inst|m0_1|u_logic|Hszvx4~combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Vpovx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|hsize_o~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hszvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|haddr_o~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nlovx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nlovx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~1 .lut_mask = 64'h00000000C000C000;
+defparam \soc_inst|m0_1|u_logic|Nlovx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y5_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nlovx4~2_combout = ( !\soc_inst|m0_1|u_logic|Ug0wx4~combout & ( (!\soc_inst|m0_1|u_logic|Ql0wx4~combout & (\soc_inst|m0_1|u_logic|Nlovx4~1_combout & !\soc_inst|m0_1|u_logic|Fq0wx4~combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ql0wx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Nlovx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fq0wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ug0wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nlovx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nlovx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~2 .lut_mask = 64'h0A000A0000000000;
+defparam \soc_inst|m0_1|u_logic|Nlovx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y5_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nlovx4~4_combout = ( \soc_inst|m0_1|u_logic|Nlovx4~2_combout & ( (\soc_inst|m0_1|u_logic|Nlovx4~3_combout & (\soc_inst|m0_1|u_logic|Y92wx4~combout & \soc_inst|m0_1|u_logic|haddr_o~5_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Nlovx4~3_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Y92wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|haddr_o~5_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nlovx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nlovx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nlovx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~4 .lut_mask = 64'h0000000000030003;
+defparam \soc_inst|m0_1|u_logic|Nlovx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y5_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nlovx4~6_combout = ( \soc_inst|m0_1|u_logic|Y1pvx4~combout & ( \soc_inst|m0_1|u_logic|C70wx4~combout & ( (!\soc_inst|m0_1|u_logic|Cqovx4~combout & (\soc_inst|m0_1|u_logic|haddr_o~4_combout &
+// \soc_inst|m0_1|u_logic|Fc0wx4~combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Cqovx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|haddr_o~4_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fc0wx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Y1pvx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|C70wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nlovx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nlovx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~6 .lut_mask = 64'h000000000000000A;
+defparam \soc_inst|m0_1|u_logic|Nlovx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y6_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nlovx4~5_combout = ( \soc_inst|m0_1|u_logic|Jxovx4~combout & ( \soc_inst|m0_1|u_logic|Z6ovx4~combout & ( !\soc_inst|m0_1|u_logic|Xxovx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Jxovx4~combout & (
+// \soc_inst|m0_1|u_logic|Z6ovx4~combout & ( !\soc_inst|m0_1|u_logic|Xxovx4~combout ) ) ) # ( \soc_inst|m0_1|u_logic|Jxovx4~combout & ( !\soc_inst|m0_1|u_logic|Z6ovx4~combout & ( (!\soc_inst|m0_1|u_logic|Xxovx4~combout &
+// ((!\soc_inst|m0_1|u_logic|S4qvx4~combout ))) # (\soc_inst|m0_1|u_logic|Xxovx4~combout & (!\soc_inst|m0_1|u_logic|Ekovx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jxovx4~combout & ( !\soc_inst|m0_1|u_logic|Z6ovx4~combout & (
+// (!\soc_inst|m0_1|u_logic|Xxovx4~combout & (!\soc_inst|m0_1|u_logic|S4qvx4~combout & ((\soc_inst|m0_1|u_logic|Yuovx4~combout ) # (\soc_inst|m0_1|u_logic|Ekovx4~combout )))) # (\soc_inst|m0_1|u_logic|Xxovx4~combout &
+// (!\soc_inst|m0_1|u_logic|Ekovx4~combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Xxovx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ekovx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|S4qvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Yuovx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Jxovx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nlovx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nlovx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~5 .lut_mask = 64'h64E4E4E4AAAAAAAA;
+defparam \soc_inst|m0_1|u_logic|Nlovx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y6_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~8 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nlovx4~8_combout = ( !\soc_inst|m0_1|u_logic|Jxovx4~combout & ( (!\soc_inst|m0_1|u_logic|Owovx4~combout & ((!\soc_inst|m0_1|u_logic|Fvovx4~combout & ((!\soc_inst|m0_1|u_logic|Yuovx4~combout ) #
+// ((!\soc_inst|m0_1|u_logic|Xxovx4~combout & !\soc_inst|m0_1|u_logic|Z6ovx4~combout )))) # (\soc_inst|m0_1|u_logic|Fvovx4~combout & (!\soc_inst|m0_1|u_logic|Xxovx4~combout & ((!\soc_inst|m0_1|u_logic|Z6ovx4~combout )))))) ) ) # (
+// \soc_inst|m0_1|u_logic|Jxovx4~combout & ( ((!\soc_inst|m0_1|u_logic|Xxovx4~combout & ((!\soc_inst|m0_1|u_logic|Owovx4~combout & ((!\soc_inst|m0_1|u_logic|Z6ovx4~combout ))) # (\soc_inst|m0_1|u_logic|Owovx4~combout &
+// (!\soc_inst|m0_1|u_logic|S4qvx4~combout & \soc_inst|m0_1|u_logic|Z6ovx4~combout ))))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fvovx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Xxovx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|S4qvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Owovx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Jxovx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
+ .datag(!\soc_inst|m0_1|u_logic|Yuovx4~combout ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nlovx4~8_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nlovx4~8 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~8 .lut_mask = 64'hEC00CC00A00000C0;
+defparam \soc_inst|m0_1|u_logic|Nlovx4~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y5_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nlovx4~0_combout = ( \soc_inst|m0_1|u_logic|Vezvx4~combout & ( (!\soc_inst|m0_1|u_logic|Bv0wx4~combout & (\soc_inst|m0_1|u_logic|Nlovx4~8_combout & \soc_inst|m0_1|u_logic|Nhzvx4~combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bv0wx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Nlovx4~8_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Nhzvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Vezvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nlovx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nlovx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~0 .lut_mask = 64'h00000000000A000A;
+defparam \soc_inst|m0_1|u_logic|Nlovx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y5_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nlovx4~7_combout = ( \soc_inst|m0_1|u_logic|Nlovx4~0_combout & ( \soc_inst|m0_1|u_logic|Rnovx4~combout & ( (\soc_inst|m0_1|u_logic|Nlovx4~4_combout & (\soc_inst|m0_1|u_logic|Nlovx4~6_combout &
+// \soc_inst|m0_1|u_logic|Nlovx4~5_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nlovx4~4_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Nlovx4~6_combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Nlovx4~5_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Nlovx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rnovx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nlovx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nlovx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~7 .lut_mask = 64'h0000000000000011;
+defparam \soc_inst|m0_1|u_logic|Nlovx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y5_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jknvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jknvx4~0_combout = ( \soc_inst|m0_1|u_logic|Nlovx4~7_combout & ( (!\soc_inst|m0_1|u_logic|S6ovx4~3_combout & (!\soc_inst|interconnect_1|HREADY~0_combout & ((\soc_inst|m0_1|u_logic|Lz93z4~q )))) #
+// (\soc_inst|m0_1|u_logic|S6ovx4~3_combout & ((!\soc_inst|m0_1|u_logic|Yuovx4~combout ) # ((!\soc_inst|interconnect_1|HREADY~0_combout & \soc_inst|m0_1|u_logic|Lz93z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Nlovx4~7_combout & (
+// ((!\soc_inst|interconnect_1|HREADY~0_combout & \soc_inst|m0_1|u_logic|Lz93z4~q )) # (\soc_inst|m0_1|u_logic|S6ovx4~3_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
+ .datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Yuovx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nlovx4~7_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jknvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jknvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jknvx4~0 .lut_mask = 64'h55DD55DD50DC50DC;
+defparam \soc_inst|m0_1|u_logic|Jknvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X17_Y5_N25
+dffeas \soc_inst|m0_1|u_logic|Lz93z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Jknvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Lz93z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lz93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lz93z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y12_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N1uvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N1uvx4~combout = ( !\soc_inst|m0_1|u_logic|J6i2z4~q & ( (\soc_inst|m0_1|u_logic|Lz93z4~q & (!\soc_inst|m0_1|u_logic|Kop2z4~q & (\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Mjl2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N1uvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N1uvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N1uvx4 .lut_mask = 64'h0004000400000000;
+defparam \soc_inst|m0_1|u_logic|N1uvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y12_N2
+dffeas \soc_inst|m0_1|u_logic|H8l2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|H8l2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H8l2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H8l2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y12_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S9ywx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S9ywx4~0_combout = ( \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|T2owx4~0_combout & ( (\soc_inst|m0_1|u_logic|Mjl2z4~q & !\soc_inst|m0_1|u_logic|Lz93z4~q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|T2owx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Mjl2z4~q & (((\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Lz93z4~q ))) # (\soc_inst|m0_1|u_logic|Mjl2z4~q &
+// (\soc_inst|m0_1|u_logic|Lz93z4~q & ((\soc_inst|m0_1|u_logic|Cps2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Cps2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|T2owx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S9ywx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S9ywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S9ywx4~0 .lut_mask = 64'h000000002A3B4444;
+defparam \soc_inst|m0_1|u_logic|S9ywx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S9ywx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S9ywx4~1_combout = ( \soc_inst|m0_1|u_logic|E0uvx4~combout & ( (!\soc_inst|m0_1|u_logic|Azs2z4~q & (!\soc_inst|m0_1|u_logic|S9ywx4~0_combout & ((!\soc_inst|m0_1|u_logic|Qrp2z4~q ) # (!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ))))
+// ) ) # ( !\soc_inst|m0_1|u_logic|E0uvx4~combout & ( (!\soc_inst|m0_1|u_logic|S9ywx4~0_combout & ((!\soc_inst|m0_1|u_logic|Qrp2z4~q ) # (!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qrp2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Azs2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|S9ywx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S9ywx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S9ywx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S9ywx4~1 .lut_mask = 64'hEE00EE00E000E000;
+defparam \soc_inst|m0_1|u_logic|S9ywx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y12_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S9ywx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S9ywx4~2_combout = ( \soc_inst|m0_1|u_logic|Wfuwx4~combout & ( \soc_inst|m0_1|u_logic|S9ywx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Ywi2z4~q & ((!\soc_inst|m0_1|u_logic|H8l2z4~q ) # (!\soc_inst|m0_1|u_logic|K7pwx4~combout ))) )
+// ) ) # ( !\soc_inst|m0_1|u_logic|Wfuwx4~combout & ( \soc_inst|m0_1|u_logic|S9ywx4~1_combout & ( (!\soc_inst|m0_1|u_logic|H8l2z4~q ) # (!\soc_inst|m0_1|u_logic|K7pwx4~combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H8l2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ywi2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|S9ywx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S9ywx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S9ywx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S9ywx4~2 .lut_mask = 64'h00000000FAFAC8C8;
+defparam \soc_inst|m0_1|u_logic|S9ywx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Otxwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Otxwx4~0_combout = ( \soc_inst|m0_1|u_logic|S9ywx4~2_combout & ( (\soc_inst|m0_1|u_logic|N1uvx4~combout & (\soc_inst|m0_1|u_logic|Lstwx4~0_combout & \soc_inst|m0_1|u_logic|Bjd3z4~q )) ) ) # (
+// !\soc_inst|m0_1|u_logic|S9ywx4~2_combout & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Bjd3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|S9ywx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Otxwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Otxwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Otxwx4~0 .lut_mask = 64'h0F0F0F0F00030003;
+defparam \soc_inst|m0_1|u_logic|Otxwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Palwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Palwx4~0_combout = ( \soc_inst|m0_1|u_logic|B7owx4~combout & ( (((!\soc_inst|m0_1|u_logic|Hr7wx4~0_combout & \soc_inst|m0_1|u_logic|Lcowx4~0_combout )) # (\soc_inst|interconnect_1|HRDATA[31]~2_combout )) #
+// (\soc_inst|m0_1|u_logic|Otxwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|B7owx4~combout & ( ((!\soc_inst|m0_1|u_logic|Hr7wx4~0_combout & \soc_inst|m0_1|u_logic|Lcowx4~0_combout )) # (\soc_inst|m0_1|u_logic|Otxwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Otxwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Hr7wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+ .datad(!\soc_inst|interconnect_1|HRDATA[31]~2_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Palwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Palwx4~0 .lut_mask = 64'h5D5D5D5D5DFF5DFF;
+defparam \soc_inst|m0_1|u_logic|Palwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y13_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kswwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kswwx4~0_combout = ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Fij2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kswwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kswwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kswwx4~0 .lut_mask = 64'h00000000000F000F;
+defparam \soc_inst|m0_1|u_logic|Kswwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y13_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ttwwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ttwwx4~0_combout = ( \soc_inst|m0_1|u_logic|Npk2z4~q & ( ((!\soc_inst|m0_1|u_logic|Wxp2z4~q & (!\soc_inst|m0_1|u_logic|C3w2z4~q & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Aok2z4~q ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Npk2z4~q & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & (((!\soc_inst|m0_1|u_logic|Wxp2z4~q & !\soc_inst|m0_1|u_logic|C3w2z4~q )) # (\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|C3w2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ttwwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ttwwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ttwwx4~0 .lut_mask = 64'h8F008F0F8F008F0F;
+defparam \soc_inst|m0_1|u_logic|Ttwwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y13_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B8nwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|B8nwx4~0_combout = ( \soc_inst|m0_1|u_logic|G9lwx4~0_combout & ( !\soc_inst|m0_1|u_logic|U2ewx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|G9lwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout &
+// !\soc_inst|m0_1|u_logic|Ttwwx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ttwwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|G9lwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|B8nwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B8nwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B8nwx4~0 .lut_mask = 64'hF000F000F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|B8nwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y13_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B8nwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|B8nwx4~1_combout = ( \soc_inst|m0_1|u_logic|U9lwx4~1_combout & ( \soc_inst|m0_1|u_logic|B8nwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Kswwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Sknwx4~0_combout ) #
+// ((!\soc_inst|m0_1|u_logic|Palwx4~0_combout & \soc_inst|m0_1|u_logic|Wxp2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U9lwx4~1_combout & ( \soc_inst|m0_1|u_logic|B8nwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Palwx4~0_combout ) #
+// ((!\soc_inst|m0_1|u_logic|Sknwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wxp2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Sknwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Kswwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|B8nwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B8nwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B8nwx4~1 .lut_mask = 64'h00000000FEFECE00;
+defparam \soc_inst|m0_1|u_logic|B8nwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y14_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aihvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Aihvx4~2_combout = ( \soc_inst|m0_1|u_logic|Qfzvx4~1_combout & ( \soc_inst|m0_1|u_logic|H4nwx4~combout & ( (!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout & !\soc_inst|m0_1|u_logic|R7iwx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Qfzvx4~1_combout & ( \soc_inst|m0_1|u_logic|H4nwx4~combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Qfzvx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Aihvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Aihvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aihvx4~2 .lut_mask = 64'h00000000FFFFA0A0;
+defparam \soc_inst|m0_1|u_logic|Aihvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y14_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aihvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Aihvx4~1_combout = ( \soc_inst|m0_1|u_logic|Xsx2z4~q & ( \soc_inst|m0_1|u_logic|Add5~89_sumout & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout & ((!\soc_inst|m0_1|u_logic|Add2~21_sumout ) # ((!\soc_inst|m0_1|u_logic|S5pvx4~combout )
+// # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xsx2z4~q & ( \soc_inst|m0_1|u_logic|Add5~89_sumout & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & (!\soc_inst|m0_1|u_logic|Xdfwx4~combout &
+// ((!\soc_inst|m0_1|u_logic|Add2~21_sumout ) # (!\soc_inst|m0_1|u_logic|S5pvx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Xsx2z4~q & ( !\soc_inst|m0_1|u_logic|Add5~89_sumout & ( (!\soc_inst|m0_1|u_logic|Add2~21_sumout ) #
+// ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xsx2z4~q & ( !\soc_inst|m0_1|u_logic|Add5~89_sumout & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Add2~21_sumout ) # (!\soc_inst|m0_1|u_logic|S5pvx4~combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Add2~21_sumout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Xsx2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~89_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Aihvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Aihvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aihvx4~1 .lut_mask = 64'hC8C8FBFBC800FB00;
+defparam \soc_inst|m0_1|u_logic|Aihvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aihvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Aihvx4~0_combout = ( \soc_inst|m0_1|u_logic|Aihvx4~1_combout & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Aihvx4~2_combout ) #
+// ((\soc_inst|m0_1|u_logic|B8nwx4~1_combout & \soc_inst|m0_1|u_logic|Qfzvx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Aihvx4~1_combout & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout &
+// !\soc_inst|m0_1|u_logic|Aihvx4~2_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qfzvx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Aihvx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Aihvx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Aihvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Aihvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aihvx4~0 .lut_mask = 64'h0000F0000000F010;
+defparam \soc_inst|m0_1|u_logic|Aihvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X37_Y14_N56
+dffeas \soc_inst|m0_1|u_logic|Xsx2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Aihvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Xsx2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xsx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xsx2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y5_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~13 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~13_sumout = SUM(( !\soc_inst|m0_1|u_logic|Jux2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~18 ))
+// \soc_inst|m0_1|u_logic|Add3~14 = CARRY(( !\soc_inst|m0_1|u_logic|Jux2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~18 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Jux2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add3~18 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add3~13_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add3~14 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add3~13 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~13 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~13 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y5_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V2qvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|V2qvx4~combout = ( \soc_inst|m0_1|u_logic|Mrsvx4~4_combout & ( \soc_inst|m0_1|u_logic|Add5~85_sumout & ( (!\soc_inst|m0_1|u_logic|Add3~13_sumout & (!\soc_inst|m0_1|u_logic|K1wvx4~combout &
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Esnvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout & ( \soc_inst|m0_1|u_logic|Add5~85_sumout & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout &
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Esnvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mrsvx4~4_combout & ( !\soc_inst|m0_1|u_logic|Add5~85_sumout & ( (!\soc_inst|m0_1|u_logic|Add3~13_sumout &
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Esnvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout & ( !\soc_inst|m0_1|u_logic|Add5~85_sumout & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) #
+// (\soc_inst|m0_1|u_logic|Esnvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Add3~13_sumout ),
+ .datab(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Esnvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~85_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|V2qvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V2qvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V2qvx4 .lut_mask = 64'hF0FFA0AAC0CC8088;
+defparam \soc_inst|m0_1|u_logic|V2qvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y5_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Khnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Khnvx4~0_combout = ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout & ( (\soc_inst|m0_1|u_logic|P0pvx4~0_combout & \soc_inst|m0_1|u_logic|Idk2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout & ( (!\soc_inst|m0_1|u_logic|Ohh3z4~q
+// ) # ((\soc_inst|m0_1|u_logic|P0pvx4~0_combout & \soc_inst|m0_1|u_logic|Idk2z4~q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ohh3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Idk2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Khnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Khnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Khnvx4~0 .lut_mask = 64'hF0F3F0F300330033;
+defparam \soc_inst|m0_1|u_logic|Khnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y4_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Khnvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Khnvx4~1_combout = ( \soc_inst|m0_1|u_logic|V2qvx4~combout & ( !\soc_inst|m0_1|u_logic|Khnvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # (\soc_inst|m0_1|u_logic|Jux2z4~q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|V2qvx4~combout & ( !\soc_inst|m0_1|u_logic|Khnvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout & ((!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # (\soc_inst|m0_1|u_logic|Jux2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Jux2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|V2qvx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Khnvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Khnvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Khnvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Khnvx4~1 .lut_mask = 64'hA0F0AAFF00000000;
+defparam \soc_inst|m0_1|u_logic|Khnvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X35_Y4_N40
+dffeas \soc_inst|m0_1|u_logic|Ohh3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Khnvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ohh3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ohh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ohh3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y5_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N662z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N662z4~2_combout = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Sl03z4~q )) #
+// (\soc_inst|m0_1|u_logic|Fgm2z4~q & ((!\soc_inst|m0_1|u_logic|Yoz2z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sl03z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yoz2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N662z4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N662z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N662z4~2 .lut_mask = 64'h0000000088A00000;
+defparam \soc_inst|m0_1|u_logic|N662z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y5_N41
+dffeas \soc_inst|m0_1|u_logic|Noo2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Noo2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Noo2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Noo2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y4_N10
+dffeas \soc_inst|m0_1|u_logic|Bk13z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Bk13z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Bk13z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bk13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bk13z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y4_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N662z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N662z4~1_combout = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// (!\soc_inst|m0_1|u_logic|Bk13z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Kt23z4~q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Bk13z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Kt23z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N662z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N662z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N662z4~1 .lut_mask = 64'h0000000088A00000;
+defparam \soc_inst|m0_1|u_logic|N662z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y5_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K862z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K862z4~0_combout = ( !\soc_inst|m0_1|u_logic|Ymo2z4~q & ( \soc_inst|m0_1|u_logic|M1j2z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Sjj2z4~q &
+// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ymo2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|K862z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K862z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K862z4~0 .lut_mask = 64'h0000000020000000;
+defparam \soc_inst|m0_1|u_logic|K862z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y4_N26
+dffeas \soc_inst|m0_1|u_logic|Cc53z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Cc53z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cc53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cc53z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y4_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N662z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N662z4~0_combout = ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|T243z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Cc53z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Cc53z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|T243z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N662z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N662z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N662z4~0 .lut_mask = 64'h000000000000E020;
+defparam \soc_inst|m0_1|u_logic|N662z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y5_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N662z4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N662z4~3_combout = ( !\soc_inst|m0_1|u_logic|K862z4~0_combout & ( !\soc_inst|m0_1|u_logic|N662z4~0_combout & ( (!\soc_inst|m0_1|u_logic|N662z4~2_combout & (!\soc_inst|m0_1|u_logic|N662z4~1_combout &
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Noo2z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|N662z4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Noo2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|N662z4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|K862z4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|N662z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N662z4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N662z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N662z4~3 .lut_mask = 64'hA200000000000000;
+defparam \soc_inst|m0_1|u_logic|N662z4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y5_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xrnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xrnvx4~0_combout = ( \soc_inst|m0_1|u_logic|Eruwx4~combout & ( \soc_inst|m0_1|u_logic|N662z4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (\soc_inst|m0_1|u_logic|Ohh3z4~q )) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ) # (\soc_inst|m0_1|u_logic|Cqo2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Eruwx4~combout & ( \soc_inst|m0_1|u_logic|N662z4~3_combout & (
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (\soc_inst|m0_1|u_logic|Ohh3z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((\soc_inst|m0_1|u_logic|Cqo2z4~q & !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Eruwx4~combout & ( !\soc_inst|m0_1|u_logic|N662z4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (\soc_inst|m0_1|u_logic|Ohh3z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((\soc_inst|m0_1|u_logic|Cqo2z4~q &
+// !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Eruwx4~combout & ( !\soc_inst|m0_1|u_logic|N662z4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (\soc_inst|m0_1|u_logic|Ohh3z4~q )) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((\soc_inst|m0_1|u_logic|Cqo2z4~q & !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ohh3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Cqo2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Eruwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|N662z4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xrnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xrnvx4~0 .lut_mask = 64'h2722272227222777;
+defparam \soc_inst|m0_1|u_logic|Xrnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y5_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~9 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~9_sumout = SUM(( !\soc_inst|m0_1|u_logic|Vvx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~14 ))
+// \soc_inst|m0_1|u_logic|Add3~10 = CARRY(( !\soc_inst|m0_1|u_logic|Vvx2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~14 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Vvx2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add3~14 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add3~9_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add3~10 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add3~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~9 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~9 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y5_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o[29] (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|haddr_o [29] = ( \soc_inst|m0_1|u_logic|Add3~9_sumout & ( \soc_inst|m0_1|u_logic|Add5~117_sumout & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout & (!\soc_inst|m0_1|u_logic|K1wvx4~combout &
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~9_sumout & ( \soc_inst|m0_1|u_logic|Add5~117_sumout & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout &
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~9_sumout & ( !\soc_inst|m0_1|u_logic|Add5~117_sumout & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout &
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~9_sumout & ( !\soc_inst|m0_1|u_logic|Add5~117_sumout & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) #
+// (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Add3~9_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~117_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|haddr_o [29]),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|haddr_o[29] .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|haddr_o[29] .lut_mask = 64'hF3F3A2A2F300A200;
+defparam \soc_inst|m0_1|u_logic|haddr_o[29] .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y5_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S6ovx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S6ovx4~2_combout = ( !\soc_inst|m0_1|u_logic|haddr_o~0_combout & ( (!\soc_inst|m0_1|u_logic|haddr_o [29] & (\soc_inst|m0_1|u_logic|V2qvx4~combout & \soc_inst|m0_1|u_logic|haddr_o~1_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|haddr_o [29]),
+ .datac(!\soc_inst|m0_1|u_logic|V2qvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|haddr_o~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S6ovx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S6ovx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S6ovx4~2 .lut_mask = 64'h000C000C00000000;
+defparam \soc_inst|m0_1|u_logic|S6ovx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y5_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S6ovx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S6ovx4~3_combout = ( \soc_inst|m0_1|u_logic|S6ovx4~1_combout & ( (\soc_inst|m0_1|u_logic|U5qvx4~combout & \soc_inst|m0_1|u_logic|S6ovx4~2_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|U5qvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|S6ovx4~2_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|S6ovx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S6ovx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S6ovx4~3 .lut_mask = 64'h00000000000F000F;
+defparam \soc_inst|m0_1|u_logic|S6ovx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y5_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nmnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nmnvx4~0_combout = ( \soc_inst|m0_1|u_logic|Nlovx4~7_combout & ( (!\soc_inst|m0_1|u_logic|S6ovx4~3_combout & (!\soc_inst|interconnect_1|HREADY~0_combout & ((\soc_inst|m0_1|u_logic|Mjl2z4~q )))) #
+// (\soc_inst|m0_1|u_logic|S6ovx4~3_combout & ((!\soc_inst|m0_1|u_logic|Z6ovx4~combout ) # ((!\soc_inst|interconnect_1|HREADY~0_combout & \soc_inst|m0_1|u_logic|Mjl2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Nlovx4~7_combout & (
+// ((!\soc_inst|interconnect_1|HREADY~0_combout & \soc_inst|m0_1|u_logic|Mjl2z4~q )) # (\soc_inst|m0_1|u_logic|S6ovx4~3_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
+ .datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nlovx4~7_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nmnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nmnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nmnvx4~0 .lut_mask = 64'h55DD55DD50DC50DC;
+defparam \soc_inst|m0_1|u_logic|Nmnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X17_Y5_N28
+dffeas \soc_inst|m0_1|u_logic|Mjl2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Nmnvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mjl2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mjl2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y9_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B7owx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|B7owx4~combout = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Mjl2z4~q & \soc_inst|m0_1|u_logic|F4nvx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|F4nvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|B7owx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B7owx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B7owx4 .lut_mask = 64'h0000000000F000F0;
+defparam \soc_inst|m0_1|u_logic|B7owx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y11_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjyvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pjyvx4~1_combout = ( !\soc_inst|m0_1|u_logic|T2owx4~1_combout & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # ((\soc_inst|m0_1|u_logic|Gdo2z4~q )))) #
+// (\soc_inst|m0_1|u_logic|I7owx4~combout & (\soc_inst|m0_1|u_logic|Xeo2z4~q & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Gdo2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Xeo2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Gdo2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pjyvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pjyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pjyvx4~1 .lut_mask = 64'h8CAF8CAF00000000;
+defparam \soc_inst|m0_1|u_logic|Pjyvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y11_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjyvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pjyvx4~2_combout = ( \soc_inst|m0_1|u_logic|Pjyvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|U18wx4~0_combout )))) #
+// (\soc_inst|m0_1|u_logic|B7owx4~combout & (!\soc_inst|interconnect_1|HRDATA[16]~30_combout & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # (\soc_inst|m0_1|u_logic|U18wx4~0_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|U18wx4~0_combout ),
+ .datad(!\soc_inst|interconnect_1|HRDATA[16]~30_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pjyvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pjyvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pjyvx4~2 .lut_mask = 64'h00000000CF8ACF8A;
+defparam \soc_inst|m0_1|u_logic|Pjyvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F9pvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|F9pvx4~0_combout = ( \soc_inst|m0_1|u_logic|Amyvx4~2_combout & ( \soc_inst|m0_1|u_logic|Rkyvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Amyvx4~2_combout & ( \soc_inst|m0_1|u_logic|Rkyvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout & ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Amyvx4~2_combout & ( !\soc_inst|m0_1|u_logic|Rkyvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Ykyvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Amyvx4~2_combout & ( !\soc_inst|m0_1|u_logic|Rkyvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Ykyvx4~0_combout & (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout & ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) #
+// (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rkyvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|F9pvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F9pvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F9pvx4~0 .lut_mask = 64'h000B0B0B00BBBBBB;
+defparam \soc_inst|m0_1|u_logic|F9pvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F9pvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|F9pvx4~1_combout = ( \soc_inst|m0_1|u_logic|Pjyvx4~0_combout & ( \soc_inst|m0_1|u_logic|F9pvx4~0_combout & ( ((\soc_inst|m0_1|u_logic|Pjyvx4~2_combout & !\soc_inst|m0_1|u_logic|Lstwx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pjyvx4~0_combout & ( \soc_inst|m0_1|u_logic|F9pvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|F9pvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|F9pvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F9pvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F9pvx4~1 .lut_mask = 64'h000000005F5F4F4F;
+defparam \soc_inst|m0_1|u_logic|F9pvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y13_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkyvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kkyvx4~1_combout = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Kkyvx4~0_combout & !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout & (
+// \soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kkyvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kkyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kkyvx4~1 .lut_mask = 64'h0F0F0F0F0F000F00;
+defparam \soc_inst|m0_1|u_logic|Kkyvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ocnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ocnvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Nxqvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout & (\soc_inst|m0_1|u_logic|F9pvx4~1_combout & (!\soc_inst|m0_1|u_logic|Kkyvx4~1_combout &
+// ((!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Kyi2z4~DUPLICATE_q ))))) # (\soc_inst|m0_1|u_logic|B1vvx4~0_combout & ((((!\soc_inst|m0_1|u_logic|H1rvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Kyi2z4~DUPLICATE_q )))) ) ) # (
+// \soc_inst|m0_1|u_logic|Nxqvx4~0_combout & ( ((\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q & (((!\soc_inst|m0_1|u_logic|H1rvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Kyi2z4~DUPLICATE_q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|F9pvx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Kyi2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kkyvx4~1_combout ),
+ .datag(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ocnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ocnvx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Ocnvx4~0 .lut_mask = 64'h5F130F030F030F03;
+defparam \soc_inst|m0_1|u_logic|Ocnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y14_N13
+dffeas \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Ocnvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y8_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X7mvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|X7mvx4~0_combout = ( \soc_inst|m0_1|u_logic|S4w2z4~q & ( \soc_inst|m0_1|u_logic|Q5vvx4~0_combout & ( (\soc_inst|m0_1|u_logic|J5vvx4~combout & (\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Y9t2z4~q ) #
+// (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S4w2z4~q & ( \soc_inst|m0_1|u_logic|Q5vvx4~0_combout & ( (\soc_inst|m0_1|u_logic|J5vvx4~combout & (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q &
+// (!\soc_inst|m0_1|u_logic|Y9t2z4~q & \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|S4w2z4~q & ( !\soc_inst|m0_1|u_logic|Q5vvx4~0_combout & ( (\soc_inst|m0_1|u_logic|J5vvx4~combout & (\soc_inst|m0_1|u_logic|Y9t2z4~q &
+// \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|J5vvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Q5vvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|X7mvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X7mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X7mvx4~0 .lut_mask = 64'h0000000500100015;
+defparam \soc_inst|m0_1|u_logic|X7mvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y8_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X7mvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|X7mvx4~1_combout = ( \soc_inst|m0_1|u_logic|I6w2z4~q & ( \soc_inst|m0_1|u_logic|X7mvx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|I6w2z4~q & ( \soc_inst|m0_1|u_logic|X7mvx4~0_combout ) ) # ( \soc_inst|m0_1|u_logic|I6w2z4~q & (
+// !\soc_inst|m0_1|u_logic|X7mvx4~0_combout & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # (!\soc_inst|m0_1|u_logic|Tki2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|I6w2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|X7mvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|X7mvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X7mvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X7mvx4~1 .lut_mask = 64'h0000FAFAFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|X7mvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y8_N19
+dffeas \soc_inst|m0_1|u_logic|I6w2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|X7mvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|I6w2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I6w2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I6w2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y7_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F5mvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|F5mvx4~1_combout = ( \soc_inst|m0_1|u_logic|Mtqvx4~combout & ( \soc_inst|m0_1|u_logic|Ye4wx4~combout & ( !\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtqvx4~combout & (
+// \soc_inst|m0_1|u_logic|Ye4wx4~combout & ( \soc_inst|m0_1|u_logic|J4x2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtqvx4~combout & ( !\soc_inst|m0_1|u_logic|Ye4wx4~combout & ( \soc_inst|m0_1|u_logic|J4x2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|F5mvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F5mvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F5mvx4~1 .lut_mask = 64'h333300003333AAAA;
+defparam \soc_inst|m0_1|u_logic|F5mvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y7_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F5mvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|F5mvx4~2_combout = ( \soc_inst|m0_1|u_logic|U5x2z4~q & ( \soc_inst|m0_1|u_logic|F5mvx4~1_combout & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # ((!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) #
+// (\soc_inst|m0_1|u_logic|F5mvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|U5x2z4~q & ( \soc_inst|m0_1|u_logic|F5mvx4~1_combout & ( (\soc_inst|interconnect_1|HREADY~0_combout & \soc_inst|m0_1|u_logic|F5mvx4~0_combout ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|U5x2z4~q & ( !\soc_inst|m0_1|u_logic|F5mvx4~1_combout & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) ) )
+
+ .dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|F5mvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|U5x2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|F5mvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|F5mvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F5mvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F5mvx4~2 .lut_mask = 64'h0000FAFA1111FBFB;
+defparam \soc_inst|m0_1|u_logic|F5mvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X22_Y7_N55
+dffeas \soc_inst|m0_1|u_logic|U5x2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|F5mvx4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|U5x2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U5x2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U5x2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y14_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lefwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lefwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & ( \soc_inst|m0_1|u_logic|Z5pvx4~4_combout ) ) # ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Z5pvx4~4_combout & (
+// (\soc_inst|m0_1|u_logic|Ye4wx4~combout & ((!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|U5x2z4~q ))) # (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|I6w2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|I6w2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|U5x2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lefwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lefwx4~0 .lut_mask = 64'h01510000FFFF0000;
+defparam \soc_inst|m0_1|u_logic|Lefwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nlhvx4~0_combout = ( \soc_inst|m0_1|u_logic|Add2~37_sumout & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ))) #
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & (\soc_inst|m0_1|u_logic|Cax2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Add2~37_sumout & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Cax2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Cax2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Add2~37_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nlhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nlhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nlhvx4~0 .lut_mask = 64'h8A8A8A8A8A028A02;
+defparam \soc_inst|m0_1|u_logic|Nlhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlhvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nlhvx4~1_combout = ( \soc_inst|m0_1|u_logic|Add5~109_sumout & ( \soc_inst|m0_1|u_logic|Vcuvx4~1_combout & ( (\soc_inst|m0_1|u_logic|Nlhvx4~0_combout & !\soc_inst|m0_1|u_logic|Xdfwx4~combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Add5~109_sumout & ( \soc_inst|m0_1|u_logic|Vcuvx4~1_combout & ( \soc_inst|m0_1|u_logic|Nlhvx4~0_combout ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~109_sumout & ( !\soc_inst|m0_1|u_logic|Vcuvx4~1_combout & (
+// (\soc_inst|m0_1|u_logic|Nlhvx4~0_combout & (!\soc_inst|m0_1|u_logic|H4nwx4~combout & !\soc_inst|m0_1|u_logic|Xdfwx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~109_sumout & ( !\soc_inst|m0_1|u_logic|Vcuvx4~1_combout & (
+// (\soc_inst|m0_1|u_logic|Nlhvx4~0_combout & !\soc_inst|m0_1|u_logic|H4nwx4~combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Nlhvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Add5~109_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Vcuvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nlhvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nlhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nlhvx4~1 .lut_mask = 64'h3030300033333300;
+defparam \soc_inst|m0_1|u_logic|Nlhvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X33_Y13_N50
+dffeas \soc_inst|m0_1|u_logic|Cax2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Nlhvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Cax2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cax2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cax2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y5_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rxzvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rxzvx4~combout = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( \soc_inst|m0_1|u_logic|Add5~109_sumout & ( (((\soc_inst|m0_1|u_logic|Add3~33_sumout & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) #
+// (\soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Mpnvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( \soc_inst|m0_1|u_logic|Add5~109_sumout & ( ((\soc_inst|m0_1|u_logic|Add3~33_sumout &
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( !\soc_inst|m0_1|u_logic|Add5~109_sumout & ( ((\soc_inst|m0_1|u_logic|Add3~33_sumout &
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Mpnvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( !\soc_inst|m0_1|u_logic|Add5~109_sumout & ( (\soc_inst|m0_1|u_logic|Add3~33_sumout &
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Add3~33_sumout ),
+ .datab(!\soc_inst|m0_1|u_logic|Mpnvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~109_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rxzvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rxzvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rxzvx4 .lut_mask = 64'h0505373705FF37FF;
+defparam \soc_inst|m0_1|u_logic|Rxzvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X22_Y5_N55
+dffeas \soc_inst|ram_1|saved_word_address[3] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Rxzvx4~combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|ram_1|always1~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|ram_1|saved_word_address [3]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|saved_word_address[3] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[3] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y5_N24
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[3]~3 (
+// Equation(s):
+// \soc_inst|ram_1|memory.raddr_a[3]~3_combout = ( \soc_inst|ram_1|always1~0_combout & ( (!\soc_inst|ram_1|write_cycle~q & (\soc_inst|m0_1|u_logic|Rxzvx4~combout )) # (\soc_inst|ram_1|write_cycle~q & ((\soc_inst|ram_1|saved_word_address [3]))) ) ) # (
+// !\soc_inst|ram_1|always1~0_combout & ( \soc_inst|ram_1|saved_word_address [3] ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Rxzvx4~combout ),
+ .datac(!\soc_inst|ram_1|write_cycle~q ),
+ .datad(!\soc_inst|ram_1|saved_word_address [3]),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|always1~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|memory.raddr_a[3]~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory.raddr_a[3]~3 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[3]~3 .lut_mask = 64'h00FF00FF303F303F;
+defparam \soc_inst|ram_1|memory.raddr_a[3]~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y10_N3
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[22]~31 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[22]~31_combout = ( \soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & ((\soc_inst|ram_1|byte_select [2]) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22 ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22 & !\soc_inst|ram_1|byte_select [2])) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22 ),
+ .datad(!\soc_inst|ram_1|byte_select [2]),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|data_to_memory[22]~31_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[22]~31 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[22]~31 .lut_mask = 64'h0300030003330333;
+defparam \soc_inst|ram_1|data_to_memory[22]~31 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X14_Y8_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 (
+ .portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|ram_1|data_to_memory[22]~31_combout ,\soc_inst|ram_1|data_to_memory[6]~32_combout }),
+ .portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+ .portabyteenamasks(1'b1),
+ .portbdatain(2'b00),
+ .portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_first_bit_number = 6;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_first_bit_number = 6;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003FFFFB63C12700003100C0E0000000000A00A00A00A00A00A00A00D03FFFFFFFFFFFFC32000551000000000000000001554";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y8_N51
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[6]~32 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[6]~32_combout = ( \soc_inst|m0_1|u_logic|hwdata_o~4_combout & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout ) # (\soc_inst|ram_1|byte_select [0]))) )
+// ) # ( !\soc_inst|m0_1|u_logic|hwdata_o~4_combout & ( (!\soc_inst|ram_1|byte_select [0] & (\soc_inst|ram_1|write_cycle~DUPLICATE_q & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|ram_1|byte_select [0]),
+ .datac(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout ),
+ .datae(!\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|data_to_memory[6]~32_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[6]~32 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[6]~32 .lut_mask = 64'h000C030F000C030F;
+defparam \soc_inst|ram_1|data_to_memory[6]~32 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y10_N20
+dffeas \soc_inst|switches_1|switch_store[1][6] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\SW[6]~input_o ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|switches_1|always0~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|switches_1|switch_store[1][6]~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[1][6] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[1][6] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y10_N18
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[22]~35 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[22]~35_combout = ( \soc_inst|interconnect_1|HRDATA[20]~7_combout & ( (!\soc_inst|interconnect_1|Equal1~0_combout & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22 )) #
+// (\soc_inst|interconnect_1|Equal1~0_combout & ((\soc_inst|switches_1|switch_store[1][6]~q ))) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
+ .datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22 ),
+ .datad(!\soc_inst|switches_1|switch_store[1][6]~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[22]~35_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[22]~35 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[22]~35 .lut_mask = 64'h000000000C3F0C3F;
+defparam \soc_inst|interconnect_1|HRDATA[22]~35 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y6_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J6nvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|J6nvx4~0_combout = ( \soc_inst|m0_1|u_logic|Zoy2z4~q & ( (\soc_inst|interconnect_1|HRDATA[6]~36_combout & \soc_inst|m0_1|u_logic|Vapvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Zoy2z4~q & (
+// (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) # ((\soc_inst|interconnect_1|HRDATA[6]~36_combout & \soc_inst|m0_1|u_logic|Vapvx4~combout )) ) )
+
+ .dataa(!\soc_inst|interconnect_1|HRDATA[6]~36_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|J6nvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J6nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J6nvx4~0 .lut_mask = 64'hFF05FF0505050505;
+defparam \soc_inst|m0_1|u_logic|J6nvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y9_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aphvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Aphvx4~0_combout = ( \soc_inst|interconnect_1|HRDATA[22]~35_combout & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) ) # ( !\soc_inst|interconnect_1|HRDATA[22]~35_combout )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[22]~35_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Aphvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Aphvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aphvx4~0 .lut_mask = 64'hFFFFFFFFAAAAAAAA;
+defparam \soc_inst|m0_1|u_logic|Aphvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y9_N11
+dffeas \soc_inst|m0_1|u_logic|Enw2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Aphvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Enw2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Enw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Enw2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y11_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C9rvx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C9rvx4~3_combout = ( \soc_inst|m0_1|u_logic|Kkrvx4~5_combout & ( (\soc_inst|m0_1|u_logic|F0y2z4~q & (!\soc_inst|m0_1|u_logic|C9rvx4~0_combout $ (((\soc_inst|m0_1|u_logic|U7w2z4~q & !\soc_inst|m0_1|u_logic|Ywi2z4~q ))))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Kkrvx4~5_combout & ( (\soc_inst|m0_1|u_logic|F0y2z4~q & (!\soc_inst|m0_1|u_logic|C9rvx4~0_combout $ (!\soc_inst|m0_1|u_logic|Ywi2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|C9rvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|U7w2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ywi2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|F0y2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Kkrvx4~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C9rvx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C9rvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C9rvx4~3 .lut_mask = 64'h005A005A009A009A;
+defparam \soc_inst|m0_1|u_logic|C9rvx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y10_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C9rvx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C9rvx4~4_combout = ( \soc_inst|m0_1|u_logic|Q6mwx4~0_combout & ( \soc_inst|m0_1|u_logic|X2rvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Nbm2z4~q & (\soc_inst|m0_1|u_logic|G2zwx4~1_combout & (\soc_inst|m0_1|u_logic|Dwl2z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Nbm2z4~q & (!\soc_inst|m0_1|u_logic|G2zwx4~1_combout $ (((\soc_inst|m0_1|u_logic|Owq2z4~q ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Q6mwx4~0_combout & ( \soc_inst|m0_1|u_logic|X2rvx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Nbm2z4~q & (\soc_inst|m0_1|u_logic|Dwl2z4~q )) # (\soc_inst|m0_1|u_logic|Nbm2z4~q & ((\soc_inst|m0_1|u_logic|Owq2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Q6mwx4~0_combout & ( !\soc_inst|m0_1|u_logic|X2rvx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Nbm2z4~q & (\soc_inst|m0_1|u_logic|Dwl2z4~q )) # (\soc_inst|m0_1|u_logic|Nbm2z4~q & ((\soc_inst|m0_1|u_logic|Owq2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Q6mwx4~0_combout & ( !\soc_inst|m0_1|u_logic|X2rvx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Nbm2z4~q & (\soc_inst|m0_1|u_logic|Dwl2z4~q )) # (\soc_inst|m0_1|u_logic|Nbm2z4~q & ((\soc_inst|m0_1|u_logic|Owq2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Dwl2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Owq2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|X2rvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C9rvx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C9rvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C9rvx4~4 .lut_mask = 64'h303F303F303F1A15;
+defparam \soc_inst|m0_1|u_logic|C9rvx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y9_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C9rvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C9rvx4~1_combout = ( \soc_inst|m0_1|u_logic|N4rvx4~0_combout & ( \soc_inst|m0_1|u_logic|C9rvx4~4_combout & ( (!\soc_inst|m0_1|u_logic|Gtp2z4~q & (\soc_inst|m0_1|u_logic|C9rvx4~3_combout & (!\soc_inst|m0_1|u_logic|Dwl2z4~q $
+// (\soc_inst|m0_1|u_logic|Kzqvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N4rvx4~0_combout & ( \soc_inst|m0_1|u_logic|C9rvx4~4_combout & ( (\soc_inst|m0_1|u_logic|Gtp2z4~q & (\soc_inst|m0_1|u_logic|C9rvx4~3_combout &
+// (!\soc_inst|m0_1|u_logic|Dwl2z4~q $ (\soc_inst|m0_1|u_logic|Kzqvx4~0_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Gtp2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Dwl2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Kzqvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|C9rvx4~3_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|N4rvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|C9rvx4~4_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C9rvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C9rvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C9rvx4~1 .lut_mask = 64'h0000000000410082;
+defparam \soc_inst|m0_1|u_logic|C9rvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y8_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C9rvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C9rvx4~2_combout = ( \soc_inst|m0_1|u_logic|X2rvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Abovx4~0_combout & (((!\soc_inst|m0_1|u_logic|Lbn2z4~q & \soc_inst|m0_1|u_logic|C9rvx4~1_combout )))) #
+// (\soc_inst|m0_1|u_logic|Abovx4~0_combout & (\soc_inst|m0_1|u_logic|Nbm2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|X2rvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Abovx4~0_combout & (((\soc_inst|m0_1|u_logic|Lbn2z4~q &
+// \soc_inst|m0_1|u_logic|C9rvx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout & (\soc_inst|m0_1|u_logic|Nbm2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Lbn2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|C9rvx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C9rvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C9rvx4~2 .lut_mask = 64'h111D111D11D111D1;
+defparam \soc_inst|m0_1|u_logic|C9rvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y8_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add1~5_sumout = SUM(( VCC ) + ( (\soc_inst|m0_1|u_logic|Nbm2z4~q & !\soc_inst|m0_1|u_logic|I3y2z4~q ) ) + ( \soc_inst|m0_1|u_logic|Add1~34_cout ))
+// \soc_inst|m0_1|u_logic|Add1~6 = CARRY(( VCC ) + ( (\soc_inst|m0_1|u_logic|Nbm2z4~q & !\soc_inst|m0_1|u_logic|I3y2z4~q ) ) + ( \soc_inst|m0_1|u_logic|Add1~34_cout ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|I3y2z4~q ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add1~34_cout ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add1~5_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add1~6 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add1~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~5 .lut_mask = 64'h0000AAFF0000FFFF;
+defparam \soc_inst|m0_1|u_logic|Add1~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y8_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~9 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add1~9_sumout = SUM(( VCC ) + ( (\soc_inst|m0_1|u_logic|Nbm2z4~q & !\soc_inst|m0_1|u_logic|W4y2z4~DUPLICATE_q ) ) + ( \soc_inst|m0_1|u_logic|Add1~6 ))
+// \soc_inst|m0_1|u_logic|Add1~10 = CARRY(( VCC ) + ( (\soc_inst|m0_1|u_logic|Nbm2z4~q & !\soc_inst|m0_1|u_logic|W4y2z4~DUPLICATE_q ) ) + ( \soc_inst|m0_1|u_logic|Add1~6 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|W4y2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add1~6 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add1~9_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add1~10 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add1~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~9 .lut_mask = 64'h0000AAFF0000FFFF;
+defparam \soc_inst|m0_1|u_logic|Add1~9 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y8_N49
+dffeas \soc_inst|m0_1|u_logic|W4y2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Kanvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|W4y2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W4y2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|W4y2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y8_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kanvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kanvx4~0_combout = ( \soc_inst|m0_1|u_logic|W4y2z4~q & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout & ( (!\soc_inst|interconnect_1|HRDATA[7]~11_combout & ((!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) #
+// (!\soc_inst|m0_1|u_logic|Add1~9_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W4y2z4~q & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout & ( (!\soc_inst|interconnect_1|HRDATA[7]~11_combout & (\soc_inst|m0_1|u_logic|Edovx4~combout &
+// ((!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # (!\soc_inst|m0_1|u_logic|Add1~9_sumout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|W4y2z4~q & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) #
+// (!\soc_inst|m0_1|u_logic|Add1~9_sumout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|W4y2z4~q & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout & ( (\soc_inst|m0_1|u_logic|Edovx4~combout & ((!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) #
+// (!\soc_inst|m0_1|u_logic|Add1~9_sumout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Add1~9_sumout ),
+ .datac(!\soc_inst|interconnect_1|HRDATA[7]~11_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|W4y2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kanvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kanvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kanvx4~0 .lut_mask = 64'h00EEEEEE00E0E0E0;
+defparam \soc_inst|m0_1|u_logic|Kanvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y8_N50
+dffeas \soc_inst|m0_1|u_logic|W4y2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Kanvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|W4y2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W4y2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|W4y2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y8_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~21 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add1~21_sumout = SUM(( (\soc_inst|m0_1|u_logic|Nbm2z4~q & !\soc_inst|m0_1|u_logic|K6y2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~10 ))
+// \soc_inst|m0_1|u_logic|Add1~22 = CARRY(( (\soc_inst|m0_1|u_logic|Nbm2z4~q & !\soc_inst|m0_1|u_logic|K6y2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~10 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|K6y2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add1~10 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add1~21_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add1~22 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add1~21 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~21 .lut_mask = 64'h0000000000005050;
+defparam \soc_inst|m0_1|u_logic|Add1~21 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y8_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Danvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Danvx4~0_combout = ( \soc_inst|m0_1|u_logic|K6y2z4~q & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout & ( (!\soc_inst|interconnect_1|HRDATA[8]~33_combout & ((!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) #
+// (!\soc_inst|m0_1|u_logic|Add1~21_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K6y2z4~q & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout & ( (!\soc_inst|interconnect_1|HRDATA[8]~33_combout & (\soc_inst|m0_1|u_logic|Edovx4~combout &
+// ((!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # (!\soc_inst|m0_1|u_logic|Add1~21_sumout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|K6y2z4~q & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) #
+// (!\soc_inst|m0_1|u_logic|Add1~21_sumout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|K6y2z4~q & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout & ( (\soc_inst|m0_1|u_logic|Edovx4~combout & ((!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) #
+// (!\soc_inst|m0_1|u_logic|Add1~21_sumout ))) ) ) )
+
+ .dataa(!\soc_inst|interconnect_1|HRDATA[8]~33_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Add1~21_sumout ),
+ .datae(!\soc_inst|m0_1|u_logic|K6y2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Danvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Danvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Danvx4~0 .lut_mask = 64'h0F0CFFCC0A08AA88;
+defparam \soc_inst|m0_1|u_logic|Danvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y8_N56
+dffeas \soc_inst|m0_1|u_logic|K6y2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Danvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|K6y2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K6y2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K6y2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y8_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add1~1_sumout = SUM(( VCC ) + ( (\soc_inst|m0_1|u_logic|Nbm2z4~q & !\soc_inst|m0_1|u_logic|Qcy2z4~q ) ) + ( \soc_inst|m0_1|u_logic|Add1~14 ))
+// \soc_inst|m0_1|u_logic|Add1~2 = CARRY(( VCC ) + ( (\soc_inst|m0_1|u_logic|Nbm2z4~q & !\soc_inst|m0_1|u_logic|Qcy2z4~q ) ) + ( \soc_inst|m0_1|u_logic|Add1~14 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qcy2z4~q ),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add1~14 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add1~1_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add1~2 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add1~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~1 .lut_mask = 64'h0000AAFF0000FFFF;
+defparam \soc_inst|m0_1|u_logic|Add1~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y8_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~17 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add1~17_sumout = SUM(( (!\soc_inst|m0_1|u_logic|Bdm2z4~q & \soc_inst|m0_1|u_logic|Nbm2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~2 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bdm2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add1~2 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add1~17_sumout ),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add1~17 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~17 .lut_mask = 64'h0000000000000A0A;
+defparam \soc_inst|m0_1|u_logic|Add1~17 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y8_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U8nvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U8nvx4~0_combout = ( \soc_inst|m0_1|u_logic|Bdm2z4~q & ( \soc_inst|m0_1|u_logic|C9rvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Add1~17_sumout & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) #
+// (!\soc_inst|interconnect_1|HRDATA[13]~27_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bdm2z4~q & ( \soc_inst|m0_1|u_logic|C9rvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Add1~17_sumout & (\soc_inst|m0_1|u_logic|Edovx4~combout &
+// ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[13]~27_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Bdm2z4~q & ( !\soc_inst|m0_1|u_logic|C9rvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) #
+// (!\soc_inst|interconnect_1|HRDATA[13]~27_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bdm2z4~q & ( !\soc_inst|m0_1|u_logic|C9rvx4~2_combout & ( (\soc_inst|m0_1|u_logic|Edovx4~combout & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) #
+// (!\soc_inst|interconnect_1|HRDATA[13]~27_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Add1~17_sumout ),
+ .datab(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
+ .datad(!\soc_inst|interconnect_1|HRDATA[13]~27_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Bdm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U8nvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U8nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U8nvx4~0 .lut_mask = 64'h0F0CFFCC0A08AA88;
+defparam \soc_inst|m0_1|u_logic|U8nvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y8_N2
+dffeas \soc_inst|m0_1|u_logic|Bdm2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|U8nvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Bdm2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bdm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bdm2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y8_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oylwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oylwx4~0_combout = ( \soc_inst|m0_1|u_logic|I3y2z4~q & ( (\soc_inst|m0_1|u_logic|K6y2z4~q & (\soc_inst|m0_1|u_logic|W4y2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Bdm2z4~q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|K6y2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|W4y2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Bdm2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|I3y2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Oylwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oylwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oylwx4~0 .lut_mask = 64'h0000000000030003;
+defparam \soc_inst|m0_1|u_logic|Oylwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y8_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~25 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add1~25_sumout = SUM(( (\soc_inst|m0_1|u_logic|Nbm2z4~q & !\soc_inst|m0_1|u_logic|Y7y2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~22 ))
+// \soc_inst|m0_1|u_logic|Add1~26 = CARRY(( (\soc_inst|m0_1|u_logic|Nbm2z4~q & !\soc_inst|m0_1|u_logic|Y7y2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~22 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Y7y2z4~q ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add1~22 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add1~25_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add1~26 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add1~25 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~25 .lut_mask = 64'h0000000000005500;
+defparam \soc_inst|m0_1|u_logic|Add1~25 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y8_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W9nvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|W9nvx4~0_combout = ( \soc_inst|m0_1|u_logic|Y7y2z4~q & ( \soc_inst|m0_1|u_logic|C9rvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Add1~25_sumout & ((!\soc_inst|interconnect_1|HRDATA[9]~16_combout ) #
+// (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y7y2z4~q & ( \soc_inst|m0_1|u_logic|C9rvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Add1~25_sumout & (\soc_inst|m0_1|u_logic|Edovx4~combout &
+// ((!\soc_inst|interconnect_1|HRDATA[9]~16_combout ) # (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Y7y2z4~q & ( !\soc_inst|m0_1|u_logic|C9rvx4~2_combout & ( (!\soc_inst|interconnect_1|HRDATA[9]~16_combout ) #
+// (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y7y2z4~q & ( !\soc_inst|m0_1|u_logic|C9rvx4~2_combout & ( (\soc_inst|m0_1|u_logic|Edovx4~combout & ((!\soc_inst|interconnect_1|HRDATA[9]~16_combout ) #
+// (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ))) ) ) )
+
+ .dataa(!\soc_inst|interconnect_1|HRDATA[9]~16_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Add1~25_sumout ),
+ .datad(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Y7y2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|W9nvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W9nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W9nvx4~0 .lut_mask = 64'h00EEEEEE00E0E0E0;
+defparam \soc_inst|m0_1|u_logic|W9nvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y8_N50
+dffeas \soc_inst|m0_1|u_logic|Y7y2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|W9nvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Y7y2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y7y2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y7y2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y8_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~29 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add1~29_sumout = SUM(( (\soc_inst|m0_1|u_logic|Nbm2z4~q & !\soc_inst|m0_1|u_logic|M9y2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~26 ))
+// \soc_inst|m0_1|u_logic|Add1~30 = CARRY(( (\soc_inst|m0_1|u_logic|Nbm2z4~q & !\soc_inst|m0_1|u_logic|M9y2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~26 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|M9y2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add1~26 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add1~29_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add1~30 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add1~29 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~29 .lut_mask = 64'h0000000000005050;
+defparam \soc_inst|m0_1|u_logic|Add1~29 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y8_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P9nvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P9nvx4~0_combout = ( \soc_inst|m0_1|u_logic|M9y2z4~q & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout & ( (!\soc_inst|interconnect_1|HRDATA[10]~12_combout & ((!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) #
+// (!\soc_inst|m0_1|u_logic|Add1~29_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|M9y2z4~q & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout & ( (!\soc_inst|interconnect_1|HRDATA[10]~12_combout & (\soc_inst|m0_1|u_logic|Edovx4~combout &
+// ((!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # (!\soc_inst|m0_1|u_logic|Add1~29_sumout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|M9y2z4~q & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) #
+// (!\soc_inst|m0_1|u_logic|Add1~29_sumout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|M9y2z4~q & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout & ( (\soc_inst|m0_1|u_logic|Edovx4~combout & ((!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) #
+// (!\soc_inst|m0_1|u_logic|Add1~29_sumout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Add1~29_sumout ),
+ .datac(!\soc_inst|interconnect_1|HRDATA[10]~12_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|M9y2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|P9nvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P9nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P9nvx4~0 .lut_mask = 64'h00EEEEEE00E0E0E0;
+defparam \soc_inst|m0_1|u_logic|P9nvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y8_N44
+dffeas \soc_inst|m0_1|u_logic|M9y2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|P9nvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|M9y2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M9y2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M9y2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y8_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oylwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oylwx4~1_combout = ( \soc_inst|m0_1|u_logic|M9y2z4~q & ( (!\soc_inst|m0_1|u_logic|Qcy2z4~q ) # ((!\soc_inst|m0_1|u_logic|Oylwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Bby2z4~q ) # (!\soc_inst|m0_1|u_logic|Y7y2z4~q ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|M9y2z4~q )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qcy2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Oylwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Bby2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Y7y2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|M9y2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Oylwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oylwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oylwx4~1 .lut_mask = 64'hFFFFFFFFFFFEFFFE;
+defparam \soc_inst|m0_1|u_logic|Oylwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y8_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~34 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add1~34_cout = CARRY(( (!\soc_inst|m0_1|u_logic|Nbm2z4~q ) # (!\soc_inst|m0_1|u_logic|Oylwx4~1_combout ) ) + ( VCC ) + ( !VCC ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Oylwx4~1_combout ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(),
+ .sumout(),
+ .cout(\soc_inst|m0_1|u_logic|Add1~34_cout ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add1~34 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~34 .lut_mask = 64'h000000000000FFAA;
+defparam \soc_inst|m0_1|u_logic|Add1~34 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y8_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ranvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ranvx4~0_combout = ( \soc_inst|m0_1|u_logic|I3y2z4~q & ( \soc_inst|m0_1|u_logic|C9rvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Add1~5_sumout & ((!\soc_inst|interconnect_1|HRDATA[6]~36_combout ) #
+// (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I3y2z4~q & ( \soc_inst|m0_1|u_logic|C9rvx4~2_combout & ( (\soc_inst|m0_1|u_logic|Edovx4~combout & (!\soc_inst|m0_1|u_logic|Add1~5_sumout &
+// ((!\soc_inst|interconnect_1|HRDATA[6]~36_combout ) # (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|I3y2z4~q & ( !\soc_inst|m0_1|u_logic|C9rvx4~2_combout & ( (!\soc_inst|interconnect_1|HRDATA[6]~36_combout ) #
+// (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|I3y2z4~q & ( !\soc_inst|m0_1|u_logic|C9rvx4~2_combout & ( (\soc_inst|m0_1|u_logic|Edovx4~combout & ((!\soc_inst|interconnect_1|HRDATA[6]~36_combout ) #
+// (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ))) ) ) )
+
+ .dataa(!\soc_inst|interconnect_1|HRDATA[6]~36_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Add1~5_sumout ),
+ .datae(!\soc_inst|m0_1|u_logic|I3y2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ranvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ranvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ranvx4~0 .lut_mask = 64'h0E0EEEEE0E00EE00;
+defparam \soc_inst|m0_1|u_logic|Ranvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y8_N43
+dffeas \soc_inst|m0_1|u_logic|I3y2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Ranvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|I3y2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I3y2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I3y2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y9_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J6nvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|J6nvx4~1_combout = ( \soc_inst|m0_1|u_logic|Wfovx4~combout & ( (!\soc_inst|m0_1|u_logic|I3y2z4~q ) # ((!\soc_inst|m0_1|u_logic|Enw2z4~q & \soc_inst|m0_1|u_logic|Pfovx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Wfovx4~combout
+// & ( (!\soc_inst|m0_1|u_logic|Enw2z4~q & \soc_inst|m0_1|u_logic|Pfovx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Enw2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|I3y2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|J6nvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J6nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J6nvx4~1 .lut_mask = 64'h00CC00CCF0FCF0FC;
+defparam \soc_inst|m0_1|u_logic|J6nvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y6_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J6nvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|J6nvx4~2_combout = ( !\soc_inst|m0_1|u_logic|J6nvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|J6nvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[22]~35_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|interconnect_1|HRDATA[22]~35_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|J6nvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|J6nvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|J6nvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J6nvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J6nvx4~2 .lut_mask = 64'hFA00FA0000000000;
+defparam \soc_inst|m0_1|u_logic|J6nvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X30_Y6_N28
+dffeas \soc_inst|m0_1|u_logic|Zoy2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|J6nvx4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zoy2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zoy2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y4_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ho3wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ho3wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Zoy2z4~q & (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ho3wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ho3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ho3wx4~0 .lut_mask = 64'h2200220000000000;
+defparam \soc_inst|m0_1|u_logic|Ho3wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y4_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Df3wx4~1_combout = ( \soc_inst|m0_1|u_logic|Ho3wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Xiwvx4~0_combout & \soc_inst|m0_1|u_logic|V1yvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ho3wx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|Xiwvx4~0_combout & (\soc_inst|m0_1|u_logic|V1yvx4~0_combout & \soc_inst|m0_1|u_logic|W28wx4~0_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Xiwvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|W28wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ho3wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Df3wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Df3wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~1 .lut_mask = 64'h0003000303030303;
+defparam \soc_inst|m0_1|u_logic|Df3wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y6_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Df3wx4~0_combout = ( \soc_inst|m0_1|u_logic|Nkpvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q & !\soc_inst|m0_1|u_logic|U2x2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Df3wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Df3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~0 .lut_mask = 64'h00000000F000F000;
+defparam \soc_inst|m0_1|u_logic|Df3wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y6_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Df3wx4~2_combout = ( !\soc_inst|m0_1|u_logic|Df3wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Mn3wx4~0_combout & (!\soc_inst|m0_1|u_logic|Df3wx4~1_combout & ((!\soc_inst|m0_1|u_logic|Qp3wx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Jp3wx4~combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mn3wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qp3wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Df3wx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Df3wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Df3wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Df3wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~2 .lut_mask = 64'hA800A80000000000;
+defparam \soc_inst|m0_1|u_logic|Df3wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y5_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wpkwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wpkwx4~0_combout = ( \soc_inst|m0_1|u_logic|Ukpvx4~combout & ( (\soc_inst|m0_1|u_logic|Icyvx4~0_combout & !\soc_inst|m0_1|u_logic|U2x2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wpkwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wpkwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wpkwx4~0 .lut_mask = 64'h000000000F000F00;
+defparam \soc_inst|m0_1|u_logic|Wpkwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y5_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Df3wx4~6_combout = ( \soc_inst|m0_1|u_logic|H5fwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|G27wx4~0_combout & (((\soc_inst|m0_1|u_logic|Ukpvx4~combout & !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )))) #
+// (\soc_inst|m0_1|u_logic|G27wx4~0_combout & (((\soc_inst|m0_1|u_logic|Ukpvx4~combout & !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Wpkwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|H5fwx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|G27wx4~0_combout & \soc_inst|m0_1|u_logic|Wpkwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Wpkwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Df3wx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Df3wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~6 .lut_mask = 64'h111111111F111F11;
+defparam \soc_inst|m0_1|u_logic|Df3wx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y9_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Df3wx4~7_combout = ( !\soc_inst|m0_1|u_logic|Df3wx4~6_combout & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q ) # (((\soc_inst|m0_1|u_logic|Ark2z4~q & !\soc_inst|m0_1|u_logic|Ffj2z4~q )) # (\soc_inst|m0_1|u_logic|O5t2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Df3wx4~6_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Df3wx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Df3wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~7 .lut_mask = 64'hBFBBBFBB00000000;
+defparam \soc_inst|m0_1|u_logic|Df3wx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y8_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Df3wx4~5_combout = ( \soc_inst|m0_1|u_logic|Hdh2z4~0_combout & ( (\soc_inst|m0_1|u_logic|B73wx4~combout & ((!\soc_inst|m0_1|u_logic|Tki2z4~q ) # (\soc_inst|m0_1|u_logic|A0zvx4~0_combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Hdh2z4~0_combout & ( (\soc_inst|m0_1|u_logic|B73wx4~combout & \soc_inst|m0_1|u_logic|A0zvx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Df3wx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Df3wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~5 .lut_mask = 64'h0303232303032323;
+defparam \soc_inst|m0_1|u_logic|Df3wx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y9_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~8 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Df3wx4~8_combout = ( \soc_inst|m0_1|u_logic|Fij2z4~q & ( (\soc_inst|m0_1|u_logic|Df3wx4~7_combout & ((!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Fij2z4~q & ( (\soc_inst|m0_1|u_logic|Df3wx4~7_combout & !\soc_inst|m0_1|u_logic|Df3wx4~5_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Df3wx4~7_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Df3wx4~5_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Df3wx4~8_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Df3wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~8 .lut_mask = 64'h3030303033113311;
+defparam \soc_inst|m0_1|u_logic|Df3wx4~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y9_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~9 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Df3wx4~9_combout = ( \soc_inst|m0_1|u_logic|Df3wx4~8_combout & ( (\soc_inst|interconnect_1|HREADY~0_combout & (((!\soc_inst|m0_1|u_logic|Df3wx4~2_combout & !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )) #
+// (\soc_inst|m0_1|u_logic|Df3wx4~4_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~8_combout & ( \soc_inst|interconnect_1|HREADY~0_combout ) )
+
+ .dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Df3wx4~4_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Df3wx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Df3wx4~8_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Df3wx4~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~9 .lut_mask = 64'h5555555551115111;
+defparam \soc_inst|m0_1|u_logic|Df3wx4~9 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y4_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R1pvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R1pvx4~0_combout = ( !\soc_inst|m0_1|u_logic|O5t2z4~q & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q & (((\soc_inst|m0_1|u_logic|Ark2z4~q & ((\soc_inst|m0_1|u_logic|Df3wx4~9_combout )))))) ) ) # ( \soc_inst|m0_1|u_logic|O5t2z4~q & (
+// ((\soc_inst|m0_1|u_logic|Df3wx4~9_combout & ((!\soc_inst|m0_1|u_logic|U2x2z4~q ) # ((!\soc_inst|m0_1|u_logic|Tki2z4~q ) # (\soc_inst|m0_1|u_logic|W28wx4~0_combout ))))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|W28wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .datag(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R1pvx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|R1pvx4~0 .lut_mask = 64'h000000000A0AFFCF;
+defparam \soc_inst|m0_1|u_logic|R1pvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y4_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mekvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mekvx4~0_combout = ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout & ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout & ( \soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout & (
+// \soc_inst|m0_1|u_logic|P0pvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Xx93z4~q ) # (\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout & ( !\soc_inst|m0_1|u_logic|P0pvx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Xx93z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Xx93z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mekvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mekvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mekvx4~0 .lut_mask = 64'hAAAA0000AFAF0F0F;
+defparam \soc_inst|m0_1|u_logic|Mekvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y4_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mekvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mekvx4~1_combout = ( !\soc_inst|m0_1|u_logic|Mekvx4~0_combout & ( \soc_inst|m0_1|u_logic|W0pvx4~combout & ( (\soc_inst|m0_1|u_logic|G7x2z4~q & ((!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Ekovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mekvx4~0_combout & ( !\soc_inst|m0_1|u_logic|W0pvx4~combout & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ekovx4~combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ekovx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|G7x2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Mekvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mekvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mekvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mekvx4~1 .lut_mask = 64'hFCFC000000FC0000;
+defparam \soc_inst|m0_1|u_logic|Mekvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X39_Y4_N25
+dffeas \soc_inst|m0_1|u_logic|Xx93z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Mekvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Xx93z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xx93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xx93z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y8_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C372z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C372z4~0_combout = ( !\soc_inst|m0_1|u_logic|Bn53z4~q & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Rni2z4~q & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) #
+// ( \soc_inst|m0_1|u_logic|Bn53z4~q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Sd43z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Rni2z4~q & \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Bn53z4~q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Sd43z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Rni2z4~q & \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sd43z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Bn53z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C372z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C372z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C372z4~0 .lut_mask = 64'h0020002000300000;
+defparam \soc_inst|m0_1|u_logic|C372z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y6_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C372z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C372z4~1_combout = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( (!\soc_inst|m0_1|u_logic|J433z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+// # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q & ( (!\soc_inst|m0_1|u_logic|Av13z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|J433z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Av13z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C372z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C372z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C372z4~1 .lut_mask = 64'h0000C0000000A000;
+defparam \soc_inst|m0_1|u_logic|C372z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y10_N50
+dffeas \soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y10_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C372z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C372z4~2_combout = ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Wzy2z4~q & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Nt03z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~q & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nt03z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C372z4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C372z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C372z4~2 .lut_mask = 64'h00000000C000A000;
+defparam \soc_inst|m0_1|u_logic|C372z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y10_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z472z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z472z4~0_combout = ( !\soc_inst|m0_1|u_logic|Rni2z4~q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q & ( (\soc_inst|m0_1|u_logic|M1j2z4~q & (!\soc_inst|m0_1|u_logic|U5r2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|U5r2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z472z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z472z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z472z4~0 .lut_mask = 64'h0400000000000000;
+defparam \soc_inst|m0_1|u_logic|Z472z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y8_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C372z4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C372z4~3_combout = ( !\soc_inst|m0_1|u_logic|C372z4~2_combout & ( !\soc_inst|m0_1|u_logic|Z472z4~0_combout & ( (!\soc_inst|m0_1|u_logic|C372z4~0_combout & (!\soc_inst|m0_1|u_logic|C372z4~1_combout &
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|I7r2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|C372z4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|C372z4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|I7r2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|C372z4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Z472z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C372z4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C372z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C372z4~3 .lut_mask = 64'h80C0000000000000;
+defparam \soc_inst|m0_1|u_logic|C372z4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y8_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tpnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tpnvx4~0_combout = ( \soc_inst|m0_1|u_logic|C372z4~3_combout & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Xx93z4~q )) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Bdwwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C372z4~3_combout & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Xx93z4~q ) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|C372z4~3_combout & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Xx93z4~q )) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C372z4~3_combout & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Xx93z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Xx93z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Bdwwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|C372z4~3_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tpnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tpnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tpnvx4~0 .lut_mask = 64'hAACCAACCAAFFAAF0;
+defparam \soc_inst|m0_1|u_logic|Tpnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y6_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yuovx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yuovx4~combout = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( \soc_inst|m0_1|u_logic|K1wvx4~combout & ( (((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout & \soc_inst|m0_1|u_logic|Add3~25_sumout )) #
+// (\soc_inst|m0_1|u_logic|Add5~97_sumout )) # (\soc_inst|m0_1|u_logic|Tpnvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( \soc_inst|m0_1|u_logic|K1wvx4~combout & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout &
+// \soc_inst|m0_1|u_logic|Add3~25_sumout )) # (\soc_inst|m0_1|u_logic|Add5~97_sumout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout &
+// \soc_inst|m0_1|u_logic|Add3~25_sumout )) # (\soc_inst|m0_1|u_logic|Tpnvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout & ( (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout &
+// \soc_inst|m0_1|u_logic|Add3~25_sumout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tpnvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Add3~25_sumout ),
+ .datad(!\soc_inst|m0_1|u_logic|Add5~97_sumout ),
+ .datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yuovx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yuovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yuovx4 .lut_mask = 64'h0303575703FF57FF;
+defparam \soc_inst|m0_1|u_logic|Yuovx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X19_Y6_N55
+dffeas \soc_inst|ram_1|saved_word_address[2] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Yuovx4~combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|ram_1|always1~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|ram_1|saved_word_address [2]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|saved_word_address[2] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[2] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y5_N6
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[2]~2 (
+// Equation(s):
+// \soc_inst|ram_1|memory.raddr_a[2]~2_combout = ( \soc_inst|ram_1|always1~0_combout & ( (!\soc_inst|ram_1|write_cycle~q & ((\soc_inst|m0_1|u_logic|Yuovx4~combout ))) # (\soc_inst|ram_1|write_cycle~q & (\soc_inst|ram_1|saved_word_address [2])) ) ) # (
+// !\soc_inst|ram_1|always1~0_combout & ( \soc_inst|ram_1|saved_word_address [2] ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|ram_1|saved_word_address [2]),
+ .datac(!\soc_inst|ram_1|write_cycle~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yuovx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|always1~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|memory.raddr_a[2]~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory.raddr_a[2]~2 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[2]~2 .lut_mask = 64'h3333333303F303F3;
+defparam \soc_inst|ram_1|memory.raddr_a[2]~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y10_N0
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[21]~24 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[21]~24_combout = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21 & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout ) # (!\soc_inst|ram_1|byte_select [2]))) ) ) #
+// ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21 & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout & \soc_inst|ram_1|byte_select [2])) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout ),
+ .datad(!\soc_inst|ram_1|byte_select [2]),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21 ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|data_to_memory[21]~24_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[21]~24 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[21]~24 .lut_mask = 64'h0030003033303330;
+defparam \soc_inst|ram_1|data_to_memory[21]~24 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X14_Y5_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 (
+ .portawe(\soc_inst|ram_1|write_cycle~q ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|ram_1|data_to_memory[21]~24_combout ,\soc_inst|ram_1|data_to_memory[5]~23_combout }),
+ .portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+ .portabyteenamasks(1'b1),
+ .portbdatain(2'b00),
+ .portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_first_bit_number = 5;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_first_bit_number = 5;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003FF6DFE14020000010004040000000000800800800800800800800401555555555555412000000505550000000000001550";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y10_N48
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[21]~29 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[21]~29_combout = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21 & ( (!\soc_inst|interconnect_1|HRDATA[20]~7_combout & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) #
+// (\soc_inst|interconnect_1|HRDATA[20]~7_combout & (((!\soc_inst|interconnect_1|Equal1~0_combout ) # (\soc_inst|switches_1|switch_store[1][5]~q )))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21 & (
+// (!\soc_inst|interconnect_1|HRDATA[20]~7_combout & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[20]~7_combout & (((\soc_inst|interconnect_1|Equal1~0_combout & \soc_inst|switches_1|switch_store[1][5]~q )))) ) )
+
+ .dataa(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+ .datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
+ .datac(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
+ .datad(!\soc_inst|switches_1|switch_store[1][5]~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21 ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[21]~29_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[21]~29 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[21]~29 .lut_mask = 64'hA0A3A0A3ACAFACAF;
+defparam \soc_inst|interconnect_1|HRDATA[21]~29 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y9_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hphvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hphvx4~0_combout = ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout & ( !\soc_inst|interconnect_1|HRDATA[21]~29_combout ) ) # ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|interconnect_1|HRDATA[21]~29_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hphvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hphvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hphvx4~0 .lut_mask = 64'hFFFFFFFFFF00FF00;
+defparam \soc_inst|m0_1|u_logic|Hphvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y9_N26
+dffeas \soc_inst|m0_1|u_logic|Qlw2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Hphvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Qlw2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qlw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qlw2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y9_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6nvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q6nvx4~1_combout = ( \soc_inst|m0_1|u_logic|Wfovx4~combout & ( (!\soc_inst|m0_1|u_logic|F0y2z4~q ) # ((!\soc_inst|m0_1|u_logic|Qlw2z4~q & \soc_inst|m0_1|u_logic|Pfovx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Wfovx4~combout
+// & ( (!\soc_inst|m0_1|u_logic|Qlw2z4~q & \soc_inst|m0_1|u_logic|Pfovx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qlw2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|F0y2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q6nvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q6nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q6nvx4~1 .lut_mask = 64'h0A0A0A0AFF0AFF0A;
+defparam \soc_inst|m0_1|u_logic|Q6nvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y6_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6nvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q6nvx4~0_combout = ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout & ( \soc_inst|m0_1|u_logic|Vapvx4~combout & ( \soc_inst|interconnect_1|HRDATA[5]~28_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Scpvx4~2_combout & (
+// \soc_inst|m0_1|u_logic|Vapvx4~combout & ( (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ) # (\soc_inst|interconnect_1|HRDATA[5]~28_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Scpvx4~2_combout & ( !\soc_inst|m0_1|u_logic|Vapvx4~combout & (
+// !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|interconnect_1|HRDATA[5]~28_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q6nvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q6nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q6nvx4~0 .lut_mask = 64'hCCCC0000CFCF0F0F;
+defparam \soc_inst|m0_1|u_logic|Q6nvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y6_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6nvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q6nvx4~2_combout = ( !\soc_inst|m0_1|u_logic|Q6nvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Q6nvx4~1_combout & ((!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[21]~29_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|interconnect_1|HRDATA[21]~29_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Q6nvx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Q6nvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q6nvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q6nvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q6nvx4~2 .lut_mask = 64'hFA00FA0000000000;
+defparam \soc_inst|m0_1|u_logic|Q6nvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X30_Y6_N1
+dffeas \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Q6nvx4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y3_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jvxvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jvxvx4~combout = ( \soc_inst|m0_1|u_logic|Yzi2z4~q & ( \soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Xly2z4~q & \soc_inst|m0_1|u_logic|Rxl2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Rxl2z4~q ) # (\soc_inst|m0_1|u_logic|Xly2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yzi2z4~q & ( \soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q & (
+// (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Xly2z4~q & !\soc_inst|m0_1|u_logic|Rxl2z4~q )) # (\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Xly2z4~q & \soc_inst|m0_1|u_logic|Rxl2z4~q )) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Yzi2z4~q & ( !\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Xly2z4~q & !\soc_inst|m0_1|u_logic|Rxl2z4~q )) # (\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|Xly2z4~q & \soc_inst|m0_1|u_logic|Rxl2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yzi2z4~q & ( !\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Xly2z4~q ) #
+// (!\soc_inst|m0_1|u_logic|Rxl2z4~q ))) # (\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Xly2z4~q & !\soc_inst|m0_1|u_logic|Rxl2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jvxvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jvxvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jvxvx4 .lut_mask = 64'hEE88881188111177;
+defparam \soc_inst|m0_1|u_logic|Jvxvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y7_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vnqvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vnqvx4~0_combout = ( \soc_inst|m0_1|u_logic|Gxxvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Jvxvx4~combout $ (((!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Nqy2z4~q ) # (!\soc_inst|m0_1|u_logic|Zoy2z4~q
+// ))) # (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Nqy2z4~q & !\soc_inst|m0_1|u_logic|Zoy2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Gxxvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Jvxvx4~combout $
+// (((!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Zoy2z4~q ) # (\soc_inst|m0_1|u_logic|Nqy2z4~q ))) # (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Nqy2z4~q ) # (!\soc_inst|m0_1|u_logic|Zoy2z4~q ))))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Jvxvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vnqvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vnqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vnqvx4~0 .lut_mask = 64'h817E817E17E817E8;
+defparam \soc_inst|m0_1|u_logic|Vnqvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y7_N26
+dffeas \soc_inst|m0_1|u_logic|Bsy2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|V5nvx4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bsy2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bsy2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y7_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y7xvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y7xvx4~combout = ( !\soc_inst|m0_1|u_logic|Bsy2z4~q & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Vnqvx4~0_combout & \soc_inst|m0_1|u_logic|Ljpvx4~0_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Vnqvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ljpvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Y7xvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y7xvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y7xvx4 .lut_mask = 64'h000C000C00000000;
+defparam \soc_inst|m0_1|u_logic|Y7xvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y7_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gqxvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gqxvx4~combout = ( \soc_inst|m0_1|u_logic|Gxxvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~q & (!\soc_inst|m0_1|u_logic|Jvxvx4~combout & (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q $ (!\soc_inst|m0_1|u_logic|Zoy2z4~q )))) )
+// ) # ( !\soc_inst|m0_1|u_logic|Gxxvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~q & ((!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Zoy2z4~q & \soc_inst|m0_1|u_logic|Jvxvx4~combout )) #
+// (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Zoy2z4~q & !\soc_inst|m0_1|u_logic|Jvxvx4~combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Jvxvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gqxvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gqxvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gqxvx4 .lut_mask = 64'h0480048048004800;
+defparam \soc_inst|m0_1|u_logic|Gqxvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y3_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Irxvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Irxvx4~0_combout = ( \soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Rxl2z4~q & (!\soc_inst|m0_1|u_logic|Xly2z4~q & (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Yzi2z4~q ))) ) ) #
+// ( !\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Rxl2z4~q & ((!\soc_inst|m0_1|u_logic|Xly2z4~q & ((!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Yzi2z4~q ))) # (\soc_inst|m0_1|u_logic|Xly2z4~q &
+// (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Yzi2z4~q )))) # (\soc_inst|m0_1|u_logic|Rxl2z4~q & (!\soc_inst|m0_1|u_logic|Xly2z4~q & (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Yzi2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Irxvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Irxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Irxvx4~0 .lut_mask = 64'hE880E88080008000;
+defparam \soc_inst|m0_1|u_logic|Irxvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y7_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zpxvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zpxvx4~0_combout = ( \soc_inst|m0_1|u_logic|Jvxvx4~combout & ( \soc_inst|m0_1|u_logic|Gxxvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Irxvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Jvxvx4~combout & (
+// \soc_inst|m0_1|u_logic|Gxxvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Irxvx4~0_combout $ (((!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Zoy2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Jvxvx4~combout & (
+// !\soc_inst|m0_1|u_logic|Gxxvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Irxvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Jvxvx4~combout & ( !\soc_inst|m0_1|u_logic|Gxxvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Irxvx4~0_combout $
+// (((!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Zoy2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Irxvx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Jvxvx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zpxvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zpxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zpxvx4~0 .lut_mask = 64'h1E1EF0F07878F0F0;
+defparam \soc_inst|m0_1|u_logic|Zpxvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y7_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hnxvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hnxvx4~0_combout = ( \soc_inst|m0_1|u_logic|Xipvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Y7xvx4~combout & (\soc_inst|m0_1|u_logic|Gqxvx4~combout & !\soc_inst|m0_1|u_logic|Zpxvx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Y7xvx4~combout & ((!\soc_inst|m0_1|u_logic|Zpxvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Gqxvx4~combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Y7xvx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Gqxvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Zpxvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xipvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hnxvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hnxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hnxvx4~0 .lut_mask = 64'h000000005F055F05;
+defparam \soc_inst|m0_1|u_logic|Hnxvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y7_N32
+dffeas \soc_inst|m0_1|u_logic|Zcn2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Z4xvx4~3_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Zcn2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zcn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zcn2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y7_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mmxvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mmxvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Vopvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Uup2z4~q $ (((!\soc_inst|m0_1|u_logic|Fzl2z4~q & (!\soc_inst|m0_1|u_logic|Zcn2z4~q & !\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Zcn2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Uup2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Vopvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mmxvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mmxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mmxvx4~0 .lut_mask = 64'h78F078F000000000;
+defparam \soc_inst|m0_1|u_logic|Mmxvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y7_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbxvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sbxvx4~1_combout = ( !\soc_inst|m0_1|u_logic|Mmxvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q & (((!\soc_inst|m0_1|u_logic|Nsk2z4~q )) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|O5t2z4~q &
+// (((!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Mmxvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sbxvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~1 .lut_mask = 64'hFA72FA7200000000;
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y7_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbxvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sbxvx4~2_combout = ( \soc_inst|m0_1|u_logic|Dsqvx4~combout & ( (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sbxvx4~1_combout & ((!\soc_inst|m0_1|u_logic|Zpqvx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Dsqvx4~combout & ( (\soc_inst|m0_1|u_logic|Sbxvx4~1_combout & ((!\soc_inst|m0_1|u_logic|Zpqvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Zpqvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Sbxvx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Dsqvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sbxvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~2 .lut_mask = 64'h0C0F0C0F04050405;
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y4_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gokwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gokwx4~0_combout = ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Swy2z4~q & (\soc_inst|m0_1|u_logic|Icyvx4~0_combout & \soc_inst|m0_1|u_logic|U2x2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gokwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gokwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gokwx4~0 .lut_mask = 64'h0005000500000000;
+defparam \soc_inst|m0_1|u_logic|Gokwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y3_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbxvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sbxvx4~0_combout = ( \soc_inst|m0_1|u_logic|Gtp2z4~q & ( \soc_inst|m0_1|u_logic|Irqvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & (((\soc_inst|m0_1|u_logic|A1yvx4~0_combout & \soc_inst|m0_1|u_logic|U2x2z4~q ))
+// # (\soc_inst|m0_1|u_logic|Gokwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gtp2z4~q & ( \soc_inst|m0_1|u_logic|Irqvx4~1_combout ) ) # ( \soc_inst|m0_1|u_logic|Gtp2z4~q & ( !\soc_inst|m0_1|u_logic|Irqvx4~1_combout & (
+// (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & (((\soc_inst|m0_1|u_logic|A1yvx4~0_combout & \soc_inst|m0_1|u_logic|U2x2z4~q )) # (\soc_inst|m0_1|u_logic|Gokwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gtp2z4~q & (
+// !\soc_inst|m0_1|u_logic|Irqvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & (((\soc_inst|m0_1|u_logic|A1yvx4~0_combout & \soc_inst|m0_1|u_logic|U2x2z4~q )) # (\soc_inst|m0_1|u_logic|Gokwx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|A1yvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Gokwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Gtp2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Irqvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sbxvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~0 .lut_mask = 64'h02AA02AAFFFF02AA;
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y8_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbxvx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sbxvx4~3_combout = ( !\soc_inst|m0_1|u_logic|Sbxvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Hnxvx4~0_combout & (\soc_inst|m0_1|u_logic|Sbxvx4~2_combout & ((\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ) #
+// (\soc_inst|m0_1|u_logic|Rmpvx4~1_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Hnxvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sbxvx4~2_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Sbxvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sbxvx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~3 .lut_mask = 64'h004C004C00000000;
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X35_Y8_N34
+dffeas \soc_inst|m0_1|u_logic|Uup2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Sbxvx4~3_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Uup2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uup2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uup2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y9_N1
+dffeas \soc_inst|m0_1|u_logic|H2m2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|H2m2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H2m2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H2m2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y9_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fzxwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fzxwx4~0_combout = ( \soc_inst|m0_1|u_logic|Yaz2z4~q & ( \soc_inst|m0_1|u_logic|Svk2z4~q & ( !\soc_inst|m0_1|u_logic|Yb93z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q & ( \soc_inst|m0_1|u_logic|Svk2z4~q & (
+// !\soc_inst|m0_1|u_logic|Hbv2z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~q & ( !\soc_inst|m0_1|u_logic|Svk2z4~q & ( !\soc_inst|m0_1|u_logic|T0m2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q & ( !\soc_inst|m0_1|u_logic|Svk2z4~q & (
+// !\soc_inst|m0_1|u_logic|H2m2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T0m2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Yb93z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Hbv2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|H2m2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fzxwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fzxwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fzxwx4~0 .lut_mask = 64'hFF00AAAAF0F0CCCC;
+defparam \soc_inst|m0_1|u_logic|Fzxwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X48_Y8_N16
+dffeas \soc_inst|m0_1|u_logic|H783z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|H783z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H783z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H783z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X48_Y8_N37
+dffeas \soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y10_N58
+dffeas \soc_inst|m0_1|u_logic|Yx63z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Yx63z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yx63z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yx63z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y10_N1
+dffeas \soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fzxwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fzxwx4~1_combout = ( \soc_inst|m0_1|u_logic|Yx63z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Svk2z4~q & ((!\soc_inst|m0_1|u_logic|Yaz2z4~q &
+// ((!\soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|H783z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yx63z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE_q & (
+// (!\soc_inst|m0_1|u_logic|Svk2z4~q & (((\soc_inst|m0_1|u_logic|Yaz2z4~q )))) # (\soc_inst|m0_1|u_logic|Svk2z4~q & ((!\soc_inst|m0_1|u_logic|Yaz2z4~q & ((!\soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q &
+// (!\soc_inst|m0_1|u_logic|H783z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yx63z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q & (((!\soc_inst|m0_1|u_logic|Yaz2z4~q )))) #
+// (\soc_inst|m0_1|u_logic|Svk2z4~q & ((!\soc_inst|m0_1|u_logic|Yaz2z4~q & ((!\soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q & (!\soc_inst|m0_1|u_logic|H783z4~DUPLICATE_q )))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Yx63z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q ) # ((!\soc_inst|m0_1|u_logic|Yaz2z4~q & ((!\soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q
+// & (!\soc_inst|m0_1|u_logic|H783z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H783z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yx63z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fzxwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fzxwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fzxwx4~1 .lut_mask = 64'hFAEEFA4450EE5044;
+defparam \soc_inst|m0_1|u_logic|Fzxwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fzxwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fzxwx4~combout = ( \soc_inst|m0_1|u_logic|Fzxwx4~0_combout & ( \soc_inst|m0_1|u_logic|Fzxwx4~1_combout & ( \soc_inst|m0_1|u_logic|T1d3z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Fzxwx4~0_combout & (
+// \soc_inst|m0_1|u_logic|Fzxwx4~1_combout & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Fzxwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Fzxwx4~1_combout & (
+// (\soc_inst|m0_1|u_logic|T1d3z4~q & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Fzxwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fzxwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fzxwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fzxwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fzxwx4 .lut_mask = 64'h0000050550505555;
+defparam \soc_inst|m0_1|u_logic|Fzxwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wxxwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wxxwx4~0_combout = ( \soc_inst|m0_1|u_logic|Fzxwx4~combout & ( (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q & (((\soc_inst|m0_1|u_logic|Sy2wx4~0_combout & !\soc_inst|m0_1|u_logic|Uup2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Fzxwx4~combout & ( (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout & (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Uup2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Uup2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fzxwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wxxwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wxxwx4~0 .lut_mask = 64'h4040404040CC40CC;
+defparam \soc_inst|m0_1|u_logic|Wxxwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y9nwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y9nwx4~0_combout = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & ( (((!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Svxwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Tzxwx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Svxwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y9nwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y9nwx4~0 .lut_mask = 64'h00000000F7FFF7FF;
+defparam \soc_inst|m0_1|u_logic|Y9nwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y11_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkyvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kkyvx4~0_combout = ( \soc_inst|m0_1|u_logic|Manwx4~0_combout & ( \soc_inst|m0_1|u_logic|E6nwx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout & ( (\soc_inst|m0_1|u_logic|E6nwx4~0_combout &
+// (\soc_inst|m0_1|u_logic|Y9nwx4~0_combout & ((\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kkyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kkyvx4~0 .lut_mask = 64'h0111011155555555;
+defparam \soc_inst|m0_1|u_logic|Kkyvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y12_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zluvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zluvx4~1_combout = ( \soc_inst|m0_1|u_logic|Jkmwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Ojmwx4~2_combout & !\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Jkmwx4~1_combout & (
+// (!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ojmwx4~2_combout & !\soc_inst|m0_1|u_logic|Amyvx4~2_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zluvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zluvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zluvx4~1 .lut_mask = 64'hFFA0FFA0A0A0A0A0;
+defparam \soc_inst|m0_1|u_logic|Zluvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y12_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zluvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zluvx4~0_combout = ( \soc_inst|m0_1|u_logic|Wjyvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout & \soc_inst|m0_1|u_logic|Omyvx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Wjyvx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ) # ((!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout & \soc_inst|m0_1|u_logic|Omyvx4~1_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zluvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zluvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zluvx4~0 .lut_mask = 64'hCCEECCEE00AA00AA;
+defparam \soc_inst|m0_1|u_logic|Zluvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zluvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zluvx4~2_combout = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Zluvx4~1_combout & !\soc_inst|m0_1|u_logic|Zluvx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|B8nwx4~1_combout & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout & (!\soc_inst|m0_1|u_logic|Zluvx4~1_combout & !\soc_inst|m0_1|u_logic|Zluvx4~0_combout )) ) ) ) # (
+// \soc_inst|m0_1|u_logic|B8nwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout & (!\soc_inst|m0_1|u_logic|Zluvx4~1_combout & !\soc_inst|m0_1|u_logic|Zluvx4~0_combout )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|B8nwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout & (!\soc_inst|m0_1|u_logic|Zluvx4~1_combout & !\soc_inst|m0_1|u_logic|Zluvx4~0_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Zluvx4~1_combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Zluvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zluvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zluvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zluvx4~2 .lut_mask = 64'h880088008800CC00;
+defparam \soc_inst|m0_1|u_logic|Zluvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9mvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U9mvx4~0_combout = ( \soc_inst|m0_1|u_logic|Uaj2z4~q & ( \soc_inst|m0_1|u_logic|Zluvx4~2_combout & ( ((!\soc_inst|m0_1|u_logic|Lbn2z4~q & \soc_inst|m0_1|u_logic|H1rvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) )
+// ) ) # ( !\soc_inst|m0_1|u_logic|Uaj2z4~q & ( \soc_inst|m0_1|u_logic|Zluvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Lbn2z4~q & \soc_inst|m0_1|u_logic|H1rvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Uaj2z4~q & (
+// !\soc_inst|m0_1|u_logic|Zluvx4~2_combout & ( ((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Lbn2z4~q & \soc_inst|m0_1|u_logic|H1rvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Uaj2z4~q & ( !\soc_inst|m0_1|u_logic|Zluvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout & ((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Lbn2z4~q & \soc_inst|m0_1|u_logic|H1rvx4~0_combout
+// )))) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout & (!\soc_inst|m0_1|u_logic|Lbn2z4~q & ((\soc_inst|m0_1|u_logic|H1rvx4~0_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Lbn2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Zluvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U9mvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U9mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U9mvx4~0 .lut_mask = 64'hA0ECF5FD00CC55DD;
+defparam \soc_inst|m0_1|u_logic|U9mvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y14_N32
+dffeas \soc_inst|m0_1|u_logic|Uaj2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|U9mvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uaj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uaj2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rryvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rryvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~q & (!\soc_inst|m0_1|u_logic|Uaj2z4~q &
+// (\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rryvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rryvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rryvx4~0 .lut_mask = 64'h0000000008000000;
+defparam \soc_inst|m0_1|u_logic|Rryvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y8_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Upyvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Upyvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Kryvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Rryvx4~0_combout & !\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rryvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kryvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Upyvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Upyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Upyvx4~0 .lut_mask = 64'h0000000044440000;
+defparam \soc_inst|m0_1|u_logic|Upyvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y8_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R3mwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R3mwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Ark2z4~q & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q & (\soc_inst|m0_1|u_logic|Nsk2z4~q & (\soc_inst|m0_1|u_logic|Pcyvx4~combout & (\soc_inst|m0_1|u_logic|Sgj2z4~q &
+// !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout )))) ) ) # ( \soc_inst|m0_1|u_logic|Ark2z4~q & ( ((\soc_inst|m0_1|u_logic|Nsk2z4~q & (\soc_inst|m0_1|u_logic|B73wx4~combout & (\soc_inst|m0_1|u_logic|Sgj2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+ .datag(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R3mwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R3mwx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|R3mwx4~0 .lut_mask = 64'h0002000300000003;
+defparam \soc_inst|m0_1|u_logic|R3mwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X30_Y7_N46
+dffeas \soc_inst|m0_1|u_logic|Pet2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|R3mwx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Pet2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pet2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pet2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y7_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nen2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nen2z4~0_combout = ( \soc_inst|m0_1|u_logic|Htyvx4~3_combout & ( (\soc_inst|m0_1|u_logic|Pet2z4~q & !\soc_inst|m0_1|u_logic|J4x2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Htyvx4~3_combout & ( ((\soc_inst|m0_1|u_logic|Pet2z4~q &
+// !\soc_inst|m0_1|u_logic|J4x2z4~q )) # (\soc_inst|m0_1|u_logic|Kryvx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Pet2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Kryvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nen2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nen2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nen2z4~0 .lut_mask = 64'h3F0F3F0F33003300;
+defparam \soc_inst|m0_1|u_logic|Nen2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y7_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nen2z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nen2z4~1_combout = ( \soc_inst|m0_1|u_logic|Nen2z4~q & ( \soc_inst|m0_1|u_logic|Nen2z4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|Nen2z4~q & ( \soc_inst|m0_1|u_logic|Nen2z4~0_combout & (
+// (\soc_inst|interconnect_1|HREADY~0_combout & (((\soc_inst|m0_1|u_logic|Upyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Vbovx4~0_combout )) # (\soc_inst|m0_1|u_logic|Msyvx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Nen2z4~q & (
+// !\soc_inst|m0_1|u_logic|Nen2z4~0_combout & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # ((!\soc_inst|m0_1|u_logic|Msyvx4~combout & (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout & !\soc_inst|m0_1|u_logic|Upyvx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+ .datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Upyvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Nen2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Nen2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nen2z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nen2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nen2z4~1 .lut_mask = 64'h0000ECCC1333FFFF;
+defparam \soc_inst|m0_1|u_logic|Nen2z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X22_Y7_N16
+dffeas \soc_inst|m0_1|u_logic|Nen2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Nen2z4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Nen2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nen2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nen2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y9_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cr1wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cr1wx4~1_combout = ( \soc_inst|m0_1|u_logic|Zluvx4~2_combout & ( (\soc_inst|m0_1|u_logic|Cr1wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) # (!\soc_inst|m0_1|u_logic|Nen2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Nen2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Cr1wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Zluvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~1 .lut_mask = 64'h0000000000FA00FA;
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X39_Y9_N2
+dffeas \soc_inst|m0_1|u_logic|Okn2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Okn2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Okn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Okn2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X39_Y9_N44
+dffeas \soc_inst|m0_1|u_logic|X563z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|X563z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X563z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X563z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y9_N5
+dffeas \soc_inst|m0_1|u_logic|Vu93z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Vu93z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vu93z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vu93z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y9_N8
+dffeas \soc_inst|m0_1|u_logic|Mhn2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Mhn2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mhn2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mhn2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X39_Y7_N25
+dffeas \soc_inst|m0_1|u_logic|Yfn2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Yfn2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yfn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yfn2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X40_Y7_N49
+dffeas \soc_inst|m0_1|u_logic|Psv2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Psv2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Psv2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Psv2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y9_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q1ywx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q1ywx4~0_combout = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Vu93z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Psv2z4~DUPLICATE_q ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Yfn2z4~q ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Mhn2z4~DUPLICATE_q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vu93z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Mhn2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yfn2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Psv2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q1ywx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q1ywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q1ywx4~0 .lut_mask = 64'hCCCCF0F0FF00AAAA;
+defparam \soc_inst|m0_1|u_logic|Q1ywx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X35_Y9_N7
+dffeas \soc_inst|m0_1|u_logic|Gf73z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Gf73z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gf73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gf73z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X35_Y9_N17
+dffeas \soc_inst|m0_1|u_logic|Po83z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Po83z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Po83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Po83z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X40_Y7_N26
+dffeas \soc_inst|m0_1|u_logic|Gju2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Gju2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gju2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gju2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X39_Y5_N46
+dffeas \soc_inst|m0_1|u_logic|Ajn2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ajn2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ajn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ajn2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y9_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q1ywx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q1ywx4~1_combout = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Po83z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (
+// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Gf73z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Gju2z4~q ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Ajn2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Gf73z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Po83z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Gju2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ajn2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q1ywx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q1ywx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q1ywx4~1 .lut_mask = 64'hFF00F0F0AAAACCCC;
+defparam \soc_inst|m0_1|u_logic|Q1ywx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y9_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q1ywx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q1ywx4~combout = ( \soc_inst|m0_1|u_logic|Q1ywx4~0_combout & ( \soc_inst|m0_1|u_logic|Q1ywx4~1_combout & ( \soc_inst|m0_1|u_logic|T1d3z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Q1ywx4~0_combout & (
+// \soc_inst|m0_1|u_logic|Q1ywx4~1_combout & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Q1ywx4~0_combout & ( !\soc_inst|m0_1|u_logic|Q1ywx4~1_combout & (
+// (\soc_inst|m0_1|u_logic|T1d3z4~q & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Q1ywx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Q1ywx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q1ywx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q1ywx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q1ywx4 .lut_mask = 64'h0000050550505555;
+defparam \soc_inst|m0_1|u_logic|Q1ywx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y9_N49
+dffeas \soc_inst|m0_1|u_logic|Wa03z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wa03z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wa03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wa03z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y9_N8
+dffeas \soc_inst|m0_1|u_logic|Fn33z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Fn33z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fn33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fn33z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y9_N26
+dffeas \soc_inst|m0_1|u_logic|Q713z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Q713z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q713z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Q713z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y10_N17
+dffeas \soc_inst|m0_1|u_logic|Wd23z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wd23z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wd23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wd23z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y9_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sh5wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sh5wx4~2_combout = ( \soc_inst|m0_1|u_logic|Wd23z4~q & ( \soc_inst|m0_1|u_logic|Jw93z4~q & ( (\soc_inst|m0_1|u_logic|Svk2z4~q & ((!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Q713z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Fn33z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wd23z4~q & ( \soc_inst|m0_1|u_logic|Jw93z4~q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (((\soc_inst|m0_1|u_logic|Svk2z4~q &
+// !\soc_inst|m0_1|u_logic|Q713z4~q )))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Fn33z4~q ) # ((!\soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wd23z4~q & ( !\soc_inst|m0_1|u_logic|Jw93z4~q & (
+// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (((!\soc_inst|m0_1|u_logic|Svk2z4~q ) # (!\soc_inst|m0_1|u_logic|Q713z4~q )))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Fn33z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) #
+// ( !\soc_inst|m0_1|u_logic|Wd23z4~q & ( !\soc_inst|m0_1|u_logic|Jw93z4~q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q ) # ((!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Q713z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q &
+// (!\soc_inst|m0_1|u_logic|Fn33z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fn33z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Q713z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wd23z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Jw93z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sh5wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~2 .lut_mask = 64'hFEF4AEA45E540E04;
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X39_Y9_N25
+dffeas \soc_inst|m0_1|u_logic|Ow43z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ow43z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ow43z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ow43z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X40_Y7_N19
+dffeas \soc_inst|m0_1|u_logic|Cmn2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Cmn2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cmn2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cmn2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y9_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sh5wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sh5wx4~1_combout = ( \soc_inst|m0_1|u_logic|Cmn2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Ow43z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Cmn2z4~DUPLICATE_q & (
+// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Ow43z4~DUPLICATE_q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ow43z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Cmn2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sh5wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~1 .lut_mask = 64'hF5A0F5A055005500;
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y9_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sh5wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sh5wx4~3_combout = ( !\soc_inst|m0_1|u_logic|Svk2z4~q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (((\soc_inst|m0_1|u_logic|Sh5wx4~2_combout )))) #
+// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sh5wx4~1_combout )))) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q &
+// (((\soc_inst|m0_1|u_logic|Sh5wx4~2_combout )))) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Wa03z4~q ))))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wa03z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sh5wx4~2_combout ),
+ .datag(!\soc_inst|m0_1|u_logic|Sh5wx4~1_combout ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sh5wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~3 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~3 .lut_mask = 64'h020220008A8AA888;
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y9_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sh5wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sh5wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Q1ywx4~combout & ( !\soc_inst|m0_1|u_logic|Sh5wx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Okn2z4~q & (!\soc_inst|m0_1|u_logic|C51xx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ) # (\soc_inst|m0_1|u_logic|X563z4~q )))) # (\soc_inst|m0_1|u_logic|Okn2z4~q & (((!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ) # (\soc_inst|m0_1|u_logic|X563z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Okn2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|X563z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Q1ywx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sh5wx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~0 .lut_mask = 64'hDD0D000000000000;
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[2] (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hwdata_o [2] = ( !\soc_inst|m0_1|u_logic|Sh5wx4~0_combout & ( \soc_inst|m0_1|u_logic|Y9t2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hwdata_o [2]),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hwdata_o[2] .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[2] .lut_mask = 64'h0F0F0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[2] .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y8_N27
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[2]~7 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[2]~7_combout = ( \soc_inst|ram_1|write_cycle~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|hwdata_o [2] & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ) # (\soc_inst|ram_1|byte_select [0]) ) ) ) # (
+// \soc_inst|ram_1|write_cycle~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|hwdata_o [2] & ( (!\soc_inst|ram_1|byte_select [0] & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|ram_1|byte_select [0]),
+ .datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ),
+ .datad(gnd),
+ .datae(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o [2]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|data_to_memory[2]~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[2]~7 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[2]~7 .lut_mask = 64'h00000C0C00003F3F;
+defparam \soc_inst|ram_1|data_to_memory[2]~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y9_N45
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[2]~14 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[2]~14_combout = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout & ( \soc_inst|interconnect_1|HRDATA[7]~10_combout & ( (!\soc_inst|interconnect_1|Equal1~0_combout ) #
+// (\soc_inst|switches_1|switch_store[0][2]~q ) ) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout & ( \soc_inst|interconnect_1|HRDATA[7]~10_combout & ( (\soc_inst|interconnect_1|Equal1~0_combout &
+// \soc_inst|switches_1|switch_store[0][2]~q ) ) ) ) # ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout & ( !\soc_inst|interconnect_1|HRDATA[7]~10_combout & ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout ) ) ) # (
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout & ( !\soc_inst|interconnect_1|HRDATA[7]~10_combout & ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout ) ) )
+
+ .dataa(!\soc_inst|interconnect_1|Equal1~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+ .datad(!\soc_inst|switches_1|switch_store[0][2]~q ),
+ .datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[7]~10_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[2]~14_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[2]~14 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[2]~14 .lut_mask = 64'hF0F0F0F00055AAFF;
+defparam \soc_inst|interconnect_1|HRDATA[2]~14 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y9_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L7nvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|L7nvx4~0_combout = ( \soc_inst|interconnect_1|HRDATA[2]~14_combout & ( ((!\soc_inst|m0_1|u_logic|Viy2z4~q & !\soc_inst|m0_1|u_logic|Scpvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Vapvx4~combout ) ) ) # (
+// !\soc_inst|interconnect_1|HRDATA[2]~14_combout & ( (!\soc_inst|m0_1|u_logic|Viy2z4~q & !\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[2]~14_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|L7nvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L7nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L7nvx4~0 .lut_mask = 64'hA0A0A0A0A0FFA0FF;
+defparam \soc_inst|m0_1|u_logic|L7nvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y9_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cqhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cqhvx4~0_combout = ( \soc_inst|interconnect_1|HRDATA[18]~13_combout & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) ) # ( !\soc_inst|interconnect_1|HRDATA[18]~13_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[18]~13_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cqhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cqhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cqhvx4~0 .lut_mask = 64'hFFFFFFFFF0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Cqhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y9_N16
+dffeas \soc_inst|m0_1|u_logic|Ahw2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Cqhvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ahw2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ahw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ahw2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y9_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L7nvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|L7nvx4~1_combout = ( \soc_inst|m0_1|u_logic|Wfovx4~combout & ( (!\soc_inst|m0_1|u_logic|Lbn2z4~q ) # ((!\soc_inst|m0_1|u_logic|Ahw2z4~q & \soc_inst|m0_1|u_logic|Pfovx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Wfovx4~combout
+// & ( (!\soc_inst|m0_1|u_logic|Ahw2z4~q & \soc_inst|m0_1|u_logic|Pfovx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ahw2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Lbn2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|L7nvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L7nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L7nvx4~1 .lut_mask = 64'h00AA00AAF0FAF0FA;
+defparam \soc_inst|m0_1|u_logic|L7nvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y9_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L7nvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|L7nvx4~2_combout = ( !\soc_inst|m0_1|u_logic|L7nvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|L7nvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[18]~13_combout ))) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|L7nvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+ .datad(!\soc_inst|interconnect_1|HRDATA[18]~13_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|L7nvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|L7nvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L7nvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L7nvx4~2 .lut_mask = 64'hCCC0CCC000000000;
+defparam \soc_inst|m0_1|u_logic|L7nvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y9_N37
+dffeas \soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|L7nvx4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L4bwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|L4bwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Aok2z4~q &
+// (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|L4bwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L4bwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L4bwx4~0 .lut_mask = 64'h0002000000000000;
+defparam \soc_inst|m0_1|u_logic|L4bwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S4bwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S4bwx4~0_combout = ( \soc_inst|m0_1|u_logic|I4dwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Fzl2z4~q & ((\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Z4bwx4~2_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|I4dwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Fzl2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Z4bwx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|I4dwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S4bwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S4bwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S4bwx4~0 .lut_mask = 64'hF000F00070007000;
+defparam \soc_inst|m0_1|u_logic|S4bwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q3bwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q3bwx4~0_combout = ( !\soc_inst|m0_1|u_logic|S4bwx4~0_combout & ( \soc_inst|m0_1|u_logic|R40wx4~combout & ( (!\soc_inst|m0_1|u_logic|L4bwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Uup2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S4bwx4~0_combout & ( !\soc_inst|m0_1|u_logic|R40wx4~combout & ( (!\soc_inst|m0_1|u_logic|L4bwx4~0_combout & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) # (\soc_inst|m0_1|u_logic|Uup2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|L4bwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Uup2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|S4bwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q3bwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q3bwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q3bwx4~0 .lut_mask = 64'h8A0000008A8A0000;
+defparam \soc_inst|m0_1|u_logic|Q3bwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y13_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bmhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bmhvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Add2~17_sumout )))) #
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & (((\soc_inst|m0_1|u_logic|G7x2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|G7x2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Add2~17_sumout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bmhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bmhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bmhvx4~0 .lut_mask = 64'hCF8BCF8B00000000;
+defparam \soc_inst|m0_1|u_logic|Bmhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bmhvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bmhvx4~1_combout = ( \soc_inst|m0_1|u_logic|Xdfwx4~combout & ( \soc_inst|m0_1|u_logic|Bmhvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Add5~33_sumout & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) #
+// (\soc_inst|m0_1|u_logic|U0vvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xdfwx4~combout & ( \soc_inst|m0_1|u_logic|Bmhvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|U0vvx4~2_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Add5~33_sumout ),
+ .datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|U0vvx4~2_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Bmhvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bmhvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bmhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bmhvx4~1 .lut_mask = 64'h00000000CFCF8A8A;
+defparam \soc_inst|m0_1|u_logic|Bmhvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X39_Y13_N25
+dffeas \soc_inst|m0_1|u_logic|G7x2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Bmhvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|G7x2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G7x2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G7x2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y6_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ekovx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ekovx4~combout = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( \soc_inst|m0_1|u_logic|K1wvx4~combout & ( (((\soc_inst|m0_1|u_logic|Add3~29_sumout & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) #
+// (\soc_inst|m0_1|u_logic|Add5~33_sumout )) # (\soc_inst|m0_1|u_logic|Aqnvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( \soc_inst|m0_1|u_logic|K1wvx4~combout & ( ((\soc_inst|m0_1|u_logic|Add3~29_sumout &
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Add5~33_sumout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout & ( ((\soc_inst|m0_1|u_logic|Add3~29_sumout &
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Aqnvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout & ( (\soc_inst|m0_1|u_logic|Add3~29_sumout &
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Add3~29_sumout ),
+ .datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Aqnvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Add5~33_sumout ),
+ .datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ekovx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ekovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ekovx4 .lut_mask = 64'h11111F1F11FF1FFF;
+defparam \soc_inst|m0_1|u_logic|Ekovx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y6_N45
+cyclonev_lcell_comb \soc_inst|ram_1|saved_word_address[1]~feeder (
+// Equation(s):
+// \soc_inst|ram_1|saved_word_address[1]~feeder_combout = ( \soc_inst|m0_1|u_logic|Ekovx4~combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ekovx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|saved_word_address[1]~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|saved_word_address[1]~feeder .extended_lut = "off";
+defparam \soc_inst|ram_1|saved_word_address[1]~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|ram_1|saved_word_address[1]~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X18_Y6_N46
+dffeas \soc_inst|ram_1|saved_word_address[1] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|ram_1|saved_word_address[1]~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|ram_1|always1~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|ram_1|saved_word_address [1]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|saved_word_address[1] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y5_N54
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[1]~1 (
+// Equation(s):
+// \soc_inst|ram_1|memory.raddr_a[1]~1_combout = ( \soc_inst|ram_1|always1~0_combout & ( (!\soc_inst|ram_1|write_cycle~q & (\soc_inst|m0_1|u_logic|Ekovx4~combout )) # (\soc_inst|ram_1|write_cycle~q & ((\soc_inst|ram_1|saved_word_address [1]))) ) ) # (
+// !\soc_inst|ram_1|always1~0_combout & ( \soc_inst|ram_1|saved_word_address [1] ) )
+
+ .dataa(!\soc_inst|ram_1|write_cycle~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ekovx4~combout ),
+ .datad(!\soc_inst|ram_1|saved_word_address [1]),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|always1~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|memory.raddr_a[1]~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory.raddr_a[1]~1 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[1]~1 .lut_mask = 64'h00FF00FF0A5F0A5F;
+defparam \soc_inst|ram_1|memory.raddr_a[1]~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y10_N15
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[17]~10 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[17]~10_combout = ( \soc_inst|ram_1|write_cycle~DUPLICATE_q & ( (!\soc_inst|ram_1|byte_select [2] & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 )) # (\soc_inst|ram_1|byte_select [2] &
+// ((!\soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout ))) ) )
+
+ .dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 ),
+ .datab(gnd),
+ .datac(!\soc_inst|ram_1|byte_select [2]),
+ .datad(!\soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|data_to_memory[17]~10_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[17]~10 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[17]~10 .lut_mask = 64'h000000005F505F50;
+defparam \soc_inst|ram_1|data_to_memory[17]~10 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X26_Y5_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 (
+ .portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|ram_1|data_to_memory[17]~10_combout ,\soc_inst|ram_1|data_to_memory[9]~9_combout }),
+ .portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+ .portabyteenamasks(1'b1),
+ .portbdatain(2'b00),
+ .portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_first_bit_number = 9;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_first_bit_number = 9;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000396D9EC5014763FC5AF14D427C1F07C9D0710710710710710710717F1555555555555553706000000000000000000000000";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y9_N6
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[9]~9 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[9]~9_combout = ( \soc_inst|ram_1|write_cycle~DUPLICATE_q & ( (!\soc_inst|ram_1|byte_select [1] & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout )) # (\soc_inst|ram_1|byte_select [1] &
+// ((!\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ))) ) )
+
+ .dataa(!\soc_inst|ram_1|byte_select [1]),
+ .datab(gnd),
+ .datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ),
+ .datad(!\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|data_to_memory[9]~9_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[9]~9 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[9]~9 .lut_mask = 64'h000000005F0A5F0A;
+defparam \soc_inst|ram_1|data_to_memory[9]~9 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y10_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jqhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jqhvx4~0_combout = ( \soc_inst|interconnect_1|HRDATA[20]~7_combout & ( (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) # ((!\soc_inst|interconnect_1|Equal1~0_combout & (!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 )) #
+// (\soc_inst|interconnect_1|Equal1~0_combout & ((!\soc_inst|switches_1|switch_store[1][1]~q )))) ) ) # ( !\soc_inst|interconnect_1|HRDATA[20]~7_combout )
+
+ .dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 ),
+ .datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+ .datad(!\soc_inst|switches_1|switch_store[1][1]~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jqhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jqhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jqhvx4~0 .lut_mask = 64'hFFFFFFFFFBF8FBF8;
+defparam \soc_inst|m0_1|u_logic|Jqhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y10_N13
+dffeas \soc_inst|m0_1|u_logic|Mfw2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Jqhvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Mfw2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mfw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mfw2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y9_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pqrvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pqrvx4~0_combout = ( \soc_inst|interconnect_1|Equal1~0_combout & ( (\soc_inst|switches_1|switch_store[1][1]~q & (\soc_inst|m0_1|u_logic|Qbpvx4~0_combout & \soc_inst|interconnect_1|HRDATA[20]~7_combout )) ) ) # (
+// !\soc_inst|interconnect_1|Equal1~0_combout & ( (\soc_inst|m0_1|u_logic|Qbpvx4~0_combout & (\soc_inst|interconnect_1|HRDATA[20]~7_combout & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 )) ) )
+
+ .dataa(!\soc_inst|switches_1|switch_store[1][1]~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+ .datac(!\soc_inst|interconnect_1|HRDATA[20]~7_combout ),
+ .datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 ),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|Equal1~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pqrvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pqrvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pqrvx4~0 .lut_mask = 64'h0003000301010101;
+defparam \soc_inst|m0_1|u_logic|Pqrvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y9_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S7nvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S7nvx4~0_combout = ( \soc_inst|m0_1|u_logic|Rxl2z4~q & ( (!\soc_inst|m0_1|u_logic|Pqrvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Vapvx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[1]~21_combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Rxl2z4~q & ( (\soc_inst|m0_1|u_logic|Scpvx4~2_combout & (!\soc_inst|m0_1|u_logic|Pqrvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Vapvx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[1]~21_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Pqrvx4~0_combout ),
+ .datad(!\soc_inst|interconnect_1|HRDATA[1]~21_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S7nvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S7nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S7nvx4~0 .lut_mask = 64'h30203020F0A0F0A0;
+defparam \soc_inst|m0_1|u_logic|S7nvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y9_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S7nvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S7nvx4~1_combout = ( \soc_inst|m0_1|u_logic|S7nvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Pfovx4~0_combout & ((!\soc_inst|m0_1|u_logic|Wfovx4~combout ) # ((\soc_inst|m0_1|u_logic|Dwl2z4~q )))) #
+// (\soc_inst|m0_1|u_logic|Pfovx4~0_combout & (\soc_inst|m0_1|u_logic|Mfw2z4~q & ((!\soc_inst|m0_1|u_logic|Wfovx4~combout ) # (\soc_inst|m0_1|u_logic|Dwl2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Mfw2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Dwl2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|S7nvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S7nvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S7nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S7nvx4~1 .lut_mask = 64'h000000008CAF8CAF;
+defparam \soc_inst|m0_1|u_logic|S7nvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X30_Y9_N28
+dffeas \soc_inst|m0_1|u_logic|Rxl2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|S7nvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rxl2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rxl2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rxl2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y3_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rblwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rblwx4~0_combout = ( \soc_inst|m0_1|u_logic|Swy2z4~q & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q & (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Qem2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rblwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rblwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rblwx4~0 .lut_mask = 64'h0000000022002200;
+defparam \soc_inst|m0_1|u_logic|Rblwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y3_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rblwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rblwx4~1_combout = ( \soc_inst|m0_1|u_logic|Enrwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Rngwx4~combout & \soc_inst|m0_1|u_logic|Rblwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Enrwx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Rngwx4~combout & ((!\soc_inst|m0_1|u_logic|Xly2z4~q ) # (\soc_inst|m0_1|u_logic|Rblwx4~0_combout ))) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Rblwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Enrwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rblwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rblwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rblwx4~1 .lut_mask = 64'hCC0CCC0C0C0C0C0C;
+defparam \soc_inst|m0_1|u_logic|Rblwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y9_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rblwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rblwx4~2_combout = ( \soc_inst|m0_1|u_logic|Celwx4~1_combout & ( \soc_inst|m0_1|u_logic|E4iwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Rblwx4~1_combout & ((!\soc_inst|m0_1|u_logic|J3iwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Celwx4~1_combout & ( !\soc_inst|m0_1|u_logic|E4iwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Rxl2z4~q & (!\soc_inst|m0_1|u_logic|Rblwx4~1_combout &
+// ((!\soc_inst|m0_1|u_logic|J3iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|J3iwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rblwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Celwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|E4iwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rblwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rblwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rblwx4~2 .lut_mask = 64'h00000B000000BB00;
+defparam \soc_inst|m0_1|u_logic|Rblwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y7_N2
+dffeas \soc_inst|m0_1|u_logic|Fgm2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Rblwx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fgm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fgm2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X35_Y9_N16
+dffeas \soc_inst|m0_1|u_logic|Po83z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Po83z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Po83z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Po83z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y7_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ylbwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ylbwx4~1_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Gf73z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Gju2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Po83z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Gf73z4~q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) #
+// (\soc_inst|m0_1|u_logic|Ajn2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Gf73z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Gju2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Po83z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Gf73z4~q & ( (\soc_inst|m0_1|u_logic|Ajn2z4~q &
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Gju2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ajn2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Po83z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Gf73z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ylbwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ylbwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ylbwx4~1 .lut_mask = 64'h3300550F33FF550F;
+defparam \soc_inst|m0_1|u_logic|Ylbwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X40_Y7_N50
+dffeas \soc_inst|m0_1|u_logic|Psv2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Psv2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Psv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Psv2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y9_N4
+dffeas \soc_inst|m0_1|u_logic|Vu93z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Vu93z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vu93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vu93z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X43_Y9_N7
+dffeas \soc_inst|m0_1|u_logic|Mhn2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Mhn2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mhn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mhn2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y7_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ylbwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ylbwx4~0_combout = ( \soc_inst|m0_1|u_logic|Mhn2z4~q & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Yfn2z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Vu93z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mhn2z4~q & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// ((\soc_inst|m0_1|u_logic|Yfn2z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Vu93z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Mhn2z4~q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (
+// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Psv2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mhn2z4~q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Psv2z4~q &
+// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Psv2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Vu93z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yfn2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Mhn2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ylbwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ylbwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ylbwx4~0 .lut_mask = 64'h0055FF550F330F33;
+defparam \soc_inst|m0_1|u_logic|Ylbwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y7_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ylbwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ylbwx4~combout = ( !\soc_inst|m0_1|u_logic|Ylbwx4~1_combout & ( \soc_inst|m0_1|u_logic|Ylbwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & !\soc_inst|m0_1|u_logic|Fgm2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ylbwx4~1_combout
+// & ( !\soc_inst|m0_1|u_logic|Ylbwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Rni2z4~q & \soc_inst|m0_1|u_logic|Fgm2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ylbwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Ylbwx4~0_combout & ( \soc_inst|m0_1|u_logic|Rni2z4~q
+// ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Ylbwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ylbwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ylbwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ylbwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ylbwx4 .lut_mask = 64'h5555050550500000;
+defparam \soc_inst|m0_1|u_logic|Ylbwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X40_Y7_N20
+dffeas \soc_inst|m0_1|u_logic|Cmn2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Cmn2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cmn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cmn2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y9_N50
+dffeas \soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X39_Y9_N1
+dffeas \soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y7_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xhbwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xhbwx4~2_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (
+// \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE_q ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE_q ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Cmn2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Cmn2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xhbwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~2 .lut_mask = 64'hAAAAF0F0FF00F0F0;
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y9_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xhbwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xhbwx4~1_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Fn33z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )
+// ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Q713z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Fn33z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Q713z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xhbwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~1 .lut_mask = 64'h0000FF00FFFFF0F0;
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X39_Y9_N26
+dffeas \soc_inst|m0_1|u_logic|Ow43z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ow43z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ow43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ow43z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y9_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xhbwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xhbwx4~3_combout = ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Ow43z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|X563z4~q ))) ) )
+// # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( (\soc_inst|m0_1|u_logic|Wd23z4~q & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ow43z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|X563z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wd23z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xhbwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~3 .lut_mask = 64'h0F000F0055335533;
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y7_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xhbwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xhbwx4~0_combout = ( \soc_inst|m0_1|u_logic|Xhbwx4~1_combout & ( \soc_inst|m0_1|u_logic|Xhbwx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// (\soc_inst|m0_1|u_logic|Xhbwx4~2_combout & !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xhbwx4~1_combout & ( \soc_inst|m0_1|u_logic|Xhbwx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|Fgm2z4~q & (\soc_inst|m0_1|u_logic|Xhbwx4~2_combout & !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Xhbwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Xhbwx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q &
+// (((!\soc_inst|m0_1|u_logic|Fgm2z4~q ) # (\soc_inst|m0_1|u_logic|Xhbwx4~2_combout )) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xhbwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Xhbwx4~3_combout & (
+// (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~q & ((\soc_inst|m0_1|u_logic|Xhbwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Xhbwx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Xhbwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Xhbwx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xhbwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~0 .lut_mask = 64'h1300DF0002000200;
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y7_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qrnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qrnvx4~0_combout = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( \soc_inst|m0_1|u_logic|Xhbwx4~0_combout & ( (\soc_inst|m0_1|u_logic|U4z2z4~q & !\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( \soc_inst|m0_1|u_logic|Xhbwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((\soc_inst|m0_1|u_logic|U4z2z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (\soc_inst|m0_1|u_logic|Jw93z4~q ))
+// ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( !\soc_inst|m0_1|u_logic|Xhbwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((\soc_inst|m0_1|u_logic|U4z2z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Ylbwx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( !\soc_inst|m0_1|u_logic|Xhbwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((\soc_inst|m0_1|u_logic|U4z2z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (\soc_inst|m0_1|u_logic|Jw93z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ylbwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Jw93z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|U4z2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Xhbwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qrnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qrnvx4~0 .lut_mask = 64'h0F330FAA0F330F00;
+defparam \soc_inst|m0_1|u_logic|Qrnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y7_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Asbvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Asbvx4~combout = ( \soc_inst|m0_1|u_logic|Hdh2z4~0_combout & ( \soc_inst|m0_1|u_logic|Qrnvx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|Hdh2z4~0_combout & ( \soc_inst|m0_1|u_logic|Qrnvx4~0_combout ) ) # (
+// \soc_inst|m0_1|u_logic|Hdh2z4~0_combout & ( !\soc_inst|m0_1|u_logic|Qrnvx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Fij2z4~q & (!\soc_inst|m0_1|u_logic|O5t2z4~q & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Donvx4~2_combout
+// ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hdh2z4~0_combout & ( !\soc_inst|m0_1|u_logic|Qrnvx4~0_combout & ( \soc_inst|m0_1|u_logic|Donvx4~2_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Asbvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Asbvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Asbvx4 .lut_mask = 64'h3333B333FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Asbvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y13_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Imhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Imhvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Add2~25_sumout )))) #
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & (((\soc_inst|m0_1|u_logic|J4x2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Add2~25_sumout ),
+ .datad(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Imhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Imhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Imhvx4~0 .lut_mask = 64'hC8FBC8FB00000000;
+defparam \soc_inst|m0_1|u_logic|Imhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y13_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Imhvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Imhvx4~1_combout = ( \soc_inst|m0_1|u_logic|Imhvx4~0_combout & ( \soc_inst|m0_1|u_logic|Zluvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Add5~101_sumout ) # (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Imhvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Zluvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout & ((!\soc_inst|m0_1|u_logic|Add5~101_sumout ) # (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Add5~101_sumout ),
+ .datac(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Imhvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Zluvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Imhvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Imhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Imhvx4~1 .lut_mask = 64'h0000A8A80000FCFC;
+defparam \soc_inst|m0_1|u_logic|Imhvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X33_Y13_N34
+dffeas \soc_inst|m0_1|u_logic|J4x2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Imhvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|J4x2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J4x2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J4x2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y6_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uzvvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uzvvx4~0_combout = ( \soc_inst|m0_1|u_logic|Fcj2z4~q & ( !\soc_inst|m0_1|u_logic|J4x2z4~q $ (((!\soc_inst|m0_1|u_logic|Tyx2z4~q & \soc_inst|m0_1|u_logic|B8c2z4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Fcj2z4~q & (
+// !\soc_inst|m0_1|u_logic|J4x2z4~q $ (((\soc_inst|m0_1|u_logic|B8c2z4~0_combout & (!\soc_inst|m0_1|u_logic|Hxx2z4~q $ (!\soc_inst|m0_1|u_logic|Tyx2z4~q ))))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Tyx2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Uzvvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uzvvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uzvvx4~0 .lut_mask = 64'hF096F096F03CF03C;
+defparam \soc_inst|m0_1|u_logic|Uzvvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y6_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fvovx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fvovx4~combout = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( \soc_inst|m0_1|u_logic|K1wvx4~combout & ( (!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ) # (((\soc_inst|m0_1|u_logic|Uzvvx4~0_combout &
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Add5~101_sumout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( \soc_inst|m0_1|u_logic|K1wvx4~combout & ( ((\soc_inst|m0_1|u_logic|Uzvvx4~0_combout &
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Add5~101_sumout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout & ( (!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ) #
+// ((\soc_inst|m0_1|u_logic|Uzvvx4~0_combout & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout & ( (\soc_inst|m0_1|u_logic|Uzvvx4~0_combout &
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Uzvvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Add5~101_sumout ),
+ .datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fvovx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fvovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fvovx4 .lut_mask = 64'h1111F1F111FFF1FF;
+defparam \soc_inst|m0_1|u_logic|Fvovx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y5_N27
+cyclonev_lcell_comb \soc_inst|switches_1|half_word_address~2 (
+// Equation(s):
+// \soc_inst|switches_1|half_word_address~2_combout = (\soc_inst|m0_1|u_logic|Fvovx4~combout & \soc_inst|switches_1|half_word_address~1_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Fvovx4~combout ),
+ .datad(!\soc_inst|switches_1|half_word_address~1_combout ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|switches_1|half_word_address~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|switches_1|half_word_address~2 .extended_lut = "off";
+defparam \soc_inst|switches_1|half_word_address~2 .lut_mask = 64'h000F000F000F000F;
+defparam \soc_inst|switches_1|half_word_address~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X18_Y5_N29
+dffeas \soc_inst|switches_1|half_word_address[1] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|switches_1|half_word_address~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|switches_1|half_word_address [1]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|half_word_address[1] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|half_word_address[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y5_N9
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[1]~19 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[1]~19_combout = ( \soc_inst|interconnect_1|Equal1~0_combout & ( (!\soc_inst|interconnect_1|HRDATA[1]~37_combout & \soc_inst|switches_1|half_word_address [1]) ) ) # ( !\soc_inst|interconnect_1|Equal1~0_combout & (
+// !\soc_inst|interconnect_1|HRDATA[1]~37_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|interconnect_1|HRDATA[1]~37_combout ),
+ .datad(!\soc_inst|switches_1|half_word_address [1]),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|Equal1~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[1]~19_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[1]~19 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[1]~19 .lut_mask = 64'hF0F0F0F000F000F0;
+defparam \soc_inst|interconnect_1|HRDATA[1]~19 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y11_N54
+cyclonev_lcell_comb \soc_inst|switches_1|DataValid~0 (
+// Equation(s):
+// \soc_inst|switches_1|DataValid~0_combout = ( \soc_inst|switches_1|DataValid [1] & ( \soc_inst|switches_1|read_enable~q & ( (!\soc_inst|switches_1|half_word_address [0]) # (((!\soc_inst|switches_1|last_buttons [1] & !\KEY[1]~input_o )) #
+// (\soc_inst|switches_1|half_word_address [1])) ) ) ) # ( !\soc_inst|switches_1|DataValid [1] & ( \soc_inst|switches_1|read_enable~q & ( (!\soc_inst|switches_1|last_buttons [1] & !\KEY[1]~input_o ) ) ) ) # ( \soc_inst|switches_1|DataValid [1] & (
+// !\soc_inst|switches_1|read_enable~q ) ) # ( !\soc_inst|switches_1|DataValid [1] & ( !\soc_inst|switches_1|read_enable~q & ( (!\soc_inst|switches_1|last_buttons [1] & !\KEY[1]~input_o ) ) ) )
+
+ .dataa(!\soc_inst|switches_1|half_word_address [0]),
+ .datab(!\soc_inst|switches_1|half_word_address [1]),
+ .datac(!\soc_inst|switches_1|last_buttons [1]),
+ .datad(!\KEY[1]~input_o ),
+ .datae(!\soc_inst|switches_1|DataValid [1]),
+ .dataf(!\soc_inst|switches_1|read_enable~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|switches_1|DataValid~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|switches_1|DataValid~0 .extended_lut = "off";
+defparam \soc_inst|switches_1|DataValid~0 .lut_mask = 64'hF000FFFFF000FBBB;
+defparam \soc_inst|switches_1|DataValid~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X22_Y11_N55
+dffeas \soc_inst|switches_1|DataValid[1] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|switches_1|DataValid~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|switches_1|DataValid [1]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|DataValid[1] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|DataValid[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X24_Y5_N38
+dffeas \soc_inst|switches_1|switch_store[0][1] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\SW[1]~input_o ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|switches_1|always0~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|switches_1|switch_store[0][1]~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[0][1] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[0][1] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y5_N45
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[1]~12 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[1]~12_combout = ( \soc_inst|m0_1|u_logic|hwdata_o [1] & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout ) # (\soc_inst|ram_1|byte_select [0]))) ) ) # (
+// !\soc_inst|m0_1|u_logic|hwdata_o [1] & ( (!\soc_inst|ram_1|byte_select [0] & (\soc_inst|ram_1|write_cycle~DUPLICATE_q & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout )) ) )
+
+ .dataa(!\soc_inst|ram_1|byte_select [0]),
+ .datab(gnd),
+ .datac(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o [1]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|data_to_memory[1]~12_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[1]~12 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[1]~12 .lut_mask = 64'h000A000A050F050F;
+defparam \soc_inst|ram_1|data_to_memory[1]~12 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X14_Y3_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 (
+ .portawe(\soc_inst|ram_1|write_cycle~q ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|ram_1|data_to_memory[25]~11_combout ,\soc_inst|ram_1|data_to_memory[1]~12_combout }),
+ .portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+ .portabyteenamasks(1'b1),
+ .portbdatain(2'b00),
+ .portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_first_bit_number = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_first_bit_number = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002B6CF6C2BE25FCC0210494BF83E4F93E0F94F94F94F94F94F94F94817FFFFFFFFFFFFC338EC000000000000000000000000";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y7_N48
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[25]~11 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[25]~11_combout = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25 & ( \soc_inst|m0_1|u_logic|hwdata_o~18_combout & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q ) ) ) # (
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25 & ( \soc_inst|m0_1|u_logic|hwdata_o~18_combout & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & \soc_inst|ram_1|byte_select [3]) ) ) ) # (
+// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25 & ( !\soc_inst|m0_1|u_logic|hwdata_o~18_combout & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & !\soc_inst|ram_1|byte_select [3]) ) ) )
+
+ .dataa(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|ram_1|byte_select [3]),
+ .datad(gnd),
+ .datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25 ),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o~18_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|data_to_memory[25]~11_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[25]~11 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[25]~11 .lut_mask = 64'h0000505005055555;
+defparam \soc_inst|ram_1|data_to_memory[25]~11 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y5_N36
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[1]~21 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[1]~21_combout = ( \soc_inst|switches_1|switch_store[0][1]~q & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout & ( ((!\soc_inst|interconnect_1|HRDATA[1]~19_combout &
+// (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[1]~19_combout & ((\soc_inst|switches_1|DataValid [1])))) # (\soc_inst|interconnect_1|HRDATA[1]~20_combout ) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][1]~q & (
+// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout & ( (!\soc_inst|interconnect_1|HRDATA[1]~19_combout & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout & (!\soc_inst|interconnect_1|HRDATA[1]~20_combout ))) #
+// (\soc_inst|interconnect_1|HRDATA[1]~19_combout & (((\soc_inst|switches_1|DataValid [1]) # (\soc_inst|interconnect_1|HRDATA[1]~20_combout )))) ) ) ) # ( \soc_inst|switches_1|switch_store[0][1]~q & (
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout & ( (!\soc_inst|interconnect_1|HRDATA[1]~19_combout & ((!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # ((\soc_inst|interconnect_1|HRDATA[1]~20_combout )))) #
+// (\soc_inst|interconnect_1|HRDATA[1]~19_combout & (((!\soc_inst|interconnect_1|HRDATA[1]~20_combout & \soc_inst|switches_1|DataValid [1])))) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][1]~q & (
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout & ( (!\soc_inst|interconnect_1|HRDATA[1]~20_combout & ((!\soc_inst|interconnect_1|HRDATA[1]~19_combout & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) #
+// (\soc_inst|interconnect_1|HRDATA[1]~19_combout & ((\soc_inst|switches_1|DataValid [1]))))) ) ) )
+
+ .dataa(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+ .datab(!\soc_inst|interconnect_1|HRDATA[1]~19_combout ),
+ .datac(!\soc_inst|interconnect_1|HRDATA[1]~20_combout ),
+ .datad(!\soc_inst|switches_1|DataValid [1]),
+ .datae(!\soc_inst|switches_1|switch_store[0][1]~q ),
+ .dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[1]~21_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[1]~21 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[1]~21 .lut_mask = 64'h80B08CBC83B38FBF;
+defparam \soc_inst|interconnect_1|HRDATA[1]~21 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y9_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hcnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hcnvx4~0_combout = ( \soc_inst|m0_1|u_logic|Dwl2z4~q & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[1]~21_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Dwl2z4~q & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[1]~21_combout ))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Dwl2z4~q & ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout & ( (\soc_inst|m0_1|u_logic|Kzqvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[1]~21_combout ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Dwl2z4~q & ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout & ( (\soc_inst|m0_1|u_logic|Kzqvx4~0_combout & (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) #
+// (!\soc_inst|interconnect_1|HRDATA[1]~21_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+ .datab(!\soc_inst|interconnect_1|HRDATA[1]~21_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Kzqvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Dwl2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hcnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hcnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hcnvx4~0 .lut_mask = 64'h0E000E0EEE00EEEE;
+defparam \soc_inst|m0_1|u_logic|Hcnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y9_N49
+dffeas \soc_inst|m0_1|u_logic|Dwl2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Hcnvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Dwl2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dwl2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dwl2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y14_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Acnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Acnvx4~0_combout = ( \soc_inst|m0_1|u_logic|G0w2z4~q & ( \soc_inst|m0_1|u_logic|C2rvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dwl2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|G0w2z4~q & (
+// \soc_inst|m0_1|u_logic|C2rvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout & ((!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dwl2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|G0w2z4~q & (
+// !\soc_inst|m0_1|u_logic|C2rvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout & (\soc_inst|m0_1|u_logic|B1vvx4~0_combout & ((!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dwl2z4~q )))) #
+// (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout & (((!\soc_inst|m0_1|u_logic|H1rvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Dwl2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G0w2z4~q & ( !\soc_inst|m0_1|u_logic|C2rvx4~2_combout & (
+// (!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout & (\soc_inst|m0_1|u_logic|B1vvx4~0_combout & ((!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dwl2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Dwl2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|C2rvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Acnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Acnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Acnvx4~0 .lut_mask = 64'h0A025F13AA22FF33;
+defparam \soc_inst|m0_1|u_logic|Acnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y14_N37
+dffeas \soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Acnvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y14_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sta2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sta2z4~0_combout = ( \soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~q & (!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sta2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sta2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sta2z4~0 .lut_mask = 64'h00000000A000A000;
+defparam \soc_inst|m0_1|u_logic|Sta2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y10_N1
+dffeas \soc_inst|m0_1|u_logic|Uyv2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|H6mvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Uyv2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uyv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uyv2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y10_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zx3wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zx3wx4~0_combout = ( \soc_inst|m0_1|u_logic|C34wx4~combout & ( \soc_inst|m0_1|u_logic|Cr0xx4~1_combout ) ) # ( \soc_inst|m0_1|u_logic|C34wx4~combout & ( !\soc_inst|m0_1|u_logic|Cr0xx4~1_combout & (
+// \soc_inst|m0_1|u_logic|Kofwx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Kofwx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|C34wx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Cr0xx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zx3wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zx3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zx3wx4~0 .lut_mask = 64'h00000F0F0000FFFF;
+defparam \soc_inst|m0_1|u_logic|Zx3wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y10_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H6mvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H6mvx4~0_combout = ( \soc_inst|m0_1|u_logic|Uyv2z4~q & ( \soc_inst|m0_1|u_logic|Zx3wx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|Uyv2z4~q & ( \soc_inst|m0_1|u_logic|Zx3wx4~0_combout ) ) # ( \soc_inst|m0_1|u_logic|Uyv2z4~q & (
+// !\soc_inst|m0_1|u_logic|Zx3wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # ((\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Uaj2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Uyv2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Zx3wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H6mvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H6mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H6mvx4~0 .lut_mask = 64'h0000EFFFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|H6mvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y10_N2
+dffeas \soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|H6mvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y10_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S4pwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S4pwx4~0_combout = ( \soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Wbk2z4~q & ( (\soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Uqi2z4~q & ((!\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q
+// ) # (\soc_inst|m0_1|u_logic|X9n2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Wbk2z4~q & ( (\soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q & (((!\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q ) #
+// (\soc_inst|m0_1|u_logic|Uqi2z4~q )) # (\soc_inst|m0_1|u_logic|X9n2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Wbk2z4~q & ( \soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q ) ) ) # (
+// !\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Wbk2z4~q & ( \soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|X9n2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Uqi2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wbk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S4pwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S4pwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S4pwx4~0 .lut_mask = 64'h5555555555150501;
+defparam \soc_inst|m0_1|u_logic|S4pwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y12_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X2rvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|X2rvx4~1_combout = ( \soc_inst|m0_1|u_logic|B6pwx4~4_combout & ( !\soc_inst|m0_1|u_logic|G2zwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|U5pwx4~0_combout & \soc_inst|m0_1|u_logic|I6pwx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|B6pwx4~4_combout & ( !\soc_inst|m0_1|u_logic|G2zwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|U5pwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|I6pwx4~0_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|U5pwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|I6pwx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|B6pwx4~4_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|X2rvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X2rvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X2rvx4~1 .lut_mask = 64'hFCFC0C0C00000000;
+defparam \soc_inst|m0_1|u_logic|X2rvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X2rvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|X2rvx4~2_combout = ( \soc_inst|m0_1|u_logic|E5owx4~0_combout & ( \soc_inst|m0_1|u_logic|C0zwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|S4pwx4~0_combout & \soc_inst|m0_1|u_logic|Q6mwx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|E5owx4~0_combout & ( \soc_inst|m0_1|u_logic|C0zwx4~0_combout & ( \soc_inst|m0_1|u_logic|Q6mwx4~0_combout ) ) ) # ( \soc_inst|m0_1|u_logic|E5owx4~0_combout & ( !\soc_inst|m0_1|u_logic|C0zwx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|S4pwx4~0_combout & \soc_inst|m0_1|u_logic|Q6mwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout & ( !\soc_inst|m0_1|u_logic|C0zwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout &
+// \soc_inst|m0_1|u_logic|X2rvx4~1_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|X2rvx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|C0zwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|X2rvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X2rvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X2rvx4~2 .lut_mask = 64'h000F0C0C0F0F0C0C;
+defparam \soc_inst|m0_1|u_logic|X2rvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y9_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tbnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tbnvx4~0_combout = ( \soc_inst|m0_1|u_logic|Lbn2z4~q & ( \soc_inst|interconnect_1|HRDATA[2]~14_combout & ( (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout & ((!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ) #
+// (\soc_inst|m0_1|u_logic|Abovx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lbn2z4~q & ( \soc_inst|interconnect_1|HRDATA[2]~14_combout & ( (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout & (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lbn2z4~q & ( !\soc_inst|interconnect_1|HRDATA[2]~14_combout & ( (!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ) #
+// (\soc_inst|m0_1|u_logic|Abovx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lbn2z4~q & ( !\soc_inst|interconnect_1|HRDATA[2]~14_combout & ( (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout & ((!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ) #
+// (\soc_inst|m0_1|u_logic|Abovx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Lbn2z4~q ),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[2]~14_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tbnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tbnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tbnvx4~0 .lut_mask = 64'hF050FF55C040CC44;
+defparam \soc_inst|m0_1|u_logic|Tbnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y9_N43
+dffeas \soc_inst|m0_1|u_logic|Lbn2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Tbnvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Lbn2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lbn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lbn2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y7_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4xvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z4xvx4~0_combout = ( \soc_inst|m0_1|u_logic|Rxl2z4~q & ( (!\soc_inst|m0_1|u_logic|Lbn2z4~q & \soc_inst|m0_1|u_logic|Irqvx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Rxl2z4~q & ( ((!\soc_inst|m0_1|u_logic|Lbn2z4~q &
+// \soc_inst|m0_1|u_logic|Irqvx4~1_combout )) # (\soc_inst|m0_1|u_logic|Zpqvx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Zpqvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Lbn2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Irqvx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z4xvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~0 .lut_mask = 64'h33F333F300F000F0;
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y7_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4xvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z4xvx4~1_combout = ( \soc_inst|m0_1|u_logic|Dsqvx4~combout & ( (\soc_inst|m0_1|u_logic|Nqy2z4~q & (!\soc_inst|m0_1|u_logic|Hhpvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Mnpvx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Dsqvx4~combout & ( (!\soc_inst|m0_1|u_logic|Hhpvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Mnpvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Mnpvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Hhpvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Dsqvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z4xvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~1 .lut_mask = 64'hCF00CF0045004500;
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y7_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4xvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z4xvx4~2_combout = ( \soc_inst|m0_1|u_logic|Z4xvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Zcn2z4~q $ (((\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Fzl2z4~q )))) #
+// (\soc_inst|m0_1|u_logic|Vopvx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Zcn2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Vopvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Z4xvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z4xvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~2 .lut_mask = 64'h000000009F3F9F3F;
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y7_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I6xvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|I6xvx4~0_combout = ( \soc_inst|m0_1|u_logic|Xipvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Y7xvx4~combout $ (!\soc_inst|m0_1|u_logic|Gqxvx4~combout $ (!\soc_inst|m0_1|u_logic|Zpxvx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Y7xvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Gqxvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Zpxvx4~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xipvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|I6xvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I6xvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I6xvx4~0 .lut_mask = 64'h0000000096969696;
+defparam \soc_inst|m0_1|u_logic|I6xvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y7_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4xvx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z4xvx4~3_combout = ( \soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|I6xvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Z4xvx4~0_combout & \soc_inst|m0_1|u_logic|Z4xvx4~2_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|I6xvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Rmpvx4~1_combout & (!\soc_inst|m0_1|u_logic|Z4xvx4~0_combout & \soc_inst|m0_1|u_logic|Z4xvx4~2_combout )) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Z4xvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Z4xvx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|I6xvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z4xvx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~3 .lut_mask = 64'h003000F000000000;
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y7_N31
+dffeas \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Z4xvx4~3_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y9_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tzxwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tzxwx4~0_combout = ( \soc_inst|m0_1|u_logic|Q1ywx4~combout & ( (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q & (((\soc_inst|m0_1|u_logic|Sy2wx4~0_combout & !\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q )) #
+// (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Q1ywx4~combout & ( (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout & !\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Q1ywx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tzxwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tzxwx4~0 .lut_mask = 64'h2020202020AA20AA;
+defparam \soc_inst|m0_1|u_logic|Tzxwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pkwwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pkwwx4~0_combout = ( \soc_inst|m0_1|u_logic|Mzxwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Wxxwx4~0_combout $ (((\soc_inst|m0_1|u_logic|Tzxwx4~0_combout & \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Mzxwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Wxxwx4~0_combout $ (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pkwwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pkwwx4~0 .lut_mask = 64'hF00FF00FF0C3F0C3;
+defparam \soc_inst|m0_1|u_logic|Pkwwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y11_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vr7wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vr7wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Pkwwx4~0_combout & \soc_inst|m0_1|u_logic|Vy7wx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vr7wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vr7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vr7wx4~0 .lut_mask = 64'hAAAFAAAF00000000;
+defparam \soc_inst|m0_1|u_logic|Vr7wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y11_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R7iwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R7iwx4~0_combout = (\soc_inst|m0_1|u_logic|Vr7wx4~0_combout & \soc_inst|m0_1|u_logic|E6nwx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Vr7wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R7iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R7iwx4~0 .lut_mask = 64'h000F000F000F000F;
+defparam \soc_inst|m0_1|u_logic|R7iwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3pvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O3pvx4~combout = ( \soc_inst|m0_1|u_logic|O3pvx4~1_combout & ( (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|R7iwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|O3pvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|O3pvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O3pvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O3pvx4 .lut_mask = 64'h00000000777F777F;
+defparam \soc_inst|m0_1|u_logic|O3pvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y11_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ojnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ojnvx4~0_combout = ( \soc_inst|m0_1|u_logic|Add5~29_sumout & ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~29_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ojnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ojnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ojnvx4~0 .lut_mask = 64'h00000000F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Ojnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y11_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ojnvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ojnvx4~1_combout = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ojnvx4~0_combout & ((\soc_inst|m0_1|u_logic|F9pvx4~1_combout ) #
+// (\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ojnvx4~0_combout & (((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout &
+// \soc_inst|m0_1|u_logic|F9pvx4~1_combout )) # (\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ojnvx4~0_combout &
+// (((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout & \soc_inst|m0_1|u_logic|F9pvx4~1_combout )) # (\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Ojnvx4~0_combout & (((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout & \soc_inst|m0_1|u_logic|F9pvx4~1_combout )) # (\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|F9pvx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ojnvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ojnvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ojnvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ojnvx4~1 .lut_mask = 64'h5D005D005D005F00;
+defparam \soc_inst|m0_1|u_logic|Ojnvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ojnvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ojnvx4~2_combout = ( \soc_inst|m0_1|u_logic|Z7i2z4~q & ( \soc_inst|m0_1|u_logic|Ojnvx4~1_combout & ( ((!\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|O3pvx4~combout )) #
+// (\soc_inst|m0_1|u_logic|X4pvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z7i2z4~q & ( \soc_inst|m0_1|u_logic|Ojnvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|X4pvx4~combout & ((!\soc_inst|interconnect_1|HREADY~0_combout &
+// (\soc_inst|m0_1|u_logic|J4pvx4~1_combout )) # (\soc_inst|interconnect_1|HREADY~0_combout & ((\soc_inst|m0_1|u_logic|O3pvx4~combout ))))) # (\soc_inst|m0_1|u_logic|X4pvx4~combout & (\soc_inst|m0_1|u_logic|J4pvx4~1_combout )) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Z7i2z4~q & ( !\soc_inst|m0_1|u_logic|Ojnvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|J4pvx4~1_combout & ((!\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|X4pvx4~combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|J4pvx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
+ .datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|O3pvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Z7i2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ojnvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ojnvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ojnvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ojnvx4~2 .lut_mask = 64'h0000A2A2515DF3FF;
+defparam \soc_inst|m0_1|u_logic|Ojnvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X35_Y12_N55
+dffeas \soc_inst|m0_1|u_logic|Z7i2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Ojnvx4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Z7i2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z7i2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z7i2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X36_Y5_N38
+dffeas \soc_inst|m0_1|u_logic|Iwp2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|D4mvx4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Iwp2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Iwp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Iwp2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y5_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D4mvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D4mvx4~1_combout = ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Iwp2z4~q & !\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|P0pvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Iwp2z4~q & !\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Iwp2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|D4mvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D4mvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D4mvx4~1 .lut_mask = 64'hAA00AA00FAF0FAF0;
+defparam \soc_inst|m0_1|u_logic|D4mvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y5_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D4mvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D4mvx4~2_combout = ( !\soc_inst|m0_1|u_logic|D4mvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|N5qvx4~0_combout & ((!\soc_inst|m0_1|u_logic|D4mvx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Z7i2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|D4mvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Z7i2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|D4mvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|D4mvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D4mvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D4mvx4~2 .lut_mask = 64'hFBF0FBF000000000;
+defparam \soc_inst|m0_1|u_logic|D4mvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X36_Y5_N37
+dffeas \soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|D4mvx4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y9_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oxnvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oxnvx4~1_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Yg13z4~q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Hq23z4~q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Yg13z4~q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Hq23z4~q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Yg13z4~q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Fgm2z4~q & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) )
+// )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Hq23z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yg13z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Oxnvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~1 .lut_mask = 64'h5000400000004000;
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X37_Y9_N26
+dffeas \soc_inst|m0_1|u_logic|Ek03z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ek03z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ek03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ek03z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y9_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oxnvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oxnvx4~2_combout = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Rni2z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q & ((!\soc_inst|m0_1|u_logic|Ek03z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Knz2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Knz2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ek03z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Oxnvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~2 .lut_mask = 64'h0000A82000000000;
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y13_N52
+dffeas \soc_inst|m0_1|u_logic|Qz33z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Qz33z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Qz33z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qz33z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qz33z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y9_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oxnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oxnvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Qz33z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Z853z4~q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Qz33z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Z853z4~q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qz33z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Z853z4~q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q &
+// (\soc_inst|m0_1|u_logic|Fgm2z4~q & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Qz33z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Z853z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Oxnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~0 .lut_mask = 64'h0202000202000000;
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y9_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oxnvx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oxnvx4~3_combout = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( \soc_inst|m0_1|u_logic|Cawwx4~combout & ( ((\soc_inst|m0_1|u_logic|Oxnvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Oxnvx4~2_combout )) #
+// (\soc_inst|m0_1|u_logic|Oxnvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( \soc_inst|m0_1|u_logic|Cawwx4~combout & ( !\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & (
+// !\soc_inst|m0_1|u_logic|Cawwx4~combout ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( !\soc_inst|m0_1|u_logic|Cawwx4~combout & ( !\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Oxnvx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Oxnvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Oxnvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Cawwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Oxnvx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~3 .lut_mask = 64'hAAAAFFFFAAAA3FFF;
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y5_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N5qvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N5qvx4~0_combout = ( \soc_inst|m0_1|u_logic|Add5~29_sumout & ( ((\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (\soc_inst|m0_1|u_logic|Oxnvx4~3_combout & \soc_inst|m0_1|u_logic|Gzvvx4~2_combout ))) #
+// (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~29_sumout & ( (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (\soc_inst|m0_1|u_logic|Oxnvx4~3_combout & \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Oxnvx4~3_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~29_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N5qvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N5qvx4~0 .lut_mask = 64'h001100110F1F0F1F;
+defparam \soc_inst|m0_1|u_logic|N5qvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y5_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S6ovx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S6ovx4~1_combout = ( \soc_inst|m0_1|u_logic|N5qvx4~0_combout & ( \soc_inst|m0_1|u_logic|T50wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Qr42z4~1_combout & (\soc_inst|m0_1|u_logic|S6ovx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|It52z4~2_combout & \soc_inst|m0_1|u_logic|Hdh2z4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N5qvx4~0_combout & ( \soc_inst|m0_1|u_logic|T50wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Qr42z4~1_combout &
+// (\soc_inst|m0_1|u_logic|S6ovx4~0_combout & !\soc_inst|m0_1|u_logic|It52z4~2_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|N5qvx4~0_combout & ( !\soc_inst|m0_1|u_logic|T50wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Qr42z4~1_combout &
+// (\soc_inst|m0_1|u_logic|S6ovx4~0_combout & (!\soc_inst|m0_1|u_logic|It52z4~2_combout & \soc_inst|m0_1|u_logic|Hdh2z4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N5qvx4~0_combout & ( !\soc_inst|m0_1|u_logic|T50wx4~0_combout & (
+// \soc_inst|m0_1|u_logic|S6ovx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|S6ovx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S6ovx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S6ovx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S6ovx4~1 .lut_mask = 64'h3333001010100010;
+defparam \soc_inst|m0_1|u_logic|S6ovx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y5_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Va62z4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Va62z4~combout = (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout & \soc_inst|m0_1|u_logic|Add3~9_sumout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Add3~9_sumout ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Va62z4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Va62z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Va62z4 .lut_mask = 64'h000F000F000F000F;
+defparam \soc_inst|m0_1|u_logic|Va62z4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y5_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o[29]~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|haddr_o[29]~2_combout = ( \soc_inst|m0_1|u_logic|Add5~117_sumout & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout & ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Add5~117_sumout & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~117_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|haddr_o[29]~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|haddr_o[29]~2 .lut_mask = 64'hF3F3F3F3F300F300;
+defparam \soc_inst|m0_1|u_logic|haddr_o[29]~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y5_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H362z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H362z4~0_combout = ( \soc_inst|m0_1|u_logic|Add5~77_sumout & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout & ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|A67wx4~0_combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Add5~77_sumout & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|A67wx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|A67wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~77_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H362z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H362z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H362z4~0 .lut_mask = 64'hDDDDDDDDD0D0D0D0;
+defparam \soc_inst|m0_1|u_logic|H362z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y5_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|htrans_o[1]~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|htrans_o[1]~0_combout = ( \soc_inst|m0_1|u_logic|haddr_o~1_combout & ( \soc_inst|m0_1|u_logic|H362z4~0_combout & ( (\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout & (\soc_inst|m0_1|u_logic|E7mwx4~combout &
+// ((!\soc_inst|m0_1|u_logic|Va62z4~combout ) # (\soc_inst|m0_1|u_logic|Add3~1_sumout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|haddr_o~1_combout & ( \soc_inst|m0_1|u_logic|H362z4~0_combout & ( (\soc_inst|m0_1|u_logic|Va62z4~combout &
+// (\soc_inst|m0_1|u_logic|Add3~1_sumout & (\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout & \soc_inst|m0_1|u_logic|E7mwx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|haddr_o~1_combout & ( !\soc_inst|m0_1|u_logic|H362z4~0_combout & (
+// \soc_inst|m0_1|u_logic|E7mwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|haddr_o~1_combout & ( !\soc_inst|m0_1|u_logic|H362z4~0_combout & ( (\soc_inst|m0_1|u_logic|E7mwx4~combout & ((!\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout ) #
+// (\soc_inst|m0_1|u_logic|Va62z4~combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Va62z4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Add3~1_sumout ),
+ .datac(!\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|E7mwx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|H362z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|htrans_o[1]~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|htrans_o[1]~0 .lut_mask = 64'h00F500FF0001000B;
+defparam \soc_inst|m0_1|u_logic|htrans_o[1]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y5_N21
+cyclonev_lcell_comb \soc_inst|switches_1|half_word_address~1 (
+// Equation(s):
+// \soc_inst|switches_1|half_word_address~1_combout = ( \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0_combout & ( \soc_inst|interconnect_1|HREADY~0_combout & ( (!\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout & (((\soc_inst|m0_1|u_logic|S6ovx4~1_combout &
+// !\soc_inst|m0_1|u_logic|S6ovx4~2_combout )) # (\soc_inst|m0_1|u_logic|E7mwx4~combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|E7mwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|S6ovx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|S6ovx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout ),
+ .datae(!\soc_inst|interconnect_1|HSEL_SIGNALS[1]~0_combout ),
+ .dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|switches_1|half_word_address~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|switches_1|half_word_address~1 .extended_lut = "off";
+defparam \soc_inst|switches_1|half_word_address~1 .lut_mask = 64'h0000000000007500;
+defparam \soc_inst|switches_1|half_word_address~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y5_N36
+cyclonev_lcell_comb \soc_inst|switches_1|half_word_address~3 (
+// Equation(s):
+// \soc_inst|switches_1|half_word_address~3_combout = ( \soc_inst|switches_1|half_word_address~0_combout & ( \soc_inst|switches_1|half_word_address~1_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|switches_1|half_word_address~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|switches_1|half_word_address~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|switches_1|half_word_address~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|switches_1|half_word_address~3 .extended_lut = "off";
+defparam \soc_inst|switches_1|half_word_address~3 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|switches_1|half_word_address~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X18_Y5_N38
+dffeas \soc_inst|switches_1|half_word_address[0] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|switches_1|half_word_address~3_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|switches_1|half_word_address [0]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|half_word_address[0] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|half_word_address[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y9_N42
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[24]~6 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[24]~6_combout = ( \soc_inst|interconnect_1|HRDATA[8]~5_combout & ( (!\soc_inst|interconnect_1|mux_sel [2] & ((!\soc_inst|interconnect_1|mux_sel [1]) # ((!\soc_inst|interconnect_1|mux_sel [0] &
+// \soc_inst|switches_1|half_word_address [0])))) ) ) # ( !\soc_inst|interconnect_1|HRDATA[8]~5_combout & ( (!\soc_inst|interconnect_1|mux_sel [2] & !\soc_inst|interconnect_1|mux_sel [1]) ) )
+
+ .dataa(!\soc_inst|interconnect_1|mux_sel [2]),
+ .datab(!\soc_inst|interconnect_1|mux_sel [1]),
+ .datac(!\soc_inst|interconnect_1|mux_sel [0]),
+ .datad(!\soc_inst|switches_1|half_word_address [0]),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[8]~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[24]~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[24]~6 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[24]~6 .lut_mask = 64'h8888888888A888A8;
+defparam \soc_inst|interconnect_1|HRDATA[24]~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y9_N39
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[24]~17 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[24]~17_combout = ( \soc_inst|ram_1|byte_select [3] & ( (\soc_inst|interconnect_1|HRDATA[24]~6_combout & (((\soc_inst|ram_1|read_cycle~q & \soc_inst|interconnect_1|mux_sel [0])) # (\soc_inst|interconnect_1|mux_sel [1])))
+// ) ) # ( !\soc_inst|ram_1|byte_select [3] & ( (\soc_inst|interconnect_1|HRDATA[24]~6_combout & \soc_inst|interconnect_1|mux_sel [1]) ) )
+
+ .dataa(!\soc_inst|ram_1|read_cycle~q ),
+ .datab(!\soc_inst|interconnect_1|HRDATA[24]~6_combout ),
+ .datac(!\soc_inst|interconnect_1|mux_sel [1]),
+ .datad(!\soc_inst|interconnect_1|mux_sel [0]),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|byte_select [3]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[24]~17_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[24]~17 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[24]~17 .lut_mask = 64'h0303030303130313;
+defparam \soc_inst|interconnect_1|HRDATA[24]~17 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y7_N35
+dffeas \soc_inst|switches_1|switch_store[1][9] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\SW[9]~input_o ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|switches_1|always0~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|switches_1|switch_store[1][9]~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[1][9] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[1][9] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y7_N33
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[25]~18 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[25]~18_combout = ( \soc_inst|switches_1|switch_store[1][9]~q & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25 & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) #
+// (\soc_inst|interconnect_1|HRDATA[24]~17_combout ) ) ) ) # ( !\soc_inst|switches_1|switch_store[1][9]~q & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25 & ( (!\soc_inst|interconnect_1|HRDATA[24]~17_combout &
+// (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[24]~17_combout & ((!\soc_inst|interconnect_1|Equal1~0_combout ))) ) ) ) # ( \soc_inst|switches_1|switch_store[1][9]~q & (
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25 & ( (!\soc_inst|interconnect_1|HRDATA[24]~17_combout & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[24]~17_combout &
+// ((\soc_inst|interconnect_1|Equal1~0_combout ))) ) ) ) # ( !\soc_inst|switches_1|switch_store[1][9]~q & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25 & ( (!\soc_inst|interconnect_1|HRDATA[24]~17_combout &
+// !\soc_inst|interconnect_1|HRDATA[25]~1_combout ) ) ) )
+
+ .dataa(!\soc_inst|interconnect_1|HRDATA[24]~17_combout ),
+ .datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+ .datac(!\soc_inst|interconnect_1|Equal1~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|switches_1|switch_store[1][9]~q ),
+ .dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25 ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[25]~18_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[25]~18 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[25]~18 .lut_mask = 64'h88888D8DD8D8DDDD;
+defparam \soc_inst|interconnect_1|HRDATA[25]~18 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y8_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O5nvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O5nvx4~0_combout = ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & ( (\soc_inst|interconnect_1|HRDATA[9]~16_combout & \soc_inst|m0_1|u_logic|Vapvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & (
+// (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) # ((\soc_inst|interconnect_1|HRDATA[9]~16_combout & \soc_inst|m0_1|u_logic|Vapvx4~combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+ .datac(!\soc_inst|interconnect_1|HRDATA[9]~16_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|O5nvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O5nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O5nvx4~0 .lut_mask = 64'hCCCFCCCF000F000F;
+defparam \soc_inst|m0_1|u_logic|O5nvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y8_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fohvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fohvx4~0_combout = ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout & ( !\soc_inst|interconnect_1|HRDATA[25]~18_combout ) ) # ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|interconnect_1|HRDATA[25]~18_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fohvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fohvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fohvx4~0 .lut_mask = 64'hFFFFFFFFF0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Fohvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y8_N19
+dffeas \soc_inst|m0_1|u_logic|Urw2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Fohvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Urw2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Urw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Urw2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y8_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O5nvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O5nvx4~1_combout = ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Urw2z4~q ) # ((\soc_inst|m0_1|u_logic|Wfovx4~combout & !\soc_inst|m0_1|u_logic|Y7y2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Pfovx4~0_combout
+// & ( (\soc_inst|m0_1|u_logic|Wfovx4~combout & !\soc_inst|m0_1|u_logic|Y7y2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Urw2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Y7y2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|O5nvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O5nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O5nvx4~1 .lut_mask = 64'h30303030BABABABA;
+defparam \soc_inst|m0_1|u_logic|O5nvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y8_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O5nvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O5nvx4~2_combout = ( !\soc_inst|m0_1|u_logic|O5nvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|O5nvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[25]~18_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|interconnect_1|HRDATA[25]~18_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|O5nvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|O5nvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|O5nvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O5nvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O5nvx4~2 .lut_mask = 64'hFA00FA0000000000;
+defparam \soc_inst|m0_1|u_logic|O5nvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y8_N40
+dffeas \soc_inst|m0_1|u_logic|Pty2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|O5nvx4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Pty2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pty2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pty2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y6_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dj6wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dj6wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Pty2z4~q & ( \soc_inst|m0_1|u_logic|Dvy2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dj6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dj6wx4~0 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|Dj6wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y4_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vskwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vskwx4~0_combout = ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q & \soc_inst|m0_1|u_logic|Ohwvx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vskwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vskwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vskwx4~0 .lut_mask = 64'h00F000F000000000;
+defparam \soc_inst|m0_1|u_logic|Vskwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y6_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H06wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H06wx4~0_combout = ( \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Dj6wx4~0_combout & (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Vskwx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Vskwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H06wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H06wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H06wx4~0 .lut_mask = 64'h0000000000440044;
+defparam \soc_inst|m0_1|u_logic|H06wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y5_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V76wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|V76wx4~0_combout = ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~q & \soc_inst|m0_1|u_logic|B73wx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|V76wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V76wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V76wx4~0 .lut_mask = 64'h0000000000F000F0;
+defparam \soc_inst|m0_1|u_logic|V76wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y5_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V76wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|V76wx4~1_combout = ( \soc_inst|m0_1|u_logic|M66wx4~combout & ( !\soc_inst|m0_1|u_logic|V76wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ptgwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Kzxvx4~combout ) #
+// ((!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Y6t2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|M66wx4~combout & ( !\soc_inst|m0_1|u_logic|V76wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Kzxvx4~combout ) #
+// ((!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Y6t2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|V76wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|V76wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V76wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V76wx4~1 .lut_mask = 64'hFAFFC8CC00000000;
+defparam \soc_inst|m0_1|u_logic|V76wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y7_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D56wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D56wx4~0_combout = ( \soc_inst|m0_1|u_logic|Bpzvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q & (((\soc_inst|m0_1|u_logic|Jppvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Ark2z4~q & (!\soc_inst|m0_1|u_logic|O5t2z4~q &
+// ((!\soc_inst|m0_1|u_logic|Y6t2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Bpzvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q & \soc_inst|m0_1|u_logic|Jppvx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Bpzvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|D56wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D56wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D56wx4~0 .lut_mask = 64'h0C0C0C0C2E0C2E0C;
+defparam \soc_inst|m0_1|u_logic|D56wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y5_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O76wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O76wx4~combout = ( \soc_inst|m0_1|u_logic|O5t2z4~q & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|O76wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O76wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O76wx4 .lut_mask = 64'h00000000C000C000;
+defparam \soc_inst|m0_1|u_logic|O76wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y5_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yy5wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yy5wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Wdxvx4~0_combout & \soc_inst|m0_1|u_logic|O76wx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yy5wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yy5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yy5wx4~0 .lut_mask = 64'h000F000F00000000;
+defparam \soc_inst|m0_1|u_logic|Yy5wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y4_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P0hwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P0hwx4~1_combout = ( \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|U2x2z4~q & !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P0hwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P0hwx4~1 .lut_mask = 64'h000000000F000F00;
+defparam \soc_inst|m0_1|u_logic|P0hwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y4_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu5wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xu5wx4~1_combout = ( \soc_inst|m0_1|u_logic|V1yvx4~0_combout & ( \soc_inst|m0_1|u_logic|X5gwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Yy5wx4~0_combout & ((!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ) #
+// (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|V1yvx4~0_combout & ( \soc_inst|m0_1|u_logic|X5gwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Yy5wx4~0_combout & ((!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ) #
+// (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|V1yvx4~0_combout & ( !\soc_inst|m0_1|u_logic|X5gwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Yy5wx4~0_combout & ((!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ) #
+// (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|V1yvx4~0_combout & ( !\soc_inst|m0_1|u_logic|X5gwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Yy5wx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Yy5wx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|X5gwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xu5wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~1 .lut_mask = 64'hAAAAAAA0AAA0AAA0;
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y3_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Px5wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Px5wx4~combout = ( \soc_inst|m0_1|u_logic|Nkpvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ) # (!\soc_inst|m0_1|u_logic|Qem2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Nkpvx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Px5wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Px5wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Px5wx4 .lut_mask = 64'hFFFFFFFFFFF0FFF0;
+defparam \soc_inst|m0_1|u_logic|Px5wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y3_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G27wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G27wx4~2_combout = ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Dvy2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G27wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G27wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G27wx4~2 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|G27wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y3_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uw5wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uw5wx4~0_combout = ( \soc_inst|m0_1|u_logic|G27wx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Px5wx4~combout & (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q $ (((\soc_inst|m0_1|u_logic|Zoy2z4~q &
+// !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ))))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Px5wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|G27wx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Uw5wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uw5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uw5wx4~0 .lut_mask = 64'h0000000090C090C0;
+defparam \soc_inst|m0_1|u_logic|Uw5wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y5_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ry5wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ry5wx4~0_combout = ( \soc_inst|m0_1|u_logic|Jppvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~q & !\soc_inst|m0_1|u_logic|Sgj2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ry5wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ry5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ry5wx4~0 .lut_mask = 64'h00000000F000F000;
+defparam \soc_inst|m0_1|u_logic|Ry5wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y5_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mz5wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mz5wx4~0_combout = ( \soc_inst|m0_1|u_logic|Egkwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q & \soc_inst|m0_1|u_logic|Socwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mz5wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mz5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mz5wx4~0 .lut_mask = 64'h0000000000AA00AA;
+defparam \soc_inst|m0_1|u_logic|Mz5wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y5_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu5wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xu5wx4~0_combout = ( \soc_inst|m0_1|u_logic|Jp3wx4~combout & ( !\soc_inst|m0_1|u_logic|Mz5wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout & (!\soc_inst|m0_1|u_logic|Uw5wx4~0_combout &
+// !\soc_inst|m0_1|u_logic|Ry5wx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jp3wx4~combout & ( !\soc_inst|m0_1|u_logic|Mz5wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Uw5wx4~0_combout & !\soc_inst|m0_1|u_logic|Ry5wx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Uw5wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ry5wx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mz5wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xu5wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~0 .lut_mask = 64'hC0C0808000000000;
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y5_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu5wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xu5wx4~2_combout = ( \soc_inst|m0_1|u_logic|Xu5wx4~0_combout & ( (\soc_inst|m0_1|u_logic|V76wx4~1_combout & (\soc_inst|m0_1|u_logic|Xu5wx4~1_combout & ((!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|D56wx4~0_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|V76wx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|D56wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Xu5wx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xu5wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xu5wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~2 .lut_mask = 64'h0000000000540054;
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y6_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu5wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xu5wx4~3_combout = ( \soc_inst|m0_1|u_logic|Xu5wx4~2_combout & ( (!\soc_inst|m0_1|u_logic|H06wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Swy2z4~q & \soc_inst|m0_1|u_logic|M4fwx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H06wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xu5wx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xu5wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~3 .lut_mask = 64'h00000000AAEEAAEE;
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y5_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A76wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|A76wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Sgj2z4~q & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q & \soc_inst|m0_1|u_logic|Jppvx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|A76wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|A76wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A76wx4~0 .lut_mask = 64'h0C0C0C0C00000000;
+defparam \soc_inst|m0_1|u_logic|A76wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y6_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W46wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|W46wx4~0_combout = ( \soc_inst|m0_1|u_logic|A76wx4~0_combout & ( \soc_inst|m0_1|u_logic|O9qvx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|A76wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Fij2z4~q & (\soc_inst|m0_1|u_logic|O9qvx4~0_combout & \soc_inst|m0_1|u_logic|O76wx4~combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|A76wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|W46wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W46wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W46wx4~0 .lut_mask = 64'h000400040F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|W46wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y8_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu5wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xu5wx4~combout = ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Xu5wx4~3_combout & (!\soc_inst|m0_1|u_logic|W46wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|G36wx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Sy2wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Xu5wx4~3_combout & !\soc_inst|m0_1|u_logic|W46wx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|G36wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Xu5wx4~3_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|W46wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xu5wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xu5wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xu5wx4 .lut_mask = 64'h3300330031003100;
+defparam \soc_inst|m0_1|u_logic|Xu5wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y9_N52
+dffeas \soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xu5wx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ylwwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ylwwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Uup2z4~q & \soc_inst|m0_1|u_logic|Fzl2z4~q ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Uup2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ylwwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ylwwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ylwwx4~0 .lut_mask = 64'h0000000003030000;
+defparam \soc_inst|m0_1|u_logic|Ylwwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ylwwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ylwwx4~1_combout = ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout & ( \soc_inst|m0_1|u_logic|Ylwwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ylwwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ylwwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ylwwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ylwwx4~1 .lut_mask = 64'h0000000000000404;
+defparam \soc_inst|m0_1|u_logic|Ylwwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y11_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ok7wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ok7wx4~1_combout = ( \soc_inst|m0_1|u_logic|Eo5wx4~0_combout & ( \soc_inst|m0_1|u_logic|Ok7wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ylwwx4~1_combout & ((!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Eo5wx4~0_combout & ( \soc_inst|m0_1|u_logic|Ok7wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ylwwx4~1_combout ) ) ) # ( \soc_inst|m0_1|u_logic|Eo5wx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Ok7wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ylwwx4~1_combout & ((!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Eo5wx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Ok7wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ylwwx4~1_combout & ((!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ylwwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Eo5wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ok7wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ok7wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ok7wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ok7wx4~1 .lut_mask = 64'hC4C4C4C4CCCCC4C4;
+defparam \soc_inst|m0_1|u_logic|Ok7wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y11_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Manwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Manwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Ok7wx4~1_combout & ( \soc_inst|m0_1|u_logic|Fij2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ok7wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Manwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Manwx4~0 .lut_mask = 64'h0F0F0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|Manwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y11_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pwdwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pwdwx4~0_combout = ( \soc_inst|m0_1|u_logic|Y9nwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Manwx4~0_combout & (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout & !\soc_inst|m0_1|u_logic|Vy7wx4~0_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Y9nwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Manwx4~0_combout & ((\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pwdwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pwdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pwdwx4~0 .lut_mask = 64'h0AAA0AAA0A000A00;
+defparam \soc_inst|m0_1|u_logic|Pwdwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y13_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Glnwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Glnwx4~1_combout = ( \soc_inst|m0_1|u_logic|Pwdwx4~0_combout & ( \soc_inst|m0_1|u_logic|Qs7wx4~1_combout & ( (\soc_inst|m0_1|u_logic|Glnwx4~0_combout & !\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Pwdwx4~0_combout & ( \soc_inst|m0_1|u_logic|Qs7wx4~1_combout & ( (\soc_inst|m0_1|u_logic|Glnwx4~0_combout & !\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Pwdwx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Qs7wx4~1_combout & ( (\soc_inst|m0_1|u_logic|Glnwx4~0_combout & !\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pwdwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Qs7wx4~1_combout & (
+// (\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Glnwx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Glnwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Pwdwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qs7wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Glnwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Glnwx4~1 .lut_mask = 64'h7777444444444444;
+defparam \soc_inst|m0_1|u_logic|Glnwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Skhvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Skhvx4~1_combout = ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Lefwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & (!\soc_inst|m0_1|u_logic|Add5~41_sumout )) #
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & ((\soc_inst|m0_1|u_logic|Jex2z4~q )))))) ) ) # ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Add2~49_sumout )))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & (((\soc_inst|m0_1|u_logic|Jex2z4~q )))))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Add2~49_sumout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Jex2z4~q ),
+ .datag(!\soc_inst|m0_1|u_logic|Add5~41_sumout ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Skhvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Skhvx4~1 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Skhvx4~1 .lut_mask = 64'hA000A800F500FD00;
+defparam \soc_inst|m0_1|u_logic|Skhvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Skhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Skhvx4~0_combout = ( \soc_inst|m0_1|u_logic|Skhvx4~1_combout & ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((\soc_inst|m0_1|u_logic|K22wx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Mtwwx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Skhvx4~1_combout & ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) #
+// ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout & \soc_inst|m0_1|u_logic|K22wx4~0_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|K22wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Skhvx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Skhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Skhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Skhvx4~0 .lut_mask = 64'h0000CECE0000CECF;
+defparam \soc_inst|m0_1|u_logic|Skhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y11_N8
+dffeas \soc_inst|m0_1|u_logic|Jex2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Skhvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Jex2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jex2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jex2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y10_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ohivx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ohivx4~0_combout = ( \soc_inst|m0_1|u_logic|Szr2z4~q & ( \soc_inst|m0_1|u_logic|Z6ovx4~combout & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout & (((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) #
+// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Jex2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Szr2z4~q & ( \soc_inst|m0_1|u_logic|Z6ovx4~combout & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout &
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jex2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Szr2z4~q & ( !\soc_inst|m0_1|u_logic|Z6ovx4~combout & (
+// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Jex2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Szr2z4~q & ( !\soc_inst|m0_1|u_logic|Z6ovx4~combout & (
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jex2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Jex2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Szr2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ohivx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ohivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ohivx4~0 .lut_mask = 64'h0F05FFF50C04CCC4;
+defparam \soc_inst|m0_1|u_logic|Ohivx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X36_Y10_N31
+dffeas \soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Ohivx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y7_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwbwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lwbwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Tse3z4~q & ( \soc_inst|m0_1|u_logic|M1j2z4~q & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Sjj2z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~q &
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Tse3z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lwbwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lwbwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lwbwx4~0 .lut_mask = 64'h0000000040000000;
+defparam \soc_inst|m0_1|u_logic|Lwbwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y8_N26
+dffeas \soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X46_Y4_N44
+dffeas \soc_inst|m0_1|u_logic|To33z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|To33z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|To33z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|To33z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y4_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oubwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oubwx4~1_combout = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// (!\soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|To33z4~DUPLICATE_q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|To33z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Oubwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oubwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oubwx4~1 .lut_mask = 64'h00AC000000000000;
+defparam \soc_inst|m0_1|u_logic|Oubwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X40_Y4_N7
+dffeas \soc_inst|m0_1|u_logic|Fre3z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Fre3z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fre3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fre3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y4_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oubwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oubwx4~2_combout = ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Rpe3z4~q & (\soc_inst|m0_1|u_logic|Sjj2z4~q & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+// # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Fre3z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rpe3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fre3z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Oubwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oubwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oubwx4~2 .lut_mask = 64'h3000202000000000;
+defparam \soc_inst|m0_1|u_logic|Oubwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y7_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oubwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oubwx4~0_combout = ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( \soc_inst|m0_1|u_logic|Sjj2z4~q & ( (!\soc_inst|m0_1|u_logic|L763z4~q & (!\soc_inst|m0_1|u_logic|Rni2z4~q & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Fgm2z4~q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q & (!\soc_inst|m0_1|u_logic|Cy43z4~q & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|L763z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Cy43z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Oubwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oubwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oubwx4~0 .lut_mask = 64'h000000C000000088;
+defparam \soc_inst|m0_1|u_logic|Oubwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y4_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oubwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oubwx4~3_combout = ( !\soc_inst|m0_1|u_logic|Oubwx4~0_combout & ( \soc_inst|m0_1|u_logic|Ue9wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lwbwx4~0_combout & (!\soc_inst|m0_1|u_logic|Oubwx4~1_combout &
+// (!\soc_inst|m0_1|u_logic|Oubwx4~2_combout & \soc_inst|m0_1|u_logic|Hue3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Oubwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ue9wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lwbwx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Oubwx4~1_combout & !\soc_inst|m0_1|u_logic|Oubwx4~2_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lwbwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Oubwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Oubwx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hue3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Oubwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Oubwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oubwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oubwx4~3 .lut_mask = 64'h8080000000800000;
+defparam \soc_inst|m0_1|u_logic|Oubwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y4_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Konvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Konvx4~0_combout = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( \soc_inst|m0_1|u_logic|Oubwx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q )) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Pybwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( \soc_inst|m0_1|u_logic|Oubwx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|G1s2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( !\soc_inst|m0_1|u_logic|Oubwx4~3_combout & (
+// (!\soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( !\soc_inst|m0_1|u_logic|Oubwx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|G1s2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Pybwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|G1s2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Oubwx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Konvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Konvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Konvx4~0 .lut_mask = 64'hBB88BBBBBB88B8B8;
+defparam \soc_inst|m0_1|u_logic|Konvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y4_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ksbwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ksbwx4~0_combout = ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( \soc_inst|m0_1|u_logic|Kzbwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Konvx4~0_combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) #
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( \soc_inst|m0_1|u_logic|Kzbwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) #
+// ((!\soc_inst|m0_1|u_logic|Konvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout & ((!\soc_inst|m0_1|u_logic|Konvx4~0_combout & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Konvx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( !\soc_inst|m0_1|u_logic|Kzbwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Konvx4~0_combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) #
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout & ( !\soc_inst|m0_1|u_logic|Kzbwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout & ((!\soc_inst|m0_1|u_logic|Konvx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Konvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) #
+// ((!\soc_inst|m0_1|u_logic|Konvx4~0_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Konvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kzbwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ksbwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ksbwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ksbwx4~0 .lut_mask = 64'hBEB2B0B0EBE8E0E0;
+defparam \soc_inst|m0_1|u_logic|Ksbwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y8_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iu1wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Iu1wx4~0_combout = ( \soc_inst|m0_1|u_logic|Vq1wx4~combout & ( (\soc_inst|m0_1|u_logic|Ksbwx4~0_combout & (!\soc_inst|m0_1|u_logic|Ox1wx4~0_combout & \soc_inst|m0_1|u_logic|Ox1wx4~1_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Ksbwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ox1wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ox1wx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Vq1wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Iu1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Iu1wx4~0 .lut_mask = 64'h0000000000300030;
+defparam \soc_inst|m0_1|u_logic|Iu1wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y8_N7
+dffeas \soc_inst|m0_1|u_logic|Uku2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Uku2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uku2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uku2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X40_Y8_N49
+dffeas \soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y8_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pybwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pybwx4~2_combout = ( \soc_inst|m0_1|u_logic|Rni2z4~q & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q & ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Uku2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE_q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Uku2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pybwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pybwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pybwx4~2 .lut_mask = 64'h000000000000AC00;
+defparam \soc_inst|m0_1|u_logic|Pybwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y8_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pybwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pybwx4~1_combout = ( \soc_inst|m0_1|u_logic|Rni2z4~q & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Cxc3z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) ) #
+// ( \soc_inst|m0_1|u_logic|Rni2z4~q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|U2s2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Cxc3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|U2s2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pybwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pybwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pybwx4~1 .lut_mask = 64'h0000000C0000000A;
+defparam \soc_inst|m0_1|u_logic|Pybwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X40_Y8_N31
+dffeas \soc_inst|m0_1|u_logic|Duv2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Duv2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Duv2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Duv2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y8_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pybwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pybwx4~3_combout = ( \soc_inst|m0_1|u_logic|Rni2z4~q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|I4s2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Duv2z4~DUPLICATE_q ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|I4s2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Duv2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pybwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pybwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pybwx4~3 .lut_mask = 64'h00000000000088C0;
+defparam \soc_inst|m0_1|u_logic|Pybwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y8_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pybwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pybwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Ug73z4~q & ( \soc_inst|m0_1|u_logic|Wzy2z4~q & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Ug73z4~q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|W5s2z4~q & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Ug73z4~q & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|W5s2z4~q & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|W5s2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ug73z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pybwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pybwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pybwx4~0 .lut_mask = 64'h0080008000A00000;
+defparam \soc_inst|m0_1|u_logic|Pybwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y8_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pybwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pybwx4~combout = ( !\soc_inst|m0_1|u_logic|Pybwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Pybwx4~2_combout & (!\soc_inst|m0_1|u_logic|Pybwx4~1_combout & !\soc_inst|m0_1|u_logic|Pybwx4~3_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Pybwx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Pybwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Pybwx4~3_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pybwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pybwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pybwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pybwx4 .lut_mask = 64'hC000C00000000000;
+defparam \soc_inst|m0_1|u_logic|Pybwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y8_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tdg2z4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tdg2z4~combout = ( \soc_inst|m0_1|u_logic|Ai9wx4~combout & ( \soc_inst|m0_1|u_logic|Pjqwx4~combout & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q & (((\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Pybwx4~combout
+// ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q & (((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|H2wwx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ai9wx4~combout & ( \soc_inst|m0_1|u_logic|Pjqwx4~combout & (
+// (!\soc_inst|m0_1|u_logic|Fzl2z4~q & (((\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Pybwx4~combout ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q & (((\soc_inst|m0_1|u_logic|H2wwx4~combout & \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q
+// )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ai9wx4~combout & ( !\soc_inst|m0_1|u_logic|Pjqwx4~combout & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q & (\soc_inst|m0_1|u_logic|Pybwx4~combout & ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) #
+// (\soc_inst|m0_1|u_logic|Fzl2z4~q & (((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|H2wwx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ai9wx4~combout & ( !\soc_inst|m0_1|u_logic|Pjqwx4~combout & (
+// (!\soc_inst|m0_1|u_logic|Fzl2z4~q & (\soc_inst|m0_1|u_logic|Pybwx4~combout & ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q & (((\soc_inst|m0_1|u_logic|H2wwx4~combout & \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q
+// )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pybwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|H2wwx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ai9wx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Pjqwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tdg2z4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tdg2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tdg2z4 .lut_mask = 64'h50035F0350F35FF3;
+defparam \soc_inst|m0_1|u_logic|Tdg2z4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y7_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aeg2z4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Aeg2z4~combout = ( \soc_inst|m0_1|u_logic|Zkuwx4~combout & ( \soc_inst|m0_1|u_logic|Hmqwx4~combout & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q ) # ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Ey9wx4~combout
+// )) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Nrvwx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zkuwx4~combout & ( \soc_inst|m0_1|u_logic|Hmqwx4~combout & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|Fzl2z4~q & (\soc_inst|m0_1|u_logic|Ey9wx4~combout ))) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Fzl2z4~q ) # ((\soc_inst|m0_1|u_logic|Nrvwx4~combout )))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Zkuwx4~combout & ( !\soc_inst|m0_1|u_logic|Hmqwx4~combout & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Fzl2z4~q ) # ((\soc_inst|m0_1|u_logic|Ey9wx4~combout )))) #
+// (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Fzl2z4~q & ((\soc_inst|m0_1|u_logic|Nrvwx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zkuwx4~combout & ( !\soc_inst|m0_1|u_logic|Hmqwx4~combout & (
+// (\soc_inst|m0_1|u_logic|Fzl2z4~q & ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Ey9wx4~combout )) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Nrvwx4~combout ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ey9wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Nrvwx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Zkuwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Hmqwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Aeg2z4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Aeg2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aeg2z4 .lut_mask = 64'h02138A9B4657CEDF;
+defparam \soc_inst|m0_1|u_logic|Aeg2z4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y7_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vff2z4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vff2z4~combout = ( \soc_inst|m0_1|u_logic|Ebbwx4~combout & ( \soc_inst|m0_1|u_logic|Duuwx4~combout & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~q ) # ((!\soc_inst|m0_1|u_logic|Fzl2z4~q & ((!\soc_inst|m0_1|u_logic|Ylbwx4~combout ))) #
+// (\soc_inst|m0_1|u_logic|Fzl2z4~q & (\soc_inst|m0_1|u_logic|Bdwwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ebbwx4~combout & ( \soc_inst|m0_1|u_logic|Duuwx4~combout & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q & (((!\soc_inst|m0_1|u_logic|Ylbwx4~combout
+// ) # (!\soc_inst|m0_1|u_logic|Qzq2z4~q )))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q & (\soc_inst|m0_1|u_logic|Bdwwx4~combout & ((\soc_inst|m0_1|u_logic|Qzq2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ebbwx4~combout & ( !\soc_inst|m0_1|u_logic|Duuwx4~combout
+// & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q & (((!\soc_inst|m0_1|u_logic|Ylbwx4~combout & \soc_inst|m0_1|u_logic|Qzq2z4~q )))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q & (((!\soc_inst|m0_1|u_logic|Qzq2z4~q )) # (\soc_inst|m0_1|u_logic|Bdwwx4~combout ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Ebbwx4~combout & ( !\soc_inst|m0_1|u_logic|Duuwx4~combout & ( (\soc_inst|m0_1|u_logic|Qzq2z4~q & ((!\soc_inst|m0_1|u_logic|Fzl2z4~q & ((!\soc_inst|m0_1|u_logic|Ylbwx4~combout ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q &
+// (\soc_inst|m0_1|u_logic|Bdwwx4~combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bdwwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ylbwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qzq2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ebbwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Duuwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vff2z4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vff2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vff2z4 .lut_mask = 64'h00D133D1CCD1FFD1;
+defparam \soc_inst|m0_1|u_logic|Vff2z4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y7_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jhe2z4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jhe2z4~combout = ( \soc_inst|m0_1|u_logic|Fexwx4~combout & ( \soc_inst|m0_1|u_logic|U7uwx4~combout & ( (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Fzl2z4~q & ((!\soc_inst|m0_1|u_logic|Feqwx4~combout
+// ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q & (!\soc_inst|m0_1|u_logic|F8wwx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fexwx4~combout & ( \soc_inst|m0_1|u_logic|U7uwx4~combout & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q &
+// (((!\soc_inst|m0_1|u_logic|Feqwx4~combout & \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q & ((!\soc_inst|m0_1|u_logic|F8wwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Fexwx4~combout & ( !\soc_inst|m0_1|u_logic|U7uwx4~combout & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q & (((!\soc_inst|m0_1|u_logic|Feqwx4~combout ) # (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q
+// & (!\soc_inst|m0_1|u_logic|F8wwx4~combout & ((\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fexwx4~combout & ( !\soc_inst|m0_1|u_logic|U7uwx4~combout & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ) #
+// ((!\soc_inst|m0_1|u_logic|Fzl2z4~q & ((!\soc_inst|m0_1|u_logic|Feqwx4~combout ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q & (!\soc_inst|m0_1|u_logic|F8wwx4~combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|F8wwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Feqwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fexwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|U7uwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jhe2z4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jhe2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jhe2z4 .lut_mask = 64'hFFE2CCE233E200E2;
+defparam \soc_inst|m0_1|u_logic|Jhe2z4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y7_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qhe2z4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qhe2z4~combout = ( \soc_inst|m0_1|u_logic|Saqwx4~combout & ( \soc_inst|m0_1|u_logic|Cawwx4~combout & ( ((!\soc_inst|m0_1|u_logic|Fzl2z4~q & (\soc_inst|m0_1|u_logic|Eruwx4~combout )) # (\soc_inst|m0_1|u_logic|Fzl2z4~q &
+// ((\soc_inst|m0_1|u_logic|N3ywx4~combout )))) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Saqwx4~combout & ( \soc_inst|m0_1|u_logic|Cawwx4~combout & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|Fzl2z4~q & (\soc_inst|m0_1|u_logic|Eruwx4~combout )) # (\soc_inst|m0_1|u_logic|Fzl2z4~q & ((\soc_inst|m0_1|u_logic|N3ywx4~combout ))))) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q & (((\soc_inst|m0_1|u_logic|Fzl2z4~q )))) ) )
+// ) # ( \soc_inst|m0_1|u_logic|Saqwx4~combout & ( !\soc_inst|m0_1|u_logic|Cawwx4~combout & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Fzl2z4~q & (\soc_inst|m0_1|u_logic|Eruwx4~combout )) # (\soc_inst|m0_1|u_logic|Fzl2z4~q
+// & ((\soc_inst|m0_1|u_logic|N3ywx4~combout ))))) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q & (((!\soc_inst|m0_1|u_logic|Fzl2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Saqwx4~combout & ( !\soc_inst|m0_1|u_logic|Cawwx4~combout & (
+// (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Fzl2z4~q & (\soc_inst|m0_1|u_logic|Eruwx4~combout )) # (\soc_inst|m0_1|u_logic|Fzl2z4~q & ((\soc_inst|m0_1|u_logic|N3ywx4~combout ))))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Eruwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|N3ywx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Saqwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Cawwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qhe2z4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qhe2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qhe2z4 .lut_mask = 64'h404C707C434F737F;
+defparam \soc_inst|m0_1|u_logic|Qhe2z4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y7_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hhd2z4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hhd2z4~combout = ( \soc_inst|m0_1|u_logic|Bjxwx4~combout & ( \soc_inst|m0_1|u_logic|Dmvwx4~combout & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q & ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Xcuwx4~combout
+// )) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|H1qwx4~combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bjxwx4~combout & ( \soc_inst|m0_1|u_logic|Dmvwx4~combout & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q &
+// ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Xcuwx4~combout )) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|H1qwx4~combout ))))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q &
+// (((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Bjxwx4~combout & ( !\soc_inst|m0_1|u_logic|Dmvwx4~combout & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q & ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q &
+// (!\soc_inst|m0_1|u_logic|Xcuwx4~combout )) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|H1qwx4~combout ))))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q & (((\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Bjxwx4~combout & ( !\soc_inst|m0_1|u_logic|Dmvwx4~combout & ( ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Xcuwx4~combout )) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|H1qwx4~combout )))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Xcuwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|H1qwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Bjxwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Dmvwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hhd2z4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hhd2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hhd2z4 .lut_mask = 64'hBBF388F3BBC088C0;
+defparam \soc_inst|m0_1|u_logic|Hhd2z4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y7_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ohd2z4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ohd2z4~combout = ( \soc_inst|m0_1|u_logic|Icxwx4~combout & ( \soc_inst|m0_1|u_logic|G4qwx4~combout & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q & (((\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|D9uwx4~combout
+// ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q & (((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Mnvwx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Icxwx4~combout & ( \soc_inst|m0_1|u_logic|G4qwx4~combout & (
+// (!\soc_inst|m0_1|u_logic|Fzl2z4~q & (((\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|D9uwx4~combout ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q & (((\soc_inst|m0_1|u_logic|Mnvwx4~combout & \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q
+// )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Icxwx4~combout & ( !\soc_inst|m0_1|u_logic|G4qwx4~combout & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q & (\soc_inst|m0_1|u_logic|D9uwx4~combout & ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) #
+// (\soc_inst|m0_1|u_logic|Fzl2z4~q & (((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Mnvwx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Icxwx4~combout & ( !\soc_inst|m0_1|u_logic|G4qwx4~combout & (
+// (!\soc_inst|m0_1|u_logic|Fzl2z4~q & (\soc_inst|m0_1|u_logic|D9uwx4~combout & ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q & (((\soc_inst|m0_1|u_logic|Mnvwx4~combout & \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q
+// )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|D9uwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Mnvwx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Icxwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|G4qwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ohd2z4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ohd2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ohd2z4 .lut_mask = 64'h50035F0350F35FF3;
+defparam \soc_inst|m0_1|u_logic|Ohd2z4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y7_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mgd2z4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mgd2z4~4_combout = ( !\soc_inst|m0_1|u_logic|Uup2z4~q & ( (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q & ((((!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ))))) # (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q &
+// (((!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Hhd2z4~combout ))) # (\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Ohd2z4~combout ))))) ) ) # ( \soc_inst|m0_1|u_logic|Uup2z4~q & (
+// (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q & ((((!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ))))) # (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Jhe2z4~combout )) #
+// (\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q & (((\soc_inst|m0_1|u_logic|Qhe2z4~combout )))))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Jhe2z4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Qhe2z4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Uup2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Hhd2z4~combout ),
+ .datag(!\soc_inst|m0_1|u_logic|Ohd2z4~combout ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mgd2z4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mgd2z4~4 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Mgd2z4~4 .lut_mask = 64'hAA05BB05FF05BB05;
+defparam \soc_inst|m0_1|u_logic|Mgd2z4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y9_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cgf2z4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cgf2z4~combout = ( \soc_inst|m0_1|u_logic|Bywwx4~combout & ( \soc_inst|m0_1|u_logic|Qxuwx4~combout & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Fzl2z4~q & ((\soc_inst|m0_1|u_logic|Svqwx4~combout
+// ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q & (\soc_inst|m0_1|u_logic|Lr9wx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bywwx4~combout & ( \soc_inst|m0_1|u_logic|Qxuwx4~combout & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q &
+// (!\soc_inst|m0_1|u_logic|Fzl2z4~q )) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Fzl2z4~q & ((\soc_inst|m0_1|u_logic|Svqwx4~combout ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q & (\soc_inst|m0_1|u_logic|Lr9wx4~combout )))) ) ) )
+// # ( \soc_inst|m0_1|u_logic|Bywwx4~combout & ( !\soc_inst|m0_1|u_logic|Qxuwx4~combout & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Fzl2z4~q )) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|Fzl2z4~q & ((\soc_inst|m0_1|u_logic|Svqwx4~combout ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q & (\soc_inst|m0_1|u_logic|Lr9wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bywwx4~combout & (
+// !\soc_inst|m0_1|u_logic|Qxuwx4~combout & ( (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Fzl2z4~q & ((\soc_inst|m0_1|u_logic|Svqwx4~combout ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q & (\soc_inst|m0_1|u_logic|Lr9wx4~combout )))) )
+// ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Lr9wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Svqwx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Bywwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qxuwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cgf2z4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cgf2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cgf2z4 .lut_mask = 64'h0145236789CDABEF;
+defparam \soc_inst|m0_1|u_logic|Cgf2z4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y7_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mgd2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mgd2z4~0_combout = ( !\soc_inst|m0_1|u_logic|Uup2z4~q & ( (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q & (((!\soc_inst|m0_1|u_logic|Mgd2z4~4_combout & (\soc_inst|m0_1|u_logic|Cgf2z4~combout )) #
+// (\soc_inst|m0_1|u_logic|Mgd2z4~4_combout & ((\soc_inst|m0_1|u_logic|Vff2z4~combout )))))) # (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q & ((((\soc_inst|m0_1|u_logic|Mgd2z4~4_combout ))))) ) ) # ( \soc_inst|m0_1|u_logic|Uup2z4~q & (
+// (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q & (((!\soc_inst|m0_1|u_logic|Mgd2z4~4_combout & ((\soc_inst|m0_1|u_logic|Aeg2z4~combout ))) # (\soc_inst|m0_1|u_logic|Mgd2z4~4_combout & (\soc_inst|m0_1|u_logic|Tdg2z4~combout ))))) #
+// (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q & ((((\soc_inst|m0_1|u_logic|Mgd2z4~4_combout ))))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Tdg2z4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Aeg2z4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Vff2z4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Uup2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~4_combout ),
+ .datag(!\soc_inst|m0_1|u_logic|Cgf2z4~combout ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mgd2z4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Mgd2z4~0 .lut_mask = 64'h0A0A0A0A55FF7777;
+defparam \soc_inst|m0_1|u_logic|Mgd2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y6_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lhyvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lhyvx4~2_combout = ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Lhyvx4~1_combout & \soc_inst|m0_1|u_logic|Ps3wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout & ( (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (((!\soc_inst|m0_1|u_logic|Lhyvx4~1_combout & \soc_inst|m0_1|u_logic|Ps3wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Lhyvx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lhyvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lhyvx4~2 .lut_mask = 64'h050D050D55DD55DD;
+defparam \soc_inst|m0_1|u_logic|Lhyvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y10_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4qvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z4qvx4~0_combout = ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout & ( \soc_inst|m0_1|u_logic|Add5~81_sumout & ( (\soc_inst|m0_1|u_logic|Ht5wx4~0_combout & (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout &
+// !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout & ( \soc_inst|m0_1|u_logic|Add5~81_sumout & ( (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Shyvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Add5~81_sumout & ( (\soc_inst|m0_1|u_logic|Ht5wx4~0_combout & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Add5~81_sumout & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~81_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z4qvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z4qvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z4qvx4~0 .lut_mask = 64'hF0F0505030301010;
+defparam \soc_inst|m0_1|u_logic|Z4qvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y10_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4qvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z4qvx4~combout = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( \soc_inst|m0_1|u_logic|W4zvx4~1_combout & ( (\soc_inst|m0_1|u_logic|Z4qvx4~0_combout & (\soc_inst|m0_1|u_logic|Wsawx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|B8nwx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout & ( \soc_inst|m0_1|u_logic|W4zvx4~1_combout & ( (\soc_inst|m0_1|u_logic|Z4qvx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout & \soc_inst|m0_1|u_logic|Wsawx4~0_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Z4qvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wsawx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|W4zvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z4qvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z4qvx4 .lut_mask = 64'h0000000000500051;
+defparam \soc_inst|m0_1|u_logic|Z4qvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X48_Y9_N35
+dffeas \soc_inst|m0_1|u_logic|Cll2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Cll2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cll2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cll2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y10_N1
+dffeas \soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X36_Y9_N32
+dffeas \soc_inst|m0_1|u_logic|Ch03z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ch03z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ch03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ch03z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y9_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ht5wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ht5wx4~2_combout = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|I793z4~q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Wd13z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Fn23z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|I793z4~q & ( (!\soc_inst|m0_1|u_logic|Ch03z4~q &
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|I793z4~q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Wd13z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Fn23z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|I793z4~q & ( (!\soc_inst|m0_1|u_logic|Ch03z4~q ) #
+// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fn23z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ch03z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wd13z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|I793z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ht5wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~2 .lut_mask = 64'hFCFCFA0A0C0CFA0A;
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y10_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ht5wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ht5wx4~1_combout = ( \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Ow33z4~q & \soc_inst|m0_1|u_logic|Yaz2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q &
+// (!\soc_inst|m0_1|u_logic|Mcz2z4~q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~q & ((!\soc_inst|m0_1|u_logic|Ow33z4~q ))) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Mcz2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ow33z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ht5wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~1 .lut_mask = 64'hCCF0CCF000F000F0;
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y9_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ht5wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ht5wx4~3_combout = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & (((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Ht5wx4~2_combout ))) #
+// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Ht5wx4~1_combout ))))) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q &
+// (((\soc_inst|m0_1|u_logic|Ht5wx4~2_combout )))) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ht5wx4~2_combout ),
+ .datag(!\soc_inst|m0_1|u_logic|Ht5wx4~1_combout ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ht5wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~3 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~3 .lut_mask = 64'h000A0080AA0AAA80;
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y9_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ht5wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ht5wx4~0_combout = ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ht5wx4~3_combout & ( (\soc_inst|m0_1|u_logic|X553z4~q & (!\soc_inst|m0_1|u_logic|Xowwx4~combout &
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cll2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sd1xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ht5wx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Xowwx4~combout &
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cll2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Cll2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|X553z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Xowwx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ht5wx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~0 .lut_mask = 64'hF500310000000000;
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[15]~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout = ( \soc_inst|m0_1|u_logic|Z62wx4~combout & ( (\soc_inst|m0_1|u_logic|Wq5wx4~combout & !\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Z62wx4~combout & (
+// (!\soc_inst|m0_1|u_logic|Wq5wx4~combout ) # (!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Z62wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hwdata_o[15]~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[15]~1 .lut_mask = 64'hFFF0FFF00F000F00;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[15]~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y9_N30
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[15]~2 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[15]~2_combout = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & ((!\soc_inst|ram_1|byte_select [1]) # (\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout
+// ))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & (\soc_inst|ram_1|byte_select [1] & \soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .datac(!\soc_inst|ram_1|byte_select [1]),
+ .datad(!\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|data_to_memory[15]~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[15]~2 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[15]~2 .lut_mask = 64'h0003000330333033;
+defparam \soc_inst|ram_1|data_to_memory[15]~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y9_N12
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[31]~2 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[31]~2_combout = ( \soc_inst|interconnect_1|HRDATA[25]~1_combout & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31 & ( \soc_inst|interconnect_1|HRDATA[29]~0_combout ) ) ) # (
+// !\soc_inst|interconnect_1|HRDATA[25]~1_combout & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31 ) ) # ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31 & (
+// !\soc_inst|interconnect_1|HRDATA[29]~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+ .datae(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+ .dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31 ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[31]~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[31]~2 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[31]~2 .lut_mask = 64'hFF000000FFFF00FF;
+defparam \soc_inst|interconnect_1|HRDATA[31]~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y6_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hjnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hjnvx4~0_combout = ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout & ( \soc_inst|m0_1|u_logic|Vapvx4~combout & ( \soc_inst|interconnect_1|HRDATA[15]~4_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Scpvx4~2_combout & (
+// \soc_inst|m0_1|u_logic|Vapvx4~combout & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q ) # (\soc_inst|interconnect_1|HRDATA[15]~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Scpvx4~2_combout & ( !\soc_inst|m0_1|u_logic|Vapvx4~combout & (
+// !\soc_inst|m0_1|u_logic|U2x2z4~q ) ) )
+
+ .dataa(!\soc_inst|interconnect_1|HRDATA[15]~4_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hjnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hjnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hjnvx4~0 .lut_mask = 64'hCCCC0000DDDD5555;
+defparam \soc_inst|m0_1|u_logic|Hjnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y6_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pmhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pmhvx4~0_combout = ( \soc_inst|interconnect_1|HRDATA[31]~2_combout & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) ) # ( !\soc_inst|interconnect_1|HRDATA[31]~2_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[31]~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pmhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pmhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pmhvx4~0 .lut_mask = 64'hFFFFFFFFF0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Pmhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y6_N53
+dffeas \soc_inst|m0_1|u_logic|F1x2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Pmhvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|F1x2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F1x2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F1x2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y8_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G8nvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G8nvx4~0_combout = ( \soc_inst|m0_1|u_logic|Abovx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Nbm2z4~q & ((!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[15]~4_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+ .datad(!\soc_inst|interconnect_1|HRDATA[15]~4_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G8nvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G8nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G8nvx4~0 .lut_mask = 64'h00000000AAA0AAA0;
+defparam \soc_inst|m0_1|u_logic|G8nvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y8_N34
+dffeas \soc_inst|m0_1|u_logic|Ufy2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|G8nvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Edovx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ufy2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ufy2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ufy2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y6_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hjnvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hjnvx4~1_combout = ( \soc_inst|m0_1|u_logic|Wfovx4~combout & ( (!\soc_inst|m0_1|u_logic|Ufy2z4~q ) # ((!\soc_inst|m0_1|u_logic|F1x2z4~q & \soc_inst|m0_1|u_logic|Pfovx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Wfovx4~combout
+// & ( (!\soc_inst|m0_1|u_logic|F1x2z4~q & \soc_inst|m0_1|u_logic|Pfovx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|F1x2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ufy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hjnvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hjnvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hjnvx4~1 .lut_mask = 64'h00AA00AAF0FAF0FA;
+defparam \soc_inst|m0_1|u_logic|Hjnvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y6_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hjnvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hjnvx4~2_combout = ( !\soc_inst|m0_1|u_logic|Hjnvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Hjnvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[31]~2_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|interconnect_1|HRDATA[31]~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hjnvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Hjnvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hjnvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hjnvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hjnvx4~2 .lut_mask = 64'hFA00FA0000000000;
+defparam \soc_inst|m0_1|u_logic|Hjnvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X30_Y6_N53
+dffeas \soc_inst|m0_1|u_logic|U2x2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Hjnvx4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U2x2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U2x2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y3_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Srgwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Srgwx4~0_combout = ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q & (\soc_inst|m0_1|u_logic|Howvx4~0_combout & !\soc_inst|m0_1|u_logic|Fij2z4~q ))
+// ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Srgwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Srgwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Srgwx4~0 .lut_mask = 64'h0000000000002020;
+defparam \soc_inst|m0_1|u_logic|Srgwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y7_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fzyvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fzyvx4~0_combout = ( \soc_inst|m0_1|u_logic|Srgwx4~0_combout & ( \soc_inst|m0_1|u_logic|O5t2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Srgwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fzyvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fzyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fzyvx4~0 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Fzyvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y4_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mk6wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mk6wx4~0_combout = ( \soc_inst|m0_1|u_logic|Csewx4~0_combout & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mk6wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mk6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mk6wx4~0 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Mk6wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y3_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X3xvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|X3xvx4~0_combout = ( !\soc_inst|m0_1|u_logic|U2x2z4~q & ( ((\soc_inst|m0_1|u_logic|Qem2z4~q & (\soc_inst|m0_1|u_logic|Tki2z4~q & \soc_inst|m0_1|u_logic|G27wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Mk6wx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Mk6wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|X3xvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X3xvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X3xvx4~0 .lut_mask = 64'h01FF01FF00000000;
+defparam \soc_inst|m0_1|u_logic|X3xvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y6_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X3xvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|X3xvx4~1_combout = ( \soc_inst|m0_1|u_logic|Sgj2z4~q & ( !\soc_inst|m0_1|u_logic|X3xvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Fzyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q &
+// ( !\soc_inst|m0_1|u_logic|X3xvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q & (((!\soc_inst|m0_1|u_logic|Fzyvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Npk2z4~q & (((!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fzyvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|X3xvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|X3xvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X3xvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X3xvx4~1 .lut_mask = 64'hF5B1F5F500000000;
+defparam \soc_inst|m0_1|u_logic|X3xvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y6_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pa7wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pa7wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Fij2z4~q & ( (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Emi2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pa7wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pa7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pa7wx4~0 .lut_mask = 64'h000F000F00000000;
+defparam \soc_inst|m0_1|u_logic|Pa7wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y6_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q3xvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q3xvx4~0_combout = ( \soc_inst|m0_1|u_logic|Z7fwx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Fij2z4~q & (!\soc_inst|m0_1|u_logic|Npk2z4~q & \soc_inst|m0_1|u_logic|Ark2z4~q ))) # (\soc_inst|m0_1|u_logic|Pa7wx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Pa7wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q3xvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q3xvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q3xvx4~0 .lut_mask = 64'h000000000F8F0F8F;
+defparam \soc_inst|m0_1|u_logic|Q3xvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y6_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q3xvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q3xvx4~1_combout = ( !\soc_inst|m0_1|u_logic|Q3xvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rexvx4~0_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Q3xvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q3xvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q3xvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q3xvx4~1 .lut_mask = 64'hCFFFCFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Q3xvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y5_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Na6wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Na6wx4~0_combout = ( \soc_inst|m0_1|u_logic|T1xvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Fij2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Na6wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Na6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Na6wx4~0 .lut_mask = 64'h00000000F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Na6wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y4_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U6wvx4~0_combout = ( \soc_inst|m0_1|u_logic|Na6wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Na6wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U6wvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U6wvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~0 .lut_mask = 64'h00000000FF0FFF0F;
+defparam \soc_inst|m0_1|u_logic|U6wvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y4_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U6wvx4~3_combout = ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Qem2z4~q & \soc_inst|m0_1|u_logic|Tki2z4~q ))
+// ) ) ) # ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Qem2z4~q & \soc_inst|m0_1|u_logic|Tki2z4~q )) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Tki2z4~q & ((!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Swy2z4~q & !\soc_inst|m0_1|u_logic|Qem2z4~q ))))
+// ) ) ) # ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Tki2z4~q & ((!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Swy2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U6wvx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U6wvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~3 .lut_mask = 64'h00DD00DC00030003;
+defparam \soc_inst|m0_1|u_logic|U6wvx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y10_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U6wvx4~4_combout = ( \soc_inst|m0_1|u_logic|B1vvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Aok2z4~q & (!\soc_inst|m0_1|u_logic|O5t2z4~q & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )) ) ) # (
+// !\soc_inst|m0_1|u_logic|B1vvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & (((\soc_inst|m0_1|u_logic|Aok2z4~q & !\soc_inst|m0_1|u_logic|O5t2z4~q )) # (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U6wvx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U6wvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~4 .lut_mask = 64'h4F004F0044004400;
+defparam \soc_inst|m0_1|u_logic|U6wvx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y4_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U6wvx4~1_combout = ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|U2x2z4~q & (!\soc_inst|m0_1|u_logic|Swy2z4~q & \soc_inst|m0_1|u_logic|Tki2z4~q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U6wvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U6wvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~1 .lut_mask = 64'h0030003000000000;
+defparam \soc_inst|m0_1|u_logic|U6wvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y4_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U6wvx4~2_combout = ( \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Dvy2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q & (
+// (!\soc_inst|m0_1|u_logic|Dvy2z4~q & (((!\soc_inst|m0_1|u_logic|Zoy2z4~q & \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Dvy2z4~q & (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U6wvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U6wvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~2 .lut_mask = 64'h22E222E222222222;
+defparam \soc_inst|m0_1|u_logic|U6wvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y4_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U6wvx4~5_combout = ( !\soc_inst|m0_1|u_logic|U6wvx4~1_combout & ( \soc_inst|m0_1|u_logic|U6wvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|U6wvx4~3_combout & (!\soc_inst|m0_1|u_logic|U6wvx4~4_combout &
+// !\soc_inst|m0_1|u_logic|J7swx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|U6wvx4~1_combout & ( !\soc_inst|m0_1|u_logic|U6wvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|U6wvx4~3_combout & !\soc_inst|m0_1|u_logic|U6wvx4~4_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|U6wvx4~3_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|U6wvx4~4_combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|J7swx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|U6wvx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|U6wvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U6wvx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U6wvx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~5 .lut_mask = 64'h8888000088000000;
+defparam \soc_inst|m0_1|u_logic|U6wvx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y4_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U6wvx4~6_combout = ( !\soc_inst|m0_1|u_logic|U6wvx4~0_combout & ( \soc_inst|m0_1|u_logic|U6wvx4~5_combout & ( (\soc_inst|m0_1|u_logic|Q3xvx4~1_combout & (!\soc_inst|m0_1|u_logic|Tuwvx4~0_combout &
+// \soc_inst|m0_1|u_logic|J3xvx4~combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Q3xvx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Tuwvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|J3xvx4~combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|U6wvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|U6wvx4~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U6wvx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U6wvx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~6 .lut_mask = 64'h0000000004040000;
+defparam \soc_inst|m0_1|u_logic|U6wvx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y4_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U6wvx4~7_combout = ( \soc_inst|m0_1|u_logic|X3xvx4~1_combout & ( \soc_inst|m0_1|u_logic|U6wvx4~6_combout & ( (\soc_inst|m0_1|u_logic|Lu6wx4~0_combout & (!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q &
+// \soc_inst|interconnect_1|HREADY~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|X3xvx4~1_combout & ( \soc_inst|m0_1|u_logic|U6wvx4~6_combout & ( \soc_inst|interconnect_1|HREADY~0_combout ) ) ) # ( \soc_inst|m0_1|u_logic|X3xvx4~1_combout & (
+// !\soc_inst|m0_1|u_logic|U6wvx4~6_combout & ( \soc_inst|interconnect_1|HREADY~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|X3xvx4~1_combout & ( !\soc_inst|m0_1|u_logic|U6wvx4~6_combout & ( \soc_inst|interconnect_1|HREADY~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Lu6wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|X3xvx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|U6wvx4~6_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|U6wvx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U6wvx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~7 .lut_mask = 64'h00FF00FF00FF0030;
+defparam \soc_inst|m0_1|u_logic|U6wvx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y6_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W3mvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|W3mvx4~0_combout = ( \soc_inst|m0_1|u_logic|K8wvx4~2_combout & ( (\soc_inst|m0_1|u_logic|P7wvx4~0_combout & !\soc_inst|m0_1|u_logic|Nqy2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|K8wvx4~2_combout & (
+// (!\soc_inst|m0_1|u_logic|Yzi2z4~q ) # ((\soc_inst|m0_1|u_logic|P7wvx4~0_combout & !\soc_inst|m0_1|u_logic|Nqy2z4~q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|K8wvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|W3mvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W3mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W3mvx4~0 .lut_mask = 64'hF3F0F3F033003300;
+defparam \soc_inst|m0_1|u_logic|W3mvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y6_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W3mvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|W3mvx4~1_combout = ( \soc_inst|m0_1|u_logic|I2t2z4~q & ( !\soc_inst|m0_1|u_logic|Z5wvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ) # ((!\soc_inst|m0_1|u_logic|W3mvx4~0_combout &
+// ((\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|R8wvx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I2t2z4~q & ( !\soc_inst|m0_1|u_logic|Z5wvx4~0_combout & ( (\soc_inst|m0_1|u_logic|U6wvx4~7_combout &
+// (!\soc_inst|m0_1|u_logic|W3mvx4~0_combout & ((\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|R8wvx4~1_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|W3mvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|R8wvx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|I2t2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|W3mvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W3mvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W3mvx4~1 .lut_mask = 64'h0444AEEE00000000;
+defparam \soc_inst|m0_1|u_logic|W3mvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y6_N31
+dffeas \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|W3mvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y4_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E4xvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|E4xvx4~1_combout = ( \soc_inst|m0_1|u_logic|K1z2z4~q & ( (!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|K1z2z4~q & ( !\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|K1z2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|E4xvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E4xvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E4xvx4~1 .lut_mask = 64'hCCCCCCCCCCC0CCC0;
+defparam \soc_inst|m0_1|u_logic|E4xvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y6_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B3mvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|B3mvx4~0_combout = (\soc_inst|m0_1|u_logic|E4xvx4~1_combout & ((!\soc_inst|m0_1|u_logic|O5t2z4~q ) # ((\soc_inst|m0_1|u_logic|Ilpvx4~0_combout & !\soc_inst|m0_1|u_logic|Nsk2z4~q ))))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|E4xvx4~1_combout ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|B3mvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B3mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B3mvx4~0 .lut_mask = 64'h00F400F400F400F4;
+defparam \soc_inst|m0_1|u_logic|B3mvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y6_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wlwvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wlwvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Swy2z4~q & ( ((!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|G27wx4~0_combout & \soc_inst|m0_1|u_logic|Ohwvx4~combout ))) #
+// (\soc_inst|m0_1|u_logic|Ejwvx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ejwvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wlwvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wlwvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wlwvx4~0 .lut_mask = 64'h55D555D500000000;
+defparam \soc_inst|m0_1|u_logic|Wlwvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y6_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wlwvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wlwvx4~1_combout = ( !\soc_inst|m0_1|u_logic|Wlwvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Vhwvx4~1_combout & ((!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Dvy2z4~q )))) # (\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q & (((!\soc_inst|m0_1|u_logic|P7wvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Dvy2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Vhwvx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wlwvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wlwvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wlwvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wlwvx4~1 .lut_mask = 64'h5F135F1300000000;
+defparam \soc_inst|m0_1|u_logic|Wlwvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y6_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B3mvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|B3mvx4~1_combout = ( \soc_inst|m0_1|u_logic|U6wvx4~7_combout & ( (!\soc_inst|m0_1|u_logic|B3mvx4~0_combout & (!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout & \soc_inst|m0_1|u_logic|Wlwvx4~1_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|U6wvx4~7_combout & ( (!\soc_inst|m0_1|u_logic|B3mvx4~0_combout & (!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout & \soc_inst|m0_1|u_logic|C3z2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|B3mvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Wlwvx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|C3z2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|B3mvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B3mvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B3mvx4~1 .lut_mask = 64'h0088008808080808;
+defparam \soc_inst|m0_1|u_logic|B3mvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y6_N41
+dffeas \soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|B3mvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y6_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E4xvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|E4xvx4~0_combout = ( \soc_inst|m0_1|u_logic|K1z2z4~q & ( (\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|I2t2z4~q & \soc_inst|m0_1|u_logic|Auk2z4~q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|I2t2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|K1z2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|E4xvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E4xvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E4xvx4~0 .lut_mask = 64'h0000000000030003;
+defparam \soc_inst|m0_1|u_logic|E4xvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y4_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hklwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hklwx4~1_combout = ( \soc_inst|m0_1|u_logic|Npk2z4~q & ( (\soc_inst|m0_1|u_logic|O5t2z4~q & \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q &
+// ((!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|O5t2z4~q & (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hklwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hklwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hklwx4~1 .lut_mask = 64'hCF03CF0303030303;
+defparam \soc_inst|m0_1|u_logic|Hklwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y4_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hklwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hklwx4~2_combout = ( \soc_inst|m0_1|u_logic|U2x2z4~q & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~q & (\soc_inst|m0_1|u_logic|Tki2z4~q & (!\soc_inst|m0_1|u_logic|Qem2z4~q $
+// (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hklwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hklwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hklwx4~2 .lut_mask = 64'h0000008400000000;
+defparam \soc_inst|m0_1|u_logic|Hklwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y4_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hklwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hklwx4~3_combout = ( !\soc_inst|m0_1|u_logic|Hklwx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Hklwx4~1_combout & ((!\soc_inst|m0_1|u_logic|Nbm2z4~q ) # ((!\soc_inst|m0_1|u_logic|Gvrwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Owq2z4~q
+// )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Gvrwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Owq2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Hklwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Hklwx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hklwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hklwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hklwx4~3 .lut_mask = 64'hEF00EF0000000000;
+defparam \soc_inst|m0_1|u_logic|Hklwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jeewx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jeewx4~combout = ( !\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q & (!\soc_inst|m0_1|u_logic|Uup2z4~q & !\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Uup2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jeewx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jeewx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jeewx4 .lut_mask = 64'h8080808000000000;
+defparam \soc_inst|m0_1|u_logic|Jeewx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zmlwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zmlwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Vopvx4~0_combout & (!\soc_inst|m0_1|u_logic|Jeewx4~combout $ (((!\soc_inst|m0_1|u_logic|O5t2z4~q ) #
+// (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ))))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Jeewx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Vopvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zmlwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zmlwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zmlwx4~0 .lut_mask = 64'h3090309000000000;
+defparam \soc_inst|m0_1|u_logic|Zmlwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y4_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hklwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hklwx4~0_combout = ( \soc_inst|m0_1|u_logic|Dsqvx4~combout & ( (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Qslwx4~0_combout & !\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Dsqvx4~combout & ( (!\soc_inst|m0_1|u_logic|Qslwx4~0_combout & !\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Qslwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Dsqvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hklwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hklwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hklwx4~0 .lut_mask = 64'hF000F000FAAAFAAA;
+defparam \soc_inst|m0_1|u_logic|Hklwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y4_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hklwx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hklwx4~4_combout = ( \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Hklwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Hklwx4~3_combout & !\soc_inst|m0_1|u_logic|Zmlwx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Hklwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Hklwx4~3_combout & (!\soc_inst|m0_1|u_logic|Ohwvx4~combout & (!\soc_inst|m0_1|u_logic|Zmlwx4~0_combout &
+// \soc_inst|m0_1|u_logic|Fyrwx4~1_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Hklwx4~3_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Zmlwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fyrwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Hklwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hklwx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hklwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hklwx4~4 .lut_mask = 64'h0040505000000000;
+defparam \soc_inst|m0_1|u_logic|Hklwx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y8_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bthvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bthvx4~0_combout = ( \soc_inst|m0_1|u_logic|Cyq2z4~q & ( \soc_inst|m0_1|u_logic|Qllwx4~4_combout & ( \soc_inst|m0_1|u_logic|Hklwx4~4_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Cyq2z4~q & ( \soc_inst|m0_1|u_logic|Qllwx4~4_combout
+// & ( (\soc_inst|m0_1|u_logic|Hklwx4~4_combout & ((\soc_inst|m0_1|u_logic|Cllwx4~0_combout ) # (\soc_inst|m0_1|u_logic|E4xvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Cyq2z4~q & ( !\soc_inst|m0_1|u_logic|Qllwx4~4_combout ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|E4xvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Hklwx4~4_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Cllwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Cyq2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qllwx4~4_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bthvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bthvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bthvx4~0 .lut_mask = 64'h0000FFFF030F0F0F;
+defparam \soc_inst|m0_1|u_logic|Bthvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X36_Y8_N38
+dffeas \soc_inst|m0_1|u_logic|Cyq2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Bthvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Cyq2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cyq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cyq2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y8_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tykwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tykwx4~0_combout = ( \soc_inst|m0_1|u_logic|W7z2z4~q & ( (\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Cyq2z4~q ) # ((\soc_inst|m0_1|u_logic|I6z2z4~q & \soc_inst|m0_1|u_logic|K9z2z4~q )))) ) ) # (
+// !\soc_inst|m0_1|u_logic|W7z2z4~q & ( (\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Cyq2z4~q ) # (\soc_inst|m0_1|u_logic|I6z2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Cyq2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|I6z2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|K9z2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tykwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tykwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tykwx4~0 .lut_mask = 64'h0B0B0B0B0A0B0A0B;
+defparam \soc_inst|m0_1|u_logic|Tykwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y7_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tykwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tykwx4~1_combout = ( \soc_inst|m0_1|u_logic|C9yvx4~combout & ( \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Auk2z4~q ) # ((\soc_inst|m0_1|u_logic|K1z2z4~q & !\soc_inst|m0_1|u_logic|Tykwx4~0_combout )) )
+// ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|K1z2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Tykwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tykwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tykwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tykwx4~1 .lut_mask = 64'h000000000000FF50;
+defparam \soc_inst|m0_1|u_logic|Tykwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y6_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kxkwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kxkwx4~0_combout = ( \soc_inst|m0_1|u_logic|Csewx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Dvy2z4~q & (\soc_inst|m0_1|u_logic|Ahwvx4~0_combout & !\soc_inst|m0_1|u_logic|Yzi2z4~q )))
+// ) ) # ( !\soc_inst|m0_1|u_logic|Csewx4~0_combout & ( (\soc_inst|m0_1|u_logic|Ahwvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Dvy2z4~q & (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Dvy2z4~q & ((!\soc_inst|m0_1|u_logic|Yzi2z4~q
+// ))))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kxkwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kxkwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kxkwx4~0 .lut_mask = 64'h0B080B08ABAAABAA;
+defparam \soc_inst|m0_1|u_logic|Kxkwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y4_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kxkwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kxkwx4~1_combout = ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Zoy2z4~q ) # ((!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Pcyvx4~combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Icyvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Pcyvx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kxkwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kxkwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kxkwx4~1 .lut_mask = 64'h00CC00CCF0FCF0FC;
+defparam \soc_inst|m0_1|u_logic|Kxkwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y9_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kxkwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kxkwx4~2_combout = ( !\soc_inst|m0_1|u_logic|Kxkwx4~1_combout & ( (\soc_inst|m0_1|u_logic|G2lwx4~combout & (!\soc_inst|m0_1|u_logic|Tykwx4~1_combout & !\soc_inst|m0_1|u_logic|Kxkwx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|G2lwx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Tykwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Kxkwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Kxkwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kxkwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kxkwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kxkwx4~2 .lut_mask = 64'h5000500000000000;
+defparam \soc_inst|m0_1|u_logic|Kxkwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y9_N26
+dffeas \soc_inst|m0_1|u_logic|Svk2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Kxkwx4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Svk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Svk2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y9_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C51xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C51xx4~0_combout = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q & (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|T1d3z4~q & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q
+// ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C51xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C51xx4~0 .lut_mask = 64'h0000000020002000;
+defparam \soc_inst|m0_1|u_logic|C51xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y9_N25
+dffeas \soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X45_Y13_N37
+dffeas \soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|J5m2z4~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X47_Y11_N50
+dffeas \soc_inst|m0_1|u_logic|Po53z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Po53z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Po53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Po53z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y11_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R40wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R40wx4~2_combout = ( \soc_inst|m0_1|u_logic|Bv03z4~q & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Yaz2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Bv03z4~q & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q &
+// ( \soc_inst|m0_1|u_logic|Yaz2z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|Bv03z4~q & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Svk2z4~q & ((!\soc_inst|m0_1|u_logic|Yaz2z4~q ) # (\soc_inst|m0_1|u_logic|X533z4~q ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Bv03z4~q & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|X533z4~q & (\soc_inst|m0_1|u_logic|Yaz2z4~q & \soc_inst|m0_1|u_logic|Svk2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|X533z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Bv03z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R40wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R40wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R40wx4~2 .lut_mask = 64'h000500F50F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|R40wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y9_N37
+dffeas \soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X39_Y4_N26
+dffeas \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Mekvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R40wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R40wx4~1_combout = ( \soc_inst|m0_1|u_logic|Hyz2z4~q & ( \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q & ((!\soc_inst|m0_1|u_logic|Yaz2z4~q ) # ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|Ow13z4~q )))) # (\soc_inst|m0_1|u_logic|Svk2z4~q & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hyz2z4~q & ( \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q & (
+// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Svk2z4~q & ((!\soc_inst|m0_1|u_logic|Yaz2z4~q ) # (\soc_inst|m0_1|u_logic|Ow13z4~q )))) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Svk2z4~q $
+// (\soc_inst|m0_1|u_logic|Yaz2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Hyz2z4~q & ( !\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Ow13z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~q &
+// \soc_inst|m0_1|u_logic|Yaz2z4~q ))) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (((!\soc_inst|m0_1|u_logic|Yaz2z4~q ) # (\soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hyz2z4~q & ( !\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q &
+// ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Ow13z4~q & (!\soc_inst|m0_1|u_logic|Svk2z4~q & \soc_inst|m0_1|u_logic|Yaz2z4~q ))) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Svk2z4~q $
+// (\soc_inst|m0_1|u_logic|Yaz2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ow13z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Hyz2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R40wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R40wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R40wx4~1 .lut_mask = 64'h50255525F025F525;
+defparam \soc_inst|m0_1|u_logic|R40wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y11_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R40wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R40wx4~0_combout = ( \soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|R40wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Po53z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|R40wx4~2_combout &
+// \soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|R40wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Po53z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|R40wx4~2_combout
+// & \soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|R40wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & !\soc_inst|m0_1|u_logic|R40wx4~2_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|R40wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & ((!\soc_inst|m0_1|u_logic|R40wx4~2_combout ) # (!\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Po53z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|R40wx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|R40wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R40wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R40wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R40wx4~0 .lut_mask = 64'hCCC0C0C000080008;
+defparam \soc_inst|m0_1|u_logic|R40wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R40wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R40wx4~combout = ( !\soc_inst|m0_1|u_logic|Fzxwx4~combout & ( !\soc_inst|m0_1|u_logic|R40wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|C51xx4~0_combout & (((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|C51xx4~0_combout & (\soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # (\soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Fzxwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|R40wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R40wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R40wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R40wx4 .lut_mask = 64'hAF23000000000000;
+defparam \soc_inst|m0_1|u_logic|R40wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y9_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[11]~8 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout = ( \soc_inst|m0_1|u_logic|Gm1wx4~combout & ( (!\soc_inst|m0_1|u_logic|Wq5wx4~combout ) # (\soc_inst|m0_1|u_logic|R40wx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Gm1wx4~combout & (
+// (\soc_inst|m0_1|u_logic|Wq5wx4~combout & \soc_inst|m0_1|u_logic|R40wx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Gm1wx4~combout ),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hwdata_o[11]~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[11]~8 .lut_mask = 64'h0505AFAF0505AFAF;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[11]~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y9_N9
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[11]~17 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[11]~17_combout = ( \soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout & ( (!\soc_inst|ram_1|byte_select [1] & (\soc_inst|ram_1|write_cycle~DUPLICATE_q & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ))
+// ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ) # (\soc_inst|ram_1|byte_select [1]))) ) )
+
+ .dataa(!\soc_inst|ram_1|byte_select [1]),
+ .datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .datac(gnd),
+ .datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|data_to_memory[11]~17_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[11]~17 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[11]~17 .lut_mask = 64'h1133113300220022;
+defparam \soc_inst|ram_1|data_to_memory[11]~17 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y9_N45
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[11]~24 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[11]~24_combout = ( \soc_inst|interconnect_1|HRDATA[11]~3_combout & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ) ) # ( !\soc_inst|interconnect_1|HRDATA[11]~3_combout & (
+// !\soc_inst|interconnect_1|HRDATA[25]~1_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+ .datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[11]~24_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[11]~24 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[11]~24 .lut_mask = 64'hF0F0F0F000FF00FF;
+defparam \soc_inst|interconnect_1|HRDATA[11]~24 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y8_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~13 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add1~13_sumout = SUM(( (\soc_inst|m0_1|u_logic|Nbm2z4~q & !\soc_inst|m0_1|u_logic|Bby2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~30 ))
+// \soc_inst|m0_1|u_logic|Add1~14 = CARRY(( (\soc_inst|m0_1|u_logic|Nbm2z4~q & !\soc_inst|m0_1|u_logic|Bby2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~30 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Bby2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add1~30 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add1~13_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add1~14 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add1~13 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~13 .lut_mask = 64'h0000000000005050;
+defparam \soc_inst|m0_1|u_logic|Add1~13 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y8_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I9nvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|I9nvx4~0_combout = ( \soc_inst|m0_1|u_logic|Bby2z4~q & ( \soc_inst|m0_1|u_logic|Edovx4~combout & ( (!\soc_inst|interconnect_1|HRDATA[11]~24_combout & (((!\soc_inst|m0_1|u_logic|Add1~13_sumout ) #
+// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout )))) # (\soc_inst|interconnect_1|HRDATA[11]~24_combout & (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout & ((!\soc_inst|m0_1|u_logic|Add1~13_sumout ) # (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout )))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Bby2z4~q & ( \soc_inst|m0_1|u_logic|Edovx4~combout & ( (!\soc_inst|interconnect_1|HRDATA[11]~24_combout & (((!\soc_inst|m0_1|u_logic|Add1~13_sumout ) # (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout )))) #
+// (\soc_inst|interconnect_1|HRDATA[11]~24_combout & (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout & ((!\soc_inst|m0_1|u_logic|Add1~13_sumout ) # (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Bby2z4~q & (
+// !\soc_inst|m0_1|u_logic|Edovx4~combout & ( (!\soc_inst|interconnect_1|HRDATA[11]~24_combout & (((!\soc_inst|m0_1|u_logic|Add1~13_sumout ) # (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout )))) # (\soc_inst|interconnect_1|HRDATA[11]~24_combout &
+// (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout & ((!\soc_inst|m0_1|u_logic|Add1~13_sumout ) # (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout )))) ) ) )
+
+ .dataa(!\soc_inst|interconnect_1|HRDATA[11]~24_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Add1~13_sumout ),
+ .datad(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Bby2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|I9nvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I9nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I9nvx4~0 .lut_mask = 64'h0000EEE0EEE0EEE0;
+defparam \soc_inst|m0_1|u_logic|I9nvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y8_N8
+dffeas \soc_inst|m0_1|u_logic|Bby2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|I9nvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Bby2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bby2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bby2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y8_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B9nvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|B9nvx4~0_combout = ( \soc_inst|m0_1|u_logic|Qcy2z4~q & ( \soc_inst|m0_1|u_logic|C9rvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Add1~1_sumout & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) #
+// (!\soc_inst|interconnect_1|HRDATA[12]~22_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qcy2z4~q & ( \soc_inst|m0_1|u_logic|C9rvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Add1~1_sumout & (\soc_inst|m0_1|u_logic|Edovx4~combout &
+// ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[12]~22_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Qcy2z4~q & ( !\soc_inst|m0_1|u_logic|C9rvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) #
+// (!\soc_inst|interconnect_1|HRDATA[12]~22_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qcy2z4~q & ( !\soc_inst|m0_1|u_logic|C9rvx4~2_combout & ( (\soc_inst|m0_1|u_logic|Edovx4~combout & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) #
+// (!\soc_inst|interconnect_1|HRDATA[12]~22_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Add1~1_sumout ),
+ .datab(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
+ .datad(!\soc_inst|interconnect_1|HRDATA[12]~22_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Qcy2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|B9nvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B9nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B9nvx4~0 .lut_mask = 64'h0F0CFFCC0A08AA88;
+defparam \soc_inst|m0_1|u_logic|B9nvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y8_N58
+dffeas \soc_inst|m0_1|u_logic|Qcy2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|B9nvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Qcy2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qcy2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qcy2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y9_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Knhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Knhvx4~0_combout = (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) # ((!\soc_inst|interconnect_1|HRDATA[29]~0_combout & (\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[29]~0_combout &
+// ((!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ))))
+
+ .dataa(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+ .datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+ .datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ),
+ .datad(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Knhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Knhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Knhvx4~0 .lut_mask = 64'hFF72FF72FF72FF72;
+defparam \soc_inst|m0_1|u_logic|Knhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X30_Y9_N59
+dffeas \soc_inst|m0_1|u_logic|Mww2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Knhvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Mww2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mww2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mww2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y9_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zgsvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zgsvx4~0_combout = ( \soc_inst|m0_1|u_logic|Qbpvx4~0_combout & ( (!\soc_inst|interconnect_1|HRDATA[29]~0_combout & ((!\soc_inst|interconnect_1|HRDATA[25]~1_combout ))) # (\soc_inst|interconnect_1|HRDATA[29]~0_combout &
+// (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ),
+ .datac(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+ .datad(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zgsvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zgsvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zgsvx4~0 .lut_mask = 64'h00000000F303F303;
+defparam \soc_inst|m0_1|u_logic|Zgsvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X30_Y9_N2
+dffeas \soc_inst|m0_1|u_logic|Hyy2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|T4nvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hyy2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hyy2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y9_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T4nvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T4nvx4~0_combout = ( \soc_inst|interconnect_1|HRDATA[12]~22_combout & ( (!\soc_inst|m0_1|u_logic|Vapvx4~combout & (!\soc_inst|m0_1|u_logic|Zgsvx4~0_combout & ((\soc_inst|m0_1|u_logic|Hyy2z4~q ) #
+// (\soc_inst|m0_1|u_logic|Scpvx4~2_combout )))) ) ) # ( !\soc_inst|interconnect_1|HRDATA[12]~22_combout & ( (!\soc_inst|m0_1|u_logic|Zgsvx4~0_combout & ((\soc_inst|m0_1|u_logic|Hyy2z4~q ) # (\soc_inst|m0_1|u_logic|Scpvx4~2_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Zgsvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[12]~22_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|T4nvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T4nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T4nvx4~0 .lut_mask = 64'h30F030F020A020A0;
+defparam \soc_inst|m0_1|u_logic|T4nvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y9_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T4nvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T4nvx4~1_combout = ( \soc_inst|m0_1|u_logic|Wfovx4~combout & ( \soc_inst|m0_1|u_logic|T4nvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Qcy2z4~q & ((!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mww2z4~q ))) )
+// ) ) # ( !\soc_inst|m0_1|u_logic|Wfovx4~combout & ( \soc_inst|m0_1|u_logic|T4nvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mww2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qcy2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Mww2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|T4nvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|T4nvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T4nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T4nvx4~1 .lut_mask = 64'h00000000F0FF5055;
+defparam \soc_inst|m0_1|u_logic|T4nvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X30_Y9_N1
+dffeas \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|T4nvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y3_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ocfwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ocfwx4~0_combout = ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Rngwx4~combout & ( (\soc_inst|m0_1|u_logic|Qem2z4~q & (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|U2x2z4~q )) )
+// ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ocfwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ocfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ocfwx4~0 .lut_mask = 64'h0101000000000000;
+defparam \soc_inst|m0_1|u_logic|Ocfwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y7_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rafwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rafwx4~0_combout = ( \soc_inst|m0_1|u_logic|Fbfwx4~1_combout & ( ((!\soc_inst|m0_1|u_logic|R1d2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Ocfwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dvy2z4~q )))) # (\soc_inst|m0_1|u_logic|Nqy2z4~q
+// ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ocfwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|R1d2z4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fbfwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rafwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rafwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rafwx4~0 .lut_mask = 64'h000000008CFF8CFF;
+defparam \soc_inst|m0_1|u_logic|Rafwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y7_N4
+dffeas \soc_inst|m0_1|u_logic|Rni2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Rafwx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rni2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rni2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X36_Y9_N40
+dffeas \soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X37_Y9_N53
+dffeas \soc_inst|m0_1|u_logic|L753z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|L753z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L753z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|L753z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y9_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Punvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Punvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|L753z4~q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|L753z4~q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q & (\soc_inst|m0_1|u_logic|Fgm2z4~q &
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|L753z4~q & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q &
+// (\soc_inst|m0_1|u_logic|Fgm2z4~q & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|L753z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Punvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Punvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Punvx4~0 .lut_mask = 64'h0022000200200000;
+defparam \soc_inst|m0_1|u_logic|Punvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y12_N47
+dffeas \soc_inst|m0_1|u_logic|Qi03z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Qi03z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qi03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qi03z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y11_N19
+dffeas \soc_inst|m0_1|u_logic|Wlz2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Wlz2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wlz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wlz2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y11_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Punvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Punvx4~2_combout = ( !\soc_inst|m0_1|u_logic|Rni2z4~q & ( \soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|Wlz2z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~q & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Rni2z4~q & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q & ( (!\soc_inst|m0_1|u_logic|Qi03z4~q & (!\soc_inst|m0_1|u_logic|Wzy2z4~q & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qi03z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wlz2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Punvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Punvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Punvx4~2 .lut_mask = 64'h00A0000000C00000;
+defparam \soc_inst|m0_1|u_logic|Punvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X40_Y12_N17
+dffeas \soc_inst|m0_1|u_logic|Kf13z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Kf13z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kf13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kf13z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X42_Y12_N16
+dffeas \soc_inst|m0_1|u_logic|To23z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|To23z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|To23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|To23z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X40_Y12_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Punvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Punvx4~1_combout = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|To23z4~q & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q & (!\soc_inst|m0_1|u_logic|Kf13z4~q & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Kf13z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|To23z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Punvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Punvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Punvx4~1 .lut_mask = 64'h000088000000A000;
+defparam \soc_inst|m0_1|u_logic|Punvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y9_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Punvx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Punvx4~3_combout = ( !\soc_inst|m0_1|u_logic|Punvx4~1_combout & ( !\soc_inst|m0_1|u_logic|Duuwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Duuwx4~2_combout & (!\soc_inst|m0_1|u_logic|Duuwx4~1_combout &
+// (!\soc_inst|m0_1|u_logic|Duuwx4~3_combout & !\soc_inst|m0_1|u_logic|Punvx4~2_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Duuwx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Duuwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Duuwx4~3_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Punvx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Punvx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Duuwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Punvx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Punvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Punvx4~3 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|Punvx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y9_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Punvx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Punvx4~4_combout = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( \soc_inst|m0_1|u_logic|Punvx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q ))) #
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (\soc_inst|m0_1|u_logic|Punvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( \soc_inst|m0_1|u_logic|Punvx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( !\soc_inst|m0_1|u_logic|Punvx4~3_combout & (
+// (!\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout & ( !\soc_inst|m0_1|u_logic|Punvx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout & (!\soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Punvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Punvx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Punvx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Punvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Punvx4~4 .lut_mask = 64'hF0CCF0FFF0CCF055;
+defparam \soc_inst|m0_1|u_logic|Punvx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y5_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T50wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T50wx4~0_combout = ( \soc_inst|m0_1|u_logic|Add5~93_sumout & ( (((\soc_inst|m0_1|u_logic|Punvx4~4_combout & \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout )) #
+// (\soc_inst|m0_1|u_logic|O092z4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~93_sumout & ( ((\soc_inst|m0_1|u_logic|Punvx4~4_combout & \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|O092z4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O092z4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Punvx4~4_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~93_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T50wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T50wx4~0 .lut_mask = 64'h557755775F7F5F7F;
+defparam \soc_inst|m0_1|u_logic|T50wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y7_N48
+cyclonev_lcell_comb \soc_inst|ram_1|byte1~0 (
+// Equation(s):
+// \soc_inst|ram_1|byte1~0_combout = ( \soc_inst|m0_1|u_logic|T50wx4~0_combout & ( \soc_inst|m0_1|u_logic|N5qvx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout & !\soc_inst|m0_1|u_logic|Qr42z4~1_combout )) #
+// (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|T50wx4~0_combout & ( \soc_inst|m0_1|u_logic|N5qvx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # ((\soc_inst|m0_1|u_logic|Hdh2z4~1_combout &
+// \soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|T50wx4~0_combout & ( !\soc_inst|m0_1|u_logic|N5qvx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout &
+// !\soc_inst|m0_1|u_logic|Qr42z4~1_combout )) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|T50wx4~0_combout & ( !\soc_inst|m0_1|u_logic|N5qvx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout &
+// ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ) # (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout )))) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|byte1~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|byte1~0 .extended_lut = "off";
+defparam \soc_inst|ram_1|byte1~0 .lut_mask = 64'hF5D5F555F5F7F555;
+defparam \soc_inst|ram_1|byte1~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y7_N49
+dffeas \soc_inst|ram_1|byte_select[1] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|ram_1|byte1~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|ram_1|always1~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|ram_1|byte_select [1]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|byte_select[1] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|byte_select[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y9_N48
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[14]~30 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[14]~30_combout = ( \soc_inst|m0_1|u_logic|Bq5wx4~0_combout & ( (!\soc_inst|ram_1|byte_select [1] & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout & \soc_inst|ram_1|write_cycle~DUPLICATE_q )) ) ) #
+// ( !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ) # (\soc_inst|ram_1|byte_select [1]))) ) )
+
+ .dataa(!\soc_inst|ram_1|byte_select [1]),
+ .datab(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ),
+ .datac(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|data_to_memory[14]~30_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[14]~30 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[14]~30 .lut_mask = 64'h0707070702020202;
+defparam \soc_inst|ram_1|data_to_memory[14]~30 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y10_N30
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[30]~34 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[30]~34_combout = ( \soc_inst|interconnect_1|HRDATA[25]~1_combout & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30 & ( \soc_inst|interconnect_1|HRDATA[29]~0_combout ) ) ) # (
+// !\soc_inst|interconnect_1|HRDATA[25]~1_combout & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30 ) ) # ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30 & (
+// !\soc_inst|interconnect_1|HRDATA[29]~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+ .dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30 ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[30]~34_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[30]~34 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[30]~34 .lut_mask = 64'hF0F00000FFFF0F0F;
+defparam \soc_inst|interconnect_1|HRDATA[30]~34 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y6_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wmhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wmhvx4~0_combout = ( \soc_inst|interconnect_1|HRDATA[30]~34_combout & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) ) # ( !\soc_inst|interconnect_1|HRDATA[30]~34_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[30]~34_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wmhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wmhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wmhvx4~0 .lut_mask = 64'hFFFFFFFFF0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Wmhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y6_N5
+dffeas \soc_inst|m0_1|u_logic|Qzw2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Wmhvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Qzw2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qzw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qzw2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y6_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M4nvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|M4nvx4~0_combout = ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Qzw2z4~q ) # ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Scpvx4~2_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Pfovx4~0_combout & ( (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qzw2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|M4nvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M4nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M4nvx4~0 .lut_mask = 64'hC0C0C0C0FFC0FFC0;
+defparam \soc_inst|m0_1|u_logic|M4nvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y8_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N8nvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N8nvx4~0_combout = ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout & ( (!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout & (((\soc_inst|m0_1|u_logic|Fey2z4~q ) # (\soc_inst|m0_1|u_logic|Edovx4~combout )))) #
+// (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout & (!\soc_inst|interconnect_1|HRDATA[11]~3_combout & ((\soc_inst|m0_1|u_logic|Fey2z4~q ) # (\soc_inst|m0_1|u_logic|Edovx4~combout )))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout & ( (\soc_inst|m0_1|u_logic|Fey2z4~q ) # (\soc_inst|m0_1|u_logic|Edovx4~combout ) ) )
+
+ .dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ),
+ .datab(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fey2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|N8nvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N8nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N8nvx4~0 .lut_mask = 64'h0FFF0FFF0EEE0EEE;
+defparam \soc_inst|m0_1|u_logic|N8nvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y8_N19
+dffeas \soc_inst|m0_1|u_logic|Fey2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|N8nvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Fey2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fey2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fey2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y6_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M4nvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|M4nvx4~1_combout = ( \soc_inst|m0_1|u_logic|Fey2z4~q & ( \soc_inst|m0_1|u_logic|Vapvx4~combout & ( (\soc_inst|interconnect_1|HRDATA[11]~3_combout & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ) ) ) ) #
+// ( !\soc_inst|m0_1|u_logic|Fey2z4~q & ( \soc_inst|m0_1|u_logic|Vapvx4~combout & ( ((\soc_inst|interconnect_1|HRDATA[11]~3_combout & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout )) # (\soc_inst|m0_1|u_logic|Wfovx4~combout ) ) )
+// ) # ( !\soc_inst|m0_1|u_logic|Fey2z4~q & ( !\soc_inst|m0_1|u_logic|Vapvx4~combout & ( \soc_inst|m0_1|u_logic|Wfovx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+ .datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ),
+ .datae(!\soc_inst|m0_1|u_logic|Fey2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|M4nvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M4nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M4nvx4~1 .lut_mask = 64'h0F0F00000F3F0033;
+defparam \soc_inst|m0_1|u_logic|M4nvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y6_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M4nvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|M4nvx4~2_combout = ( !\soc_inst|m0_1|u_logic|M4nvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|M4nvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[30]~34_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|interconnect_1|HRDATA[30]~34_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|M4nvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|M4nvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|M4nvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M4nvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M4nvx4~2 .lut_mask = 64'hFA00FA0000000000;
+defparam \soc_inst|m0_1|u_logic|M4nvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X30_Y6_N49
+dffeas \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|M4nvx4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y6_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhgwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mhgwx4~0_combout = ( \soc_inst|m0_1|u_logic|Howvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Ffj2z4~q & !\soc_inst|m0_1|u_logic|Ark2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mhgwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mhgwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mhgwx4~0 .lut_mask = 64'h000000000F000F00;
+defparam \soc_inst|m0_1|u_logic|Mhgwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y5_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iikwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Iikwx4~0_combout = ( !\soc_inst|m0_1|u_logic|U2x2z4~q & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q & (\soc_inst|m0_1|u_logic|Mhgwx4~0_combout & (\soc_inst|m0_1|u_logic|W7hwx4~0_combout & \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ))) )
+// )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Mhgwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|W7hwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Iikwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Iikwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Iikwx4~0 .lut_mask = 64'h0002000200000000;
+defparam \soc_inst|m0_1|u_logic|Iikwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y3_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Md6wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Md6wx4~0_combout = ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q & (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|V1yvx4~0_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Md6wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Md6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Md6wx4~0 .lut_mask = 64'h000C000C00000000;
+defparam \soc_inst|m0_1|u_logic|Md6wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y7_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dc6wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dc6wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Md6wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ffxvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|G97wx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Npk2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ffxvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Md6wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dc6wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dc6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dc6wx4~0 .lut_mask = 64'hFB00FB0000000000;
+defparam \soc_inst|m0_1|u_logic|Dc6wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y4_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dc6wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dc6wx4~1_combout = ( \soc_inst|m0_1|u_logic|B1vvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ae6wx4~0_combout & \soc_inst|m0_1|u_logic|Dc6wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|B1vvx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Ae6wx4~0_combout & (\soc_inst|m0_1|u_logic|Dc6wx4~0_combout & !\soc_inst|m0_1|u_logic|Qp3wx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ae6wx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Dc6wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qp3wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dc6wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dc6wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dc6wx4~1 .lut_mask = 64'h0A000A000A0A0A0A;
+defparam \soc_inst|m0_1|u_logic|Dc6wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y5_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R8d2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R8d2z4~0_combout = ( \soc_inst|m0_1|u_logic|Pkxvx4~0_combout & ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R8d2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R8d2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R8d2z4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|R8d2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y4_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uijwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uijwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q $ (\soc_inst|m0_1|u_logic|Zoy2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Uijwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uijwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uijwx4~0 .lut_mask = 64'hA050A05000000000;
+defparam \soc_inst|m0_1|u_logic|Uijwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y4_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qf6wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qf6wx4~0_combout = ( \soc_inst|m0_1|u_logic|Dj6wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q & (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Ahwvx4~0_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qf6wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qf6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qf6wx4~0 .lut_mask = 64'h0000000000C000C0;
+defparam \soc_inst|m0_1|u_logic|Qf6wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y7_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uv6wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uv6wx4~combout = ( \soc_inst|interconnect_1|HREADY~0_combout & ( (!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Fij2z4~q & !\soc_inst|m0_1|u_logic|Nsk2z4~q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Uv6wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uv6wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uv6wx4 .lut_mask = 64'h00000000FFC0FFC0;
+defparam \soc_inst|m0_1|u_logic|Uv6wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y4_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q86wx4~2_combout = ( \soc_inst|m0_1|u_logic|Uv6wx4~combout & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q ) # (((!\soc_inst|m0_1|u_logic|Uijwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Qf6wx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Uijwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qf6wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Uv6wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q86wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q86wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~2 .lut_mask = 64'h00000000FFFBFFFB;
+defparam \soc_inst|m0_1|u_logic|Q86wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y4_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q86wx4~3_combout = ( \soc_inst|m0_1|u_logic|Q86wx4~2_combout & ( (((!\soc_inst|m0_1|u_logic|Lu6wx4~0_combout ) # (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )) #
+// (\soc_inst|m0_1|u_logic|U2x2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Lu6wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Q86wx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q86wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q86wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~3 .lut_mask = 64'h00000000F7FFF7FF;
+defparam \soc_inst|m0_1|u_logic|Q86wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y10_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vsywx4~7_combout = (!\soc_inst|m0_1|u_logic|Inb2z4~combout & \soc_inst|m0_1|u_logic|Vsywx4~6_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Inb2z4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Vsywx4~6_combout ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vsywx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vsywx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~7 .lut_mask = 64'h00F000F000F000F0;
+defparam \soc_inst|m0_1|u_logic|Vsywx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y10_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6mwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C6mwx4~1_combout = ( \soc_inst|m0_1|u_logic|Ozywx4~0_combout & ( \soc_inst|m0_1|u_logic|Pwywx4~0_combout & ( (\soc_inst|m0_1|u_logic|Xtywx4~0_combout & (((\soc_inst|m0_1|u_logic|Vsywx4~7_combout ) #
+// (\soc_inst|m0_1|u_logic|Wwywx4~0_combout )) # (\soc_inst|m0_1|u_logic|Hzywx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ozywx4~0_combout & ( \soc_inst|m0_1|u_logic|Pwywx4~0_combout & ( (\soc_inst|m0_1|u_logic|Xtywx4~0_combout &
+// (((\soc_inst|m0_1|u_logic|Hzywx4~0_combout & !\soc_inst|m0_1|u_logic|Wwywx4~0_combout )) # (\soc_inst|m0_1|u_logic|Vsywx4~7_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ozywx4~0_combout & ( !\soc_inst|m0_1|u_logic|Pwywx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|Xtywx4~0_combout & (((\soc_inst|m0_1|u_logic|Vsywx4~7_combout ) # (\soc_inst|m0_1|u_logic|Wwywx4~0_combout )) # (\soc_inst|m0_1|u_logic|Hzywx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ozywx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Pwywx4~0_combout & ( (\soc_inst|m0_1|u_logic|Xtywx4~0_combout & \soc_inst|m0_1|u_logic|Vsywx4~7_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Hzywx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Xtywx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Vsywx4~7_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ozywx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Pwywx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C6mwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C6mwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C6mwx4~1 .lut_mask = 64'h0033133310331333;
+defparam \soc_inst|m0_1|u_logic|C6mwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y10_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rqywx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rqywx4~0_combout = ( \soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Ye4wx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q & (
+// (!\soc_inst|m0_1|u_logic|U7w2z4~q ) # (\soc_inst|m0_1|u_logic|Ye4wx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|U7w2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rqywx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rqywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rqywx4~0 .lut_mask = 64'hFF0FFF0F05050505;
+defparam \soc_inst|m0_1|u_logic|Rqywx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y10_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6mwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C6mwx4~2_combout = ( \soc_inst|m0_1|u_logic|Wwywx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Pwywx4~0_combout & !\soc_inst|m0_1|u_logic|Ye4wx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Wwywx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Ye4wx4~combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pwywx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C6mwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C6mwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C6mwx4~2 .lut_mask = 64'hF0F0F0F0A0A0A0A0;
+defparam \soc_inst|m0_1|u_logic|C6mwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y10_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V5mwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|V5mwx4~0_combout = ( \soc_inst|m0_1|u_logic|C6mwx4~3_combout & ( (\soc_inst|m0_1|u_logic|Rqywx4~0_combout & ((!\soc_inst|m0_1|u_logic|C6mwx4~2_combout ) # (\soc_inst|m0_1|u_logic|C6mwx4~1_combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|C6mwx4~3_combout & ( (\soc_inst|m0_1|u_logic|Rqywx4~0_combout & !\soc_inst|m0_1|u_logic|C6mwx4~2_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|C6mwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Rqywx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|C6mwx4~2_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|C6mwx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|V5mwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V5mwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V5mwx4~0 .lut_mask = 64'h0F000F000F030F03;
+defparam \soc_inst|m0_1|u_logic|V5mwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X22_Y10_N31
+dffeas \soc_inst|m0_1|u_logic|G9w2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|V5mwx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|G9w2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G9w2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G9w2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y7_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xf6wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xf6wx4~0_combout = ( \soc_inst|m0_1|u_logic|G9w2z4~q & ( (\soc_inst|m0_1|u_logic|Ncqvx4~0_combout & (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Orewx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Kzxvx4~combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|G9w2z4~q & ( (\soc_inst|m0_1|u_logic|Ncqvx4~0_combout & (((\soc_inst|m0_1|u_logic|Kzxvx4~combout & \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )) #
+// (\soc_inst|m0_1|u_logic|Orewx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|G9w2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xf6wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xf6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xf6wx4~0 .lut_mask = 64'h0155015501050105;
+defparam \soc_inst|m0_1|u_logic|Xf6wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y6_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ua6wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ua6wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Rexvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Emi2z4~q & \soc_inst|m0_1|u_logic|Orewx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ua6wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ua6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ua6wx4~0 .lut_mask = 64'h0101000001010000;
+defparam \soc_inst|m0_1|u_logic|Ua6wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y6_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q86wx4~0_combout = ( \soc_inst|m0_1|u_logic|Zzfwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ua6wx4~0_combout & (!\soc_inst|m0_1|u_logic|Og4wx4~0_combout & !\soc_inst|m0_1|u_logic|Wdqvx4~0_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Zzfwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ua6wx4~0_combout & !\soc_inst|m0_1|u_logic|Og4wx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Ua6wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Og4wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q86wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q86wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~0 .lut_mask = 64'hC0C0C0C0C000C000;
+defparam \soc_inst|m0_1|u_logic|Q86wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y4_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gpjwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gpjwx4~0_combout = ( \soc_inst|m0_1|u_logic|Swy2z4~q & ( (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|U2x2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~q & ( (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q &
+// (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|U2x2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Gpjwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gpjwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gpjwx4~0 .lut_mask = 64'h40404040C0C0C0C0;
+defparam \soc_inst|m0_1|u_logic|Gpjwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y4_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q86wx4~1_combout = ( \soc_inst|m0_1|u_logic|Na6wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Y6t2z4~q & (\soc_inst|m0_1|u_logic|Q86wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Csewx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Gpjwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Na6wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Q86wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Csewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Gpjwx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Q86wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Gpjwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Na6wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q86wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q86wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~1 .lut_mask = 64'h0F0C0F0C0A080A08;
+defparam \soc_inst|m0_1|u_logic|Q86wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y4_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q86wx4~4_combout = ( \soc_inst|m0_1|u_logic|Q86wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Fzyvx4~0_combout & (\soc_inst|m0_1|u_logic|Bkxvx4~0_combout & (\soc_inst|m0_1|u_logic|Q86wx4~3_combout &
+// !\soc_inst|m0_1|u_logic|Xf6wx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fzyvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Bkxvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Q86wx4~3_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Xf6wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Q86wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q86wx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q86wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~4 .lut_mask = 64'h0000000002000200;
+defparam \soc_inst|m0_1|u_logic|Q86wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y4_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q86wx4~5_combout = ( \soc_inst|m0_1|u_logic|Ark2z4~q & ( (!\soc_inst|m0_1|u_logic|R8d2z4~0_combout & \soc_inst|m0_1|u_logic|Q86wx4~4_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~q & ( (\soc_inst|m0_1|u_logic|Q86wx4~4_combout
+// & ((!\soc_inst|m0_1|u_logic|R8d2z4~0_combout ) # (\soc_inst|m0_1|u_logic|Fjewx4~1_combout ))) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|R8d2z4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Q86wx4~4_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q86wx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q86wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~5 .lut_mask = 64'h00CF00CF00CC00CC;
+defparam \soc_inst|m0_1|u_logic|Q86wx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y4_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q86wx4~6_combout = ( \soc_inst|m0_1|u_logic|Q86wx4~5_combout & ( (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & (((\soc_inst|m0_1|u_logic|Dc6wx4~1_combout )) # (\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ))) #
+// (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Iikwx4~0_combout & ((\soc_inst|m0_1|u_logic|Dc6wx4~1_combout ) # (\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Iikwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Dc6wx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Q86wx4~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q86wx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q86wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~6 .lut_mask = 64'h0000000032FA32FA;
+defparam \soc_inst|m0_1|u_logic|Q86wx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y3_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jm6wx4~1_combout = ( \soc_inst|m0_1|u_logic|Zoy2z4~q & ( \soc_inst|m0_1|u_logic|G27wx4~2_combout & ( (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q $
+// (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zoy2z4~q & ( \soc_inst|m0_1|u_logic|G27wx4~2_combout & ( (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|G27wx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jm6wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~1 .lut_mask = 64'h0000000050500550;
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y5_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jm6wx4~2_combout = ( \soc_inst|m0_1|u_logic|Swy2z4~q & ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Qem2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~q & ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q &
+// ( \soc_inst|m0_1|u_logic|Qem2z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|Swy2z4~q & ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Qem2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jm6wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~2 .lut_mask = 64'h00000F0F0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y5_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jm6wx4~3_combout = ( \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Jm6wx4~2_combout & ( (\soc_inst|m0_1|u_logic|U2x2z4~q & (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Jm6wx4~1_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Jm6wx4~2_combout & ( \soc_inst|m0_1|u_logic|U2x2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Jm6wx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Jm6wx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jm6wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~3 .lut_mask = 64'h0000333300003000;
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y7_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eyhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eyhvx4~0_combout = ( !\soc_inst|interconnect_1|HREADY~0_combout & ( \soc_inst|m0_1|u_logic|Pdi2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Eyhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eyhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eyhvx4~0 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|Eyhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y4_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ad7wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ad7wx4~0_combout = ( \soc_inst|m0_1|u_logic|Dvy2z4~q & ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~q & ( (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Swy2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ad7wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ad7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ad7wx4~0 .lut_mask = 64'h5050505055555555;
+defparam \soc_inst|m0_1|u_logic|Ad7wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y7_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P28wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P28wx4~combout = ( \soc_inst|m0_1|u_logic|Z78wx4~6_combout & ( \soc_inst|m0_1|u_logic|N88wx4~16_combout & ( !\soc_inst|m0_1|u_logic|W28wx4~0_combout $ (((!\soc_inst|m0_1|u_logic|Qb3wx4~combout ) #
+// (!\soc_inst|m0_1|u_logic|Igi2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z78wx4~6_combout & ( \soc_inst|m0_1|u_logic|N88wx4~16_combout & ( !\soc_inst|m0_1|u_logic|W28wx4~0_combout $ (((!\soc_inst|m0_1|u_logic|Qb3wx4~combout &
+// (\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Qb3wx4~combout & ((!\soc_inst|m0_1|u_logic|Igi2z4~q ))))) ) ) ) # ( \soc_inst|m0_1|u_logic|Z78wx4~6_combout & ( !\soc_inst|m0_1|u_logic|N88wx4~16_combout & (
+// !\soc_inst|m0_1|u_logic|W28wx4~0_combout $ (((!\soc_inst|m0_1|u_logic|Qb3wx4~combout & (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Qb3wx4~combout & ((!\soc_inst|m0_1|u_logic|Igi2z4~q ))))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Z78wx4~6_combout & ( !\soc_inst|m0_1|u_logic|N88wx4~16_combout & ( !\soc_inst|m0_1|u_logic|W28wx4~0_combout $ (((\soc_inst|m0_1|u_logic|Qb3wx4~combout & !\soc_inst|m0_1|u_logic|Igi2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Qb3wx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|W28wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Igi2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Z78wx4~6_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|N88wx4~16_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|P28wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P28wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P28wx4 .lut_mask = 64'hC3F04B7887B40F3C;
+defparam \soc_inst|m0_1|u_logic|P28wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y4_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jm6wx4~4_combout = ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q & (\soc_inst|m0_1|u_logic|Dvy2z4~q & ((!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Swy2z4~q )))) )
+// ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Qem2z4~q ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jm6wx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~4 .lut_mask = 64'hAAAAAAAA22202220;
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y3_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hyewx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hyewx4~combout = ( \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Rxl2z4~q & \soc_inst|m0_1|u_logic|Yzi2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hyewx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hyewx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hyewx4 .lut_mask = 64'h0000000000000505;
+defparam \soc_inst|m0_1|u_logic|Hyewx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y5_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jm6wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Nqy2z4~q & (\soc_inst|m0_1|u_logic|Hyewx4~combout & \soc_inst|m0_1|u_logic|Zoy2z4~q ))) )
+// )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Hyewx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jm6wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~0 .lut_mask = 64'h0001000100000000;
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y5_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jm6wx4~5_combout = ( \soc_inst|m0_1|u_logic|Xly2z4~q & ( \soc_inst|m0_1|u_logic|Jm6wx4~0_combout & ( (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Jm6wx4~4_combout ) # ((!\soc_inst|m0_1|u_logic|Dvy2z4~q
+// & !\soc_inst|m0_1|u_logic|Swy2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xly2z4~q & ( \soc_inst|m0_1|u_logic|Jm6wx4~0_combout & ( (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Jm6wx4~4_combout ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Xly2z4~q & ( !\soc_inst|m0_1|u_logic|Jm6wx4~0_combout & ( (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Jm6wx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xly2z4~q & (
+// !\soc_inst|m0_1|u_logic|Jm6wx4~0_combout & ( (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Jm6wx4~4_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Jm6wx4~4_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Jm6wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jm6wx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~5 .lut_mask = 64'h5500550055005540;
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y7_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jm6wx4~6_combout = (\soc_inst|m0_1|u_logic|Qem2z4~q & !\soc_inst|m0_1|u_logic|Blwvx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Blwvx4~0_combout ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jm6wx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~6 .lut_mask = 64'h0F000F000F000F00;
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xt6wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xt6wx4~0_combout = ( \soc_inst|m0_1|u_logic|Swy2z4~q & ( (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Dvy2z4~q & ((!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout ) # (!\soc_inst|m0_1|u_logic|Zei2z4~q )))) ) )
+// # ( !\soc_inst|m0_1|u_logic|Swy2z4~q & ( (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Dvy2z4~q & ((!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout ) # (!\soc_inst|m0_1|u_logic|Zei2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Zei2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xt6wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xt6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xt6wx4~0 .lut_mask = 64'h050405040A080A08;
+defparam \soc_inst|m0_1|u_logic|Xt6wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y11_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q07wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q07wx4~1_combout = ( \soc_inst|m0_1|u_logic|Swy2z4~q & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~q & \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~q & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~q ) #
+// (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q07wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q07wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q07wx4~1 .lut_mask = 64'hFFF0FFF000F000F0;
+defparam \soc_inst|m0_1|u_logic|Q07wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X07wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|X07wx4~0_combout = ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|S17wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Idk2z4~q & (!\soc_inst|m0_1|u_logic|Swy2z4~q & (\soc_inst|m0_1|u_logic|Zxpvx4~0_combout &
+// !\soc_inst|m0_1|u_logic|Dvy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|S17wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Idk2z4~q & (\soc_inst|m0_1|u_logic|Zxpvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Swy2z4~q
+// ) # (!\soc_inst|m0_1|u_logic|Dvy2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|S17wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q & (!\soc_inst|m0_1|u_logic|Dvy2z4~q & ((!\soc_inst|m0_1|u_logic|Idk2z4~q
+// ) # (!\soc_inst|m0_1|u_logic|Zxpvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|S17wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Idk2z4~q & ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) #
+// ((!\soc_inst|m0_1|u_logic|Dvy2z4~q )))) # (\soc_inst|m0_1|u_logic|Idk2z4~q & (!\soc_inst|m0_1|u_logic|Zxpvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # (!\soc_inst|m0_1|u_logic|Dvy2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Idk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Zxpvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|S17wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|X07wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X07wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X07wx4~0 .lut_mask = 64'hFAC8C8000A080800;
+defparam \soc_inst|m0_1|u_logic|X07wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q07wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q07wx4~0_combout = ( \soc_inst|m0_1|u_logic|Y5zvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Qb3wx4~combout & (((\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Fc7wx4~1_combout )))) #
+// (\soc_inst|m0_1|u_logic|Qb3wx4~combout & (\soc_inst|m0_1|u_logic|Gci2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Y5zvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Qb3wx4~combout & (((\soc_inst|m0_1|u_logic|Fc7wx4~1_combout &
+// !\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Qb3wx4~combout & (\soc_inst|m0_1|u_logic|Gci2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Gci2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fc7wx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Qb3wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Y5zvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q07wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q07wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q07wx4~0 .lut_mask = 64'h3505350535F535F5;
+defparam \soc_inst|m0_1|u_logic|Q07wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xt6wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xt6wx4~1_combout = ( \soc_inst|m0_1|u_logic|X07wx4~0_combout & ( \soc_inst|m0_1|u_logic|Q07wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Q07wx4~1_combout & ((!\soc_inst|m0_1|u_logic|Xt6wx4~0_combout ) #
+// ((!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout & !\soc_inst|m0_1|u_logic|Dtpvx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|X07wx4~0_combout & ( \soc_inst|m0_1|u_logic|Q07wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Q07wx4~1_combout &
+// ((!\soc_inst|m0_1|u_logic|Xt6wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout & !\soc_inst|m0_1|u_logic|Dtpvx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|X07wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Q07wx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Xt6wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout & !\soc_inst|m0_1|u_logic|Dtpvx4~1_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Xt6wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Dtpvx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Q07wx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|X07wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Q07wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xt6wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xt6wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xt6wx4~1 .lut_mask = 64'hEAEA0000EA0000EA;
+defparam \soc_inst|m0_1|u_logic|Xt6wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y7_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jm6wx4~7_combout = ( \soc_inst|m0_1|u_logic|Jm6wx4~6_combout & ( \soc_inst|m0_1|u_logic|Xt6wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Jm6wx4~5_combout & (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q $
+// (((\soc_inst|m0_1|u_logic|Ad7wx4~0_combout & \soc_inst|m0_1|u_logic|P28wx4~combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jm6wx4~6_combout & ( \soc_inst|m0_1|u_logic|Xt6wx4~1_combout & ( !\soc_inst|m0_1|u_logic|Jm6wx4~5_combout ) ) ) # (
+// \soc_inst|m0_1|u_logic|Jm6wx4~6_combout & ( !\soc_inst|m0_1|u_logic|Xt6wx4~1_combout & ( (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Jm6wx4~5_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jm6wx4~6_combout & (
+// !\soc_inst|m0_1|u_logic|Xt6wx4~1_combout & ( !\soc_inst|m0_1|u_logic|Jm6wx4~5_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ad7wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|P28wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Jm6wx4~5_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Jm6wx4~6_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Xt6wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jm6wx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~7 .lut_mask = 64'hFF003300FF00C900;
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y7_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eyhvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eyhvx4~1_combout = ( \soc_inst|m0_1|u_logic|Eyhvx4~0_combout & ( \soc_inst|m0_1|u_logic|Jm6wx4~7_combout ) ) # ( !\soc_inst|m0_1|u_logic|Eyhvx4~0_combout & ( \soc_inst|m0_1|u_logic|Jm6wx4~7_combout & (
+// (\soc_inst|m0_1|u_logic|Q86wx4~6_combout & ((!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Jm6wx4~3_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Eyhvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Jm6wx4~7_combout ) ) # (
+// !\soc_inst|m0_1|u_logic|Eyhvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Jm6wx4~7_combout & ( (\soc_inst|m0_1|u_logic|Q86wx4~6_combout & ((!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Jm6wx4~3_combout &
+// \soc_inst|m0_1|u_logic|U2x2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Q86wx4~6_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Jm6wx4~3_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Eyhvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Jm6wx4~7_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Eyhvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eyhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eyhvx4~1 .lut_mask = 64'h4454FFFF5454FFFF;
+defparam \soc_inst|m0_1|u_logic|Eyhvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X36_Y7_N56
+dffeas \soc_inst|m0_1|u_logic|Pdi2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Eyhvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pdi2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pdi2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y10_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cxhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cxhvx4~0_combout = ( \soc_inst|m0_1|u_logic|Qaiwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout & ( \soc_inst|m0_1|u_logic|Fcj2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Lefwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # (!\soc_inst|m0_1|u_logic|Fcj2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cxhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cxhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cxhvx4~0 .lut_mask = 64'hFAFA0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|Cxhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y9_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cxhvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cxhvx4~1_combout = ( \soc_inst|m0_1|u_logic|H4nwx4~combout & ( \soc_inst|m0_1|u_logic|C2rvx4~2_combout & ( (\soc_inst|m0_1|u_logic|Cxhvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Add5~93_sumout ) #
+// (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H4nwx4~combout & ( \soc_inst|m0_1|u_logic|C2rvx4~2_combout & ( (\soc_inst|m0_1|u_logic|Cxhvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Add5~93_sumout ) #
+// (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H4nwx4~combout & ( !\soc_inst|m0_1|u_logic|C2rvx4~2_combout & ( (\soc_inst|m0_1|u_logic|Cxhvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Add5~93_sumout ) #
+// (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Add5~93_sumout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Cxhvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|C2rvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cxhvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cxhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cxhvx4~1 .lut_mask = 64'h00FA000000FA00FA;
+defparam \soc_inst|m0_1|u_logic|Cxhvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X33_Y9_N59
+dffeas \soc_inst|m0_1|u_logic|Fcj2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Cxhvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Fcj2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fcj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fcj2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y9_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vllvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vllvx4~0_combout = ( \soc_inst|m0_1|u_logic|Orewx4~0_combout & ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout & ( !\soc_inst|m0_1|u_logic|Fcj2z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|Orewx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Df3wx4~9_combout & ( !\soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Orewx4~0_combout & ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout & ( !\soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vllvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vllvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vllvx4~0 .lut_mask = 64'hCCCCCCCC0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Vllvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y3_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qnyvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qnyvx4~0_combout = ( \soc_inst|m0_1|u_logic|Swy2z4~q & ( (\soc_inst|m0_1|u_logic|R1pvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Tki2z4~q ) # (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~q
+// & ( (\soc_inst|m0_1|u_logic|R1pvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Tki2z4~q ) # ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qnyvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qnyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qnyvx4~0 .lut_mask = 64'h0E0A0E0A0E0E0E0E;
+defparam \soc_inst|m0_1|u_logic|Qnyvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y11_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vllvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vllvx4~1_combout = ( \soc_inst|m0_1|u_logic|Qnyvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Vllvx4~0_combout & (!\soc_inst|m0_1|u_logic|T50wx4~0_combout & ((!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|G0w2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Qnyvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Vllvx4~0_combout & ((!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ) # (\soc_inst|m0_1|u_logic|G0w2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vllvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qnyvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vllvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vllvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vllvx4~1 .lut_mask = 64'hAA0AAA0A88088808;
+defparam \soc_inst|m0_1|u_logic|Vllvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X39_Y11_N22
+dffeas \soc_inst|m0_1|u_logic|U4z2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Vllvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|U4z2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U4z2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U4z2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y12_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htyvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Htyvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q & ( \soc_inst|m0_1|u_logic|Svk2z4~q & ( (!\soc_inst|m0_1|u_logic|Qi03z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q & ( !\soc_inst|m0_1|u_logic|Svk2z4~q & ( (!\soc_inst|m0_1|u_logic|U4z2z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|U4z2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Qi03z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Htyvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Htyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Htyvx4~0 .lut_mask = 64'hA0000000C0000000;
+defparam \soc_inst|m0_1|u_logic|Htyvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X36_Y9_N41
+dffeas \soc_inst|m0_1|u_logic|Cy33z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Cy33z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cy33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cy33z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y9_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htyvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Htyvx4~1_combout = ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Cy33z4~q & ( (!\soc_inst|m0_1|u_logic|Wlz2z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q
+// & !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Cy33z4~q & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Cy33z4~q & ( (!\soc_inst|m0_1|u_logic|Wlz2z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wlz2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Cy33z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Htyvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Htyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Htyvx4~1 .lut_mask = 64'h02000C0002000000;
+defparam \soc_inst|m0_1|u_logic|Htyvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X37_Y9_N52
+dffeas \soc_inst|m0_1|u_logic|L753z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|L753z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L753z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|L753z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y9_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htyvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Htyvx4~2_combout = ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout & ( \soc_inst|m0_1|u_logic|Ld1xx4~0_combout & ( (\soc_inst|m0_1|u_logic|To23z4~q & (\soc_inst|m0_1|u_logic|L753z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Kf13z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sd1xx4~0_combout & ( \soc_inst|m0_1|u_logic|Ld1xx4~0_combout & ( (\soc_inst|m0_1|u_logic|To23z4~q &
+// ((!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Kf13z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ld1xx4~0_combout & ( (\soc_inst|m0_1|u_logic|L753z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Kf13z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sd1xx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ld1xx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Kf13z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Kf13z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|To23z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|L753z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Htyvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Htyvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Htyvx4~2 .lut_mask = 64'hFF550F0533110301;
+defparam \soc_inst|m0_1|u_logic|Htyvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y9_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htyvx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Htyvx4~3_combout = ( \soc_inst|m0_1|u_logic|Htyvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Htyvx4~0_combout & (!\soc_inst|m0_1|u_logic|Htyvx4~1_combout & !\soc_inst|m0_1|u_logic|V7ywx4~combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Htyvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Htyvx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|V7ywx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Htyvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Htyvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Htyvx4~3 .lut_mask = 64'h00000000C000C000;
+defparam \soc_inst|m0_1|u_logic|Htyvx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y9_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[1] (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hwdata_o [1] = (\soc_inst|m0_1|u_logic|Y9t2z4~q & !\soc_inst|m0_1|u_logic|Htyvx4~3_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hwdata_o [1]),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hwdata_o[1] .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[1] .lut_mask = 64'h0F000F000F000F00;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[1] .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y9_N52
+dffeas \soc_inst|m0_1|u_logic|R0t2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o [1]),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|U1uvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|R0t2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R0t2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|R0t2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y9_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rexvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rexvx4~0_combout = ( !\soc_inst|m0_1|u_logic|G7x2z4~q & ( (\soc_inst|m0_1|u_logic|R0t2z4~q & \soc_inst|m0_1|u_logic|G9w2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|R0t2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|G9w2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|G7x2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rexvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rexvx4~0 .lut_mask = 64'h000F000F00000000;
+defparam \soc_inst|m0_1|u_logic|Rexvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y7_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Scpvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Scpvx4~0_combout = ( \soc_inst|m0_1|u_logic|Rexvx4~0_combout & ( \soc_inst|m0_1|u_logic|Ppsvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Wpsvx4~0_combout & (!\soc_inst|m0_1|u_logic|I1c2z4~combout &
+// ((!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Jyb2z4~2_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rexvx4~0_combout & ( \soc_inst|m0_1|u_logic|Ppsvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Wpsvx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|I1c2z4~combout & \soc_inst|m0_1|u_logic|Jyb2z4~2_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wpsvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|I1c2z4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Jyb2z4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ppsvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Scpvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Scpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Scpvx4~0 .lut_mask = 64'h0000000088A880A0;
+defparam \soc_inst|m0_1|u_logic|Scpvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y10_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5pvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z5pvx4~0_combout = ( \soc_inst|m0_1|u_logic|Ypa2z4~0_combout & ( \soc_inst|m0_1|u_logic|Ik4wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Una2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Kofwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|C34wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ypa2z4~0_combout & ( \soc_inst|m0_1|u_logic|Ik4wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Una2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Kofwx4~0_combout ) #
+// ((\soc_inst|m0_1|u_logic|C34wx4~0_combout & !\soc_inst|m0_1|u_logic|Ypa2z4~1_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|C34wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Kofwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ypa2z4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Una2z4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ypa2z4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ik4wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z5pvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~0 .lut_mask = 64'h00000000DC00DD00;
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y7_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|It52z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|It52z4~0_combout = ( \soc_inst|m0_1|u_logic|Fcj2z4~q & ( \soc_inst|m0_1|u_logic|Dcrwx4~6_combout & ( !\soc_inst|m0_1|u_logic|Hxx2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Fcj2z4~q & ( \soc_inst|m0_1|u_logic|Dcrwx4~6_combout & (
+// !\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q ) ) ) # ( \soc_inst|m0_1|u_logic|Fcj2z4~q & ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout & ( (!\soc_inst|m0_1|u_logic|Hxx2z4~q & \soc_inst|m0_1|u_logic|M9pvx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Fcj2z4~q & ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout & ( (!\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|M9pvx4~0_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|It52z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|It52z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|It52z4~0 .lut_mask = 64'h00CC00F0CCCCF0F0;
+defparam \soc_inst|m0_1|u_logic|It52z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y7_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|It52z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|It52z4~1_combout = ( \soc_inst|m0_1|u_logic|It52z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Fcj2z4~q & (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Vaw2z4~q )) ) ) # (
+// !\soc_inst|m0_1|u_logic|It52z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ipsvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Fcj2z4~q & (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Vaw2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ipsvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Vaw2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|It52z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|It52z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|It52z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|It52z4~1 .lut_mask = 64'hCECCCECC0A000A00;
+defparam \soc_inst|m0_1|u_logic|It52z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y7_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|It52z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|It52z4~2_combout = ( \soc_inst|m0_1|u_logic|Z5pvx4~0_combout & ( \soc_inst|m0_1|u_logic|It52z4~1_combout & ( (\soc_inst|m0_1|u_logic|Scpvx4~0_combout & \soc_inst|m0_1|u_logic|Z5pvx4~3_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Z5pvx4~0_combout & ( \soc_inst|m0_1|u_logic|It52z4~1_combout & ( (\soc_inst|m0_1|u_logic|Scpvx4~0_combout & (!\soc_inst|m0_1|u_logic|S4w2z4~q & \soc_inst|m0_1|u_logic|Z5pvx4~3_combout )) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Scpvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Z5pvx4~3_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Z5pvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|It52z4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|It52z4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|It52z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|It52z4~2 .lut_mask = 64'h0000000000300033;
+defparam \soc_inst|m0_1|u_logic|It52z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y7_N36
+cyclonev_lcell_comb \soc_inst|ram_1|byte0~0 (
+// Equation(s):
+// \soc_inst|ram_1|byte0~0_combout = ( \soc_inst|m0_1|u_logic|N5qvx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout & !\soc_inst|m0_1|u_logic|T50wx4~0_combout ))) #
+// (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|N5qvx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|T50wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout )) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|byte0~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|byte0~0 .extended_lut = "off";
+defparam \soc_inst|ram_1|byte0~0 .lut_mask = 64'hFFF5FFF5FFD5FFD5;
+defparam \soc_inst|ram_1|byte0~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y7_N37
+dffeas \soc_inst|ram_1|byte_select[0] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|ram_1|byte0~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|ram_1|always1~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|ram_1|byte_select [0]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|byte_select[0] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|byte_select[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X15_Y5_N0
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[5]~23 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[5]~23_combout = ( \soc_inst|m0_1|u_logic|hwdata_o [5] & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout & ( (!\soc_inst|ram_1|byte_select [0] & \soc_inst|ram_1|write_cycle~q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|hwdata_o [5] & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout & ( \soc_inst|ram_1|write_cycle~q ) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o [5] & (
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout & ( (\soc_inst|ram_1|byte_select [0] & \soc_inst|ram_1|write_cycle~q ) ) ) )
+
+ .dataa(!\soc_inst|ram_1|byte_select [0]),
+ .datab(!\soc_inst|ram_1|write_cycle~q ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|hwdata_o [5]),
+ .dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|data_to_memory[5]~23_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[5]~23 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[5]~23 .lut_mask = 64'h1111000033332222;
+defparam \soc_inst|ram_1|data_to_memory[5]~23 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y5_N56
+dffeas \soc_inst|switches_1|switch_store[0][5] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\SW[5]~input_o ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|switches_1|always0~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|switches_1|switch_store[0][5]~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[0][5] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[0][5] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y5_N54
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[5]~28 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[5]~28_combout = ( \soc_inst|switches_1|switch_store[0][5]~q & ( \soc_inst|interconnect_1|HRDATA[7]~10_combout & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ) #
+// (\soc_inst|interconnect_1|Equal1~0_combout ) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][5]~q & ( \soc_inst|interconnect_1|HRDATA[7]~10_combout & ( (!\soc_inst|interconnect_1|Equal1~0_combout &
+// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ) ) ) ) # ( \soc_inst|switches_1|switch_store[0][5]~q & ( !\soc_inst|interconnect_1|HRDATA[7]~10_combout & ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout ) ) ) # (
+// !\soc_inst|switches_1|switch_store[0][5]~q & ( !\soc_inst|interconnect_1|HRDATA[7]~10_combout & ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
+ .datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+ .datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ),
+ .datae(!\soc_inst|switches_1|switch_store[0][5]~q ),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[7]~10_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[5]~28_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[5]~28 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[5]~28 .lut_mask = 64'hF0F0F0F000CC33FF;
+defparam \soc_inst|interconnect_1|HRDATA[5]~28 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y9_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yanvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yanvx4~0_combout = ( \soc_inst|m0_1|u_logic|F0y2z4~q & ( \soc_inst|m0_1|u_logic|Lwqvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[5]~28_combout ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|F0y2z4~q & ( !\soc_inst|m0_1|u_logic|Lwqvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[5]~28_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|F0y2z4~q & (
+// !\soc_inst|m0_1|u_logic|Lwqvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[5]~28_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+ .datac(!\soc_inst|interconnect_1|HRDATA[5]~28_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|F0y2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yanvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yanvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yanvx4~0 .lut_mask = 64'hFCFCFCFC0000FCFC;
+defparam \soc_inst|m0_1|u_logic|Yanvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y9_N7
+dffeas \soc_inst|m0_1|u_logic|F0y2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Yanvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|F0y2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F0y2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F0y2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y14_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wamvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wamvx4~0_combout = ( \soc_inst|m0_1|u_logic|Tdp2z4~q & ( \soc_inst|m0_1|u_logic|Vcuvx4~1_combout & ( ((\soc_inst|m0_1|u_logic|H1rvx4~0_combout & !\soc_inst|m0_1|u_logic|F0y2z4~q )) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) )
+// ) ) # ( !\soc_inst|m0_1|u_logic|Tdp2z4~q & ( \soc_inst|m0_1|u_logic|Vcuvx4~1_combout & ( (\soc_inst|m0_1|u_logic|H1rvx4~0_combout & !\soc_inst|m0_1|u_logic|F0y2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Tdp2z4~q & (
+// !\soc_inst|m0_1|u_logic|Vcuvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # (((\soc_inst|m0_1|u_logic|H1rvx4~0_combout & !\soc_inst|m0_1|u_logic|F0y2z4~q )) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Tdp2z4~q & ( !\soc_inst|m0_1|u_logic|Vcuvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|H1rvx4~0_combout & (((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout & !\soc_inst|m0_1|u_logic|Nxqvx4~0_combout )))) #
+// (\soc_inst|m0_1|u_logic|H1rvx4~0_combout & ((!\soc_inst|m0_1|u_logic|F0y2z4~q ) # ((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout & !\soc_inst|m0_1|u_logic|Nxqvx4~0_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|F0y2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Vcuvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wamvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wamvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wamvx4~0 .lut_mask = 64'hF444F4FF444444FF;
+defparam \soc_inst|m0_1|u_logic|Wamvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y14_N38
+dffeas \soc_inst|m0_1|u_logic|Tdp2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Wamvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tdp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tdp2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y14_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ye4wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ye4wx4~combout = ( !\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~q & (!\soc_inst|m0_1|u_logic|Uaj2z4~q & (!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q
+// ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ye4wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ye4wx4 .lut_mask = 64'h8000800000000000;
+defparam \soc_inst|m0_1|u_logic|Ye4wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X33_Y6_N17
+dffeas \soc_inst|m0_1|u_logic|S4w2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|J5vvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|S4w2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S4w2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|S4w2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y6_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zdc2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zdc2z4~0_combout = ( \soc_inst|m0_1|u_logic|X77wx4~combout & ( (\soc_inst|m0_1|u_logic|S4w2z4~q & (((\soc_inst|m0_1|u_logic|O9qvx4~0_combout & !\soc_inst|m0_1|u_logic|Ps3wx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Wpsvx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|X77wx4~combout & ( (\soc_inst|m0_1|u_logic|S4w2z4~q & \soc_inst|m0_1|u_logic|Wpsvx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wpsvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zdc2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zdc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zdc2z4~0 .lut_mask = 64'h0033003310331033;
+defparam \soc_inst|m0_1|u_logic|Zdc2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y6_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Skc2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Skc2z4~0_combout = ( \soc_inst|m0_1|u_logic|Fij2z4~q & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q & \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Skc2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Skc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Skc2z4~0 .lut_mask = 64'h0000000000F000F0;
+defparam \soc_inst|m0_1|u_logic|Skc2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y6_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ekc2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ekc2z4~0_combout = ( \soc_inst|m0_1|u_logic|O5t2z4~q & ( \soc_inst|m0_1|u_logic|H9i2z4~q & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|U2x2z4~q ))) ) )
+// ) # ( \soc_inst|m0_1|u_logic|O5t2z4~q & ( !\soc_inst|m0_1|u_logic|H9i2z4~q & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|U2x2z4~q & ((\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|U2x2z4~q &
+// (\soc_inst|m0_1|u_logic|Qdj2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ekc2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ekc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ekc2z4~0 .lut_mask = 64'h0000048C0000CC44;
+defparam \soc_inst|m0_1|u_logic|Ekc2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y6_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhc2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mhc2z4~0_combout = ( \soc_inst|m0_1|u_logic|Fij2z4~q & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Npk2z4~q & (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|O5t2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mhc2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~0 .lut_mask = 64'h0000000000020002;
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y6_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhc2z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mhc2z4~1_combout = ( \soc_inst|m0_1|u_logic|Ekc2z4~0_combout & ( \soc_inst|m0_1|u_logic|Mhc2z4~0_combout & ( \soc_inst|m0_1|u_logic|S4w2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Ekc2z4~0_combout & (
+// \soc_inst|m0_1|u_logic|Mhc2z4~0_combout & ( \soc_inst|m0_1|u_logic|S4w2z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|Ekc2z4~0_combout & ( !\soc_inst|m0_1|u_logic|Mhc2z4~0_combout & ( (\soc_inst|m0_1|u_logic|S4w2z4~q & !\soc_inst|m0_1|u_logic|Ark2z4~q ) ) ) )
+// # ( !\soc_inst|m0_1|u_logic|Ekc2z4~0_combout & ( !\soc_inst|m0_1|u_logic|Mhc2z4~0_combout & ( (\soc_inst|m0_1|u_logic|S4w2z4~q & (!\soc_inst|m0_1|u_logic|W7hwx4~0_combout & (!\soc_inst|m0_1|u_logic|Ark2z4~q & \soc_inst|m0_1|u_logic|Skc2z4~0_combout
+// ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|W7hwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Skc2z4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ekc2z4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Mhc2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mhc2z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~1 .lut_mask = 64'h0040505055555555;
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y8_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dcrwx4~1_combout = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Npk2z4~q & (\soc_inst|m0_1|u_logic|Fij2z4~q & (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q
+// & \soc_inst|m0_1|u_logic|Aok2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dcrwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~1 .lut_mask = 64'h0000000100000000;
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y8_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dcrwx4~0_combout = ( \soc_inst|m0_1|u_logic|O5t2z4~q & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q & (\soc_inst|m0_1|u_logic|Fij2z4~q & (!\soc_inst|m0_1|u_logic|Tki2z4~q & !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dcrwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~0 .lut_mask = 64'h0000000020002000;
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y8_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dcrwx4~2_combout = ( \soc_inst|m0_1|u_logic|Dcrwx4~1_combout & ( \soc_inst|m0_1|u_logic|Dcrwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ffj2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Dcrwx4~1_combout & (
+// \soc_inst|m0_1|u_logic|Dcrwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ffj2z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|Dcrwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Dcrwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ffj2z4~q ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Dcrwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Dcrwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~q & (\soc_inst|m0_1|u_logic|Xx2wx4~combout & \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Dcrwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dcrwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~2 .lut_mask = 64'h0022AAAAAAAAAAAA;
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y6_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dcrwx4~4_combout = ( \soc_inst|m0_1|u_logic|O5t2z4~q & ( \soc_inst|m0_1|u_logic|Fij2z4~q & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Aok2z4~q & ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) #
+// (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|O5t2z4~q & ( !\soc_inst|m0_1|u_logic|Fij2z4~q & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Aok2z4~q &
+// !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dcrwx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~4 .lut_mask = 64'h0000880000008880;
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y7_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dcrwx4~3_combout = ( \soc_inst|m0_1|u_logic|O5t2z4~q & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q & \soc_inst|m0_1|u_logic|Sgj2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dcrwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~3 .lut_mask = 64'h0000000000F000F0;
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y7_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mac2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mac2z4~0_combout = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q & (\soc_inst|m0_1|u_logic|Npk2z4~q & (!\soc_inst|m0_1|u_logic|Ark2z4~q &
+// \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mac2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mac2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mac2z4~0 .lut_mask = 64'h0000002000000000;
+defparam \soc_inst|m0_1|u_logic|Mac2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y4_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kgc2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kgc2z4~0_combout = ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Npk2z4~q & ( (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Aok2z4~q ) #
+// (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Npk2z4~q & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Aok2z4~q ) #
+// (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kgc2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kgc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kgc2z4~0 .lut_mask = 64'hF030000055110000;
+defparam \soc_inst|m0_1|u_logic|Kgc2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y6_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dcrwx4~5_combout = ( \soc_inst|m0_1|u_logic|Fuhwx4~0_combout & ( \soc_inst|m0_1|u_logic|Kgc2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Mac2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) #
+// ((!\soc_inst|m0_1|u_logic|Dcrwx4~4_combout & !\soc_inst|m0_1|u_logic|Dcrwx4~3_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuhwx4~0_combout & ( \soc_inst|m0_1|u_logic|Kgc2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Mac2z4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # ((!\soc_inst|m0_1|u_logic|Dcrwx4~4_combout & !\soc_inst|m0_1|u_logic|Dcrwx4~3_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuhwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Kgc2z4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Mac2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # ((!\soc_inst|m0_1|u_logic|Dcrwx4~4_combout & !\soc_inst|m0_1|u_logic|Dcrwx4~3_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Dcrwx4~4_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Dcrwx4~3_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Mac2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Kgc2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dcrwx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~5 .lut_mask = 64'hF0800000F080F080;
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y6_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dcrwx4~6_combout = ( !\soc_inst|m0_1|u_logic|Dcrwx4~2_combout & ( \soc_inst|m0_1|u_logic|Dcrwx4~5_combout & ( (!\soc_inst|m0_1|u_logic|Zdc2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Nsk2z4~q ) #
+// ((\soc_inst|m0_1|u_logic|Mhc2z4~4_combout & !\soc_inst|m0_1|u_logic|Mhc2z4~1_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mhc2z4~4_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Zdc2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Mhc2z4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Dcrwx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~6 .lut_mask = 64'h00000000D0C00000;
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y6_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qaiwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qaiwx4~0_combout = ( \soc_inst|m0_1|u_logic|Dcrwx4~6_combout ) # ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout & ( !\soc_inst|interconnect_1|HREADY~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qaiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qaiwx4~0 .lut_mask = 64'hF0F0F0F0FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Qaiwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y10_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H4nwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H4nwx4~combout = ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H4nwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H4nwx4 .lut_mask = 64'hF0F0F0F000000000;
+defparam \soc_inst|m0_1|u_logic|H4nwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y12_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~5_sumout = SUM(( !\soc_inst|m0_1|u_logic|J0l2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~2 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|J0l2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add2~2 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add2~5_sumout ),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~5 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wthvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wthvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Add2~5_sumout )))) #
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout & (((\soc_inst|m0_1|u_logic|J0l2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|J0l2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Add2~5_sumout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wthvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wthvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wthvx4~0 .lut_mask = 64'hCF8BCF8B00000000;
+defparam \soc_inst|m0_1|u_logic|Wthvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y14_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wthvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wthvx4~1_combout = ( \soc_inst|m0_1|u_logic|Add5~77_sumout & ( \soc_inst|m0_1|u_logic|R5zvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout & \soc_inst|m0_1|u_logic|Wthvx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Add5~77_sumout & ( \soc_inst|m0_1|u_logic|R5zvx4~2_combout & ( \soc_inst|m0_1|u_logic|Wthvx4~0_combout ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~77_sumout & ( !\soc_inst|m0_1|u_logic|R5zvx4~2_combout & (
+// (!\soc_inst|m0_1|u_logic|Xdfwx4~combout & (!\soc_inst|m0_1|u_logic|H4nwx4~combout & \soc_inst|m0_1|u_logic|Wthvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~77_sumout & ( !\soc_inst|m0_1|u_logic|R5zvx4~2_combout & (
+// (!\soc_inst|m0_1|u_logic|H4nwx4~combout & \soc_inst|m0_1|u_logic|Wthvx4~0_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wthvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Add5~77_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|R5zvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wthvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wthvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wthvx4~1 .lut_mask = 64'h00F000C000FF00CC;
+defparam \soc_inst|m0_1|u_logic|Wthvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X42_Y14_N52
+dffeas \soc_inst|m0_1|u_logic|J0l2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Wthvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|J0l2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J0l2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J0l2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y5_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~5_sumout = SUM(( !\soc_inst|m0_1|u_logic|Omk2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~10 ))
+// \soc_inst|m0_1|u_logic|Add3~6 = CARRY(( !\soc_inst|m0_1|u_logic|Omk2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~10 ))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Omk2z4~q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add3~10 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add3~5_sumout ),
+ .cout(\soc_inst|m0_1|u_logic|Add3~6 ),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add3~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~5 .lut_mask = 64'h0000FFFF0000AAAA;
+defparam \soc_inst|m0_1|u_logic|Add3~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y5_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~1_sumout = SUM(( !\soc_inst|m0_1|u_logic|J0l2z4~q ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~6 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|J0l2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|m0_1|u_logic|Add3~6 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|m0_1|u_logic|Add3~1_sumout ),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add3~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~1 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X21_Y5_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rbi3z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rbi3z4~1_combout = ( !\soc_inst|m0_1|u_logic|Va62z4~combout & ( (!\soc_inst|m0_1|u_logic|Rbi3z4~0_combout & (\soc_inst|m0_1|u_logic|Rbi3z4~q )) # (\soc_inst|m0_1|u_logic|Rbi3z4~0_combout &
+// (((!\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout & ((\soc_inst|m0_1|u_logic|H362z4~0_combout ))) # (\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout & (!\soc_inst|m0_1|u_logic|haddr_o~1_combout ))))) ) ) # ( \soc_inst|m0_1|u_logic|Va62z4~combout & (
+// (!\soc_inst|m0_1|u_logic|Rbi3z4~0_combout & (\soc_inst|m0_1|u_logic|Rbi3z4~q )) # (\soc_inst|m0_1|u_logic|Rbi3z4~0_combout & (((\soc_inst|m0_1|u_logic|H362z4~0_combout & ((!\soc_inst|m0_1|u_logic|Add3~1_sumout ) #
+// (!\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout )))))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rbi3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Rbi3z4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Add3~1_sumout ),
+ .datad(!\soc_inst|m0_1|u_logic|H362z4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Va62z4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout ),
+ .datag(!\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rbi3z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rbi3z4~1 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Rbi3z4~1 .lut_mask = 64'h4477447774744474;
+defparam \soc_inst|m0_1|u_logic|Rbi3z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X21_Y5_N56
+dffeas \soc_inst|m0_1|u_logic|Rbi3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Rbi3z4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Rbi3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rbi3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rbi3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X21_Y5_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ueovx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ueovx4~0_combout = ( !\soc_inst|m0_1|u_logic|Z7i2z4~q & ( \soc_inst|m0_1|u_logic|Rbi3z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Rbi3z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Z7i2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ueovx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ueovx4~0 .lut_mask = 64'h0F0F0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|Ueovx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y9_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qbpvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qbpvx4~0_combout = ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q & (\soc_inst|m0_1|u_logic|Ueovx4~0_combout & !\soc_inst|m0_1|u_logic|Fcj2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qbpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qbpvx4~0 .lut_mask = 64'h000000000A000A00;
+defparam \soc_inst|m0_1|u_logic|Qbpvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y9_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tohvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tohvx4~0_combout = ( \soc_inst|interconnect_1|HRDATA[23]~8_combout & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) ) # ( !\soc_inst|interconnect_1|HRDATA[23]~8_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[23]~8_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tohvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tohvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tohvx4~0 .lut_mask = 64'hFFFFFFFFFF00FF00;
+defparam \soc_inst|m0_1|u_logic|Tohvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y9_N56
+dffeas \soc_inst|m0_1|u_logic|Sow2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Tohvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Sow2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sow2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sow2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y9_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6nvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C6nvx4~1_combout = ( \soc_inst|m0_1|u_logic|Wfovx4~combout & ( (!\soc_inst|m0_1|u_logic|W4y2z4~q ) # ((!\soc_inst|m0_1|u_logic|Sow2z4~q & \soc_inst|m0_1|u_logic|Pfovx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Wfovx4~combout
+// & ( (!\soc_inst|m0_1|u_logic|Sow2z4~q & \soc_inst|m0_1|u_logic|Pfovx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sow2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|W4y2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C6nvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C6nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C6nvx4~1 .lut_mask = 64'h22222222FF22FF22;
+defparam \soc_inst|m0_1|u_logic|C6nvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y8_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6nvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C6nvx4~0_combout = ( \soc_inst|m0_1|u_logic|Vapvx4~combout & ( ((!\soc_inst|m0_1|u_logic|Scpvx4~2_combout & !\soc_inst|m0_1|u_logic|Nqy2z4~q )) # (\soc_inst|interconnect_1|HRDATA[7]~11_combout ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Vapvx4~combout & ( (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout & !\soc_inst|m0_1|u_logic|Nqy2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+ .datad(!\soc_inst|interconnect_1|HRDATA[7]~11_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C6nvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C6nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C6nvx4~0 .lut_mask = 64'hA0A0A0A0A0FFA0FF;
+defparam \soc_inst|m0_1|u_logic|C6nvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y6_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6nvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C6nvx4~2_combout = ( !\soc_inst|m0_1|u_logic|C6nvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|C6nvx4~1_combout & ((!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[23]~8_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|interconnect_1|HRDATA[23]~8_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|C6nvx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|C6nvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C6nvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C6nvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C6nvx4~2 .lut_mask = 64'hFA00FA0000000000;
+defparam \soc_inst|m0_1|u_logic|C6nvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X30_Y6_N4
+dffeas \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|C6nvx4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y4_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5wvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z5wvx4~0_combout = ( \soc_inst|m0_1|u_logic|U6wvx4~7_combout & ( ((!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Wpkwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Hklwx4~1_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Wpkwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hklwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z5wvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z5wvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z5wvx4~0 .lut_mask = 64'h000000000AFF0AFF;
+defparam \soc_inst|m0_1|u_logic|Z5wvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y4_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I3mvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|I3mvx4~0_combout = ( \soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|O5t2z4~q ) # ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|Ilpvx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q ) # ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Ilpvx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|I3mvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I3mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I3mvx4~0 .lut_mask = 64'hAEAEAEAEAE00AE00;
+defparam \soc_inst|m0_1|u_logic|I3mvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y6_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndwvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ndwvx4~0_combout = ( \soc_inst|m0_1|u_logic|P7wvx4~0_combout & ( \soc_inst|m0_1|u_logic|K8wvx4~2_combout & ( (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Dvy2z4~q ) #
+// (\soc_inst|m0_1|u_logic|R8wvx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P7wvx4~0_combout & ( \soc_inst|m0_1|u_logic|K8wvx4~2_combout & ( (\soc_inst|m0_1|u_logic|Dvy2z4~q ) # (\soc_inst|m0_1|u_logic|R8wvx4~1_combout ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|P7wvx4~0_combout & ( !\soc_inst|m0_1|u_logic|K8wvx4~2_combout & ( (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Dvy2z4~q ) #
+// (\soc_inst|m0_1|u_logic|R8wvx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P7wvx4~0_combout & ( !\soc_inst|m0_1|u_logic|K8wvx4~2_combout & ( (\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Dvy2z4~q ) #
+// (\soc_inst|m0_1|u_logic|R8wvx4~1_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|R8wvx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|K8wvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ndwvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ndwvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ndwvx4~0 .lut_mask = 64'h030F010533FF1155;
+defparam \soc_inst|m0_1|u_logic|Ndwvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y5_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I3mvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|I3mvx4~1_combout = ( \soc_inst|m0_1|u_logic|Ndwvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout & (((\soc_inst|m0_1|u_logic|U6wvx4~7_combout & !\soc_inst|m0_1|u_logic|I3mvx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|K1z2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Ndwvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout & (!\soc_inst|m0_1|u_logic|U6wvx4~7_combout & \soc_inst|m0_1|u_logic|K1z2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|I3mvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|K1z2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ndwvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|I3mvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I3mvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I3mvx4~1 .lut_mask = 64'h0088008820AA20AA;
+defparam \soc_inst|m0_1|u_logic|I3mvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y5_N46
+dffeas \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|I3mvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y3_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ggswx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ggswx4~1_combout = ( \soc_inst|m0_1|u_logic|Pcyvx4~combout & ( (!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Icyvx4~0_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Pcyvx4~combout & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Icyvx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ggswx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ggswx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ggswx4~1 .lut_mask = 64'h00AA00AAF0FAF0FA;
+defparam \soc_inst|m0_1|u_logic|Ggswx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y3_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ggswx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ggswx4~0_combout = ( \soc_inst|m0_1|u_logic|Dvy2z4~q & ( \soc_inst|m0_1|u_logic|Csewx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Ahwvx4~0_combout &
+// !\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~q & ( \soc_inst|m0_1|u_logic|Csewx4~0_combout & ( !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ) ) ) # ( \soc_inst|m0_1|u_logic|Dvy2z4~q & (
+// !\soc_inst|m0_1|u_logic|Csewx4~0_combout & ( (\soc_inst|m0_1|u_logic|Ahwvx4~0_combout & !\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~q & ( !\soc_inst|m0_1|u_logic|Csewx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|Ahwvx4~0_combout & !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ggswx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ggswx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ggswx4~0 .lut_mask = 64'h44445500CCCCDDCC;
+defparam \soc_inst|m0_1|u_logic|Ggswx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X46_Y9_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ggswx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ggswx4~2_combout = ( \soc_inst|m0_1|u_logic|C9yvx4~combout & ( (\soc_inst|m0_1|u_logic|G2lwx4~combout & (!\soc_inst|m0_1|u_logic|Ggswx4~1_combout & (!\soc_inst|m0_1|u_logic|E4xvx4~0_combout &
+// !\soc_inst|m0_1|u_logic|Ggswx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|C9yvx4~combout & ( (\soc_inst|m0_1|u_logic|G2lwx4~combout & (!\soc_inst|m0_1|u_logic|Ggswx4~1_combout & !\soc_inst|m0_1|u_logic|Ggswx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|G2lwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ggswx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|E4xvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ggswx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ggswx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ggswx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ggswx4~2 .lut_mask = 64'h4400440040004000;
+defparam \soc_inst|m0_1|u_logic|Ggswx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X46_Y9_N28
+dffeas \soc_inst|m0_1|u_logic|Yaz2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Ggswx4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yaz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yaz2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X51_Y9_N28
+dffeas \soc_inst|m0_1|u_logic|Q2q2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Q2q2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q2q2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Q2q2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y8_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S71wx4~4_combout = ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|T1d3z4~q & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q & ((!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Q2q2z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Ycu2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ycu2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Q2q2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S71wx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S71wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~4 .lut_mask = 64'h00000000A8080000;
+defparam \soc_inst|m0_1|u_logic|S71wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X48_Y10_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S71wx4~3_combout = ( \soc_inst|m0_1|u_logic|Yaz2z4~q & ( \soc_inst|m0_1|u_logic|Svk2z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|H3d3z4~q & !\soc_inst|m0_1|u_logic|No93z4~q )) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Yaz2z4~q & ( !\soc_inst|m0_1|u_logic|Svk2z4~q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|H3d3z4~q & !\soc_inst|m0_1|u_logic|Mzp2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|No93z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Mzp2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S71wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S71wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~3 .lut_mask = 64'h0000110000001010;
+defparam \soc_inst|m0_1|u_logic|S71wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X50_Y10_N43
+dffeas \soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y9_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R21xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R21xx4~0_combout = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q & ( (!\soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|M1j2z4~q & (!\soc_inst|m0_1|u_logic|T1d3z4~q &
+// \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R21xx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R21xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R21xx4~0 .lut_mask = 64'h0080000000000000;
+defparam \soc_inst|m0_1|u_logic|R21xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X47_Y9_N32
+dffeas \soc_inst|m0_1|u_logic|Hmv2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Hmv2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hmv2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hmv2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X47_Y9_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S71wx4~1_combout = ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|Hmv2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|T1d3z4~q & (!\soc_inst|m0_1|u_logic|B1q2z4~q &
+// \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|B1q2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Hmv2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S71wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S71wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~1 .lut_mask = 64'h0044000000500000;
+defparam \soc_inst|m0_1|u_logic|S71wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X51_Y10_N16
+dffeas \soc_inst|m0_1|u_logic|D603z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|D603z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D603z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|D603z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y9_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S71wx4~2_combout = ( !\soc_inst|m0_1|u_logic|X213z4~q & ( \soc_inst|m0_1|u_logic|D603z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|H3d3z4~q &
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|X213z4~q & ( !\soc_inst|m0_1|u_logic|D603z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|H3d3z4~q &
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|X213z4~q & ( !\soc_inst|m0_1|u_logic|D603z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) )
+// )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|X213z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|D603z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S71wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S71wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~2 .lut_mask = 64'h2200020020000000;
+defparam \soc_inst|m0_1|u_logic|S71wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X50_Y9_N17
+dffeas \soc_inst|m0_1|u_logic|Hi83z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Hi83z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hi83z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hi83z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X50_Y9_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S71wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Xg33z4~q & ( \soc_inst|m0_1|u_logic|Hi83z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|T1d3z4~q &
+// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Xg33z4~q & ( !\soc_inst|m0_1|u_logic|Hi83z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|T1d3z4~q &
+// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xg33z4~q & ( !\soc_inst|m0_1|u_logic|Hi83z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) )
+// )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Xg33z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Hi83z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S71wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S71wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~0 .lut_mask = 64'h1100010010000000;
+defparam \soc_inst|m0_1|u_logic|S71wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y8_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S71wx4~5_combout = ( !\soc_inst|m0_1|u_logic|S71wx4~2_combout & ( !\soc_inst|m0_1|u_logic|S71wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|S71wx4~4_combout & (!\soc_inst|m0_1|u_logic|S71wx4~3_combout &
+// (!\soc_inst|m0_1|u_logic|R21xx4~0_combout & !\soc_inst|m0_1|u_logic|S71wx4~1_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|S71wx4~4_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|S71wx4~3_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|R21xx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|S71wx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|S71wx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|S71wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S71wx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S71wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|S71wx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y8_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S71wx4~combout = ( \soc_inst|m0_1|u_logic|S71wx4~8_combout & ( \soc_inst|m0_1|u_logic|S71wx4~5_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|S71wx4~5_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|S71wx4~8_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S71wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S71wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|S71wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y12_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bq5wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bq5wx4~0_combout = ( \soc_inst|m0_1|u_logic|Uvzvx4~combout & ( (\soc_inst|m0_1|u_logic|S71wx4~combout ) # (\soc_inst|m0_1|u_logic|Wq5wx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Uvzvx4~combout & (
+// (!\soc_inst|m0_1|u_logic|Wq5wx4~combout & \soc_inst|m0_1|u_logic|S71wx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|S71wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bq5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bq5wx4~0 .lut_mask = 64'h00F000F00FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Bq5wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y14_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Axm2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Axm2z4~0_combout = ( !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Axm2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Axm2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Axm2z4~0 .lut_mask = 64'hFFFFFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Axm2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y14_N35
+dffeas \soc_inst|m0_1|u_logic|Axm2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Axm2z4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Axm2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Axm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Axm2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y14_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Luywx4~0_combout = ( \soc_inst|m0_1|u_logic|K9ovx4~0_combout & ( \soc_inst|m0_1|u_logic|Iuuvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Axm2z4~q & (!\soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Lns2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K9ovx4~0_combout & ( \soc_inst|m0_1|u_logic|Iuuvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Axm2z4~q &
+// ((!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Lns2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|K9ovx4~0_combout & ( !\soc_inst|m0_1|u_logic|Iuuvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Lns2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K9ovx4~0_combout & ( !\soc_inst|m0_1|u_logic|Iuuvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Lns2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Axm2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Lns2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Luywx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Luywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~0 .lut_mask = 64'hFFCCF0C0AA88A080;
+defparam \soc_inst|m0_1|u_logic|Luywx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y14_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Luywx4~4_combout = ( \soc_inst|m0_1|u_logic|Oxuvx4~0_combout & ( \soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout & (!\soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|G8n2z4~q ) # (!\soc_inst|m0_1|u_logic|Jruvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Oxuvx4~0_combout & ( \soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|G8n2z4~q ) # (!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Oxuvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|G8n2z4~q ) # (!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Oxuvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|G8n2z4~q ) #
+// (!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|G8n2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Luywx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Luywx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~4 .lut_mask = 64'hFAFAFA00C8C8C800;
+defparam \soc_inst|m0_1|u_logic|Luywx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y14_N50
+dffeas \soc_inst|m0_1|u_logic|Lhd3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Lhd3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lhd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lhd3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y14_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Luywx4~1_combout = ( \soc_inst|m0_1|u_logic|Ruvvx4~0_combout & ( \soc_inst|m0_1|u_logic|Douvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Q6l2z4~q & (!\soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Lhd3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ruvvx4~0_combout & ( \soc_inst|m0_1|u_logic|Douvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Q6l2z4~q &
+// ((!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Lhd3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ruvvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Douvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Lhd3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ruvvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Douvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Lhd3z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Q6l2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Lhd3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ruvvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Douvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Luywx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Luywx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~1 .lut_mask = 64'hFFAAF0A0CC88C080;
+defparam \soc_inst|m0_1|u_logic|Luywx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y10_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Luywx4~3_combout = ( \soc_inst|m0_1|u_logic|Mxa2z4~0_combout & ( \soc_inst|m0_1|u_logic|K9vvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Kss2z4~q & (!\soc_inst|m0_1|u_logic|Jxs2z4~q & ((!\soc_inst|m0_1|u_logic|Mis2z4~q ) #
+// (!\soc_inst|m0_1|u_logic|Yauvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mxa2z4~0_combout & ( \soc_inst|m0_1|u_logic|K9vvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Jxs2z4~q & ((!\soc_inst|m0_1|u_logic|Mis2z4~q ) #
+// (!\soc_inst|m0_1|u_logic|Yauvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mxa2z4~0_combout & ( !\soc_inst|m0_1|u_logic|K9vvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Kss2z4~q & ((!\soc_inst|m0_1|u_logic|Mis2z4~q ) #
+// (!\soc_inst|m0_1|u_logic|Yauvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mxa2z4~0_combout & ( !\soc_inst|m0_1|u_logic|K9vvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Mis2z4~q ) # (!\soc_inst|m0_1|u_logic|Yauvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Kss2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Jxs2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Mis2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yauvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Mxa2z4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Luywx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Luywx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~3 .lut_mask = 64'hFFF0AAA0CCC08880;
+defparam \soc_inst|m0_1|u_logic|Luywx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y10_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Luywx4~5_combout = ( \soc_inst|m0_1|u_logic|Aqp2z4~q & ( \soc_inst|m0_1|u_logic|Sta2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q & (((\soc_inst|m0_1|u_logic|Uaj2z4~q )) #
+// (\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q & (((\soc_inst|m0_1|u_logic|X9n2z4~q & \soc_inst|m0_1|u_logic|Uaj2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aqp2z4~q & (
+// \soc_inst|m0_1|u_logic|Sta2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Uaj2z4~q )))) # (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q &
+// (((\soc_inst|m0_1|u_logic|X9n2z4~q & \soc_inst|m0_1|u_logic|Uaj2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|X9n2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Aqp2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Luywx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Luywx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~5 .lut_mask = 64'h00000000440344CF;
+defparam \soc_inst|m0_1|u_logic|Luywx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y13_N16
+dffeas \soc_inst|m0_1|u_logic|Fed3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Fed3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fed3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fed3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y14_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Luywx4~2_combout = ( \soc_inst|m0_1|u_logic|Wva2z4~0_combout & ( \soc_inst|m0_1|u_logic|Ckuvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Bus2z4~q & (!\soc_inst|m0_1|u_logic|Fed3z4~q & ((!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Gcb3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wva2z4~0_combout & ( \soc_inst|m0_1|u_logic|Ckuvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Fed3z4~q & ((!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Gcb3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wva2z4~0_combout & ( !\soc_inst|m0_1|u_logic|Ckuvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Bus2z4~q & ((!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Gcb3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wva2z4~0_combout & ( !\soc_inst|m0_1|u_logic|Ckuvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Gcb3z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bus2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Gcb3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fed3z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wva2z4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Luywx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Luywx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~2 .lut_mask = 64'hFCFCA8A8FC00A800;
+defparam \soc_inst|m0_1|u_logic|Luywx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y10_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Luywx4~6_combout = ( !\soc_inst|m0_1|u_logic|Luywx4~5_combout & ( \soc_inst|m0_1|u_logic|Luywx4~2_combout & ( (\soc_inst|m0_1|u_logic|Luywx4~0_combout & (\soc_inst|m0_1|u_logic|Luywx4~4_combout &
+// (\soc_inst|m0_1|u_logic|Luywx4~1_combout & \soc_inst|m0_1|u_logic|Luywx4~3_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Luywx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Luywx4~4_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Luywx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Luywx4~3_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Luywx4~5_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Luywx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Luywx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Luywx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~6 .lut_mask = 64'h0000000000010000;
+defparam \soc_inst|m0_1|u_logic|Luywx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y10_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6mwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C6mwx4~0_combout = ( \soc_inst|m0_1|u_logic|Vsywx4~7_combout & ( (\soc_inst|m0_1|u_logic|Hzywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tyywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Vsywx4~7_combout & (
+// \soc_inst|m0_1|u_logic|Tyywx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Tyywx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hzywx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Vsywx4~7_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C6mwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C6mwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C6mwx4~0 .lut_mask = 64'h0F0F0F0F0FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|C6mwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y10_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6mwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C6mwx4~3_combout = ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Luywx4~6_combout & (((\soc_inst|m0_1|u_logic|Ozywx4~0_combout & \soc_inst|m0_1|u_logic|Vsywx4~7_combout )))) #
+// (\soc_inst|m0_1|u_logic|Luywx4~6_combout & (((\soc_inst|m0_1|u_logic|Ozywx4~0_combout & \soc_inst|m0_1|u_logic|Vsywx4~7_combout )) # (\soc_inst|m0_1|u_logic|N8b2z4~combout )))) # (\soc_inst|m0_1|u_logic|Gvywx4~0_combout ) ) ) # (
+// \soc_inst|m0_1|u_logic|E5owx4~0_combout & ( ((\soc_inst|m0_1|u_logic|Luywx4~6_combout & (\soc_inst|m0_1|u_logic|N8b2z4~combout ))) # (\soc_inst|m0_1|u_logic|C6mwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Luywx4~6_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|N8b2z4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|C6mwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Vsywx4~7_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Gvywx4~0_combout ),
+ .datag(!\soc_inst|m0_1|u_logic|Ozywx4~0_combout ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C6mwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C6mwx4~3 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|C6mwx4~3 .lut_mask = 64'h111F1F1FFFFF1F1F;
+defparam \soc_inst|m0_1|u_logic|C6mwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y10_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Abovx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Abovx4~0_combout = ( \soc_inst|m0_1|u_logic|Ujqvx4~0_combout & ( \soc_inst|m0_1|u_logic|C6mwx4~2_combout & ( \soc_inst|m0_1|u_logic|Rqywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ujqvx4~0_combout & (
+// \soc_inst|m0_1|u_logic|C6mwx4~2_combout & ( (\soc_inst|m0_1|u_logic|Rqywx4~0_combout & (((\soc_inst|m0_1|u_logic|C6mwx4~3_combout & \soc_inst|m0_1|u_logic|C6mwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Gjqvx4~0_combout ))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Ujqvx4~0_combout & ( !\soc_inst|m0_1|u_logic|C6mwx4~2_combout & ( \soc_inst|m0_1|u_logic|Rqywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ujqvx4~0_combout & ( !\soc_inst|m0_1|u_logic|C6mwx4~2_combout & (
+// \soc_inst|m0_1|u_logic|Rqywx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|C6mwx4~3_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Gjqvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|C6mwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Rqywx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ujqvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|C6mwx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Abovx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Abovx4~0 .lut_mask = 64'h00FF00FF003700FF;
+defparam \soc_inst|m0_1|u_logic|Abovx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y9_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zlnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zlnvx4~0_combout = ( \soc_inst|m0_1|u_logic|Nbm2z4~q & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Nbm2z4~q & ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|Nbm2z4~q & ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zlnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zlnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zlnvx4~0 .lut_mask = 64'hFFFFFFFF0000FCFC;
+defparam \soc_inst|m0_1|u_logic|Zlnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y9_N22
+dffeas \soc_inst|m0_1|u_logic|Nbm2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Zlnvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nbm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nbm2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y8_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|By4wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|By4wx4~combout = ( \soc_inst|m0_1|u_logic|Oylwx4~1_combout & ( \soc_inst|m0_1|u_logic|Nbm2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Oylwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|By4wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|By4wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|By4wx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|By4wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X33_Y8_N44
+dffeas \soc_inst|m0_1|u_logic|Y6t2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|By4wx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|m0_1|u_logic|J5vvx4~combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y6t2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y6t2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y7_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z0mwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z0mwx4~0_combout = ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Bpzvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|A4c2z4~0_combout &
+// \soc_inst|m0_1|u_logic|Ncqvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Bpzvx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|A4c2z4~0_combout &
+// \soc_inst|m0_1|u_logic|Ncqvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|B73wx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Bpzvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|A4c2z4~0_combout & \soc_inst|m0_1|u_logic|Ncqvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Bpzvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|A4c2z4~0_combout & \soc_inst|m0_1|u_logic|Ncqvx4~0_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|A4c2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Bpzvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z0mwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z0mwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z0mwx4~0 .lut_mask = 64'h000A000A333B000A;
+defparam \soc_inst|m0_1|u_logic|Z0mwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y5_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hprot_o~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hprot_o~2_combout = ( !\soc_inst|m0_1|u_logic|Z0mwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|A76wx4~0_combout & (((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # (!\soc_inst|m0_1|u_logic|Jppvx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|A76wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Z0mwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hprot_o~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hprot_o~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hprot_o~2 .lut_mask = 64'hFD00FD0000000000;
+defparam \soc_inst|m0_1|u_logic|hprot_o~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y5_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hprot_o~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hprot_o~3_combout = ( \soc_inst|m0_1|u_logic|hprot_o~2_combout & ( (!\soc_inst|m0_1|u_logic|Sy52z4~0_combout & ((!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Kzxvx4~combout ) #
+// (\soc_inst|m0_1|u_logic|Y6t2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sy52z4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|hprot_o~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hprot_o~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hprot_o~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hprot_o~3 .lut_mask = 64'h00000000A8AAA8AA;
+defparam \soc_inst|m0_1|u_logic|hprot_o~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y5_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hprot_o~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hprot_o~1_combout = ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout & ( (\soc_inst|m0_1|u_logic|hprot_o~0_combout & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # (!\soc_inst|m0_1|u_logic|R8d2z4~0_combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Fjewx4~1_combout & ( (\soc_inst|m0_1|u_logic|hprot_o~0_combout & !\soc_inst|m0_1|u_logic|R8d2z4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|hprot_o~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|R8d2z4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hprot_o~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hprot_o~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hprot_o~1 .lut_mask = 64'h0F000F000F0C0F0C;
+defparam \soc_inst|m0_1|u_logic|hprot_o~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y6_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jbhwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jbhwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Rngwx4~combout & ( (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|C9yvx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jbhwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jbhwx4~0 .lut_mask = 64'h00F000F000000000;
+defparam \soc_inst|m0_1|u_logic|Jbhwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y5_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qx52z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qx52z4~0_combout = ( \soc_inst|m0_1|u_logic|Sgj2z4~q & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Egkwx4~0_combout & !\soc_inst|m0_1|u_logic|Rexvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qx52z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qx52z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qx52z4~0 .lut_mask = 64'h0000550000000000;
+defparam \soc_inst|m0_1|u_logic|Qx52z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y5_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hprot_o~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hprot_o~4_combout = ( \soc_inst|m0_1|u_logic|Na6wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Qx52z4~0_combout & (!\soc_inst|m0_1|u_logic|Yy5wx4~0_combout & \soc_inst|m0_1|u_logic|Y6t2z4~q )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Na6wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Qx52z4~0_combout & !\soc_inst|m0_1|u_logic|Yy5wx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Qx52z4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Yy5wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Na6wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hprot_o~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hprot_o~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hprot_o~4 .lut_mask = 64'hC0C0C0C000C000C0;
+defparam \soc_inst|m0_1|u_logic|hprot_o~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y5_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hprot_o~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hprot_o~5_combout = ( \soc_inst|m0_1|u_logic|hprot_o~4_combout & ( (\soc_inst|m0_1|u_logic|hprot_o~3_combout & (\soc_inst|m0_1|u_logic|hprot_o~1_combout & ((!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|O9qvx4~0_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|hprot_o~3_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|hprot_o~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|hprot_o~4_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hprot_o~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hprot_o~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hprot_o~5 .lut_mask = 64'h0000000011101110;
+defparam \soc_inst|m0_1|u_logic|hprot_o~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y7_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E7mwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|E7mwx4~combout = ( \soc_inst|m0_1|u_logic|Z5pvx4~0_combout & ( \soc_inst|m0_1|u_logic|Scpvx4~0_combout & ( (\soc_inst|m0_1|u_logic|hprot_o~5_combout & (\soc_inst|m0_1|u_logic|It52z4~1_combout &
+// \soc_inst|m0_1|u_logic|Z5pvx4~3_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z5pvx4~0_combout & ( \soc_inst|m0_1|u_logic|Scpvx4~0_combout & ( (\soc_inst|m0_1|u_logic|hprot_o~5_combout & (\soc_inst|m0_1|u_logic|It52z4~1_combout &
+// (!\soc_inst|m0_1|u_logic|S4w2z4~q & \soc_inst|m0_1|u_logic|Z5pvx4~3_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|hprot_o~5_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|It52z4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Z5pvx4~3_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Z5pvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Scpvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|E7mwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E7mwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E7mwx4 .lut_mask = 64'h0000000000100011;
+defparam \soc_inst|m0_1|u_logic|E7mwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y5_N18
+cyclonev_lcell_comb \soc_inst|ram_1|always1~0 (
+// Equation(s):
+// \soc_inst|ram_1|always1~0_combout = ( \soc_inst|interconnect_1|HREADY~0_combout & ( \soc_inst|interconnect_1|LessThan0~0_combout & ( (!\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout & (((\soc_inst|m0_1|u_logic|S6ovx4~1_combout &
+// !\soc_inst|m0_1|u_logic|S6ovx4~2_combout )) # (\soc_inst|m0_1|u_logic|E7mwx4~combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|E7mwx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|S6ovx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|S6ovx4~2_combout ),
+ .datae(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .dataf(!\soc_inst|interconnect_1|LessThan0~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|always1~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|always1~0 .extended_lut = "off";
+defparam \soc_inst|ram_1|always1~0 .lut_mask = 64'h0000000000007050;
+defparam \soc_inst|ram_1|always1~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y5_N15
+cyclonev_lcell_comb \soc_inst|ram_1|write_cycle~0 (
+// Equation(s):
+// \soc_inst|ram_1|write_cycle~0_combout = ( \soc_inst|ram_1|always1~0_combout & ( \soc_inst|m0_1|u_logic|hwrite_o~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|always1~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|write_cycle~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|write_cycle~0 .extended_lut = "off";
+defparam \soc_inst|ram_1|write_cycle~0 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|ram_1|write_cycle~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X19_Y5_N16
+dffeas \soc_inst|ram_1|write_cycle~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|ram_1|write_cycle~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|write_cycle~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|write_cycle~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y7_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rnhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rnhvx4~0_combout = ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout & ( \soc_inst|interconnect_1|HRDATA[29]~0_combout & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ) ) ) # ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout &
+// ( \soc_inst|interconnect_1|HRDATA[29]~0_combout ) ) # ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout & ( !\soc_inst|interconnect_1|HRDATA[29]~0_combout & ( \soc_inst|interconnect_1|HRDATA[25]~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout &
+// ( !\soc_inst|interconnect_1|HRDATA[29]~0_combout ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ),
+ .datae(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rnhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rnhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rnhvx4~0 .lut_mask = 64'hFFFF3333FFFFFF00;
+defparam \soc_inst|m0_1|u_logic|Rnhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y7_N19
+dffeas \soc_inst|m0_1|u_logic|Xuw2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Rnhvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Xuw2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xuw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xuw2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y9_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oesvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oesvx4~0_combout = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 & ( (\soc_inst|m0_1|u_logic|Qbpvx4~0_combout & ((!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # (\soc_inst|interconnect_1|HRDATA[29]~0_combout )))
+// ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 & ( (\soc_inst|m0_1|u_logic|Qbpvx4~0_combout & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout & !\soc_inst|interconnect_1|HRDATA[29]~0_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+ .datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+ .datad(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Oesvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oesvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oesvx4~0 .lut_mask = 64'h3000300030333033;
+defparam \soc_inst|m0_1|u_logic|Oesvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y9_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A5nvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|A5nvx4~0_combout = ( \soc_inst|m0_1|u_logic|Swy2z4~q & ( (!\soc_inst|m0_1|u_logic|Oesvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Vapvx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[11]~24_combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Swy2z4~q & ( (\soc_inst|m0_1|u_logic|Scpvx4~2_combout & (!\soc_inst|m0_1|u_logic|Oesvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Vapvx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[11]~24_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Oesvx4~0_combout ),
+ .datad(!\soc_inst|interconnect_1|HRDATA[11]~24_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|A5nvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|A5nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A5nvx4~0 .lut_mask = 64'h30203020F0A0F0A0;
+defparam \soc_inst|m0_1|u_logic|A5nvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y9_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A5nvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|A5nvx4~1_combout = ( \soc_inst|m0_1|u_logic|A5nvx4~0_combout & ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout & ( (\soc_inst|m0_1|u_logic|Xuw2z4~q & ((!\soc_inst|m0_1|u_logic|Wfovx4~combout ) # (\soc_inst|m0_1|u_logic|Bby2z4~q ))) )
+// ) ) # ( \soc_inst|m0_1|u_logic|A5nvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Pfovx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Wfovx4~combout ) # (\soc_inst|m0_1|u_logic|Bby2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Xuw2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Bby2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|A5nvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|A5nvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|A5nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A5nvx4~1 .lut_mask = 64'h0000F0FF00005055;
+defparam \soc_inst|m0_1|u_logic|A5nvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X30_Y9_N22
+dffeas \soc_inst|m0_1|u_logic|Swy2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|A5nvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Swy2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Swy2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y7_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ahhwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ahhwx4~0_combout = ( \soc_inst|m0_1|u_logic|Jppvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ahhwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ahhwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ahhwx4~0 .lut_mask = 64'h0000000000F000F0;
+defparam \soc_inst|m0_1|u_logic|Ahhwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y3_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I0hwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|I0hwx4~0_combout = ( \soc_inst|m0_1|u_logic|Pcyvx4~combout & ( !\soc_inst|m0_1|u_logic|Rngwx4~combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I0hwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I0hwx4~0 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|I0hwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y7_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bfgwx4~2_combout = ( \soc_inst|m0_1|u_logic|Ahhwx4~0_combout & ( \soc_inst|m0_1|u_logic|I0hwx4~0_combout & ( ((\soc_inst|m0_1|u_logic|Hdh2z4~0_combout & \soc_inst|m0_1|u_logic|Ark2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ahhwx4~0_combout & ( \soc_inst|m0_1|u_logic|I0hwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout & \soc_inst|m0_1|u_logic|Ark2z4~q ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Ahhwx4~0_combout & ( !\soc_inst|m0_1|u_logic|I0hwx4~0_combout & ( \soc_inst|m0_1|u_logic|Wdqvx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ahhwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bfgwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~2 .lut_mask = 64'h000000FF050505FF;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y3_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bfgwx4~3_combout = ( \soc_inst|m0_1|u_logic|Tki2z4~q & ( \soc_inst|m0_1|u_logic|Qsewx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Bfgwx4~2_combout & ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # (!\soc_inst|m0_1|u_logic|P0hwx4~1_combout
+// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tki2z4~q & ( \soc_inst|m0_1|u_logic|Qsewx4~0_combout & ( !\soc_inst|m0_1|u_logic|Bfgwx4~2_combout ) ) ) # ( \soc_inst|m0_1|u_logic|Tki2z4~q & ( !\soc_inst|m0_1|u_logic|Qsewx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Bfgwx4~2_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Tki2z4~q & ( !\soc_inst|m0_1|u_logic|Qsewx4~0_combout & ( !\soc_inst|m0_1|u_logic|Bfgwx4~2_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Bfgwx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bfgwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~3 .lut_mask = 64'hFF00FF00FF00EE00;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y3_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ugewx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ugewx4~0_combout = ( !\soc_inst|m0_1|u_logic|Yzi2z4~q & ( !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Rxl2z4~q & !\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ugewx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ugewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ugewx4~0 .lut_mask = 64'hA0A0000000000000;
+defparam \soc_inst|m0_1|u_logic|Ugewx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y3_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~18 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bfgwx4~18_combout = ( !\soc_inst|m0_1|u_logic|Dvy2z4~q & ( ((!\soc_inst|m0_1|u_logic|Pty2z4~q & ((!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Pty2z4~q
+// & (((!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ))))) # (\soc_inst|m0_1|u_logic|Px5wx4~combout ) ) ) # ( \soc_inst|m0_1|u_logic|Dvy2z4~q & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ) #
+// ((((\soc_inst|m0_1|u_logic|Px5wx4~combout ) # (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Zoy2z4~q )) # (\soc_inst|m0_1|u_logic|Pty2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Px5wx4~combout ),
+ .datag(!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bfgwx4~18_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~18 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~18 .lut_mask = 64'hBBFCBFFFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~18 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y4_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P0hwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P0hwx4~3_combout = ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|H5fwx4~0_combout & (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|C2yvx4~combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|P0hwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P0hwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P0hwx4~3 .lut_mask = 64'h0030003000000000;
+defparam \soc_inst|m0_1|u_logic|P0hwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y4_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~10 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bfgwx4~10_combout = ( \soc_inst|m0_1|u_logic|P0hwx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & (((\soc_inst|m0_1|u_logic|My6wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q &
+// (!\soc_inst|m0_1|u_logic|Dvy2z4~q & (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|My6wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|P0hwx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bfgwx4~10_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~10 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~10 .lut_mask = 64'h0000000040EA40EA;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~10 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y6_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bfgwx4~5_combout = ( \soc_inst|m0_1|u_logic|B1vvx4~0_combout & ( !\soc_inst|m0_1|u_logic|O5t2z4~q & ( (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Emi2z4~q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|B1vvx4~0_combout & ( !\soc_inst|m0_1|u_logic|O5t2z4~q & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|Emi2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bfgwx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~5 .lut_mask = 64'h5F0A550000000000;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y7_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bfgwx4~6_combout = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|O5t2z4~q & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q & ((!\soc_inst|m0_1|u_logic|Ark2z4~q & ((\soc_inst|m0_1|u_logic|Fij2z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Ark2z4~q & (!\soc_inst|m0_1|u_logic|Emi2z4~q )))) # (\soc_inst|m0_1|u_logic|Sgj2z4~q & (((!\soc_inst|m0_1|u_logic|Ark2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|O5t2z4~q & (
+// (!\soc_inst|m0_1|u_logic|Sgj2z4~q & (\soc_inst|m0_1|u_logic|Ark2z4~q & ((!\soc_inst|m0_1|u_logic|Emi2z4~q ) # (\soc_inst|m0_1|u_logic|Fij2z4~q )))) # (\soc_inst|m0_1|u_logic|Sgj2z4~q & ((!\soc_inst|m0_1|u_logic|Fij2z4~q $
+// (\soc_inst|m0_1|u_logic|Ark2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bfgwx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~6 .lut_mask = 64'h508F5F8800000000;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y7_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bfgwx4~7_combout = ( !\soc_inst|m0_1|u_logic|Bfgwx4~6_combout & ( \soc_inst|m0_1|u_logic|B73wx4~combout & ( ((!\soc_inst|m0_1|u_logic|Nsk2z4~q & !\soc_inst|m0_1|u_logic|Pmgwx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bfgwx4~6_combout & ( !\soc_inst|m0_1|u_logic|B73wx4~combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Pmgwx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Bfgwx4~6_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bfgwx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~7 .lut_mask = 64'hFFFF0000D5D50000;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y6_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~8 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bfgwx4~8_combout = ( \soc_inst|m0_1|u_logic|Bfgwx4~7_combout & ( (!\soc_inst|m0_1|u_logic|Bfgwx4~5_combout & (((!\soc_inst|m0_1|u_logic|Emi2z4~q ) # (!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Ax0xx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bfgwx4~5_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ax0xx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~7_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bfgwx4~8_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~8 .lut_mask = 64'h00000000AAA2AAA2;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y6_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~9 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bfgwx4~9_combout = ( \soc_inst|m0_1|u_logic|Bfgwx4~8_combout & ( (!\soc_inst|m0_1|u_logic|Pcyvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # ((!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~8_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bfgwx4~9_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~9 .lut_mask = 64'h00000000FFEFFFEF;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~9 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y6_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~11 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bfgwx4~11_combout = ( \soc_inst|m0_1|u_logic|Bfgwx4~9_combout & ( (!\soc_inst|m0_1|u_logic|Bfgwx4~10_combout & ((!\soc_inst|m0_1|u_logic|Emi2z4~q ) # ((!\soc_inst|m0_1|u_logic|Kzxvx4~combout ) #
+// (!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Bfgwx4~10_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~9_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bfgwx4~11_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~11 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~11 .lut_mask = 64'h00000000F0E0F0E0;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~11 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y5_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Thgwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Thgwx4~0_combout = ( \soc_inst|m0_1|u_logic|C2yvx4~combout & ( (\soc_inst|m0_1|u_logic|Fuhwx4~0_combout & (\soc_inst|m0_1|u_logic|Swy2z4~q & (\soc_inst|m0_1|u_logic|Qem2z4~q & \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Thgwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Thgwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Thgwx4~0 .lut_mask = 64'h0000000000010001;
+defparam \soc_inst|m0_1|u_logic|Thgwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y5_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hahwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hahwx4~0_combout = ( \soc_inst|m0_1|u_logic|C2yvx4~combout & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q & (((\soc_inst|m0_1|u_logic|B73wx4~combout & \soc_inst|m0_1|u_logic|Emi2z4~q )) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))) )
+// ) # ( !\soc_inst|m0_1|u_logic|C2yvx4~combout & ( (\soc_inst|m0_1|u_logic|B73wx4~combout & (\soc_inst|m0_1|u_logic|Emi2z4~q & !\soc_inst|m0_1|u_logic|Ark2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hahwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hahwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hahwx4~0 .lut_mask = 64'h0500050037003700;
+defparam \soc_inst|m0_1|u_logic|Hahwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y5_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhgwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mhgwx4~1_combout = ( \soc_inst|m0_1|u_logic|Mhgwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q & (\soc_inst|m0_1|u_logic|Ukpvx4~combout & !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Mhgwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mhgwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mhgwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mhgwx4~1 .lut_mask = 64'h000000000C000C00;
+defparam \soc_inst|m0_1|u_logic|Mhgwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y5_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bfgwx4~1_combout = ( !\soc_inst|m0_1|u_logic|Mhgwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Thgwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Pcyvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Hahwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|S4w2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Thgwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Hahwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Mhgwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bfgwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~1 .lut_mask = 64'hA8AAA8AA00000000;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y4_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P0hwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P0hwx4~2_combout = ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Zoy2z4~q & (!\soc_inst|m0_1|u_logic|Xly2z4~q & (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q
+// ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|P0hwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P0hwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P0hwx4~2 .lut_mask = 64'h0040004000000000;
+defparam \soc_inst|m0_1|u_logic|P0hwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y5_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bhewx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bhewx4~0_combout = ( \soc_inst|m0_1|u_logic|Vskwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Hyewx4~combout & (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Blwvx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Hyewx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Blwvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Vskwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bhewx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bhewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bhewx4~0 .lut_mask = 64'h0000000000500050;
+defparam \soc_inst|m0_1|u_logic|Bhewx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y4_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bfgwx4~4_combout = ( \soc_inst|m0_1|u_logic|Bhewx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Swy2z4~q & (\soc_inst|m0_1|u_logic|Mk6wx4~0_combout & \soc_inst|m0_1|u_logic|P0hwx4~1_combout ))) #
+// (\soc_inst|m0_1|u_logic|P0hwx4~2_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Bhewx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q & (\soc_inst|m0_1|u_logic|Mk6wx4~0_combout & \soc_inst|m0_1|u_logic|P0hwx4~1_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|P0hwx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Mk6wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Bhewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bfgwx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~4 .lut_mask = 64'h000C000C555D555D;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y4_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~12 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bfgwx4~12_combout = ( \soc_inst|m0_1|u_logic|Bfgwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Bfgwx4~4_combout & ( (\soc_inst|m0_1|u_logic|Bfgwx4~3_combout & (\soc_inst|m0_1|u_logic|Bfgwx4~18_combout &
+// \soc_inst|m0_1|u_logic|Bfgwx4~11_combout )) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Bfgwx4~3_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Bfgwx4~18_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Bfgwx4~11_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Bfgwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~4_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bfgwx4~12_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~12 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~12 .lut_mask = 64'h0000000300000000;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~12 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y6_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kugwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kugwx4~0_combout = ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout & ( \soc_inst|m0_1|u_logic|Qaqvx4~0_combout & ( (\soc_inst|m0_1|u_logic|A76wx4~0_combout & \soc_inst|m0_1|u_logic|O9qvx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Bxcwx4~0_combout & ( \soc_inst|m0_1|u_logic|Qaqvx4~0_combout & ( (\soc_inst|m0_1|u_logic|A76wx4~0_combout & \soc_inst|m0_1|u_logic|O9qvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout & ( (\soc_inst|m0_1|u_logic|O9qvx4~0_combout & ((\soc_inst|m0_1|u_logic|C9yvx4~combout ) # (\soc_inst|m0_1|u_logic|A76wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bxcwx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout & ( (\soc_inst|m0_1|u_logic|A76wx4~0_combout & \soc_inst|m0_1|u_logic|O9qvx4~0_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|A76wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Kugwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kugwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kugwx4~0 .lut_mask = 64'h0033003F00330033;
+defparam \soc_inst|m0_1|u_logic|Kugwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y3_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~13 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bfgwx4~13_combout = ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Srgwx4~0_combout & !\soc_inst|m0_1|u_logic|Rngwx4~combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout & (((\soc_inst|m0_1|u_logic|Srgwx4~0_combout & !\soc_inst|m0_1|u_logic|Rngwx4~combout )))) #
+// (\soc_inst|m0_1|u_logic|Ahwvx4~0_combout & (((\soc_inst|m0_1|u_logic|Srgwx4~0_combout & !\soc_inst|m0_1|u_logic|Rngwx4~combout )) # (\soc_inst|m0_1|u_logic|P0hwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & (
+// !\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Ahwvx4~0_combout & \soc_inst|m0_1|u_logic|P0hwx4~1_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Srgwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bfgwx4~13_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~13 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~13 .lut_mask = 64'h111100001F110F00;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~13 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y3_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ekgwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ekgwx4~0_combout = ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Tki2z4~q & (!\soc_inst|m0_1|u_logic|Swy2z4~q & (\soc_inst|m0_1|u_logic|P0hwx4~1_combout & !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q )))
+// ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ekgwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ekgwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ekgwx4~0 .lut_mask = 64'h0000000004000400;
+defparam \soc_inst|m0_1|u_logic|Ekgwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y3_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Poa2z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Poa2z4~1_combout = ( \soc_inst|m0_1|u_logic|Ffj2z4~q & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q & (\soc_inst|m0_1|u_logic|Pcyvx4~combout & \soc_inst|m0_1|u_logic|Poa2z4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Poa2z4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Poa2z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Poa2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Poa2z4~1 .lut_mask = 64'h00000000000A000A;
+defparam \soc_inst|m0_1|u_logic|Poa2z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y3_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~14 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bfgwx4~14_combout = ( \soc_inst|m0_1|u_logic|Poa2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Ekgwx4~0_combout & (((!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|W7hwx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|U2x2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Poa2z4~1_combout & ( !\soc_inst|m0_1|u_logic|Ekgwx4~0_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|W7hwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ekgwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Poa2z4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bfgwx4~14_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~14 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~14 .lut_mask = 64'hFF00FF00FD00FD00;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~14 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y3_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~15 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bfgwx4~15_combout = ( \soc_inst|m0_1|u_logic|Bfgwx4~14_combout & ( (!\soc_inst|m0_1|u_logic|Bfgwx4~13_combout & ((!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Emi2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bfgwx4~13_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~14_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bfgwx4~15_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~15 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~15 .lut_mask = 64'h00000000AAA8AAA8;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~15 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y5_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Togwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Togwx4~1_combout = ( \soc_inst|m0_1|u_logic|Npk2z4~q & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q & \soc_inst|m0_1|u_logic|Emi2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q ) #
+// ((!\soc_inst|m0_1|u_logic|Fij2z4~q & \soc_inst|m0_1|u_logic|Emi2z4~q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Togwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Togwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Togwx4~1 .lut_mask = 64'hCCFCCCFC00F000F0;
+defparam \soc_inst|m0_1|u_logic|Togwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y5_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Togwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Togwx4~2_combout = ( \soc_inst|m0_1|u_logic|Ffj2z4~q & ( (\soc_inst|m0_1|u_logic|Togwx4~1_combout & \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~q & (
+// ((\soc_inst|m0_1|u_logic|Togwx4~1_combout & \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Pcyvx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Togwx4~1_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Togwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Togwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Togwx4~2 .lut_mask = 64'h05FF05FF05050505;
+defparam \soc_inst|m0_1|u_logic|Togwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y4_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Togwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Togwx4~0_combout = ( \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|U2x2z4~q & \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|U2x2z4~q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Togwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Togwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Togwx4~0 .lut_mask = 64'hFF30FF3000300030;
+defparam \soc_inst|m0_1|u_logic|Togwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y4_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Togwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Togwx4~3_combout = ( !\soc_inst|m0_1|u_logic|Togwx4~2_combout & ( \soc_inst|m0_1|u_logic|Togwx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|Togwx4~2_combout & ( !\soc_inst|m0_1|u_logic|Togwx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Howvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ark2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Togwx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Togwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Togwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Togwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Togwx4~3 .lut_mask = 64'hF5F50000FFFF0000;
+defparam \soc_inst|m0_1|u_logic|Togwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y3_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~16 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bfgwx4~16_combout = ( \soc_inst|m0_1|u_logic|Togwx4~3_combout & ( \soc_inst|m0_1|u_logic|Bfgwx4~15_combout ) ) # ( !\soc_inst|m0_1|u_logic|Togwx4~3_combout & ( (\soc_inst|m0_1|u_logic|Bfgwx4~15_combout &
+// ((\soc_inst|m0_1|u_logic|S4w2z4~q ) # (\soc_inst|m0_1|u_logic|Rngwx4~combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Bfgwx4~15_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Togwx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bfgwx4~16_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~16 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~16 .lut_mask = 64'h050F050F0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~16 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y4_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~17 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bfgwx4~17_combout = ( !\soc_inst|m0_1|u_logic|Kugwx4~0_combout & ( \soc_inst|m0_1|u_logic|Bfgwx4~16_combout & ( (\soc_inst|m0_1|u_logic|Bfgwx4~12_combout & ((!\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Itgwx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Itgwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Bfgwx4~12_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Kugwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~16_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bfgwx4~17_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~17 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~17 .lut_mask = 64'h0000000000AF0000;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~17 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y5_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I0hwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|I0hwx4~1_combout = ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|C34wx4~combout & ( (\soc_inst|m0_1|u_logic|Ffj2z4~q & \soc_inst|m0_1|u_logic|Zzb2z4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|C34wx4~combout & ( (\soc_inst|m0_1|u_logic|Ffj2z4~q & \soc_inst|m0_1|u_logic|Zzb2z4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & (
+// !\soc_inst|m0_1|u_logic|C34wx4~combout & ( \soc_inst|m0_1|u_logic|Zzb2z4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|C34wx4~combout & ( (\soc_inst|m0_1|u_logic|Ffj2z4~q &
+// \soc_inst|m0_1|u_logic|Zzb2z4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|C34wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|I0hwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I0hwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I0hwx4~1 .lut_mask = 64'h005500FF00550055;
+defparam \soc_inst|m0_1|u_logic|I0hwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y4_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zygwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zygwx4~0_combout = ( \soc_inst|m0_1|u_logic|V1yvx4~0_combout & ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q & !\soc_inst|m0_1|u_logic|Swy2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zygwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zygwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zygwx4~0 .lut_mask = 64'h0000A0A000000000;
+defparam \soc_inst|m0_1|u_logic|Zygwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y4_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tvgwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tvgwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Zygwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Yyyvx4~combout & ((!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) #
+// (\soc_inst|m0_1|u_logic|Aok2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Yyyvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Zygwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tvgwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tvgwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tvgwx4~0 .lut_mask = 64'hBF00BF0000000000;
+defparam \soc_inst|m0_1|u_logic|Tvgwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y4_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tvgwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tvgwx4~1_combout = ( \soc_inst|m0_1|u_logic|Tvgwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Npk2z4~q & (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Ark2z4~q & \soc_inst|m0_1|u_logic|Srgwx4~0_combout ))) )
+// ) # ( !\soc_inst|m0_1|u_logic|Tvgwx4~0_combout & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Srgwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Tvgwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tvgwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tvgwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tvgwx4~1 .lut_mask = 64'hCCCCCCCC00400040;
+defparam \soc_inst|m0_1|u_logic|Tvgwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y6_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P0hwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P0hwx4~0_combout = ( \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|H06wx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|H06wx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Swy2z4~q & !\soc_inst|m0_1|u_logic|Zoy2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H06wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|P0hwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P0hwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P0hwx4~0 .lut_mask = 64'h4040404055555555;
+defparam \soc_inst|m0_1|u_logic|P0hwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y4_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bfgwx4~0_combout = ( \soc_inst|m0_1|u_logic|Ark2z4~q & ( (!\soc_inst|m0_1|u_logic|Tvgwx4~1_combout & (!\soc_inst|m0_1|u_logic|P0hwx4~0_combout & ((!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Hvhwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~q & ( (!\soc_inst|m0_1|u_logic|Tvgwx4~1_combout & !\soc_inst|m0_1|u_logic|P0hwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Hvhwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Tvgwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|P0hwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bfgwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~0 .lut_mask = 64'hF000F000E000E000;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y7_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bfgwx4~combout = ( \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Bfgwx4~17_combout ) # (!\soc_inst|m0_1|u_logic|Bfgwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & (
+// (!\soc_inst|m0_1|u_logic|Bfgwx4~17_combout ) # ((!\soc_inst|m0_1|u_logic|Bfgwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|I0hwx4~1_combout & \soc_inst|m0_1|u_logic|I0hwx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bfgwx4~17_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|I0hwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Bfgwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bfgwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bfgwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4 .lut_mask = 64'hFFAEFFAEFFAAFFAA;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y7_N2
+dffeas \soc_inst|m0_1|u_logic|Sgj2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Bfgwx4~combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sgj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sgj2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y3_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qr42z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qr42z4~0_combout = ( \soc_inst|m0_1|u_logic|Aok2z4~q & ( \soc_inst|m0_1|u_logic|Npk2z4~q & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q & \soc_inst|m0_1|u_logic|Ffj2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Aok2z4~q & (
+// !\soc_inst|m0_1|u_logic|Npk2z4~q & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q & (\soc_inst|m0_1|u_logic|Emi2z4~q & \soc_inst|m0_1|u_logic|Ffj2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~q & ( !\soc_inst|m0_1|u_logic|Npk2z4~q ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qr42z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qr42z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qr42z4~0 .lut_mask = 64'hFFFF002200000055;
+defparam \soc_inst|m0_1|u_logic|Qr42z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y3_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qr42z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qr42z4~1_combout = ( \soc_inst|m0_1|u_logic|Tki2z4~q & ( !\soc_inst|m0_1|u_logic|Qr42z4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|Tki2z4~q & ( !\soc_inst|m0_1|u_logic|Qr42z4~0_combout & ( \soc_inst|m0_1|u_logic|Fij2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qr42z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qr42z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qr42z4~1 .lut_mask = 64'h0F0FFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Qr42z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y5_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I6qvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|I6qvx4~0_combout = ( !\soc_inst|m0_1|u_logic|N5qvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout & (\soc_inst|m0_1|u_logic|T50wx4~0_combout & (\soc_inst|m0_1|u_logic|U5qvx4~combout &
+// ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ))))) ) ) # ( \soc_inst|m0_1|u_logic|N5qvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout & (\soc_inst|m0_1|u_logic|U5qvx4~combout &
+// ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ))))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|U5qvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
+ .datag(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|I6qvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I6qvx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|I6qvx4~0 .lut_mask = 64'h000800A8000A00AA;
+defparam \soc_inst|m0_1|u_logic|I6qvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y7_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nfnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nfnvx4~0_combout = ( \soc_inst|interconnect_1|HREADY~0_combout & ( \soc_inst|m0_1|u_logic|I6qvx4~0_combout ) ) # ( !\soc_inst|interconnect_1|HREADY~0_combout & ( (\soc_inst|m0_1|u_logic|A4t2z4~q ) #
+// (\soc_inst|m0_1|u_logic|I6qvx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|I6qvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Nfnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nfnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nfnvx4~0 .lut_mask = 64'h0FFF0FFF0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Nfnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X35_Y7_N34
+dffeas \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Nfnvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y8_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G1mwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G1mwx4~0_combout = ( \soc_inst|m0_1|u_logic|Ffj2z4~q & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q & ((!\soc_inst|m0_1|u_logic|O5t2z4~q ) # ((!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|B73wx4~combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G1mwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G1mwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G1mwx4~0 .lut_mask = 64'h00000000A0E0A0E0;
+defparam \soc_inst|m0_1|u_logic|G1mwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y6_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P2mwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P2mwx4~0_combout = ( !\soc_inst|m0_1|u_logic|B1vvx4~0_combout & ( \soc_inst|m0_1|u_logic|Qaqvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q & \soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|B1vvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout & ((!\soc_inst|m0_1|u_logic|O5t2z4~q ) # (\soc_inst|m0_1|u_logic|G97wx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|P2mwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P2mwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P2mwx4~0 .lut_mask = 64'h2323000022220000;
+defparam \soc_inst|m0_1|u_logic|P2mwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y6_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwrite_o~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hwrite_o~0_combout = ( \soc_inst|m0_1|u_logic|Z0mwx4~0_combout ) # ( !\soc_inst|m0_1|u_logic|Z0mwx4~0_combout & ( (((\soc_inst|m0_1|u_logic|G1mwx4~0_combout & \soc_inst|m0_1|u_logic|Pa7wx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|I2mwx4~0_combout )) # (\soc_inst|m0_1|u_logic|P2mwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|G1mwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|P2mwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|I2mwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Pa7wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Z0mwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hwrite_o~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwrite_o~0 .lut_mask = 64'h3F7F3F7FFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|hwrite_o~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y9_N33
+cyclonev_lcell_comb \soc_inst|ram_1|read_cycle~0 (
+// Equation(s):
+// \soc_inst|ram_1|read_cycle~0_combout = ( \soc_inst|ram_1|always1~0_combout & ( !\soc_inst|m0_1|u_logic|hwrite_o~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|always1~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|ram_1|read_cycle~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|read_cycle~0 .extended_lut = "off";
+defparam \soc_inst|ram_1|read_cycle~0 .lut_mask = 64'h00000000F0F0F0F0;
+defparam \soc_inst|ram_1|read_cycle~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X33_Y9_N35
+dffeas \soc_inst|ram_1|read_cycle (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|ram_1|read_cycle~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|ram_1|read_cycle~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|read_cycle .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|read_cycle .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y9_N3
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[29]~0 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[29]~0_combout = ( \soc_inst|interconnect_1|mux_sel [0] & ( \soc_inst|ram_1|byte_select [3] & ( (\soc_inst|ram_1|read_cycle~q & (!\soc_inst|interconnect_1|mux_sel [1] & !\soc_inst|interconnect_1|mux_sel [2])) ) ) )
+
+ .dataa(!\soc_inst|ram_1|read_cycle~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|interconnect_1|mux_sel [1]),
+ .datad(!\soc_inst|interconnect_1|mux_sel [2]),
+ .datae(!\soc_inst|interconnect_1|mux_sel [0]),
+ .dataf(!\soc_inst|ram_1|byte_select [3]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[29]~0 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[29]~0 .lut_mask = 64'h0000000000005000;
+defparam \soc_inst|interconnect_1|HRDATA[29]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y8_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ajnvx4~0_combout = ( \soc_inst|m0_1|u_logic|Qem2z4~q & ( (\soc_inst|m0_1|u_logic|Vapvx4~combout & \soc_inst|interconnect_1|HRDATA[13]~27_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qem2z4~q & (
+// (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) # ((\soc_inst|m0_1|u_logic|Vapvx4~combout & \soc_inst|interconnect_1|HRDATA[13]~27_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+ .datac(!\soc_inst|interconnect_1|HRDATA[13]~27_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ajnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ajnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajnvx4~0 .lut_mask = 64'hABABABAB03030303;
+defparam \soc_inst|m0_1|u_logic|Ajnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y9_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dnhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dnhvx4~0_combout = ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout & ( (!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ) # (!\soc_inst|interconnect_1|HRDATA[29]~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ),
+ .datad(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dnhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dnhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dnhvx4~0 .lut_mask = 64'hFFFFFFFFFFF0FFF0;
+defparam \soc_inst|m0_1|u_logic|Dnhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y9_N46
+dffeas \soc_inst|m0_1|u_logic|Byw2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Dnhvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Byw2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Byw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Byw2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y8_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajnvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ajnvx4~1_combout = ( \soc_inst|m0_1|u_logic|Wfovx4~combout & ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Bdm2z4~q ) # (!\soc_inst|m0_1|u_logic|Byw2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wfovx4~combout
+// & ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout & ( !\soc_inst|m0_1|u_logic|Byw2z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|Wfovx4~combout & ( !\soc_inst|m0_1|u_logic|Pfovx4~0_combout & ( !\soc_inst|m0_1|u_logic|Bdm2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Bdm2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Byw2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ajnvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ajnvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajnvx4~1 .lut_mask = 64'h0000CCCCF0F0FCFC;
+defparam \soc_inst|m0_1|u_logic|Ajnvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y8_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajnvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ajnvx4~2_combout = ( !\soc_inst|m0_1|u_logic|Ajnvx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Ajnvx4~0_combout & ((!\soc_inst|interconnect_1|HRDATA[29]~0_combout ) # ((!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) #
+// (!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 )))) ) )
+
+ .dataa(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+ .datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ),
+ .datad(!\soc_inst|m0_1|u_logic|Ajnvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ajnvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ajnvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ajnvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajnvx4~2 .lut_mask = 64'hFE00FE0000000000;
+defparam \soc_inst|m0_1|u_logic|Ajnvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y8_N43
+dffeas \soc_inst|m0_1|u_logic|Qem2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Ajnvx4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qem2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qem2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y5_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qllwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qllwx4~1_combout = ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout & ( (\soc_inst|m0_1|u_logic|Huqvx4~0_combout & (\soc_inst|m0_1|u_logic|Pkxvx4~0_combout & \soc_inst|m0_1|u_logic|Y6t2z4~q )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Fjewx4~1_combout & ( (\soc_inst|m0_1|u_logic|Pkxvx4~0_combout & ((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Huqvx4~0_combout & \soc_inst|m0_1|u_logic|Y6t2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qllwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qllwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qllwx4~1 .lut_mask = 64'h0A0B0A0B00030003;
+defparam \soc_inst|m0_1|u_logic|Qllwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y6_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qllwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qllwx4~2_combout = ( \soc_inst|m0_1|u_logic|Npk2z4~q & ( \soc_inst|m0_1|u_logic|Q3xvx4~1_combout ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q & ( (\soc_inst|m0_1|u_logic|Q3xvx4~1_combout & ((!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout
+// ) # (!\soc_inst|m0_1|u_logic|Ju5wx4~combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Q3xvx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qllwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qllwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qllwx4~2 .lut_mask = 64'h00FA00FA00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Qllwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y4_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qllwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qllwx4~3_combout = ( \soc_inst|m0_1|u_logic|Bkxvx4~combout & ( \soc_inst|m0_1|u_logic|Qllwx4~2_combout & ( ((!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Ark2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Bkxvx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qllwx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qllwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qllwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qllwx4~3 .lut_mask = 64'h000000000000FDFD;
+defparam \soc_inst|m0_1|u_logic|Qllwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y4_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qllwx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qllwx4~4_combout = ( \soc_inst|m0_1|u_logic|Qllwx4~3_combout & ( \soc_inst|m0_1|u_logic|Qllwx4~0_combout & ( (\soc_inst|interconnect_1|HREADY~0_combout & ((\soc_inst|m0_1|u_logic|Qllwx4~1_combout ) #
+// (\soc_inst|m0_1|u_logic|Qem2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qllwx4~3_combout & ( \soc_inst|m0_1|u_logic|Qllwx4~0_combout & ( \soc_inst|interconnect_1|HREADY~0_combout ) ) ) # ( \soc_inst|m0_1|u_logic|Qllwx4~3_combout & (
+// !\soc_inst|m0_1|u_logic|Qllwx4~0_combout & ( (\soc_inst|interconnect_1|HREADY~0_combout & \soc_inst|m0_1|u_logic|Qllwx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qllwx4~3_combout & ( !\soc_inst|m0_1|u_logic|Qllwx4~0_combout & (
+// \soc_inst|interconnect_1|HREADY~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Qllwx4~1_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Qllwx4~3_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qllwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qllwx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qllwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qllwx4~4 .lut_mask = 64'h3333030333331313;
+defparam \soc_inst|m0_1|u_logic|Qllwx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y8_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wfhvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wfhvx4~1_combout = (!\soc_inst|m0_1|u_logic|Zoy2z4~q & ((!\soc_inst|m0_1|u_logic|Qslwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Nqy2z4~q & !\soc_inst|m0_1|u_logic|Fyrwx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Zoy2z4~q &
+// (!\soc_inst|m0_1|u_logic|Nqy2z4~q & ((!\soc_inst|m0_1|u_logic|Fyrwx4~1_combout ))))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Qslwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fyrwx4~1_combout ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wfhvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wfhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wfhvx4~1 .lut_mask = 64'hECA0ECA0ECA0ECA0;
+defparam \soc_inst|m0_1|u_logic|Wfhvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y8_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wfhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wfhvx4~0_combout = ( \soc_inst|m0_1|u_logic|Qtrwx4~0_combout & ( (\soc_inst|m0_1|u_logic|I6z2z4~q & \soc_inst|m0_1|u_logic|W7z2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|I6z2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wfhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wfhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wfhvx4~0 .lut_mask = 64'h0000000003030303;
+defparam \soc_inst|m0_1|u_logic|Wfhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y8_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wfhvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wfhvx4~2_combout = ( \soc_inst|m0_1|u_logic|Wfhvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Qllwx4~4_combout & ((\soc_inst|m0_1|u_logic|K9z2z4~q ))) # (\soc_inst|m0_1|u_logic|Qllwx4~4_combout &
+// (!\soc_inst|m0_1|u_logic|Wfhvx4~1_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Wfhvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Qllwx4~4_combout & (((\soc_inst|m0_1|u_logic|K9z2z4~q )))) # (\soc_inst|m0_1|u_logic|Qllwx4~4_combout &
+// (!\soc_inst|m0_1|u_logic|Wfhvx4~1_combout & ((\soc_inst|m0_1|u_logic|K9z2z4~q ) # (\soc_inst|m0_1|u_logic|Cllwx4~0_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qllwx4~4_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Cllwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Wfhvx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|K9z2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wfhvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wfhvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wfhvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wfhvx4~2 .lut_mask = 64'h10FA10FA50FA50FA;
+defparam \soc_inst|m0_1|u_logic|Wfhvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X36_Y8_N22
+dffeas \soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Wfhvx4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y6_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fjewx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fjewx4~0_combout = ( \soc_inst|m0_1|u_logic|I2t2z4~q & ( (!\soc_inst|m0_1|u_logic|K1z2z4~q & (\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Auk2z4~q & \soc_inst|m0_1|u_logic|Cyq2z4~q ))) #
+// (\soc_inst|m0_1|u_logic|K1z2z4~q & ((!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Auk2z4~q & \soc_inst|m0_1|u_logic|Cyq2z4~q )) # (\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Cyq2z4~q ) #
+// (\soc_inst|m0_1|u_logic|Auk2z4~q ))))) ) ) # ( !\soc_inst|m0_1|u_logic|I2t2z4~q & ( (\soc_inst|m0_1|u_logic|K1z2z4~q & (\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Auk2z4~q & \soc_inst|m0_1|u_logic|Cyq2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|K1z2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Cyq2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|I2t2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fjewx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fjewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fjewx4~0 .lut_mask = 64'h0001000101170117;
+defparam \soc_inst|m0_1|u_logic|Fjewx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y6_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fjewx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fjewx4~1_combout = ( \soc_inst|m0_1|u_logic|W7z2z4~q & ( (!\soc_inst|m0_1|u_logic|Fjewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ) #
+// (!\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|W7z2z4~q & (
+// (!\soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Fjewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fjewx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fjewx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fjewx4~1 .lut_mask = 64'hFFFEFFFEFEF8FEF8;
+defparam \soc_inst|m0_1|u_logic|Fjewx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y3_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ajfwx4~0_combout = ( !\soc_inst|m0_1|u_logic|P7wvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q & (((!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout )))) # (\soc_inst|m0_1|u_logic|O5t2z4~q & ((!\soc_inst|m0_1|u_logic|Msyvx4~combout
+// ) # ((!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ajfwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~0 .lut_mask = 64'hFE32FE3200000000;
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y7_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ajfwx4~1_combout = ( \soc_inst|m0_1|u_logic|Wdqvx4~0_combout & ( \soc_inst|m0_1|u_logic|Ffj2z4~q & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q & ((\soc_inst|m0_1|u_logic|Aok2z4~q ) # (\soc_inst|m0_1|u_logic|Ark2z4~q ))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Wdqvx4~0_combout & ( \soc_inst|m0_1|u_logic|Ffj2z4~q & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q & \soc_inst|m0_1|u_logic|Aok2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Wdqvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ffj2z4~q & (
+// (!\soc_inst|m0_1|u_logic|Ark2z4~q & (!\soc_inst|m0_1|u_logic|O5t2z4~q & \soc_inst|m0_1|u_logic|Aok2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wdqvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ffj2z4~q & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q &
+// (!\soc_inst|m0_1|u_logic|O5t2z4~q & \soc_inst|m0_1|u_logic|Aok2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ajfwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~1 .lut_mask = 64'h080808080C0C4C4C;
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y3_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zlfwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zlfwx4~0_combout = ( \soc_inst|m0_1|u_logic|Fij2z4~q & ( (\soc_inst|m0_1|u_logic|I0hwx4~0_combout & \soc_inst|m0_1|u_logic|Ffj2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q & ( (!\soc_inst|m0_1|u_logic|Ukpvx4~combout &
+// (\soc_inst|m0_1|u_logic|I0hwx4~0_combout & ((\soc_inst|m0_1|u_logic|Ffj2z4~q )))) # (\soc_inst|m0_1|u_logic|Ukpvx4~combout & (((\soc_inst|m0_1|u_logic|I0hwx4~0_combout & \soc_inst|m0_1|u_logic|Ffj2z4~q )) # (\soc_inst|m0_1|u_logic|Howvx4~0_combout )))
+// ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zlfwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zlfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zlfwx4~0 .lut_mask = 64'h0537053700330033;
+defparam \soc_inst|m0_1|u_logic|Zlfwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y3_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ajfwx4~2_combout = ( !\soc_inst|m0_1|u_logic|Ajfwx4~1_combout & ( \soc_inst|m0_1|u_logic|Zlfwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Xkfwx4~0_combout & (!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|B73wx4~combout ) # (!\soc_inst|m0_1|u_logic|Howvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ajfwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Zlfwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Xkfwx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|B73wx4~combout ) # (!\soc_inst|m0_1|u_logic|Howvx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Xkfwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ajfwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Zlfwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ajfwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~2 .lut_mask = 64'hCC880000C0800000;
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y5_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lsfwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lsfwx4~0_combout = ( \soc_inst|m0_1|u_logic|Ffj2z4~q & ( (\soc_inst|m0_1|u_logic|Howvx4~0_combout & (((\soc_inst|m0_1|u_logic|Npk2z4~q & !\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|U2x2z4~q ))) ) ) #
+// ( !\soc_inst|m0_1|u_logic|Ffj2z4~q & ( (\soc_inst|m0_1|u_logic|Howvx4~0_combout & (\soc_inst|m0_1|u_logic|Npk2z4~q & !\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lsfwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lsfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lsfwx4~0 .lut_mask = 64'h1100110015051505;
+defparam \soc_inst|m0_1|u_logic|Lsfwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y3_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Infwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Infwx4~0_combout = ( \soc_inst|m0_1|u_logic|Sgj2z4~q & ( \soc_inst|m0_1|u_logic|O5t2z4~q & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q & ((!\soc_inst|m0_1|u_logic|Npk2z4~q & (!\soc_inst|m0_1|u_logic|Ffj2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Npk2z4~q & (\soc_inst|m0_1|u_logic|Ffj2z4~q & !\soc_inst|m0_1|u_logic|Ark2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q & ( \soc_inst|m0_1|u_logic|O5t2z4~q & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q &
+// (!\soc_inst|m0_1|u_logic|Ffj2z4~q & !\soc_inst|m0_1|u_logic|Tki2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Sgj2z4~q & ( !\soc_inst|m0_1|u_logic|O5t2z4~q & ( (\soc_inst|m0_1|u_logic|Npk2z4~q & (\soc_inst|m0_1|u_logic|Ffj2z4~q &
+// (!\soc_inst|m0_1|u_logic|Tki2z4~q & !\soc_inst|m0_1|u_logic|Ark2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Infwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Infwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Infwx4~0 .lut_mask = 64'h0000100080809080;
+defparam \soc_inst|m0_1|u_logic|Infwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y3_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lsfwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lsfwx4~1_combout = ( \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Tki2z4~q & ((!\soc_inst|m0_1|u_logic|Qem2z4~q & (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Qem2z4~q &
+// ((!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Swy2z4~q ))))) ) ) # ( !\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Tki2z4~q ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lsfwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lsfwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lsfwx4~1 .lut_mask = 64'h3333333312131213;
+defparam \soc_inst|m0_1|u_logic|Lsfwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y3_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ajfwx4~3_combout = ( \soc_inst|m0_1|u_logic|Infwx4~0_combout & ( \soc_inst|m0_1|u_logic|Lsfwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|B73wx4~combout & !\soc_inst|m0_1|u_logic|C2yvx4~combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Infwx4~0_combout & ( \soc_inst|m0_1|u_logic|Lsfwx4~1_combout & ( !\soc_inst|m0_1|u_logic|C2yvx4~combout ) ) ) # ( \soc_inst|m0_1|u_logic|Infwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Lsfwx4~1_combout & (
+// (!\soc_inst|m0_1|u_logic|B73wx4~combout & ((!\soc_inst|m0_1|u_logic|C2yvx4~combout ) # (!\soc_inst|m0_1|u_logic|Lsfwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Infwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Lsfwx4~1_combout & (
+// (!\soc_inst|m0_1|u_logic|C2yvx4~combout ) # (!\soc_inst|m0_1|u_logic|Lsfwx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Lsfwx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Infwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Lsfwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ajfwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~3 .lut_mask = 64'hFCFCA8A8CCCC8888;
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y3_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ajfwx4~4_combout = ( \soc_inst|m0_1|u_logic|Ajfwx4~3_combout & ( (\soc_inst|m0_1|u_logic|Ajfwx4~2_combout & ((!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ucqvx4~combout ))) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ajfwx4~2_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ajfwx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ajfwx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~4 .lut_mask = 64'h0000000000FC00FC;
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y7_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ajfwx4~5_combout = ( \soc_inst|m0_1|u_logic|Ajfwx4~0_combout & ( \soc_inst|m0_1|u_logic|Ajfwx4~4_combout & ( (!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ) #
+// (!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout )) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Ajfwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ajfwx4~4_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ajfwx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~5 .lut_mask = 64'h000000000000FFFC;
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y7_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vqfwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vqfwx4~0_combout = ( \soc_inst|m0_1|u_logic|M66wx4~combout & ( ((\soc_inst|m0_1|u_logic|Ju5wx4~combout & (\soc_inst|m0_1|u_logic|Fjewx4~1_combout & !\soc_inst|m0_1|u_logic|Npk2z4~q ))) # (\soc_inst|m0_1|u_logic|Fij2z4~q ) ) ) #
+// ( !\soc_inst|m0_1|u_logic|M66wx4~combout & ( (\soc_inst|m0_1|u_logic|Ju5wx4~combout & (\soc_inst|m0_1|u_logic|Fjewx4~1_combout & !\soc_inst|m0_1|u_logic|Npk2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vqfwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vqfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vqfwx4~0 .lut_mask = 64'h0300030057555755;
+defparam \soc_inst|m0_1|u_logic|Vqfwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y8_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rvfwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rvfwx4~0_combout = ( \soc_inst|m0_1|u_logic|G9w2z4~q & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q & (((!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|O5t2z4~q &
+// (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|G9w2z4~q & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q ) #
+// (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|G9w2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rvfwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~0 .lut_mask = 64'hEEEEEEEEEEE0EEE0;
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y6_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L6gwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|L6gwx4~0_combout = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Akewx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( ((!\soc_inst|m0_1|u_logic|Aok2z4~q &
+// \soc_inst|m0_1|u_logic|Hdh2z4~0_combout )) # (\soc_inst|m0_1|u_logic|Akewx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Akewx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|L6gwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L6gwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L6gwx4~0 .lut_mask = 64'h33F333F333333333;
+defparam \soc_inst|m0_1|u_logic|L6gwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y6_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rvfwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rvfwx4~1_combout = ( \soc_inst|m0_1|u_logic|Nkpvx4~0_combout & ( \soc_inst|m0_1|u_logic|U2x2z4~q ) ) # ( !\soc_inst|m0_1|u_logic|Nkpvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ) #
+// ((!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|U2x2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rvfwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~1 .lut_mask = 64'hFFAFFFAF0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y6_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rvfwx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rvfwx4~4_combout = ( !\soc_inst|m0_1|u_logic|Fij2z4~q & ( (\soc_inst|m0_1|u_logic|Rvfwx4~0_combout & (\soc_inst|m0_1|u_logic|Rvfwx4~1_combout & (((!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ark2z4~q ))
+// # (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )))) ) ) # ( \soc_inst|m0_1|u_logic|Fij2z4~q & ( (\soc_inst|m0_1|u_logic|Rvfwx4~0_combout & (((\soc_inst|m0_1|u_logic|Rvfwx4~1_combout & ((!\soc_inst|m0_1|u_logic|L6gwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )))))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rvfwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|L6gwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rvfwx4~1_combout ),
+ .datag(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rvfwx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~4 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~4 .lut_mask = 64'h0000000055515151;
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y6_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rvfwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rvfwx4~2_combout = ( \soc_inst|m0_1|u_logic|Rexvx4~0_combout & ( \soc_inst|m0_1|u_logic|Rvfwx4~4_combout & ( (!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rexvx4~0_combout & ( \soc_inst|m0_1|u_logic|Rvfwx4~4_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rvfwx4~4_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rvfwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~2 .lut_mask = 64'h00000000FFFFFFFA;
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y6_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cyfwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cyfwx4~0_combout = ( \soc_inst|m0_1|u_logic|Emi2z4~q & ( (\soc_inst|m0_1|u_logic|Z7fwx4~0_combout & (\soc_inst|m0_1|u_logic|Fjewx4~1_combout & \soc_inst|m0_1|u_logic|Ucqvx4~combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Emi2z4~q &
+// ( \soc_inst|m0_1|u_logic|Z7fwx4~0_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cyfwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cyfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cyfwx4~0 .lut_mask = 64'h5555555501010101;
+defparam \soc_inst|m0_1|u_logic|Cyfwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y3_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B1gwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|B1gwx4~1_combout = ( \soc_inst|m0_1|u_logic|Swy2z4~q & ( (\soc_inst|m0_1|u_logic|Tki2z4~q & \soc_inst|m0_1|u_logic|Qsewx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~q & ( (\soc_inst|m0_1|u_logic|Tki2z4~q &
+// (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|U2x2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|B1gwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B1gwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B1gwx4~1 .lut_mask = 64'h0005000511111111;
+defparam \soc_inst|m0_1|u_logic|B1gwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y3_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K2gwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K2gwx4~0_combout = ( \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Ugewx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Dvy2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~q & \soc_inst|m0_1|u_logic|Ugewx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Dvy2z4~q & (!\soc_inst|m0_1|u_logic|Zoy2z4~q $ (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|K2gwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K2gwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K2gwx4~0 .lut_mask = 64'h414100AA0000050F;
+defparam \soc_inst|m0_1|u_logic|K2gwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y4_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B1gwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|B1gwx4~0_combout = ( \soc_inst|m0_1|u_logic|G27wx4~1_combout & ( ((\soc_inst|m0_1|u_logic|Icyvx4~0_combout & !\soc_inst|m0_1|u_logic|W28wx4~0_combout )) # (\soc_inst|m0_1|u_logic|X5gwx4~0_combout ) ) ) # (
+// !\soc_inst|m0_1|u_logic|G27wx4~1_combout & ( (\soc_inst|m0_1|u_logic|Icyvx4~0_combout & !\soc_inst|m0_1|u_logic|W28wx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|X5gwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|W28wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|G27wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|B1gwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B1gwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B1gwx4~0 .lut_mask = 64'h0F000F003F333F33;
+defparam \soc_inst|m0_1|u_logic|B1gwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y3_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B1gwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|B1gwx4~2_combout = ( \soc_inst|m0_1|u_logic|Nkpvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q & (((!\soc_inst|m0_1|u_logic|K2gwx4~0_combout ) # (\soc_inst|m0_1|u_logic|B1gwx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|B1gwx4~1_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Nkpvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|B1gwx4~0_combout ) # (\soc_inst|m0_1|u_logic|B1gwx4~1_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|B1gwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|K2gwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|B1gwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|B1gwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B1gwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B1gwx4~2 .lut_mask = 64'h1155115551555155;
+defparam \soc_inst|m0_1|u_logic|B1gwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y5_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ccgwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ccgwx4~0_combout = (\soc_inst|m0_1|u_logic|Hyewx4~combout & ((!\soc_inst|m0_1|u_logic|Nqy2z4~q ) # ((!\soc_inst|m0_1|u_logic|Zoy2z4~q ) # (!\soc_inst|m0_1|u_logic|Xly2z4~q ))))
+
+ .dataa(!\soc_inst|m0_1|u_logic|Hyewx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ccgwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ccgwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ccgwx4~0 .lut_mask = 64'h5554555455545554;
+defparam \soc_inst|m0_1|u_logic|Ccgwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y4_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y9gwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y9gwx4~0_combout = ( \soc_inst|m0_1|u_logic|M4fwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~q & (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q $ (\soc_inst|m0_1|u_logic|Pty2z4~q ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|M4fwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q & (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q $ (((\soc_inst|m0_1|u_logic|Dvy2z4~q ))))) # (\soc_inst|m0_1|u_logic|Pty2z4~q & (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|Dvy2z4~q ) # (\soc_inst|m0_1|u_logic|Swy2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Y9gwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y9gwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y9gwx4~0 .lut_mask = 64'h9945994599009900;
+defparam \soc_inst|m0_1|u_logic|Y9gwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y4_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K9gwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K9gwx4~0_combout = ( \soc_inst|m0_1|u_logic|Dvy2z4~q & ( \soc_inst|m0_1|u_logic|Y9gwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q ) # (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q $ (\soc_inst|m0_1|u_logic|Pty2z4~q )) ) ) ) #
+// ( !\soc_inst|m0_1|u_logic|Dvy2z4~q & ( \soc_inst|m0_1|u_logic|Y9gwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Swy2z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|Dvy2z4~q & ( !\soc_inst|m0_1|u_logic|Y9gwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q
+// & ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q $ (\soc_inst|m0_1|u_logic|Pty2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~q & ( !\soc_inst|m0_1|u_logic|Y9gwx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Swy2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Y9gwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|K9gwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K9gwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K9gwx4~0 .lut_mask = 64'h30303231F0F0FAF5;
+defparam \soc_inst|m0_1|u_logic|K9gwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y5_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9gwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D9gwx4~0_combout = ( \soc_inst|m0_1|u_logic|K9gwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Wvewx4~0_combout & (!\soc_inst|m0_1|u_logic|Ccgwx4~0_combout & (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q &
+// !\soc_inst|m0_1|u_logic|Qem2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|K9gwx4~0_combout & ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ccgwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|K9gwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|D9gwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D9gwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D9gwx4~0 .lut_mask = 64'h5555555540004000;
+defparam \soc_inst|m0_1|u_logic|D9gwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y3_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E6gwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|E6gwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Sgj2z4~q & ( ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Fij2z4~q )) # (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|E6gwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E6gwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E6gwx4~0 .lut_mask = 64'hF3FFF3FF00000000;
+defparam \soc_inst|m0_1|u_logic|E6gwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y3_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E6gwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|E6gwx4~1_combout = ( \soc_inst|m0_1|u_logic|S4w2z4~q & ( \soc_inst|m0_1|u_logic|C34wx4~combout & ( (!\soc_inst|m0_1|u_logic|E6gwx4~0_combout & \soc_inst|m0_1|u_logic|Howvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|S4w2z4~q
+// & ( \soc_inst|m0_1|u_logic|C34wx4~combout & ( (!\soc_inst|m0_1|u_logic|E6gwx4~0_combout & \soc_inst|m0_1|u_logic|Howvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|S4w2z4~q & ( !\soc_inst|m0_1|u_logic|C34wx4~combout & (
+// (\soc_inst|m0_1|u_logic|Howvx4~0_combout & ((!\soc_inst|m0_1|u_logic|E6gwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ffj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S4w2z4~q & ( !\soc_inst|m0_1|u_logic|C34wx4~combout & (
+// (!\soc_inst|m0_1|u_logic|E6gwx4~0_combout & \soc_inst|m0_1|u_logic|Howvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|E6gwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|C34wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|E6gwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E6gwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E6gwx4~1 .lut_mask = 64'h2222323222222222;
+defparam \soc_inst|m0_1|u_logic|E6gwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y3_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rvfwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rvfwx4~3_combout = ( !\soc_inst|m0_1|u_logic|D9gwx4~0_combout & ( !\soc_inst|m0_1|u_logic|E6gwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Rvfwx4~2_combout & (!\soc_inst|m0_1|u_logic|Cyfwx4~0_combout &
+// !\soc_inst|m0_1|u_logic|B1gwx4~2_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rvfwx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Cyfwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|B1gwx4~2_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|D9gwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|E6gwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rvfwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~3 .lut_mask = 64'h4040000000000000;
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y7_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ajfwx4~combout = ( \soc_inst|m0_1|u_logic|Rvfwx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Ajfwx4~5_combout ) # ((\soc_inst|m0_1|u_logic|Vqfwx4~0_combout & \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Rvfwx4~3_combout & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Ajfwx4~5_combout ) # ((\soc_inst|m0_1|u_logic|Vqfwx4~0_combout & \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ajfwx4~5_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Vqfwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Rvfwx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ajfwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ajfwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4 .lut_mask = 64'hEEEFEEEFCCCFCCCF;
+defparam \soc_inst|m0_1|u_logic|Ajfwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X35_Y7_N25
+dffeas \soc_inst|m0_1|u_logic|Ffj2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Ajfwx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ffj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ffj2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y8_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wdxvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wdxvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Ffj2z4~q & ( !\soc_inst|m0_1|u_logic|Npk2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wdxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wdxvx4~0 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|Wdxvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Amjwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Og4wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q ) # ((!\soc_inst|m0_1|u_logic|M66wx4~combout ) # (!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Og4wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Amjwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Amjwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Amjwx4~0 .lut_mask = 64'hFFFCFFFC00000000;
+defparam \soc_inst|m0_1|u_logic|Amjwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y8_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D5kwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D5kwx4~0_combout = ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Ark2z4~q & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q & ((!\soc_inst|m0_1|u_logic|Ffj2z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Sgj2z4~q & (\soc_inst|m0_1|u_logic|Nsk2z4~q & \soc_inst|m0_1|u_logic|Ffj2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Ark2z4~q & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q &
+// (!\soc_inst|m0_1|u_logic|Ffj2z4~q & !\soc_inst|m0_1|u_logic|O5t2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Ark2z4~q & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q & (\soc_inst|m0_1|u_logic|Nsk2z4~q &
+// !\soc_inst|m0_1|u_logic|O5t2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Ark2z4~q & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q & (\soc_inst|m0_1|u_logic|Nsk2z4~q & !\soc_inst|m0_1|u_logic|O5t2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|D5kwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D5kwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D5kwx4~0 .lut_mask = 64'h11001100A000A100;
+defparam \soc_inst|m0_1|u_logic|D5kwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y8_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Amjwx4~2_combout = ( \soc_inst|m0_1|u_logic|Emi2z4~q & ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q & \soc_inst|m0_1|u_logic|Kzxvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Emi2z4~q & (
+// \soc_inst|m0_1|u_logic|Ncqvx4~0_combout & ( \soc_inst|m0_1|u_logic|Egkwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Emi2z4~q & ( !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout & ( \soc_inst|m0_1|u_logic|Egkwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Amjwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Amjwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Amjwx4~2 .lut_mask = 64'h0F0F00000F0F2222;
+defparam \soc_inst|m0_1|u_logic|Amjwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y8_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Amjwx4~3_combout = ( \soc_inst|m0_1|u_logic|Srgwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|D5kwx4~0_combout & (!\soc_inst|m0_1|u_logic|Amjwx4~2_combout & ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # (\soc_inst|m0_1|u_logic|Ark2z4~q
+// )))) ) ) # ( !\soc_inst|m0_1|u_logic|Srgwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|D5kwx4~0_combout & !\soc_inst|m0_1|u_logic|Amjwx4~2_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|D5kwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Amjwx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Srgwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Amjwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Amjwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Amjwx4~3 .lut_mask = 64'hC0C0C0C080C080C0;
+defparam \soc_inst|m0_1|u_logic|Amjwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y7_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Amjwx4~1_combout = ( \soc_inst|m0_1|u_logic|Ffj2z4~q & ( (\soc_inst|m0_1|u_logic|Orewx4~0_combout & ((\soc_inst|m0_1|u_logic|Fij2z4~q ) # (\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~q & (
+// (\soc_inst|m0_1|u_logic|Aok2z4~q & \soc_inst|m0_1|u_logic|Orewx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Amjwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Amjwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Amjwx4~1 .lut_mask = 64'h05050505050F050F;
+defparam \soc_inst|m0_1|u_logic|Amjwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y7_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Amjwx4~4_combout = ( \soc_inst|m0_1|u_logic|Pkxvx4~0_combout & ( \soc_inst|m0_1|u_logic|Y6t2z4~q & ( (!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout & (\soc_inst|m0_1|u_logic|Amjwx4~3_combout &
+// !\soc_inst|m0_1|u_logic|Amjwx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pkxvx4~0_combout & ( \soc_inst|m0_1|u_logic|Y6t2z4~q & ( (\soc_inst|m0_1|u_logic|Amjwx4~3_combout & !\soc_inst|m0_1|u_logic|Amjwx4~1_combout ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Pkxvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Y6t2z4~q & ( (\soc_inst|m0_1|u_logic|Amjwx4~3_combout & !\soc_inst|m0_1|u_logic|Amjwx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pkxvx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Y6t2z4~q & ( (\soc_inst|m0_1|u_logic|Amjwx4~3_combout & !\soc_inst|m0_1|u_logic|Amjwx4~1_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Amjwx4~3_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Amjwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Amjwx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Amjwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Amjwx4~4 .lut_mask = 64'h0F000F000F000A00;
+defparam \soc_inst|m0_1|u_logic|Amjwx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y7_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Amjwx4~5_combout = ( \soc_inst|m0_1|u_logic|Gpjwx4~0_combout & ( \soc_inst|m0_1|u_logic|Amjwx4~4_combout & ( (\soc_inst|m0_1|u_logic|Amjwx4~0_combout & (!\soc_inst|m0_1|u_logic|V1yvx4~0_combout &
+// !\soc_inst|m0_1|u_logic|Mkrwx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gpjwx4~0_combout & ( \soc_inst|m0_1|u_logic|Amjwx4~4_combout & ( (\soc_inst|m0_1|u_logic|Amjwx4~0_combout & !\soc_inst|m0_1|u_logic|Mkrwx4~combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Amjwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Mkrwx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Gpjwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Amjwx4~4_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Amjwx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Amjwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Amjwx4~5 .lut_mask = 64'h0000000055004400;
+defparam \soc_inst|m0_1|u_logic|Amjwx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y7_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tsjwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tsjwx4~0_combout = ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q & (\soc_inst|m0_1|u_logic|Fjewx4~1_combout & \soc_inst|m0_1|u_logic|Orewx4~0_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tsjwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tsjwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tsjwx4~0 .lut_mask = 64'h00000000000C000C;
+defparam \soc_inst|m0_1|u_logic|Tsjwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y3_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R3fwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R3fwx4~0_combout = ( \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~q & ((!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ugewx4~0_combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & (((!\soc_inst|m0_1|u_logic|Dvy2z4~q )))) # (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ) #
+// ((\soc_inst|m0_1|u_logic|Ugewx4~0_combout & !\soc_inst|m0_1|u_logic|Dvy2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R3fwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R3fwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R3fwx4~0 .lut_mask = 64'hF0BAF0BAF030F030;
+defparam \soc_inst|m0_1|u_logic|R3fwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y3_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zvjwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zvjwx4~0_combout = ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Swy2z4~q ) ) # ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Swy2z4~q &
+// (((\soc_inst|m0_1|u_logic|G27wx4~2_combout & \soc_inst|m0_1|u_logic|M4fwx4~0_combout )) # (\soc_inst|m0_1|u_logic|R3fwx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|G27wx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|R3fwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Zvjwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zvjwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zvjwx4~0 .lut_mask = 64'h0515051555555555;
+defparam \soc_inst|m0_1|u_logic|Zvjwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y4_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|My6wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|My6wx4~1_combout = ( \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|W28wx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|W28wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|My6wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|My6wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|My6wx4~1 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|My6wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y3_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xujwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xujwx4~0_combout = ( \soc_inst|m0_1|u_logic|Zvjwx4~0_combout & ( \soc_inst|m0_1|u_logic|My6wx4~1_combout & ( (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|V1yvx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Zvjwx4~0_combout & ( \soc_inst|m0_1|u_logic|My6wx4~1_combout & ( (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|V1yvx4~0_combout & \soc_inst|m0_1|u_logic|Zoy2z4~q )) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Zvjwx4~0_combout & ( !\soc_inst|m0_1|u_logic|My6wx4~1_combout & ( (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|V1yvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Zvjwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|My6wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xujwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xujwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xujwx4~0 .lut_mask = 64'h0000111101011111;
+defparam \soc_inst|m0_1|u_logic|Xujwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y4_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E2kwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|E2kwx4~0_combout = ( \soc_inst|m0_1|u_logic|Dvy2z4~q & ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q & (\soc_inst|m0_1|u_logic|Tki2z4~q & \soc_inst|m0_1|u_logic|Swy2z4~q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Dvy2z4~q & ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Tki2z4~q & (\soc_inst|m0_1|u_logic|Swy2z4~q & ((!\soc_inst|m0_1|u_logic|Qem2z4~q ) # (!\soc_inst|m0_1|u_logic|Pty2z4~q )))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Dvy2z4~q & ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Qem2z4~q & (\soc_inst|m0_1|u_logic|Tki2z4~q & (!\soc_inst|m0_1|u_logic|Swy2z4~q $ (\soc_inst|m0_1|u_logic|Pty2z4~q )))) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Dvy2z4~q & ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Qem2z4~q & (\soc_inst|m0_1|u_logic|Tki2z4~q & \soc_inst|m0_1|u_logic|Swy2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|E2kwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E2kwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E2kwx4~0 .lut_mask = 64'h0101100103020202;
+defparam \soc_inst|m0_1|u_logic|E2kwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y4_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htjwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Htjwx4~0_combout = ( \soc_inst|m0_1|u_logic|G27wx4~1_combout & ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Swy2z4~q & (\soc_inst|m0_1|u_logic|Wvewx4~0_combout & (\soc_inst|m0_1|u_logic|Qem2z4~q &
+// \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G27wx4~1_combout & ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Swy2z4~q & (\soc_inst|m0_1|u_logic|Wvewx4~0_combout &
+// (\soc_inst|m0_1|u_logic|Qem2z4~q & \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|G27wx4~1_combout & ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Swy2z4~q &
+// (\soc_inst|m0_1|u_logic|Wvewx4~0_combout & \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|G27wx4~1_combout & ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Swy2z4~q &
+// (\soc_inst|m0_1|u_logic|Wvewx4~0_combout & (\soc_inst|m0_1|u_logic|Qem2z4~q & \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|G27wx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Htjwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Htjwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Htjwx4~0 .lut_mask = 64'h0001001100010001;
+defparam \soc_inst|m0_1|u_logic|Htjwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y4_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htjwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Htjwx4~1_combout = ( \soc_inst|m0_1|u_logic|Zzb2z4~0_combout & ( !\soc_inst|m0_1|u_logic|Htjwx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|Zzb2z4~0_combout & ( !\soc_inst|m0_1|u_logic|Htjwx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Howvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Htjwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Htjwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Htjwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Htjwx4~1 .lut_mask = 64'hFF0FFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Htjwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y4_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htjwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Htjwx4~2_combout = ( \soc_inst|m0_1|u_logic|Xiwvx4~0_combout & ( \soc_inst|m0_1|u_logic|Htjwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|E2kwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Xkfwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xiwvx4~0_combout & ( \soc_inst|m0_1|u_logic|Htjwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Xkfwx4~0_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Xkfwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|E2kwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Xiwvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Htjwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Htjwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Htjwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Htjwx4~2 .lut_mask = 64'h00000000FCFCFC00;
+defparam \soc_inst|m0_1|u_logic|Htjwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y3_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htjwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Htjwx4~3_combout = ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout & ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Xujwx4~0_combout & (\soc_inst|m0_1|u_logic|Htjwx4~2_combout &
+// !\soc_inst|m0_1|u_logic|A0zvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout & ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Xujwx4~0_combout & \soc_inst|m0_1|u_logic|Htjwx4~2_combout ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Ncqvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Fjewx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Xujwx4~0_combout & \soc_inst|m0_1|u_logic|Htjwx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Fjewx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Xujwx4~0_combout & \soc_inst|m0_1|u_logic|Htjwx4~2_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Xujwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Htjwx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Htjwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Htjwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Htjwx4~3 .lut_mask = 64'h2222222222222020;
+defparam \soc_inst|m0_1|u_logic|Htjwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y5_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qujwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qujwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Jm6wx4~0_combout ) # (((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) #
+// (\soc_inst|m0_1|u_logic|U2x2z4~q )) # (\soc_inst|m0_1|u_logic|G27wx4~0_combout ))) ) ) # ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) # (((!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ) #
+// ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|U2x2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Jm6wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datag(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qujwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qujwx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Qujwx4~0 .lut_mask = 64'hFFEFFFFFFFFFFFFA;
+defparam \soc_inst|m0_1|u_logic|Qujwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y5_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Drjwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Drjwx4~0_combout = ( \soc_inst|m0_1|u_logic|Qujwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Htjwx4~3_combout & !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Qujwx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Htjwx4~3_combout ) # ((!\soc_inst|m0_1|u_logic|Swy2z4~q & !\soc_inst|m0_1|u_logic|Qem2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Htjwx4~3_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qujwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Drjwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Drjwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Drjwx4~0 .lut_mask = 64'hC888C88888888888;
+defparam \soc_inst|m0_1|u_logic|Drjwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y7_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Krjwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Krjwx4~0_combout = ( \soc_inst|m0_1|u_logic|G9w2z4~q & ( (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout & !\soc_inst|m0_1|u_logic|O5t2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|G9w2z4~q & ( ((\soc_inst|m0_1|u_logic|Wkxvx4~0_combout &
+// !\soc_inst|m0_1|u_logic|O5t2z4~q )) # (\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|G9w2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Krjwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Krjwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Krjwx4~0 .lut_mask = 64'h5F0F5F0F55005500;
+defparam \soc_inst|m0_1|u_logic|Krjwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y7_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Amjwx4~combout = ( \soc_inst|m0_1|u_logic|Krjwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Amjwx4~5_combout ) # ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # (\soc_inst|m0_1|u_logic|Drjwx4~0_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Krjwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Amjwx4~5_combout ) # (((!\soc_inst|m0_1|u_logic|Fij2z4~q & \soc_inst|m0_1|u_logic|Tsjwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Drjwx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Amjwx4~5_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Tsjwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Drjwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Krjwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Amjwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Amjwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Amjwx4 .lut_mask = 64'hAEFFAEFFEEFFEEFF;
+defparam \soc_inst|m0_1|u_logic|Amjwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y7_N35
+dffeas \soc_inst|m0_1|u_logic|Ark2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Amjwx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ark2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ark2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y8_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A0zvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|A0zvx4~0_combout = ( \soc_inst|m0_1|u_logic|Ark2z4~q & ( !\soc_inst|m0_1|u_logic|Tki2z4~q & ( \soc_inst|m0_1|u_logic|O5t2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|A0zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A0zvx4~0 .lut_mask = 64'h0000555500000000;
+defparam \soc_inst|m0_1|u_logic|A0zvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y7_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hohwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hohwx4~0_combout = ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q & \soc_inst|m0_1|u_logic|Hvhwx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Hvhwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hohwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hohwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hohwx4~0 .lut_mask = 64'h0000000000F000F0;
+defparam \soc_inst|m0_1|u_logic|Hohwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y6_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xphwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xphwx4~0_combout = ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Fjewx4~1_combout & ( (\soc_inst|m0_1|u_logic|O9qvx4~0_combout & \soc_inst|m0_1|u_logic|Qp3wx4~0_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Qp3wx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xphwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xphwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xphwx4~0 .lut_mask = 64'h0000030300000000;
+defparam \soc_inst|m0_1|u_logic|Xphwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y6_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmhwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rmhwx4~1_combout = ( \soc_inst|m0_1|u_logic|Z7fwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q & (((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Npk2z4~q & (\soc_inst|m0_1|u_logic|Pcyvx4~combout &
+// (\soc_inst|m0_1|u_logic|Pmgwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Z7fwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Pcyvx4~combout & (\soc_inst|m0_1|u_logic|Npk2z4~q & \soc_inst|m0_1|u_logic|Pmgwx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Pmgwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rmhwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~1 .lut_mask = 64'h01010101CD01CD01;
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y3_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmhwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rmhwx4~2_combout = ( \soc_inst|m0_1|u_logic|Qsewx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Csewx4~0_combout & ((!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Swy2z4~q & \soc_inst|m0_1|u_logic|U2x2z4~q
+// )))) ) ) # ( !\soc_inst|m0_1|u_logic|Qsewx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q & ((!\soc_inst|m0_1|u_logic|U2x2z4~q & ((!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|U2x2z4~q &
+// (!\soc_inst|m0_1|u_logic|Csewx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Swy2z4~q & (((!\soc_inst|m0_1|u_logic|Icyvx4~0_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rmhwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~2 .lut_mask = 64'hFD08FD08CC08CC08;
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y4_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmhwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rmhwx4~0_combout = ( \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q & \soc_inst|m0_1|u_logic|Mk6wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & (
+// (!\soc_inst|m0_1|u_logic|Qllwx4~0_combout & (!\soc_inst|m0_1|u_logic|U2x2z4~q & (\soc_inst|m0_1|u_logic|Mk6wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Qllwx4~0_combout & (((!\soc_inst|m0_1|u_logic|U2x2z4~q & \soc_inst|m0_1|u_logic|Mk6wx4~0_combout ))
+// # (\soc_inst|m0_1|u_logic|Dvy2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qllwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Mk6wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rmhwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~0 .lut_mask = 64'h0C5D0C5D0C0C0C0C;
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y3_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmhwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rmhwx4~3_combout = ( \soc_inst|m0_1|u_logic|Wdxvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Rmhwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Rmhwx4~1_combout & (!\soc_inst|m0_1|u_logic|A0zvx4~0_combout &
+// \soc_inst|m0_1|u_logic|Rmhwx4~2_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wdxvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Rmhwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Rmhwx4~1_combout & \soc_inst|m0_1|u_logic|Rmhwx4~2_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rmhwx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Rmhwx4~2_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Rmhwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rmhwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~3 .lut_mask = 64'h0A0A080800000000;
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y3_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmhwx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rmhwx4~4_combout = ( \soc_inst|m0_1|u_logic|Rmhwx4~3_combout & ( ((!\soc_inst|m0_1|u_logic|G27wx4~2_combout ) # (!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Swy2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|G27wx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Rmhwx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rmhwx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~4 .lut_mask = 64'h00000000FDFDFDFD;
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y6_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmhwx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rmhwx4~5_combout = ( \soc_inst|m0_1|u_logic|Rmhwx4~4_combout & ( (!\soc_inst|m0_1|u_logic|Xphwx4~0_combout & (((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # (!\soc_inst|m0_1|u_logic|Pcyvx4~combout )) # (\soc_inst|m0_1|u_logic|Aok2z4~q
+// ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Xphwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Rmhwx4~4_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Rmhwx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~5 .lut_mask = 64'h00000000FD00FD00;
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y7_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuhwx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fuhwx4~4_combout = ( !\soc_inst|m0_1|u_logic|Fjewx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q & (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fuhwx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~4 .lut_mask = 64'h000A000A00000000;
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y4_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K0iwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K0iwx4~0_combout = ( \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q ) # ((!\soc_inst|m0_1|u_logic|Swy2z4~q & !\soc_inst|m0_1|u_logic|Dj6wx4~0_combout
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q ) # ((!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) #
+// (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q & (!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout &
+// \soc_inst|m0_1|u_logic|Qem2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout & (\soc_inst|m0_1|u_logic|Qem2z4~q &
+// ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|K0iwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K0iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K0iwx4~0 .lut_mask = 64'h0C080808FCF8F8F8;
+defparam \soc_inst|m0_1|u_logic|K0iwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y4_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K0iwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K0iwx4~1_combout = ( \soc_inst|m0_1|u_logic|K0iwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|G27wx4~1_combout & \soc_inst|m0_1|u_logic|U2x2z4~q )) ) ) # (
+// !\soc_inst|m0_1|u_logic|K0iwx4~0_combout & ( \soc_inst|m0_1|u_logic|U2x2z4~q ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|G27wx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|K0iwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|K0iwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K0iwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K0iwx4~1 .lut_mask = 64'h00FF00FF000C000C;
+defparam \soc_inst|m0_1|u_logic|K0iwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y4_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuhwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fuhwx4~1_combout = ( \soc_inst|m0_1|u_logic|Dvy2z4~q & ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q & ((!\soc_inst|m0_1|u_logic|Zoy2z4~q & (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Zoy2z4~q & (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~q & ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & (
+// !\soc_inst|m0_1|u_logic|Pty2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fuhwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~1 .lut_mask = 64'hCCCC048400000000;
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y4_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuhwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fuhwx4~2_combout = ( \soc_inst|m0_1|u_logic|Swy2z4~q & ( \soc_inst|m0_1|u_logic|Qem2z4~q & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) ) ) # ( \soc_inst|m0_1|u_logic|Swy2z4~q & ( !\soc_inst|m0_1|u_logic|Qem2z4~q & (
+// (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Uijwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pty2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~q & ( !\soc_inst|m0_1|u_logic|Qem2z4~q & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q &
+// ((!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Uijwx4~0_combout & !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Pty2z4~q & (((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Uijwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fuhwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~2 .lut_mask = 64'hFB88F300000000FF;
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y4_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuhwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fuhwx4~3_combout = ( !\soc_inst|m0_1|u_logic|Fuhwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Fuhwx4~2_combout & ( (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Fuhwx4~0_combout &
+// !\soc_inst|m0_1|u_logic|K0iwx4~1_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|K0iwx4~1_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Fuhwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fuhwx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fuhwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~3 .lut_mask = 64'h1010000000000000;
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y7_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuhwx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fuhwx4~5_combout = ( \soc_inst|m0_1|u_logic|Hvhwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Fuhwx4~3_combout & (((\soc_inst|m0_1|u_logic|Xx2wx4~combout ) # (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )) #
+// (\soc_inst|m0_1|u_logic|Fuhwx4~4_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Hvhwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Fuhwx4~3_combout & ((\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Fuhwx4~4_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fuhwx4~4_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Fuhwx4~3_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Hvhwx4~0_combout ),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fuhwx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~5 .lut_mask = 64'h707070F0707070F0;
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y7_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sjhwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sjhwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Sgj2z4~q & ( (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Nsk2z4~q & (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ))) ) ) # ( \soc_inst|m0_1|u_logic|Sgj2z4~q
+// & ( (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((((!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Fjewx4~1_combout )) # (\soc_inst|m0_1|u_logic|Aok2z4~q )) # (\soc_inst|m0_1|u_logic|Nsk2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+ .datag(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sjhwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sjhwx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Sjhwx4~0 .lut_mask = 64'hBABAFFFFBABAFFBF;
+defparam \soc_inst|m0_1|u_logic|Sjhwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y7_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tghwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tghwx4~0_combout = ( \soc_inst|m0_1|u_logic|Nsk2z4~q & ( \soc_inst|m0_1|u_logic|Ju5wx4~combout ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q & ( (\soc_inst|m0_1|u_logic|Ju5wx4~combout & (!\soc_inst|m0_1|u_logic|Sgj2z4~q &
+// ((\soc_inst|m0_1|u_logic|Y6t2z4~q ) # (\soc_inst|m0_1|u_logic|Fij2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Tghwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tghwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tghwx4~0 .lut_mask = 64'h1300130033333333;
+defparam \soc_inst|m0_1|u_logic|Tghwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y7_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fghwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fghwx4~combout = ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Ncqvx4~0_combout & (!\soc_inst|m0_1|u_logic|Emewx4~0_combout & \soc_inst|m0_1|u_logic|B73wx4~combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Emewx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fghwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fghwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fghwx4 .lut_mask = 64'h0000000000300030;
+defparam \soc_inst|m0_1|u_logic|Fghwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y4_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ejhwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ejhwx4~combout = ( !\soc_inst|m0_1|u_logic|Rngwx4~combout & ( \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Fij2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ejhwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ejhwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ejhwx4 .lut_mask = 64'h0000000055000000;
+defparam \soc_inst|m0_1|u_logic|Ejhwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y8_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndhwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ndhwx4~0_combout = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q & (\soc_inst|m0_1|u_logic|Fij2z4~q & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # (\soc_inst|m0_1|u_logic|Y6t2z4~q )))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q & (\soc_inst|m0_1|u_logic|Fij2z4~q & !\soc_inst|m0_1|u_logic|Ark2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ndhwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~0 .lut_mask = 64'h2020202020222022;
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y4_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndhwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ndhwx4~1_combout = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|I0hwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ndhwx4~0_combout & ((\soc_inst|m0_1|u_logic|Aok2z4~q ) # (\soc_inst|m0_1|u_logic|Ark2z4~q
+// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|I0hwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ndhwx4~0_combout & ((\soc_inst|m0_1|u_logic|Aok2z4~q ) # (\soc_inst|m0_1|u_logic|Ark2z4~q ))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|I0hwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ndhwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|I0hwx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Ndhwx4~0_combout & (((!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Aok2z4~q )) # (\soc_inst|m0_1|u_logic|Ark2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ndhwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ndhwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~1 .lut_mask = 64'hF700FF0077007700;
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y4_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndhwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ndhwx4~2_combout = ( !\soc_inst|m0_1|u_logic|Ejhwx4~combout & ( \soc_inst|m0_1|u_logic|Ndhwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) #
+// (!\soc_inst|m0_1|u_logic|O9qvx4~0_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Ejhwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ndhwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ndhwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~2 .lut_mask = 64'h00000000FEFE0000;
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y7_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndhwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ndhwx4~3_combout = ( \soc_inst|m0_1|u_logic|Xx2wx4~combout & ( \soc_inst|m0_1|u_logic|Ndhwx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Tghwx4~0_combout & (!\soc_inst|m0_1|u_logic|Fghwx4~combout &
+// !\soc_inst|m0_1|u_logic|Ahhwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xx2wx4~combout & ( \soc_inst|m0_1|u_logic|Ndhwx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Tghwx4~0_combout & !\soc_inst|m0_1|u_logic|Fghwx4~combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tghwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Fghwx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ahhwx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ndhwx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ndhwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~3 .lut_mask = 64'h0000000088888080;
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y7_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndhwx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ndhwx4~4_combout = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Ndhwx4~3_combout ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Ndhwx4~3_combout & (
+// (\soc_inst|m0_1|u_logic|Sjhwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ) # (\soc_inst|m0_1|u_logic|O5t2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sjhwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ndhwx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ndhwx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~4 .lut_mask = 64'h000000003131FFFF;
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y7_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndhwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ndhwx4~combout = ( \soc_inst|m0_1|u_logic|Ndhwx4~4_combout & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & (((!\soc_inst|m0_1|u_logic|Rmhwx4~5_combout ) # (\soc_inst|m0_1|u_logic|Fuhwx4~5_combout )) #
+// (\soc_inst|m0_1|u_logic|Hohwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Ndhwx4~4_combout )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Hohwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rmhwx4~5_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fuhwx4~5_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ndhwx4~4_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ndhwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ndhwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ndhwx4 .lut_mask = 64'hFFFFFFFFC4CCC4CC;
+defparam \soc_inst|m0_1|u_logic|Ndhwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y7_N5
+dffeas \soc_inst|m0_1|u_logic|Fij2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Ndhwx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fij2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fij2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y5_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B1vvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|B1vvx4~0_combout = (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Fij2z4~q )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B1vvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B1vvx4~0 .lut_mask = 64'h0FFF0FFF0FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|B1vvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y5_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hprot_o~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hprot_o~0_combout = ( \soc_inst|m0_1|u_logic|Ark2z4~q & ( (\soc_inst|m0_1|u_logic|B1vvx4~0_combout & (!\soc_inst|m0_1|u_logic|Ry5wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Aok2z4~q ) # (\soc_inst|m0_1|u_logic|O5t2z4~q )))) ) ) #
+// ( !\soc_inst|m0_1|u_logic|Ark2z4~q & ( (!\soc_inst|m0_1|u_logic|Ry5wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Aok2z4~q ) # (\soc_inst|m0_1|u_logic|O5t2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ry5wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|hprot_o~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hprot_o~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hprot_o~0 .lut_mask = 64'hF050F05030103010;
+defparam \soc_inst|m0_1|u_logic|hprot_o~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y6_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrsvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mrsvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Mn3wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Emi2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Mn3wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mrsvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~0 .lut_mask = 64'hFFF0FFF000000000;
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y8_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C4d2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C4d2z4~0_combout = ( \soc_inst|m0_1|u_logic|X77wx4~combout & ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q & \soc_inst|m0_1|u_logic|Emi2z4~q ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|C4d2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C4d2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C4d2z4~0 .lut_mask = 64'h0000000000000303;
+defparam \soc_inst|m0_1|u_logic|C4d2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y8_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3d2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O3d2z4~0_combout = ( !\soc_inst|m0_1|u_logic|Ffj2z4~q & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q & (\soc_inst|m0_1|u_logic|Nsk2z4~q & !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|O3d2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O3d2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O3d2z4~0 .lut_mask = 64'h0A000A0000000000;
+defparam \soc_inst|m0_1|u_logic|O3d2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y8_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrsvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mrsvx4~1_combout = ( \soc_inst|m0_1|u_logic|O76wx4~combout & ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|O3d2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Npk2z4~q & ((\soc_inst|m0_1|u_logic|Nsk2z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Npk2z4~q & (\soc_inst|m0_1|u_logic|Qaqvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|O76wx4~combout & ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|O3d2z4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # (\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|O76wx4~combout & ( !\soc_inst|m0_1|u_logic|A0zvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|O3d2z4~0_combout &
+// ((\soc_inst|m0_1|u_logic|Nsk2z4~q ) # (\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|O76wx4~combout & ( !\soc_inst|m0_1|u_logic|A0zvx4~0_combout & ( !\soc_inst|m0_1|u_logic|O3d2z4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|O3d2z4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mrsvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~1 .lut_mask = 64'hCCCC44CC8C8C048C;
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y6_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G6d2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G6d2z4~0_combout = ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Pkxvx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G6d2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G6d2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G6d2z4~0 .lut_mask = 64'h0000000000F000F0;
+defparam \soc_inst|m0_1|u_logic|G6d2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y8_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5d2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z5d2z4~0_combout = ( \soc_inst|m0_1|u_logic|Npk2z4~q & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q & (\soc_inst|m0_1|u_logic|Fij2z4~q & !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z5d2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z5d2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z5d2z4~0 .lut_mask = 64'h0000000020202020;
+defparam \soc_inst|m0_1|u_logic|Z5d2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y8_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L5d2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|L5d2z4~0_combout = ( \soc_inst|m0_1|u_logic|Nsk2z4~q & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q & (\soc_inst|m0_1|u_logic|Aok2z4~q & !\soc_inst|m0_1|u_logic|Ark2z4~q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|L5d2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L5d2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L5d2z4~0 .lut_mask = 64'h000000000C000C00;
+defparam \soc_inst|m0_1|u_logic|L5d2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y8_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P7d2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P7d2z4~0_combout = ( !\soc_inst|m0_1|u_logic|Nsk2z4~q & ( \soc_inst|m0_1|u_logic|Fij2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|P7d2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P7d2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P7d2z4~0 .lut_mask = 64'h0F0F0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|P7d2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y8_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L7fwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|L7fwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Ffj2z4~q & ( (\soc_inst|m0_1|u_logic|O5t2z4~q & !\soc_inst|m0_1|u_logic|Tki2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|L7fwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L7fwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L7fwx4~0 .lut_mask = 64'h4444444400000000;
+defparam \soc_inst|m0_1|u_logic|L7fwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y8_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrsvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mrsvx4~2_combout = ( \soc_inst|m0_1|u_logic|Socwx4~0_combout & ( \soc_inst|m0_1|u_logic|L7fwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Z5d2z4~0_combout & (!\soc_inst|m0_1|u_logic|L5d2z4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|P7d2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ju5wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Socwx4~0_combout & ( \soc_inst|m0_1|u_logic|L7fwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Z5d2z4~0_combout &
+// !\soc_inst|m0_1|u_logic|L5d2z4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Socwx4~0_combout & ( !\soc_inst|m0_1|u_logic|L7fwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|L5d2z4~0_combout & ((!\soc_inst|m0_1|u_logic|P7d2z4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Ju5wx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Socwx4~0_combout & ( !\soc_inst|m0_1|u_logic|L7fwx4~0_combout & ( !\soc_inst|m0_1|u_logic|L5d2z4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Z5d2z4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|L5d2z4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|P7d2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|L7fwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mrsvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~2 .lut_mask = 64'hCCCCCCC088888880;
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y8_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aekwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Aekwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Nsk2z4~q & ( (!\soc_inst|m0_1|u_logic|Y6t2z4~q & \soc_inst|m0_1|u_logic|Ju5wx4~combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Aekwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Aekwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aekwx4~0 .lut_mask = 64'h00F000F000000000;
+defparam \soc_inst|m0_1|u_logic|Aekwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y8_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrsvx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mrsvx4~3_combout = ( \soc_inst|m0_1|u_logic|Mrsvx4~2_combout & ( \soc_inst|m0_1|u_logic|Aekwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q & (!\soc_inst|m0_1|u_logic|C4d2z4~0_combout &
+// (\soc_inst|m0_1|u_logic|Mrsvx4~1_combout & !\soc_inst|m0_1|u_logic|G6d2z4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mrsvx4~2_combout & ( !\soc_inst|m0_1|u_logic|Aekwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|C4d2z4~0_combout &
+// (\soc_inst|m0_1|u_logic|Mrsvx4~1_combout & !\soc_inst|m0_1|u_logic|G6d2z4~0_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|C4d2z4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Mrsvx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|G6d2z4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Mrsvx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Aekwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mrsvx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~3 .lut_mask = 64'h00000C0000000800;
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y5_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrsvx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout = ( \soc_inst|m0_1|u_logic|Mrsvx4~3_combout & ( \soc_inst|m0_1|u_logic|Ark2z4~q & ( (\soc_inst|m0_1|u_logic|hprot_o~0_combout & (\soc_inst|m0_1|u_logic|Mrsvx4~0_combout &
+// !\soc_inst|m0_1|u_logic|R8d2z4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Mrsvx4~3_combout & ( !\soc_inst|m0_1|u_logic|Ark2z4~q & ( (\soc_inst|m0_1|u_logic|hprot_o~0_combout & (\soc_inst|m0_1|u_logic|Mrsvx4~0_combout &
+// ((!\soc_inst|m0_1|u_logic|R8d2z4~0_combout ) # (\soc_inst|m0_1|u_logic|Fjewx4~1_combout )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|hprot_o~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Mrsvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|R8d2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Mrsvx4~3_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~4 .lut_mask = 64'h0000101100001010;
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y5_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|haddr_o~0_combout = ( \soc_inst|m0_1|u_logic|Add3~1_sumout & ( \soc_inst|m0_1|u_logic|Add5~77_sumout & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout & (!\soc_inst|m0_1|u_logic|K1wvx4~combout &
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|A67wx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~1_sumout & ( \soc_inst|m0_1|u_logic|Add5~77_sumout & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout &
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|A67wx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~1_sumout & ( !\soc_inst|m0_1|u_logic|Add5~77_sumout & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout &
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|A67wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~1_sumout & ( !\soc_inst|m0_1|u_logic|Add5~77_sumout & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) #
+// (\soc_inst|m0_1|u_logic|A67wx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|A67wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Add3~1_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~77_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|haddr_o~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|haddr_o~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|haddr_o~0 .lut_mask = 64'hCFCF8A8ACF008A00;
+defparam \soc_inst|m0_1|u_logic|haddr_o~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y5_N51
+cyclonev_lcell_comb \soc_inst|interconnect_1|LessThan0~0 (
+// Equation(s):
+// \soc_inst|interconnect_1|LessThan0~0_combout = ( \soc_inst|m0_1|u_logic|haddr_o~0_combout & ( !\soc_inst|m0_1|u_logic|haddr_o~1_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|haddr_o~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|LessThan0~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|LessThan0~0 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|LessThan0~0 .lut_mask = 64'h00000000F0F0F0F0;
+defparam \soc_inst|interconnect_1|LessThan0~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X18_Y5_N34
+dffeas \soc_inst|interconnect_1|mux_sel[0] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|interconnect_1|LessThan0~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|interconnect_1|mux_sel [0]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|mux_sel[0] .is_wysiwyg = "true";
+defparam \soc_inst|interconnect_1|mux_sel[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y9_N3
+cyclonev_lcell_comb \soc_inst|interconnect_1|Equal1~0 (
+// Equation(s):
+// \soc_inst|interconnect_1|Equal1~0_combout = ( !\soc_inst|interconnect_1|mux_sel [2] & ( \soc_inst|interconnect_1|mux_sel [1] & ( !\soc_inst|interconnect_1|mux_sel [0] ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|interconnect_1|mux_sel [0]),
+ .datad(gnd),
+ .datae(!\soc_inst|interconnect_1|mux_sel [2]),
+ .dataf(!\soc_inst|interconnect_1|mux_sel [1]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|Equal1~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|Equal1~0 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|Equal1~0 .lut_mask = 64'h00000000F0F00000;
+defparam \soc_inst|interconnect_1|Equal1~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y7_N14
+dffeas \soc_inst|switches_1|switch_store[1][8] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\SW[8]~input_o ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|switches_1|always0~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|switches_1|switch_store[1][8]~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[1][8] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[1][8] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y7_N12
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[24]~31 (
+// Equation(s):
+// \soc_inst|interconnect_1|HRDATA[24]~31_combout = ( \soc_inst|interconnect_1|HRDATA[24]~17_combout & ( (!\soc_inst|interconnect_1|Equal1~0_combout & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24 )) #
+// (\soc_inst|interconnect_1|Equal1~0_combout & ((\soc_inst|switches_1|switch_store[1][8]~q ))) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
+ .datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24 ),
+ .datad(!\soc_inst|switches_1|switch_store[1][8]~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[24]~17_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HRDATA[24]~31_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[24]~31 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[24]~31 .lut_mask = 64'h000000000C3F0C3F;
+defparam \soc_inst|interconnect_1|HRDATA[24]~31 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y6_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mohvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mohvx4~0_combout = ( \soc_inst|interconnect_1|HRDATA[24]~31_combout & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) ) # ( !\soc_inst|interconnect_1|HRDATA[24]~31_combout )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[24]~31_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mohvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mohvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mohvx4~0 .lut_mask = 64'hFFFFFFFFFF00FF00;
+defparam \soc_inst|m0_1|u_logic|Mohvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y6_N14
+dffeas \soc_inst|m0_1|u_logic|Gqw2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Mohvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Gqw2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gqw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gqw2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y6_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V5nvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|V5nvx4~1_combout = ( \soc_inst|m0_1|u_logic|Wfovx4~combout & ( (!\soc_inst|m0_1|u_logic|K6y2z4~q ) # ((!\soc_inst|m0_1|u_logic|Gqw2z4~q & \soc_inst|m0_1|u_logic|Pfovx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Wfovx4~combout
+// & ( (!\soc_inst|m0_1|u_logic|Gqw2z4~q & \soc_inst|m0_1|u_logic|Pfovx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Gqw2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|K6y2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|V5nvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V5nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V5nvx4~1 .lut_mask = 64'h00CC00CCF0FCF0FC;
+defparam \soc_inst|m0_1|u_logic|V5nvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y7_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V5nvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|V5nvx4~0_combout = ( \soc_inst|m0_1|u_logic|Bsy2z4~q & ( (\soc_inst|m0_1|u_logic|Vapvx4~combout & \soc_inst|interconnect_1|HRDATA[8]~33_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Bsy2z4~q & (
+// (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) # ((\soc_inst|m0_1|u_logic|Vapvx4~combout & \soc_inst|interconnect_1|HRDATA[8]~33_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+ .datad(!\soc_inst|interconnect_1|HRDATA[8]~33_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|V5nvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V5nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V5nvx4~0 .lut_mask = 64'hAAAFAAAF000F000F;
+defparam \soc_inst|m0_1|u_logic|V5nvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y7_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V5nvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|V5nvx4~2_combout = ( !\soc_inst|m0_1|u_logic|V5nvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|V5nvx4~1_combout & ((!\soc_inst|interconnect_1|HRDATA[24]~31_combout ) # (!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ))) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|interconnect_1|HRDATA[24]~31_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|V5nvx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|V5nvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|V5nvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V5nvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V5nvx4~2 .lut_mask = 64'hF0C0F0C000000000;
+defparam \soc_inst|m0_1|u_logic|V5nvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y7_N25
+dffeas \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|V5nvx4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y5_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fkkwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fkkwx4~0_combout = ( \soc_inst|m0_1|u_logic|Wpkwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|G27wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) #
+// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Wpkwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wpkwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fkkwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fkkwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fkkwx4~0 .lut_mask = 64'hFFF0FFF044404440;
+defparam \soc_inst|m0_1|u_logic|Fkkwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y5_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fkkwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fkkwx4~1_combout = ( \soc_inst|m0_1|u_logic|Gokwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Fkkwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Gokwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Fkkwx4~0_combout & !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fkkwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Gokwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fkkwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fkkwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fkkwx4~1 .lut_mask = 64'hAA00AA00AB00AB00;
+defparam \soc_inst|m0_1|u_logic|Fkkwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y5_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pikwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pikwx4~0_combout = ( \soc_inst|m0_1|u_logic|Wdxvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Sgj2z4~q & (\soc_inst|m0_1|u_logic|O76wx4~combout ))) #
+// (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & (((\soc_inst|m0_1|u_logic|Sgj2z4~q & \soc_inst|m0_1|u_logic|O76wx4~combout )) # (\soc_inst|m0_1|u_logic|M66wx4~combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pikwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pikwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pikwx4~0 .lut_mask = 64'h0000000003570357;
+defparam \soc_inst|m0_1|u_logic|Pikwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y3_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Askwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Askwx4~1_combout = ( !\soc_inst|m0_1|u_logic|Dvy2z4~q & ( ((!\soc_inst|m0_1|u_logic|Pty2z4~q & ((!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Pty2z4~q
+// & (((!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ))))) # (\soc_inst|m0_1|u_logic|Px5wx4~combout ) ) ) # ( \soc_inst|m0_1|u_logic|Dvy2z4~q & ( ((!\soc_inst|m0_1|u_logic|Pty2z4~q &
+// (((\soc_inst|m0_1|u_logic|Zoy2z4~q & \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Px5wx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Px5wx4~combout ),
+ .datag(!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Askwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Askwx4~1 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Askwx4~1 .lut_mask = 64'hBBFC444CFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Askwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y4_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mkkwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mkkwx4~2_combout = ( !\soc_inst|m0_1|u_logic|Emewx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q & (!\soc_inst|m0_1|u_logic|Fjewx4~1_combout & \soc_inst|m0_1|u_logic|Jppvx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Emewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mkkwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mkkwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mkkwx4~2 .lut_mask = 64'h00A000A000000000;
+defparam \soc_inst|m0_1|u_logic|Mkkwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y5_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mkkwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mkkwx4~1_combout = ( !\soc_inst|m0_1|u_logic|Fjewx4~1_combout & ( (\soc_inst|m0_1|u_logic|Jp3wx4~combout & (\soc_inst|m0_1|u_logic|Qp3wx4~0_combout & !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Qp3wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mkkwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mkkwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mkkwx4~1 .lut_mask = 64'h0500000005000000;
+defparam \soc_inst|m0_1|u_logic|Mkkwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y4_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lgkwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lgkwx4~0_combout = ( \soc_inst|m0_1|u_logic|Pcyvx4~combout & ( \soc_inst|m0_1|u_logic|B73wx4~combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lgkwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lgkwx4~0 .lut_mask = 64'h000000000000FFFF;
+defparam \soc_inst|m0_1|u_logic|Lgkwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y4_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Unewx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Unewx4~0_combout = ( \soc_inst|m0_1|u_logic|Dj6wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Vskwx4~0_combout & (((!\soc_inst|m0_1|u_logic|M4fwx4~0_combout & \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q )) #
+// (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Dj6wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Vskwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Vskwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Unewx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Unewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Unewx4~0 .lut_mask = 64'h03030303030B030B;
+defparam \soc_inst|m0_1|u_logic|Unewx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y4_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Unewx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Unewx4~combout = ( !\soc_inst|m0_1|u_logic|Unewx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Ffj2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Unewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Unewx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Unewx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Unewx4 .lut_mask = 64'hFF3FFF3F00000000;
+defparam \soc_inst|m0_1|u_logic|Unewx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y4_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T6kwx4~7_combout = ( !\soc_inst|m0_1|u_logic|Mkkwx4~1_combout & ( \soc_inst|m0_1|u_logic|Unewx4~combout & ( ((!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Mkkwx4~2_combout )) #
+// (\soc_inst|m0_1|u_logic|Fij2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Mkkwx4~2_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Mkkwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Unewx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|T6kwx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T6kwx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~7 .lut_mask = 64'h00000000FDFD0000;
+defparam \soc_inst|m0_1|u_logic|T6kwx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y3_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Askwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Askwx4~0_combout = ( \soc_inst|m0_1|u_logic|V1yvx4~0_combout & ( \soc_inst|m0_1|u_logic|P0hwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Swy2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|V1yvx4~0_combout & (
+// \soc_inst|m0_1|u_logic|P0hwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q & (\soc_inst|m0_1|u_logic|Xhxvx4~combout & \soc_inst|m0_1|u_logic|G27wx4~2_combout )) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Xhxvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|G27wx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Askwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Askwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Askwx4~0 .lut_mask = 64'h00000000000CCCCC;
+defparam \soc_inst|m0_1|u_logic|Askwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y3_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~8 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T6kwx4~8_combout = ( \soc_inst|m0_1|u_logic|Askwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Pikwx4~0_combout & (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Askwx4~1_combout &
+// \soc_inst|m0_1|u_logic|T6kwx4~7_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Askwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Pikwx4~0_combout & (\soc_inst|m0_1|u_logic|T6kwx4~7_combout & ((\soc_inst|m0_1|u_logic|Askwx4~1_combout ) #
+// (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pikwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Askwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|T6kwx4~7_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Askwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|T6kwx4~8_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T6kwx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~8 .lut_mask = 64'h002A002A00080008;
+defparam \soc_inst|m0_1|u_logic|T6kwx4~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y4_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q8kwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q8kwx4~0_combout = ( \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Xly2z4~q ) # (\soc_inst|m0_1|u_logic|Zoy2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q8kwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q8kwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q8kwx4~0 .lut_mask = 64'h0000000007070707;
+defparam \soc_inst|m0_1|u_logic|Q8kwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y4_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T6kwx4~4_combout = ( \soc_inst|m0_1|u_logic|Bhewx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Q8kwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Egkwx4~0_combout &
+// !\soc_inst|m0_1|u_logic|Lgkwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Bhewx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Egkwx4~0_combout & !\soc_inst|m0_1|u_logic|Lgkwx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Q8kwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Bhewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|T6kwx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T6kwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~4 .lut_mask = 64'hECECECECEC00EC00;
+defparam \soc_inst|m0_1|u_logic|T6kwx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y5_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mkkwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mkkwx4~0_combout = ( \soc_inst|m0_1|u_logic|G97wx4~0_combout & ( (\soc_inst|m0_1|u_logic|O76wx4~combout & ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # ((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout & \soc_inst|m0_1|u_logic|Sgj2z4~q )))) )
+// ) # ( !\soc_inst|m0_1|u_logic|G97wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout & (\soc_inst|m0_1|u_logic|O76wx4~combout & \soc_inst|m0_1|u_logic|Sgj2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mkkwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mkkwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mkkwx4~0 .lut_mask = 64'h000A0C0E000A0C0E;
+defparam \soc_inst|m0_1|u_logic|Mkkwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y3_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hekwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hekwx4~0_combout = ( \soc_inst|m0_1|u_logic|Nkpvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Qem2z4~q ) ) # ( !\soc_inst|m0_1|u_logic|Nkpvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Tki2z4~q & (!\soc_inst|m0_1|u_logic|Qem2z4~q &
+// \soc_inst|m0_1|u_logic|My6wx4~1_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|My6wx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hekwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hekwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hekwx4~0 .lut_mask = 64'h00500050F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Hekwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y6_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T6kwx4~2_combout = ( \soc_inst|m0_1|u_logic|Keiwx4~0_combout & ( \soc_inst|m0_1|u_logic|Uv6wx4~combout & ( (!\soc_inst|m0_1|u_logic|Howvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Keiwx4~0_combout & ( \soc_inst|m0_1|u_logic|Uv6wx4~combout ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Keiwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Uv6wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|T6kwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T6kwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~2 .lut_mask = 64'h00000000FFFFFCFF;
+defparam \soc_inst|m0_1|u_logic|T6kwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y5_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T6kwx4~3_combout = ( \soc_inst|m0_1|u_logic|T6kwx4~2_combout & ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) ) # ( \soc_inst|m0_1|u_logic|T6kwx4~2_combout & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & (
+// ((!\soc_inst|m0_1|u_logic|Hekwx4~0_combout ) # (\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|U2x2z4~q ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Hekwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|T6kwx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|T6kwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T6kwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~3 .lut_mask = 64'h0000FF3F0000FFFF;
+defparam \soc_inst|m0_1|u_logic|T6kwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y4_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bbkwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bbkwx4~0_combout = ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|My6wx4~0_combout & (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Qem2z4~q )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|My6wx4~0_combout & (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Qem2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|My6wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bbkwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bbkwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bbkwx4~0 .lut_mask = 64'hF4F0F4F044004400;
+defparam \soc_inst|m0_1|u_logic|Bbkwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y4_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T6kwx4~1_combout = ( \soc_inst|m0_1|u_logic|H5fwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Iikwx4~0_combout & (((!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout & \soc_inst|m0_1|u_logic|Bbkwx4~0_combout )))) #
+// (\soc_inst|m0_1|u_logic|Iikwx4~0_combout & (((!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout & \soc_inst|m0_1|u_logic|Bbkwx4~0_combout )) # (\soc_inst|m0_1|u_logic|C2yvx4~combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|H5fwx4~0_combout & (
+// (\soc_inst|m0_1|u_logic|Iikwx4~0_combout & \soc_inst|m0_1|u_logic|C2yvx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Iikwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Bbkwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|T6kwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T6kwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~1 .lut_mask = 64'h1111111111F111F1;
+defparam \soc_inst|m0_1|u_logic|T6kwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y5_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T6kwx4~5_combout = ( !\soc_inst|m0_1|u_logic|T6kwx4~1_combout & ( (\soc_inst|m0_1|u_logic|T6kwx4~4_combout & (\soc_inst|m0_1|u_logic|T6kwx4~3_combout & ((!\soc_inst|m0_1|u_logic|Mkkwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Fjewx4~1_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|T6kwx4~4_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Mkkwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|T6kwx4~3_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|T6kwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|T6kwx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T6kwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~5 .lut_mask = 64'h0031003100000000;
+defparam \soc_inst|m0_1|u_logic|T6kwx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y4_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T6kwx4~0_combout = ( \soc_inst|m0_1|u_logic|Ark2z4~q & ( (!\soc_inst|m0_1|u_logic|X8kwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Ark2z4~q & ( !\soc_inst|m0_1|u_logic|X8kwx4~0_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|X8kwx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|T6kwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T6kwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~0 .lut_mask = 64'hAAAAAAAAAAA0AAA0;
+defparam \soc_inst|m0_1|u_logic|T6kwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y5_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T6kwx4~6_combout = ( \soc_inst|m0_1|u_logic|Aekwx4~0_combout & ( (\soc_inst|m0_1|u_logic|V76wx4~1_combout & (!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout & (\soc_inst|m0_1|u_logic|T6kwx4~5_combout &
+// \soc_inst|m0_1|u_logic|T6kwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Aekwx4~0_combout & ( (\soc_inst|m0_1|u_logic|V76wx4~1_combout & (\soc_inst|m0_1|u_logic|T6kwx4~5_combout & \soc_inst|m0_1|u_logic|T6kwx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|V76wx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|T6kwx4~5_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|T6kwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Aekwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|T6kwx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T6kwx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~6 .lut_mask = 64'h0005000500040004;
+defparam \soc_inst|m0_1|u_logic|T6kwx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y7_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ruhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ruhvx4~0_combout = ( \soc_inst|m0_1|u_logic|T6kwx4~6_combout & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & (\soc_inst|interconnect_1|HREADY~0_combout & ((!\soc_inst|m0_1|u_logic|T6kwx4~8_combout ) #
+// (\soc_inst|m0_1|u_logic|Fkkwx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & (((!\soc_inst|m0_1|u_logic|T6kwx4~8_combout ) # (\soc_inst|m0_1|u_logic|Fkkwx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|T6kwx4~6_combout & (
+// (\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Fkkwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|T6kwx4~8_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|T6kwx4~6_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ruhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ruhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ruhvx4~0 .lut_mask = 64'h7777777777077707;
+defparam \soc_inst|m0_1|u_logic|Ruhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X33_Y7_N20
+dffeas \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Ruhvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y7_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M9pvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|M9pvx4~0_combout = ( \soc_inst|m0_1|u_logic|Npk2z4~q & ( ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Aok2z4~q )) # (\soc_inst|m0_1|u_logic|Tki2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M9pvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M9pvx4~0 .lut_mask = 64'hFFFFFFFF0FAF0FAF;
+defparam \soc_inst|m0_1|u_logic|M9pvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xdfwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xdfwx4~combout = ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xdfwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xdfwx4 .lut_mask = 64'hFFFF000000000000;
+defparam \soc_inst|m0_1|u_logic|Xdfwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y12_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Thhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Thhvx4~0_combout = ( \soc_inst|m0_1|u_logic|Jux2z4~q & ( \soc_inst|m0_1|u_logic|Add2~9_sumout & ( (\soc_inst|m0_1|u_logic|S5pvx4~combout & !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jux2z4~q &
+// ( \soc_inst|m0_1|u_logic|Add2~9_sumout & ( (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) # (\soc_inst|m0_1|u_logic|S5pvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jux2z4~q & ( !\soc_inst|m0_1|u_logic|Add2~9_sumout & (
+// \soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Jux2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add2~9_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Thhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Thhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Thhvx4~0 .lut_mask = 64'h0F0F00005F5F5050;
+defparam \soc_inst|m0_1|u_logic|Thhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y9_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Thhvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Thhvx4~1_combout = ( !\soc_inst|m0_1|u_logic|Thhvx4~0_combout & ( \soc_inst|m0_1|u_logic|Add5~85_sumout & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout & !\soc_inst|m0_1|u_logic|Lefwx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Thhvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Add5~85_sumout & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Thhvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~85_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Thhvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Thhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Thhvx4~1 .lut_mask = 64'hF0F00000A0A00000;
+defparam \soc_inst|m0_1|u_logic|Thhvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y9_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Thhvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Thhvx4~2_combout = ( \soc_inst|m0_1|u_logic|R7iwx4~1_combout & ( \soc_inst|m0_1|u_logic|Wzpvx4~1_combout & ( (\soc_inst|m0_1|u_logic|Thhvx4~1_combout & !\soc_inst|m0_1|u_logic|H4nwx4~combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|R7iwx4~1_combout & ( \soc_inst|m0_1|u_logic|Wzpvx4~1_combout & ( \soc_inst|m0_1|u_logic|Thhvx4~1_combout ) ) ) # ( \soc_inst|m0_1|u_logic|R7iwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Wzpvx4~1_combout & (
+// (\soc_inst|m0_1|u_logic|Thhvx4~1_combout & !\soc_inst|m0_1|u_logic|H4nwx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|R7iwx4~1_combout & ( !\soc_inst|m0_1|u_logic|Wzpvx4~1_combout & ( (\soc_inst|m0_1|u_logic|Thhvx4~1_combout &
+// !\soc_inst|m0_1|u_logic|H4nwx4~combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Thhvx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wzpvx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Thhvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Thhvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Thhvx4~2 .lut_mask = 64'h3030303033333030;
+defparam \soc_inst|m0_1|u_logic|Thhvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X35_Y9_N37
+dffeas \soc_inst|m0_1|u_logic|Jux2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Thhvx4~2_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Jux2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jux2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jux2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Msyvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Msyvx4~combout = ( !\soc_inst|m0_1|u_logic|Rryvx4~0_combout & ( !\soc_inst|m0_1|u_logic|J0l2z4~q & ( (!\soc_inst|m0_1|u_logic|Jux2z4~q & (!\soc_inst|m0_1|u_logic|Omk2z4~q & (\soc_inst|m0_1|u_logic|Pet2z4~q &
+// !\soc_inst|m0_1|u_logic|Vvx2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Jux2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Omk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Pet2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Vvx2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Rryvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|J0l2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Msyvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Msyvx4 .lut_mask = 64'h0800000000000000;
+defparam \soc_inst|m0_1|u_logic|Msyvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y7_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hvhwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hvhwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Msyvx4~combout & ( !\soc_inst|m0_1|u_logic|Aok2z4~q ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Hvhwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hvhwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hvhwx4~0 .lut_mask = 64'hAAAAAAAA00000000;
+defparam \soc_inst|m0_1|u_logic|Hvhwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y3_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ubjwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ubjwx4~0_combout = ( \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|U2x2z4~q & ( (\soc_inst|m0_1|u_logic|Tki2z4~q & (\soc_inst|m0_1|u_logic|Dvy2z4~q & !\soc_inst|m0_1|u_logic|Swy2z4~q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|U2x2z4~q & ( (\soc_inst|m0_1|u_logic|Tki2z4~q & (((\soc_inst|m0_1|u_logic|Dvy2z4~q & !\soc_inst|m0_1|u_logic|Swy2z4~q )) # (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ubjwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ubjwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ubjwx4~0 .lut_mask = 64'h1311030000000000;
+defparam \soc_inst|m0_1|u_logic|Ubjwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y3_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ubjwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ubjwx4~1_combout = ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|G27wx4~1_combout & ( (\soc_inst|m0_1|u_logic|Icyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ubjwx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|G27wx4~1_combout & ( \soc_inst|m0_1|u_logic|Ubjwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ubjwx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|G27wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ubjwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ubjwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ubjwx4~1 .lut_mask = 64'h555500005F5F0000;
+defparam \soc_inst|m0_1|u_logic|Ubjwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y6_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S3jwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S3jwx4~0_combout = ( \soc_inst|m0_1|u_logic|Npk2z4~q & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q & (\soc_inst|m0_1|u_logic|Emi2z4~q & ((\soc_inst|m0_1|u_logic|Ffj2z4~q ) # (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|S3jwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S3jwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S3jwx4~0 .lut_mask = 64'h00000000004C004C;
+defparam \soc_inst|m0_1|u_logic|S3jwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y6_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X2jwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|X2jwx4~0_combout = ( \soc_inst|m0_1|u_logic|S3jwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Z7fwx4~0_combout & (((\soc_inst|m0_1|u_logic|Ptgwx4~0_combout & !\soc_inst|m0_1|u_logic|Msyvx4~combout )) #
+// (\soc_inst|m0_1|u_logic|Fjewx4~1_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|S3jwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Z7fwx4~0_combout & (\soc_inst|m0_1|u_logic|Ptgwx4~0_combout & !\soc_inst|m0_1|u_logic|Msyvx4~combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|S3jwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|X2jwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X2jwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X2jwx4~0 .lut_mask = 64'h0500050015111511;
+defparam \soc_inst|m0_1|u_logic|X2jwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y3_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ehjwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ehjwx4~0_combout = ( \soc_inst|m0_1|u_logic|Zoy2z4~q & ( (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Zoy2z4~q & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ehjwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ehjwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ehjwx4~0 .lut_mask = 64'h0AFA0AFA05000500;
+defparam \soc_inst|m0_1|u_logic|Ehjwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y3_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ofjwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ofjwx4~0_combout = ( \soc_inst|m0_1|u_logic|Dvy2z4~q & ( (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Tki2z4~q & ((!\soc_inst|m0_1|u_logic|Qem2z4~q ) # (\soc_inst|m0_1|u_logic|Swy2z4~q )))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Dvy2z4~q & ( (\soc_inst|m0_1|u_logic|Tki2z4~q & ((!\soc_inst|m0_1|u_logic|Qem2z4~q & ((\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Qem2z4~q & (\soc_inst|m0_1|u_logic|Swy2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ofjwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ofjwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ofjwx4~0 .lut_mask = 64'h0305030503010301;
+defparam \soc_inst|m0_1|u_logic|Ofjwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y3_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lhjwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lhjwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Dj6wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Tki2z4~q & (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lhjwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lhjwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lhjwx4~0 .lut_mask = 64'h0050005000000000;
+defparam \soc_inst|m0_1|u_logic|Lhjwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y3_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ofjwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ofjwx4~1_combout = ( \soc_inst|m0_1|u_logic|Lhjwx4~0_combout & ( \soc_inst|m0_1|u_logic|U2x2z4~q ) ) # ( !\soc_inst|m0_1|u_logic|Lhjwx4~0_combout & ( (\soc_inst|m0_1|u_logic|U2x2z4~q & (((\soc_inst|m0_1|u_logic|Nkpvx4~0_combout
+// & !\soc_inst|m0_1|u_logic|Ehjwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Ofjwx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ehjwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ofjwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Lhjwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ofjwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ofjwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ofjwx4~1 .lut_mask = 64'h1033103333333333;
+defparam \soc_inst|m0_1|u_logic|Ofjwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y3_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lwiwx4~6_combout = ( !\soc_inst|m0_1|u_logic|Ofjwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Ubjwx4~1_combout & (!\soc_inst|m0_1|u_logic|X2jwx4~0_combout & ((!\soc_inst|m0_1|u_logic|Hvhwx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|A0zvx4~0_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Hvhwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ubjwx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|X2jwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ofjwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lwiwx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~6 .lut_mask = 64'hC800C80000000000;
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y8_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q2jwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q2jwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Npk2z4~q & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q ) # ((((\soc_inst|m0_1|u_logic|Tki2z4~q ) # (\soc_inst|m0_1|u_logic|Fjewx4~1_combout )) # (\soc_inst|m0_1|u_logic|Ax0xx4~0_combout ))) ) )
+// # ( \soc_inst|m0_1|u_logic|Npk2z4~q & ( ((((\soc_inst|m0_1|u_logic|Tki2z4~q ) # (\soc_inst|m0_1|u_logic|Fjewx4~1_combout )) # (\soc_inst|m0_1|u_logic|Zzb2z4~0_combout )) # (\soc_inst|m0_1|u_logic|Ffj2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datag(!\soc_inst|m0_1|u_logic|Ax0xx4~0_combout ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q2jwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q2jwx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Q2jwx4~0 .lut_mask = 64'hAFFF3FFFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Q2jwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y6_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iyiwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Iyiwx4~0_combout = ( \soc_inst|m0_1|u_logic|Swy2z4~q & ( (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Nqy2z4~q ) # (\soc_inst|m0_1|u_logic|Zoy2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~q & (
+// (!\soc_inst|m0_1|u_logic|Zoy2z4~q & (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Nqy2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Iyiwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Iyiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Iyiwx4~0 .lut_mask = 64'h0A000A000F050F05;
+defparam \soc_inst|m0_1|u_logic|Iyiwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y6_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iyiwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Iyiwx4~1_combout = ( !\soc_inst|m0_1|u_logic|Dj6wx4~0_combout & ( \soc_inst|m0_1|u_logic|Iyiwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q & !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Dj6wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Iyiwx4~0_combout & ( (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dj6wx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Iyiwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|U2x2z4~q ) # (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Iyiwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Iyiwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Iyiwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Iyiwx4~1 .lut_mask = 64'hD0D05050C0C00000;
+defparam \soc_inst|m0_1|u_logic|Iyiwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y6_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lwiwx4~0_combout = ( \soc_inst|m0_1|u_logic|Emewx4~0_combout & ( \soc_inst|m0_1|u_logic|Ahwvx4~0_combout & ( ((\soc_inst|m0_1|u_logic|Ncqvx4~0_combout & \soc_inst|m0_1|u_logic|A0zvx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|Iyiwx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Emewx4~0_combout & ( \soc_inst|m0_1|u_logic|Ahwvx4~0_combout & ( \soc_inst|m0_1|u_logic|Iyiwx4~1_combout ) ) ) # ( \soc_inst|m0_1|u_logic|Emewx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Ahwvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Ncqvx4~0_combout & \soc_inst|m0_1|u_logic|A0zvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Iyiwx4~1_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Emewx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lwiwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~0 .lut_mask = 64'h0000000F5555555F;
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y8_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lwiwx4~1_combout = ( \soc_inst|m0_1|u_logic|Ju5wx4~combout & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q & ((!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ))) #
+// (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Ju5wx4~combout & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q & (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|Zzfwx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lwiwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~1 .lut_mask = 64'h0030003002320232;
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y7_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eajwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eajwx4~0_combout = ( \soc_inst|m0_1|u_logic|Aok2z4~q & ( (\soc_inst|m0_1|u_logic|Npk2z4~q & \soc_inst|m0_1|u_logic|O9qvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~q & ( (\soc_inst|m0_1|u_logic|Npk2z4~q &
+// \soc_inst|m0_1|u_logic|Sgj2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Eajwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eajwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eajwx4~0 .lut_mask = 64'h1111111105050505;
+defparam \soc_inst|m0_1|u_logic|Eajwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y7_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q9jwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q9jwx4~0_combout = ( \soc_inst|m0_1|u_logic|Eajwx4~0_combout & ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout & ( \soc_inst|m0_1|u_logic|Pcyvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Eajwx4~0_combout & (
+// \soc_inst|m0_1|u_logic|Bxcwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Pcyvx4~combout & !\soc_inst|m0_1|u_logic|Ark2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Eajwx4~0_combout & ( !\soc_inst|m0_1|u_logic|Bxcwx4~0_combout & (
+// \soc_inst|m0_1|u_logic|Pcyvx4~combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Eajwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q9jwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q9jwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q9jwx4~0 .lut_mask = 64'h0000555550505555;
+defparam \soc_inst|m0_1|u_logic|Q9jwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y6_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lwiwx4~2_combout = ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout & ( \soc_inst|m0_1|u_logic|Howvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q & ((\soc_inst|m0_1|u_logic|O5t2z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Sgj2z4~q & (\soc_inst|m0_1|u_logic|Aok2z4~q )))) # (\soc_inst|m0_1|u_logic|Npk2z4~q & ((!\soc_inst|m0_1|u_logic|Aok2z4~q ) # ((\soc_inst|m0_1|u_logic|O5t2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|A0zvx4~0_combout & (
+// \soc_inst|m0_1|u_logic|Howvx4~0_combout & ( (\soc_inst|m0_1|u_logic|O5t2z4~q & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # (\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Howvx4~0_combout &
+// ( (!\soc_inst|m0_1|u_logic|Aok2z4~q & (\soc_inst|m0_1|u_logic|Npk2z4~q )) # (\soc_inst|m0_1|u_logic|Aok2z4~q & (!\soc_inst|m0_1|u_logic|Npk2z4~q & \soc_inst|m0_1|u_logic|Sgj2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lwiwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~2 .lut_mask = 64'h0000262600F326F7;
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y6_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lwiwx4~3_combout = ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout & ( \soc_inst|m0_1|u_logic|Swy2z4~q & ( (\soc_inst|m0_1|u_logic|U2x2z4~q & !\soc_inst|m0_1|u_logic|Lwiwx4~2_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Icyvx4~0_combout & ( \soc_inst|m0_1|u_logic|Swy2z4~q & ( !\soc_inst|m0_1|u_logic|Lwiwx4~2_combout ) ) ) # ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Swy2z4~q & (
+// (!\soc_inst|m0_1|u_logic|Lwiwx4~2_combout & ((!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ) # (\soc_inst|m0_1|u_logic|U2x2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Icyvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Swy2z4~q & (
+// (!\soc_inst|m0_1|u_logic|Lwiwx4~2_combout & ((!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ) # (\soc_inst|m0_1|u_logic|U2x2z4~q ))) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lwiwx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lwiwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~3 .lut_mask = 64'hF300F300FF003300;
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y6_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lwiwx4~4_combout = ( !\soc_inst|m0_1|u_logic|Q9jwx4~0_combout & ( \soc_inst|m0_1|u_logic|Lwiwx4~3_combout & ( (\soc_inst|m0_1|u_logic|Q2jwx4~0_combout & (!\soc_inst|m0_1|u_logic|Lwiwx4~0_combout &
+// !\soc_inst|m0_1|u_logic|Lwiwx4~1_combout )) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Q2jwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Lwiwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lwiwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Q9jwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Lwiwx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lwiwx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~4 .lut_mask = 64'h0000000030000000;
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y8_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T7jwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T7jwx4~combout = ( \soc_inst|m0_1|u_logic|Ucqvx4~combout & ( \soc_inst|m0_1|u_logic|Orewx4~0_combout & ( (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|G9w2z4~q ) #
+// (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|G9w2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|T7jwx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T7jwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T7jwx4 .lut_mask = 64'h0000000000005055;
+defparam \soc_inst|m0_1|u_logic|T7jwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y4_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6jwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R6jwx4~0_combout = ( \soc_inst|m0_1|u_logic|Emi2z4~q & ( \soc_inst|m0_1|u_logic|Hdh2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q & (!\soc_inst|m0_1|u_logic|Ffj2z4~q & \soc_inst|m0_1|u_logic|Aok2z4~q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Emi2z4~q & ( \soc_inst|m0_1|u_logic|Hdh2z4~0_combout & ( (\soc_inst|m0_1|u_logic|Aok2z4~q & ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # (\soc_inst|m0_1|u_logic|Ffj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Emi2z4~q & (
+// !\soc_inst|m0_1|u_logic|Hdh2z4~0_combout & ( (\soc_inst|m0_1|u_logic|Ffj2z4~q & \soc_inst|m0_1|u_logic|Aok2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|R6jwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R6jwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R6jwx4~0 .lut_mask = 64'h030300000B0B0808;
+defparam \soc_inst|m0_1|u_logic|R6jwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y6_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6fwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q6fwx4~0_combout = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Oowvx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Oowvx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Oowvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q6fwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q6fwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q6fwx4~0 .lut_mask = 64'hFAFAFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Q6fwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y6_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6fwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q6fwx4~1_combout = ( !\soc_inst|m0_1|u_logic|Mkrwx4~combout & ( \soc_inst|m0_1|u_logic|Q6fwx4~0_combout & ( (\soc_inst|interconnect_1|HREADY~0_combout & ((!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ) #
+// ((!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|O5t2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Mkrwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Q6fwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q6fwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q6fwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q6fwx4~1 .lut_mask = 64'h0000000055540000;
+defparam \soc_inst|m0_1|u_logic|Q6fwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y6_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lwiwx4~5_combout = ( \soc_inst|m0_1|u_logic|R6jwx4~0_combout & ( \soc_inst|m0_1|u_logic|Q6fwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Lwiwx4~4_combout & (!\soc_inst|m0_1|u_logic|T7jwx4~combout &
+// \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|R6jwx4~0_combout & ( \soc_inst|m0_1|u_logic|Q6fwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Lwiwx4~4_combout & !\soc_inst|m0_1|u_logic|T7jwx4~combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lwiwx4~4_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|T7jwx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|R6jwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Q6fwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lwiwx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~5 .lut_mask = 64'h0000000044440404;
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y4_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pyiwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pyiwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Dvy2z4~q & ((!\soc_inst|m0_1|u_logic|Zoy2z4~q ) # (!\soc_inst|m0_1|u_logic|Xly2z4~q )))) )
+// )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pyiwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pyiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pyiwx4~0 .lut_mask = 64'h0C080C0800000000;
+defparam \soc_inst|m0_1|u_logic|Pyiwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y3_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pyiwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pyiwx4~1_combout = ( \soc_inst|m0_1|u_logic|Nkpvx4~0_combout & ( \soc_inst|m0_1|u_logic|Qsewx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|Nkpvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Qsewx4~0_combout &
+// (!\soc_inst|m0_1|u_logic|Pyiwx4~0_combout & \soc_inst|m0_1|u_logic|Wvewx4~0_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Pyiwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pyiwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pyiwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pyiwx4~1 .lut_mask = 64'h0030003033333333;
+defparam \soc_inst|m0_1|u_logic|Pyiwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y6_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fvhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fvhvx4~0_combout = ( \soc_inst|m0_1|u_logic|Pyiwx4~1_combout & ( (\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Pyiwx4~1_combout & (
+// (!\soc_inst|m0_1|u_logic|Npk2z4~q & (\soc_inst|interconnect_1|HREADY~0_combout & ((!\soc_inst|m0_1|u_logic|Lwiwx4~6_combout ) # (!\soc_inst|m0_1|u_logic|Lwiwx4~5_combout )))) # (\soc_inst|m0_1|u_logic|Npk2z4~q &
+// ((!\soc_inst|m0_1|u_logic|Lwiwx4~6_combout ) # ((!\soc_inst|m0_1|u_logic|Lwiwx4~5_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Lwiwx4~6_combout ),
+ .datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lwiwx4~5_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pyiwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fvhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fvhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fvhvx4~0 .lut_mask = 64'h5F4C5F4C5F5F5F5F;
+defparam \soc_inst|m0_1|u_logic|Fvhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y7_N47
+dffeas \soc_inst|m0_1|u_logic|Npk2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fvhvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Npk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Npk2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y3_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y8pvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y8pvx4~0_combout = ( \soc_inst|m0_1|u_logic|Sgj2z4~q & ( !\soc_inst|m0_1|u_logic|Xkfwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Howvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q &
+// ( !\soc_inst|m0_1|u_logic|Xkfwx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Xkfwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y8pvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y8pvx4~0 .lut_mask = 64'hFFFFF3F300000000;
+defparam \soc_inst|m0_1|u_logic|Y8pvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y7_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ipsvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ipsvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout & ( !\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ipsvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ipsvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ipsvx4~0 .lut_mask = 64'hF0F0F0F000000000;
+defparam \soc_inst|m0_1|u_logic|Ipsvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y5_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Scpvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Scpvx4~1_combout = ( !\soc_inst|m0_1|u_logic|Hxx2z4~q & ( (\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|B8c2z4~0_combout & \soc_inst|m0_1|u_logic|Bpsvx4~0_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Scpvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Scpvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Scpvx4~1 .lut_mask = 64'h0003000300000000;
+defparam \soc_inst|m0_1|u_logic|Scpvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y5_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Scpvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Scpvx4~2_combout = ( \soc_inst|m0_1|u_logic|Scpvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Z5pvx4~4_combout & ( (!\soc_inst|m0_1|u_logic|Ipsvx4~0_combout & (((\soc_inst|interconnect_1|HREADY~0_combout &
+// \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Scpvx4~1_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ipsvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Scpvx4~1_combout ),
+ .datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Scpvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Scpvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Scpvx4~2 .lut_mask = 64'h0000222A00000000;
+defparam \soc_inst|m0_1|u_logic|Scpvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y5_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wfovx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wfovx4~combout = ( \soc_inst|m0_1|u_logic|Jhy2z4~q & ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Jhy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wfovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wfovx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Wfovx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y4_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jvqvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jvqvx4~0_combout = ( \soc_inst|m0_1|u_logic|Abovx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Hxx2z4~q & (!\soc_inst|m0_1|u_logic|Nbm2z4~q & \soc_inst|m0_1|u_logic|B8c2z4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jvqvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jvqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jvqvx4~0 .lut_mask = 64'h0000000000A000A0;
+defparam \soc_inst|m0_1|u_logic|Jvqvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y4_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jnrvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jnrvx4~0_combout = ( \soc_inst|m0_1|u_logic|Jvqvx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Wfovx4~combout & \soc_inst|m0_1|u_logic|Jhy2z4~q )) # (\soc_inst|m0_1|u_logic|Xnrvx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Xnrvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Jhy2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Jnrvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jnrvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jnrvx4~0 .lut_mask = 64'h000000000FCF0FCF;
+defparam \soc_inst|m0_1|u_logic|Jnrvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X33_Y4_N28
+dffeas \soc_inst|m0_1|u_logic|Jhy2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Jnrvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Jhy2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jhy2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jhy2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y5_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pfovx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pfovx4~0_combout = ( \soc_inst|m0_1|u_logic|B8c2z4~0_combout & ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Vaw2z4~q & (((!\soc_inst|m0_1|u_logic|Jhy2z4~q & !\soc_inst|m0_1|u_logic|Fcj2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Hxx2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8c2z4~0_combout & ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout & ( !\soc_inst|m0_1|u_logic|Vaw2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Jhy2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Vaw2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pfovx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pfovx4~0 .lut_mask = 64'h00000000FF008F00;
+defparam \soc_inst|m0_1|u_logic|Pfovx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y7_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ynhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ynhvx4~0_combout = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 & ( \soc_inst|interconnect_1|HRDATA[29]~0_combout & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) ) ) # (
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 & ( \soc_inst|interconnect_1|HRDATA[29]~0_combout ) ) # ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 & ( !\soc_inst|interconnect_1|HRDATA[29]~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) # (\soc_inst|interconnect_1|HRDATA[25]~1_combout ) ) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 & ( !\soc_inst|interconnect_1|HRDATA[29]~0_combout & (
+// (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) # (\soc_inst|interconnect_1|HRDATA[25]~1_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 ),
+ .dataf(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ynhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ynhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ynhvx4~0 .lut_mask = 64'hAFAFAFAFFFFFAAAA;
+defparam \soc_inst|m0_1|u_logic|Ynhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X27_Y7_N52
+dffeas \soc_inst|m0_1|u_logic|Itw2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Ynhvx4~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Itw2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Itw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Itw2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y9_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcsvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dcsvx4~0_combout = ( \soc_inst|m0_1|u_logic|Qbpvx4~0_combout & ( (!\soc_inst|interconnect_1|HRDATA[29]~0_combout & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[29]~0_combout &
+// ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 ))) ) )
+
+ .dataa(!\soc_inst|interconnect_1|HRDATA[29]~0_combout ),
+ .datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+ .datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dcsvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dcsvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dcsvx4~0 .lut_mask = 64'h000000008D8D8D8D;
+defparam \soc_inst|m0_1|u_logic|Dcsvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y9_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H5nvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H5nvx4~0_combout = ( \soc_inst|m0_1|u_logic|Dvy2z4~q & ( (!\soc_inst|m0_1|u_logic|Dcsvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Vapvx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[10]~12_combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Dvy2z4~q & ( (\soc_inst|m0_1|u_logic|Scpvx4~2_combout & (!\soc_inst|m0_1|u_logic|Dcsvx4~0_combout & ((!\soc_inst|m0_1|u_logic|Vapvx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[10]~12_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Dcsvx4~0_combout ),
+ .datad(!\soc_inst|interconnect_1|HRDATA[10]~12_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H5nvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H5nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H5nvx4~0 .lut_mask = 64'h30203020F0A0F0A0;
+defparam \soc_inst|m0_1|u_logic|H5nvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y9_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H5nvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H5nvx4~1_combout = ( \soc_inst|m0_1|u_logic|H5nvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Pfovx4~0_combout & ((!\soc_inst|m0_1|u_logic|Wfovx4~combout ) # ((\soc_inst|m0_1|u_logic|M9y2z4~q )))) #
+// (\soc_inst|m0_1|u_logic|Pfovx4~0_combout & (\soc_inst|m0_1|u_logic|Itw2z4~q & ((!\soc_inst|m0_1|u_logic|Wfovx4~combout ) # (\soc_inst|m0_1|u_logic|M9y2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Itw2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|M9y2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|H5nvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H5nvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H5nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H5nvx4~1 .lut_mask = 64'h000000008CAF8CAF;
+defparam \soc_inst|m0_1|u_logic|H5nvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X30_Y9_N25
+dffeas \soc_inst|m0_1|u_logic|Dvy2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|H5nvx4~1_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dvy2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dvy2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y6_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G27wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G27wx4~0_combout = ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Dvy2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G27wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G27wx4~0 .lut_mask = 64'h00FF00FFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|G27wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y5_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Blwvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Blwvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Swy2z4~q & ( !\soc_inst|m0_1|u_logic|G27wx4~0_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Blwvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Blwvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Blwvx4~0 .lut_mask = 64'hAAAAAAAA00000000;
+defparam \soc_inst|m0_1|u_logic|Blwvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y3_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pw6wx4~0_combout = ( \soc_inst|m0_1|u_logic|Rngwx4~combout & ( \soc_inst|m0_1|u_logic|Wdxvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Tki2z4~q & (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|P0hwx4~1_combout
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rngwx4~combout & ( \soc_inst|m0_1|u_logic|Wdxvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q & (\soc_inst|m0_1|u_logic|Aok2z4~q )) # (\soc_inst|m0_1|u_logic|Tki2z4~q &
+// (((\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|P0hwx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rngwx4~combout & ( !\soc_inst|m0_1|u_logic|Wdxvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Tki2z4~q &
+// (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|P0hwx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rngwx4~combout & ( !\soc_inst|m0_1|u_logic|Wdxvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Tki2z4~q &
+// (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|P0hwx4~1_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pw6wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~0 .lut_mask = 64'h0005000522270005;
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y5_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pw6wx4~1_combout = ( !\soc_inst|m0_1|u_logic|Pw6wx4~0_combout & ( \soc_inst|m0_1|u_logic|Ark2z4~q ) ) # ( !\soc_inst|m0_1|u_logic|Pw6wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Ark2z4~q & (
+// (!\soc_inst|m0_1|u_logic|A76wx4~0_combout & ((!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ) # (\soc_inst|m0_1|u_logic|O5t2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|A76wx4~0_combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Pw6wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pw6wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~1 .lut_mask = 64'h88CC0000FFFF0000;
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y8_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H3ivx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H3ivx4~2_combout = ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ucqvx4~combout ) # (!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H3ivx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H3ivx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H3ivx4~2 .lut_mask = 64'hFFFCFFFC00000000;
+defparam \soc_inst|m0_1|u_logic|H3ivx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y10_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H3ivx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H3ivx4~3_combout = ( \soc_inst|m0_1|u_logic|Cr0xx4~0_combout & ( \soc_inst|m0_1|u_logic|H3ivx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # (\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Cr0xx4~0_combout & ( \soc_inst|m0_1|u_logic|H3ivx4~2_combout ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Cr0xx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|H3ivx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H3ivx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H3ivx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H3ivx4~3 .lut_mask = 64'h00000000FFFFF3F3;
+defparam \soc_inst|m0_1|u_logic|H3ivx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y4_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ws3wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ws3wx4~0_combout = ( \soc_inst|m0_1|u_logic|Yplwx4~0_combout & ( \soc_inst|m0_1|u_logic|Zzb2z4~0_combout & ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) ) # ( \soc_inst|m0_1|u_logic|Yplwx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Zzb2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Ffj2z4~q & \soc_inst|m0_1|u_logic|Jppvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yplwx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Zzb2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~q & \soc_inst|m0_1|u_logic|Jppvx4~0_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Yplwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ws3wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ws3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ws3wx4~0 .lut_mask = 64'h0C0CAEAE0000AAAA;
+defparam \soc_inst|m0_1|u_logic|Ws3wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y8_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H3ivx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H3ivx4~0_combout = ( \soc_inst|m0_1|u_logic|Xx2wx4~combout & ( (\soc_inst|m0_1|u_logic|Fij2z4~q & (\soc_inst|m0_1|u_logic|Q77wx4~0_combout & !\soc_inst|m0_1|u_logic|Ps3wx4~0_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Q77wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H3ivx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H3ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H3ivx4~0 .lut_mask = 64'h0000000003000300;
+defparam \soc_inst|m0_1|u_logic|H3ivx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y10_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Av3wx4~0_combout = ( \soc_inst|m0_1|u_logic|Owgvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ywi2z4~q ) # ((\soc_inst|m0_1|u_logic|Imvvx4~0_combout & !\soc_inst|m0_1|u_logic|Wbk2z4~q )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Owgvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Imvvx4~0_combout & !\soc_inst|m0_1|u_logic|Wbk2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Ywi2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Imvvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wbk2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Owgvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Av3wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Av3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~0 .lut_mask = 64'h0F000F00CFCCCFCC;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y9_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Av3wx4~2_combout = ( \soc_inst|m0_1|u_logic|Gzhvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Wuq2z4~q ) # ((\soc_inst|m0_1|u_logic|Ynvvx4~combout & !\soc_inst|m0_1|u_logic|Hzj2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Gzhvx4~0_combout
+// & ( (\soc_inst|m0_1|u_logic|Ynvvx4~combout & !\soc_inst|m0_1|u_logic|Hzj2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Wuq2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ynvvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Hzj2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Gzhvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Av3wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Av3wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~2 .lut_mask = 64'h0F000F00CFCCCFCC;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y9_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Av3wx4~3_combout = ( \soc_inst|m0_1|u_logic|Uzhvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Ble3z4~q & (!\soc_inst|m0_1|u_logic|Av3wx4~2_combout & ((!\soc_inst|m0_1|u_logic|B0ivx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ipn2z4~q ))))
+// ) ) # ( !\soc_inst|m0_1|u_logic|Uzhvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Av3wx4~2_combout & ((!\soc_inst|m0_1|u_logic|B0ivx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ipn2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ble3z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ipn2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Av3wx4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|B0ivx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Uzhvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Av3wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Av3wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~3 .lut_mask = 64'hF030F03050105010;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y10_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Av3wx4~4_combout = ( \soc_inst|m0_1|u_logic|Av3wx4~3_combout & ( \soc_inst|m0_1|u_logic|P0ivx4~0_combout & ( (\soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|I0ivx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Y9l2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Av3wx4~3_combout & ( !\soc_inst|m0_1|u_logic|P0ivx4~0_combout & ( (!\soc_inst|m0_1|u_logic|I0ivx4~0_combout ) # (\soc_inst|m0_1|u_logic|Y9l2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Y9l2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|I0ivx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Av3wx4~3_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|P0ivx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Av3wx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Av3wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~4 .lut_mask = 64'h0000F3F300005151;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y10_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Av3wx4~1_combout = ( \soc_inst|m0_1|u_logic|R1ivx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ipb3z4~q ) # ((\soc_inst|m0_1|u_logic|W0ivx4~0_combout & !\soc_inst|m0_1|u_logic|X0c3z4~q )) ) ) # (
+// !\soc_inst|m0_1|u_logic|R1ivx4~0_combout & ( (\soc_inst|m0_1|u_logic|W0ivx4~0_combout & !\soc_inst|m0_1|u_logic|X0c3z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ipb3z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|W0ivx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|X0c3z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|R1ivx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Av3wx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Av3wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~1 .lut_mask = 64'h0F000F00AFAAAFAA;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X29_Y13_N19
+dffeas \soc_inst|m0_1|u_logic|Vac3z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|M2ivx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Vac3z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vac3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vac3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Av3wx4~6_combout = ( \soc_inst|m0_1|u_logic|Y1ivx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Hub3z4~q ) # ((!\soc_inst|m0_1|u_logic|Vac3z4~q & \soc_inst|m0_1|u_logic|M2ivx4~0_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Y1ivx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Vac3z4~q & \soc_inst|m0_1|u_logic|M2ivx4~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Hub3z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Vac3z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|M2ivx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Y1ivx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Av3wx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Av3wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~6 .lut_mask = 64'h00F000F0CCFCCCFC;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y12_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Av3wx4~7_combout = ( \soc_inst|m0_1|u_logic|K1ivx4~0_combout & ( (!\soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|F4c3z4~q & \soc_inst|m0_1|u_logic|D1ivx4~0_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|K1ivx4~0_combout & ( (!\soc_inst|m0_1|u_logic|F4c3z4~q & \soc_inst|m0_1|u_logic|D1ivx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|F4c3z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|D1ivx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|K1ivx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Av3wx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Av3wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~7 .lut_mask = 64'h00AA00AAF0FAF0FA;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y12_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~8 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Av3wx4~8_combout = ( \soc_inst|m0_1|u_logic|Syhvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Av3wx4~6_combout & (\soc_inst|m0_1|u_logic|Lul2z4~q & !\soc_inst|m0_1|u_logic|Av3wx4~7_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Syhvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Av3wx4~6_combout & !\soc_inst|m0_1|u_logic|Av3wx4~7_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Av3wx4~6_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Lul2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Av3wx4~7_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Syhvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Av3wx4~8_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Av3wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~8 .lut_mask = 64'hAA00AA000A000A00;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y12_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Av3wx4~5_combout = ( \soc_inst|m0_1|u_logic|T2ivx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Gxk2z4~q ) # ((!\soc_inst|m0_1|u_logic|Pxb3z4~q & \soc_inst|m0_1|u_logic|F2ivx4~0_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|T2ivx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Pxb3z4~q & \soc_inst|m0_1|u_logic|F2ivx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pxb3z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Gxk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|F2ivx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|T2ivx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Av3wx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Av3wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~5 .lut_mask = 64'h00AA00AAF0FAF0FA;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~9 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Av3wx4~9_combout = ( !\soc_inst|m0_1|u_logic|Av3wx4~5_combout & ( (\soc_inst|m0_1|u_logic|Av3wx4~8_combout & ((!\soc_inst|m0_1|u_logic|Nzhvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Oar2z4~q ))) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Oar2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Nzhvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Av3wx4~8_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Av3wx4~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Av3wx4~9_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Av3wx4~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~9 .lut_mask = 64'h00F300F300000000;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~9 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y10_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny3wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ny3wx4~3_combout = ( !\soc_inst|m0_1|u_logic|Ux4wx4~0_combout & ( (\soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout & (!\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout & (!\soc_inst|m0_1|u_logic|hwdata_o~18_combout &
+// !\soc_inst|m0_1|u_logic|hwdata_o~10_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|hwdata_o~18_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|hwdata_o~10_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ny3wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~3 .lut_mask = 64'h4000400000000000;
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y10_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny3wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ny3wx4~2_combout = ( \soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout & ( (\soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout & (\soc_inst|m0_1|u_logic|O24wx4~0_combout & (\soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout &
+// \soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|O24wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ny3wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~2 .lut_mask = 64'h0000000000010001;
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y10_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny3wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ny3wx4~4_combout = ( !\soc_inst|m0_1|u_logic|Sx3wx4~0_combout & ( \soc_inst|m0_1|u_logic|Ny3wx4~2_combout & ( (\soc_inst|m0_1|u_logic|Ny3wx4~3_combout & (!\soc_inst|m0_1|u_logic|hwdata_o~2_combout &
+// !\soc_inst|m0_1|u_logic|V4ovx4~0_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ny3wx4~3_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Sx3wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ny3wx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ny3wx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~4 .lut_mask = 64'h0000000050000000;
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y10_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny3wx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ny3wx4~5_combout = ( !\soc_inst|m0_1|u_logic|hwdata_o~12_combout & ( \soc_inst|m0_1|u_logic|Ny3wx4~4_combout & ( (!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # ((!\soc_inst|m0_1|u_logic|Ny3wx4~1_combout &
+// !\soc_inst|m0_1|u_logic|Ny3wx4~0_combout )) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Ny3wx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ny3wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|hwdata_o~12_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ny3wx4~4_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ny3wx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~5 .lut_mask = 64'h00000000FFC00000;
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y10_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~10 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Av3wx4~10_combout = ( \soc_inst|m0_1|u_logic|Av3wx4~9_combout & ( \soc_inst|m0_1|u_logic|Ny3wx4~5_combout & ( (!\soc_inst|m0_1|u_logic|Zyhvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rym2z4~q ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Av3wx4~9_combout & ( !\soc_inst|m0_1|u_logic|Ny3wx4~5_combout & ( (!\soc_inst|m0_1|u_logic|D9ovx4~combout & ((!\soc_inst|m0_1|u_logic|Zyhvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rym2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Rym2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Zyhvx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Av3wx4~9_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ny3wx4~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Av3wx4~10_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Av3wx4~10 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~10 .lut_mask = 64'h0000C4C40000F5F5;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~10 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y10_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~11 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Av3wx4~11_combout = ( !\soc_inst|m0_1|u_logic|Av3wx4~1_combout & ( \soc_inst|m0_1|u_logic|Av3wx4~10_combout & ( (\soc_inst|m0_1|u_logic|Av3wx4~4_combout & ((!\soc_inst|m0_1|u_logic|Zx3wx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Uyv2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Zx3wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Uyv2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Av3wx4~4_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Av3wx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Av3wx4~10_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Av3wx4~11_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Av3wx4~11 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~11 .lut_mask = 64'h000000000B0B0000;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~11 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y10_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H3ivx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H3ivx4~1_combout = ( \soc_inst|m0_1|u_logic|Av3wx4~0_combout & ( \soc_inst|m0_1|u_logic|Av3wx4~11_combout & ( \soc_inst|m0_1|u_logic|Adt2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Av3wx4~0_combout & (
+// \soc_inst|m0_1|u_logic|Av3wx4~11_combout & ( (!\soc_inst|m0_1|u_logic|Q5vvx4~1_combout & (!\soc_inst|m0_1|u_logic|U7w2z4~q & \soc_inst|m0_1|u_logic|Adt2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Av3wx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Av3wx4~11_combout & ( \soc_inst|m0_1|u_logic|Adt2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Av3wx4~0_combout & ( !\soc_inst|m0_1|u_logic|Av3wx4~11_combout & ( \soc_inst|m0_1|u_logic|Adt2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Q5vvx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|U7w2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Adt2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Av3wx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Av3wx4~11_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H3ivx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H3ivx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H3ivx4~1 .lut_mask = 64'h00FF00FF00C000FF;
+defparam \soc_inst|m0_1|u_logic|H3ivx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y10_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H3ivx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H3ivx4~4_combout = ( \soc_inst|m0_1|u_logic|H3ivx4~1_combout & ( ((!\soc_inst|m0_1|u_logic|H3ivx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Gji2z4~q )) # (\soc_inst|m0_1|u_logic|Ws3wx4~0_combout ) ) ) # (
+// !\soc_inst|m0_1|u_logic|H3ivx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Gji2z4~q & (!\soc_inst|m0_1|u_logic|H3ivx4~3_combout )) # (\soc_inst|m0_1|u_logic|Gji2z4~q & (((!\soc_inst|m0_1|u_logic|H3ivx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ws3wx4~0_combout
+// )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H3ivx4~3_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ws3wx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|H3ivx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Gji2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|H3ivx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|H3ivx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H3ivx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H3ivx4~4 .lut_mask = 64'hAAF3AAF3FFF3FFF3;
+defparam \soc_inst|m0_1|u_logic|H3ivx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y10_N44
+dffeas \soc_inst|m0_1|u_logic|Gji2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|H3ivx4~4_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Gji2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gji2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gji2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y4_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lfewx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lfewx4~combout = ( \soc_inst|m0_1|u_logic|Bhewx4~0_combout & ( ((!\soc_inst|m0_1|u_logic|Zoy2z4~q ) # (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Bhewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Lfewx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lfewx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lfewx4 .lut_mask = 64'h00000000FFF5FFF5;
+defparam \soc_inst|m0_1|u_logic|Lfewx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y4_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pw6wx4~2_combout = ( \soc_inst|m0_1|u_logic|My6wx4~1_combout & ( !\soc_inst|m0_1|u_logic|Lfewx4~combout & ( !\soc_inst|m0_1|u_logic|Vskwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|My6wx4~1_combout & (
+// !\soc_inst|m0_1|u_logic|Lfewx4~combout & ( (!\soc_inst|m0_1|u_logic|My6wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Vskwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|My6wx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Vskwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|My6wx4~1_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Lfewx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pw6wx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~2 .lut_mask = 64'hFFEFCCCC00000000;
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y4_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pw6wx4~3_combout = ( \soc_inst|m0_1|u_logic|Jppvx4~0_combout & ( \soc_inst|m0_1|u_logic|Pw6wx4~2_combout & ( (\soc_inst|m0_1|u_logic|Pw6wx4~1_combout & ((!\soc_inst|m0_1|u_logic|Gji2z4~q ) #
+// (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jppvx4~0_combout & ( \soc_inst|m0_1|u_logic|Pw6wx4~2_combout & ( \soc_inst|m0_1|u_logic|Pw6wx4~1_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Pw6wx4~1_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Gji2z4~q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Pw6wx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pw6wx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~3 .lut_mask = 64'h0000000033333131;
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y8_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fcewx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fcewx4~0_combout = ( \soc_inst|m0_1|u_logic|Npk2z4~q & ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~q & ((!\soc_inst|m0_1|u_logic|G9w2z4~q ) # ((!\soc_inst|m0_1|u_logic|Nsk2z4~q &
+// \soc_inst|m0_1|u_logic|Ark2z4~q )))) # (\soc_inst|m0_1|u_logic|Ffj2z4~q & (!\soc_inst|m0_1|u_logic|Nsk2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q & ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q &
+// (((!\soc_inst|m0_1|u_logic|Ffj2z4~q & !\soc_inst|m0_1|u_logic|G9w2z4~q )) # (\soc_inst|m0_1|u_logic|Ark2z4~q ))) # (\soc_inst|m0_1|u_logic|Nsk2z4~q & (!\soc_inst|m0_1|u_logic|Ffj2z4~q & (!\soc_inst|m0_1|u_logic|G9w2z4~q ))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Npk2z4~q & ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q & (((!\soc_inst|m0_1|u_logic|Ffj2z4~q & !\soc_inst|m0_1|u_logic|G9w2z4~q )) # (\soc_inst|m0_1|u_logic|Ark2z4~q ))) #
+// (\soc_inst|m0_1|u_logic|Nsk2z4~q & (!\soc_inst|m0_1|u_logic|Ffj2z4~q & (!\soc_inst|m0_1|u_logic|G9w2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q & ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q &
+// (((!\soc_inst|m0_1|u_logic|Ffj2z4~q & !\soc_inst|m0_1|u_logic|G9w2z4~q )) # (\soc_inst|m0_1|u_logic|Ark2z4~q ))) # (\soc_inst|m0_1|u_logic|Nsk2z4~q & (!\soc_inst|m0_1|u_logic|Ffj2z4~q & (!\soc_inst|m0_1|u_logic|G9w2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|G9w2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fcewx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fcewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fcewx4~0 .lut_mask = 64'hC0EAC0EAC0EAE2EA;
+defparam \soc_inst|m0_1|u_logic|Fcewx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y8_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fcewx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fcewx4~1_combout = ( \soc_inst|m0_1|u_logic|Npk2z4~q & ( !\soc_inst|m0_1|u_logic|Fcewx4~0_combout ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q & ( (!\soc_inst|m0_1|u_logic|Fcewx4~0_combout & ((!\soc_inst|m0_1|u_logic|O5t2z4~q ) #
+// ((!\soc_inst|m0_1|u_logic|Jeewx4~combout ) # (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Jeewx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fcewx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Fcewx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fcewx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fcewx4~1 .lut_mask = 64'hEF00FF00EF00FF00;
+defparam \soc_inst|m0_1|u_logic|Fcewx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y3_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sfewx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sfewx4~0_combout = ( \soc_inst|m0_1|u_logic|Dvy2z4~q & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Zoy2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sfewx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sfewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sfewx4~0 .lut_mask = 64'h00000000DDDDDDDD;
+defparam \soc_inst|m0_1|u_logic|Sfewx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y3_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sfewx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sfewx4~1_combout = ( !\soc_inst|m0_1|u_logic|Px5wx4~combout & ( ((!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q &
+// ((!\soc_inst|m0_1|u_logic|Ugewx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Sfewx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sfewx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Px5wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sfewx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sfewx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sfewx4~1 .lut_mask = 64'h5CFF5CFF00000000;
+defparam \soc_inst|m0_1|u_logic|Sfewx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y4_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pw6wx4~4_combout = ( !\soc_inst|m0_1|u_logic|Sfewx4~1_combout & ( (\soc_inst|m0_1|u_logic|Unewx4~combout & (\soc_inst|m0_1|u_logic|Pw6wx4~3_combout & ((!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ) #
+// (\soc_inst|m0_1|u_logic|Fcewx4~1_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Unewx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Pw6wx4~3_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Fcewx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Sfewx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pw6wx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~4 .lut_mask = 64'h1101110100000000;
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y4_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Akewx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Akewx4~1_combout = ( !\soc_inst|m0_1|u_logic|Ark2z4~q & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q ) # ((!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) # (((!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fij2z4~q )) #
+// (\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ))) ) ) # ( \soc_inst|m0_1|u_logic|Ark2z4~q & ( (!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) #
+// ((\soc_inst|m0_1|u_logic|Fij2z4~q ) # (\soc_inst|m0_1|u_logic|Emewx4~0_combout ))))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Emewx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+ .datag(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Akewx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Akewx4~1 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Akewx4~1 .lut_mask = 64'hFFFFFFFFEFFF2333;
+defparam \soc_inst|m0_1|u_logic|Akewx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y5_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yiewx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yiewx4~0_combout = ( \soc_inst|m0_1|u_logic|Npk2z4~q & ( \soc_inst|m0_1|u_logic|Akewx4~1_combout & ( (!\soc_inst|m0_1|u_logic|O76wx4~combout ) # (\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Npk2z4~q & ( \soc_inst|m0_1|u_logic|Akewx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout & ((!\soc_inst|m0_1|u_logic|O76wx4~combout ) # (\soc_inst|m0_1|u_logic|B1vvx4~0_combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Akewx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yiewx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yiewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yiewx4~0 .lut_mask = 64'h00000000CC44FF55;
+defparam \soc_inst|m0_1|u_logic|Yiewx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y4_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pw6wx4~5_combout = ( \soc_inst|m0_1|u_logic|Yiewx4~0_combout & ( (\soc_inst|m0_1|u_logic|Pw6wx4~4_combout & ((!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Itgwx4~0_combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Yiewx4~0_combout & ( (\soc_inst|m0_1|u_logic|Pw6wx4~4_combout & (\soc_inst|m0_1|u_logic|Fjewx4~1_combout & ((!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Itgwx4~0_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pw6wx4~4_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Itgwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Yiewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pw6wx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~5 .lut_mask = 64'h0045004545454545;
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y7_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vz6wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vz6wx4~combout = ( \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Xt6wx4~1_combout & ( (\soc_inst|m0_1|u_logic|P28wx4~combout & \soc_inst|m0_1|u_logic|Ad7wx4~0_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Xt6wx4~1_combout & ( (!\soc_inst|m0_1|u_logic|P28wx4~combout ) # (!\soc_inst|m0_1|u_logic|Ad7wx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & (
+// !\soc_inst|m0_1|u_logic|Xt6wx4~1_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|P28wx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ad7wx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Xt6wx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Vz6wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vz6wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vz6wx4 .lut_mask = 64'h0000FFFFFAFA0505;
+defparam \soc_inst|m0_1|u_logic|Vz6wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y7_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pw6wx4~combout = ( \soc_inst|m0_1|u_logic|Vz6wx4~combout & ( (!\soc_inst|m0_1|u_logic|Pw6wx4~5_combout ) # ((!\soc_inst|m0_1|u_logic|Blwvx4~0_combout & (\soc_inst|m0_1|u_logic|Wpkwx4~0_combout & !\soc_inst|m0_1|u_logic|A4t2z4~q
+// ))) ) ) # ( !\soc_inst|m0_1|u_logic|Vz6wx4~combout & ( !\soc_inst|m0_1|u_logic|Pw6wx4~5_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Blwvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Wpkwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Pw6wx4~5_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Vz6wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pw6wx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pw6wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pw6wx4 .lut_mask = 64'hFF00FF00FF20FF20;
+defparam \soc_inst|m0_1|u_logic|Pw6wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X35_Y7_N2
+dffeas \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Pw6wx4~combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y7_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pcyvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pcyvx4~combout = ( \soc_inst|m0_1|u_logic|Fij2z4~q & ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pcyvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pcyvx4 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Pcyvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y7_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duc2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Duc2z4~0_combout = ( !\soc_inst|m0_1|u_logic|Kfd2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Pcyvx4~combout ) # (((!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Qfdwx4~0_combout )) #
+// (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Kfd2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Duc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Duc2z4~0 .lut_mask = 64'hFFFBFFFB00000000;
+defparam \soc_inst|m0_1|u_logic|Duc2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y7_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y1d2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y1d2z4~0_combout = ( \soc_inst|m0_1|u_logic|O5t2z4~q & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q & (\soc_inst|m0_1|u_logic|Fij2z4~q & (!\soc_inst|m0_1|u_logic|Nsk2z4~q ))) # (\soc_inst|m0_1|u_logic|Sgj2z4~q &
+// (!\soc_inst|m0_1|u_logic|Fij2z4~q & ((\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~q & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q & (!\soc_inst|m0_1|u_logic|Fij2z4~q & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Y1d2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y1d2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y1d2z4~0 .lut_mask = 64'h0044004420642064;
+defparam \soc_inst|m0_1|u_logic|Y1d2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y7_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y1d2z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y1d2z4~1_combout = ( \soc_inst|m0_1|u_logic|Aok2z4~q & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q & (((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # (!\soc_inst|m0_1|u_logic|Npk2z4~q )))) # (\soc_inst|m0_1|u_logic|Ark2z4~q &
+// (!\soc_inst|m0_1|u_logic|Sgj2z4~q & ((!\soc_inst|m0_1|u_logic|Npk2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~q & ( (\soc_inst|m0_1|u_logic|Fij2z4~q & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) #
+// (\soc_inst|m0_1|u_logic|Npk2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Y1d2z4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y1d2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y1d2z4~1 .lut_mask = 64'h32333233FAC0FAC0;
+defparam \soc_inst|m0_1|u_logic|Y1d2z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y7_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y1d2z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y1d2z4~2_combout = ( \soc_inst|m0_1|u_logic|Y1d2z4~1_combout & ( (!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout & (!\soc_inst|m0_1|u_logic|Y1d2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # (!\soc_inst|m0_1|u_logic|Nsk2z4~q
+// )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Y1d2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Y1d2z4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Y1d2z4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y1d2z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y1d2z4~2 .lut_mask = 64'h00000000C080C080;
+defparam \soc_inst|m0_1|u_logic|Y1d2z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y5_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K1wvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K1wvx4~combout = ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout & ((!\soc_inst|m0_1|u_logic|Emi2z4~q ) # (!\soc_inst|m0_1|u_logic|Y1d2z4~2_combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout & ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Emi2z4~q ) # (!\soc_inst|m0_1|u_logic|Y1d2z4~2_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Y1d2z4~2_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K1wvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K1wvx4 .lut_mask = 64'hFE00FE00FC00FC00;
+defparam \soc_inst|m0_1|u_logic|K1wvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y5_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|haddr_o~1_combout = ( \soc_inst|m0_1|u_logic|Add3~5_sumout & ( \soc_inst|m0_1|u_logic|Add5~9_sumout & ( (((!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout & \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) #
+// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~5_sumout & ( \soc_inst|m0_1|u_logic|Add5~9_sumout & ( ((!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout &
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~5_sumout & ( !\soc_inst|m0_1|u_logic|Add5~9_sumout & ( ((!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout &
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~5_sumout & ( !\soc_inst|m0_1|u_logic|Add5~9_sumout & ( (!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout &
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Add3~5_sumout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Add5~9_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|haddr_o~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|haddr_o~1 .lut_mask = 64'h00F033F355F577F7;
+defparam \soc_inst|m0_1|u_logic|haddr_o~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y5_N42
+cyclonev_lcell_comb \soc_inst|interconnect_1|LessThan1~0 (
+// Equation(s):
+// \soc_inst|interconnect_1|LessThan1~0_combout = ( \soc_inst|m0_1|u_logic|haddr_o [29] & ( \soc_inst|m0_1|u_logic|haddr_o~0_combout & ( (\soc_inst|m0_1|u_logic|haddr_o~1_combout & !\soc_inst|m0_1|u_logic|V2qvx4~combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|haddr_o [29] & ( \soc_inst|m0_1|u_logic|haddr_o~0_combout & ( \soc_inst|m0_1|u_logic|haddr_o~1_combout ) ) ) # ( \soc_inst|m0_1|u_logic|haddr_o [29] & ( !\soc_inst|m0_1|u_logic|haddr_o~0_combout ) ) # (
+// !\soc_inst|m0_1|u_logic|haddr_o [29] & ( !\soc_inst|m0_1|u_logic|haddr_o~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|V2qvx4~combout ),
+ .datae(!\soc_inst|m0_1|u_logic|haddr_o [29]),
+ .dataf(!\soc_inst|m0_1|u_logic|haddr_o~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|LessThan1~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|LessThan1~0 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|LessThan1~0 .lut_mask = 64'hFFFFFFFF0F0F0F00;
+defparam \soc_inst|interconnect_1|LessThan1~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y5_N51
+cyclonev_lcell_comb \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0 (
+// Equation(s):
+// \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0_combout = ( \soc_inst|interconnect_1|LessThan0~0_combout & ( \soc_inst|interconnect_1|LessThan1~0_combout ) ) # ( !\soc_inst|interconnect_1|LessThan0~0_combout & (
+// !\soc_inst|interconnect_1|LessThan1~0_combout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|interconnect_1|LessThan1~0_combout ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|LessThan0~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HSEL_SIGNALS[1]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0 .lut_mask = 64'hF0F0F0F00F0F0F0F;
+defparam \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X19_Y5_N29
+dffeas \soc_inst|interconnect_1|mux_sel[1] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|interconnect_1|HSEL_SIGNALS[1]~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|interconnect_1|mux_sel [1]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|mux_sel[1] .is_wysiwyg = "true";
+defparam \soc_inst|interconnect_1|mux_sel[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y9_N48
+cyclonev_lcell_comb \soc_inst|interconnect_1|HREADY~0 (
+// Equation(s):
+// \soc_inst|interconnect_1|HREADY~0_combout = ( \soc_inst|ram_1|write_cycle~DUPLICATE_q & ( ((!\soc_inst|interconnect_1|mux_sel [0]) # (\soc_inst|interconnect_1|mux_sel [2])) # (\soc_inst|interconnect_1|mux_sel [1]) ) ) # (
+// !\soc_inst|ram_1|write_cycle~DUPLICATE_q )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|interconnect_1|mux_sel [1]),
+ .datac(!\soc_inst|interconnect_1|mux_sel [2]),
+ .datad(!\soc_inst|interconnect_1|mux_sel [0]),
+ .datae(gnd),
+ .dataf(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|interconnect_1|HREADY~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HREADY~0 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HREADY~0 .lut_mask = 64'hFFFFFFFFFF3FFF3F;
+defparam \soc_inst|interconnect_1|HREADY~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y4_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cdnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cdnvx4~0_combout = ( \soc_inst|m0_1|u_logic|Abovx4~0_combout & ( (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & ((!\soc_inst|interconnect_1|HREADY~0_combout ) # ((\soc_inst|m0_1|u_logic|Mtqvx4~combout ) #
+// (\soc_inst|m0_1|u_logic|Rsqvx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout & ( (!\soc_inst|interconnect_1|HREADY~0_combout & (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )) # (\soc_inst|interconnect_1|HREADY~0_combout &
+// (((\soc_inst|m0_1|u_logic|Mtqvx4~combout ) # (\soc_inst|m0_1|u_logic|Rsqvx4~0_combout )))) ) )
+
+ .dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Rsqvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Cdnvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cdnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cdnvx4~0 .lut_mask = 64'h2777277723332333;
+defparam \soc_inst|m0_1|u_logic|Cdnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y6_N35
+dffeas \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cdnvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y8_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ivewx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ivewx4~combout = ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout & ( (\soc_inst|m0_1|u_logic|Orewx4~0_combout & (!\soc_inst|m0_1|u_logic|Fij2z4~q & ((!\soc_inst|m0_1|u_logic|G9w2z4~q ) # (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ))))
+// ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|G9w2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ivewx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ivewx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ivewx4 .lut_mask = 64'h0000000031003100;
+defparam \soc_inst|m0_1|u_logic|Ivewx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y5_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E7fwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|E7fwx4~0_combout = ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout & ( (\soc_inst|m0_1|u_logic|Emi2z4~q & (!\soc_inst|m0_1|u_logic|Rexvx4~0_combout & \soc_inst|m0_1|u_logic|Orewx4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|E7fwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E7fwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E7fwx4~0 .lut_mask = 64'h0000000000500050;
+defparam \soc_inst|m0_1|u_logic|E7fwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y5_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dwewx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dwewx4~0_combout = ( !\soc_inst|m0_1|u_logic|Swy2z4~q & ( (!\soc_inst|m0_1|u_logic|Zoy2z4~q ) # ((!\soc_inst|m0_1|u_logic|Hyewx4~combout ) # (!\soc_inst|m0_1|u_logic|Xly2z4~q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Hyewx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dwewx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dwewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dwewx4~0 .lut_mask = 64'hFFFCFFFC00000000;
+defparam \soc_inst|m0_1|u_logic|Dwewx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y5_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dwewx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dwewx4~1_combout = ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Nqy2z4~q & (!\soc_inst|m0_1|u_logic|Qem2z4~q & !\soc_inst|m0_1|u_logic|G27wx4~0_combout
+// ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Dwewx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dwewx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dwewx4~1 .lut_mask = 64'h0000000020002000;
+defparam \soc_inst|m0_1|u_logic|Dwewx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y5_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bvewx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bvewx4~0_combout = ( \soc_inst|m0_1|u_logic|Dwewx4~1_combout & ( (\soc_inst|m0_1|u_logic|Wvewx4~0_combout & (((\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Zoy2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Dwewx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Dwewx4~1_combout & ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Dwewx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Dwewx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Bvewx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bvewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bvewx4~0 .lut_mask = 64'h00FF00FF001F001F;
+defparam \soc_inst|m0_1|u_logic|Bvewx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y5_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Woewx4~0_combout = ( !\soc_inst|m0_1|u_logic|Bvewx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q ) # (((!\soc_inst|m0_1|u_logic|Kzxvx4~combout ) # (!\soc_inst|m0_1|u_logic|Y6t2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Bvewx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Woewx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Woewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~0 .lut_mask = 64'hFFFBFFFB00000000;
+defparam \soc_inst|m0_1|u_logic|Woewx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y7_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Woewx4~2_combout = ( \soc_inst|m0_1|u_logic|Emi2z4~q & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q & (((\soc_inst|m0_1|u_logic|Npk2z4~q & \soc_inst|m0_1|u_logic|Sy2wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wxcwx4~0_combout
+// ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Woewx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Woewx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~2 .lut_mask = 64'h00000000222A222A;
+defparam \soc_inst|m0_1|u_logic|Woewx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y7_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Woewx4~5_combout = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|O5t2z4~q & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ))) # (\soc_inst|m0_1|u_logic|Sgj2z4~q &
+// (!\soc_inst|m0_1|u_logic|Fij2z4~q & \soc_inst|m0_1|u_logic|Ark2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|O5t2z4~q & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q & ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) #
+// ((!\soc_inst|m0_1|u_logic|Ark2z4~q )))) # (\soc_inst|m0_1|u_logic|Sgj2z4~q & (((!\soc_inst|m0_1|u_logic|Nsk2z4~q & \soc_inst|m0_1|u_logic|Ark2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Woewx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Woewx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~5 .lut_mask = 64'hF0ACF00A00000000;
+defparam \soc_inst|m0_1|u_logic|Woewx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y7_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Woewx4~3_combout = ( \soc_inst|m0_1|u_logic|Sgj2z4~q & ( \soc_inst|m0_1|u_logic|O5t2z4~q & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q
+// & ( \soc_inst|m0_1|u_logic|O5t2z4~q & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Fij2z4~q & \soc_inst|m0_1|u_logic|Emi2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sgj2z4~q &
+// ( !\soc_inst|m0_1|u_logic|O5t2z4~q & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q & (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Emi2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q & ( !\soc_inst|m0_1|u_logic|O5t2z4~q & (
+// (!\soc_inst|m0_1|u_logic|Fij2z4~q & (((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Emi2z4~q )))) # (\soc_inst|m0_1|u_logic|Fij2z4~q & (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q &
+// \soc_inst|m0_1|u_logic|Emi2z4~q ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Woewx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Woewx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~3 .lut_mask = 64'hC002C000A0A2A0A0;
+defparam \soc_inst|m0_1|u_logic|Woewx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y7_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Woewx4~1_combout = ( \soc_inst|m0_1|u_logic|Swy2z4~q & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Qsewx4~0_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Swy2z4~q & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Qsewx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Woewx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Woewx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~1 .lut_mask = 64'h0055005500050005;
+defparam \soc_inst|m0_1|u_logic|Woewx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y3_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Woewx4~4_combout = ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Tki2z4~q & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q & \soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q &
+// ( \soc_inst|m0_1|u_logic|Tki2z4~q & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q & \soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Tki2z4~q & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q ) #
+// ((!\soc_inst|m0_1|u_logic|O5t2z4~q & \soc_inst|m0_1|u_logic|Npk2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Tki2z4~q & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q & (((\soc_inst|m0_1|u_logic|Npk2z4~q )))) #
+// (\soc_inst|m0_1|u_logic|O5t2z4~q & ((!\soc_inst|m0_1|u_logic|Ark2z4~q & ((!\soc_inst|m0_1|u_logic|Npk2z4~q ))) # (\soc_inst|m0_1|u_logic|Ark2z4~q & (\soc_inst|m0_1|u_logic|Fij2z4~q )))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Woewx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Woewx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~4 .lut_mask = 64'h3C1DFF0C0C0C0C0C;
+defparam \soc_inst|m0_1|u_logic|Woewx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y7_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Woewx4~6_combout = ( !\soc_inst|m0_1|u_logic|Woewx4~4_combout & ( (!\soc_inst|m0_1|u_logic|Woewx4~2_combout & (!\soc_inst|m0_1|u_logic|Woewx4~5_combout & (!\soc_inst|m0_1|u_logic|Woewx4~3_combout &
+// !\soc_inst|m0_1|u_logic|Woewx4~1_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Woewx4~2_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Woewx4~5_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Woewx4~3_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Woewx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Woewx4~4_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Woewx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Woewx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~6 .lut_mask = 64'h8000800000000000;
+defparam \soc_inst|m0_1|u_logic|Woewx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y5_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Woewx4~7_combout = ( \soc_inst|m0_1|u_logic|H5fwx4~0_combout & ( \soc_inst|m0_1|u_logic|U2x2z4~q & ( (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Woewx4~6_combout ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|H5fwx4~0_combout & ( \soc_inst|m0_1|u_logic|U2x2z4~q & ( \soc_inst|m0_1|u_logic|Woewx4~6_combout ) ) ) # ( \soc_inst|m0_1|u_logic|H5fwx4~0_combout & ( !\soc_inst|m0_1|u_logic|U2x2z4~q & (
+// (!\soc_inst|m0_1|u_logic|Csewx4~0_combout & (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Woewx4~6_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|H5fwx4~0_combout & ( !\soc_inst|m0_1|u_logic|U2x2z4~q & (
+// (!\soc_inst|m0_1|u_logic|Csewx4~0_combout & \soc_inst|m0_1|u_logic|Woewx4~6_combout ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Woewx4~6_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Woewx4~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Woewx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~7 .lut_mask = 64'h00AA000A00FF000F;
+defparam \soc_inst|m0_1|u_logic|Woewx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y5_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~8 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Woewx4~8_combout = ( \soc_inst|m0_1|u_logic|Msyvx4~combout & ( \soc_inst|m0_1|u_logic|Q6fwx4~1_combout & ( \soc_inst|m0_1|u_logic|Woewx4~7_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Msyvx4~combout & (
+// \soc_inst|m0_1|u_logic|Q6fwx4~1_combout & ( (\soc_inst|m0_1|u_logic|Woewx4~7_combout & ((!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Woewx4~7_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Q6fwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Woewx4~8_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Woewx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~8 .lut_mask = 64'h000000000F030F0F;
+defparam \soc_inst|m0_1|u_logic|Woewx4~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y3_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E0fwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|E0fwx4~0_combout = ( \soc_inst|m0_1|u_logic|Dvy2z4~q & ( (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Zoy2z4~q & \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q
+// ))) # (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Zoy2z4~q & (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q $ (\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~q & (
+// (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Zoy2z4~q & \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q &
+// (\soc_inst|m0_1|u_logic|Zoy2z4~q & !\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|E0fwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E0fwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E0fwx4~0 .lut_mask = 64'h0480048004810481;
+defparam \soc_inst|m0_1|u_logic|E0fwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y4_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E0fwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|E0fwx4~1_combout = ( \soc_inst|m0_1|u_logic|Dvy2z4~q & ( \soc_inst|m0_1|u_logic|Qem2z4~q & ( (\soc_inst|m0_1|u_logic|Tki2z4~q & ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # ((\soc_inst|m0_1|u_logic|Pty2z4~q &
+// !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~q & ( \soc_inst|m0_1|u_logic|Qem2z4~q & ( (\soc_inst|m0_1|u_logic|Tki2z4~q & !\soc_inst|m0_1|u_logic|Pty2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Dvy2z4~q & (
+// !\soc_inst|m0_1|u_logic|Qem2z4~q & ( (\soc_inst|m0_1|u_logic|Tki2z4~q & !\soc_inst|m0_1|u_logic|Swy2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|E0fwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E0fwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E0fwx4~1 .lut_mask = 64'h0000550044445510;
+defparam \soc_inst|m0_1|u_logic|E0fwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y3_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E0fwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|E0fwx4~2_combout = ( \soc_inst|m0_1|u_logic|R3fwx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Csewx4~0_combout & !\soc_inst|m0_1|u_logic|E0fwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|R3fwx4~0_combout & (
+// (!\soc_inst|m0_1|u_logic|E0fwx4~1_combout & ((!\soc_inst|m0_1|u_logic|Csewx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Swy2z4~q & !\soc_inst|m0_1|u_logic|E0fwx4~0_combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|E0fwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|E0fwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|R3fwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|E0fwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E0fwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E0fwx4~2 .lut_mask = 64'hDC00DC00CC00CC00;
+defparam \soc_inst|m0_1|u_logic|E0fwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y5_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~9 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Woewx4~9_combout = ( \soc_inst|m0_1|u_logic|Woewx4~8_combout & ( \soc_inst|m0_1|u_logic|E0fwx4~2_combout & ( (!\soc_inst|m0_1|u_logic|E7fwx4~0_combout & \soc_inst|m0_1|u_logic|Woewx4~0_combout ) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Woewx4~8_combout & ( !\soc_inst|m0_1|u_logic|E0fwx4~2_combout & ( (!\soc_inst|m0_1|u_logic|E7fwx4~0_combout & (\soc_inst|m0_1|u_logic|Woewx4~0_combout & \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|E7fwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Woewx4~0_combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Woewx4~8_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|E0fwx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Woewx4~9_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Woewx4~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~9 .lut_mask = 64'h0000002200002222;
+defparam \soc_inst|m0_1|u_logic|Woewx4~9 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y8_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qxhvx4~0_combout = ( \soc_inst|interconnect_1|HREADY~0_combout & ( (!\soc_inst|m0_1|u_logic|Woewx4~9_combout ) # (\soc_inst|m0_1|u_logic|Ivewx4~combout ) ) ) # ( !\soc_inst|interconnect_1|HREADY~0_combout & (
+// (\soc_inst|m0_1|u_logic|Emi2z4~q & ((!\soc_inst|m0_1|u_logic|Woewx4~9_combout ) # (\soc_inst|m0_1|u_logic|Ivewx4~combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Ivewx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Woewx4~9_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Qxhvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qxhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qxhvx4~0 .lut_mask = 64'h55055505FF0FFF0F;
+defparam \soc_inst|m0_1|u_logic|Qxhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y7_N29
+dffeas \soc_inst|m0_1|u_logic|Emi2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Qxhvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Emi2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Emi2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y9_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xslwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xslwx4~0_combout = ( \soc_inst|m0_1|u_logic|Npk2z4~q & ( \soc_inst|m0_1|u_logic|Ark2z4~q & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q & (\soc_inst|m0_1|u_logic|Z7fwx4~0_combout & !\soc_inst|m0_1|u_logic|Aok2z4~q )) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Npk2z4~q & ( \soc_inst|m0_1|u_logic|Ark2z4~q & ( (\soc_inst|m0_1|u_logic|Z7fwx4~0_combout & (((!\soc_inst|m0_1|u_logic|Emi2z4~q & !\soc_inst|m0_1|u_logic|Aok2z4~q )) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Npk2z4~q & ( !\soc_inst|m0_1|u_logic|Ark2z4~q & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q & (\soc_inst|m0_1|u_logic|Z7fwx4~0_combout & !\soc_inst|m0_1|u_logic|Aok2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q & (
+// !\soc_inst|m0_1|u_logic|Ark2z4~q & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q & (\soc_inst|m0_1|u_logic|Z7fwx4~0_combout & !\soc_inst|m0_1|u_logic|Aok2z4~q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xslwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xslwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xslwx4~0 .lut_mask = 64'h2020202020332020;
+defparam \soc_inst|m0_1|u_logic|Xslwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y5_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xslwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xslwx4~1_combout = ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|O5t2z4~q & !\soc_inst|m0_1|u_logic|Sgj2z4~q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xslwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xslwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xslwx4~1 .lut_mask = 64'h0000000010101010;
+defparam \soc_inst|m0_1|u_logic|Xslwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y5_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xslwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xslwx4~2_combout = ( \soc_inst|m0_1|u_logic|Xslwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Xslwx4~1_combout & (
+// (\soc_inst|m0_1|u_logic|Fuhwx4~0_combout & (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Xslwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xslwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xslwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xslwx4~2 .lut_mask = 64'h50005000F000F000;
+defparam \soc_inst|m0_1|u_logic|Xslwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y5_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xslwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xslwx4~3_combout = ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout & ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) ) # ( !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout & ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & (
+// ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Z9dwx4~0_combout )) # (\soc_inst|m0_1|u_logic|O5t2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & (
+// (!\soc_inst|m0_1|u_logic|O5t2z4~q & (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Z9dwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q & (
+// (!\soc_inst|m0_1|u_logic|O5t2z4~q & (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & !\soc_inst|m0_1|u_logic|Z9dwx4~0_combout )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xslwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xslwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xslwx4~3 .lut_mask = 64'h80808080D5D5FFFF;
+defparam \soc_inst|m0_1|u_logic|Xslwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y5_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xslwx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xslwx4~4_combout = ( !\soc_inst|m0_1|u_logic|Xslwx4~2_combout & ( !\soc_inst|m0_1|u_logic|Xslwx4~3_combout & ( (!\soc_inst|m0_1|u_logic|M66wx4~combout ) # (\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Xslwx4~2_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Xslwx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Xslwx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xslwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xslwx4~4 .lut_mask = 64'hCFCF000000000000;
+defparam \soc_inst|m0_1|u_logic|Xslwx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y7_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Etlwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Etlwx4~0_combout = ( \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q & ((!\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q & (((!\soc_inst|interconnect_1|HREADY~0_combout ) # (!\soc_inst|m0_1|u_logic|Sgj2z4~q )) # (\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ),
+ .datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Etlwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Etlwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Etlwx4~0 .lut_mask = 64'hAAA2AAA2A2A2A2A2;
+defparam \soc_inst|m0_1|u_logic|Etlwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y9_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ushvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ushvx4~0_combout = ( !\soc_inst|m0_1|u_logic|Etlwx4~0_combout & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # ((\soc_inst|m0_1|u_logic|Xslwx4~4_combout & ((!\soc_inst|m0_1|u_logic|Xslwx4~0_combout ) #
+// (!\soc_inst|m0_1|u_logic|Msyvx4~combout )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Xslwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Xslwx4~4_combout ),
+ .datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Etlwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ushvx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ushvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ushvx4~0 .lut_mask = 64'hF3F2F3F200000000;
+defparam \soc_inst|m0_1|u_logic|Ushvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y7_N8
+dffeas \soc_inst|m0_1|u_logic|O5t2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Ushvx4~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O5t2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|O5t2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y7_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sbiwx4~0_combout = ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Npk2z4~q & ((!\soc_inst|m0_1|u_logic|Fij2z4~q & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q ))) # (\soc_inst|m0_1|u_logic|Fij2z4~q &
+// (!\soc_inst|m0_1|u_logic|Aok2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sbiwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~0 .lut_mask = 64'h000000000C0A0C0A;
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y7_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sbiwx4~1_combout = ( \soc_inst|m0_1|u_logic|Zzb2z4~0_combout & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Npk2z4~q & \soc_inst|m0_1|u_logic|Howvx4~0_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Zzb2z4~0_combout & ( (\soc_inst|m0_1|u_logic|Npk2z4~q & \soc_inst|m0_1|u_logic|Howvx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sbiwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~1 .lut_mask = 64'h000F000F000A000A;
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y7_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sbiwx4~2_combout = ( !\soc_inst|m0_1|u_logic|Mn3wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Hohwx4~0_combout & (!\soc_inst|m0_1|u_logic|Xhiwx4~0_combout & (!\soc_inst|m0_1|u_logic|Sbiwx4~0_combout &
+// !\soc_inst|m0_1|u_logic|Sbiwx4~1_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Hohwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Xhiwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Sbiwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Sbiwx4~1_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Mn3wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sbiwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~2 .lut_mask = 64'h8000800000000000;
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y3_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkiwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wkiwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|U2x2z4~q & ( (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Dvy2z4~q &
+// ((\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & (((!\soc_inst|m0_1|u_logic|Dvy2z4~q & \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ))) ) ) ) # (
+// \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|U2x2z4~q & ( \soc_inst|m0_1|u_logic|Dvy2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|U2x2z4~q & (
+// (((\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Dvy2z4~q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wkiwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~0 .lut_mask = 64'h37FF333305CD0000;
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y3_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkiwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wkiwx4~1_combout = ( \soc_inst|m0_1|u_logic|Mk6wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q ) # ((\soc_inst|m0_1|u_logic|Tki2z4~q & \soc_inst|m0_1|u_logic|Wkiwx4~0_combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Mk6wx4~0_combout & ( (\soc_inst|m0_1|u_logic|Tki2z4~q & \soc_inst|m0_1|u_logic|Wkiwx4~0_combout ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Wkiwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Mk6wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wkiwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~1 .lut_mask = 64'h05050505FF05FF05;
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y3_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkiwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wkiwx4~2_combout = ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Dvy2z4~q & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & ((\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ) #
+// (\soc_inst|m0_1|u_logic|Zoy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & ( \soc_inst|m0_1|u_logic|Dvy2z4~q & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & (!\soc_inst|m0_1|u_logic|Zoy2z4~q )) #
+// (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Dvy2z4~q & ( !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Dvy2z4~q & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE_q ),
+ .datae(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wkiwx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~2 .lut_mask = 64'h00AAAAAAF5A00AAA;
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y3_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkiwx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wkiwx4~5_combout = ( !\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( ((\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|U2x2z4~q & (\soc_inst|m0_1|u_logic|Tki2z4~q )))) ) ) # (
+// \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q & ( (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q & (\soc_inst|m0_1|u_logic|Tki2z4~q & ((!\soc_inst|m0_1|u_logic|Qem2z4~q ) # ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # (\soc_inst|m0_1|u_logic|Wkiwx4~2_combout ))))) )
+// )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE_q ),
+ .dataf(!\soc_inst|m0_1|u_logic|Wkiwx4~2_combout ),
+ .datag(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wkiwx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~5 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~5 .lut_mask = 64'h0003003200030033;
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y3_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkiwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wkiwx4~3_combout = ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout & ( \soc_inst|m0_1|u_logic|Oowvx4~0_combout & ( ((\soc_inst|m0_1|u_logic|Qem2z4~q & ((\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Swy2z4~q
+// )))) # (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wvewx4~0_combout & ( \soc_inst|m0_1|u_logic|Oowvx4~0_combout & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) ) ) # ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout & (
+// !\soc_inst|m0_1|u_logic|Oowvx4~0_combout & ( ((\soc_inst|m0_1|u_logic|Qem2z4~q & ((\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Swy2z4~q )))) # (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+ .datae(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Oowvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wkiwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~3 .lut_mask = 64'h0000557F5555557F;
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y3_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkiwx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wkiwx4~4_combout = ( !\soc_inst|m0_1|u_logic|Wkiwx4~3_combout & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q & (!\soc_inst|m0_1|u_logic|Wkiwx4~1_combout & ((!\soc_inst|m0_1|u_logic|Wkiwx4~5_combout ) #
+// (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Swy2z4~q & (((!\soc_inst|m0_1|u_logic|Wkiwx4~5_combout )) # (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Wkiwx4~1_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Wkiwx4~5_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Wkiwx4~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Wkiwx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~4 .lut_mask = 64'hF531F53100000000;
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y6_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Idiwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Idiwx4~0_combout = ( \soc_inst|m0_1|u_logic|Howvx4~0_combout & ( \soc_inst|m0_1|u_logic|B73wx4~combout ) ) # ( !\soc_inst|m0_1|u_logic|Howvx4~0_combout & ( \soc_inst|m0_1|u_logic|B73wx4~combout & (
+// (\soc_inst|m0_1|u_logic|Pcyvx4~combout & (\soc_inst|m0_1|u_logic|Wdxvx4~0_combout & !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Idiwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Idiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Idiwx4~0 .lut_mask = 64'h000000001010FFFF;
+defparam \soc_inst|m0_1|u_logic|Idiwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y6_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sbiwx4~3_combout = ( \soc_inst|m0_1|u_logic|Ws3wx4~0_combout & ( \soc_inst|m0_1|u_logic|X77wx4~combout ) ) # ( !\soc_inst|m0_1|u_logic|Ws3wx4~0_combout & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q &
+// (\soc_inst|m0_1|u_logic|X77wx4~combout & \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ws3wx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sbiwx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~3 .lut_mask = 64'h000C000C0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y6_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ttiwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ttiwx4~0_combout = ( !\soc_inst|m0_1|u_logic|Fij2z4~q & ( (\soc_inst|m0_1|u_logic|Emi2z4~q & (\soc_inst|m0_1|u_logic|Kzxvx4~combout & (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & \soc_inst|m0_1|u_logic|Sy2wx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ttiwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ttiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ttiwx4~0 .lut_mask = 64'h0010001000000000;
+defparam \soc_inst|m0_1|u_logic|Ttiwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y8_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ttiwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ttiwx4~1_combout = ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout & ( (\soc_inst|m0_1|u_logic|Wxcwx4~0_combout & (\soc_inst|m0_1|u_logic|Fhc2z4~0_combout & \soc_inst|m0_1|u_logic|O76wx4~combout )) ) ) # (
+// !\soc_inst|m0_1|u_logic|Fjewx4~1_combout & ( \soc_inst|m0_1|u_logic|Ttiwx4~0_combout ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ttiwx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Fhc2z4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Ttiwx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ttiwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ttiwx4~1 .lut_mask = 64'h3333333300050005;
+defparam \soc_inst|m0_1|u_logic|Ttiwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y6_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sbiwx4~4_combout = ( !\soc_inst|m0_1|u_logic|Ttiwx4~1_combout & ( (!\soc_inst|m0_1|u_logic|Sbiwx4~3_combout & ((!\soc_inst|m0_1|u_logic|Mhgwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Keiwx4~0_combout ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Sbiwx4~3_combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Mhgwx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Keiwx4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Ttiwx4~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sbiwx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~4 .lut_mask = 64'hAAA0AAA000000000;
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y6_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Agiwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Agiwx4~0_combout = ( \soc_inst|m0_1|u_logic|O9qvx4~0_combout & ( (\soc_inst|m0_1|u_logic|Jppvx4~0_combout & (\soc_inst|m0_1|u_logic|Ncqvx4~0_combout & (\soc_inst|m0_1|u_logic|Ffj2z4~q & \soc_inst|m0_1|u_logic|Npk2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Agiwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Agiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Agiwx4~0 .lut_mask = 64'h0000000000010001;
+defparam \soc_inst|m0_1|u_logic|Agiwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y6_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yeiwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yeiwx4~0_combout = ( \soc_inst|m0_1|u_logic|Dvy2z4~q & ( (!\soc_inst|m0_1|u_logic|Agiwx4~0_combout & (((!\soc_inst|m0_1|u_logic|P7wvx4~0_combout & !\soc_inst|m0_1|u_logic|Ohwvx4~combout )) # (\soc_inst|m0_1|u_logic|Swy2z4~q )))
+// ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~q & ( (!\soc_inst|m0_1|u_logic|Agiwx4~0_combout & ((!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Swy2z4~q ))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Agiwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Yeiwx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yeiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yeiwx4~0 .lut_mask = 64'h8A8A8A8A8A0A8A0A;
+defparam \soc_inst|m0_1|u_logic|Yeiwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y6_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sbiwx4~5_combout = ( \soc_inst|m0_1|u_logic|Yeiwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Sbiwx4~4_combout & ((!\soc_inst|m0_1|u_logic|Idiwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ark2z4~q ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Yeiwx4~0_combout & ( (\soc_inst|m0_1|u_logic|Sbiwx4~4_combout & (\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q & ((!\soc_inst|m0_1|u_logic|Idiwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ark2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Idiwx4~0_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Sbiwx4~4_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Yeiwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sbiwx4~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~5 .lut_mask = 64'h0203020322332233;
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y7_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sbiwx4~6_combout = ( \soc_inst|m0_1|u_logic|Wkiwx4~4_combout & ( \soc_inst|m0_1|u_logic|Sbiwx4~5_combout & ( (\soc_inst|m0_1|u_logic|Sbiwx4~2_combout ) # (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) ) ) ) # (
+// !\soc_inst|m0_1|u_logic|Wkiwx4~4_combout & ( \soc_inst|m0_1|u_logic|Sbiwx4~5_combout & ( ((\soc_inst|m0_1|u_logic|Sbiwx4~2_combout & \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+ .datab(!\soc_inst|m0_1|u_logic|Sbiwx4~2_combout ),
+ .datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Wkiwx4~4_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Sbiwx4~5_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Sbiwx4~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~6 .lut_mask = 64'h0000000057577777;
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y7_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mvhvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mvhvx4~combout = ( \soc_inst|m0_1|u_logic|Sbiwx4~6_combout & ( (\soc_inst|m0_1|u_logic|Aok2z4~q & ((!\soc_inst|interconnect_1|HREADY~0_combout ) # ((!\soc_inst|m0_1|u_logic|O5t2z4~q & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q
+// )))) ) ) # ( !\soc_inst|m0_1|u_logic|Sbiwx4~6_combout & ( (\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|Aok2z4~q ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+ .datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datad(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Sbiwx4~6_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Mvhvx4~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mvhvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mvhvx4 .lut_mask = 64'h0FFF0FFF0F080F08;
+defparam \soc_inst|m0_1|u_logic|Mvhvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X33_Y7_N56
+dffeas \soc_inst|m0_1|u_logic|Aok2z4 (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Mvhvx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Aok2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Aok2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y5_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G97wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G97wx4~0_combout = ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & ( !\soc_inst|m0_1|u_logic|Aok2z4~q ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G97wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G97wx4~0 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|G97wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y5_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5pvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z5pvx4~1_combout = ( !\soc_inst|m0_1|u_logic|Sgj2z4~q & ( (\soc_inst|m0_1|u_logic|G97wx4~0_combout & \soc_inst|m0_1|u_logic|O5t2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z5pvx4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~1 .lut_mask = 64'h000F000F00000000;
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y5_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q5c2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q5c2z4~0_combout = ( \soc_inst|m0_1|u_logic|Socwx4~0_combout & ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q & \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Q5c2z4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q5c2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q5c2z4~0 .lut_mask = 64'h0000000000000C0C;
+defparam \soc_inst|m0_1|u_logic|Q5c2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y5_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5pvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z5pvx4~2_combout = ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout & ( (\soc_inst|m0_1|u_logic|C2yvx4~combout & (\soc_inst|m0_1|u_logic|S4w2z4~q & \soc_inst|m0_1|u_logic|Hdh2z4~0_combout )) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
+ .datad(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z5pvx4~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~2 .lut_mask = 64'h0000000000050005;
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y5_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5pvx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z5pvx4~3_combout = ( \soc_inst|m0_1|u_logic|Z5pvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Q5c2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Pcyvx4~combout ) # (\soc_inst|m0_1|u_logic|Ark2z4~q ))) ) ) # (
+// !\soc_inst|m0_1|u_logic|Z5pvx4~2_combout & ( (!\soc_inst|m0_1|u_logic|Q5c2z4~0_combout & ((!\soc_inst|m0_1|u_logic|Z5pvx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Pcyvx4~combout ) # (\soc_inst|m0_1|u_logic|Ark2z4~q )))) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|Z5pvx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+ .datac(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+ .datad(!\soc_inst|m0_1|u_logic|Q5c2z4~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Z5pvx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z5pvx4~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~3 .lut_mask = 64'hFB00FB00F300F300;
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y7_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5pvx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z5pvx4~4_combout = ( \soc_inst|m0_1|u_logic|Z5pvx4~0_combout & ( !\soc_inst|m0_1|u_logic|Z5pvx4~3_combout ) ) # ( !\soc_inst|m0_1|u_logic|Z5pvx4~0_combout & ( (!\soc_inst|m0_1|u_logic|Z5pvx4~3_combout ) #
+// (\soc_inst|m0_1|u_logic|S4w2z4~q ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|m0_1|u_logic|Z5pvx4~3_combout ),
+ .datad(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
+ .datae(gnd),
+ .dataf(!\soc_inst|m0_1|u_logic|Z5pvx4~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~4 .lut_mask = 64'hF0FFF0FFF0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X88_Y18_N24
+cyclonev_lcell_comb \running~feeder (
+// Equation(s):
+// \running~feeder_combout = VCC
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\running~feeder_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \running~feeder .extended_lut = "off";
+defparam \running~feeder .lut_mask = 64'hFFFFFFFFFFFFFFFF;
+defparam \running~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X88_Y18_N25
+dffeas running(
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\running~feeder_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\running~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam running.is_wysiwyg = "true";
+defparam running.power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y15_N0
+cyclonev_lcell_comb \raz_inst|Add1~37 (
+// Equation(s):
+// \raz_inst|Add1~37_sumout = SUM(( \raz_inst|V_count [0] ) + ( VCC ) + ( !VCC ))
+// \raz_inst|Add1~38 = CARRY(( \raz_inst|V_count [0] ) + ( VCC ) + ( !VCC ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\raz_inst|V_count [0]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\raz_inst|Add1~37_sumout ),
+ .cout(\raz_inst|Add1~38 ),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|Add1~37 .extended_lut = "off";
+defparam \raz_inst|Add1~37 .lut_mask = 64'h00000000000000FF;
+defparam \raz_inst|Add1~37 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y15_N0
+cyclonev_lcell_comb \raz_inst|Add0~25 (
+// Equation(s):
+// \raz_inst|Add0~25_sumout = SUM(( \raz_inst|H_count[0]~DUPLICATE_q ) + ( VCC ) + ( !VCC ))
+// \raz_inst|Add0~26 = CARRY(( \raz_inst|H_count[0]~DUPLICATE_q ) + ( VCC ) + ( !VCC ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\raz_inst|H_count[0]~DUPLICATE_q ),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\raz_inst|Add0~25_sumout ),
+ .cout(\raz_inst|Add0~26 ),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|Add0~25 .extended_lut = "off";
+defparam \raz_inst|Add0~25 .lut_mask = 64'h0000000000000F0F;
+defparam \raz_inst|Add0~25 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y15_N35
+dffeas \raz_inst|H_count[0]~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\raz_inst|Add0~25_sumout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\raz_inst|LessThan0~3_combout ),
+ .sload(vcc),
+ .ena(!tick_count[0]),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\raz_inst|H_count[0]~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|H_count[0]~DUPLICATE .is_wysiwyg = "true";
+defparam \raz_inst|H_count[0]~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y15_N3
+cyclonev_lcell_comb \raz_inst|Add0~29 (
+// Equation(s):
+// \raz_inst|Add0~29_sumout = SUM(( \raz_inst|H_count [1] ) + ( GND ) + ( \raz_inst|Add0~26 ))
+// \raz_inst|Add0~30 = CARRY(( \raz_inst|H_count [1] ) + ( GND ) + ( \raz_inst|Add0~26 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\raz_inst|H_count [1]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\raz_inst|Add0~26 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\raz_inst|Add0~29_sumout ),
+ .cout(\raz_inst|Add0~30 ),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|Add0~29 .extended_lut = "off";
+defparam \raz_inst|Add0~29 .lut_mask = 64'h0000FFFF000000FF;
+defparam \raz_inst|Add0~29 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y15_N59
+dffeas \raz_inst|H_count[1] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\raz_inst|Add0~29_sumout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\raz_inst|LessThan0~3_combout ),
+ .sload(vcc),
+ .ena(!tick_count[0]),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\raz_inst|H_count [1]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|H_count[1] .is_wysiwyg = "true";
+defparam \raz_inst|H_count[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y15_N6
+cyclonev_lcell_comb \raz_inst|Add0~21 (
+// Equation(s):
+// \raz_inst|Add0~21_sumout = SUM(( \raz_inst|H_count [2] ) + ( GND ) + ( \raz_inst|Add0~30 ))
+// \raz_inst|Add0~22 = CARRY(( \raz_inst|H_count [2] ) + ( GND ) + ( \raz_inst|Add0~30 ))
+
+ .dataa(gnd),
+ .datab(!\raz_inst|H_count [2]),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\raz_inst|Add0~30 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\raz_inst|Add0~21_sumout ),
+ .cout(\raz_inst|Add0~22 ),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|Add0~21 .extended_lut = "off";
+defparam \raz_inst|Add0~21 .lut_mask = 64'h0000FFFF00003333;
+defparam \raz_inst|Add0~21 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y15_N41
+dffeas \raz_inst|H_count[2] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\raz_inst|Add0~21_sumout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\raz_inst|LessThan0~3_combout ),
+ .sload(vcc),
+ .ena(!tick_count[0]),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\raz_inst|H_count [2]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|H_count[2] .is_wysiwyg = "true";
+defparam \raz_inst|H_count[2] .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y15_N9
+cyclonev_lcell_comb \raz_inst|Add0~37 (
+// Equation(s):
+// \raz_inst|Add0~37_sumout = SUM(( \raz_inst|H_count [3] ) + ( GND ) + ( \raz_inst|Add0~22 ))
+// \raz_inst|Add0~38 = CARRY(( \raz_inst|H_count [3] ) + ( GND ) + ( \raz_inst|Add0~22 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\raz_inst|H_count [3]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\raz_inst|Add0~22 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\raz_inst|Add0~37_sumout ),
+ .cout(\raz_inst|Add0~38 ),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|Add0~37 .extended_lut = "off";
+defparam \raz_inst|Add0~37 .lut_mask = 64'h0000FFFF000000FF;
+defparam \raz_inst|Add0~37 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y15_N47
+dffeas \raz_inst|H_count[3] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\raz_inst|Add0~37_sumout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\raz_inst|LessThan0~3_combout ),
+ .sload(vcc),
+ .ena(!tick_count[0]),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\raz_inst|H_count [3]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|H_count[3] .is_wysiwyg = "true";
+defparam \raz_inst|H_count[3] .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y15_N12
+cyclonev_lcell_comb \raz_inst|Add0~41 (
+// Equation(s):
+// \raz_inst|Add0~41_sumout = SUM(( \raz_inst|H_count [4] ) + ( GND ) + ( \raz_inst|Add0~38 ))
+// \raz_inst|Add0~42 = CARRY(( \raz_inst|H_count [4] ) + ( GND ) + ( \raz_inst|Add0~38 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\raz_inst|H_count [4]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\raz_inst|Add0~38 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\raz_inst|Add0~41_sumout ),
+ .cout(\raz_inst|Add0~42 ),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|Add0~41 .extended_lut = "off";
+defparam \raz_inst|Add0~41 .lut_mask = 64'h0000FFFF000000FF;
+defparam \raz_inst|Add0~41 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y15_N43
+dffeas \raz_inst|H_count[4] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\raz_inst|Add0~41_sumout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\raz_inst|LessThan0~3_combout ),
+ .sload(vcc),
+ .ena(!tick_count[0]),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\raz_inst|H_count [4]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|H_count[4] .is_wysiwyg = "true";
+defparam \raz_inst|H_count[4] .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y15_N15
+cyclonev_lcell_comb \raz_inst|Add0~33 (
+// Equation(s):
+// \raz_inst|Add0~33_sumout = SUM(( \raz_inst|H_count [5] ) + ( GND ) + ( \raz_inst|Add0~42 ))
+// \raz_inst|Add0~34 = CARRY(( \raz_inst|H_count [5] ) + ( GND ) + ( \raz_inst|Add0~42 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\raz_inst|H_count [5]),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\raz_inst|Add0~42 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\raz_inst|Add0~33_sumout ),
+ .cout(\raz_inst|Add0~34 ),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|Add0~33 .extended_lut = "off";
+defparam \raz_inst|Add0~33 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \raz_inst|Add0~33 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y15_N17
+dffeas \raz_inst|H_count[5] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\raz_inst|Add0~33_sumout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\raz_inst|LessThan0~3_combout ),
+ .sload(gnd),
+ .ena(!tick_count[0]),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\raz_inst|H_count [5]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|H_count[5] .is_wysiwyg = "true";
+defparam \raz_inst|H_count[5] .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y15_N18
+cyclonev_lcell_comb \raz_inst|Add0~17 (
+// Equation(s):
+// \raz_inst|Add0~17_sumout = SUM(( \raz_inst|H_count [6] ) + ( GND ) + ( \raz_inst|Add0~34 ))
+// \raz_inst|Add0~18 = CARRY(( \raz_inst|H_count [6] ) + ( GND ) + ( \raz_inst|Add0~34 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\raz_inst|H_count [6]),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\raz_inst|Add0~34 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\raz_inst|Add0~17_sumout ),
+ .cout(\raz_inst|Add0~18 ),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|Add0~17 .extended_lut = "off";
+defparam \raz_inst|Add0~17 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \raz_inst|Add0~17 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y15_N20
+dffeas \raz_inst|H_count[6] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\raz_inst|Add0~17_sumout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\raz_inst|LessThan0~3_combout ),
+ .sload(gnd),
+ .ena(!tick_count[0]),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\raz_inst|H_count [6]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|H_count[6] .is_wysiwyg = "true";
+defparam \raz_inst|H_count[6] .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y15_N21
+cyclonev_lcell_comb \raz_inst|Add0~5 (
+// Equation(s):
+// \raz_inst|Add0~5_sumout = SUM(( \raz_inst|H_count [7] ) + ( GND ) + ( \raz_inst|Add0~18 ))
+// \raz_inst|Add0~6 = CARRY(( \raz_inst|H_count [7] ) + ( GND ) + ( \raz_inst|Add0~18 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\raz_inst|H_count [7]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\raz_inst|Add0~18 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\raz_inst|Add0~5_sumout ),
+ .cout(\raz_inst|Add0~6 ),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|Add0~5 .extended_lut = "off";
+defparam \raz_inst|Add0~5 .lut_mask = 64'h0000FFFF000000FF;
+defparam \raz_inst|Add0~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y15_N23
+dffeas \raz_inst|H_count[7] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\raz_inst|Add0~5_sumout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\raz_inst|LessThan0~3_combout ),
+ .sload(gnd),
+ .ena(!tick_count[0]),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\raz_inst|H_count [7]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|H_count[7] .is_wysiwyg = "true";
+defparam \raz_inst|H_count[7] .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y15_N24
+cyclonev_lcell_comb \raz_inst|Add0~9 (
+// Equation(s):
+// \raz_inst|Add0~9_sumout = SUM(( \raz_inst|H_count [8] ) + ( GND ) + ( \raz_inst|Add0~6 ))
+// \raz_inst|Add0~10 = CARRY(( \raz_inst|H_count [8] ) + ( GND ) + ( \raz_inst|Add0~6 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\raz_inst|H_count [8]),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\raz_inst|Add0~6 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\raz_inst|Add0~9_sumout ),
+ .cout(\raz_inst|Add0~10 ),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|Add0~9 .extended_lut = "off";
+defparam \raz_inst|Add0~9 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \raz_inst|Add0~9 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y15_N26
+dffeas \raz_inst|H_count[8] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\raz_inst|Add0~9_sumout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\raz_inst|LessThan0~3_combout ),
+ .sload(gnd),
+ .ena(!tick_count[0]),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\raz_inst|H_count [8]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|H_count[8] .is_wysiwyg = "true";
+defparam \raz_inst|H_count[8] .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y15_N27
+cyclonev_lcell_comb \raz_inst|Add0~13 (
+// Equation(s):
+// \raz_inst|Add0~13_sumout = SUM(( \raz_inst|H_count [9] ) + ( GND ) + ( \raz_inst|Add0~10 ))
+// \raz_inst|Add0~14 = CARRY(( \raz_inst|H_count [9] ) + ( GND ) + ( \raz_inst|Add0~10 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\raz_inst|H_count [9]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\raz_inst|Add0~10 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\raz_inst|Add0~13_sumout ),
+ .cout(\raz_inst|Add0~14 ),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|Add0~13 .extended_lut = "off";
+defparam \raz_inst|Add0~13 .lut_mask = 64'h0000FFFF000000FF;
+defparam \raz_inst|Add0~13 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y15_N30
+cyclonev_lcell_comb \raz_inst|Add0~1 (
+// Equation(s):
+// \raz_inst|Add0~1_sumout = SUM(( \raz_inst|H_count [10] ) + ( GND ) + ( \raz_inst|Add0~14 ))
+
+ .dataa(gnd),
+ .datab(!\raz_inst|H_count [10]),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\raz_inst|Add0~14 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\raz_inst|Add0~1_sumout ),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|Add0~1 .extended_lut = "off";
+defparam \raz_inst|Add0~1 .lut_mask = 64'h0000FFFF00003333;
+defparam \raz_inst|Add0~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y15_N32
+dffeas \raz_inst|H_count[10] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\raz_inst|Add0~1_sumout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\raz_inst|LessThan0~3_combout ),
+ .sload(gnd),
+ .ena(!tick_count[0]),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\raz_inst|H_count [10]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|H_count[10] .is_wysiwyg = "true";
+defparam \raz_inst|H_count[10] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X34_Y15_N58
+dffeas \raz_inst|H_count[1]~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\raz_inst|Add0~29_sumout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\raz_inst|LessThan0~3_combout ),
+ .sload(vcc),
+ .ena(!tick_count[0]),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\raz_inst|H_count[1]~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|H_count[1]~DUPLICATE .is_wysiwyg = "true";
+defparam \raz_inst|H_count[1]~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y15_N54
+cyclonev_lcell_comb \raz_inst|LessThan0~0 (
+// Equation(s):
+// \raz_inst|LessThan0~0_combout = ( \raz_inst|H_count [3] & ( !\raz_inst|H_count [5] & ( (!\raz_inst|H_count[0]~DUPLICATE_q ) # ((!\raz_inst|H_count [4]) # ((!\raz_inst|H_count[1]~DUPLICATE_q ) # (!\raz_inst|H_count [2]))) ) ) ) # ( !\raz_inst|H_count [3]
+// & ( !\raz_inst|H_count [5] ) )
+
+ .dataa(!\raz_inst|H_count[0]~DUPLICATE_q ),
+ .datab(!\raz_inst|H_count [4]),
+ .datac(!\raz_inst|H_count[1]~DUPLICATE_q ),
+ .datad(!\raz_inst|H_count [2]),
+ .datae(!\raz_inst|H_count [3]),
+ .dataf(!\raz_inst|H_count [5]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|LessThan0~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|LessThan0~0 .extended_lut = "off";
+defparam \raz_inst|LessThan0~0 .lut_mask = 64'hFFFFFFFE00000000;
+defparam \raz_inst|LessThan0~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y15_N51
+cyclonev_lcell_comb \raz_inst|LessThan0~2 (
+// Equation(s):
+// \raz_inst|LessThan0~2_combout = ( \raz_inst|H_count [8] & ( \raz_inst|H_count [9] ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\raz_inst|H_count [9]),
+ .datae(gnd),
+ .dataf(!\raz_inst|H_count [8]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|LessThan0~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|LessThan0~2 .extended_lut = "off";
+defparam \raz_inst|LessThan0~2 .lut_mask = 64'h0000000000FF00FF;
+defparam \raz_inst|LessThan0~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y15_N36
+cyclonev_lcell_comb \raz_inst|LessThan0~1 (
+// Equation(s):
+// \raz_inst|LessThan0~1_combout = (!\raz_inst|H_count [6] & !\raz_inst|H_count [7])
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\raz_inst|H_count [6]),
+ .datad(!\raz_inst|H_count [7]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|LessThan0~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|LessThan0~1 .extended_lut = "off";
+defparam \raz_inst|LessThan0~1 .lut_mask = 64'hF000F000F000F000;
+defparam \raz_inst|LessThan0~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y15_N42
+cyclonev_lcell_comb \raz_inst|LessThan0~3 (
+// Equation(s):
+// \raz_inst|LessThan0~3_combout = ( \raz_inst|LessThan0~2_combout & ( \raz_inst|LessThan0~1_combout & ( (!\raz_inst|LessThan0~0_combout ) # (\raz_inst|H_count [10]) ) ) ) # ( !\raz_inst|LessThan0~2_combout & ( \raz_inst|LessThan0~1_combout & (
+// \raz_inst|H_count [10] ) ) ) # ( \raz_inst|LessThan0~2_combout & ( !\raz_inst|LessThan0~1_combout ) ) # ( !\raz_inst|LessThan0~2_combout & ( !\raz_inst|LessThan0~1_combout & ( \raz_inst|H_count [10] ) ) )
+
+ .dataa(gnd),
+ .datab(!\raz_inst|H_count [10]),
+ .datac(!\raz_inst|LessThan0~0_combout ),
+ .datad(gnd),
+ .datae(!\raz_inst|LessThan0~2_combout ),
+ .dataf(!\raz_inst|LessThan0~1_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|LessThan0~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|LessThan0~3 .extended_lut = "off";
+defparam \raz_inst|LessThan0~3 .lut_mask = 64'h3333FFFF3333F3F3;
+defparam \raz_inst|LessThan0~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y15_N29
+dffeas \raz_inst|H_count[9] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\raz_inst|Add0~13_sumout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\raz_inst|LessThan0~3_combout ),
+ .sload(gnd),
+ .ena(!tick_count[0]),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\raz_inst|H_count [9]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|H_count[9] .is_wysiwyg = "true";
+defparam \raz_inst|H_count[9] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y15_N18
+cyclonev_lcell_comb \raz_inst|Add1~1 (
+// Equation(s):
+// \raz_inst|Add1~1_sumout = SUM(( \raz_inst|V_count [6] ) + ( GND ) + ( \raz_inst|Add1~6 ))
+// \raz_inst|Add1~2 = CARRY(( \raz_inst|V_count [6] ) + ( GND ) + ( \raz_inst|Add1~6 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\raz_inst|V_count [6]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\raz_inst|Add1~6 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\raz_inst|Add1~1_sumout ),
+ .cout(\raz_inst|Add1~2 ),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|Add1~1 .extended_lut = "off";
+defparam \raz_inst|Add1~1 .lut_mask = 64'h0000FFFF000000FF;
+defparam \raz_inst|Add1~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y15_N21
+cyclonev_lcell_comb \raz_inst|Add1~9 (
+// Equation(s):
+// \raz_inst|Add1~9_sumout = SUM(( \raz_inst|V_count [7] ) + ( GND ) + ( \raz_inst|Add1~2 ))
+// \raz_inst|Add1~10 = CARRY(( \raz_inst|V_count [7] ) + ( GND ) + ( \raz_inst|Add1~2 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\raz_inst|V_count [7]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\raz_inst|Add1~2 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\raz_inst|Add1~9_sumout ),
+ .cout(\raz_inst|Add1~10 ),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|Add1~9 .extended_lut = "off";
+defparam \raz_inst|Add1~9 .lut_mask = 64'h0000FFFF000000FF;
+defparam \raz_inst|Add1~9 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y15_N18
+cyclonev_lcell_comb \raz_inst|Equal0~3 (
+// Equation(s):
+// \raz_inst|Equal0~3_combout = ( \raz_inst|Add0~13_sumout & ( (!\raz_inst|LessThan0~3_combout & (!\raz_inst|Add0~1_sumout & (!\raz_inst|Add0~9_sumout & \raz_inst|Add0~5_sumout ))) ) )
+
+ .dataa(!\raz_inst|LessThan0~3_combout ),
+ .datab(!\raz_inst|Add0~1_sumout ),
+ .datac(!\raz_inst|Add0~9_sumout ),
+ .datad(!\raz_inst|Add0~5_sumout ),
+ .datae(gnd),
+ .dataf(!\raz_inst|Add0~13_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|Equal0~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|Equal0~3 .extended_lut = "off";
+defparam \raz_inst|Equal0~3 .lut_mask = 64'h0000000000800080;
+defparam \raz_inst|Equal0~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y15_N12
+cyclonev_lcell_comb \raz_inst|Equal0~1 (
+// Equation(s):
+// \raz_inst|Equal0~1_combout = ( \raz_inst|Add0~29_sumout & ( \raz_inst|Add0~25_sumout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\raz_inst|Add0~25_sumout ),
+ .datae(gnd),
+ .dataf(!\raz_inst|Add0~29_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|Equal0~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|Equal0~1 .extended_lut = "off";
+defparam \raz_inst|Equal0~1 .lut_mask = 64'h0000000000FF00FF;
+defparam \raz_inst|Equal0~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y15_N33
+cyclonev_lcell_comb \raz_inst|Equal0~0 (
+// Equation(s):
+// \raz_inst|Equal0~0_combout = ( \raz_inst|Add0~41_sumout & ( !\raz_inst|Add0~17_sumout & ( (!\raz_inst|LessThan0~3_combout & (\raz_inst|Add0~37_sumout & (\raz_inst|Add0~33_sumout & !\raz_inst|Add0~21_sumout ))) ) ) )
+
+ .dataa(!\raz_inst|LessThan0~3_combout ),
+ .datab(!\raz_inst|Add0~37_sumout ),
+ .datac(!\raz_inst|Add0~33_sumout ),
+ .datad(!\raz_inst|Add0~21_sumout ),
+ .datae(!\raz_inst|Add0~41_sumout ),
+ .dataf(!\raz_inst|Add0~17_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|Equal0~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|Equal0~0 .extended_lut = "off";
+defparam \raz_inst|Equal0~0 .lut_mask = 64'h0000020000000000;
+defparam \raz_inst|Equal0~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y15_N45
+cyclonev_lcell_comb \raz_inst|Equal0~4 (
+// Equation(s):
+// \raz_inst|Equal0~4_combout = ( \raz_inst|Equal0~0_combout & ( (!\raz_inst|Equal0~3_combout ) # (!\raz_inst|Equal0~1_combout ) ) ) # ( !\raz_inst|Equal0~0_combout )
+
+ .dataa(!\raz_inst|Equal0~3_combout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\raz_inst|Equal0~1_combout ),
+ .datae(gnd),
+ .dataf(!\raz_inst|Equal0~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|Equal0~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|Equal0~4 .extended_lut = "off";
+defparam \raz_inst|Equal0~4 .lut_mask = 64'hFFFFFFFFFFAAFFAA;
+defparam \raz_inst|Equal0~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y15_N23
+dffeas \raz_inst|V_count[7] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\raz_inst|Add1~9_sumout ),
+ .asdata(\raz_inst|V_count [7]),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\raz_inst|always0~14_combout ),
+ .sload(\raz_inst|Equal0~4_combout ),
+ .ena(!tick_count[0]),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\raz_inst|V_count [7]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|V_count[7] .is_wysiwyg = "true";
+defparam \raz_inst|V_count[7] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y15_N24
+cyclonev_lcell_comb \raz_inst|Add1~13 (
+// Equation(s):
+// \raz_inst|Add1~13_sumout = SUM(( \raz_inst|V_count [8] ) + ( GND ) + ( \raz_inst|Add1~10 ))
+// \raz_inst|Add1~14 = CARRY(( \raz_inst|V_count [8] ) + ( GND ) + ( \raz_inst|Add1~10 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\raz_inst|V_count [8]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\raz_inst|Add1~10 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\raz_inst|Add1~13_sumout ),
+ .cout(\raz_inst|Add1~14 ),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|Add1~13 .extended_lut = "off";
+defparam \raz_inst|Add1~13 .lut_mask = 64'h0000FFFF000000FF;
+defparam \raz_inst|Add1~13 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y15_N26
+dffeas \raz_inst|V_count[8] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\raz_inst|Add1~13_sumout ),
+ .asdata(\raz_inst|V_count [8]),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\raz_inst|always0~14_combout ),
+ .sload(\raz_inst|Equal0~4_combout ),
+ .ena(!tick_count[0]),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\raz_inst|V_count [8]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|V_count[8] .is_wysiwyg = "true";
+defparam \raz_inst|V_count[8] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y15_N27
+cyclonev_lcell_comb \raz_inst|Add1~17 (
+// Equation(s):
+// \raz_inst|Add1~17_sumout = SUM(( \raz_inst|V_count [9] ) + ( GND ) + ( \raz_inst|Add1~14 ))
+// \raz_inst|Add1~18 = CARRY(( \raz_inst|V_count [9] ) + ( GND ) + ( \raz_inst|Add1~14 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\raz_inst|V_count [9]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\raz_inst|Add1~14 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\raz_inst|Add1~17_sumout ),
+ .cout(\raz_inst|Add1~18 ),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|Add1~17 .extended_lut = "off";
+defparam \raz_inst|Add1~17 .lut_mask = 64'h0000FFFF000000FF;
+defparam \raz_inst|Add1~17 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y15_N29
+dffeas \raz_inst|V_count[9] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\raz_inst|Add1~17_sumout ),
+ .asdata(\raz_inst|V_count [9]),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\raz_inst|always0~14_combout ),
+ .sload(\raz_inst|Equal0~4_combout ),
+ .ena(!tick_count[0]),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\raz_inst|V_count [9]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|V_count[9] .is_wysiwyg = "true";
+defparam \raz_inst|V_count[9] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y15_N30
+cyclonev_lcell_comb \raz_inst|Add1~21 (
+// Equation(s):
+// \raz_inst|Add1~21_sumout = SUM(( \raz_inst|V_count [10] ) + ( GND ) + ( \raz_inst|Add1~18 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\raz_inst|V_count [10]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\raz_inst|Add1~18 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\raz_inst|Add1~21_sumout ),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|Add1~21 .extended_lut = "off";
+defparam \raz_inst|Add1~21 .lut_mask = 64'h0000FFFF000000FF;
+defparam \raz_inst|Add1~21 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y15_N32
+dffeas \raz_inst|V_count[10] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\raz_inst|Add1~21_sumout ),
+ .asdata(\raz_inst|V_count [10]),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\raz_inst|always0~14_combout ),
+ .sload(\raz_inst|Equal0~4_combout ),
+ .ena(!tick_count[0]),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\raz_inst|V_count [10]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|V_count[10] .is_wysiwyg = "true";
+defparam \raz_inst|V_count[10] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y15_N54
+cyclonev_lcell_comb \raz_inst|always0~2 (
+// Equation(s):
+// \raz_inst|always0~2_combout = ( !\raz_inst|V_count [6] & ( (!\raz_inst|V_count [8] & (!\raz_inst|V_count [7] & !\raz_inst|V_count [5])) ) )
+
+ .dataa(gnd),
+ .datab(!\raz_inst|V_count [8]),
+ .datac(!\raz_inst|V_count [7]),
+ .datad(!\raz_inst|V_count [5]),
+ .datae(gnd),
+ .dataf(!\raz_inst|V_count [6]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|always0~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|always0~2 .extended_lut = "off";
+defparam \raz_inst|always0~2 .lut_mask = 64'hC000C00000000000;
+defparam \raz_inst|always0~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y15_N54
+cyclonev_lcell_comb \raz_inst|always0~3 (
+// Equation(s):
+// \raz_inst|always0~3_combout = ( \raz_inst|always0~2_combout & ( (!\raz_inst|V_count [4] & ((!\raz_inst|V_count [2]) # (!\raz_inst|V_count [3]))) ) )
+
+ .dataa(gnd),
+ .datab(!\raz_inst|V_count [2]),
+ .datac(!\raz_inst|V_count [4]),
+ .datad(!\raz_inst|V_count [3]),
+ .datae(gnd),
+ .dataf(!\raz_inst|always0~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|always0~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|always0~3 .extended_lut = "off";
+defparam \raz_inst|always0~3 .lut_mask = 64'h00000000F0C0F0C0;
+defparam \raz_inst|always0~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y15_N12
+cyclonev_lcell_comb \raz_inst|always0~4 (
+// Equation(s):
+// \raz_inst|always0~4_combout = ( \raz_inst|always0~3_combout & ( (\raz_inst|V_count [10] & !\raz_inst|LessThan0~3_combout ) ) ) # ( !\raz_inst|always0~3_combout & ( (!\raz_inst|LessThan0~3_combout & ((\raz_inst|V_count [9]) # (\raz_inst|V_count [10])))
+// ) )
+
+ .dataa(gnd),
+ .datab(!\raz_inst|V_count [10]),
+ .datac(!\raz_inst|LessThan0~3_combout ),
+ .datad(!\raz_inst|V_count [9]),
+ .datae(gnd),
+ .dataf(!\raz_inst|always0~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|always0~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|always0~4 .extended_lut = "off";
+defparam \raz_inst|always0~4 .lut_mask = 64'h30F030F030303030;
+defparam \raz_inst|always0~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y15_N36
+cyclonev_lcell_comb \raz_inst|LessThan4~1 (
+// Equation(s):
+// \raz_inst|LessThan4~1_combout = ( !\raz_inst|H_count [10] & ( \raz_inst|Add0~29_sumout & ( (\raz_inst|Add0~25_sumout & ((!\raz_inst|LessThan0~2_combout ) # ((\raz_inst|LessThan0~0_combout & \raz_inst|LessThan0~1_combout )))) ) ) )
+
+ .dataa(!\raz_inst|LessThan0~2_combout ),
+ .datab(!\raz_inst|LessThan0~0_combout ),
+ .datac(!\raz_inst|LessThan0~1_combout ),
+ .datad(!\raz_inst|Add0~25_sumout ),
+ .datae(!\raz_inst|H_count [10]),
+ .dataf(!\raz_inst|Add0~29_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|LessThan4~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|LessThan4~1 .extended_lut = "off";
+defparam \raz_inst|LessThan4~1 .lut_mask = 64'h0000000000AB0000;
+defparam \raz_inst|LessThan4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y15_N51
+cyclonev_lcell_comb \raz_inst|H_count~1 (
+// Equation(s):
+// \raz_inst|H_count~1_combout = ( \raz_inst|Add0~37_sumout & ( (!\raz_inst|H_count [10] & ((!\raz_inst|LessThan0~2_combout ) # ((\raz_inst|LessThan0~1_combout & \raz_inst|LessThan0~0_combout )))) ) )
+
+ .dataa(!\raz_inst|LessThan0~1_combout ),
+ .datab(!\raz_inst|LessThan0~2_combout ),
+ .datac(!\raz_inst|LessThan0~0_combout ),
+ .datad(!\raz_inst|H_count [10]),
+ .datae(gnd),
+ .dataf(!\raz_inst|Add0~37_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|H_count~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|H_count~1 .extended_lut = "off";
+defparam \raz_inst|H_count~1 .lut_mask = 64'h00000000CD00CD00;
+defparam \raz_inst|H_count~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y15_N48
+cyclonev_lcell_comb \raz_inst|H_count~0 (
+// Equation(s):
+// \raz_inst|H_count~0_combout = ( \raz_inst|Add0~21_sumout & ( (!\raz_inst|H_count [10] & ((!\raz_inst|LessThan0~2_combout ) # ((\raz_inst|LessThan0~1_combout & \raz_inst|LessThan0~0_combout )))) ) )
+
+ .dataa(!\raz_inst|LessThan0~1_combout ),
+ .datab(!\raz_inst|LessThan0~2_combout ),
+ .datac(!\raz_inst|LessThan0~0_combout ),
+ .datad(!\raz_inst|H_count [10]),
+ .datae(gnd),
+ .dataf(!\raz_inst|Add0~21_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|H_count~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|H_count~0 .extended_lut = "off";
+defparam \raz_inst|H_count~0 .lut_mask = 64'h00000000CD00CD00;
+defparam \raz_inst|H_count~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y15_N0
+cyclonev_lcell_comb \raz_inst|always0~13 (
+// Equation(s):
+// \raz_inst|always0~13_combout = ( \raz_inst|Add0~41_sumout & ( \raz_inst|H_count~0_combout & ( (!\raz_inst|Add0~17_sumout & ((!\raz_inst|Add0~33_sumout ) # (!\raz_inst|H_count~1_combout ))) ) ) ) # ( !\raz_inst|Add0~41_sumout & (
+// \raz_inst|H_count~0_combout & ( !\raz_inst|Add0~17_sumout ) ) ) # ( \raz_inst|Add0~41_sumout & ( !\raz_inst|H_count~0_combout & ( (!\raz_inst|Add0~17_sumout & ((!\raz_inst|LessThan4~1_combout ) # ((!\raz_inst|Add0~33_sumout ) #
+// (!\raz_inst|H_count~1_combout )))) ) ) ) # ( !\raz_inst|Add0~41_sumout & ( !\raz_inst|H_count~0_combout & ( !\raz_inst|Add0~17_sumout ) ) )
+
+ .dataa(!\raz_inst|LessThan4~1_combout ),
+ .datab(!\raz_inst|Add0~33_sumout ),
+ .datac(!\raz_inst|H_count~1_combout ),
+ .datad(!\raz_inst|Add0~17_sumout ),
+ .datae(!\raz_inst|Add0~41_sumout ),
+ .dataf(!\raz_inst|H_count~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|always0~13_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|always0~13 .extended_lut = "off";
+defparam \raz_inst|always0~13 .lut_mask = 64'hFF00FE00FF00FC00;
+defparam \raz_inst|always0~13 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y15_N6
+cyclonev_lcell_comb \raz_inst|always0~14 (
+// Equation(s):
+// \raz_inst|always0~14_combout = ( \raz_inst|Add0~5_sumout & ( \raz_inst|always0~13_combout & ( (\raz_inst|always0~4_combout & (((\raz_inst|Add0~13_sumout & \raz_inst|Add0~9_sumout )) # (\raz_inst|Add0~1_sumout ))) ) ) ) # ( !\raz_inst|Add0~5_sumout &
+// ( \raz_inst|always0~13_combout & ( (\raz_inst|always0~4_combout & (((\raz_inst|Add0~13_sumout & \raz_inst|Add0~9_sumout )) # (\raz_inst|Add0~1_sumout ))) ) ) ) # ( \raz_inst|Add0~5_sumout & ( !\raz_inst|always0~13_combout & (
+// (\raz_inst|always0~4_combout & ((\raz_inst|Add0~1_sumout ) # (\raz_inst|Add0~13_sumout ))) ) ) ) # ( !\raz_inst|Add0~5_sumout & ( !\raz_inst|always0~13_combout & ( (\raz_inst|always0~4_combout & (((\raz_inst|Add0~13_sumout & \raz_inst|Add0~9_sumout
+// )) # (\raz_inst|Add0~1_sumout ))) ) ) )
+
+ .dataa(!\raz_inst|Add0~13_sumout ),
+ .datab(!\raz_inst|Add0~1_sumout ),
+ .datac(!\raz_inst|Add0~9_sumout ),
+ .datad(!\raz_inst|always0~4_combout ),
+ .datae(!\raz_inst|Add0~5_sumout ),
+ .dataf(!\raz_inst|always0~13_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|always0~14_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|always0~14 .extended_lut = "off";
+defparam \raz_inst|always0~14 .lut_mask = 64'h0037007700370037;
+defparam \raz_inst|always0~14 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y15_N2
+dffeas \raz_inst|V_count[0] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\raz_inst|Add1~37_sumout ),
+ .asdata(\raz_inst|V_count [0]),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\raz_inst|always0~14_combout ),
+ .sload(\raz_inst|Equal0~4_combout ),
+ .ena(!tick_count[0]),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\raz_inst|V_count [0]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|V_count[0] .is_wysiwyg = "true";
+defparam \raz_inst|V_count[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y15_N3
+cyclonev_lcell_comb \raz_inst|Add1~41 (
+// Equation(s):
+// \raz_inst|Add1~41_sumout = SUM(( \raz_inst|V_count [1] ) + ( GND ) + ( \raz_inst|Add1~38 ))
+// \raz_inst|Add1~42 = CARRY(( \raz_inst|V_count [1] ) + ( GND ) + ( \raz_inst|Add1~38 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\raz_inst|V_count [1]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\raz_inst|Add1~38 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\raz_inst|Add1~41_sumout ),
+ .cout(\raz_inst|Add1~42 ),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|Add1~41 .extended_lut = "off";
+defparam \raz_inst|Add1~41 .lut_mask = 64'h0000FFFF000000FF;
+defparam \raz_inst|Add1~41 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y15_N5
+dffeas \raz_inst|V_count[1] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\raz_inst|Add1~41_sumout ),
+ .asdata(\raz_inst|V_count [1]),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\raz_inst|always0~14_combout ),
+ .sload(\raz_inst|Equal0~4_combout ),
+ .ena(!tick_count[0]),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\raz_inst|V_count [1]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|V_count[1] .is_wysiwyg = "true";
+defparam \raz_inst|V_count[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y15_N6
+cyclonev_lcell_comb \raz_inst|Add1~25 (
+// Equation(s):
+// \raz_inst|Add1~25_sumout = SUM(( \raz_inst|V_count [2] ) + ( GND ) + ( \raz_inst|Add1~42 ))
+// \raz_inst|Add1~26 = CARRY(( \raz_inst|V_count [2] ) + ( GND ) + ( \raz_inst|Add1~42 ))
+
+ .dataa(gnd),
+ .datab(!\raz_inst|V_count [2]),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\raz_inst|Add1~42 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\raz_inst|Add1~25_sumout ),
+ .cout(\raz_inst|Add1~26 ),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|Add1~25 .extended_lut = "off";
+defparam \raz_inst|Add1~25 .lut_mask = 64'h0000FFFF00003333;
+defparam \raz_inst|Add1~25 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y15_N8
+dffeas \raz_inst|V_count[2] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\raz_inst|Add1~25_sumout ),
+ .asdata(\raz_inst|V_count [2]),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\raz_inst|always0~14_combout ),
+ .sload(\raz_inst|Equal0~4_combout ),
+ .ena(!tick_count[0]),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\raz_inst|V_count [2]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|V_count[2] .is_wysiwyg = "true";
+defparam \raz_inst|V_count[2] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y15_N9
+cyclonev_lcell_comb \raz_inst|Add1~29 (
+// Equation(s):
+// \raz_inst|Add1~29_sumout = SUM(( \raz_inst|V_count [3] ) + ( GND ) + ( \raz_inst|Add1~26 ))
+// \raz_inst|Add1~30 = CARRY(( \raz_inst|V_count [3] ) + ( GND ) + ( \raz_inst|Add1~26 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\raz_inst|V_count [3]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\raz_inst|Add1~26 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\raz_inst|Add1~29_sumout ),
+ .cout(\raz_inst|Add1~30 ),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|Add1~29 .extended_lut = "off";
+defparam \raz_inst|Add1~29 .lut_mask = 64'h0000FFFF000000FF;
+defparam \raz_inst|Add1~29 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y15_N11
+dffeas \raz_inst|V_count[3] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\raz_inst|Add1~29_sumout ),
+ .asdata(\raz_inst|V_count [3]),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\raz_inst|always0~14_combout ),
+ .sload(\raz_inst|Equal0~4_combout ),
+ .ena(!tick_count[0]),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\raz_inst|V_count [3]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|V_count[3] .is_wysiwyg = "true";
+defparam \raz_inst|V_count[3] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y15_N12
+cyclonev_lcell_comb \raz_inst|Add1~33 (
+// Equation(s):
+// \raz_inst|Add1~33_sumout = SUM(( \raz_inst|V_count [4] ) + ( GND ) + ( \raz_inst|Add1~30 ))
+// \raz_inst|Add1~34 = CARRY(( \raz_inst|V_count [4] ) + ( GND ) + ( \raz_inst|Add1~30 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\raz_inst|V_count [4]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\raz_inst|Add1~30 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\raz_inst|Add1~33_sumout ),
+ .cout(\raz_inst|Add1~34 ),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|Add1~33 .extended_lut = "off";
+defparam \raz_inst|Add1~33 .lut_mask = 64'h0000FFFF000000FF;
+defparam \raz_inst|Add1~33 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y15_N14
+dffeas \raz_inst|V_count[4] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\raz_inst|Add1~33_sumout ),
+ .asdata(\raz_inst|V_count [4]),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\raz_inst|always0~14_combout ),
+ .sload(\raz_inst|Equal0~4_combout ),
+ .ena(!tick_count[0]),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\raz_inst|V_count [4]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|V_count[4] .is_wysiwyg = "true";
+defparam \raz_inst|V_count[4] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y15_N15
+cyclonev_lcell_comb \raz_inst|Add1~5 (
+// Equation(s):
+// \raz_inst|Add1~5_sumout = SUM(( \raz_inst|V_count [5] ) + ( GND ) + ( \raz_inst|Add1~34 ))
+// \raz_inst|Add1~6 = CARRY(( \raz_inst|V_count [5] ) + ( GND ) + ( \raz_inst|Add1~34 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\raz_inst|V_count [5]),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\raz_inst|Add1~34 ),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\raz_inst|Add1~5_sumout ),
+ .cout(\raz_inst|Add1~6 ),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|Add1~5 .extended_lut = "off";
+defparam \raz_inst|Add1~5 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \raz_inst|Add1~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y15_N17
+dffeas \raz_inst|V_count[5] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\raz_inst|Add1~5_sumout ),
+ .asdata(\raz_inst|V_count [5]),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\raz_inst|always0~14_combout ),
+ .sload(\raz_inst|Equal0~4_combout ),
+ .ena(!tick_count[0]),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\raz_inst|V_count [5]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|V_count[5] .is_wysiwyg = "true";
+defparam \raz_inst|V_count[5] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X31_Y15_N20
+dffeas \raz_inst|V_count[6] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\raz_inst|Add1~1_sumout ),
+ .asdata(\raz_inst|V_count [6]),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\raz_inst|always0~14_combout ),
+ .sload(\raz_inst|Equal0~4_combout ),
+ .ena(!tick_count[0]),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\raz_inst|V_count [6]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|V_count[6] .is_wysiwyg = "true";
+defparam \raz_inst|V_count[6] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y15_N0
+cyclonev_lcell_comb \soc_inst|pix1|Add1~25 (
+// Equation(s):
+// \soc_inst|pix1|Add1~25_sumout = SUM(( !\raz_inst|H_count [7] $ (!\raz_inst|V_count [0]) ) + ( !VCC ) + ( !VCC ))
+// \soc_inst|pix1|Add1~26 = CARRY(( !\raz_inst|H_count [7] $ (!\raz_inst|V_count [0]) ) + ( !VCC ) + ( !VCC ))
+// \soc_inst|pix1|Add1~27 = SHARE((\raz_inst|H_count [7] & \raz_inst|V_count [0]))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\raz_inst|H_count [7]),
+ .datad(!\raz_inst|V_count [0]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(),
+ .sumout(\soc_inst|pix1|Add1~25_sumout ),
+ .cout(\soc_inst|pix1|Add1~26 ),
+ .shareout(\soc_inst|pix1|Add1~27 ));
+// synopsys translate_off
+defparam \soc_inst|pix1|Add1~25 .extended_lut = "off";
+defparam \soc_inst|pix1|Add1~25 .lut_mask = 64'h0000000F00000FF0;
+defparam \soc_inst|pix1|Add1~25 .shared_arith = "on";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y15_N3
+cyclonev_lcell_comb \soc_inst|pix1|Add1~29 (
+// Equation(s):
+// \soc_inst|pix1|Add1~29_sumout = SUM(( !\raz_inst|V_count [1] $ (!\raz_inst|H_count [8]) ) + ( \soc_inst|pix1|Add1~27 ) + ( \soc_inst|pix1|Add1~26 ))
+// \soc_inst|pix1|Add1~30 = CARRY(( !\raz_inst|V_count [1] $ (!\raz_inst|H_count [8]) ) + ( \soc_inst|pix1|Add1~27 ) + ( \soc_inst|pix1|Add1~26 ))
+// \soc_inst|pix1|Add1~31 = SHARE((\raz_inst|V_count [1] & \raz_inst|H_count [8]))
+
+ .dataa(!\raz_inst|V_count [1]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\raz_inst|H_count [8]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|pix1|Add1~26 ),
+ .sharein(\soc_inst|pix1|Add1~27 ),
+ .combout(),
+ .sumout(\soc_inst|pix1|Add1~29_sumout ),
+ .cout(\soc_inst|pix1|Add1~30 ),
+ .shareout(\soc_inst|pix1|Add1~31 ));
+// synopsys translate_off
+defparam \soc_inst|pix1|Add1~29 .extended_lut = "off";
+defparam \soc_inst|pix1|Add1~29 .lut_mask = 64'h00000055000055AA;
+defparam \soc_inst|pix1|Add1~29 .shared_arith = "on";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y15_N6
+cyclonev_lcell_comb \soc_inst|pix1|Add1~33 (
+// Equation(s):
+// \soc_inst|pix1|Add1~33_sumout = SUM(( !\raz_inst|V_count [0] $ (!\raz_inst|V_count [2] $ (\raz_inst|H_count [9])) ) + ( \soc_inst|pix1|Add1~31 ) + ( \soc_inst|pix1|Add1~30 ))
+// \soc_inst|pix1|Add1~34 = CARRY(( !\raz_inst|V_count [0] $ (!\raz_inst|V_count [2] $ (\raz_inst|H_count [9])) ) + ( \soc_inst|pix1|Add1~31 ) + ( \soc_inst|pix1|Add1~30 ))
+// \soc_inst|pix1|Add1~35 = SHARE((!\raz_inst|V_count [0] & (\raz_inst|V_count [2] & \raz_inst|H_count [9])) # (\raz_inst|V_count [0] & ((\raz_inst|H_count [9]) # (\raz_inst|V_count [2]))))
+
+ .dataa(!\raz_inst|V_count [0]),
+ .datab(gnd),
+ .datac(!\raz_inst|V_count [2]),
+ .datad(!\raz_inst|H_count [9]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|pix1|Add1~30 ),
+ .sharein(\soc_inst|pix1|Add1~31 ),
+ .combout(),
+ .sumout(\soc_inst|pix1|Add1~33_sumout ),
+ .cout(\soc_inst|pix1|Add1~34 ),
+ .shareout(\soc_inst|pix1|Add1~35 ));
+// synopsys translate_off
+defparam \soc_inst|pix1|Add1~33 .extended_lut = "off";
+defparam \soc_inst|pix1|Add1~33 .lut_mask = 64'h0000055F00005AA5;
+defparam \soc_inst|pix1|Add1~33 .shared_arith = "on";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y15_N9
+cyclonev_lcell_comb \soc_inst|pix1|Add1~37 (
+// Equation(s):
+// \soc_inst|pix1|Add1~37_sumout = SUM(( !\raz_inst|V_count [3] $ (!\raz_inst|V_count [1]) ) + ( \soc_inst|pix1|Add1~35 ) + ( \soc_inst|pix1|Add1~34 ))
+// \soc_inst|pix1|Add1~38 = CARRY(( !\raz_inst|V_count [3] $ (!\raz_inst|V_count [1]) ) + ( \soc_inst|pix1|Add1~35 ) + ( \soc_inst|pix1|Add1~34 ))
+// \soc_inst|pix1|Add1~39 = SHARE((\raz_inst|V_count [3] & \raz_inst|V_count [1]))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\raz_inst|V_count [3]),
+ .datad(!\raz_inst|V_count [1]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|pix1|Add1~34 ),
+ .sharein(\soc_inst|pix1|Add1~35 ),
+ .combout(),
+ .sumout(\soc_inst|pix1|Add1~37_sumout ),
+ .cout(\soc_inst|pix1|Add1~38 ),
+ .shareout(\soc_inst|pix1|Add1~39 ));
+// synopsys translate_off
+defparam \soc_inst|pix1|Add1~37 .extended_lut = "off";
+defparam \soc_inst|pix1|Add1~37 .lut_mask = 64'h0000000F00000FF0;
+defparam \soc_inst|pix1|Add1~37 .shared_arith = "on";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y15_N12
+cyclonev_lcell_comb \soc_inst|pix1|Add1~41 (
+// Equation(s):
+// \soc_inst|pix1|Add1~41_sumout = SUM(( !\raz_inst|V_count [4] $ (!\raz_inst|V_count [2]) ) + ( \soc_inst|pix1|Add1~39 ) + ( \soc_inst|pix1|Add1~38 ))
+// \soc_inst|pix1|Add1~42 = CARRY(( !\raz_inst|V_count [4] $ (!\raz_inst|V_count [2]) ) + ( \soc_inst|pix1|Add1~39 ) + ( \soc_inst|pix1|Add1~38 ))
+// \soc_inst|pix1|Add1~43 = SHARE((\raz_inst|V_count [4] & \raz_inst|V_count [2]))
+
+ .dataa(gnd),
+ .datab(!\raz_inst|V_count [4]),
+ .datac(gnd),
+ .datad(!\raz_inst|V_count [2]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|pix1|Add1~38 ),
+ .sharein(\soc_inst|pix1|Add1~39 ),
+ .combout(),
+ .sumout(\soc_inst|pix1|Add1~41_sumout ),
+ .cout(\soc_inst|pix1|Add1~42 ),
+ .shareout(\soc_inst|pix1|Add1~43 ));
+// synopsys translate_off
+defparam \soc_inst|pix1|Add1~41 .extended_lut = "off";
+defparam \soc_inst|pix1|Add1~41 .lut_mask = 64'h00000033000033CC;
+defparam \soc_inst|pix1|Add1~41 .shared_arith = "on";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y15_N15
+cyclonev_lcell_comb \soc_inst|pix1|Add1~45 (
+// Equation(s):
+// \soc_inst|pix1|Add1~45_sumout = SUM(( !\raz_inst|V_count [5] $ (!\raz_inst|V_count [3]) ) + ( \soc_inst|pix1|Add1~43 ) + ( \soc_inst|pix1|Add1~42 ))
+// \soc_inst|pix1|Add1~46 = CARRY(( !\raz_inst|V_count [5] $ (!\raz_inst|V_count [3]) ) + ( \soc_inst|pix1|Add1~43 ) + ( \soc_inst|pix1|Add1~42 ))
+// \soc_inst|pix1|Add1~47 = SHARE((\raz_inst|V_count [5] & \raz_inst|V_count [3]))
+
+ .dataa(!\raz_inst|V_count [5]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\raz_inst|V_count [3]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|pix1|Add1~42 ),
+ .sharein(\soc_inst|pix1|Add1~43 ),
+ .combout(),
+ .sumout(\soc_inst|pix1|Add1~45_sumout ),
+ .cout(\soc_inst|pix1|Add1~46 ),
+ .shareout(\soc_inst|pix1|Add1~47 ));
+// synopsys translate_off
+defparam \soc_inst|pix1|Add1~45 .extended_lut = "off";
+defparam \soc_inst|pix1|Add1~45 .lut_mask = 64'h00000055000055AA;
+defparam \soc_inst|pix1|Add1~45 .shared_arith = "on";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y15_N18
+cyclonev_lcell_comb \soc_inst|pix1|Add1~17 (
+// Equation(s):
+// \soc_inst|pix1|Add1~17_sumout = SUM(( !\raz_inst|V_count [4] $ (!\raz_inst|V_count [6]) ) + ( \soc_inst|pix1|Add1~47 ) + ( \soc_inst|pix1|Add1~46 ))
+// \soc_inst|pix1|Add1~18 = CARRY(( !\raz_inst|V_count [4] $ (!\raz_inst|V_count [6]) ) + ( \soc_inst|pix1|Add1~47 ) + ( \soc_inst|pix1|Add1~46 ))
+// \soc_inst|pix1|Add1~19 = SHARE((\raz_inst|V_count [4] & \raz_inst|V_count [6]))
+
+ .dataa(gnd),
+ .datab(!\raz_inst|V_count [4]),
+ .datac(gnd),
+ .datad(!\raz_inst|V_count [6]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|pix1|Add1~46 ),
+ .sharein(\soc_inst|pix1|Add1~47 ),
+ .combout(),
+ .sumout(\soc_inst|pix1|Add1~17_sumout ),
+ .cout(\soc_inst|pix1|Add1~18 ),
+ .shareout(\soc_inst|pix1|Add1~19 ));
+// synopsys translate_off
+defparam \soc_inst|pix1|Add1~17 .extended_lut = "off";
+defparam \soc_inst|pix1|Add1~17 .lut_mask = 64'h00000033000033CC;
+defparam \soc_inst|pix1|Add1~17 .shared_arith = "on";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y15_N21
+cyclonev_lcell_comb \soc_inst|pix1|Add1~21 (
+// Equation(s):
+// \soc_inst|pix1|Add1~21_sumout = SUM(( !\raz_inst|V_count [7] $ (!\raz_inst|V_count [5]) ) + ( \soc_inst|pix1|Add1~19 ) + ( \soc_inst|pix1|Add1~18 ))
+// \soc_inst|pix1|Add1~22 = CARRY(( !\raz_inst|V_count [7] $ (!\raz_inst|V_count [5]) ) + ( \soc_inst|pix1|Add1~19 ) + ( \soc_inst|pix1|Add1~18 ))
+// \soc_inst|pix1|Add1~23 = SHARE((\raz_inst|V_count [7] & \raz_inst|V_count [5]))
+
+ .dataa(!\raz_inst|V_count [7]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\raz_inst|V_count [5]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|pix1|Add1~18 ),
+ .sharein(\soc_inst|pix1|Add1~19 ),
+ .combout(),
+ .sumout(\soc_inst|pix1|Add1~21_sumout ),
+ .cout(\soc_inst|pix1|Add1~22 ),
+ .shareout(\soc_inst|pix1|Add1~23 ));
+// synopsys translate_off
+defparam \soc_inst|pix1|Add1~21 .extended_lut = "off";
+defparam \soc_inst|pix1|Add1~21 .lut_mask = 64'h00000055000055AA;
+defparam \soc_inst|pix1|Add1~21 .shared_arith = "on";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y15_N24
+cyclonev_lcell_comb \soc_inst|pix1|Add1~13 (
+// Equation(s):
+// \soc_inst|pix1|Add1~13_sumout = SUM(( !\raz_inst|V_count [6] $ (!\raz_inst|V_count [8]) ) + ( \soc_inst|pix1|Add1~23 ) + ( \soc_inst|pix1|Add1~22 ))
+// \soc_inst|pix1|Add1~14 = CARRY(( !\raz_inst|V_count [6] $ (!\raz_inst|V_count [8]) ) + ( \soc_inst|pix1|Add1~23 ) + ( \soc_inst|pix1|Add1~22 ))
+// \soc_inst|pix1|Add1~15 = SHARE((\raz_inst|V_count [6] & \raz_inst|V_count [8]))
+
+ .dataa(gnd),
+ .datab(!\raz_inst|V_count [6]),
+ .datac(gnd),
+ .datad(!\raz_inst|V_count [8]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|pix1|Add1~22 ),
+ .sharein(\soc_inst|pix1|Add1~23 ),
+ .combout(),
+ .sumout(\soc_inst|pix1|Add1~13_sumout ),
+ .cout(\soc_inst|pix1|Add1~14 ),
+ .shareout(\soc_inst|pix1|Add1~15 ));
+// synopsys translate_off
+defparam \soc_inst|pix1|Add1~13 .extended_lut = "off";
+defparam \soc_inst|pix1|Add1~13 .lut_mask = 64'h00000033000033CC;
+defparam \soc_inst|pix1|Add1~13 .shared_arith = "on";
+// synopsys translate_on
+
+// Location: FF_X30_Y15_N26
+dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|pix1|Add1~13_sumout ),
+ .asdata(vcc),
+ .clrn(vcc),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y5_N6
+cyclonev_lcell_comb \soc_inst|pix1|always0~0 (
+// Equation(s):
+// \soc_inst|pix1|always0~0_combout = ( \soc_inst|m0_1|u_logic|htrans_o[1]~0_combout & ( \soc_inst|m0_1|u_logic|S6ovx4~2_combout ) ) # ( !\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout & ( \soc_inst|m0_1|u_logic|S6ovx4~2_combout & (
+// (!\soc_inst|m0_1|u_logic|E7mwx4~combout ) # ((!\soc_inst|interconnect_1|HREADY~0_combout ) # (!\soc_inst|interconnect_1|LessThan1~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|htrans_o[1]~0_combout & ( !\soc_inst|m0_1|u_logic|S6ovx4~2_combout ) ) # (
+// !\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout & ( !\soc_inst|m0_1|u_logic|S6ovx4~2_combout & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # ((!\soc_inst|interconnect_1|LessThan1~0_combout ) # ((!\soc_inst|m0_1|u_logic|S6ovx4~1_combout &
+// !\soc_inst|m0_1|u_logic|E7mwx4~combout ))) ) ) )
+
+ .dataa(!\soc_inst|m0_1|u_logic|S6ovx4~1_combout ),
+ .datab(!\soc_inst|m0_1|u_logic|E7mwx4~combout ),
+ .datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+ .datad(!\soc_inst|interconnect_1|LessThan1~0_combout ),
+ .datae(!\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout ),
+ .dataf(!\soc_inst|m0_1|u_logic|S6ovx4~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|always0~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|always0~0 .extended_lut = "off";
+defparam \soc_inst|pix1|always0~0 .lut_mask = 64'hFFF8FFFFFFFCFFFF;
+defparam \soc_inst|pix1|always0~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X19_Y5_N38
+dffeas \soc_inst|pix1|word_address[15] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Bv0wx4~combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\soc_inst|pix1|always0~0_combout ),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|pix1|word_address [15]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|word_address[15] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|word_address[15] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X18_Y6_N17
+dffeas \soc_inst|pix1|word_address[13] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|haddr_o~3_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\soc_inst|pix1|always0~0_combout ),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|pix1|word_address [13]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|word_address[13] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|word_address[13] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X19_Y5_N58
+dffeas \soc_inst|pix1|write_enable (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\soc_inst|pix1|always0~0_combout ),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|pix1|write_enable~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|write_enable .is_wysiwyg = "true";
+defparam \soc_inst|pix1|write_enable .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X31_Y6_N41
+dffeas \soc_inst|pix1|word_address[16] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Fq0wx4~combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\soc_inst|pix1|always0~0_combout ),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|pix1|word_address [16]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|word_address[16] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|word_address[16] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X30_Y5_N17
+dffeas \soc_inst|pix1|word_address[17] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Ql0wx4~combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\soc_inst|pix1|always0~0_combout ),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|pix1|word_address [17]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|word_address[17] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|word_address[17] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X28_Y5_N17
+dffeas \soc_inst|pix1|word_address[18] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Ug0wx4~combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\soc_inst|pix1|always0~0_combout ),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|pix1|word_address [18]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|word_address[18] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|word_address[18] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y15_N24
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout = ( \soc_inst|pix1|word_address [18] & ( (\soc_inst|pix1|write_enable~q & (!\soc_inst|pix1|word_address [16] & !\soc_inst|pix1|word_address [17])) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|pix1|write_enable~q ),
+ .datac(!\soc_inst|pix1|word_address [16]),
+ .datad(!\soc_inst|pix1|word_address [17]),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|word_address [18]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0 .lut_mask = 64'h0000000030003000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X21_Y5_N41
+dffeas \soc_inst|pix1|word_address[14] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|Vpovx4~combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\soc_inst|pix1|always0~0_combout ),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|pix1|word_address [14]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|word_address[14] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|word_address[14] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y11_N30
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0_combout = ( !\soc_inst|pix1|word_address [14] & ( (\soc_inst|pix1|word_address [15] & (\soc_inst|pix1|word_address [13] &
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|pix1|word_address [15]),
+ .datac(!\soc_inst|pix1|word_address [13]),
+ .datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|word_address [14]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0 .lut_mask = 64'h0003000300000000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X19_Y5_N14
+dffeas \soc_inst|pix1|word_address[0] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Fvovx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\soc_inst|pix1|always0~0_combout ),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|pix1|word_address [0]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|word_address[0] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|word_address[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X19_Y5_N8
+dffeas \soc_inst|pix1|word_address[1] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Ekovx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\soc_inst|pix1|always0~0_combout ),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|pix1|word_address [1]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|word_address[1] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|word_address[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X19_Y5_N4
+dffeas \soc_inst|pix1|word_address[2] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Yuovx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\soc_inst|pix1|always0~0_combout ),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|pix1|word_address [2]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|word_address[2] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|word_address[2] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X19_Y5_N53
+dffeas \soc_inst|pix1|word_address[3] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Rxzvx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\soc_inst|pix1|always0~0_combout ),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|pix1|word_address [3]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|word_address[3] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|word_address[3] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X19_Y5_N19
+dffeas \soc_inst|pix1|word_address[4] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Hszvx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\soc_inst|pix1|always0~0_combout ),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|pix1|word_address [4]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|word_address[4] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|word_address[4] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X18_Y5_N5
+dffeas \soc_inst|pix1|word_address[5] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|S4qvx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\soc_inst|pix1|always0~0_combout ),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|pix1|word_address [5]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|word_address[5] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|word_address[5] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X19_Y5_N40
+dffeas \soc_inst|pix1|word_address[6] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\soc_inst|pix1|always0~0_combout ),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|pix1|word_address [6]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|word_address[6] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|word_address[6] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X19_Y5_N50
+dffeas \soc_inst|pix1|word_address[7] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Xxovx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\soc_inst|pix1|always0~0_combout ),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|pix1|word_address [7]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|word_address[7] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|word_address[7] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X18_Y5_N53
+dffeas \soc_inst|pix1|word_address[8] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Jxovx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\soc_inst|pix1|always0~0_combout ),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|pix1|word_address [8]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|word_address[8] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|word_address[8] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X19_Y5_N23
+dffeas \soc_inst|pix1|word_address[9] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Owovx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\soc_inst|pix1|always0~0_combout ),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|pix1|word_address [9]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|word_address[9] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|word_address[9] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X19_Y5_N46
+dffeas \soc_inst|pix1|word_address[10] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|Cqovx4~combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\soc_inst|pix1|always0~0_combout ),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|pix1|word_address [10]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|word_address[10] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|word_address[10] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X19_Y5_N10
+dffeas \soc_inst|pix1|word_address[11] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\soc_inst|m0_1|u_logic|haddr_o~5_combout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\soc_inst|pix1|always0~0_combout ),
+ .sload(vcc),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|pix1|word_address [11]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|word_address[11] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|word_address[11] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X34_Y15_N34
+dffeas \raz_inst|H_count[0] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(gnd),
+ .asdata(\raz_inst|Add0~25_sumout ),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\raz_inst|LessThan0~3_combout ),
+ .sload(vcc),
+ .ena(!tick_count[0]),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\raz_inst|H_count [0]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|H_count[0] .is_wysiwyg = "true";
+defparam \raz_inst|H_count[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: M10K_X26_Y10_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({gnd,\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],\soc_inst|pix1|word_address [3],
+\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(2'b00),
+ .portbaddr({\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],\raz_inst|H_count [2],
+\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .port_a_address_width = 12;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .port_a_data_width = 2;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .port_a_last_address = 4095;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .port_b_address_width = 12;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .port_b_data_width = 2;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .port_b_last_address = 4095;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: FF_X30_Y15_N20
+dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|pix1|Add1~17_sumout ),
+ .asdata(vcc),
+ .clrn(vcc),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y15_N27
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0_combout = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout & ( (!\soc_inst|pix1|word_address [13] & (\soc_inst|pix1|word_address [15] &
+// !\soc_inst|pix1|word_address [14])) ) )
+
+ .dataa(!\soc_inst|pix1|word_address [13]),
+ .datab(gnd),
+ .datac(!\soc_inst|pix1|word_address [15]),
+ .datad(!\soc_inst|pix1|word_address [14]),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0 .lut_mask = 64'h000000000A000A00;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y6_N56
+dffeas \soc_inst|pix1|word_address[12] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|m0_1|u_logic|haddr_o~4_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(\soc_inst|pix1|always0~0_combout ),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|pix1|word_address [12]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|word_address[12] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|word_address[12] .power_up = "low";
+// synopsys translate_on
+
+// Location: M10K_X41_Y15_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: FF_X30_Y15_N23
+dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|pix1|Add1~21_sumout ),
+ .asdata(vcc),
+ .clrn(vcc),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y11_N33
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1_combout = ( \soc_inst|pix1|word_address [14] & ( (!\soc_inst|pix1|word_address [13] & (!\soc_inst|pix1|word_address [15] &
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout )) ) )
+
+ .dataa(!\soc_inst|pix1|word_address [13]),
+ .datab(!\soc_inst|pix1|word_address [15]),
+ .datac(gnd),
+ .datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|word_address [14]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1 .lut_mask = 64'h0000000000880088;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X26_Y12_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y11_N51
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0_combout = ( !\soc_inst|pix1|word_address [14] & ( (\soc_inst|pix1|word_address [13] & (!\soc_inst|pix1|word_address [15] &
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout )) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|pix1|word_address [13]),
+ .datac(!\soc_inst|pix1|word_address [15]),
+ .datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|word_address [14]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0 .lut_mask = 64'h0030003000000000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X14_Y13_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y11_N48
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0_combout = ( \soc_inst|pix1|word_address [14] & ( (\soc_inst|pix1|word_address [13] & (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout &
+// !\soc_inst|pix1|word_address [15])) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|pix1|word_address [13]),
+ .datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout ),
+ .datad(!\soc_inst|pix1|word_address [15]),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|word_address [14]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0 .lut_mask = 64'h0000000003000300;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X26_Y11_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y11_N42
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0_combout = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout & ( !\soc_inst|pix1|word_address [14] & ( (!\soc_inst|pix1|word_address [13] &
+// !\soc_inst|pix1|word_address [15]) ) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|pix1|word_address [13]),
+ .datac(gnd),
+ .datad(!\soc_inst|pix1|word_address [15]),
+ .datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout ),
+ .dataf(!\soc_inst|pix1|word_address [14]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0 .lut_mask = 64'h0000CC0000000000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X14_Y14_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y15_N42
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout = ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32~portbdataout & (
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34~portbdataout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] &
+// ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35~portbdataout ))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32~portbdataout & (
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]) # (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33~portbdataout ) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & (
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32~portbdataout & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34~portbdataout )) #
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35~portbdataout ))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & (
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32~portbdataout & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33~portbdataout ) ) ) )
+
+ .dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]),
+ .datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34~portbdataout ),
+ .datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33~portbdataout ),
+ .datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35~portbdataout ),
+ .datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1]),
+ .dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32~portbdataout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0 .lut_mask = 64'h05052277AFAF2277;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y15_N36
+cyclonev_lcell_comb \raz_inst|Red~0 (
+// Equation(s):
+// \raz_inst|Red~0_combout = ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] ) ) ) # (
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]) #
+// ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] &
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37~portbdataout ))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout & (
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36~portbdataout ))) #
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37~portbdataout )))) ) ) )
+
+ .dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]),
+ .datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37~portbdataout ),
+ .datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]),
+ .datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36~portbdataout ),
+ .datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1]),
+ .dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|Red~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|Red~0 .extended_lut = "off";
+defparam \raz_inst|Red~0 .lut_mask = 64'h01510000ABFBAAAA;
+defparam \raz_inst|Red~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y15_N48
+cyclonev_lcell_comb \raz_inst|always0~0 (
+// Equation(s):
+// \raz_inst|always0~0_combout = ( \raz_inst|Add0~33_sumout & ( (\raz_inst|Add0~41_sumout & (!\raz_inst|LessThan0~3_combout & \raz_inst|Add0~37_sumout )) ) )
+
+ .dataa(gnd),
+ .datab(!\raz_inst|Add0~41_sumout ),
+ .datac(!\raz_inst|LessThan0~3_combout ),
+ .datad(!\raz_inst|Add0~37_sumout ),
+ .datae(gnd),
+ .dataf(!\raz_inst|Add0~33_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|always0~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|always0~0 .extended_lut = "off";
+defparam \raz_inst|always0~0 .lut_mask = 64'h0000000000300030;
+defparam \raz_inst|always0~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y15_N39
+cyclonev_lcell_comb \raz_inst|LessThan4~0 (
+// Equation(s):
+// \raz_inst|LessThan4~0_combout = ( !\raz_inst|LessThan0~3_combout & ( ((\raz_inst|Add0~25_sumout & \raz_inst|Add0~29_sumout )) # (\raz_inst|Add0~21_sumout ) ) )
+
+ .dataa(!\raz_inst|Add0~25_sumout ),
+ .datab(gnd),
+ .datac(!\raz_inst|Add0~21_sumout ),
+ .datad(!\raz_inst|Add0~29_sumout ),
+ .datae(gnd),
+ .dataf(!\raz_inst|LessThan0~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|LessThan4~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|LessThan4~0 .extended_lut = "off";
+defparam \raz_inst|LessThan4~0 .lut_mask = 64'h0F5F0F5F00000000;
+defparam \raz_inst|LessThan4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y15_N45
+cyclonev_lcell_comb \raz_inst|always0~1 (
+// Equation(s):
+// \raz_inst|always0~1_combout = ( \raz_inst|LessThan4~0_combout & ( \raz_inst|Add0~13_sumout & ( ((\raz_inst|Add0~5_sumout & ((\raz_inst|Add0~17_sumout ) # (\raz_inst|always0~0_combout )))) # (\raz_inst|Add0~9_sumout ) ) ) ) # (
+// !\raz_inst|LessThan4~0_combout & ( \raz_inst|Add0~13_sumout & ( ((\raz_inst|Add0~5_sumout & \raz_inst|Add0~17_sumout )) # (\raz_inst|Add0~9_sumout ) ) ) )
+
+ .dataa(!\raz_inst|always0~0_combout ),
+ .datab(!\raz_inst|Add0~9_sumout ),
+ .datac(!\raz_inst|Add0~5_sumout ),
+ .datad(!\raz_inst|Add0~17_sumout ),
+ .datae(!\raz_inst|LessThan4~0_combout ),
+ .dataf(!\raz_inst|Add0~13_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|always0~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|always0~1 .extended_lut = "off";
+defparam \raz_inst|always0~1 .lut_mask = 64'h00000000333F373F;
+defparam \raz_inst|always0~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y15_N39
+cyclonev_lcell_comb \raz_inst|LessThan8~2 (
+// Equation(s):
+// \raz_inst|LessThan8~2_combout = ( !\raz_inst|Add1~21_sumout & ( !\raz_inst|Add1~17_sumout ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\raz_inst|Add1~17_sumout ),
+ .datae(gnd),
+ .dataf(!\raz_inst|Add1~21_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|LessThan8~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|LessThan8~2 .extended_lut = "off";
+defparam \raz_inst|LessThan8~2 .lut_mask = 64'hFF00FF0000000000;
+defparam \raz_inst|LessThan8~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y15_N36
+cyclonev_lcell_comb \raz_inst|LessThan8~3 (
+// Equation(s):
+// \raz_inst|LessThan8~3_combout = ( \raz_inst|LessThan8~2_combout & ( \raz_inst|Equal0~3_combout & ( (!\raz_inst|V_count [9] & ((!\raz_inst|V_count [10]) # ((\raz_inst|Equal0~1_combout & \raz_inst|Equal0~0_combout )))) # (\raz_inst|V_count [9] &
+// (((\raz_inst|Equal0~1_combout & \raz_inst|Equal0~0_combout )))) ) ) ) # ( !\raz_inst|LessThan8~2_combout & ( \raz_inst|Equal0~3_combout & ( (!\raz_inst|V_count [9] & (!\raz_inst|V_count [10] & ((!\raz_inst|Equal0~1_combout ) #
+// (!\raz_inst|Equal0~0_combout )))) ) ) ) # ( \raz_inst|LessThan8~2_combout & ( !\raz_inst|Equal0~3_combout & ( (!\raz_inst|V_count [9] & !\raz_inst|V_count [10]) ) ) ) # ( !\raz_inst|LessThan8~2_combout & ( !\raz_inst|Equal0~3_combout & (
+// (!\raz_inst|V_count [9] & !\raz_inst|V_count [10]) ) ) )
+
+ .dataa(!\raz_inst|V_count [9]),
+ .datab(!\raz_inst|V_count [10]),
+ .datac(!\raz_inst|Equal0~1_combout ),
+ .datad(!\raz_inst|Equal0~0_combout ),
+ .datae(!\raz_inst|LessThan8~2_combout ),
+ .dataf(!\raz_inst|Equal0~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|LessThan8~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|LessThan8~3 .extended_lut = "off";
+defparam \raz_inst|LessThan8~3 .lut_mask = 64'h888888888880888F;
+defparam \raz_inst|LessThan8~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y15_N30
+cyclonev_lcell_comb \raz_inst|Equal0~2 (
+// Equation(s):
+// \raz_inst|Equal0~2_combout = ( \raz_inst|Add0~5_sumout & ( \raz_inst|Add0~13_sumout & ( (!\raz_inst|LessThan0~3_combout & (!\raz_inst|Add0~9_sumout & (\raz_inst|Equal0~1_combout & !\raz_inst|Add0~1_sumout ))) ) ) )
+
+ .dataa(!\raz_inst|LessThan0~3_combout ),
+ .datab(!\raz_inst|Add0~9_sumout ),
+ .datac(!\raz_inst|Equal0~1_combout ),
+ .datad(!\raz_inst|Add0~1_sumout ),
+ .datae(!\raz_inst|Add0~5_sumout ),
+ .dataf(!\raz_inst|Add0~13_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|Equal0~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|Equal0~2 .extended_lut = "off";
+defparam \raz_inst|Equal0~2 .lut_mask = 64'h0000000000000800;
+defparam \raz_inst|Equal0~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y15_N42
+cyclonev_lcell_comb \raz_inst|LessThan8~1 (
+// Equation(s):
+// \raz_inst|LessThan8~1_combout = ( \raz_inst|Equal0~0_combout & ( \raz_inst|Equal0~2_combout & ( (\raz_inst|Add1~13_sumout & \raz_inst|Add1~9_sumout ) ) ) ) # ( !\raz_inst|Equal0~0_combout & ( \raz_inst|Equal0~2_combout & ( (\raz_inst|V_count [8] &
+// \raz_inst|V_count [7]) ) ) ) # ( \raz_inst|Equal0~0_combout & ( !\raz_inst|Equal0~2_combout & ( (\raz_inst|V_count [8] & \raz_inst|V_count [7]) ) ) ) # ( !\raz_inst|Equal0~0_combout & ( !\raz_inst|Equal0~2_combout & ( (\raz_inst|V_count [8] &
+// \raz_inst|V_count [7]) ) ) )
+
+ .dataa(!\raz_inst|Add1~13_sumout ),
+ .datab(!\raz_inst|V_count [8]),
+ .datac(!\raz_inst|V_count [7]),
+ .datad(!\raz_inst|Add1~9_sumout ),
+ .datae(!\raz_inst|Equal0~0_combout ),
+ .dataf(!\raz_inst|Equal0~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|LessThan8~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|LessThan8~1 .extended_lut = "off";
+defparam \raz_inst|LessThan8~1 .lut_mask = 64'h0303030303030055;
+defparam \raz_inst|LessThan8~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y15_N48
+cyclonev_lcell_comb \raz_inst|LessThan8~0 (
+// Equation(s):
+// \raz_inst|LessThan8~0_combout = ( \raz_inst|Equal0~0_combout & ( \raz_inst|Equal0~2_combout & ( (\raz_inst|Add1~1_sumout & \raz_inst|Add1~5_sumout ) ) ) ) # ( !\raz_inst|Equal0~0_combout & ( \raz_inst|Equal0~2_combout & ( (\raz_inst|V_count [6] &
+// \raz_inst|V_count [5]) ) ) ) # ( \raz_inst|Equal0~0_combout & ( !\raz_inst|Equal0~2_combout & ( (\raz_inst|V_count [6] & \raz_inst|V_count [5]) ) ) ) # ( !\raz_inst|Equal0~0_combout & ( !\raz_inst|Equal0~2_combout & ( (\raz_inst|V_count [6] &
+// \raz_inst|V_count [5]) ) ) )
+
+ .dataa(!\raz_inst|V_count [6]),
+ .datab(!\raz_inst|V_count [5]),
+ .datac(!\raz_inst|Add1~1_sumout ),
+ .datad(!\raz_inst|Add1~5_sumout ),
+ .datae(!\raz_inst|Equal0~0_combout ),
+ .dataf(!\raz_inst|Equal0~2_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|LessThan8~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|LessThan8~0 .extended_lut = "off";
+defparam \raz_inst|LessThan8~0 .lut_mask = 64'h111111111111000F;
+defparam \raz_inst|LessThan8~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y15_N24
+cyclonev_lcell_comb \raz_inst|LessThan8~4 (
+// Equation(s):
+// \raz_inst|LessThan8~4_combout = ( \raz_inst|LessThan8~1_combout & ( \raz_inst|LessThan8~0_combout & ( (\raz_inst|always0~4_combout & ((\raz_inst|Add0~1_sumout ) # (\raz_inst|always0~1_combout ))) ) ) ) # ( !\raz_inst|LessThan8~1_combout & (
+// \raz_inst|LessThan8~0_combout & ( ((\raz_inst|always0~4_combout & ((\raz_inst|Add0~1_sumout ) # (\raz_inst|always0~1_combout )))) # (\raz_inst|LessThan8~3_combout ) ) ) ) # ( \raz_inst|LessThan8~1_combout & ( !\raz_inst|LessThan8~0_combout & (
+// ((\raz_inst|always0~4_combout & ((\raz_inst|Add0~1_sumout ) # (\raz_inst|always0~1_combout )))) # (\raz_inst|LessThan8~3_combout ) ) ) ) # ( !\raz_inst|LessThan8~1_combout & ( !\raz_inst|LessThan8~0_combout & ( ((\raz_inst|always0~4_combout &
+// ((\raz_inst|Add0~1_sumout ) # (\raz_inst|always0~1_combout )))) # (\raz_inst|LessThan8~3_combout ) ) ) )
+
+ .dataa(!\raz_inst|always0~1_combout ),
+ .datab(!\raz_inst|always0~4_combout ),
+ .datac(!\raz_inst|LessThan8~3_combout ),
+ .datad(!\raz_inst|Add0~1_sumout ),
+ .datae(!\raz_inst|LessThan8~1_combout ),
+ .dataf(!\raz_inst|LessThan8~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|LessThan8~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|LessThan8~4 .extended_lut = "off";
+defparam \raz_inst|LessThan8~4 .lut_mask = 64'h1F3F1F3F1F3F1133;
+defparam \raz_inst|LessThan8~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X33_Y15_N26
+dffeas \raz_inst|video_on_V (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\raz_inst|LessThan8~4_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(!tick_count[0]),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\raz_inst|video_on_V~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|video_on_V .is_wysiwyg = "true";
+defparam \raz_inst|video_on_V .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y15_N21
+cyclonev_lcell_comb \raz_inst|LessThan7~0 (
+// Equation(s):
+// \raz_inst|LessThan7~0_combout = ( \raz_inst|Add0~13_sumout & ( ((!\raz_inst|Add0~1_sumout & (!\raz_inst|Add0~9_sumout & !\raz_inst|Add0~5_sumout ))) # (\raz_inst|LessThan0~3_combout ) ) ) # ( !\raz_inst|Add0~13_sumout & ( (!\raz_inst|Add0~1_sumout )
+// # (\raz_inst|LessThan0~3_combout ) ) )
+
+ .dataa(!\raz_inst|LessThan0~3_combout ),
+ .datab(!\raz_inst|Add0~1_sumout ),
+ .datac(!\raz_inst|Add0~9_sumout ),
+ .datad(!\raz_inst|Add0~5_sumout ),
+ .datae(gnd),
+ .dataf(!\raz_inst|Add0~13_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|LessThan7~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|LessThan7~0 .extended_lut = "off";
+defparam \raz_inst|LessThan7~0 .lut_mask = 64'hDDDDDDDDD555D555;
+defparam \raz_inst|LessThan7~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X33_Y15_N22
+dffeas \raz_inst|video_on_H (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\raz_inst|LessThan7~0_combout ),
+ .asdata(vcc),
+ .clrn(\KEY[2]~inputCLKENA0_outclk ),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(!tick_count[0]),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\raz_inst|video_on_H~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|video_on_H .is_wysiwyg = "true";
+defparam \raz_inst|video_on_H .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y15_N15
+cyclonev_lcell_comb \raz_inst|VGA_BLANK_N (
+// Equation(s):
+// \raz_inst|VGA_BLANK_N~combout = ( \raz_inst|video_on_H~q & ( \raz_inst|video_on_V~q ) )
+
+ .dataa(!\raz_inst|video_on_V~q ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\raz_inst|video_on_H~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|VGA_BLANK_N~combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|VGA_BLANK_N .extended_lut = "off";
+defparam \raz_inst|VGA_BLANK_N .lut_mask = 64'h0000000055555555;
+defparam \raz_inst|VGA_BLANK_N .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y15_N57
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout = ( !\soc_inst|pix1|word_address [18] & ( (!\soc_inst|pix1|word_address [13] & (\soc_inst|pix1|write_enable~q & !\soc_inst|pix1|word_address [15])) ) )
+
+ .dataa(!\soc_inst|pix1|word_address [13]),
+ .datab(gnd),
+ .datac(!\soc_inst|pix1|write_enable~q ),
+ .datad(!\soc_inst|pix1|word_address [15]),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|word_address [18]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0 .lut_mask = 64'h0A000A0000000000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y17_N0
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0_combout = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout & ( (!\soc_inst|pix1|word_address [14] & (\soc_inst|pix1|word_address [17] &
+// \soc_inst|pix1|word_address [16])) ) )
+
+ .dataa(!\soc_inst|pix1|word_address [14]),
+ .datab(!\soc_inst|pix1|word_address [17]),
+ .datac(!\soc_inst|pix1|word_address [16]),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0 .lut_mask = 64'h0000000002020202;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X41_Y13_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: FF_X30_Y15_N19
+dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|pix1|Add1~17_sumout ),
+ .asdata(vcc),
+ .clrn(vcc),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y15_N12
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout = ( \soc_inst|pix1|write_enable~q & ( (!\soc_inst|pix1|word_address [18] & (\soc_inst|pix1|word_address [13] & !\soc_inst|pix1|word_address [15])) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|pix1|word_address [18]),
+ .datac(!\soc_inst|pix1|word_address [13]),
+ .datad(!\soc_inst|pix1|word_address [15]),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|write_enable~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0 .lut_mask = 64'h000000000C000C00;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y17_N39
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0_combout = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout & ( (\soc_inst|pix1|word_address [14] & (\soc_inst|pix1|word_address [17] &
+// \soc_inst|pix1|word_address [16])) ) )
+
+ .dataa(!\soc_inst|pix1|word_address [14]),
+ .datab(!\soc_inst|pix1|word_address [17]),
+ .datac(gnd),
+ .datad(!\soc_inst|pix1|word_address [16]),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0 .lut_mask = 64'h0000000000110011;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X41_Y14_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y17_N9
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0_combout = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout & ( (!\soc_inst|pix1|word_address [14] & (\soc_inst|pix1|word_address [17] &
+// \soc_inst|pix1|word_address [16])) ) )
+
+ .dataa(!\soc_inst|pix1|word_address [14]),
+ .datab(!\soc_inst|pix1|word_address [17]),
+ .datac(gnd),
+ .datad(!\soc_inst|pix1|word_address [16]),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0 .lut_mask = 64'h0000000000220022;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X41_Y16_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: FF_X30_Y15_N22
+dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|pix1|Add1~21_sumout ),
+ .asdata(vcc),
+ .clrn(vcc),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y17_N3
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0_combout = (\soc_inst|pix1|word_address [14] & (\soc_inst|pix1|word_address [17] & (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout &
+// \soc_inst|pix1|word_address [16])))
+
+ .dataa(!\soc_inst|pix1|word_address [14]),
+ .datab(!\soc_inst|pix1|word_address [17]),
+ .datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
+ .datad(!\soc_inst|pix1|word_address [16]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0 .lut_mask = 64'h0001000100010001;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X41_Y19_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y17_N48
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2_combout = ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q & ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26~portbdataout & (
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q ) # (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27~portbdataout ) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q & (
+// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26~portbdataout & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24~portbdataout )) #
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25~portbdataout ))) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q & (
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26~portbdataout & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q & \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27~portbdataout ) ) ) ) # (
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26~portbdataout & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q &
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24~portbdataout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25~portbdataout ))) ) ) )
+
+ .dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24~portbdataout ),
+ .datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q ),
+ .datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27~portbdataout ),
+ .datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25~portbdataout ),
+ .datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ),
+ .dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26~portbdataout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2 .lut_mask = 64'h447703034477CFCF;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X30_Y15_N25
+dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|pix1|Add1~13_sumout ),
+ .asdata(vcc),
+ .clrn(vcc),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y15_N9
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout = ( \soc_inst|pix1|write_enable~q & ( (!\soc_inst|pix1|word_address [14] & (!\soc_inst|pix1|word_address [13] & (!\soc_inst|pix1|word_address [18] & \soc_inst|pix1|word_address
+// [15]))) ) )
+
+ .dataa(!\soc_inst|pix1|word_address [14]),
+ .datab(!\soc_inst|pix1|word_address [13]),
+ .datac(!\soc_inst|pix1|word_address [18]),
+ .datad(!\soc_inst|pix1|word_address [15]),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|write_enable~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0 .lut_mask = 64'h0000000000800080;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y15_N21
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0_combout = ( \soc_inst|pix1|word_address [17] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout & ( \soc_inst|pix1|word_address [16] ) ) )
+
+ .dataa(!\soc_inst|pix1|word_address [16]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\soc_inst|pix1|word_address [17]),
+ .dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0 .lut_mask = 64'h0000000000005555;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X26_Y13_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y15_N15
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout = ( !\soc_inst|pix1|word_address [13] & ( (\soc_inst|pix1|write_enable~q & (!\soc_inst|pix1|word_address [18] & \soc_inst|pix1|word_address [15])) ) )
+
+ .dataa(!\soc_inst|pix1|write_enable~q ),
+ .datab(!\soc_inst|pix1|word_address [18]),
+ .datac(!\soc_inst|pix1|word_address [15]),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|word_address [13]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0 .lut_mask = 64'h0404040400000000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y15_N0
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0_combout = (\soc_inst|pix1|word_address [14] & (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout & (\soc_inst|pix1|word_address [16] &
+// \soc_inst|pix1|word_address [17])))
+
+ .dataa(!\soc_inst|pix1|word_address [14]),
+ .datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout ),
+ .datac(!\soc_inst|pix1|word_address [16]),
+ .datad(!\soc_inst|pix1|word_address [17]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0 .lut_mask = 64'h0001000100010001;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X26_Y16_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y15_N54
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout = ( \soc_inst|pix1|write_enable~q & ( (\soc_inst|pix1|word_address [13] & (!\soc_inst|pix1|word_address [18] & (!\soc_inst|pix1|word_address [14] & \soc_inst|pix1|word_address
+// [15]))) ) )
+
+ .dataa(!\soc_inst|pix1|word_address [13]),
+ .datab(!\soc_inst|pix1|word_address [18]),
+ .datac(!\soc_inst|pix1|word_address [14]),
+ .datad(!\soc_inst|pix1|word_address [15]),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|write_enable~q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0 .lut_mask = 64'h0000000000400040;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y15_N45
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0_combout = (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout & (\soc_inst|pix1|word_address [17] & \soc_inst|pix1|word_address [16]))
+
+ .dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout ),
+ .datab(!\soc_inst|pix1|word_address [17]),
+ .datac(gnd),
+ .datad(!\soc_inst|pix1|word_address [16]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0 .lut_mask = 64'h0011001100110011;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X38_Y14_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y15_N48
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout = ( !\soc_inst|pix1|word_address [18] & ( (\soc_inst|pix1|word_address [13] & (\soc_inst|pix1|write_enable~q & \soc_inst|pix1|word_address [15])) ) )
+
+ .dataa(!\soc_inst|pix1|word_address [13]),
+ .datab(!\soc_inst|pix1|write_enable~q ),
+ .datac(gnd),
+ .datad(!\soc_inst|pix1|word_address [15]),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|word_address [18]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0 .lut_mask = 64'h0011001100000000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y17_N42
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0_combout = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout & ( (\soc_inst|pix1|word_address [14] & (\soc_inst|pix1|word_address [17] &
+// \soc_inst|pix1|word_address [16])) ) )
+
+ .dataa(!\soc_inst|pix1|word_address [14]),
+ .datab(!\soc_inst|pix1|word_address [17]),
+ .datac(!\soc_inst|pix1|word_address [16]),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0 .lut_mask = 64'h0000000001010101;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X38_Y17_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y17_N18
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3_combout = ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31~portbdataout & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q & (
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29~portbdataout ) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31~portbdataout & (
+// \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q & \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29~portbdataout ) ) ) ) # (
+// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31~portbdataout & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q &
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28~portbdataout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30~portbdataout ))) ) ) ) # (
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31~portbdataout & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q &
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28~portbdataout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30~portbdataout ))) ) ) )
+
+ .dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28~portbdataout ),
+ .datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ),
+ .datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30~portbdataout ),
+ .datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29~portbdataout ),
+ .datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31~portbdataout ),
+ .dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3 .lut_mask = 64'h4747474700CC33FF;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y15_N39
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0_combout = ( \soc_inst|pix1|word_address [14] & ( (!\soc_inst|pix1|word_address [16] & (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout &
+// \soc_inst|pix1|word_address [17])) ) )
+
+ .dataa(!\soc_inst|pix1|word_address [16]),
+ .datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout ),
+ .datac(gnd),
+ .datad(!\soc_inst|pix1|word_address [17]),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|word_address [14]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0 .lut_mask = 64'h0000000000220022;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X26_Y19_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y15_N42
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0_combout = (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout & (\soc_inst|pix1|word_address [17] & !\soc_inst|pix1|word_address [16]))
+
+ .dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout ),
+ .datab(!\soc_inst|pix1|word_address [17]),
+ .datac(!\soc_inst|pix1|word_address [16]),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0 .lut_mask = 64'h1010101010101010;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X26_Y18_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y15_N51
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0_combout = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout & ( (!\soc_inst|pix1|word_address [16] & \soc_inst|pix1|word_address [17]) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|pix1|word_address [16]),
+ .datad(!\soc_inst|pix1|word_address [17]),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0 .lut_mask = 64'h0000000000F000F0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X38_Y12_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y17_N33
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0_combout = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout & ( (\soc_inst|pix1|word_address [14] & (\soc_inst|pix1|word_address [17] &
+// !\soc_inst|pix1|word_address [16])) ) )
+
+ .dataa(!\soc_inst|pix1|word_address [14]),
+ .datab(!\soc_inst|pix1|word_address [17]),
+ .datac(gnd),
+ .datad(!\soc_inst|pix1|word_address [16]),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0 .lut_mask = 64'h0000000011001100;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X41_Y21_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y17_N30
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1_combout = ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23~portbdataout & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q & (
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ) # (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21~portbdataout ) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23~portbdataout & (
+// \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21~portbdataout & !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ) ) ) ) # (
+// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23~portbdataout & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q &
+// ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22~portbdataout )) ) ) ) # (
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23~portbdataout & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q &
+// ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22~portbdataout )) ) ) )
+
+ .dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22~portbdataout ),
+ .datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21~portbdataout ),
+ .datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20~portbdataout ),
+ .datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ),
+ .datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23~portbdataout ),
+ .dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1 .lut_mask = 64'h0F550F55330033FF;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y17_N6
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0_combout = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout & ( (\soc_inst|pix1|word_address [17] & (!\soc_inst|pix1|word_address [14] &
+// !\soc_inst|pix1|word_address [16])) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|pix1|word_address [17]),
+ .datac(!\soc_inst|pix1|word_address [14]),
+ .datad(!\soc_inst|pix1|word_address [16]),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0 .lut_mask = 64'h0000000030003000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X41_Y12_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y17_N12
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0_combout = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout & ( (!\soc_inst|pix1|word_address [14] & (\soc_inst|pix1|word_address [17] &
+// !\soc_inst|pix1|word_address [16])) ) )
+
+ .dataa(!\soc_inst|pix1|word_address [14]),
+ .datab(!\soc_inst|pix1|word_address [17]),
+ .datac(!\soc_inst|pix1|word_address [16]),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0 .lut_mask = 64'h0000000020202020;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X26_Y20_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y17_N36
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0_combout = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout & ( (\soc_inst|pix1|word_address [14] & (\soc_inst|pix1|word_address [17] &
+// !\soc_inst|pix1|word_address [16])) ) )
+
+ .dataa(!\soc_inst|pix1|word_address [14]),
+ .datab(!\soc_inst|pix1|word_address [17]),
+ .datac(!\soc_inst|pix1|word_address [16]),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0 .lut_mask = 64'h0000000010101010;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X38_Y20_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y17_N15
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0_combout = (\soc_inst|pix1|word_address [14] & (\soc_inst|pix1|word_address [17] & (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout &
+// !\soc_inst|pix1|word_address [16])))
+
+ .dataa(!\soc_inst|pix1|word_address [14]),
+ .datab(!\soc_inst|pix1|word_address [17]),
+ .datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
+ .datad(!\soc_inst|pix1|word_address [16]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0 .lut_mask = 64'h0100010001000100;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X41_Y20_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y17_N36
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout = ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q & (
+// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19~portbdataout ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q & (
+// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17~portbdataout ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q & (
+// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18~portbdataout ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q & (
+// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout ) ) )
+
+ .dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17~portbdataout ),
+ .datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout ),
+ .datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19~portbdataout ),
+ .datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18~portbdataout ),
+ .datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ),
+ .dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0 .lut_mask = 64'h333300FF55550F0F;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y15_N27
+cyclonev_lcell_comb \soc_inst|pix1|Add1~9 (
+// Equation(s):
+// \soc_inst|pix1|Add1~9_sumout = SUM(( \raz_inst|V_count [7] ) + ( \soc_inst|pix1|Add1~15 ) + ( \soc_inst|pix1|Add1~14 ))
+// \soc_inst|pix1|Add1~10 = CARRY(( \raz_inst|V_count [7] ) + ( \soc_inst|pix1|Add1~15 ) + ( \soc_inst|pix1|Add1~14 ))
+// \soc_inst|pix1|Add1~11 = SHARE(GND)
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\raz_inst|V_count [7]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|pix1|Add1~14 ),
+ .sharein(\soc_inst|pix1|Add1~15 ),
+ .combout(),
+ .sumout(\soc_inst|pix1|Add1~9_sumout ),
+ .cout(\soc_inst|pix1|Add1~10 ),
+ .shareout(\soc_inst|pix1|Add1~11 ));
+// synopsys translate_off
+defparam \soc_inst|pix1|Add1~9 .extended_lut = "off";
+defparam \soc_inst|pix1|Add1~9 .lut_mask = 64'h00000000000000FF;
+defparam \soc_inst|pix1|Add1~9 .shared_arith = "on";
+// synopsys translate_on
+
+// Location: FF_X30_Y15_N28
+dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|pix1|Add1~9_sumout ),
+ .asdata(vcc),
+ .clrn(vcc),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y17_N12
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4_combout = ( \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & (
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q & (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2_combout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q &
+// ((\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3_combout ))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & (
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q & (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2_combout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q &
+// ((\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3_combout ))) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & (
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q ) # (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1_combout ) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout & (
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q & \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1_combout ) ) ) )
+
+ .dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2_combout ),
+ .datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q ),
+ .datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3_combout ),
+ .datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1_combout ),
+ .datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout ),
+ .dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4 .lut_mask = 64'h0033CCFF47474747;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y17_N21
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~1 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~1_combout = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout & ( (!\soc_inst|pix1|word_address [14] & (!\soc_inst|pix1|word_address [17] &
+// !\soc_inst|pix1|word_address [16])) ) )
+
+ .dataa(!\soc_inst|pix1|word_address [14]),
+ .datab(!\soc_inst|pix1|word_address [17]),
+ .datac(gnd),
+ .datad(!\soc_inst|pix1|word_address [16]),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~1 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~1 .lut_mask = 64'h0000000088008800;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X14_Y16_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~1_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y15_N33
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~1 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~1_combout = (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout & (!\soc_inst|pix1|word_address [17] & !\soc_inst|pix1|word_address [16]))
+
+ .dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout ),
+ .datab(!\soc_inst|pix1|word_address [17]),
+ .datac(gnd),
+ .datad(!\soc_inst|pix1|word_address [16]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~1 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~1 .lut_mask = 64'h4400440044004400;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X38_Y15_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~1_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y17_N24
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0_combout = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout & ( (!\soc_inst|pix1|word_address [17] & (\soc_inst|pix1|word_address [16] &
+// !\soc_inst|pix1|word_address [14])) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|pix1|word_address [17]),
+ .datac(!\soc_inst|pix1|word_address [16]),
+ .datad(!\soc_inst|pix1|word_address [14]),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0 .lut_mask = 64'h000000000C000C00;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X14_Y17_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y15_N30
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0_combout = ( \soc_inst|pix1|word_address [16] & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout & !\soc_inst|pix1|word_address [17]) ) )
+
+ .dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout ),
+ .datab(!\soc_inst|pix1|word_address [17]),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|word_address [16]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0 .lut_mask = 64'h0000000044444444;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X26_Y15_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y17_N0
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout = ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q & (
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout & (
+// \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ) ) ) ) # (
+// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] &
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ))) ) ) ) # (
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] &
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ))) ) ) )
+
+ .dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]),
+ .datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout ),
+ .datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ),
+ .datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ),
+ .datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout ),
+ .dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1 .lut_mask = 64'h227722770A0A5F5F;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y17_N54
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0_combout = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout & ( (\soc_inst|pix1|word_address [14] & (!\soc_inst|pix1|word_address [17] &
+// !\soc_inst|pix1|word_address [16])) ) )
+
+ .dataa(!\soc_inst|pix1|word_address [14]),
+ .datab(!\soc_inst|pix1|word_address [17]),
+ .datac(!\soc_inst|pix1|word_address [16]),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0 .lut_mask = 64'h0000000040404040;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X38_Y13_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y15_N3
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1_combout = ( !\soc_inst|pix1|word_address [16] & ( (\soc_inst|pix1|word_address [14] & (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout &
+// !\soc_inst|pix1|word_address [17])) ) )
+
+ .dataa(!\soc_inst|pix1|word_address [14]),
+ .datab(gnd),
+ .datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout ),
+ .datad(!\soc_inst|pix1|word_address [17]),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|word_address [16]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1 .lut_mask = 64'h0500050000000000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X26_Y17_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y15_N36
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0_combout = ( \soc_inst|pix1|word_address [14] & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout & (\soc_inst|pix1|word_address [16] &
+// !\soc_inst|pix1|word_address [17])) ) )
+
+ .dataa(gnd),
+ .datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout ),
+ .datac(!\soc_inst|pix1|word_address [16]),
+ .datad(!\soc_inst|pix1|word_address [17]),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|word_address [14]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0 .lut_mask = 64'h0000000003000300;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X38_Y19_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y17_N57
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0_combout = (\soc_inst|pix1|word_address [14] & (!\soc_inst|pix1|word_address [17] & (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout &
+// \soc_inst|pix1|word_address [16])))
+
+ .dataa(!\soc_inst|pix1|word_address [14]),
+ .datab(!\soc_inst|pix1|word_address [17]),
+ .datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
+ .datad(!\soc_inst|pix1|word_address [16]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0 .lut_mask = 64'h0004000400040004;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X38_Y16_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y17_N6
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout = ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout & ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout & (
+// ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q &
+// ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout )))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout & (
+// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q & (((\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3])) #
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q & (((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] &
+// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout )))) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout & (
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout & (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]))) #
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q & (((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout ) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3])))) ) ) ) # (
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] &
+// ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q &
+// ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout ))))) ) ) )
+
+ .dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ),
+ .datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q ),
+ .datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]),
+ .datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout ),
+ .datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ),
+ .dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2 .lut_mask = 64'h407043734C7C4F7F;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y17_N45
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0_combout = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout & ( (\soc_inst|pix1|word_address [14] & (!\soc_inst|pix1|word_address [17] &
+// \soc_inst|pix1|word_address [16])) ) )
+
+ .dataa(!\soc_inst|pix1|word_address [14]),
+ .datab(!\soc_inst|pix1|word_address [17]),
+ .datac(gnd),
+ .datad(!\soc_inst|pix1|word_address [16]),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0 .lut_mask = 64'h0000000000440044;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X41_Y18_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y17_N18
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0_combout = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout & ( (\soc_inst|pix1|word_address [14] & (!\soc_inst|pix1|word_address [17] &
+// \soc_inst|pix1|word_address [16])) ) )
+
+ .dataa(!\soc_inst|pix1|word_address [14]),
+ .datab(!\soc_inst|pix1|word_address [17]),
+ .datac(!\soc_inst|pix1|word_address [16]),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0 .lut_mask = 64'h0000000004040404;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X38_Y21_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y17_N27
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0_combout = (!\soc_inst|pix1|word_address [16] & (!\soc_inst|pix1|word_address [17] & (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout &
+// \soc_inst|pix1|word_address [14])))
+
+ .dataa(!\soc_inst|pix1|word_address [16]),
+ .datab(!\soc_inst|pix1|word_address [17]),
+ .datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ),
+ .datad(!\soc_inst|pix1|word_address [14]),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0 .lut_mask = 64'h0008000800080008;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X14_Y19_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y17_N30
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~1 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~1_combout = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout & ( (\soc_inst|pix1|word_address [14] & (!\soc_inst|pix1|word_address [17] &
+// !\soc_inst|pix1|word_address [16])) ) )
+
+ .dataa(!\soc_inst|pix1|word_address [14]),
+ .datab(!\soc_inst|pix1|word_address [17]),
+ .datac(!\soc_inst|pix1|word_address [16]),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~1 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~1 .lut_mask = 64'h0000000040404040;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X41_Y17_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~1_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y17_N24
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout = ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & (
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q &
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout )) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & (
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q &
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout )) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & (
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q ) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout & (
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q & \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ) ) ) )
+
+ .dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout ),
+ .datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q ),
+ .datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ),
+ .datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ),
+ .datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout ),
+ .dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3 .lut_mask = 64'h00CC33FF1D1D1D1D;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y17_N51
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2799w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2799w[3]~0_combout = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout & ( (!\soc_inst|pix1|word_address [14] & (!\soc_inst|pix1|word_address [17] &
+// \soc_inst|pix1|word_address [16])) ) )
+
+ .dataa(!\soc_inst|pix1|word_address [14]),
+ .datab(gnd),
+ .datac(!\soc_inst|pix1|word_address [17]),
+ .datad(!\soc_inst|pix1|word_address [16]),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2799w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2799w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2799w[3]~0 .lut_mask = 64'h0000000000A000A0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2799w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X26_Y21_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2799w[3]~0_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y15_N6
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0_combout = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout & ( (\soc_inst|pix1|word_address [16] & !\soc_inst|pix1|word_address [17]) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|pix1|word_address [16]),
+ .datad(!\soc_inst|pix1|word_address [17]),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0 .lut_mask = 64'h000000000F000F00;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X14_Y15_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y17_N48
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1_combout = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout & ( (!\soc_inst|pix1|word_address [14] & (!\soc_inst|pix1|word_address [17] &
+// !\soc_inst|pix1|word_address [16])) ) )
+
+ .dataa(!\soc_inst|pix1|word_address [14]),
+ .datab(!\soc_inst|pix1|word_address [17]),
+ .datac(!\soc_inst|pix1|word_address [16]),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1 .lut_mask = 64'h0000000080808080;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X38_Y18_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y14_N51
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1_combout = ( !\soc_inst|pix1|word_address [16] & ( (!\soc_inst|pix1|word_address [17] & \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout ) ) )
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(!\soc_inst|pix1|word_address [17]),
+ .datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout ),
+ .datae(gnd),
+ .dataf(!\soc_inst|pix1|word_address [16]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1 .lut_mask = 64'h00F000F000000000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X26_Y14_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 (
+ .portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1_combout ),
+ .portare(vcc),
+ .portaaddrstall(gnd),
+ .portbwe(gnd),
+ .portbre(vcc),
+ .portbaddrstall(gnd),
+ .clk0(\CLOCK_50~inputCLKENA0_outclk ),
+ .clk1(gnd),
+ .ena0(vcc),
+ .ena1(vcc),
+ .ena2(vcc),
+ .ena3(vcc),
+ .clr0(gnd),
+ .clr1(gnd),
+ .nerror(vcc),
+ .portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+ .portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+ .portabyteenamasks(1'b1),
+ .portbdatain(1'b0),
+ .portbaddr({\soc_inst|pix1|Add1~45_sumout ,\soc_inst|pix1|Add1~41_sumout ,\soc_inst|pix1|Add1~37_sumout ,\soc_inst|pix1|Add1~33_sumout ,\soc_inst|pix1|Add1~29_sumout ,\soc_inst|pix1|Add1~25_sumout ,\raz_inst|H_count [6],\raz_inst|H_count [5],\raz_inst|H_count [4],\raz_inst|H_count [3],
+\raz_inst|H_count [2],\raz_inst|H_count[1]~DUPLICATE_q ,\raz_inst|H_count [0]}),
+ .portbbyteenamasks(1'b1),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .portadataout(),
+ .portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4_PORTBDATAOUT_bus ),
+ .eccstatus(),
+ .dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_efn1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .ram_block_type = "M20K";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y17_N42
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout = ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout & ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout & (
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]) # ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8~portbdataout )) #
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout )))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout & (
+// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q )) #
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8~portbdataout )) #
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ))))) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout & (
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q )) #
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8~portbdataout )) #
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ))))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout & (
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q &
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8~portbdataout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ))))) ) ) )
+
+ .dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]),
+ .datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE_q ),
+ .datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8~portbdataout ),
+ .datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ),
+ .datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout ),
+ .dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0 .lut_mask = 64'h04158C9D2637AEBF;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y17_N54
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4_combout = ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q & ( \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout & (
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q & (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q &
+// ((\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout ))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q & ( \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout &
+// ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q ) # (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout ) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q & (
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q & (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout )) #
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q & ((\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout ))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q & (
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout & \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q ) ) ) )
+
+ .dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout ),
+ .datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout ),
+ .datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout ),
+ .datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE_q ),
+ .datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ),
+ .dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4 .lut_mask = 64'h0055330FFF55330F;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y15_N30
+cyclonev_lcell_comb \soc_inst|pix1|Add1~5 (
+// Equation(s):
+// \soc_inst|pix1|Add1~5_sumout = SUM(( \raz_inst|V_count [8] ) + ( \soc_inst|pix1|Add1~11 ) + ( \soc_inst|pix1|Add1~10 ))
+// \soc_inst|pix1|Add1~6 = CARRY(( \raz_inst|V_count [8] ) + ( \soc_inst|pix1|Add1~11 ) + ( \soc_inst|pix1|Add1~10 ))
+// \soc_inst|pix1|Add1~7 = SHARE(GND)
+
+ .dataa(gnd),
+ .datab(!\raz_inst|V_count [8]),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|pix1|Add1~10 ),
+ .sharein(\soc_inst|pix1|Add1~11 ),
+ .combout(),
+ .sumout(\soc_inst|pix1|Add1~5_sumout ),
+ .cout(\soc_inst|pix1|Add1~6 ),
+ .shareout(\soc_inst|pix1|Add1~7 ));
+// synopsys translate_off
+defparam \soc_inst|pix1|Add1~5 .extended_lut = "off";
+defparam \soc_inst|pix1|Add1~5 .lut_mask = 64'h0000000000003333;
+defparam \soc_inst|pix1|Add1~5 .shared_arith = "on";
+// synopsys translate_on
+
+// Location: FF_X30_Y15_N31
+dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[4] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|pix1|Add1~5_sumout ),
+ .asdata(vcc),
+ .clrn(vcc),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [4]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[4] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[4] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y15_N33
+cyclonev_lcell_comb \soc_inst|pix1|Add1~1 (
+// Equation(s):
+// \soc_inst|pix1|Add1~1_sumout = SUM(( GND ) + ( \soc_inst|pix1|Add1~7 ) + ( \soc_inst|pix1|Add1~6 ))
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(\soc_inst|pix1|Add1~6 ),
+ .sharein(\soc_inst|pix1|Add1~7 ),
+ .combout(),
+ .sumout(\soc_inst|pix1|Add1~1_sumout ),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|Add1~1 .extended_lut = "off";
+defparam \soc_inst|pix1|Add1~1 .lut_mask = 64'h0000000000000000;
+defparam \soc_inst|pix1|Add1~1 .shared_arith = "on";
+// synopsys translate_on
+
+// Location: FF_X30_Y15_N35
+dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[5] (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|pix1|Add1~1_sumout ),
+ .asdata(vcc),
+ .clrn(vcc),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [5]),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[5] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[5] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X30_Y15_N29
+dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3]~DUPLICATE (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\soc_inst|pix1|Add1~9_sumout ),
+ .asdata(vcc),
+ .clrn(vcc),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(vcc),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3]~DUPLICATE_q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3]~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3]~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y15_N48
+cyclonev_lcell_comb \raz_inst|Red~1 (
+// Equation(s):
+// \raz_inst|Red~1_combout = ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [4] & ( (\raz_inst|VGA_BLANK_N~combout & ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [5] &
+// (((\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4_combout )))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [5] & (\raz_inst|Red~0_combout & (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3]~DUPLICATE_q
+// ))))) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [4] & ( ((\raz_inst|VGA_BLANK_N~combout & (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4_combout &
+// ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [5]))))) ) )
+
+ .dataa(!\raz_inst|Red~0_combout ),
+ .datab(!\raz_inst|VGA_BLANK_N~combout ),
+ .datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4_combout ),
+ .datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4_combout ),
+ .datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [4]),
+ .dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [5]),
+ .datag(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3]~DUPLICATE_q ),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|Red~1_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|Red~1 .extended_lut = "on";
+defparam \raz_inst|Red~1 .lut_mask = 64'h0033030310100000;
+defparam \raz_inst|Red~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y15_N21
+cyclonev_lcell_comb \raz_inst|always0~6 (
+// Equation(s):
+// \raz_inst|always0~6_combout = ( \raz_inst|Add0~41_sumout & ( \raz_inst|Add0~37_sumout ) ) # ( \raz_inst|Add0~41_sumout & ( !\raz_inst|Add0~37_sumout & ( \raz_inst|Add0~21_sumout ) ) )
+
+ .dataa(!\raz_inst|Add0~21_sumout ),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(!\raz_inst|Add0~41_sumout ),
+ .dataf(!\raz_inst|Add0~37_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|always0~6_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|always0~6 .extended_lut = "off";
+defparam \raz_inst|always0~6 .lut_mask = 64'h000055550000FFFF;
+defparam \raz_inst|always0~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y15_N54
+cyclonev_lcell_comb \raz_inst|always0~5 (
+// Equation(s):
+// \raz_inst|always0~5_combout = ( \raz_inst|Add0~41_sumout & ( \raz_inst|Add0~29_sumout & ( (!\raz_inst|LessThan0~3_combout & (((\raz_inst|Add0~25_sumout ) # (\raz_inst|Add0~21_sumout )) # (\raz_inst|Add0~37_sumout ))) ) ) ) # ( \raz_inst|Add0~41_sumout
+// & ( !\raz_inst|Add0~29_sumout & ( (!\raz_inst|LessThan0~3_combout & ((\raz_inst|Add0~21_sumout ) # (\raz_inst|Add0~37_sumout ))) ) ) )
+
+ .dataa(!\raz_inst|LessThan0~3_combout ),
+ .datab(!\raz_inst|Add0~37_sumout ),
+ .datac(!\raz_inst|Add0~21_sumout ),
+ .datad(!\raz_inst|Add0~25_sumout ),
+ .datae(!\raz_inst|Add0~41_sumout ),
+ .dataf(!\raz_inst|Add0~29_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|always0~5_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|always0~5 .extended_lut = "off";
+defparam \raz_inst|always0~5 .lut_mask = 64'h00002A2A00002AAA;
+defparam \raz_inst|always0~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y15_N24
+cyclonev_lcell_comb \raz_inst|always0~7 (
+// Equation(s):
+// \raz_inst|always0~7_combout = ( \raz_inst|Equal0~3_combout & ( \raz_inst|LessThan0~3_combout & ( !\raz_inst|always0~5_combout ) ) ) # ( !\raz_inst|Equal0~3_combout & ( \raz_inst|LessThan0~3_combout ) ) # ( \raz_inst|Equal0~3_combout & (
+// !\raz_inst|LessThan0~3_combout & ( (!\raz_inst|Add0~17_sumout & (((!\raz_inst|always0~5_combout & !\raz_inst|Add0~33_sumout )))) # (\raz_inst|Add0~17_sumout & (\raz_inst|always0~6_combout & ((\raz_inst|Add0~33_sumout )))) ) ) ) # (
+// !\raz_inst|Equal0~3_combout & ( !\raz_inst|LessThan0~3_combout ) )
+
+ .dataa(!\raz_inst|always0~6_combout ),
+ .datab(!\raz_inst|Add0~17_sumout ),
+ .datac(!\raz_inst|always0~5_combout ),
+ .datad(!\raz_inst|Add0~33_sumout ),
+ .datae(!\raz_inst|Equal0~3_combout ),
+ .dataf(!\raz_inst|LessThan0~3_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|always0~7_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|always0~7 .extended_lut = "off";
+defparam \raz_inst|always0~7 .lut_mask = 64'hFFFFC011FFFFF0F0;
+defparam \raz_inst|always0~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y15_N42
+cyclonev_lcell_comb \raz_inst|VGA_HS~0 (
+// Equation(s):
+// \raz_inst|VGA_HS~0_combout = ( !tick_count[0] & ( \KEY[2]~input_o ) )
+
+ .dataa(gnd),
+ .datab(!\KEY[2]~input_o ),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(!tick_count[0]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|VGA_HS~0_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|VGA_HS~0 .extended_lut = "off";
+defparam \raz_inst|VGA_HS~0 .lut_mask = 64'h3333333300000000;
+defparam \raz_inst|VGA_HS~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X35_Y15_N25
+dffeas \raz_inst|VGA_HS (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\raz_inst|always0~7_combout ),
+ .asdata(vcc),
+ .clrn(vcc),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\raz_inst|VGA_HS~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\raz_inst|VGA_HS~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|VGA_HS .is_wysiwyg = "true";
+defparam \raz_inst|VGA_HS .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y15_N57
+cyclonev_lcell_comb \raz_inst|always0~9 (
+// Equation(s):
+// \raz_inst|always0~9_combout = ( !\raz_inst|V_count [4] & ( !\raz_inst|V_count [1] $ (!\raz_inst|V_count [0]) ) )
+
+ .dataa(!\raz_inst|V_count [1]),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(!\raz_inst|V_count [0]),
+ .datae(gnd),
+ .dataf(!\raz_inst|V_count [4]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|always0~9_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|always0~9 .extended_lut = "off";
+defparam \raz_inst|always0~9 .lut_mask = 64'h55AA55AA00000000;
+defparam \raz_inst|always0~9 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y15_N57
+cyclonev_lcell_comb \raz_inst|always0~10 (
+// Equation(s):
+// \raz_inst|always0~10_combout = ( !\raz_inst|V_count [10] & ( (\raz_inst|V_count [3] & (\raz_inst|V_count [2] & (\raz_inst|always0~9_combout & !\raz_inst|V_count [9]))) ) )
+
+ .dataa(!\raz_inst|V_count [3]),
+ .datab(!\raz_inst|V_count [2]),
+ .datac(!\raz_inst|always0~9_combout ),
+ .datad(!\raz_inst|V_count [9]),
+ .datae(gnd),
+ .dataf(!\raz_inst|V_count [10]),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|always0~10_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|always0~10 .extended_lut = "off";
+defparam \raz_inst|always0~10 .lut_mask = 64'h0100010000000000;
+defparam \raz_inst|always0~10 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y15_N36
+cyclonev_lcell_comb \raz_inst|always0~8 (
+// Equation(s):
+// \raz_inst|always0~8_combout = ( \raz_inst|Add1~29_sumout & ( (\raz_inst|Add1~25_sumout & (!\raz_inst|Add1~33_sumout & (!\raz_inst|Add1~41_sumout $ (!\raz_inst|Add1~37_sumout )))) ) )
+
+ .dataa(!\raz_inst|Add1~25_sumout ),
+ .datab(!\raz_inst|Add1~33_sumout ),
+ .datac(!\raz_inst|Add1~41_sumout ),
+ .datad(!\raz_inst|Add1~37_sumout ),
+ .datae(gnd),
+ .dataf(!\raz_inst|Add1~29_sumout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|always0~8_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|always0~8 .extended_lut = "off";
+defparam \raz_inst|always0~8 .lut_mask = 64'h0000000004400440;
+defparam \raz_inst|always0~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y15_N0
+cyclonev_lcell_comb \raz_inst|always0~11 (
+// Equation(s):
+// \raz_inst|always0~11_combout = ( \raz_inst|Equal0~1_combout & ( \raz_inst|Equal0~0_combout & ( (!\raz_inst|Equal0~3_combout & (\raz_inst|always0~10_combout )) # (\raz_inst|Equal0~3_combout & (((\raz_inst|always0~8_combout &
+// \raz_inst|LessThan8~2_combout )))) ) ) ) # ( !\raz_inst|Equal0~1_combout & ( \raz_inst|Equal0~0_combout & ( \raz_inst|always0~10_combout ) ) ) # ( \raz_inst|Equal0~1_combout & ( !\raz_inst|Equal0~0_combout & ( \raz_inst|always0~10_combout ) ) ) # (
+// !\raz_inst|Equal0~1_combout & ( !\raz_inst|Equal0~0_combout & ( \raz_inst|always0~10_combout ) ) )
+
+ .dataa(!\raz_inst|Equal0~3_combout ),
+ .datab(!\raz_inst|always0~10_combout ),
+ .datac(!\raz_inst|always0~8_combout ),
+ .datad(!\raz_inst|LessThan8~2_combout ),
+ .datae(!\raz_inst|Equal0~1_combout ),
+ .dataf(!\raz_inst|Equal0~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|always0~11_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|always0~11 .extended_lut = "off";
+defparam \raz_inst|always0~11 .lut_mask = 64'h3333333333332227;
+defparam \raz_inst|always0~11 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y15_N54
+cyclonev_lcell_comb \raz_inst|always0~12 (
+// Equation(s):
+// \raz_inst|always0~12_combout = ( \raz_inst|LessThan8~1_combout & ( \raz_inst|LessThan8~0_combout & ( (!\raz_inst|always0~11_combout ) # ((\raz_inst|always0~4_combout & ((\raz_inst|Add0~1_sumout ) # (\raz_inst|always0~1_combout )))) ) ) ) # (
+// !\raz_inst|LessThan8~1_combout & ( \raz_inst|LessThan8~0_combout ) ) # ( \raz_inst|LessThan8~1_combout & ( !\raz_inst|LessThan8~0_combout ) ) # ( !\raz_inst|LessThan8~1_combout & ( !\raz_inst|LessThan8~0_combout ) )
+
+ .dataa(!\raz_inst|always0~1_combout ),
+ .datab(!\raz_inst|always0~4_combout ),
+ .datac(!\raz_inst|always0~11_combout ),
+ .datad(!\raz_inst|Add0~1_sumout ),
+ .datae(!\raz_inst|LessThan8~1_combout ),
+ .dataf(!\raz_inst|LessThan8~0_combout ),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\raz_inst|always0~12_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \raz_inst|always0~12 .extended_lut = "off";
+defparam \raz_inst|always0~12 .lut_mask = 64'hFFFFFFFFFFFFF1F3;
+defparam \raz_inst|always0~12 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X33_Y15_N56
+dffeas \raz_inst|VGA_VS (
+ .clk(\CLOCK_50~inputCLKENA0_outclk ),
+ .d(\raz_inst|always0~12_combout ),
+ .asdata(vcc),
+ .clrn(vcc),
+ .aload(gnd),
+ .sclr(gnd),
+ .sload(gnd),
+ .ena(\raz_inst|VGA_HS~0_combout ),
+ .devclrn(devclrn),
+ .devpor(devpor),
+ .q(\raz_inst|VGA_VS~q ),
+ .prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|VGA_VS .is_wysiwyg = "true";
+defparam \raz_inst|VGA_VS .power_up = "low";
+// synopsys translate_on
+
+// Location: IOIBUF_X89_Y25_N4
+cyclonev_io_ibuf \KEY[3]~input (
+ .i(KEY[3]),
+ .ibar(gnd),
+ .dynamicterminationcontrol(gnd),
+ .o(\KEY[3]~input_o ));
+// synopsys translate_off
+defparam \KEY[3]~input .bus_hold = "false";
+defparam \KEY[3]~input .simulate_z_as = "z";
+// synopsys translate_on
+
+// Location: LABCELL_X7_Y11_N3
+cyclonev_lcell_comb \~QUARTUS_CREATED_GND~I (
+// Equation(s):
+
+ .dataa(gnd),
+ .datab(gnd),
+ .datac(gnd),
+ .datad(gnd),
+ .datae(gnd),
+ .dataf(gnd),
+ .datag(gnd),
+ .cin(gnd),
+ .sharein(gnd),
+ .combout(\~QUARTUS_CREATED_GND~I_combout ),
+ .sumout(),
+ .cout(),
+ .shareout());
+// synopsys translate_off
+defparam \~QUARTUS_CREATED_GND~I .extended_lut = "off";
+defparam \~QUARTUS_CREATED_GND~I .lut_mask = 64'h0000000000000000;
+defparam \~QUARTUS_CREATED_GND~I .shared_arith = "off";
+// synopsys translate_on
+
+endmodule
diff --git a/simulation/modelsim/de1_soc_wrapper_modelsim.xrf b/simulation/modelsim/de1_soc_wrapper_modelsim.xrf
index 3385232061a9e857543def6d74e02fead51c65c3..565d01c4cd8f2c3258ec124ec17deec9484458bc 100644
--- a/simulation/modelsim/de1_soc_wrapper_modelsim.xrf
+++ b/simulation/modelsim/de1_soc_wrapper_modelsim.xrf
@@ -20,10 +20,9 @@ source_file = 1, /srv/intelFPGA/16.1/quartus/libraries/megafunctions/altrom.inc
source_file = 1, /srv/intelFPGA/16.1/quartus/libraries/megafunctions/altram.inc
source_file = 1, /srv/intelFPGA/16.1/quartus/libraries/megafunctions/altdpram.inc
source_file = 1, /srv/intelFPGA/16.1/quartus/libraries/megafunctions/cbx.lst
-source_file = 1, /home/ks6n19/Documents/project/db/altsyncram_40j1.tdf
+source_file = 1, /home/ks6n19/Documents/project/db/altsyncram_efn1.tdf
source_file = 1, /home/ks6n19/Documents/project/db/decode_3na.tdf
-source_file = 1, /home/ks6n19/Documents/project/db/decode_s2a.tdf
-source_file = 1, /home/ks6n19/Documents/project/db/mux_jhb.tdf
+source_file = 1, /home/ks6n19/Documents/project/db/mux_chb.tdf
source_file = 1, /home/ks6n19/Documents/project/db/altsyncram_nms1.tdf
source_file = 1, /home/ks6n19/Documents/project/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif
design_name = de1_soc_wrapper
@@ -100,7 +99,6 @@ instance = comp, \KEY[2]~input , KEY[2]~input, de1_soc_wrapper, 1
instance = comp, \KEY[2]~inputCLKENA0 , KEY[2]~inputCLKENA0, de1_soc_wrapper, 1
instance = comp, \tick_count[0] , tick_count[0], de1_soc_wrapper, 1
instance = comp, \Add0~97 , Add0~97, de1_soc_wrapper, 1
-instance = comp, \tick_count[1]~feeder , tick_count[1]~feeder, de1_soc_wrapper, 1
instance = comp, \tick_count[1] , tick_count[1], de1_soc_wrapper, 1
instance = comp, \Add0~93 , Add0~93, de1_soc_wrapper, 1
instance = comp, \tick_count[2] , tick_count[2], de1_soc_wrapper, 1
@@ -151,2705 +149,1964 @@ instance = comp, \tick_count[24] , tick_count[24], de1_soc_wrapper, 1
instance = comp, \Add0~1 , Add0~1, de1_soc_wrapper, 1
instance = comp, \tick_count[25] , tick_count[25], de1_soc_wrapper, 1
instance = comp, \heartbeat~0 , heartbeat~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fij2z4 , soc_inst|m0_1|u_logic|Fij2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ark2z4 , soc_inst|m0_1|u_logic|Ark2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M66wx4 , soc_inst|m0_1|u_logic|M66wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jppvx4~0 , soc_inst|m0_1|u_logic|Jppvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tki2z4 , soc_inst|m0_1|u_logic|Tki2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ptgwx4~0 , soc_inst|m0_1|u_logic|Ptgwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ilpvx4~0 , soc_inst|m0_1|u_logic|Ilpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Itgwx4~0 , soc_inst|m0_1|u_logic|Itgwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|mux_sel[2] , soc_inst|interconnect_1|mux_sel[2], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[25]~1 , soc_inst|interconnect_1|HRDATA[25]~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Orewx4~0 , soc_inst|m0_1|u_logic|Orewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sy52z4~0 , soc_inst|m0_1|u_logic|Sy52z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Huqvx4~0 , soc_inst|m0_1|u_logic|Huqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kzxvx4 , soc_inst|m0_1|u_logic|Kzxvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nsk2z4 , soc_inst|m0_1|u_logic|Nsk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ju5wx4 , soc_inst|m0_1|u_logic|Ju5wx4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ncqvx4~0 , soc_inst|m0_1|u_logic|Ncqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tyx2z4 , soc_inst|m0_1|u_logic|Tyx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE , soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ffj2z4 , soc_inst|m0_1|u_logic|Ffj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hdh2z4~0 , soc_inst|m0_1|u_logic|Hdh2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z1ewx4~0 , soc_inst|m0_1|u_logic|Z1ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A4t2z4 , soc_inst|m0_1|u_logic|A4t2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~0 , soc_inst|m0_1|u_logic|Fuhwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vbovx4~0 , soc_inst|m0_1|u_logic|Vbovx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y9t2z4~feeder , soc_inst|m0_1|u_logic|Y9t2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y9t2z4 , soc_inst|m0_1|u_logic|Y9t2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hdh2z4~1 , soc_inst|m0_1|u_logic|Hdh2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wq5wx4 , soc_inst|m0_1|u_logic|Wq5wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G2lwx4~0 , soc_inst|m0_1|u_logic|G2lwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Howvx4~0 , soc_inst|m0_1|u_logic|Howvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G2lwx4 , soc_inst|m0_1|u_logic|G2lwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rbi3z4~0 , soc_inst|m0_1|u_logic|Rbi3z4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE , soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qaqvx4~0 , soc_inst|m0_1|u_logic|Qaqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E6nwx4~0 , soc_inst|m0_1|u_logic|E6nwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X77wx4 , soc_inst|m0_1|u_logic|X77wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wmc2z4~0 , soc_inst|m0_1|u_logic|Wmc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wdqvx4~0 , soc_inst|m0_1|u_logic|Wdqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A4t2z4 , soc_inst|m0_1|u_logic|A4t2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mhc2z4~2 , soc_inst|m0_1|u_logic|Mhc2z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mhc2z4~3 , soc_inst|m0_1|u_logic|Mhc2z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mhc2z4~4 , soc_inst|m0_1|u_logic|Mhc2z4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O9qvx4~0 , soc_inst|m0_1|u_logic|O9qvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rsqvx4~0 , soc_inst|m0_1|u_logic|Rsqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ag4wx4~0 , soc_inst|m0_1|u_logic|Ag4wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Wkxvx4~0 , soc_inst|m0_1|u_logic|Wkxvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mtqvx4~0 , soc_inst|m0_1|u_logic|Mtqvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Sy2wx4~0 , soc_inst|m0_1|u_logic|Sy2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE , soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bpzvx4~0 , soc_inst|m0_1|u_logic|Bpzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P03wx4~0 , soc_inst|m0_1|u_logic|P03wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Og4wx4~0 , soc_inst|m0_1|u_logic|Og4wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mtqvx4 , soc_inst|m0_1|u_logic|Mtqvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nxqvx4~0 , soc_inst|m0_1|u_logic|Nxqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H1rvx4~0 , soc_inst|m0_1|u_logic|H1rvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S5pvx4 , soc_inst|m0_1|u_logic|S5pvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yghvx4~0 , soc_inst|m0_1|u_logic|Yghvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tyx2z4 , soc_inst|m0_1|u_logic|Tyx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ibrwx4~0 , soc_inst|m0_1|u_logic|Ibrwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hxx2z4 , soc_inst|m0_1|u_logic|Hxx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE , soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B8c2z4~0 , soc_inst|m0_1|u_logic|B8c2z4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Vaw2z4 , soc_inst|m0_1|u_logic|Vaw2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Bpsvx4~0 , soc_inst|m0_1|u_logic|Bpsvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE , soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Skc2z4~0 , soc_inst|m0_1|u_logic|Skc2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X43wx4~0 , soc_inst|m0_1|u_logic|X43wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ju5wx4 , soc_inst|m0_1|u_logic|Ju5wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vbovx4~0 , soc_inst|m0_1|u_logic|Vbovx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zlnvx4~0 , soc_inst|m0_1|u_logic|Zlnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nbm2z4 , soc_inst|m0_1|u_logic|Nbm2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Xnrvx4~0 , soc_inst|m0_1|u_logic|Xnrvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jnrvx4~0 , soc_inst|m0_1|u_logic|Jnrvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jnrvx4~1 , soc_inst|m0_1|u_logic|Jnrvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jhy2z4 , soc_inst|m0_1|u_logic|Jhy2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wfovx4 , soc_inst|m0_1|u_logic|Wfovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE , soc_inst|m0_1|u_logic|Nbm2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B73wx4 , soc_inst|m0_1|u_logic|B73wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G1mwx4~0 , soc_inst|m0_1|u_logic|G1mwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jppvx4~0 , soc_inst|m0_1|u_logic|Jppvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ucqvx4 , soc_inst|m0_1|u_logic|Ucqvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I2mwx4~0 , soc_inst|m0_1|u_logic|I2mwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A4c2z4~0 , soc_inst|m0_1|u_logic|A4c2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bpzvx4~0 , soc_inst|m0_1|u_logic|Bpzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z0mwx4~0 , soc_inst|m0_1|u_logic|Z0mwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pa7wx4~0 , soc_inst|m0_1|u_logic|Pa7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P2mwx4~0 , soc_inst|m0_1|u_logic|P2mwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwrite_o~0 , soc_inst|m0_1|u_logic|hwrite_o~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y9t2z4 , soc_inst|m0_1|u_logic|Y9t2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F5mvx4~0 , soc_inst|m0_1|u_logic|F5mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cr0xx4~1 , soc_inst|m0_1|u_logic|Cr0xx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O9qvx4~0 , soc_inst|m0_1|u_logic|O9qvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cr0xx4~0 , soc_inst|m0_1|u_logic|Cr0xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cr0xx4~2 , soc_inst|m0_1|u_logic|Cr0xx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P03wx4~0 , soc_inst|m0_1|u_logic|P03wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kzxvx4 , soc_inst|m0_1|u_logic|Kzxvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M66wx4 , soc_inst|m0_1|u_logic|M66wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mtqvx4~0 , soc_inst|m0_1|u_logic|Mtqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ag4wx4~0 , soc_inst|m0_1|u_logic|Ag4wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wdxvx4~0 , soc_inst|m0_1|u_logic|Wdxvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qfdwx4~0 , soc_inst|m0_1|u_logic|Qfdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE , soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kfd2z4~0 , soc_inst|m0_1|u_logic|Kfd2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pcyvx4 , soc_inst|m0_1|u_logic|Pcyvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Duc2z4~0 , soc_inst|m0_1|u_logic|Duc2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jp3wx4 , soc_inst|m0_1|u_logic|Jp3wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H0zvx4~0 , soc_inst|m0_1|u_logic|H0zvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gzvvx4~1 , soc_inst|m0_1|u_logic|Gzvvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gzvvx4~0 , soc_inst|m0_1|u_logic|Gzvvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gzvvx4~2 , soc_inst|m0_1|u_logic|Gzvvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qaiwx4~0 , soc_inst|m0_1|u_logic|Qaiwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Howvx4~0 , soc_inst|m0_1|u_logic|Howvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xkfwx4~0 , soc_inst|m0_1|u_logic|Xkfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y8pvx4~0 , soc_inst|m0_1|u_logic|Y8pvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H4nwx4 , soc_inst|m0_1|u_logic|H4nwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kswwx4~0 , soc_inst|m0_1|u_logic|Kswwx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Jvqvx4~1 , soc_inst|m0_1|u_logic|Jvqvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|write_cycle , soc_inst|ram_1|write_cycle, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wpsvx4~0 , soc_inst|m0_1|u_logic|Wpsvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I1c2z4 , soc_inst|m0_1|u_logic|I1c2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C9yvx4 , soc_inst|m0_1|u_logic|C9yvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ncqvx4~0 , soc_inst|m0_1|u_logic|Ncqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P1c2z4~0 , soc_inst|m0_1|u_logic|P1c2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z7fwx4~0 , soc_inst|m0_1|u_logic|Z7fwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G0c2z4~0 , soc_inst|m0_1|u_logic|G0c2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zzb2z4~0 , soc_inst|m0_1|u_logic|Zzb2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jyb2z4~0 , soc_inst|m0_1|u_logic|Jyb2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xhiwx4~0 , soc_inst|m0_1|u_logic|Xhiwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jyb2z4~1 , soc_inst|m0_1|u_logic|Jyb2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jyb2z4~2 , soc_inst|m0_1|u_logic|Jyb2z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE , soc_inst|m0_1|u_logic|U4z2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O092z4~0 , soc_inst|m0_1|u_logic|O092z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K1z2z4 , soc_inst|m0_1|u_logic|K1z2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bxcwx4~0 , soc_inst|m0_1|u_logic|Bxcwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lu6wx4~0 , soc_inst|m0_1|u_logic|Lu6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Slnvx4~0 , soc_inst|m0_1|u_logic|Slnvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Edovx4 , soc_inst|m0_1|u_logic|Edovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qr42z4~0 , soc_inst|m0_1|u_logic|Qr42z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qr42z4~1 , soc_inst|m0_1|u_logic|Qr42z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tki2z4 , soc_inst|m0_1|u_logic|Tki2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U2x2z4 , soc_inst|m0_1|u_logic|U2x2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W28wx4~0 , soc_inst|m0_1|u_logic|W28wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jvqvx4~0 , soc_inst|m0_1|u_logic|Jvqvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|T1y2z4 , soc_inst|m0_1|u_logic|T1y2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Jcw2z4 , soc_inst|m0_1|u_logic|Jcw2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Llnvx4~0 , soc_inst|m0_1|u_logic|Llnvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Llnvx4 , soc_inst|m0_1|u_logic|Llnvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qdj2z4 , soc_inst|m0_1|u_logic|Qdj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xiwvx4~0 , soc_inst|m0_1|u_logic|Xiwvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pmgwx4~0 , soc_inst|m0_1|u_logic|Pmgwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ez8wx4~0 , soc_inst|m0_1|u_logic|Ez8wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zz8wx4 , soc_inst|m0_1|u_logic|Zz8wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Muawx4~0 , soc_inst|m0_1|u_logic|Muawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE , soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Socwx4~0 , soc_inst|m0_1|u_logic|Socwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lhyvx4~0 , soc_inst|m0_1|u_logic|Lhyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qxc2z4 , soc_inst|m0_1|u_logic|Qxc2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lhyvx4~1 , soc_inst|m0_1|u_logic|Lhyvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ps3wx4~0 , soc_inst|m0_1|u_logic|Ps3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X8zvx4 , soc_inst|m0_1|u_logic|X8zvx4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Evcwx4~0 , soc_inst|m0_1|u_logic|Evcwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fzcwx4~0 , soc_inst|m0_1|u_logic|Fzcwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Evcwx4~1 , soc_inst|m0_1|u_logic|Evcwx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|T3ovx4~0 , soc_inst|m0_1|u_logic|T3ovx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|H4ovx4~0 , soc_inst|m0_1|u_logic|H4ovx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Evcwx4~1 , soc_inst|m0_1|u_logic|Evcwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fzcwx4~0 , soc_inst|m0_1|u_logic|Fzcwx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Wzawx4 , soc_inst|m0_1|u_logic|Wzawx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X8zvx4 , soc_inst|m0_1|u_logic|X8zvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Srgwx4~0 , soc_inst|m0_1|u_logic|Srgwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fzyvx4~0 , soc_inst|m0_1|u_logic|Fzyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cuyvx4~0 , soc_inst|m0_1|u_logic|Cuyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yyyvx4 , soc_inst|m0_1|u_logic|Yyyvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cuyvx4~1 , soc_inst|m0_1|u_logic|Cuyvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q77wx4~0 , soc_inst|m0_1|u_logic|Q77wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A0zvx4~0 , soc_inst|m0_1|u_logic|A0zvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uwyvx4~0 , soc_inst|m0_1|u_logic|Uwyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cuyvx4~2 , soc_inst|m0_1|u_logic|Cuyvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cuyvx4~3 , soc_inst|m0_1|u_logic|Cuyvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M1j2z4 , soc_inst|m0_1|u_logic|M1j2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Akewx4~0 , soc_inst|m0_1|u_logic|Akewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hw2wx4~0 , soc_inst|m0_1|u_logic|Hw2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C9yvx4 , soc_inst|m0_1|u_logic|C9yvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Glnwx4~0 , soc_inst|m0_1|u_logic|Glnwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~0 , soc_inst|m0_1|u_logic|Fuhwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L8t2z4 , soc_inst|m0_1|u_logic|L8t2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qaqvx4~0 , soc_inst|m0_1|u_logic|Qaqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E6nwx4~0 , soc_inst|m0_1|u_logic|E6nwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G36wx4~0 , soc_inst|m0_1|u_logic|G36wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qfdwx4~0 , soc_inst|m0_1|u_logic|Qfdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mn3wx4~0 , soc_inst|m0_1|u_logic|Mn3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ucqvx4 , soc_inst|m0_1|u_logic|Ucqvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X77wx4 , soc_inst|m0_1|u_logic|X77wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Una2z4~0 , soc_inst|m0_1|u_logic|Una2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C5c2z4~1 , soc_inst|m0_1|u_logic|C5c2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C5c2z4~0 , soc_inst|m0_1|u_logic|C5c2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H0zvx4~0 , soc_inst|m0_1|u_logic|H0zvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z6c2z4~0 , soc_inst|m0_1|u_logic|Z6c2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C5c2z4~2 , soc_inst|m0_1|u_logic|C5c2z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hdh2z4~0 , soc_inst|m0_1|u_logic|Hdh2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ppsvx4~0 , soc_inst|m0_1|u_logic|Ppsvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ppsvx4~1 , soc_inst|m0_1|u_logic|Ppsvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ppsvx4~2 , soc_inst|m0_1|u_logic|Ppsvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ppsvx4 , soc_inst|m0_1|u_logic|Ppsvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S6ovx4~0 , soc_inst|m0_1|u_logic|S6ovx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xhxvx4 , soc_inst|m0_1|u_logic|Xhxvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X5gwx4~0 , soc_inst|m0_1|u_logic|X5gwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE , soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D4mvx4~0 , soc_inst|m0_1|u_logic|D4mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J4pvx4~0 , soc_inst|m0_1|u_logic|J4pvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J4pvx4~1 , soc_inst|m0_1|u_logic|J4pvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X4pvx4 , soc_inst|m0_1|u_logic|X4pvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z1ewx4~0 , soc_inst|m0_1|u_logic|Z1ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ahwvx4~0 , soc_inst|m0_1|u_logic|Ahwvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C2yvx4 , soc_inst|m0_1|u_logic|C2yvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ohwvx4 , soc_inst|m0_1|u_logic|Ohwvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z3yvx4 , soc_inst|m0_1|u_logic|Z3yvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ukpvx4 , soc_inst|m0_1|u_logic|Ukpvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rmpvx4~0 , soc_inst|m0_1|u_logic|Rmpvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Rngwx4 , soc_inst|m0_1|u_logic|Rngwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jbhwx4~0 , soc_inst|m0_1|u_logic|Jbhwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ry5wx4~0 , soc_inst|m0_1|u_logic|Ry5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hprot_o~0 , soc_inst|m0_1|u_logic|hprot_o~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pkxvx4~0 , soc_inst|m0_1|u_logic|Pkxvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R8d2z4~0 , soc_inst|m0_1|u_logic|R8d2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hprot_o~1 , soc_inst|m0_1|u_logic|hprot_o~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O76wx4 , soc_inst|m0_1|u_logic|O76wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yy5wx4~0 , soc_inst|m0_1|u_logic|Yy5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T1xvx4~0 , soc_inst|m0_1|u_logic|T1xvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Na6wx4~0 , soc_inst|m0_1|u_logic|Na6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rmpvx4~1 , soc_inst|m0_1|u_logic|Rmpvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wvewx4~0 , soc_inst|m0_1|u_logic|Wvewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H5fwx4~0 , soc_inst|m0_1|u_logic|H5fwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Icyvx4~0 , soc_inst|m0_1|u_logic|Icyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zpqvx4~0 , soc_inst|m0_1|u_logic|Zpqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lwqvx4~0 , soc_inst|m0_1|u_logic|Lwqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|read_enable~0 , soc_inst|switches_1|read_enable~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|read_enable , soc_inst|switches_1|read_enable, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[1]~37 , soc_inst|interconnect_1|HRDATA[1]~37, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Evcwx4~2 , soc_inst|m0_1|u_logic|Evcwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa7wx4~0 , soc_inst|m0_1|u_logic|Wa7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G97wx4~2 , soc_inst|m0_1|u_logic|G97wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Donvx4~0 , soc_inst|m0_1|u_logic|Donvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Donvx4~1 , soc_inst|m0_1|u_logic|Donvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G97wx4~1 , soc_inst|m0_1|u_logic|G97wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Donvx4~2 , soc_inst|m0_1|u_logic|Donvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J3iwx4~0 , soc_inst|m0_1|u_logic|J3iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[0] , soc_inst|ram_1|saved_word_address[0], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory.raddr_a[0]~0 , soc_inst|ram_1|memory.raddr_a[0]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bnnvx4 , soc_inst|m0_1|u_logic|Bnnvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Viy2z4 , soc_inst|m0_1|u_logic|Viy2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vapvx4 , soc_inst|m0_1|u_logic|Vapvx4, de1_soc_wrapper, 1
+instance = comp, \SW[2]~input , SW[2]~input, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[0][2]~feeder , soc_inst|switches_1|switch_store[0][2]~feeder, de1_soc_wrapper, 1
+instance = comp, \KEY[0]~input , KEY[0]~input, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|last_buttons[0]~1 , soc_inst|switches_1|last_buttons[0]~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|last_buttons[0] , soc_inst|switches_1|last_buttons[0], de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|always0~1 , soc_inst|switches_1|always0~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[0][2] , soc_inst|switches_1|switch_store[0][2], de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bpzvx4~1 , soc_inst|m0_1|u_logic|Bpzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hsize_o~0 , soc_inst|m0_1|u_logic|hsize_o~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|half_word_address~0 , soc_inst|switches_1|half_word_address~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|byte2~0 , soc_inst|ram_1|byte2~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|byte_select[2] , soc_inst|ram_1|byte_select[2], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[20]~7 , soc_inst|interconnect_1|HRDATA[20]~7, de1_soc_wrapper, 1
+instance = comp, \SW[5]~input , SW[5]~input, de1_soc_wrapper, 1
+instance = comp, \KEY[1]~input , KEY[1]~input, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|last_buttons[1]~0 , soc_inst|switches_1|last_buttons[1]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|last_buttons[1] , soc_inst|switches_1|last_buttons[1], de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|always0~0 , soc_inst|switches_1|always0~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[1][5] , soc_inst|switches_1|switch_store[1][5], de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W28wx4~0 , soc_inst|m0_1|u_logic|W28wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Egkwx4~0 , soc_inst|m0_1|u_logic|Egkwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qx52z4~0 , soc_inst|m0_1|u_logic|Qx52z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hprot_o~4 , soc_inst|m0_1|u_logic|hprot_o~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sy52z4~0 , soc_inst|m0_1|u_logic|Sy52z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Huqvx4~0 , soc_inst|m0_1|u_logic|Huqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A76wx4~0 , soc_inst|m0_1|u_logic|A76wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hprot_o~2 , soc_inst|m0_1|u_logic|hprot_o~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hprot_o~3 , soc_inst|m0_1|u_logic|hprot_o~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hprot_o~5 , soc_inst|m0_1|u_logic|hprot_o~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U5qvx4 , soc_inst|m0_1|u_logic|U5qvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C3w2z4 , soc_inst|m0_1|u_logic|C3w2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Omyvx4~0 , soc_inst|m0_1|u_logic|Omyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nbyvx4~0 , soc_inst|m0_1|u_logic|Nbyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zzfwx4~0 , soc_inst|m0_1|u_logic|Zzfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G2lwx4~0 , soc_inst|m0_1|u_logic|G2lwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G2lwx4 , soc_inst|m0_1|u_logic|G2lwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hklwx4~1 , soc_inst|m0_1|u_logic|Hklwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wxcwx4~0 , soc_inst|m0_1|u_logic|Wxcwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mk6wx4~0 , soc_inst|m0_1|u_logic|Mk6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|byte_select[1] , soc_inst|ram_1|byte_select[1], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|read_cycle~0 , soc_inst|ram_1|read_cycle~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|read_cycle , soc_inst|ram_1|read_cycle, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vwc2z4~0 , soc_inst|m0_1|u_logic|Vwc2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cxc2z4~0 , soc_inst|m0_1|u_logic|Cxc2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Awc2z4~0 , soc_inst|m0_1|u_logic|Awc2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Awc2z4~1 , soc_inst|m0_1|u_logic|Awc2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~0 , soc_inst|m0_1|u_logic|Yafwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ipsvx4~0 , soc_inst|m0_1|u_logic|Ipsvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|It52z4~0 , soc_inst|m0_1|u_logic|It52z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vaw2z4~DUPLICATE , soc_inst|m0_1|u_logic|Vaw2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|It52z4~1 , soc_inst|m0_1|u_logic|It52z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Socwx4~0 , soc_inst|m0_1|u_logic|Socwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bxcwx4~0 , soc_inst|m0_1|u_logic|Bxcwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bk4wx4 , soc_inst|m0_1|u_logic|Bk4wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wpsvx4~0 , soc_inst|m0_1|u_logic|Wpsvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Poa2z4~0 , soc_inst|m0_1|u_logic|Poa2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ik4wx4~0 , soc_inst|m0_1|u_logic|Ik4wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ik4wx4~1 , soc_inst|m0_1|u_logic|Ik4wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Una2z4~0 , soc_inst|m0_1|u_logic|Una2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z7fwx4~0 , soc_inst|m0_1|u_logic|Z7fwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kofwx4~0 , soc_inst|m0_1|u_logic|Kofwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bpzvx4~1 , soc_inst|m0_1|u_logic|Bpzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Shyvx4~0 , soc_inst|m0_1|u_logic|Shyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ps3wx4~0 , soc_inst|m0_1|u_logic|Ps3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lhyvx4~0 , soc_inst|m0_1|u_logic|Lhyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Locwx4~0 , soc_inst|m0_1|u_logic|Locwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lhyvx4~1 , soc_inst|m0_1|u_logic|Lhyvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lhyvx4~2 , soc_inst|m0_1|u_logic|Lhyvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wai2z4 , soc_inst|m0_1|u_logic|Wai2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lcowx4~0 , soc_inst|m0_1|u_logic|Lcowx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|half_word_address~0 , soc_inst|switches_1|half_word_address~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|half_word_address~2 , soc_inst|switches_1|half_word_address~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|half_word_address[0] , soc_inst|switches_1|half_word_address[0], de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|read_enable~0 , soc_inst|switches_1|read_enable~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|read_enable , soc_inst|switches_1|read_enable, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[25]~6 , soc_inst|interconnect_1|HRDATA[25]~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hsize_o~0 , soc_inst|m0_1|u_logic|hsize_o~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|byte2~0 , soc_inst|ram_1|byte2~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|byte_select[2] , soc_inst|ram_1|byte_select[2], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[19]~7 , soc_inst|interconnect_1|HRDATA[19]~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xdfwx4 , soc_inst|m0_1|u_logic|Xdfwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R8x2z4 , soc_inst|m0_1|u_logic|R8x2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~25 , soc_inst|m0_1|u_logic|Add2~25, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~17 , soc_inst|m0_1|u_logic|Add2~17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~33 , soc_inst|m0_1|u_logic|Add2~33, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ulhvx4~0 , soc_inst|m0_1|u_logic|Ulhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Donvx4~0 , soc_inst|m0_1|u_logic|Donvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Donvx4~1 , soc_inst|m0_1|u_logic|Donvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G97wx4~2 , soc_inst|m0_1|u_logic|G97wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G97wx4~1 , soc_inst|m0_1|u_logic|G97wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa7wx4~0 , soc_inst|m0_1|u_logic|Wa7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Donvx4~2 , soc_inst|m0_1|u_logic|Donvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Evcwx4~2 , soc_inst|m0_1|u_logic|Evcwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~3 , soc_inst|m0_1|u_logic|Df3wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~4 , soc_inst|m0_1|u_logic|Df3wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qp3wx4~0 , soc_inst|m0_1|u_logic|Qp3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jp3wx4 , soc_inst|m0_1|u_logic|Jp3wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xiwvx4~0 , soc_inst|m0_1|u_logic|Xiwvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Csewx4~0 , soc_inst|m0_1|u_logic|Csewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V1yvx4~0 , soc_inst|m0_1|u_logic|V1yvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J5vvx4 , soc_inst|m0_1|u_logic|J5vvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U5qvx4 , soc_inst|m0_1|u_logic|U5qvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W0pvx4 , soc_inst|m0_1|u_logic|W0pvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xwawx4~2 , soc_inst|m0_1|u_logic|Xwawx4~2, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Xwawx4~1 , soc_inst|m0_1|u_logic|Xwawx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE , soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Xwawx4~3 , soc_inst|m0_1|u_logic|Xwawx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xwawx4~2 , soc_inst|m0_1|u_logic|Xwawx4~2, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Xwawx4~0 , soc_inst|m0_1|u_logic|Xwawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z4bwx4~2 , soc_inst|m0_1|u_logic|Z4bwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6mwx4~0 , soc_inst|m0_1|u_logic|Q6mwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zzb2z4~0 , soc_inst|m0_1|u_logic|Zzb2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G0c2z4~0 , soc_inst|m0_1|u_logic|G0c2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jyb2z4~0 , soc_inst|m0_1|u_logic|Jyb2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xhiwx4~0 , soc_inst|m0_1|u_logic|Xhiwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jyb2z4~1 , soc_inst|m0_1|u_logic|Jyb2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P1c2z4~0 , soc_inst|m0_1|u_logic|P1c2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jyb2z4~2 , soc_inst|m0_1|u_logic|Jyb2z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I1c2z4 , soc_inst|m0_1|u_logic|I1c2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~0 , soc_inst|m0_1|u_logic|Amjwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mn3wx4~0 , soc_inst|m0_1|u_logic|Mn3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wdqvx4~0 , soc_inst|m0_1|u_logic|Wdqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S6c2z4~0 , soc_inst|m0_1|u_logic|S6c2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C5c2z4~1 , soc_inst|m0_1|u_logic|C5c2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C5c2z4~0 , soc_inst|m0_1|u_logic|C5c2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C5c2z4~2 , soc_inst|m0_1|u_logic|C5c2z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ppsvx4~0 , soc_inst|m0_1|u_logic|Ppsvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ppsvx4~1 , soc_inst|m0_1|u_logic|Ppsvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ppsvx4~2 , soc_inst|m0_1|u_logic|Ppsvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ppsvx4 , soc_inst|m0_1|u_logic|Ppsvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S6ovx4~0 , soc_inst|m0_1|u_logic|S6ovx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S6ovx4~1 , soc_inst|m0_1|u_logic|S6ovx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S6ovx4~3 , soc_inst|m0_1|u_logic|S6ovx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W0pvx4 , soc_inst|m0_1|u_logic|W0pvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qtrwx4~0 , soc_inst|m0_1|u_logic|Qtrwx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Dplwx4~0 , soc_inst|m0_1|u_logic|Dplwx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Cllwx4~0 , soc_inst|m0_1|u_logic|Cllwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C2yvx4 , soc_inst|m0_1|u_logic|C2yvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dsqvx4 , soc_inst|m0_1|u_logic|Dsqvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[25]~12 , soc_inst|interconnect_1|HRDATA[25]~12, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[6]~15 , soc_inst|interconnect_1|HRDATA[6]~15, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fbfwx4~0 , soc_inst|m0_1|u_logic|Fbfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ocfwx4~0 , soc_inst|m0_1|u_logic|Ocfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Keiwx4~0 , soc_inst|m0_1|u_logic|Keiwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R1d2z4~0 , soc_inst|m0_1|u_logic|R1d2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Celwx4~0 , soc_inst|m0_1|u_logic|Celwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Celwx4~1 , soc_inst|m0_1|u_logic|Celwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fbfwx4~1 , soc_inst|m0_1|u_logic|Fbfwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Enrwx4~0 , soc_inst|m0_1|u_logic|Enrwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V2iwx4~0 , soc_inst|m0_1|u_logic|V2iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J3iwx4~0 , soc_inst|m0_1|u_logic|J3iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Herwx4~0 , soc_inst|m0_1|u_logic|Herwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Herwx4~1 , soc_inst|m0_1|u_logic|Herwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE , soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE , soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wvewx4~0 , soc_inst|m0_1|u_logic|Wvewx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Qsewx4~0 , soc_inst|m0_1|u_logic|Qsewx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|P7wvx4~0 , soc_inst|m0_1|u_logic|P7wvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oowvx4~0 , soc_inst|m0_1|u_logic|Oowvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ejwvx4~0 , soc_inst|m0_1|u_logic|Ejwvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ahwvx4~0 , soc_inst|m0_1|u_logic|Ahwvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ohwvx4 , soc_inst|m0_1|u_logic|Ohwvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R8wvx4~0 , soc_inst|m0_1|u_logic|R8wvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R8wvx4~1 , soc_inst|m0_1|u_logic|R8wvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE , soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K8wvx4~1 , soc_inst|m0_1|u_logic|K8wvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K8wvx4~0 , soc_inst|m0_1|u_logic|K8wvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ukpvx4 , soc_inst|m0_1|u_logic|Ukpvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vhwvx4~0 , soc_inst|m0_1|u_logic|Vhwvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vhwvx4~1 , soc_inst|m0_1|u_logic|Vhwvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K8wvx4~2 , soc_inst|m0_1|u_logic|K8wvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F9wvx4~0 , soc_inst|m0_1|u_logic|F9wvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I2t2z4 , soc_inst|m0_1|u_logic|I2t2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W3mvx4~0 , soc_inst|m0_1|u_logic|W3mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W3mvx4~1 , soc_inst|m0_1|u_logic|W3mvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE , soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ilpvx4~0 , soc_inst|m0_1|u_logic|Ilpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P3mvx4~0 , soc_inst|m0_1|u_logic|P3mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P3mvx4~1 , soc_inst|m0_1|u_logic|P3mvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Auk2z4 , soc_inst|m0_1|u_logic|Auk2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D6yvx4~1 , soc_inst|m0_1|u_logic|D6yvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ndwvx4~0 , soc_inst|m0_1|u_logic|Ndwvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I3mvx4~0 , soc_inst|m0_1|u_logic|I3mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I3mvx4~1 , soc_inst|m0_1|u_logic|I3mvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K1z2z4 , soc_inst|m0_1|u_logic|K1z2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E4xvx4~0 , soc_inst|m0_1|u_logic|E4xvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V8yvx4~0 , soc_inst|m0_1|u_logic|V8yvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D6yvx4~0 , soc_inst|m0_1|u_logic|D6yvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D6yvx4~2 , soc_inst|m0_1|u_logic|D6yvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~2 , soc_inst|m0_1|u_logic|K6yvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X5gwx4~0 , soc_inst|m0_1|u_logic|X5gwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~3 , soc_inst|m0_1|u_logic|K6yvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~4 , soc_inst|m0_1|u_logic|K6yvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vnxvx4~0 , soc_inst|m0_1|u_logic|Vnxvx4~0, de1_soc_wrapper, 1
-instance = comp, \SW[6]~input , SW[6]~input, de1_soc_wrapper, 1
-instance = comp, \KEY[1]~input , KEY[1]~input, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|last_buttons[1]~0 , soc_inst|switches_1|last_buttons[1]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|last_buttons[1] , soc_inst|switches_1|last_buttons[1], de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|always0~0 , soc_inst|switches_1|always0~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[1][6] , soc_inst|switches_1|switch_store[1][6], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[3] , soc_inst|ram_1|saved_word_address[3], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory.raddr_a[3]~3 , soc_inst|ram_1|memory.raddr_a[3]~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Otcwx4~0 , soc_inst|m0_1|u_logic|Otcwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jucwx4~0 , soc_inst|m0_1|u_logic|Jucwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fuawx4~0 , soc_inst|m0_1|u_logic|Fuawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE , soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Qslwx4~0 , soc_inst|m0_1|u_logic|Qslwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z3yvx4 , soc_inst|m0_1|u_logic|Z3yvx4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Fyrwx4~0 , soc_inst|m0_1|u_logic|Fyrwx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Fyrwx4~1 , soc_inst|m0_1|u_logic|Fyrwx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Surwx4~0 , soc_inst|m0_1|u_logic|Surwx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Dghvx4~0 , soc_inst|m0_1|u_logic|Dghvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qllwx4~1 , soc_inst|m0_1|u_logic|Qllwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qllwx4~0 , soc_inst|m0_1|u_logic|Qllwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U9swx4~0 , soc_inst|m0_1|u_logic|U9swx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S8swx4~0 , soc_inst|m0_1|u_logic|S8swx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bkxvx4~0 , soc_inst|m0_1|u_logic|Bkxvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H5fwx4~0 , soc_inst|m0_1|u_logic|H5fwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J7swx4~0 , soc_inst|m0_1|u_logic|J7swx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G27wx4~1 , soc_inst|m0_1|u_logic|G27wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ae6wx4~0 , soc_inst|m0_1|u_logic|Ae6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bkxvx4~1 , soc_inst|m0_1|u_logic|Bkxvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bkxvx4~2 , soc_inst|m0_1|u_logic|Bkxvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bkxvx4 , soc_inst|m0_1|u_logic|Bkxvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q3xvx4~0 , soc_inst|m0_1|u_logic|Q3xvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q3xvx4~1 , soc_inst|m0_1|u_logic|Q3xvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qllwx4~2 , soc_inst|m0_1|u_logic|Qllwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qllwx4~3 , soc_inst|m0_1|u_logic|Qllwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qllwx4~4 , soc_inst|m0_1|u_logic|Qllwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qtrwx4~0 , soc_inst|m0_1|u_logic|Qtrwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dghvx4~1 , soc_inst|m0_1|u_logic|Dghvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W7z2z4 , soc_inst|m0_1|u_logic|W7z2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y29wx4 , soc_inst|m0_1|u_logic|Y29wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uz9wx4~0 , soc_inst|m0_1|u_logic|Uz9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W4dwx4~0 , soc_inst|m0_1|u_logic|W4dwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y5dwx4~0 , soc_inst|m0_1|u_logic|Y5dwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W4dwx4~1 , soc_inst|m0_1|u_logic|W4dwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D1awx4~0 , soc_inst|m0_1|u_logic|D1awx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ggswx4~0 , soc_inst|m0_1|u_logic|Ggswx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE , soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ggswx4~1 , soc_inst|m0_1|u_logic|Ggswx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ggswx4~2 , soc_inst|m0_1|u_logic|Ggswx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kxkwx4~0 , soc_inst|m0_1|u_logic|Kxkwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kxkwx4~1 , soc_inst|m0_1|u_logic|Kxkwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wfhvx4~0 , soc_inst|m0_1|u_logic|Wfhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wfhvx4~1 , soc_inst|m0_1|u_logic|Wfhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wfhvx4~2 , soc_inst|m0_1|u_logic|Wfhvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K9z2z4 , soc_inst|m0_1|u_logic|K9z2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tykwx4~0 , soc_inst|m0_1|u_logic|Tykwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tykwx4~1 , soc_inst|m0_1|u_logic|Tykwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kxkwx4~2 , soc_inst|m0_1|u_logic|Kxkwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Svk2z4 , soc_inst|m0_1|u_logic|Svk2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T1d3z4 , soc_inst|m0_1|u_logic|T1d3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C51xx4~0 , soc_inst|m0_1|u_logic|C51xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ro0xx4~0 , soc_inst|m0_1|u_logic|Ro0xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qj2wx4~0 , soc_inst|m0_1|u_logic|Qj2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qj2wx4~1 , soc_inst|m0_1|u_logic|Qj2wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qj2wx4~2 , soc_inst|m0_1|u_logic|Qj2wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fw0xx4~0 , soc_inst|m0_1|u_logic|Fw0xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ax0xx4~0 , soc_inst|m0_1|u_logic|Ax0xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vi2wx4~0 , soc_inst|m0_1|u_logic|Vi2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vi2wx4~1 , soc_inst|m0_1|u_logic|Vi2wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ge2wx4~1 , soc_inst|m0_1|u_logic|Ge2wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oi2wx4~0 , soc_inst|m0_1|u_logic|Oi2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gvrwx4~0 , soc_inst|m0_1|u_logic|Gvrwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE , soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P0pvx4~0 , soc_inst|m0_1|u_logic|P0pvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qnkvx4~0 , soc_inst|m0_1|u_logic|Qnkvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qnkvx4~1 , soc_inst|m0_1|u_logic|Qnkvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Efp2z4 , soc_inst|m0_1|u_logic|Efp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cxc2z4~0 , soc_inst|m0_1|u_logic|Cxc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kuc2z4~0 , soc_inst|m0_1|u_logic|Kuc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vwc2z4~0 , soc_inst|m0_1|u_logic|Vwc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Awc2z4~0 , soc_inst|m0_1|u_logic|Awc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Awc2z4~1 , soc_inst|m0_1|u_logic|Awc2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|DataValid~1 , soc_inst|switches_1|DataValid~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|DataValid[0] , soc_inst|switches_1|DataValid[0], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[1]~20 , soc_inst|interconnect_1|HRDATA[1]~20, de1_soc_wrapper, 1
+instance = comp, \SW[0]~input , SW[0]~input, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[0][0] , soc_inst|switches_1|switch_store[0][0], de1_soc_wrapper, 1
+instance = comp, \SW[3]~input , SW[3]~input, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[1][3] , soc_inst|switches_1|switch_store[1][3], de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gzvvx4~1 , soc_inst|m0_1|u_logic|Gzvvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gzvvx4~0 , soc_inst|m0_1|u_logic|Gzvvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gzvvx4~2 , soc_inst|m0_1|u_logic|Gzvvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pgnvx4~0 , soc_inst|m0_1|u_logic|Pgnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I793z4 , soc_inst|m0_1|u_logic|I793z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fskvx4~0 , soc_inst|m0_1|u_logic|Fskvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U593z4 , soc_inst|m0_1|u_logic|U593z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Ut0xx4~0 , soc_inst|m0_1|u_logic|Ut0xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oi2wx4~0 , soc_inst|m0_1|u_logic|Oi2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cr0xx4~0 , soc_inst|m0_1|u_logic|Cr0xx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Oi2wx4~1 , soc_inst|m0_1|u_logic|Oi2wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jq2wx4~0 , soc_inst|m0_1|u_logic|Jq2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A4c2z4~0 , soc_inst|m0_1|u_logic|A4c2z4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Zy2wx4~0 , soc_inst|m0_1|u_logic|Zy2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jq2wx4~0 , soc_inst|m0_1|u_logic|Jq2wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Nz2wx4~0 , soc_inst|m0_1|u_logic|Nz2wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Fh2wx4~0 , soc_inst|m0_1|u_logic|Fh2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Op2wx4~0 , soc_inst|m0_1|u_logic|Op2wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Xx2wx4 , soc_inst|m0_1|u_logic|Xx2wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fh2wx4~2 , soc_inst|m0_1|u_logic|Fh2wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|It2wx4~0 , soc_inst|m0_1|u_logic|It2wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Fh2wx4~1 , soc_inst|m0_1|u_logic|Fh2wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Op2wx4~0 , soc_inst|m0_1|u_logic|Op2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fh2wx4~2 , soc_inst|m0_1|u_logic|Fh2wx4~2, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Fh2wx4~3 , soc_inst|m0_1|u_logic|Fh2wx4~3, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Fh2wx4~4 , soc_inst|m0_1|u_logic|Fh2wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ru2wx4~0 , soc_inst|m0_1|u_logic|Ru2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bt2wx4~0 , soc_inst|m0_1|u_logic|Bt2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ey2wx4~0 , soc_inst|m0_1|u_logic|Ey2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fh2wx4~5 , soc_inst|m0_1|u_logic|Fh2wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L53wx4~2 , soc_inst|m0_1|u_logic|L53wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B73wx4 , soc_inst|m0_1|u_logic|B73wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hw2wx4~0 , soc_inst|m0_1|u_logic|Hw2wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|L53wx4~0 , soc_inst|m0_1|u_logic|L53wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|L53wx4~1 , soc_inst|m0_1|u_logic|L53wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L53wx4~2 , soc_inst|m0_1|u_logic|L53wx4~2, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|L53wx4~3 , soc_inst|m0_1|u_logic|L53wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ey2wx4~0 , soc_inst|m0_1|u_logic|Ey2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ru2wx4~0 , soc_inst|m0_1|u_logic|Ru2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bt2wx4~0 , soc_inst|m0_1|u_logic|Bt2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fh2wx4~5 , soc_inst|m0_1|u_logic|Fh2wx4~5, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Xc2wx4~0 , soc_inst|m0_1|u_logic|Xc2wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Ge2wx4~0 , soc_inst|m0_1|u_logic|Ge2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~1 , soc_inst|m0_1|u_logic|Yafwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~0 , soc_inst|m0_1|u_logic|Yafwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~2 , soc_inst|m0_1|u_logic|Yafwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nkpvx4~0 , soc_inst|m0_1|u_logic|Nkpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J7swx4~0 , soc_inst|m0_1|u_logic|J7swx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pkxvx4~0 , soc_inst|m0_1|u_logic|Pkxvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~3 , soc_inst|m0_1|u_logic|Yafwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~4 , soc_inst|m0_1|u_logic|Yafwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qllwx4~0 , soc_inst|m0_1|u_logic|Qllwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nqy2z4 , soc_inst|m0_1|u_logic|Nqy2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M4fwx4~0 , soc_inst|m0_1|u_logic|M4fwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rjrwx4~0 , soc_inst|m0_1|u_logic|Rjrwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mkrwx4 , soc_inst|m0_1|u_logic|Mkrwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J3xvx4 , soc_inst|m0_1|u_logic|J3xvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~5 , soc_inst|m0_1|u_logic|Yafwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sjj2z4 , soc_inst|m0_1|u_logic|Sjj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|My6wx4~0 , soc_inst|m0_1|u_logic|My6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vnxvx4~0 , soc_inst|m0_1|u_logic|Vnxvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~0 , soc_inst|m0_1|u_logic|K6yvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~1 , soc_inst|m0_1|u_logic|K6yvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~2 , soc_inst|m0_1|u_logic|K6yvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~3 , soc_inst|m0_1|u_logic|K6yvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~4 , soc_inst|m0_1|u_logic|K6yvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X8kwx4~0 , soc_inst|m0_1|u_logic|X8kwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~5 , soc_inst|m0_1|u_logic|K6yvx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~7 , soc_inst|m0_1|u_logic|K6yvx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I2mwx4~0 , soc_inst|m0_1|u_logic|I2mwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~8 , soc_inst|m0_1|u_logic|K6yvx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zzfwx4~0 , soc_inst|m0_1|u_logic|Zzfwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tuwvx4~0 , soc_inst|m0_1|u_logic|Tuwvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T1xvx4~0 , soc_inst|m0_1|u_logic|T1xvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~6 , soc_inst|m0_1|u_logic|K6yvx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~9 , soc_inst|m0_1|u_logic|K6yvx4~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~10 , soc_inst|m0_1|u_logic|K6yvx4~10, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qj2wx4~1 , soc_inst|m0_1|u_logic|Qj2wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qj2wx4~0 , soc_inst|m0_1|u_logic|Qj2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jucwx4~0 , soc_inst|m0_1|u_logic|Jucwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ro0xx4~0 , soc_inst|m0_1|u_logic|Ro0xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qj2wx4~2 , soc_inst|m0_1|u_logic|Qj2wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fw0xx4~0 , soc_inst|m0_1|u_logic|Fw0xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ax0xx4~0 , soc_inst|m0_1|u_logic|Ax0xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vi2wx4~0 , soc_inst|m0_1|u_logic|Vi2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vi2wx4~1 , soc_inst|m0_1|u_logic|Vi2wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ge2wx4~1 , soc_inst|m0_1|u_logic|Ge2wx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Ge2wx4~2 , soc_inst|m0_1|u_logic|Ge2wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wzy2z4 , soc_inst|m0_1|u_logic|Wzy2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R1d2z4~0 , soc_inst|m0_1|u_logic|R1d2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Keiwx4~0 , soc_inst|m0_1|u_logic|Keiwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Celwx4~0 , soc_inst|m0_1|u_logic|Celwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Celwx4~1 , soc_inst|m0_1|u_logic|Celwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fbfwx4~0 , soc_inst|m0_1|u_logic|Fbfwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fbfwx4~1 , soc_inst|m0_1|u_logic|Fbfwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E4iwx4~0 , soc_inst|m0_1|u_logic|E4iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Enrwx4~0 , soc_inst|m0_1|u_logic|Enrwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V2iwx4~0 , soc_inst|m0_1|u_logic|V2iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Herwx4~0 , soc_inst|m0_1|u_logic|Herwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Herwx4~1 , soc_inst|m0_1|u_logic|Herwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE , soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Vb2wx4~0 , soc_inst|m0_1|u_logic|Vb2wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Xr0xx4 , soc_inst|m0_1|u_logic|Xr0xx4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|If2wx4~0 , soc_inst|m0_1|u_logic|If2wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Vb2wx4 , soc_inst|m0_1|u_logic|Vb2wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rblwx4~0 , soc_inst|m0_1|u_logic|Rblwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rblwx4~1 , soc_inst|m0_1|u_logic|Rblwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rblwx4~2 , soc_inst|m0_1|u_logic|Rblwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fgm2z4 , soc_inst|m0_1|u_logic|Fgm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ob2wx4~0 , soc_inst|m0_1|u_logic|Ob2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ob2wx4 , soc_inst|m0_1|u_logic|Ob2wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P3mvx4~0 , soc_inst|m0_1|u_logic|P3mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vhwvx4~0 , soc_inst|m0_1|u_logic|Vhwvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vhwvx4~1 , soc_inst|m0_1|u_logic|Vhwvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K8wvx4~0 , soc_inst|m0_1|u_logic|K8wvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K8wvx4~1 , soc_inst|m0_1|u_logic|K8wvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K8wvx4~2 , soc_inst|m0_1|u_logic|K8wvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oowvx4~0 , soc_inst|m0_1|u_logic|Oowvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ejwvx4~0 , soc_inst|m0_1|u_logic|Ejwvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R8wvx4~0 , soc_inst|m0_1|u_logic|R8wvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R8wvx4~1 , soc_inst|m0_1|u_logic|R8wvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F9wvx4~0 , soc_inst|m0_1|u_logic|F9wvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P3mvx4~1 , soc_inst|m0_1|u_logic|P3mvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Auk2z4 , soc_inst|m0_1|u_logic|Auk2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Yg2wx4~0 , soc_inst|m0_1|u_logic|Yg2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xly2z4 , soc_inst|m0_1|u_logic|Xly2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D6yvx4~0 , soc_inst|m0_1|u_logic|D6yvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D6yvx4~1 , soc_inst|m0_1|u_logic|D6yvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V8yvx4~0 , soc_inst|m0_1|u_logic|V8yvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D6yvx4~2 , soc_inst|m0_1|u_logic|D6yvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H3d3z4 , soc_inst|m0_1|u_logic|H3d3z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Yg2wx4 , soc_inst|m0_1|u_logic|Yg2wx4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Xc2wx4 , soc_inst|m0_1|u_logic|Xc2wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ob2wx4~0 , soc_inst|m0_1|u_logic|Ob2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ob2wx4 , soc_inst|m0_1|u_logic|Ob2wx4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Mw1wx4~0 , soc_inst|m0_1|u_logic|Mw1wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Wu1wx4~0 , soc_inst|m0_1|u_logic|Wu1wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|G02wx4~0 , soc_inst|m0_1|u_logic|G02wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE , soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uwyvx4~0 , soc_inst|m0_1|u_logic|Uwyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q77wx4~0 , soc_inst|m0_1|u_logic|Q77wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cuyvx4~0 , soc_inst|m0_1|u_logic|Cuyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yyyvx4 , soc_inst|m0_1|u_logic|Yyyvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cuyvx4~1 , soc_inst|m0_1|u_logic|Cuyvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cuyvx4~2 , soc_inst|m0_1|u_logic|Cuyvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cuyvx4~3 , soc_inst|m0_1|u_logic|Cuyvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C1zvx4 , soc_inst|m0_1|u_logic|C1zvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Akewx4~0 , soc_inst|m0_1|u_logic|Akewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M1j2z4~0 , soc_inst|m0_1|u_logic|M1j2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M1j2z4~3 , soc_inst|m0_1|u_logic|M1j2z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M1j2z4~1 , soc_inst|m0_1|u_logic|M1j2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M1j2z4~2 , soc_inst|m0_1|u_logic|M1j2z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M1j2z4 , soc_inst|m0_1|u_logic|M1j2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|G02wx4 , soc_inst|m0_1|u_logic|G02wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mvm2z4 , soc_inst|m0_1|u_logic|Mvm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ytm2z4 , soc_inst|m0_1|u_logic|Ytm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yr13z4~feeder , soc_inst|m0_1|u_logic|Yr13z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mcz2z4 , soc_inst|m0_1|u_logic|Mcz2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Yv1wx4~0 , soc_inst|m0_1|u_logic|Yv1wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Fw1wx4~0 , soc_inst|m0_1|u_logic|Fw1wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Yv1wx4~1 , soc_inst|m0_1|u_logic|Yv1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yr13z4 , soc_inst|m0_1|u_logic|Yr13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Meyvx4 , soc_inst|m0_1|u_logic|Meyvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lq03z4 , soc_inst|m0_1|u_logic|Lq03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yaz2z4 , soc_inst|m0_1|u_logic|Yaz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uvzvx4~2 , soc_inst|m0_1|u_logic|Uvzvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wu1wx4~1 , soc_inst|m0_1|u_logic|Wu1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rtz2z4 , soc_inst|m0_1|u_logic|Rtz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wd13z4 , soc_inst|m0_1|u_logic|Wd13z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|If2wx4~1 , soc_inst|m0_1|u_logic|If2wx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|If2wx4~2 , soc_inst|m0_1|u_logic|If2wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mw1wx4~1 , soc_inst|m0_1|u_logic|Mw1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zj53z4 , soc_inst|m0_1|u_logic|Zj53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ydyvx4 , soc_inst|m0_1|u_logic|Ydyvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fn23z4 , soc_inst|m0_1|u_logic|Fn23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sj62z4~1 , soc_inst|m0_1|u_logic|Sj62z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pl62z4~0 , soc_inst|m0_1|u_logic|Pl62z4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Fw1wx4~1 , soc_inst|m0_1|u_logic|Fw1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qa43z4~DUPLICATE , soc_inst|m0_1|u_logic|Qa43z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uvzvx4~1 , soc_inst|m0_1|u_logic|Uvzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uvzvx4~0 , soc_inst|m0_1|u_logic|Uvzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y21xx4~0 , soc_inst|m0_1|u_logic|Y21xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tw1wx4~0 , soc_inst|m0_1|u_logic|Tw1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tw1wx4~1 , soc_inst|m0_1|u_logic|Tw1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|It63z4 , soc_inst|m0_1|u_logic|It63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dv1wx4~0 , soc_inst|m0_1|u_logic|Dv1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ksm2z4 , soc_inst|m0_1|u_logic|Ksm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wcyvx4~0 , soc_inst|m0_1|u_logic|Wcyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wcyvx4~2 , soc_inst|m0_1|u_logic|Wcyvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hfyvx4~0 , soc_inst|m0_1|u_logic|Hfyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wcyvx4~1 , soc_inst|m0_1|u_logic|Wcyvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wcyvx4~3 , soc_inst|m0_1|u_logic|Wcyvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R283z4 , soc_inst|m0_1|u_logic|R283z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hfyvx4~1 , soc_inst|m0_1|u_logic|Hfyvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hfyvx4~2 , soc_inst|m0_1|u_logic|Hfyvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ixt2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ixt2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qowwx4~1 , soc_inst|m0_1|u_logic|Qowwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G493z4~feeder , soc_inst|m0_1|u_logic|G493z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ow33z4 , soc_inst|m0_1|u_logic|Ow33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mw1wx4~1 , soc_inst|m0_1|u_logic|Mw1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X553z4 , soc_inst|m0_1|u_logic|X553z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sj62z4~0 , soc_inst|m0_1|u_logic|Sj62z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ue9wx4~0 , soc_inst|m0_1|u_logic|Ue9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wu1wx4~1 , soc_inst|m0_1|u_logic|Wu1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ikz2z4 , soc_inst|m0_1|u_logic|Ikz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wzy2z4 , soc_inst|m0_1|u_logic|Wzy2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Meyvx4 , soc_inst|m0_1|u_logic|Meyvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE , soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sj62z4~2 , soc_inst|m0_1|u_logic|Sj62z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sj62z4~3 , soc_inst|m0_1|u_logic|Sj62z4~3, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Hx1wx4~0 , soc_inst|m0_1|u_logic|Hx1wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Hx1wx4~1 , soc_inst|m0_1|u_logic|Hx1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G493z4 , soc_inst|m0_1|u_logic|G493z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wqm2z4~feeder , soc_inst|m0_1|u_logic|Wqm2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rv1wx4~0 , soc_inst|m0_1|u_logic|Rv1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kv1wx4~0 , soc_inst|m0_1|u_logic|Kv1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wqm2z4 , soc_inst|m0_1|u_logic|Wqm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ipm2z4~feeder , soc_inst|m0_1|u_logic|Ipm2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Grl2z4 , soc_inst|m0_1|u_logic|Grl2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Ax1wx4~0 , soc_inst|m0_1|u_logic|Ax1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ipm2z4 , soc_inst|m0_1|u_logic|Ipm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Spl2z4 , soc_inst|m0_1|u_logic|Spl2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bywwx4~1 , soc_inst|m0_1|u_logic|Bywwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rv1wx4~0 , soc_inst|m0_1|u_logic|Rv1wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Rv1wx4~1 , soc_inst|m0_1|u_logic|Rv1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R6v2z4~DUPLICATE , soc_inst|m0_1|u_logic|R6v2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qowwx4~0 , soc_inst|m0_1|u_logic|Qowwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qowwx4 , soc_inst|m0_1|u_logic|Qowwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uvzvx4 , soc_inst|m0_1|u_logic|Uvzvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mddwx4~1 , soc_inst|m0_1|u_logic|Mddwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mddwx4~0 , soc_inst|m0_1|u_logic|Mddwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kcdwx4~0 , soc_inst|m0_1|u_logic|Kcdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jfdwx4~0 , soc_inst|m0_1|u_logic|Jfdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kcdwx4~1 , soc_inst|m0_1|u_logic|Kcdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W19wx4~0 , soc_inst|m0_1|u_logic|W19wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uz9wx4~1 , soc_inst|m0_1|u_logic|Uz9wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Luzvx4~1 , soc_inst|m0_1|u_logic|Luzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Luzvx4~0 , soc_inst|m0_1|u_logic|Luzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qtzvx4~0 , soc_inst|m0_1|u_logic|Qtzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oszvx4~0 , soc_inst|m0_1|u_logic|Oszvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P0pvx4~0 , soc_inst|m0_1|u_logic|P0pvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mekvx4~0 , soc_inst|m0_1|u_logic|Mekvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mekvx4~1 , soc_inst|m0_1|u_logic|Mekvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE , soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \SW[4]~input , SW[4]~input, de1_soc_wrapper, 1
-instance = comp, \KEY[0]~input , KEY[0]~input, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|last_buttons[0]~1 , soc_inst|switches_1|last_buttons[0]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|last_buttons[0] , soc_inst|switches_1|last_buttons[0], de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|always0~1 , soc_inst|switches_1|always0~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[0][4] , soc_inst|switches_1|switch_store[0][4], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[6]~14 , soc_inst|interconnect_1|HRDATA[6]~14, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[4]~37 , soc_inst|interconnect_1|HRDATA[4]~37, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uaj2z4 , soc_inst|m0_1|u_logic|Uaj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nxqvx4~0 , soc_inst|m0_1|u_logic|Nxqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rsqvx4~0 , soc_inst|m0_1|u_logic|Rsqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H1rvx4~0 , soc_inst|m0_1|u_logic|H1rvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U9mvx4~0 , soc_inst|m0_1|u_logic|U9mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U9mvx4~1 , soc_inst|m0_1|u_logic|U9mvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cam2z4 , soc_inst|m0_1|u_logic|Cam2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE , soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F0y2z4~DUPLICATE , soc_inst|m0_1|u_logic|F0y2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wamvx4~0 , soc_inst|m0_1|u_logic|Wamvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kkyvx4~1 , soc_inst|m0_1|u_logic|Kkyvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Amyvx4~1 , soc_inst|m0_1|u_logic|Amyvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Amyvx4~0 , soc_inst|m0_1|u_logic|Amyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H9iwx4~0 , soc_inst|m0_1|u_logic|H9iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yilwx4~0 , soc_inst|m0_1|u_logic|Yilwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Amyvx4~2 , soc_inst|m0_1|u_logic|Amyvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ixt2z4 , soc_inst|m0_1|u_logic|Ixt2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R283z4~DUPLICATE , soc_inst|m0_1|u_logic|R283z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Svqwx4~2 , soc_inst|m0_1|u_logic|Svqwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R6v2z4 , soc_inst|m0_1|u_logic|R6v2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wqm2z4~DUPLICATE , soc_inst|m0_1|u_logic|Wqm2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Svqwx4~3 , soc_inst|m0_1|u_logic|Svqwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ksm2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ksm2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Svqwx4~0 , soc_inst|m0_1|u_logic|Svqwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Svqwx4~1 , soc_inst|m0_1|u_logic|Svqwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Svqwx4 , soc_inst|m0_1|u_logic|Svqwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F483z4 , soc_inst|m0_1|u_logic|F483z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wyt2z4 , soc_inst|m0_1|u_logic|Wyt2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qxuwx4~2 , soc_inst|m0_1|u_logic|Qxuwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F8v2z4 , soc_inst|m0_1|u_logic|F8v2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gip2z4 , soc_inst|m0_1|u_logic|Gip2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qxuwx4~3 , soc_inst|m0_1|u_logic|Qxuwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ujp2z4 , soc_inst|m0_1|u_logic|Ujp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wu63z4 , soc_inst|m0_1|u_logic|Wu63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qxuwx4~0 , soc_inst|m0_1|u_logic|Qxuwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sgp2z4 , soc_inst|m0_1|u_logic|Sgp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W893z4 , soc_inst|m0_1|u_logic|W893z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qxuwx4~1 , soc_inst|m0_1|u_logic|Qxuwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qxuwx4 , soc_inst|m0_1|u_logic|Qxuwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rw7wx4~0 , soc_inst|m0_1|u_logic|Rw7wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Psu2z4 , soc_inst|m0_1|u_logic|Psu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qml2z4~feeder , soc_inst|m0_1|u_logic|Qml2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qml2z4~DUPLICATE , soc_inst|m0_1|u_logic|Qml2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kv1wx4~0 , soc_inst|m0_1|u_logic|Kv1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qml2z4 , soc_inst|m0_1|u_logic|Qml2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Bywwx4~3 , soc_inst|m0_1|u_logic|Bywwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hfyvx4~1 , soc_inst|m0_1|u_logic|Hfyvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hfyvx4~0 , soc_inst|m0_1|u_logic|Hfyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hfyvx4~2 , soc_inst|m0_1|u_logic|Hfyvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gjt2z4 , soc_inst|m0_1|u_logic|Gjt2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wcyvx4~0 , soc_inst|m0_1|u_logic|Wcyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wcyvx4~1 , soc_inst|m0_1|u_logic|Wcyvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wcyvx4~2 , soc_inst|m0_1|u_logic|Wcyvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wcyvx4~3 , soc_inst|m0_1|u_logic|Wcyvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Po73z4 , soc_inst|m0_1|u_logic|Po73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bywwx4~2 , soc_inst|m0_1|u_logic|Bywwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tw1wx4~0 , soc_inst|m0_1|u_logic|Tw1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tw1wx4~1 , soc_inst|m0_1|u_logic|Tw1wx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Gf63z4 , soc_inst|m0_1|u_logic|Gf63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dv1wx4~0 , soc_inst|m0_1|u_logic|Dv1wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Eol2z4 , soc_inst|m0_1|u_logic|Eol2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Bywwx4~0 , soc_inst|m0_1|u_logic|Bywwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Grl2z4~feeder , soc_inst|m0_1|u_logic|Grl2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Grl2z4 , soc_inst|m0_1|u_logic|Grl2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Spl2z4~feeder , soc_inst|m0_1|u_logic|Spl2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Spl2z4 , soc_inst|m0_1|u_logic|Spl2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bywwx4~1 , soc_inst|m0_1|u_logic|Bywwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gjt2z4~feeder , soc_inst|m0_1|u_logic|Gjt2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gjt2z4 , soc_inst|m0_1|u_logic|Gjt2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Po73z4~DUPLICATE , soc_inst|m0_1|u_logic|Po73z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bywwx4~2 , soc_inst|m0_1|u_logic|Bywwx4~2, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Bywwx4 , soc_inst|m0_1|u_logic|Bywwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Glnwx4~0 , soc_inst|m0_1|u_logic|Glnwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pwdwx4~0 , soc_inst|m0_1|u_logic|Pwdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qs7wx4~0 , soc_inst|m0_1|u_logic|Qs7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qs7wx4~1 , soc_inst|m0_1|u_logic|Qs7wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Glnwx4~1 , soc_inst|m0_1|u_logic|Glnwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pm9wx4~0 , soc_inst|m0_1|u_logic|Pm9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lk9wx4~0 , soc_inst|m0_1|u_logic|Lk9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ld1xx4~0 , soc_inst|m0_1|u_logic|Ld1xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ydyvx4 , soc_inst|m0_1|u_logic|Ydyvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hq33z4~DUPLICATE , soc_inst|m0_1|u_logic|Hq33z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S61xx4~0 , soc_inst|m0_1|u_logic|S61xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ii73z4 , soc_inst|m0_1|u_logic|Ii73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sknwx4~0 , soc_inst|m0_1|u_logic|Sknwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sknwx4~1 , soc_inst|m0_1|u_logic|Sknwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sknwx4~2 , soc_inst|m0_1|u_logic|Sknwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jknvx4~0 , soc_inst|m0_1|u_logic|Jknvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lz93z4 , soc_inst|m0_1|u_logic|Lz93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qknvx4~0 , soc_inst|m0_1|u_logic|Qknvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ffs2z4 , soc_inst|m0_1|u_logic|Ffs2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ts5wx4~0 , soc_inst|m0_1|u_logic|Ts5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F4nvx4~0 , soc_inst|m0_1|u_logic|F4nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F4nvx4~1 , soc_inst|m0_1|u_logic|F4nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K3l2z4 , soc_inst|m0_1|u_logic|K3l2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yz4wx4 , soc_inst|m0_1|u_logic|Yz4wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q8rwx4~0 , soc_inst|m0_1|u_logic|Q8rwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D31wx4~0 , soc_inst|m0_1|u_logic|D31wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D31wx4~1 , soc_inst|m0_1|u_logic|D31wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Phlwx4~0 , soc_inst|m0_1|u_logic|Phlwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yonvx4~0 , soc_inst|m0_1|u_logic|Yonvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Shyvx4~0 , soc_inst|m0_1|u_logic|Shyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pmgwx4~0 , soc_inst|m0_1|u_logic|Pmgwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ez8wx4~0 , soc_inst|m0_1|u_logic|Ez8wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Elnvx4~0 , soc_inst|m0_1|u_logic|Elnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J6i2z4 , soc_inst|m0_1|u_logic|J6i2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xknvx4~0 , soc_inst|m0_1|u_logic|Xknvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kop2z4 , soc_inst|m0_1|u_logic|Kop2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~53 , soc_inst|m0_1|u_logic|Add2~53, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~49 , soc_inst|m0_1|u_logic|Add2~49, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~45 , soc_inst|m0_1|u_logic|Add2~45, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfhvx4~0 , soc_inst|m0_1|u_logic|Bfhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mddwx4~1 , soc_inst|m0_1|u_logic|Mddwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mddwx4~0 , soc_inst|m0_1|u_logic|Mddwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jfdwx4~0 , soc_inst|m0_1|u_logic|Jfdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kcdwx4~0 , soc_inst|m0_1|u_logic|Kcdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kcdwx4~1 , soc_inst|m0_1|u_logic|Kcdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W19wx4~0 , soc_inst|m0_1|u_logic|W19wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pm9wx4~0 , soc_inst|m0_1|u_logic|Pm9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y29wx4 , soc_inst|m0_1|u_logic|Y29wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kzbwx4~0 , soc_inst|m0_1|u_logic|Kzbwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W4dwx4~0 , soc_inst|m0_1|u_logic|W4dwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y5dwx4~0 , soc_inst|m0_1|u_logic|Y5dwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W4dwx4~1 , soc_inst|m0_1|u_logic|W4dwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D1awx4~0 , soc_inst|m0_1|u_logic|D1awx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U2s2z4~feeder , soc_inst|m0_1|u_logic|U2s2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U2s2z4 , soc_inst|m0_1|u_logic|U2s2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cy43z4 , soc_inst|m0_1|u_logic|Cy43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE , soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~2 , soc_inst|m0_1|u_logic|Vf5wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L763z4 , soc_inst|m0_1|u_logic|L763z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|To33z4 , soc_inst|m0_1|u_logic|To33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~3 , soc_inst|m0_1|u_logic|Vf5wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kf23z4 , soc_inst|m0_1|u_logic|Kf23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W5s2z4 , soc_inst|m0_1|u_logic|W5s2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~0 , soc_inst|m0_1|u_logic|Vf5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rpe3z4 , soc_inst|m0_1|u_logic|Rpe3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hue3z4 , soc_inst|m0_1|u_logic|Hue3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fre3z4 , soc_inst|m0_1|u_logic|Fre3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N71xx4~0 , soc_inst|m0_1|u_logic|N71xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y21xx4~0 , soc_inst|m0_1|u_logic|Y21xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~4 , soc_inst|m0_1|u_logic|Vf5wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I4s2z4 , soc_inst|m0_1|u_logic|I4s2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~1 , soc_inst|m0_1|u_logic|Vf5wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dq83z4 , soc_inst|m0_1|u_logic|Dq83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Duv2z4 , soc_inst|m0_1|u_logic|Duv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~6 , soc_inst|m0_1|u_logic|Vf5wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pu1wx4 , soc_inst|m0_1|u_logic|Pu1wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tse3z4 , soc_inst|m0_1|u_logic|Tse3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ug73z4 , soc_inst|m0_1|u_logic|Ug73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cxc3z4 , soc_inst|m0_1|u_logic|Cxc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~5 , soc_inst|m0_1|u_logic|Vf5wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S61xx4~0 , soc_inst|m0_1|u_logic|S61xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~7 , soc_inst|m0_1|u_logic|Vf5wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~8 , soc_inst|m0_1|u_logic|Vf5wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kzbwx4~1 , soc_inst|m0_1|u_logic|Kzbwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I2t2z4 , soc_inst|m0_1|u_logic|I2t2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lk9wx4~0 , soc_inst|m0_1|u_logic|Lk9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wxp2z4 , soc_inst|m0_1|u_logic|Wxp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C3w2z4 , soc_inst|m0_1|u_logic|C3w2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B2uvx4~0 , soc_inst|m0_1|u_logic|B2uvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wfuwx4 , soc_inst|m0_1|u_logic|Wfuwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K7pwx4 , soc_inst|m0_1|u_logic|K7pwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z0uvx4 , soc_inst|m0_1|u_logic|Z0uvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE , soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H6tvx4~0 , soc_inst|m0_1|u_logic|H6tvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|T4uvx4~0 , soc_inst|m0_1|u_logic|T4uvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Txtvx4~0 , soc_inst|m0_1|u_logic|Txtvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G5qvx4~1 , soc_inst|m0_1|u_logic|G5qvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ab9wx4~0 , soc_inst|m0_1|u_logic|Ab9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A1yvx4~0 , soc_inst|m0_1|u_logic|A1yvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mnpvx4~0 , soc_inst|m0_1|u_logic|Mnpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fmqvx4~0 , soc_inst|m0_1|u_logic|Fmqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dsqvx4 , soc_inst|m0_1|u_logic|Dsqvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Irqvx4~0 , soc_inst|m0_1|u_logic|Irqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Irqvx4~1 , soc_inst|m0_1|u_logic|Irqvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fmqvx4~1 , soc_inst|m0_1|u_logic|Fmqvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hhpvx4~0 , soc_inst|m0_1|u_logic|Hhpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gxxvx4~0 , soc_inst|m0_1|u_logic|Gxxvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ljpvx4~0 , soc_inst|m0_1|u_logic|Ljpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xipvx4~0 , soc_inst|m0_1|u_logic|Xipvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Onqvx4~0 , soc_inst|m0_1|u_logic|Onqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yplwx4~0 , soc_inst|m0_1|u_logic|Yplwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vopvx4~0 , soc_inst|m0_1|u_logic|Vopvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fmqvx4~2 , soc_inst|m0_1|u_logic|Fmqvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fmqvx4~3 , soc_inst|m0_1|u_logic|Fmqvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~0 , soc_inst|m0_1|u_logic|Rfpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~2 , soc_inst|m0_1|u_logic|Rfpvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ffxvx4~0 , soc_inst|m0_1|u_logic|Ffxvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~3 , soc_inst|m0_1|u_logic|Rfpvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~4 , soc_inst|m0_1|u_logic|Rfpvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~1 , soc_inst|m0_1|u_logic|Rfpvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G27wx4~1 , soc_inst|m0_1|u_logic|G27wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ae6wx4~0 , soc_inst|m0_1|u_logic|Ae6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bkxvx4~1 , soc_inst|m0_1|u_logic|Bkxvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bkxvx4~2 , soc_inst|m0_1|u_logic|Bkxvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U9swx4~0 , soc_inst|m0_1|u_logic|U9swx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S8swx4~0 , soc_inst|m0_1|u_logic|S8swx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bkxvx4~0 , soc_inst|m0_1|u_logic|Bkxvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bkxvx4 , soc_inst|m0_1|u_logic|Bkxvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~5 , soc_inst|m0_1|u_logic|Rfpvx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fzl2z4 , soc_inst|m0_1|u_logic|Fzl2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ejawx4~0 , soc_inst|m0_1|u_logic|Ejawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zgr2z4~DUPLICATE , soc_inst|m0_1|u_logic|Zgr2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cc73z4 , soc_inst|m0_1|u_logic|Cc73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE , soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sa23z4 , soc_inst|m0_1|u_logic|Sa23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~6 , soc_inst|m0_1|u_logic|Ze1wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qc1xx4~0 , soc_inst|m0_1|u_logic|Qc1xx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Z9dwx4~0 , soc_inst|m0_1|u_logic|Z9dwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H3d3z4 , soc_inst|m0_1|u_logic|H3d3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kryvx4~0 , soc_inst|m0_1|u_logic|Kryvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Jk0xx4~0 , soc_inst|m0_1|u_logic|Jk0xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xkfwx4~0 , soc_inst|m0_1|u_logic|Xkfwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kryvx4~0 , soc_inst|m0_1|u_logic|Kryvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Aj0xx4 , soc_inst|m0_1|u_logic|Aj0xx4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Ujqvx4~0 , soc_inst|m0_1|u_logic|Ujqvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Gjqvx4~0 , soc_inst|m0_1|u_logic|Gjqvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Xdnvx4~0 , soc_inst|m0_1|u_logic|Xdnvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Thm2z4 , soc_inst|m0_1|u_logic|Thm2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|G5qvx4~0 , soc_inst|m0_1|u_logic|G5qvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kfd2z4~0 , soc_inst|m0_1|u_logic|Kfd2z4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Dfd2z4 , soc_inst|m0_1|u_logic|Dfd2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Qobwx4~0 , soc_inst|m0_1|u_logic|Qobwx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|R29wx4~0 , soc_inst|m0_1|u_logic|R29wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|E1bvx4 , soc_inst|m0_1|u_logic|E1bvx4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Zznvx4~0 , soc_inst|m0_1|u_logic|Zznvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Vxnvx4~0 , soc_inst|m0_1|u_logic|Vxnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X4pvx4 , soc_inst|m0_1|u_logic|X4pvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K0qvx4 , soc_inst|m0_1|u_logic|K0qvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wspvx4 , soc_inst|m0_1|u_logic|Wspvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q8rwx4~0 , soc_inst|m0_1|u_logic|Q8rwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R7iwx4~1 , soc_inst|m0_1|u_logic|R7iwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fhc2z4~0 , soc_inst|m0_1|u_logic|Fhc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zqpvx4~2 , soc_inst|m0_1|u_logic|Zqpvx4~2, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Zqpvx4~0 , soc_inst|m0_1|u_logic|Zqpvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Zqpvx4~1 , soc_inst|m0_1|u_logic|Zqpvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zqpvx4~2 , soc_inst|m0_1|u_logic|Zqpvx4~2, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|P37wx4~1 , soc_inst|m0_1|u_logic|P37wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wxcwx4~0 , soc_inst|m0_1|u_logic|Wxcwx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|P37wx4~0 , soc_inst|m0_1|u_logic|P37wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Zqpvx4~3 , soc_inst|m0_1|u_logic|Zqpvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K0qvx4 , soc_inst|m0_1|u_logic|K0qvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wspvx4 , soc_inst|m0_1|u_logic|Wspvx4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Lqpvx4~0 , soc_inst|m0_1|u_logic|Lqpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djywx4~0 , soc_inst|m0_1|u_logic|Djywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lstwx4~0 , soc_inst|m0_1|u_logic|Lstwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B2uvx4~0 , soc_inst|m0_1|u_logic|B2uvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wfuwx4 , soc_inst|m0_1|u_logic|Wfuwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wq5wx4 , soc_inst|m0_1|u_logic|Wq5wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G4r2z4~DUPLICATE , soc_inst|m0_1|u_logic|G4r2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K0u2z4 , soc_inst|m0_1|u_logic|K0u2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T583z4 , soc_inst|m0_1|u_logic|T583z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kw63z4 , soc_inst|m0_1|u_logic|Kw63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ixxwx4~1 , soc_inst|m0_1|u_logic|Ixxwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S2r2z4~DUPLICATE , soc_inst|m0_1|u_logic|S2r2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T9v2z4 , soc_inst|m0_1|u_logic|T9v2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E1r2z4~DUPLICATE , soc_inst|m0_1|u_logic|E1r2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ka93z4 , soc_inst|m0_1|u_logic|Ka93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ixxwx4~0 , soc_inst|m0_1|u_logic|Ixxwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ixxwx4 , soc_inst|m0_1|u_logic|Ixxwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Svxwx4~0 , soc_inst|m0_1|u_logic|Svxwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vy7wx4~0 , soc_inst|m0_1|u_logic|Vy7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S1ewx4~0 , soc_inst|m0_1|u_logic|S1ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W6iwx4 , soc_inst|m0_1|u_logic|W6iwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tecwx4~0 , soc_inst|m0_1|u_logic|Tecwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE , soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z4bwx4~2 , soc_inst|m0_1|u_logic|Z4bwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z4bwx4~0 , soc_inst|m0_1|u_logic|Z4bwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I4dwx4~0 , soc_inst|m0_1|u_logic|I4dwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Afcwx4~0 , soc_inst|m0_1|u_logic|Afcwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ydcwx4~0 , soc_inst|m0_1|u_logic|Ydcwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE , soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[8]~5 , soc_inst|interconnect_1|HRDATA[8]~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[7]~9 , soc_inst|interconnect_1|HRDATA[7]~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[7]~10 , soc_inst|interconnect_1|HRDATA[7]~10, de1_soc_wrapper, 1
+instance = comp, \SW[4]~input , SW[4]~input, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[0][4] , soc_inst|switches_1|switch_store[0][4], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[4]~23 , soc_inst|interconnect_1|HRDATA[4]~23, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mis2z4~0 , soc_inst|m0_1|u_logic|Mis2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T2owx4~0 , soc_inst|m0_1|u_logic|T2owx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qwowx4 , soc_inst|m0_1|u_logic|Qwowx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vytvx4 , soc_inst|m0_1|u_logic|Vytvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mis2z4 , soc_inst|m0_1|u_logic|Mis2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ts5wx4~0 , soc_inst|m0_1|u_logic|Ts5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D9ovx4 , soc_inst|m0_1|u_logic|D9ovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R1w2z4 , soc_inst|m0_1|u_logic|R1w2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Trq2z4 , soc_inst|m0_1|u_logic|Trq2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Ijcwx4~0 , soc_inst|m0_1|u_logic|Ijcwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R7iwx4~0 , soc_inst|m0_1|u_logic|R7iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F8iwx4~0 , soc_inst|m0_1|u_logic|F8iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A5uvx4~0 , soc_inst|m0_1|u_logic|A5uvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aea3z4~0 , soc_inst|m0_1|u_logic|Aea3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H6tvx4~0 , soc_inst|m0_1|u_logic|H6tvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C5ovx4 , soc_inst|m0_1|u_logic|C5ovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aea3z4 , soc_inst|m0_1|u_logic|Aea3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Etmvx4~0 , soc_inst|m0_1|u_logic|Etmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F2o2z4 , soc_inst|m0_1|u_logic|F2o2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R3uvx4~0 , soc_inst|m0_1|u_logic|R3uvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rbmvx4~0 , soc_inst|m0_1|u_logic|Rbmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V3o2z4 , soc_inst|m0_1|u_logic|V3o2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C8rwx4~0 , soc_inst|m0_1|u_logic|C8rwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V9iwx4~0 , soc_inst|m0_1|u_logic|V9iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lcowx4~0 , soc_inst|m0_1|u_logic|Lcowx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G0w2z4 , soc_inst|m0_1|u_logic|G0w2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qppvx4~0 , soc_inst|m0_1|u_logic|Qppvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Muawx4~0 , soc_inst|m0_1|u_logic|Muawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U09wx4~0 , soc_inst|m0_1|u_logic|U09wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Otcwx4~0 , soc_inst|m0_1|u_logic|Otcwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fuawx4~0 , soc_inst|m0_1|u_logic|Fuawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fuawx4~1 , soc_inst|m0_1|u_logic|Fuawx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lz8wx4~0 , soc_inst|m0_1|u_logic|Lz8wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qppvx4~1 , soc_inst|m0_1|u_logic|Qppvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D31wx4~0 , soc_inst|m0_1|u_logic|D31wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ixh3z4~feeder , soc_inst|m0_1|u_logic|Ixh3z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ixh3z4 , soc_inst|m0_1|u_logic|Ixh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tvh3z4~feeder , soc_inst|m0_1|u_logic|Tvh3z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tvh3z4 , soc_inst|m0_1|u_logic|Tvh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~4 , soc_inst|m0_1|u_logic|Nn0wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G123z4 , soc_inst|m0_1|u_logic|G123z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ecp2z4 , soc_inst|m0_1|u_logic|Ecp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~0 , soc_inst|m0_1|u_logic|Nn0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M0i3z4 , soc_inst|m0_1|u_logic|M0i3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nr2xx4~0 , soc_inst|m0_1|u_logic|Nr2xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE , soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Fjlwx4~0 , soc_inst|m0_1|u_logic|Fjlwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ecowx4 , soc_inst|m0_1|u_logic|Ecowx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hbv2z4 , soc_inst|m0_1|u_logic|Hbv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H2m2z4~feeder , soc_inst|m0_1|u_logic|H2m2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H2m2z4 , soc_inst|m0_1|u_logic|H2m2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ebbwx4~3 , soc_inst|m0_1|u_logic|Ebbwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yb93z4 , soc_inst|m0_1|u_logic|Yb93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T0m2z4 , soc_inst|m0_1|u_logic|T0m2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ebbwx4~1 , soc_inst|m0_1|u_logic|Ebbwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yx63z4 , soc_inst|m0_1|u_logic|Yx63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V3m2z4 , soc_inst|m0_1|u_logic|V3m2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ebbwx4~0 , soc_inst|m0_1|u_logic|Ebbwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H783z4~DUPLICATE , soc_inst|m0_1|u_logic|H783z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y1u2z4 , soc_inst|m0_1|u_logic|Y1u2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ebbwx4~2 , soc_inst|m0_1|u_logic|Ebbwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ebbwx4 , soc_inst|m0_1|u_logic|Ebbwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jmdwx4~0 , soc_inst|m0_1|u_logic|Jmdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rw7wx4~1 , soc_inst|m0_1|u_logic|Rw7wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gt93z4 , soc_inst|m0_1|u_logic|Gt93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K7s2z4 , soc_inst|m0_1|u_logic|K7s2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pjqwx4~1 , soc_inst|m0_1|u_logic|Pjqwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rhu2z4 , soc_inst|m0_1|u_logic|Rhu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|An83z4~DUPLICATE , soc_inst|m0_1|u_logic|An83z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pjqwx4~2 , soc_inst|m0_1|u_logic|Pjqwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oas2z4 , soc_inst|m0_1|u_logic|Oas2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rd73z4 , soc_inst|m0_1|u_logic|Rd73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pjqwx4~0 , soc_inst|m0_1|u_logic|Pjqwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Arv2z4 , soc_inst|m0_1|u_logic|Arv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z8s2z4 , soc_inst|m0_1|u_logic|Z8s2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pjqwx4~3 , soc_inst|m0_1|u_logic|Pjqwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pjqwx4 , soc_inst|m0_1|u_logic|Pjqwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE , soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ue9wx4~0 , soc_inst|m0_1|u_logic|Ue9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hue3z4 , soc_inst|m0_1|u_logic|Hue3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L763z4 , soc_inst|m0_1|u_logic|L763z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cy43z4 , soc_inst|m0_1|u_logic|Cy43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oubwx4~0 , soc_inst|m0_1|u_logic|Oubwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|To33z4 , soc_inst|m0_1|u_logic|To33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kf23z4~feeder , soc_inst|m0_1|u_logic|Kf23z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kf23z4 , soc_inst|m0_1|u_logic|Kf23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oubwx4~1 , soc_inst|m0_1|u_logic|Oubwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tse3z4 , soc_inst|m0_1|u_logic|Tse3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lwbwx4~0 , soc_inst|m0_1|u_logic|Lwbwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rpe3z4 , soc_inst|m0_1|u_logic|Rpe3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fre3z4 , soc_inst|m0_1|u_logic|Fre3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oubwx4~2 , soc_inst|m0_1|u_logic|Oubwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oubwx4~3 , soc_inst|m0_1|u_logic|Oubwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V4d3z4~DUPLICATE , soc_inst|m0_1|u_logic|V4d3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~53 , soc_inst|m0_1|u_logic|Add2~53, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~65 , soc_inst|m0_1|u_logic|Add2~65, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~61 , soc_inst|m0_1|u_logic|Add2~61, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~57 , soc_inst|m0_1|u_logic|Add2~57, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~49 , soc_inst|m0_1|u_logic|Add2~49, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfhvx4~0 , soc_inst|m0_1|u_logic|Bfhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kzbwx4~0 , soc_inst|m0_1|u_logic|Kzbwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I4s2z4 , soc_inst|m0_1|u_logic|I4s2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~1 , soc_inst|m0_1|u_logic|Vf5wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W5s2z4 , soc_inst|m0_1|u_logic|W5s2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~0 , soc_inst|m0_1|u_logic|Vf5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~3 , soc_inst|m0_1|u_logic|Vf5wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~2 , soc_inst|m0_1|u_logic|Vf5wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dq83z4 , soc_inst|m0_1|u_logic|Dq83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tse3z4~DUPLICATE , soc_inst|m0_1|u_logic|Tse3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uku2z4~DUPLICATE , soc_inst|m0_1|u_logic|Uku2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Duv2z4 , soc_inst|m0_1|u_logic|Duv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~6 , soc_inst|m0_1|u_logic|Vf5wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ug73z4 , soc_inst|m0_1|u_logic|Ug73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cxc3z4~DUPLICATE , soc_inst|m0_1|u_logic|Cxc3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~5 , soc_inst|m0_1|u_logic|Vf5wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~7 , soc_inst|m0_1|u_logic|Vf5wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N71xx4~0 , soc_inst|m0_1|u_logic|N71xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L61xx4~0 , soc_inst|m0_1|u_logic|L61xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~4 , soc_inst|m0_1|u_logic|Vf5wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~8 , soc_inst|m0_1|u_logic|Vf5wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE , soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kzbwx4~1 , soc_inst|m0_1|u_logic|Kzbwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE , soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tuawx4~0 , soc_inst|m0_1|u_logic|Tuawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tuawx4~1 , soc_inst|m0_1|u_logic|Tuawx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~37 , soc_inst|m0_1|u_logic|Add5~37, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~77 , soc_inst|m0_1|u_logic|Add5~77, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~41 , soc_inst|m0_1|u_logic|Add5~41, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~113 , soc_inst|m0_1|u_logic|Add5~113, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfhvx4~1 , soc_inst|m0_1|u_logic|Bfhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I7owx4 , soc_inst|m0_1|u_logic|I7owx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D4a3z4~0 , soc_inst|m0_1|u_logic|D4a3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D4a3z4 , soc_inst|m0_1|u_logic|D4a3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wai2z4 , soc_inst|m0_1|u_logic|Wai2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Glj2z4~feeder , soc_inst|m0_1|u_logic|Glj2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Glj2z4 , soc_inst|m0_1|u_logic|Glj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O3ivx4~0 , soc_inst|m0_1|u_logic|O3ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O3ivx4~1 , soc_inst|m0_1|u_logic|O3ivx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V1l2z4 , soc_inst|m0_1|u_logic|V1l2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ta1xx4~0 , soc_inst|m0_1|u_logic|Ta1xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U71xx4~0 , soc_inst|m0_1|u_logic|U71xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~1 , soc_inst|m0_1|u_logic|Nd3wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T253z4~DUPLICATE , soc_inst|m0_1|u_logic|T253z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE , soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ld1xx4~0 , soc_inst|m0_1|u_logic|Ld1xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sd1xx4~0 , soc_inst|m0_1|u_logic|Sd1xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~3 , soc_inst|m0_1|u_logic|Nd3wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lpu2z4~feeder , soc_inst|m0_1|u_logic|Lpu2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE , soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cgt2z4~DUPLICATE , soc_inst|m0_1|u_logic|Cgt2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~6 , soc_inst|m0_1|u_logic|Nd3wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ll73z4 , soc_inst|m0_1|u_logic|Ll73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X2j2z4 , soc_inst|m0_1|u_logic|X2j2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xti2z4 , soc_inst|m0_1|u_logic|Xti2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~5 , soc_inst|m0_1|u_logic|Nd3wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~7 , soc_inst|m0_1|u_logic|Nd3wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pfz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Pfz2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ehz2z4 , soc_inst|m0_1|u_logic|Ehz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yd03z4 , soc_inst|m0_1|u_logic|Yd03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~4 , soc_inst|m0_1|u_logic|Nd3wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Koj2z4~feeder , soc_inst|m0_1|u_logic|Koj2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Koj2z4 , soc_inst|m0_1|u_logic|Koj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kt33z4 , soc_inst|m0_1|u_logic|Kt33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V41xx4~0 , soc_inst|m0_1|u_logic|V41xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ab1xx4~0 , soc_inst|m0_1|u_logic|Ab1xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~2 , soc_inst|m0_1|u_logic|Nd3wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sa13z4 , soc_inst|m0_1|u_logic|Sa13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jc1xx4~0 , soc_inst|m0_1|u_logic|Jc1xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y91xx4~0 , soc_inst|m0_1|u_logic|Y91xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Isi2z4~DUPLICATE , soc_inst|m0_1|u_logic|Isi2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~0 , soc_inst|m0_1|u_logic|Nd3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4 , soc_inst|m0_1|u_logic|Nd3wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H9iwx4~0 , soc_inst|m0_1|u_logic|H9iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S8ewx4~0 , soc_inst|m0_1|u_logic|S8ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H9iwx4~1 , soc_inst|m0_1|u_logic|H9iwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djywx4~0 , soc_inst|m0_1|u_logic|Djywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lstwx4~0 , soc_inst|m0_1|u_logic|Lstwx4~0, de1_soc_wrapper, 1
+instance = comp, \SW[7]~input , SW[7]~input, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[0][7] , soc_inst|switches_1|switch_store[0][7], de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[7] , soc_inst|m0_1|u_logic|hwdata_o[7], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[7]~4 , soc_inst|ram_1|data_to_memory[7]~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[6] , soc_inst|ram_1|saved_word_address[6], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory.raddr_a[6]~6 , soc_inst|ram_1|memory.raddr_a[6]~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[7] , soc_inst|ram_1|saved_word_address[7], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory.raddr_a[7]~7 , soc_inst|ram_1|memory.raddr_a[7]~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[8] , soc_inst|ram_1|saved_word_address[8], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory.raddr_a[8]~8 , soc_inst|ram_1|memory.raddr_a[8]~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~45 , soc_inst|m0_1|u_logic|Add3~45, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~41 , soc_inst|m0_1|u_logic|Add3~41, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~37 , soc_inst|m0_1|u_logic|Add3~37, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~81 , soc_inst|m0_1|u_logic|Add3~81, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wzivx4~0 , soc_inst|m0_1|u_logic|Wzivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wce3z4 , soc_inst|m0_1|u_logic|Wce3z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Hvivx4~0 , soc_inst|m0_1|u_logic|Hvivx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Rkd3z4 , soc_inst|m0_1|u_logic|Rkd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ab9wx4~0 , soc_inst|m0_1|u_logic|Ab9wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|R99wx4~0 , soc_inst|m0_1|u_logic|R99wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Lsd3z4 , soc_inst|m0_1|u_logic|Lsd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE , soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aud3z4~DUPLICATE , soc_inst|m0_1|u_logic|Aud3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~7 , soc_inst|m0_1|u_logic|Gm1wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U9e3z4 , soc_inst|m0_1|u_logic|U9e3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qc1xx4~0 , soc_inst|m0_1|u_logic|Qc1xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tyd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Tyd3z4~DUPLICATE, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Pvd3z4~feeder , soc_inst|m0_1|u_logic|Pvd3z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pvd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Pvd3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tyd3z4 , soc_inst|m0_1|u_logic|Tyd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pvd3z4 , soc_inst|m0_1|u_logic|Pvd3z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~6 , soc_inst|m0_1|u_logic|Gm1wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE , soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE , soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aud3z4 , soc_inst|m0_1|u_logic|Aud3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~7 , soc_inst|m0_1|u_logic|Gm1wx4~7, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~8 , soc_inst|m0_1|u_logic|Gm1wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Snd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Snd3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hpd3z4 , soc_inst|m0_1|u_logic|Hpd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~3 , soc_inst|m0_1|u_logic|Gm1wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F8e3z4 , soc_inst|m0_1|u_logic|F8e3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6e3z4~feeder , soc_inst|m0_1|u_logic|Q6e3z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6e3z4 , soc_inst|m0_1|u_logic|Q6e3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~2 , soc_inst|m0_1|u_logic|Gm1wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wqd3z4 , soc_inst|m0_1|u_logic|Wqd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Exd3z4 , soc_inst|m0_1|u_logic|Exd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~0 , soc_inst|m0_1|u_logic|Gm1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uo5xx4~0 , soc_inst|m0_1|u_logic|Uo5xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I0e3z4~feeder , soc_inst|m0_1|u_logic|I0e3z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I0e3z4 , soc_inst|m0_1|u_logic|I0e3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X1e3z4~feeder , soc_inst|m0_1|u_logic|X1e3z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X1e3z4 , soc_inst|m0_1|u_logic|X1e3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~1 , soc_inst|m0_1|u_logic|Gm1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE , soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M3e3z4 , soc_inst|m0_1|u_logic|M3e3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~4 , soc_inst|m0_1|u_logic|Gm1wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~5 , soc_inst|m0_1|u_logic|Gm1wx4~5, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|R99wx4~1 , soc_inst|m0_1|u_logic|R99wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE , soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|An83z4 , soc_inst|m0_1|u_logic|An83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~7 , soc_inst|m0_1|u_logic|Zh5wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~6 , soc_inst|m0_1|u_logic|Zh5wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~8 , soc_inst|m0_1|u_logic|Zh5wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE , soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xk1wx4~1 , soc_inst|m0_1|u_logic|Xk1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xk1wx4~0 , soc_inst|m0_1|u_logic|Xk1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4 , soc_inst|m0_1|u_logic|Gm1wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aj1wx4~1 , soc_inst|m0_1|u_logic|Aj1wx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|S3cwx4~0 , soc_inst|m0_1|u_logic|S3cwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S3cwx4~1 , soc_inst|m0_1|u_logic|S3cwx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Rds2z4 , soc_inst|m0_1|u_logic|Rds2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B613z4~DUPLICATE , soc_inst|m0_1|u_logic|B613z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uga2z4~2 , soc_inst|m0_1|u_logic|Uga2z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE , soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I463z4 , soc_inst|m0_1|u_logic|I463z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uga2z4~0 , soc_inst|m0_1|u_logic|Uga2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dcs2z4 , soc_inst|m0_1|u_logic|Dcs2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ria2z4~0 , soc_inst|m0_1|u_logic|Ria2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D432z4~0 , soc_inst|m0_1|u_logic|D432z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oas2z4~DUPLICATE , soc_inst|m0_1|u_logic|Oas2z4~DUPLICATE, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Hc23z4 , soc_inst|m0_1|u_logic|Hc23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~0 , soc_inst|m0_1|u_logic|Zh5wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Ql33z4 , soc_inst|m0_1|u_logic|Ql33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uga2z4~1 , soc_inst|m0_1|u_logic|Uga2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uga2z4~3 , soc_inst|m0_1|u_logic|Uga2z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hxnvx4~0 , soc_inst|m0_1|u_logic|Hxnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I463z4~DUPLICATE , soc_inst|m0_1|u_logic|I463z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~3 , soc_inst|m0_1|u_logic|Zh5wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B613z4 , soc_inst|m0_1|u_logic|B613z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H903z4~DUPLICATE , soc_inst|m0_1|u_logic|H903z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~4 , soc_inst|m0_1|u_logic|Zh5wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z8s2z4~feeder , soc_inst|m0_1|u_logic|Z8s2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z8s2z4 , soc_inst|m0_1|u_logic|Z8s2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~1 , soc_inst|m0_1|u_logic|Zh5wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K7s2z4 , soc_inst|m0_1|u_logic|K7s2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zu43z4~feeder , soc_inst|m0_1|u_logic|Zu43z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zu43z4 , soc_inst|m0_1|u_logic|Zu43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~2 , soc_inst|m0_1|u_logic|Zh5wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~5 , soc_inst|m0_1|u_logic|Zh5wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~9 , soc_inst|m0_1|u_logic|Zh5wx4~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Do1wx4~2 , soc_inst|m0_1|u_logic|Do1wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Do1wx4~1 , soc_inst|m0_1|u_logic|Do1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Do1wx4~0 , soc_inst|m0_1|u_logic|Do1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~113 , soc_inst|m0_1|u_logic|Add5~113, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Add5~105 , soc_inst|m0_1|u_logic|Add5~105, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Glnwx4~2 , soc_inst|m0_1|u_logic|Glnwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pn1wx4~0 , soc_inst|m0_1|u_logic|Pn1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Arv2z4 , soc_inst|m0_1|u_logic|Arv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rhu2z4~DUPLICATE , soc_inst|m0_1|u_logic|Rhu2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~7 , soc_inst|m0_1|u_logic|Zh5wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|An83z4 , soc_inst|m0_1|u_logic|An83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rd73z4 , soc_inst|m0_1|u_logic|Rd73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gt93z4 , soc_inst|m0_1|u_logic|Gt93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~6 , soc_inst|m0_1|u_logic|Zh5wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE , soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~8 , soc_inst|m0_1|u_logic|Zh5wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S3cwx4~1 , soc_inst|m0_1|u_logic|S3cwx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Add5~45 , soc_inst|m0_1|u_logic|Add5~45, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gmd3z4 , soc_inst|m0_1|u_logic|Gmd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~45 , soc_inst|m0_1|u_logic|Add2~45, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~97 , soc_inst|m0_1|u_logic|Add2~97, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uehvx4~0 , soc_inst|m0_1|u_logic|Uehvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uehvx4~1 , soc_inst|m0_1|u_logic|Uehvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S6nwx4 , soc_inst|m0_1|u_logic|S6nwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Imnwx4 , soc_inst|m0_1|u_logic|Imnwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pmnwx4 , soc_inst|m0_1|u_logic|Pmnwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aj1wx4~2 , soc_inst|m0_1|u_logic|Aj1wx4~2, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Nlnwx4~0 , soc_inst|m0_1|u_logic|Nlnwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tr63z4 , soc_inst|m0_1|u_logic|Tr63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F9j2z4 , soc_inst|m0_1|u_logic|F9j2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mnvwx4~0 , soc_inst|m0_1|u_logic|Mnvwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zpj2z4 , soc_inst|m0_1|u_logic|Zpj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R293z4~DUPLICATE , soc_inst|m0_1|u_logic|R293z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mnvwx4~1 , soc_inst|m0_1|u_logic|Mnvwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vmj2z4 , soc_inst|m0_1|u_logic|Vmj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C5v2z4~DUPLICATE , soc_inst|m0_1|u_logic|C5v2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mnvwx4~3 , soc_inst|m0_1|u_logic|Mnvwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tvt2z4~DUPLICATE , soc_inst|m0_1|u_logic|Tvt2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mnvwx4~2 , soc_inst|m0_1|u_logic|Mnvwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mnvwx4 , soc_inst|m0_1|u_logic|Mnvwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pgf3z4 , soc_inst|m0_1|u_logic|Pgf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C552z4~0 , soc_inst|m0_1|u_logic|C552z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qrf3z4 , soc_inst|m0_1|u_logic|Qrf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M352z4~0 , soc_inst|m0_1|u_logic|M352z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tjf3z4 , soc_inst|m0_1|u_logic|Tjf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O452z4~0 , soc_inst|m0_1|u_logic|O452z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uuf3z4 , soc_inst|m0_1|u_logic|Uuf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ftf3z4 , soc_inst|m0_1|u_logic|Ftf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T352z4~0 , soc_inst|m0_1|u_logic|T352z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R6cwx4~3 , soc_inst|m0_1|u_logic|R6cwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eif3z4~feeder , soc_inst|m0_1|u_logic|Eif3z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eif3z4 , soc_inst|m0_1|u_logic|Eif3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Orj2z4 , soc_inst|m0_1|u_logic|Orj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V41xx4~0 , soc_inst|m0_1|u_logic|V41xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ab1xx4~0 , soc_inst|m0_1|u_logic|Ab1xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R6cwx4~2 , soc_inst|m0_1|u_logic|R6cwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mof3z4~DUPLICATE , soc_inst|m0_1|u_logic|Mof3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ecowx4 , soc_inst|m0_1|u_logic|Ecowx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[19]~14 , soc_inst|m0_1|u_logic|hwdata_o[19]~14, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C5ovx4 , soc_inst|m0_1|u_logic|C5ovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L8m2z4 , soc_inst|m0_1|u_logic|L8m2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|G6owx4 , soc_inst|m0_1|u_logic|G6owx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[23]~0 , soc_inst|ram_1|data_to_memory[23]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V4ovx4~0 , soc_inst|m0_1|u_logic|V4ovx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jca3z4~0 , soc_inst|m0_1|u_logic|Jca3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jca3z4 , soc_inst|m0_1|u_logic|Jca3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z0uvx4 , soc_inst|m0_1|u_logic|Z0uvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vfd3z4 , soc_inst|m0_1|u_logic|Vfd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K7pwx4 , soc_inst|m0_1|u_logic|K7pwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L0uvx4 , soc_inst|m0_1|u_logic|L0uvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z4l2z4~DUPLICATE , soc_inst|m0_1|u_logic|Z4l2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T2owx4~0 , soc_inst|m0_1|u_logic|T2owx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qwowx4 , soc_inst|m0_1|u_logic|Qwowx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vytvx4 , soc_inst|m0_1|u_logic|Vytvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uls2z4 , soc_inst|m0_1|u_logic|Uls2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E0uvx4 , soc_inst|m0_1|u_logic|E0uvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qztvx4 , soc_inst|m0_1|u_logic|Qztvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Svs2z4~DUPLICATE , soc_inst|m0_1|u_logic|Svs2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K3uvx4~0 , soc_inst|m0_1|u_logic|K3uvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uqi2z4~feeder , soc_inst|m0_1|u_logic|Uqi2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W2uvx4 , soc_inst|m0_1|u_logic|W2uvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uqi2z4 , soc_inst|m0_1|u_logic|Uqi2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R6xwx4~0 , soc_inst|m0_1|u_logic|R6xwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R6xwx4~1 , soc_inst|m0_1|u_logic|R6xwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R6xwx4~2 , soc_inst|m0_1|u_logic|R6xwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O3awx4~0 , soc_inst|m0_1|u_logic|O3awx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fuawx4~1 , soc_inst|m0_1|u_logic|Fuawx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kt23z4 , soc_inst|m0_1|u_logic|Kt23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sd1xx4~0 , soc_inst|m0_1|u_logic|Sd1xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cc53z4~feeder , soc_inst|m0_1|u_logic|Cc53z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cc53z4 , soc_inst|m0_1|u_logic|Cc53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~3 , soc_inst|m0_1|u_logic|Rtpvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T243z4 , soc_inst|m0_1|u_logic|T243z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fio2z4 , soc_inst|m0_1|u_logic|Fio2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~2 , soc_inst|m0_1|u_logic|Rtpvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ujo2z4~feeder , soc_inst|m0_1|u_logic|Ujo2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ujo2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ujo2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ta1xx4~0 , soc_inst|m0_1|u_logic|Ta1xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U71xx4~0 , soc_inst|m0_1|u_logic|U71xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~1 , soc_inst|m0_1|u_logic|Rtpvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ymo2z4 , soc_inst|m0_1|u_logic|Ymo2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uu73z4 , soc_inst|m0_1|u_logic|Uu73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uyu2z4 , soc_inst|m0_1|u_logic|Uyu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lpt2z4 , soc_inst|m0_1|u_logic|Lpt2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~6 , soc_inst|m0_1|u_logic|Rtpvx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ll63z4~DUPLICATE , soc_inst|m0_1|u_logic|Ll63z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jw83z4 , soc_inst|m0_1|u_logic|Jw83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~5 , soc_inst|m0_1|u_logic|Rtpvx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~7 , soc_inst|m0_1|u_logic|Rtpvx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jlo2z4 , soc_inst|m0_1|u_logic|Jlo2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bk13z4 , soc_inst|m0_1|u_logic|Bk13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jc1xx4~0 , soc_inst|m0_1|u_logic|Jc1xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y91xx4~0 , soc_inst|m0_1|u_logic|Y91xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~0 , soc_inst|m0_1|u_logic|Rtpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Noo2z4 , soc_inst|m0_1|u_logic|Noo2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sl03z4 , soc_inst|m0_1|u_logic|Sl03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yoz2z4 , soc_inst|m0_1|u_logic|Yoz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~4 , soc_inst|m0_1|u_logic|Rtpvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4 , soc_inst|m0_1|u_logic|Rtpvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kih2z4~0 , soc_inst|m0_1|u_logic|Kih2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ehcwx4~0 , soc_inst|m0_1|u_logic|Ehcwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rmawx4~0 , soc_inst|m0_1|u_logic|Rmawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mdzvx4~0 , soc_inst|m0_1|u_logic|Mdzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ducvx4 , soc_inst|m0_1|u_logic|Ducvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H9iwx4~1 , soc_inst|m0_1|u_logic|H9iwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yih2z4~0 , soc_inst|m0_1|u_logic|Yih2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zbbwx4~0 , soc_inst|m0_1|u_logic|Zbbwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hrcvx4 , soc_inst|m0_1|u_logic|Hrcvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~69 , soc_inst|m0_1|u_logic|Add2~69, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~29 , soc_inst|m0_1|u_logic|Add2~29, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hihvx4~0 , soc_inst|m0_1|u_logic|Hihvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vnbvx4~0 , soc_inst|m0_1|u_logic|Vnbvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rjzvx4~0 , soc_inst|m0_1|u_logic|Rjzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uhzvx4~0 , soc_inst|m0_1|u_logic|Uhzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Arh3z4~DUPLICATE , soc_inst|m0_1|u_logic|Arh3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~3 , soc_inst|m0_1|u_logic|Z62wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Euh3z4~DUPLICATE , soc_inst|m0_1|u_logic|Euh3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T04xx4~0 , soc_inst|m0_1|u_logic|T04xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Na63z4~feeder , soc_inst|m0_1|u_logic|Na63z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Na63z4 , soc_inst|m0_1|u_logic|Na63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E0d3z4 , soc_inst|m0_1|u_logic|E0d3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~1 , soc_inst|m0_1|u_logic|Z62wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lph3z4 , soc_inst|m0_1|u_logic|Lph3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E153z4~DUPLICATE , soc_inst|m0_1|u_logic|E153z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~2 , soc_inst|m0_1|u_logic|Z62wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wnu2z4 , soc_inst|m0_1|u_logic|Wnu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rdq2z4 , soc_inst|m0_1|u_logic|Rdq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~4 , soc_inst|m0_1|u_logic|Z62wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ccq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ccq2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Psh3z4~DUPLICATE , soc_inst|m0_1|u_logic|Psh3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Naq2z4 , soc_inst|m0_1|u_logic|Naq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wj73z4~DUPLICATE , soc_inst|m0_1|u_logic|Wj73z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~6 , soc_inst|m0_1|u_logic|Z62wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mi23z4~DUPLICATE , soc_inst|m0_1|u_logic|Mi23z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ft83z4 , soc_inst|m0_1|u_logic|Ft83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vr33z4 , soc_inst|m0_1|u_logic|Vr33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~7 , soc_inst|m0_1|u_logic|Z62wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~8 , soc_inst|m0_1|u_logic|Z62wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ns9wx4~0 , soc_inst|m0_1|u_logic|Ns9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ns9wx4~1 , soc_inst|m0_1|u_logic|Ns9wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Euh3z4 , soc_inst|m0_1|u_logic|Euh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Psh3z4 , soc_inst|m0_1|u_logic|Psh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aw9wx4~0 , soc_inst|m0_1|u_logic|Aw9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Arh3z4 , soc_inst|m0_1|u_logic|Arh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lph3z4~DUPLICATE , soc_inst|m0_1|u_logic|Lph3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Du9wx4~2 , soc_inst|m0_1|u_logic|Du9wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E153z4 , soc_inst|m0_1|u_logic|E153z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Na63z4~DUPLICATE , soc_inst|m0_1|u_logic|Na63z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Du9wx4~0 , soc_inst|m0_1|u_logic|Du9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mi23z4 , soc_inst|m0_1|u_logic|Mi23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Du9wx4~1 , soc_inst|m0_1|u_logic|Du9wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Du9wx4~3 , soc_inst|m0_1|u_logic|Du9wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Snd3z4 , soc_inst|m0_1|u_logic|Snd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ai9wx4~1 , soc_inst|m0_1|u_logic|Ai9wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B5e3z4 , soc_inst|m0_1|u_logic|B5e3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lsd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Lsd3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ai9wx4~0 , soc_inst|m0_1|u_logic|Ai9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wqd3z4 , soc_inst|m0_1|u_logic|Wqd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M3e3z4~feeder , soc_inst|m0_1|u_logic|M3e3z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M3e3z4 , soc_inst|m0_1|u_logic|M3e3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ai9wx4~2 , soc_inst|m0_1|u_logic|Ai9wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X1e3z4~feeder , soc_inst|m0_1|u_logic|X1e3z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X1e3z4~DUPLICATE , soc_inst|m0_1|u_logic|X1e3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I0e3z4~feeder , soc_inst|m0_1|u_logic|I0e3z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I0e3z4 , soc_inst|m0_1|u_logic|I0e3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ai9wx4~3 , soc_inst|m0_1|u_logic|Ai9wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ai9wx4 , soc_inst|m0_1|u_logic|Ai9wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sndwx4~0 , soc_inst|m0_1|u_logic|Sndwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zgr2z4 , soc_inst|m0_1|u_logic|Zgr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cc73z4 , soc_inst|m0_1|u_logic|Cc73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sa23z4~DUPLICATE , soc_inst|m0_1|u_logic|Sa23z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE , soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~6 , soc_inst|m0_1|u_logic|Ze1wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~93 , soc_inst|m0_1|u_logic|Add2~93, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ekhvx4~0 , soc_inst|m0_1|u_logic|Ekhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lpv2z4~DUPLICATE , soc_inst|m0_1|u_logic|Lpv2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vdr2z4 , soc_inst|m0_1|u_logic|Vdr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~1 , soc_inst|m0_1|u_logic|Ze1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oir2z4 , soc_inst|m0_1|u_logic|Oir2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dy4xx4~0 , soc_inst|m0_1|u_logic|Dy4xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cgu2z4 , soc_inst|m0_1|u_logic|Cgu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kfr2z4 , soc_inst|m0_1|u_logic|Kfr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~4 , soc_inst|m0_1|u_logic|Ze1wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bk33z4 , soc_inst|m0_1|u_logic|Bk33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ll83z4 , soc_inst|m0_1|u_logic|Ll83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~0 , soc_inst|m0_1|u_logic|Ze1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rilwx4~0 , soc_inst|m0_1|u_logic|Rilwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A5uvx4~0 , soc_inst|m0_1|u_logic|A5uvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T5tvx4 , soc_inst|m0_1|u_logic|T5tvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tna3z4 , soc_inst|m0_1|u_logic|Tna3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aea3z4~0 , soc_inst|m0_1|u_logic|Aea3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aea3z4 , soc_inst|m0_1|u_logic|Aea3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nfb3z4~0 , soc_inst|m0_1|u_logic|Nfb3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nfb3z4 , soc_inst|m0_1|u_logic|Nfb3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[4] , soc_inst|m0_1|u_logic|hwdata_o[4], de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Taa3z4~0 , soc_inst|m0_1|u_logic|Taa3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Taa3z4 , soc_inst|m0_1|u_logic|Taa3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gza3z4 , soc_inst|m0_1|u_logic|Gza3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~94 , soc_inst|m0_1|u_logic|Add0~94, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~33 , soc_inst|m0_1|u_logic|Add0~33, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C4b3z4 , soc_inst|m0_1|u_logic|C4b3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qfa3z4~0 , soc_inst|m0_1|u_logic|Qfa3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qfa3z4 , soc_inst|m0_1|u_logic|Qfa3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xsmvx4~0 , soc_inst|m0_1|u_logic|Xsmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE , soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~21 , soc_inst|m0_1|u_logic|Add0~21, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gha3z4~0 , soc_inst|m0_1|u_logic|Gha3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gha3z4 , soc_inst|m0_1|u_logic|Gha3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qsmvx4~0 , soc_inst|m0_1|u_logic|Qsmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M2b3z4 , soc_inst|m0_1|u_logic|M2b3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~57 , soc_inst|m0_1|u_logic|Add0~57, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W0b3z4 , soc_inst|m0_1|u_logic|W0b3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~20 , soc_inst|m0_1|u_logic|hwdata_o~20, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wia3z4 , soc_inst|m0_1|u_logic|Wia3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jsmvx4~0 , soc_inst|m0_1|u_logic|Jsmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W0b3z4~DUPLICATE , soc_inst|m0_1|u_logic|W0b3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~41 , soc_inst|m0_1|u_logic|Add0~41, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Csmvx4~0 , soc_inst|m0_1|u_logic|Csmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE , soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~65 , soc_inst|m0_1|u_logic|Add0~65, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[5] , soc_inst|m0_1|u_logic|hwdata_o[5], de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mka3z4 , soc_inst|m0_1|u_logic|Mka3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vrmvx4~0 , soc_inst|m0_1|u_logic|Vrmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qxa3z4 , soc_inst|m0_1|u_logic|Qxa3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~89 , soc_inst|m0_1|u_logic|Add0~89, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qtzvx4~0 , soc_inst|m0_1|u_logic|Qtzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oszvx4~0 , soc_inst|m0_1|u_logic|Oszvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Luzvx4~1 , soc_inst|m0_1|u_logic|Luzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Luzvx4~0 , soc_inst|m0_1|u_logic|Luzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Omyvx4~0 , soc_inst|m0_1|u_logic|Omyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Omyvx4~1 , soc_inst|m0_1|u_logic|Omyvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pcd3z4~0 , soc_inst|m0_1|u_logic|Pcd3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pcd3z4 , soc_inst|m0_1|u_logic|Pcd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rsa3z4~DUPLICATE , soc_inst|m0_1|u_logic|Rsa3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U5a3z4 , soc_inst|m0_1|u_logic|U5a3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M5tvx4~0 , soc_inst|m0_1|u_logic|M5tvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE , soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Txa2z4~0 , soc_inst|m0_1|u_logic|Txa2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yz4wx4 , soc_inst|m0_1|u_logic|Yz4wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zyhvx4~0 , soc_inst|m0_1|u_logic|Zyhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rym2z4 , soc_inst|m0_1|u_logic|Rym2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zyovx4 , soc_inst|m0_1|u_logic|Zyovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tqc3z4~0 , soc_inst|m0_1|u_logic|Tqc3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tqc3z4 , soc_inst|m0_1|u_logic|Tqc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M1pwx4~1 , soc_inst|m0_1|u_logic|M1pwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kss2z4~0 , soc_inst|m0_1|u_logic|Kss2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E0uvx4 , soc_inst|m0_1|u_logic|E0uvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qztvx4 , soc_inst|m0_1|u_logic|Qztvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kss2z4 , soc_inst|m0_1|u_logic|Kss2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M1pwx4~0 , soc_inst|m0_1|u_logic|M1pwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M1pwx4~2 , soc_inst|m0_1|u_logic|M1pwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M1pwx4~3 , soc_inst|m0_1|u_logic|M1pwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M1pwx4~4 , soc_inst|m0_1|u_logic|M1pwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nl43z4 , soc_inst|m0_1|u_logic|Nl43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Arn2z4 , soc_inst|m0_1|u_logic|Arn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|St0wx4~2 , soc_inst|m0_1|u_logic|St0wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K103z4~feeder , soc_inst|m0_1|u_logic|K103z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K103z4 , soc_inst|m0_1|u_logic|K103z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ey03z4~feeder , soc_inst|m0_1|u_logic|Ey03z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ey03z4 , soc_inst|m0_1|u_logic|Ey03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|St0wx4~4 , soc_inst|m0_1|u_logic|St0wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V223z4 , soc_inst|m0_1|u_logic|V223z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eun2z4~feeder , soc_inst|m0_1|u_logic|Eun2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eun2z4 , soc_inst|m0_1|u_logic|Eun2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|St0wx4~0 , soc_inst|m0_1|u_logic|St0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ixn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ixn2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jq1xx4~0 , soc_inst|m0_1|u_logic|Jq1xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Psn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Psn2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S2r2z4 , soc_inst|m0_1|u_logic|S2r2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bdwwx4~3 , soc_inst|m0_1|u_logic|Bdwwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E1r2z4 , soc_inst|m0_1|u_logic|E1r2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bdwwx4~1 , soc_inst|m0_1|u_logic|Bdwwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G4r2z4 , soc_inst|m0_1|u_logic|G4r2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bdwwx4~0 , soc_inst|m0_1|u_logic|Bdwwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bdwwx4~2 , soc_inst|m0_1|u_logic|Bdwwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bdwwx4 , soc_inst|m0_1|u_logic|Bdwwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I30wx4~1 , soc_inst|m0_1|u_logic|I30wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K4mvx4~0 , soc_inst|m0_1|u_logic|K4mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K4mvx4~1 , soc_inst|m0_1|u_logic|K4mvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jw93z4 , soc_inst|m0_1|u_logic|Jw93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X6m2z4 , soc_inst|m0_1|u_logic|X6m2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gf43z4 , soc_inst|m0_1|u_logic|Gf43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Po53z4~DUPLICATE , soc_inst|m0_1|u_logic|Po53z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D7bwx4~0 , soc_inst|m0_1|u_logic|D7bwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X533z4 , soc_inst|m0_1|u_logic|X533z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ow13z4 , soc_inst|m0_1|u_logic|Ow13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D7bwx4~1 , soc_inst|m0_1|u_logic|D7bwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J5m2z4~feeder , soc_inst|m0_1|u_logic|J5m2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J5m2z4 , soc_inst|m0_1|u_logic|J5m2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A9bwx4~0 , soc_inst|m0_1|u_logic|A9bwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bv03z4 , soc_inst|m0_1|u_logic|Bv03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hyz2z4 , soc_inst|m0_1|u_logic|Hyz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D7bwx4~2 , soc_inst|m0_1|u_logic|D7bwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D7bwx4~3 , soc_inst|m0_1|u_logic|D7bwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aqnvx4~0 , soc_inst|m0_1|u_logic|Aqnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O2bwx4~0 , soc_inst|m0_1|u_logic|O2bwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I30wx4~0 , soc_inst|m0_1|u_logic|I30wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|If33z4~DUPLICATE , soc_inst|m0_1|u_logic|If33z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ay53z4~DUPLICATE , soc_inst|m0_1|u_logic|Ay53z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W21wx4~3 , soc_inst|m0_1|u_logic|W21wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S6nwx4 , soc_inst|m0_1|u_logic|S6nwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Imnwx4 , soc_inst|m0_1|u_logic|Imnwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qs7wx4~0 , soc_inst|m0_1|u_logic|Qs7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qs7wx4~1 , soc_inst|m0_1|u_logic|Qs7wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F8iwx4~0 , soc_inst|m0_1|u_logic|F8iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pmnwx4 , soc_inst|m0_1|u_logic|Pmnwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E5awx4~0 , soc_inst|m0_1|u_logic|E5awx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE , soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~73 , soc_inst|m0_1|u_logic|Add2~73, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~69 , soc_inst|m0_1|u_logic|Add2~69, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~65 , soc_inst|m0_1|u_logic|Add2~65, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ldhvx4~0 , soc_inst|m0_1|u_logic|Ldhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M9awx4~0 , soc_inst|m0_1|u_logic|M9awx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE , soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vgg3z4 , soc_inst|m0_1|u_logic|Vgg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~3 , soc_inst|m0_1|u_logic|Hk0wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eyg3z4~DUPLICATE , soc_inst|m0_1|u_logic|Eyg3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xi2xx4~0 , soc_inst|m0_1|u_logic|Xi2xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Olg3z4 , soc_inst|m0_1|u_logic|Olg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wrg3z4 , soc_inst|m0_1|u_logic|Wrg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~0 , soc_inst|m0_1|u_logic|Hk0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sog3z4 , soc_inst|m0_1|u_logic|Sog3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ccg3z4 , soc_inst|m0_1|u_logic|Ccg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nag3z4 , soc_inst|m0_1|u_logic|Nag3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dng3z4 , soc_inst|m0_1|u_logic|Dng3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dmvwx4~0 , soc_inst|m0_1|u_logic|Dmvwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hqg3z4~DUPLICATE , soc_inst|m0_1|u_logic|Hqg3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gfg3z4 , soc_inst|m0_1|u_logic|Gfg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rdg3z4 , soc_inst|m0_1|u_logic|Rdg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dmvwx4~1 , soc_inst|m0_1|u_logic|Dmvwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dmvwx4 , soc_inst|m0_1|u_logic|Dmvwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kig3z4 , soc_inst|m0_1|u_logic|Kig3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xu82z4~0 , soc_inst|m0_1|u_logic|Xu82z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Avg3z4 , soc_inst|m0_1|u_logic|Avg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ltg3z4 , soc_inst|m0_1|u_logic|Ltg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE , soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xu82z4~2 , soc_inst|m0_1|u_logic|Xu82z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eyg3z4 , soc_inst|m0_1|u_logic|Eyg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zjg3z4 , soc_inst|m0_1|u_logic|Zjg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE , soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xu82z4~1 , soc_inst|m0_1|u_logic|Xu82z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uw82z4~0 , soc_inst|m0_1|u_logic|Uw82z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xu82z4~3 , soc_inst|m0_1|u_logic|Xu82z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fj0wx4~0 , soc_inst|m0_1|u_logic|Fj0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sknwx4~0 , soc_inst|m0_1|u_logic|Sknwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sknwx4~1 , soc_inst|m0_1|u_logic|Sknwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yilwx4~0 , soc_inst|m0_1|u_logic|Yilwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sknwx4~2 , soc_inst|m0_1|u_logic|Sknwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zetwx4 , soc_inst|m0_1|u_logic|Zetwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xuxwx4 , soc_inst|m0_1|u_logic|Xuxwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mouwx4~0 , soc_inst|m0_1|u_logic|Mouwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T2owx4~1 , soc_inst|m0_1|u_logic|T2owx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~77 , soc_inst|m0_1|u_logic|Add3~77, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M413z4~DUPLICATE , soc_inst|m0_1|u_logic|M413z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S703z4~feeder , soc_inst|m0_1|u_logic|S703z4~feeder, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|S703z4 , soc_inst|m0_1|u_logic|S703z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M413z4 , soc_inst|m0_1|u_logic|M413z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~2 , soc_inst|m0_1|u_logic|Ze1wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gcr2z4 , soc_inst|m0_1|u_logic|Gcr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rr93z4 , soc_inst|m0_1|u_logic|Rr93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~3 , soc_inst|m0_1|u_logic|Ze1wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~5 , soc_inst|m0_1|u_logic|Ze1wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ejawx4~0 , soc_inst|m0_1|u_logic|Ejawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ejawx4~1 , soc_inst|m0_1|u_logic|Ejawx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U9a2z4~2 , soc_inst|m0_1|u_logic|U9a2z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zgr2z4 , soc_inst|m0_1|u_logic|Zgr2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Rba2z4~0 , soc_inst|m0_1|u_logic|Rba2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T263z4 , soc_inst|m0_1|u_logic|T263z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bk33z4 , soc_inst|m0_1|u_logic|Bk33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U9a2z4~1 , soc_inst|m0_1|u_logic|U9a2z4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Kt43z4 , soc_inst|m0_1|u_logic|Kt43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T263z4 , soc_inst|m0_1|u_logic|T263z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|U9a2z4~0 , soc_inst|m0_1|u_logic|U9a2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sa23z4 , soc_inst|m0_1|u_logic|Sa23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U9a2z4~1 , soc_inst|m0_1|u_logic|U9a2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M413z4~DUPLICATE , soc_inst|m0_1|u_logic|M413z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S703z4~DUPLICATE , soc_inst|m0_1|u_logic|S703z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U9a2z4~2 , soc_inst|m0_1|u_logic|U9a2z4~2, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|U9a2z4~3 , soc_inst|m0_1|u_logic|U9a2z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ll83z4~DUPLICATE , soc_inst|m0_1|u_logic|Ll83z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cgu2z4 , soc_inst|m0_1|u_logic|Cgu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H2wwx4~2 , soc_inst|m0_1|u_logic|H2wwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kfr2z4 , soc_inst|m0_1|u_logic|Kfr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H2wwx4~0 , soc_inst|m0_1|u_logic|H2wwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vdr2z4 , soc_inst|m0_1|u_logic|Vdr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lpv2z4 , soc_inst|m0_1|u_logic|Lpv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H2wwx4~3 , soc_inst|m0_1|u_logic|H2wwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rr93z4 , soc_inst|m0_1|u_logic|Rr93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gcr2z4 , soc_inst|m0_1|u_logic|Gcr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H2wwx4~1 , soc_inst|m0_1|u_logic|H2wwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H2wwx4 , soc_inst|m0_1|u_logic|H2wwx4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Pg1wx4~0 , soc_inst|m0_1|u_logic|Pg1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~13 , soc_inst|m0_1|u_logic|Add5~13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ekhvx4~1 , soc_inst|m0_1|u_logic|Ekhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V0k2z4 , soc_inst|m0_1|u_logic|V0k2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y1v2z4 , soc_inst|m0_1|u_logic|Y1v2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nz83z4 , soc_inst|m0_1|u_logic|Nz83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K2k2z4~feeder , soc_inst|m0_1|u_logic|K2k2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K2k2z4 , soc_inst|m0_1|u_logic|K2k2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Feqwx4~0 , soc_inst|m0_1|u_logic|Feqwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pst2z4~feeder , soc_inst|m0_1|u_logic|Pst2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pst2z4 , soc_inst|m0_1|u_logic|Pst2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z3k2z4 , soc_inst|m0_1|u_logic|Z3k2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yx73z4 , soc_inst|m0_1|u_logic|Yx73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Po63z4~DUPLICATE , soc_inst|m0_1|u_logic|Po63z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Feqwx4~1 , soc_inst|m0_1|u_logic|Feqwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Feqwx4 , soc_inst|m0_1|u_logic|Feqwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Art2z4 , soc_inst|m0_1|u_logic|Art2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|An63z4 , soc_inst|m0_1|u_logic|An63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kiq2z4 , soc_inst|m0_1|u_logic|Kiq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fexwx4~1 , soc_inst|m0_1|u_logic|Fexwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vgq2z4~feeder , soc_inst|m0_1|u_logic|Vgq2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vgq2z4 , soc_inst|m0_1|u_logic|Vgq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gfq2z4 , soc_inst|m0_1|u_logic|Gfq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yx83z4 , soc_inst|m0_1|u_logic|Yx83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J0v2z4 , soc_inst|m0_1|u_logic|J0v2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fexwx4~0 , soc_inst|m0_1|u_logic|Fexwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fexwx4 , soc_inst|m0_1|u_logic|Fexwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zudwx4~0 , soc_inst|m0_1|u_logic|Zudwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nvdwx4~0 , soc_inst|m0_1|u_logic|Nvdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nvdwx4~1 , soc_inst|m0_1|u_logic|Nvdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E5awx4~0 , soc_inst|m0_1|u_logic|E5awx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V883z4~feeder , soc_inst|m0_1|u_logic|V883z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V883z4~DUPLICATE , soc_inst|m0_1|u_logic|V883z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Md93z4 , soc_inst|m0_1|u_logic|Md93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~6 , soc_inst|m0_1|u_logic|Wa0wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C5n2z4~feeder , soc_inst|m0_1|u_logic|C5n2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C5n2z4 , soc_inst|m0_1|u_logic|C5n2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vcv2z4 , soc_inst|m0_1|u_logic|Vcv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M3u2z4~DUPLICATE , soc_inst|m0_1|u_logic|M3u2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~7 , soc_inst|m0_1|u_logic|Wa0wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~8 , soc_inst|m0_1|u_logic|Wa0wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L733z4~DUPLICATE , soc_inst|m0_1|u_logic|L733z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dq53z4 , soc_inst|m0_1|u_logic|Dq53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~3 , soc_inst|m0_1|u_logic|Wa0wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R6n2z4 , soc_inst|m0_1|u_logic|R6n2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T83xx4~0 , soc_inst|m0_1|u_logic|T83xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N3n2z4 , soc_inst|m0_1|u_logic|N3n2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cy13z4 , soc_inst|m0_1|u_logic|Cy13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~0 , soc_inst|m0_1|u_logic|Wa0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pw03z4 , soc_inst|m0_1|u_logic|Pw03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vzz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Vzz2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~4 , soc_inst|m0_1|u_logic|Wa0wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y1n2z4 , soc_inst|m0_1|u_logic|Y1n2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qapwx4~0 , soc_inst|m0_1|u_logic|Qapwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mydwx4~1 , soc_inst|m0_1|u_logic|Mydwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D7iwx4~0 , soc_inst|m0_1|u_logic|D7iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U5q2z4 , soc_inst|m0_1|u_logic|U5q2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D603z4 , soc_inst|m0_1|u_logic|D603z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X213z4~DUPLICATE , soc_inst|m0_1|u_logic|X213z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ww92z4~2 , soc_inst|m0_1|u_logic|Ww92z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xg33z4 , soc_inst|m0_1|u_logic|Xg33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O723z4~DUPLICATE , soc_inst|m0_1|u_logic|O723z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ww92z4~1 , soc_inst|m0_1|u_logic|Ww92z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F4q2z4 , soc_inst|m0_1|u_logic|F4q2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ty92z4~0 , soc_inst|m0_1|u_logic|Ty92z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pz53z4 , soc_inst|m0_1|u_logic|Pz53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gq43z4 , soc_inst|m0_1|u_logic|Gq43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ww92z4~0 , soc_inst|m0_1|u_logic|Ww92z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ww92z4~3 , soc_inst|m0_1|u_logic|Ww92z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~109 , soc_inst|m0_1|u_logic|Add2~109, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nehvx4~0 , soc_inst|m0_1|u_logic|Nehvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O2g3z4~DUPLICATE , soc_inst|m0_1|u_logic|O2g3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E163z4 , soc_inst|m0_1|u_logic|E163z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cqovx4 , soc_inst|m0_1|u_logic|Cqovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[10] , soc_inst|ram_1|saved_word_address[10], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory.raddr_a[10]~10 , soc_inst|ram_1|memory.raddr_a[10]~10, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~105 , soc_inst|m0_1|u_logic|Add3~105, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z0g3z4 , soc_inst|m0_1|u_logic|Z0g3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hnr2z4 , soc_inst|m0_1|u_logic|Hnr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Na73z4~DUPLICATE , soc_inst|m0_1|u_logic|Na73z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~6 , soc_inst|m0_1|u_logic|Hc1wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D923z4~DUPLICATE , soc_inst|m0_1|u_logic|D923z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mi33z4 , soc_inst|m0_1|u_logic|Mi33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wj83z4~feeder , soc_inst|m0_1|u_logic|Wj83z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wj83z4 , soc_inst|m0_1|u_logic|Wj83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~7 , soc_inst|m0_1|u_logic|Hc1wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~8 , soc_inst|m0_1|u_logic|Hc1wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O2g3z4 , soc_inst|m0_1|u_logic|O2g3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X94xx4~0 , soc_inst|m0_1|u_logic|X94xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kzf3z4 , soc_inst|m0_1|u_logic|Kzf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wnv2z4 , soc_inst|m0_1|u_logic|Wnv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~3 , soc_inst|m0_1|u_logic|Hc1wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vxf3z4 , soc_inst|m0_1|u_logic|Vxf3z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Vr43z4~DUPLICATE , soc_inst|m0_1|u_logic|Vr43z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~2 , soc_inst|m0_1|u_logic|Hc1wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lqr2z4 , soc_inst|m0_1|u_logic|Lqr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Neu2z4~DUPLICATE , soc_inst|m0_1|u_logic|Neu2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~4 , soc_inst|m0_1|u_logic|Hc1wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E163z4 , soc_inst|m0_1|u_logic|E163z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cq93z4 , soc_inst|m0_1|u_logic|Cq93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~1 , soc_inst|m0_1|u_logic|Hc1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wor2z4 , soc_inst|m0_1|u_logic|Wor2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~0 , soc_inst|m0_1|u_logic|Hc1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~5 , soc_inst|m0_1|u_logic|Hc1wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4 , soc_inst|m0_1|u_logic|Hc1wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ciawx4~0 , soc_inst|m0_1|u_logic|Ciawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ciawx4~1 , soc_inst|m0_1|u_logic|Ciawx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B91wx4~1 , soc_inst|m0_1|u_logic|B91wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~13 , soc_inst|m0_1|u_logic|Add5~13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~17 , soc_inst|m0_1|u_logic|Add5~17, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B91wx4~2 , soc_inst|m0_1|u_logic|B91wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ya1wx4~1 , soc_inst|m0_1|u_logic|Ya1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ya1wx4~0 , soc_inst|m0_1|u_logic|Ya1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B91wx4~0 , soc_inst|m0_1|u_logic|B91wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vr43z4 , soc_inst|m0_1|u_logic|Vr43z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|I3a2z4~0 , soc_inst|m0_1|u_logic|I3a2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vxf3z4 , soc_inst|m0_1|u_logic|Vxf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE , soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|I3a2z4~2 , soc_inst|m0_1|u_logic|I3a2z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z0g3z4 , soc_inst|m0_1|u_logic|Z0g3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F5a2z4~0 , soc_inst|m0_1|u_logic|F5a2z4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|D923z4 , soc_inst|m0_1|u_logic|D923z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mi33z4~DUPLICATE , soc_inst|m0_1|u_logic|Mi33z4~DUPLICATE, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|I3a2z4~1 , soc_inst|m0_1|u_logic|I3a2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z0g3z4~DUPLICATE , soc_inst|m0_1|u_logic|Z0g3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F5a2z4~0 , soc_inst|m0_1|u_logic|F5a2z4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|I3a2z4~3 , soc_inst|m0_1|u_logic|I3a2z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wj83z4 , soc_inst|m0_1|u_logic|Wj83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Neu2z4 , soc_inst|m0_1|u_logic|Neu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zkuwx4~2 , soc_inst|m0_1|u_logic|Zkuwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hnr2z4~feeder , soc_inst|m0_1|u_logic|Hnr2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hnr2z4~DUPLICATE , soc_inst|m0_1|u_logic|Hnr2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cq93z4 , soc_inst|m0_1|u_logic|Cq93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zkuwx4~1 , soc_inst|m0_1|u_logic|Zkuwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Na73z4 , soc_inst|m0_1|u_logic|Na73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zkuwx4~0 , soc_inst|m0_1|u_logic|Zkuwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wor2z4~feeder , soc_inst|m0_1|u_logic|Wor2z4~feeder, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Wor2z4~DUPLICATE , soc_inst|m0_1|u_logic|Wor2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wnv2z4 , soc_inst|m0_1|u_logic|Wnv2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Zkuwx4~3 , soc_inst|m0_1|u_logic|Zkuwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Na73z4 , soc_inst|m0_1|u_logic|Na73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zkuwx4~0 , soc_inst|m0_1|u_logic|Zkuwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hnr2z4~DUPLICATE , soc_inst|m0_1|u_logic|Hnr2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zkuwx4~1 , soc_inst|m0_1|u_logic|Zkuwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Neu2z4 , soc_inst|m0_1|u_logic|Neu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wj83z4~DUPLICATE , soc_inst|m0_1|u_logic|Wj83z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zkuwx4~2 , soc_inst|m0_1|u_logic|Zkuwx4~2, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Zkuwx4 , soc_inst|m0_1|u_logic|Zkuwx4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Ra1wx4~0 , soc_inst|m0_1|u_logic|Ra1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D923z4~DUPLICATE , soc_inst|m0_1|u_logic|D923z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hnr2z4 , soc_inst|m0_1|u_logic|Hnr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~6 , soc_inst|m0_1|u_logic|Hc1wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wj83z4~DUPLICATE , soc_inst|m0_1|u_logic|Wj83z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mi33z4 , soc_inst|m0_1|u_logic|Mi33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~7 , soc_inst|m0_1|u_logic|Hc1wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~8 , soc_inst|m0_1|u_logic|Hc1wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ciawx4~0 , soc_inst|m0_1|u_logic|Ciawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ciawx4~1 , soc_inst|m0_1|u_logic|Ciawx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~17 , soc_inst|m0_1|u_logic|Add5~17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nehvx4~1 , soc_inst|m0_1|u_logic|Nehvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Glnwx4~2 , soc_inst|m0_1|u_logic|Glnwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nehvx4~2 , soc_inst|m0_1|u_logic|Nehvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tme3z4 , soc_inst|m0_1|u_logic|Tme3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bnnvx4 , soc_inst|m0_1|u_logic|Bnnvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~29 , soc_inst|m0_1|u_logic|Add3~29, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~25 , soc_inst|m0_1|u_logic|Add3~25, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~49 , soc_inst|m0_1|u_logic|Add3~49, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~61 , soc_inst|m0_1|u_logic|Add3~61, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~57 , soc_inst|m0_1|u_logic|Add3~57, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~53 , soc_inst|m0_1|u_logic|Add3~53, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~45 , soc_inst|m0_1|u_logic|Add3~45, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~41 , soc_inst|m0_1|u_logic|Add3~41, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~93 , soc_inst|m0_1|u_logic|Add3~93, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~89 , soc_inst|m0_1|u_logic|Add3~89, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~105 , soc_inst|m0_1|u_logic|Add3~105, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|haddr_o~5 , soc_inst|m0_1|u_logic|haddr_o~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A9jvx4~0 , soc_inst|m0_1|u_logic|A9jvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Slr2z4 , soc_inst|m0_1|u_logic|Slr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hi83z4~DUPLICATE , soc_inst|m0_1|u_logic|Hi83z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ycu2z4 , soc_inst|m0_1|u_logic|Ycu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hmqwx4~2 , soc_inst|m0_1|u_logic|Hmqwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hmv2z4 , soc_inst|m0_1|u_logic|Hmv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hmqwx4~3 , soc_inst|m0_1|u_logic|Hmqwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mzp2z4~feeder , soc_inst|m0_1|u_logic|Mzp2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mzp2z4~DUPLICATE , soc_inst|m0_1|u_logic|Mzp2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|No93z4 , soc_inst|m0_1|u_logic|No93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hmqwx4~1 , soc_inst|m0_1|u_logic|Hmqwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q2q2z4~feeder , soc_inst|m0_1|u_logic|Q2q2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q2q2z4 , soc_inst|m0_1|u_logic|Q2q2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y873z4 , soc_inst|m0_1|u_logic|Y873z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hmqwx4~0 , soc_inst|m0_1|u_logic|Hmqwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hmqwx4 , soc_inst|m0_1|u_logic|Hmqwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C61wx4~0 , soc_inst|m0_1|u_logic|C61wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE , soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mgawx4~0 , soc_inst|m0_1|u_logic|Mgawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O723z4 , soc_inst|m0_1|u_logic|O723z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S71wx4~6 , soc_inst|m0_1|u_logic|S71wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S71wx4~7 , soc_inst|m0_1|u_logic|S71wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S71wx4~8 , soc_inst|m0_1|u_logic|S71wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mgawx4~1 , soc_inst|m0_1|u_logic|Mgawx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O51wx4~0 , soc_inst|m0_1|u_logic|O51wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M41wx4~0 , soc_inst|m0_1|u_logic|M41wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J61wx4~1 , soc_inst|m0_1|u_logic|J61wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J61wx4~0 , soc_inst|m0_1|u_logic|J61wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~61 , soc_inst|m0_1|u_logic|Add5~61, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M41wx4~1 , soc_inst|m0_1|u_logic|M41wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M41wx4~2 , soc_inst|m0_1|u_logic|M41wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B1q2z4 , soc_inst|m0_1|u_logic|B1q2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hmv2z4~DUPLICATE , soc_inst|m0_1|u_logic|Hmv2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S71wx4~1 , soc_inst|m0_1|u_logic|S71wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X213z4 , soc_inst|m0_1|u_logic|X213z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S71wx4~2 , soc_inst|m0_1|u_logic|S71wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE , soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ycu2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ycu2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S71wx4~4 , soc_inst|m0_1|u_logic|S71wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R21xx4~0 , soc_inst|m0_1|u_logic|R21xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mzp2z4 , soc_inst|m0_1|u_logic|Mzp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S71wx4~3 , soc_inst|m0_1|u_logic|S71wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hi83z4 , soc_inst|m0_1|u_logic|Hi83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xg33z4~DUPLICATE , soc_inst|m0_1|u_logic|Xg33z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S71wx4~0 , soc_inst|m0_1|u_logic|S71wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S71wx4~5 , soc_inst|m0_1|u_logic|S71wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S71wx4 , soc_inst|m0_1|u_logic|S71wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bq5wx4~0 , soc_inst|m0_1|u_logic|Bq5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pcd3z4~0 , soc_inst|m0_1|u_logic|Pcd3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pcd3z4 , soc_inst|m0_1|u_logic|Pcd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Axm2z4~0 , soc_inst|m0_1|u_logic|Axm2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Axm2z4 , soc_inst|m0_1|u_logic|Axm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U5a3z4~feeder , soc_inst|m0_1|u_logic|U5a3z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U5a3z4 , soc_inst|m0_1|u_logic|U5a3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mis2z4~0 , soc_inst|m0_1|u_logic|Mis2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mis2z4 , soc_inst|m0_1|u_logic|Mis2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ykyvx4~0 , soc_inst|m0_1|u_logic|Ykyvx4~0, de1_soc_wrapper, 1
-instance = comp, \SW[9]~input , SW[9]~input, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[1][9] , soc_inst|switches_1|switch_store[1][9], de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S4qvx4 , soc_inst|m0_1|u_logic|S4qvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[5] , soc_inst|ram_1|saved_word_address[5], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory.raddr_a[5]~5 , soc_inst|ram_1|memory.raddr_a[5]~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[6] , soc_inst|ram_1|saved_word_address[6], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory.raddr_a[6]~6 , soc_inst|ram_1|memory.raddr_a[6]~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xxovx4 , soc_inst|m0_1|u_logic|Xxovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[7] , soc_inst|ram_1|saved_word_address[7], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory.raddr_a[7]~7 , soc_inst|ram_1|memory.raddr_a[7]~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[8] , soc_inst|ram_1|saved_word_address[8], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory.raddr_a[8]~8 , soc_inst|ram_1|memory.raddr_a[8]~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[9] , soc_inst|ram_1|saved_word_address[9], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory.raddr_a[9]~9 , soc_inst|ram_1|memory.raddr_a[9]~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cqovx4 , soc_inst|m0_1|u_logic|Cqovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[10] , soc_inst|ram_1|saved_word_address[10], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory.raddr_a[10]~10 , soc_inst|ram_1|memory.raddr_a[10]~10, de1_soc_wrapper, 1
instance = comp, \soc_inst|ram_1|saved_word_address[11] , soc_inst|ram_1|saved_word_address[11], de1_soc_wrapper, 1
instance = comp, \soc_inst|ram_1|memory.raddr_a[11]~11 , soc_inst|ram_1|memory.raddr_a[11]~11, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fzl2z4 , soc_inst|m0_1|u_logic|Fzl2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U09wx4~0 , soc_inst|m0_1|u_logic|U09wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qppvx4~4 , soc_inst|m0_1|u_logic|Qppvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qppvx4~3 , soc_inst|m0_1|u_logic|Qppvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qppvx4~0 , soc_inst|m0_1|u_logic|Qppvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qppvx4~1 , soc_inst|m0_1|u_logic|Qppvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qppvx4~2 , soc_inst|m0_1|u_logic|Qppvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cy33z4 , soc_inst|m0_1|u_logic|Cy33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wlz2z4 , soc_inst|m0_1|u_logic|Wlz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Htyvx4~1 , soc_inst|m0_1|u_logic|Htyvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qi03z4 , soc_inst|m0_1|u_logic|Qi03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Swy2z4 , soc_inst|m0_1|u_logic|Swy2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qnyvx4~0 , soc_inst|m0_1|u_logic|Qnyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G0w2z4 , soc_inst|m0_1|u_logic|G0w2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fcj2z4 , soc_inst|m0_1|u_logic|Fcj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vllvx4~0 , soc_inst|m0_1|u_logic|Vllvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vllvx4~1 , soc_inst|m0_1|u_logic|Vllvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U4z2z4 , soc_inst|m0_1|u_logic|U4z2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Htyvx4~0 , soc_inst|m0_1|u_logic|Htyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kf13z4 , soc_inst|m0_1|u_logic|Kf13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L753z4 , soc_inst|m0_1|u_logic|L753z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|To23z4 , soc_inst|m0_1|u_logic|To23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Htyvx4~2 , soc_inst|m0_1|u_logic|Htyvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ukt2z4 , soc_inst|m0_1|u_logic|Ukt2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ug63z4 , soc_inst|m0_1|u_logic|Ug63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dq73z4 , soc_inst|m0_1|u_logic|Dq73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ruj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ruj2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V7ywx4~1 , soc_inst|m0_1|u_logic|V7ywx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fwj2z4 , soc_inst|m0_1|u_logic|Fwj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Duu2z4 , soc_inst|m0_1|u_logic|Duu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Txj2z4 , soc_inst|m0_1|u_logic|Txj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V7ywx4~0 , soc_inst|m0_1|u_logic|V7ywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V7ywx4 , soc_inst|m0_1|u_logic|V7ywx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Htyvx4~3 , soc_inst|m0_1|u_logic|Htyvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wo03z4 , soc_inst|m0_1|u_logic|Wo03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xhl2z4 , soc_inst|m0_1|u_logic|Xhl2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Csz2z4 , soc_inst|m0_1|u_logic|Csz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~4 , soc_inst|m0_1|u_logic|Kqzvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vg53z4~feeder , soc_inst|m0_1|u_logic|Vg53z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vg53z4~DUPLICATE , soc_inst|m0_1|u_logic|Vg53z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dy23z4 , soc_inst|m0_1|u_logic|Dy23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~3 , soc_inst|m0_1|u_logic|Kqzvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uo13z4 , soc_inst|m0_1|u_logic|Uo13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tel2z4 , soc_inst|m0_1|u_logic|Tel2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~0 , soc_inst|m0_1|u_logic|Kqzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pbl2z4 , soc_inst|m0_1|u_logic|Pbl2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M743z4~feeder , soc_inst|m0_1|u_logic|M743z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M743z4 , soc_inst|m0_1|u_logic|M743z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~2 , soc_inst|m0_1|u_logic|Kqzvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nz73z4 , soc_inst|m0_1|u_logic|Nz73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE , soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eq63z4 , soc_inst|m0_1|u_logic|Eq63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C193z4 , soc_inst|m0_1|u_logic|C193z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~5 , soc_inst|m0_1|u_logic|Kqzvx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N3v2z4 , soc_inst|m0_1|u_logic|N3v2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eut2z4 , soc_inst|m0_1|u_logic|Eut2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~6 , soc_inst|m0_1|u_logic|Kqzvx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~7 , soc_inst|m0_1|u_logic|Kqzvx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Edl2z4~feeder , soc_inst|m0_1|u_logic|Edl2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Edl2z4 , soc_inst|m0_1|u_logic|Edl2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~1 , soc_inst|m0_1|u_logic|Kqzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4 , soc_inst|m0_1|u_logic|Kqzvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~17 , soc_inst|m0_1|u_logic|hwdata_o~17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[25]~9 , soc_inst|ram_1|data_to_memory[25]~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[1] , soc_inst|m0_1|u_logic|hwdata_o[1], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[1]~10 , soc_inst|ram_1|data_to_memory[1]~10, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[25]~22 , soc_inst|interconnect_1|HRDATA[25]~22, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T2owx4~1 , soc_inst|m0_1|u_logic|T2owx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zetwx4 , soc_inst|m0_1|u_logic|Zetwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xuxwx4 , soc_inst|m0_1|u_logic|Xuxwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|byte3~0 , soc_inst|ram_1|byte3~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|byte_select[3] , soc_inst|ram_1|byte_select[3], de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O3awx4~0 , soc_inst|m0_1|u_logic|O3awx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kih2z4~0 , soc_inst|m0_1|u_logic|Kih2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ehcwx4~0 , soc_inst|m0_1|u_logic|Ehcwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rmawx4~0 , soc_inst|m0_1|u_logic|Rmawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mdzvx4~0 , soc_inst|m0_1|u_logic|Mdzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ducvx4 , soc_inst|m0_1|u_logic|Ducvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Whh2z4~0 , soc_inst|m0_1|u_logic|Whh2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wqm2z4 , soc_inst|m0_1|u_logic|Wqm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R6v2z4 , soc_inst|m0_1|u_logic|R6v2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Svqwx4~3 , soc_inst|m0_1|u_logic|Svqwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ixt2z4 , soc_inst|m0_1|u_logic|Ixt2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R283z4 , soc_inst|m0_1|u_logic|R283z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Svqwx4~2 , soc_inst|m0_1|u_logic|Svqwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ksm2z4 , soc_inst|m0_1|u_logic|Ksm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|It63z4 , soc_inst|m0_1|u_logic|It63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Svqwx4~0 , soc_inst|m0_1|u_logic|Svqwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G493z4 , soc_inst|m0_1|u_logic|G493z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ipm2z4 , soc_inst|m0_1|u_logic|Ipm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Svqwx4~1 , soc_inst|m0_1|u_logic|Svqwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Svqwx4 , soc_inst|m0_1|u_logic|Svqwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wyt2z4 , soc_inst|m0_1|u_logic|Wyt2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F483z4 , soc_inst|m0_1|u_logic|F483z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qxuwx4~2 , soc_inst|m0_1|u_logic|Qxuwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gip2z4~feeder , soc_inst|m0_1|u_logic|Gip2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gip2z4 , soc_inst|m0_1|u_logic|Gip2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F8v2z4 , soc_inst|m0_1|u_logic|F8v2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qxuwx4~3 , soc_inst|m0_1|u_logic|Qxuwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W893z4 , soc_inst|m0_1|u_logic|W893z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sgp2z4 , soc_inst|m0_1|u_logic|Sgp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qxuwx4~1 , soc_inst|m0_1|u_logic|Qxuwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wu63z4 , soc_inst|m0_1|u_logic|Wu63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ujp2z4 , soc_inst|m0_1|u_logic|Ujp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qxuwx4~0 , soc_inst|m0_1|u_logic|Qxuwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qxuwx4 , soc_inst|m0_1|u_logic|Qxuwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rw7wx4~0 , soc_inst|m0_1|u_logic|Rw7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rw7wx4~1 , soc_inst|m0_1|u_logic|Rw7wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Otr2z4~DUPLICATE , soc_inst|m0_1|u_logic|Otr2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rvv2z4 , soc_inst|m0_1|u_logic|Rvv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lr9wx4~3 , soc_inst|m0_1|u_logic|Lr9wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Asr2z4 , soc_inst|m0_1|u_logic|Asr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qyc3z4 , soc_inst|m0_1|u_logic|Qyc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lr9wx4~1 , soc_inst|m0_1|u_logic|Lr9wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Imu2z4 , soc_inst|m0_1|u_logic|Imu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rr83z4~DUPLICATE , soc_inst|m0_1|u_logic|Rr83z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lr9wx4~2 , soc_inst|m0_1|u_logic|Lr9wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ii73z4 , soc_inst|m0_1|u_logic|Ii73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cvr2z4 , soc_inst|m0_1|u_logic|Cvr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lr9wx4~0 , soc_inst|m0_1|u_logic|Lr9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lr9wx4 , soc_inst|m0_1|u_logic|Lr9wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fkdwx4~0 , soc_inst|m0_1|u_logic|Fkdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rhu2z4 , soc_inst|m0_1|u_logic|Rhu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|An83z4~DUPLICATE , soc_inst|m0_1|u_logic|An83z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pjqwx4~2 , soc_inst|m0_1|u_logic|Pjqwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pjqwx4~1 , soc_inst|m0_1|u_logic|Pjqwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z8s2z4~DUPLICATE , soc_inst|m0_1|u_logic|Z8s2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pjqwx4~3 , soc_inst|m0_1|u_logic|Pjqwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oas2z4 , soc_inst|m0_1|u_logic|Oas2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pjqwx4~0 , soc_inst|m0_1|u_logic|Pjqwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pjqwx4 , soc_inst|m0_1|u_logic|Pjqwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nodwx4~0 , soc_inst|m0_1|u_logic|Nodwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nodwx4~1 , soc_inst|m0_1|u_logic|Nodwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I7owx4 , soc_inst|m0_1|u_logic|I7owx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I2twx4~0 , soc_inst|m0_1|u_logic|I2twx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qfc3z4~0 , soc_inst|m0_1|u_logic|Qfc3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qfc3z4 , soc_inst|m0_1|u_logic|Qfc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pguvx4~0 , soc_inst|m0_1|u_logic|Pguvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y1ivx4~0 , soc_inst|m0_1|u_logic|Y1ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hub3z4 , soc_inst|m0_1|u_logic|Hub3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ihlwx4~0 , soc_inst|m0_1|u_logic|Ihlwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[0][3] , soc_inst|switches_1|switch_store[0][3], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[3]~20 , soc_inst|ram_1|data_to_memory[3]~20, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ny3wx4~0 , soc_inst|m0_1|u_logic|Ny3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Knvvx4~0 , soc_inst|m0_1|u_logic|Knvvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[27]~19 , soc_inst|ram_1|data_to_memory[27]~19, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[3]~26 , soc_inst|interconnect_1|HRDATA[3]~26, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ihlwx4~1 , soc_inst|m0_1|u_logic|Ihlwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ihlwx4~2 , soc_inst|m0_1|u_logic|Ihlwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ihlwx4~3 , soc_inst|m0_1|u_logic|Ihlwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qfzvx4~0 , soc_inst|m0_1|u_logic|Qfzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qfzvx4~1 , soc_inst|m0_1|u_logic|Qfzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hrcvx4 , soc_inst|m0_1|u_logic|Hrcvx4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Qdtwx4 , soc_inst|m0_1|u_logic|Qdtwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Unm2z4 , soc_inst|m0_1|u_logic|Unm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gmm2z4 , soc_inst|m0_1|u_logic|Gmm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cawwx4~1 , soc_inst|m0_1|u_logic|Cawwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rvu2z4 , soc_inst|m0_1|u_logic|Rvu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ejm2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ejm2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cawwx4~3 , soc_inst|m0_1|u_logic|Cawwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rr73z4~feeder , soc_inst|m0_1|u_logic|Rr73z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rr73z4 , soc_inst|m0_1|u_logic|Rr73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Imt2z4 , soc_inst|m0_1|u_logic|Imt2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cawwx4~2 , soc_inst|m0_1|u_logic|Cawwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Skm2z4~DUPLICATE , soc_inst|m0_1|u_logic|Skm2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ii63z4 , soc_inst|m0_1|u_logic|Ii63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cawwx4~0 , soc_inst|m0_1|u_logic|Cawwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cawwx4 , soc_inst|m0_1|u_logic|Cawwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gftwx4~0 , soc_inst|m0_1|u_logic|Gftwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gftwx4~1 , soc_inst|m0_1|u_logic|Gftwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M5ewx4~0 , soc_inst|m0_1|u_logic|M5ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M7qwx4~0 , soc_inst|m0_1|u_logic|M7qwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pgfwx4~0 , soc_inst|m0_1|u_logic|Pgfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pgfwx4~1 , soc_inst|m0_1|u_logic|Pgfwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Khfwx4~1 , soc_inst|m0_1|u_logic|Khfwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE , soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mxa2z4~0 , soc_inst|m0_1|u_logic|Mxa2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D9ovx4 , soc_inst|m0_1|u_logic|D9ovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[9]~5 , soc_inst|m0_1|u_logic|hwdata_o[9]~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I0ivx4~0 , soc_inst|m0_1|u_logic|I0ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y9l2z4 , soc_inst|m0_1|u_logic|Y9l2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vve3z4~0 , soc_inst|m0_1|u_logic|Vve3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vve3z4 , soc_inst|m0_1|u_logic|Vve3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Khfwx4~0 , soc_inst|m0_1|u_logic|Khfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Khfwx4~2 , soc_inst|m0_1|u_logic|Khfwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~73 , soc_inst|m0_1|u_logic|Add0~73, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~29 , soc_inst|m0_1|u_logic|Add0~29, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kxe3z4 , soc_inst|m0_1|u_logic|Kxe3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tqmvx4~0 , soc_inst|m0_1|u_logic|Tqmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aze3z4 , soc_inst|m0_1|u_logic|Aze3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Khfwx4~3 , soc_inst|m0_1|u_logic|Khfwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zndwx4~0 , soc_inst|m0_1|u_logic|Zndwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zndwx4~1 , soc_inst|m0_1|u_logic|Zndwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yxdwx4~0 , soc_inst|m0_1|u_logic|Yxdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vzdwx4~0 , soc_inst|m0_1|u_logic|Vzdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yxdwx4~1 , soc_inst|m0_1|u_logic|Yxdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Khfwx4~4 , soc_inst|m0_1|u_logic|Khfwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L6nwx4 , soc_inst|m0_1|u_logic|L6nwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wjyvx4~0 , soc_inst|m0_1|u_logic|Wjyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C2rvx4~0 , soc_inst|m0_1|u_logic|C2rvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ajn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ajn2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Po83z4~DUPLICATE , soc_inst|m0_1|u_logic|Po83z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gju2z4 , soc_inst|m0_1|u_logic|Gju2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gf73z4 , soc_inst|m0_1|u_logic|Gf73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ylbwx4~1 , soc_inst|m0_1|u_logic|Ylbwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yfn2z4 , soc_inst|m0_1|u_logic|Yfn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhn2z4~feeder , soc_inst|m0_1|u_logic|Mhn2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhn2z4 , soc_inst|m0_1|u_logic|Mhn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Psv2z4~feeder , soc_inst|m0_1|u_logic|Psv2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Psv2z4 , soc_inst|m0_1|u_logic|Psv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vu93z4~DUPLICATE , soc_inst|m0_1|u_logic|Vu93z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ylbwx4~0 , soc_inst|m0_1|u_logic|Ylbwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ylbwx4 , soc_inst|m0_1|u_logic|Ylbwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C3z2z4 , soc_inst|m0_1|u_logic|C3z2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T7cwx4~0 , soc_inst|m0_1|u_logic|T7cwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Phlwx4~0 , soc_inst|m0_1|u_logic|Phlwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T31xx4~0 , soc_inst|m0_1|u_logic|T31xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C5v2z4 , soc_inst|m0_1|u_logic|C5v2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tvt2z4 , soc_inst|m0_1|u_logic|Tvt2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R91xx4~0 , soc_inst|m0_1|u_logic|R91xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~0 , soc_inst|m0_1|u_logic|Eacwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C183z4 , soc_inst|m0_1|u_logic|C183z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Joi3z4 , soc_inst|m0_1|u_logic|Joi3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Umi3z4 , soc_inst|m0_1|u_logic|Umi3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tr63z4 , soc_inst|m0_1|u_logic|Tr63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~7 , soc_inst|m0_1|u_logic|Eacwx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~8 , soc_inst|m0_1|u_logic|Eacwx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vmj2z4~feeder , soc_inst|m0_1|u_logic|Vmj2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vmj2z4 , soc_inst|m0_1|u_logic|Vmj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~4 , soc_inst|m0_1|u_logic|Eacwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jq13z4 , soc_inst|m0_1|u_logic|Jq13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F9j2z4 , soc_inst|m0_1|u_logic|F9j2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~1 , soc_inst|m0_1|u_logic|Eacwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B943z4 , soc_inst|m0_1|u_logic|B943z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zpj2z4 , soc_inst|m0_1|u_logic|Zpj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~2 , soc_inst|m0_1|u_logic|Eacwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sz23z4 , soc_inst|m0_1|u_logic|Sz23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ki53z4 , soc_inst|m0_1|u_logic|Ki53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~3 , soc_inst|m0_1|u_logic|Eacwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qji3z4~DUPLICATE , soc_inst|m0_1|u_logic|Qji3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fli3z4 , soc_inst|m0_1|u_logic|Fli3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~5 , soc_inst|m0_1|u_logic|Eacwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~6 , soc_inst|m0_1|u_logic|Eacwx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~9 , soc_inst|m0_1|u_logic|Eacwx4~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rih2z4~0 , soc_inst|m0_1|u_logic|Rih2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~61 , soc_inst|m0_1|u_logic|Add3~61, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~57 , soc_inst|m0_1|u_logic|Add3~57, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~101 , soc_inst|m0_1|u_logic|Add3~101, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~113 , soc_inst|m0_1|u_logic|Add3~113, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y92wx4 , soc_inst|m0_1|u_logic|Y92wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B6j2z4 , soc_inst|m0_1|u_logic|B6j2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K8ivx4~0 , soc_inst|m0_1|u_logic|K8ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B6j2z4~DUPLICATE , soc_inst|m0_1|u_logic|B6j2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE , soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qji3z4 , soc_inst|m0_1|u_logic|Qji3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P582z4~2 , soc_inst|m0_1|u_logic|P582z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P582z4~1 , soc_inst|m0_1|u_logic|P582z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P582z4~0 , soc_inst|m0_1|u_logic|P582z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M782z4~0 , soc_inst|m0_1|u_logic|M782z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P582z4~3 , soc_inst|m0_1|u_logic|P582z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gtnvx4~0 , soc_inst|m0_1|u_logic|Gtnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q9cwx4~0 , soc_inst|m0_1|u_logic|Q9cwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ancvx4 , soc_inst|m0_1|u_logic|Ancvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~125 , soc_inst|m0_1|u_logic|Add5~125, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~121 , soc_inst|m0_1|u_logic|Add5~121, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yqzvx4~0 , soc_inst|m0_1|u_logic|Yqzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R3uvx4~0 , soc_inst|m0_1|u_logic|R3uvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rbmvx4~0 , soc_inst|m0_1|u_logic|Rbmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V3o2z4 , soc_inst|m0_1|u_logic|V3o2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Owgvx4~0 , soc_inst|m0_1|u_logic|Owgvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ywi2z4 , soc_inst|m0_1|u_logic|Ywi2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6mwx4~0 , soc_inst|m0_1|u_logic|Q6mwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R6n2z4 , soc_inst|m0_1|u_logic|R6n2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T83xx4~0 , soc_inst|m0_1|u_logic|T83xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dq53z4 , soc_inst|m0_1|u_logic|Dq53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L733z4 , soc_inst|m0_1|u_logic|L733z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~3 , soc_inst|m0_1|u_logic|Wa0wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ug43z4 , soc_inst|m0_1|u_logic|Ug43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J0n2z4~feeder , soc_inst|m0_1|u_logic|J0n2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J0n2z4 , soc_inst|m0_1|u_logic|J0n2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~2 , soc_inst|m0_1|u_logic|Wa0wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pw03z4 , soc_inst|m0_1|u_logic|Pw03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vzz2z4 , soc_inst|m0_1|u_logic|Vzz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~4 , soc_inst|m0_1|u_logic|Wa0wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y1n2z4 , soc_inst|m0_1|u_logic|Y1n2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~1 , soc_inst|m0_1|u_logic|Wa0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cy13z4 , soc_inst|m0_1|u_logic|Cy13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N3n2z4 , soc_inst|m0_1|u_logic|N3n2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~0 , soc_inst|m0_1|u_logic|Wa0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~5 , soc_inst|m0_1|u_logic|Wa0wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4 , soc_inst|m0_1|u_logic|Wa0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[22]~3 , soc_inst|m0_1|u_logic|hwdata_o[22]~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K3uvx4~0 , soc_inst|m0_1|u_logic|K3uvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W2uvx4 , soc_inst|m0_1|u_logic|W2uvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X9n2z4 , soc_inst|m0_1|u_logic|X9n2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yhnvx4~0 , soc_inst|m0_1|u_logic|Yhnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~113 , soc_inst|m0_1|u_logic|Add2~113, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~77 , soc_inst|m0_1|u_logic|Add2~77, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~29 , soc_inst|m0_1|u_logic|Add2~29, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~21 , soc_inst|m0_1|u_logic|Add2~21, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~9 , soc_inst|m0_1|u_logic|Add2~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~13 , soc_inst|m0_1|u_logic|Add2~13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mhhvx4~0 , soc_inst|m0_1|u_logic|Mhhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mhhvx4~1 , soc_inst|m0_1|u_logic|Mhhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mhhvx4~2 , soc_inst|m0_1|u_logic|Mhhvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vvx2z4 , soc_inst|m0_1|u_logic|Vvx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yhnvx4~1 , soc_inst|m0_1|u_logic|Yhnvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cqo2z4 , soc_inst|m0_1|u_logic|Cqo2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dq73z4 , soc_inst|m0_1|u_logic|Dq73z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Duuwx4~2 , soc_inst|m0_1|u_logic|Duuwx4~2, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Ruj2z4 , soc_inst|m0_1|u_logic|Ruj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ug63z4~DUPLICATE , soc_inst|m0_1|u_logic|Ug63z4~DUPLICATE, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Duuwx4~0 , soc_inst|m0_1|u_logic|Duuwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fwj2z4 , soc_inst|m0_1|u_logic|Fwj2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Duuwx4~1 , soc_inst|m0_1|u_logic|Duuwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Duu2z4~DUPLICATE , soc_inst|m0_1|u_logic|Duu2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dtj2z4 , soc_inst|m0_1|u_logic|Dtj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Duuwx4~3 , soc_inst|m0_1|u_logic|Duuwx4~3, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Duuwx4 , soc_inst|m0_1|u_logic|Duuwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kw7wx4~0 , soc_inst|m0_1|u_logic|Kw7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jmdwx4~1 , soc_inst|m0_1|u_logic|Jmdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE , soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~94 , soc_inst|m0_1|u_logic|Add0~94, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~25 , soc_inst|m0_1|u_logic|Add0~25, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qfa3z4~0 , soc_inst|m0_1|u_logic|Qfa3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qfa3z4 , soc_inst|m0_1|u_logic|Qfa3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xsmvx4~0 , soc_inst|m0_1|u_logic|Xsmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C4b3z4 , soc_inst|m0_1|u_logic|C4b3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T5tvx4 , soc_inst|m0_1|u_logic|T5tvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S5b3z4 , soc_inst|m0_1|u_logic|S5b3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mcc3z4~0 , soc_inst|m0_1|u_logic|Mcc3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mcc3z4 , soc_inst|m0_1|u_logic|Mcc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ruvvx4~0 , soc_inst|m0_1|u_logic|Ruvvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M2ivx4~0 , soc_inst|m0_1|u_logic|M2ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vac3z4 , soc_inst|m0_1|u_logic|Vac3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6twx4~0 , soc_inst|m0_1|u_logic|Q6twx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R0t2z4~feeder , soc_inst|m0_1|u_logic|R0t2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B2uvx4~1 , soc_inst|m0_1|u_logic|B2uvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U1uvx4 , soc_inst|m0_1|u_logic|U1uvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R0t2z4 , soc_inst|m0_1|u_logic|R0t2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6twx4~1 , soc_inst|m0_1|u_logic|Q6twx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rhfwx4~0 , soc_inst|m0_1|u_logic|Rhfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rhfwx4~1 , soc_inst|m0_1|u_logic|Rhfwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|DataValid~0 , soc_inst|switches_1|DataValid~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|DataValid[1] , soc_inst|switches_1|DataValid[1], de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwrite_o~0_wirecell , soc_inst|m0_1|u_logic|hwrite_o~0_wirecell, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|always0~0 , soc_inst|pix1|always0~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|read_enable , soc_inst|pix1|read_enable, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|mux_sel[2]~DUPLICATE , soc_inst|interconnect_1|mux_sel[2]~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[29]~0 , soc_inst|interconnect_1|HRDATA[29]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[1]~23 , soc_inst|interconnect_1|HRDATA[1]~23, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[1]~25 , soc_inst|interconnect_1|HRDATA[1]~25, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[1]~24 , soc_inst|interconnect_1|HRDATA[1]~24, de1_soc_wrapper, 1
-instance = comp, \SW[1]~input , SW[1]~input, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[0][1] , soc_inst|switches_1|switch_store[0][1], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[1]~26 , soc_inst|interconnect_1|HRDATA[1]~26, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[1]~27 , soc_inst|interconnect_1|HRDATA[1]~27, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[2] , soc_inst|pix1|memory_rtl_0_bypass[2], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address[0] , soc_inst|pix1|word_address[0], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[1] , soc_inst|pix1|memory_rtl_0_bypass[1], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|write_enable , soc_inst|pix1|write_enable, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[0] , soc_inst|pix1|memory_rtl_0_bypass[0], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address[1] , soc_inst|pix1|word_address[1], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[3] , soc_inst|pix1|memory_rtl_0_bypass[3], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[4]~feeder , soc_inst|pix1|memory_rtl_0_bypass[4]~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[4] , soc_inst|pix1|memory_rtl_0_bypass[4], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory~14 , soc_inst|pix1|memory~14, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address[4] , soc_inst|pix1|word_address[4], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[9]~feeder , soc_inst|pix1|memory_rtl_0_bypass[9]~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[9] , soc_inst|pix1|memory_rtl_0_bypass[9], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[6]~feeder , soc_inst|pix1|memory_rtl_0_bypass[6]~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[6] , soc_inst|pix1|memory_rtl_0_bypass[6], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address[3] , soc_inst|pix1|word_address[3], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[7]~feeder , soc_inst|pix1|memory_rtl_0_bypass[7]~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[7] , soc_inst|pix1|memory_rtl_0_bypass[7], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[10]~feeder , soc_inst|pix1|memory_rtl_0_bypass[10]~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[10] , soc_inst|pix1|memory_rtl_0_bypass[10], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[8] , soc_inst|pix1|memory_rtl_0_bypass[8], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address[2] , soc_inst|pix1|word_address[2], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[5]~feeder , soc_inst|pix1|memory_rtl_0_bypass[5]~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[5] , soc_inst|pix1|memory_rtl_0_bypass[5], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory~15 , soc_inst|pix1|memory~15, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[14] , soc_inst|pix1|memory_rtl_0_bypass[14], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[16] , soc_inst|pix1|memory_rtl_0_bypass[16], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address[7] , soc_inst|pix1|word_address[7], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[15]~feeder , soc_inst|pix1|memory_rtl_0_bypass[15]~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[15] , soc_inst|pix1|memory_rtl_0_bypass[15], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address[6] , soc_inst|pix1|word_address[6], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[13] , soc_inst|pix1|memory_rtl_0_bypass[13], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address[5] , soc_inst|pix1|word_address[5], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[11] , soc_inst|pix1|memory_rtl_0_bypass[11], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[12]~feeder , soc_inst|pix1|memory_rtl_0_bypass[12]~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[12] , soc_inst|pix1|memory_rtl_0_bypass[12], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory~13 , soc_inst|pix1|memory~13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xmdwx4~0 , soc_inst|m0_1|u_logic|Xmdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rvu2z4 , soc_inst|m0_1|u_logic|Rvu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cawwx4~3 , soc_inst|m0_1|u_logic|Cawwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Unm2z4 , soc_inst|m0_1|u_logic|Unm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gmm2z4~feeder , soc_inst|m0_1|u_logic|Gmm2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gmm2z4~DUPLICATE , soc_inst|m0_1|u_logic|Gmm2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cawwx4~1 , soc_inst|m0_1|u_logic|Cawwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ii63z4 , soc_inst|m0_1|u_logic|Ii63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Skm2z4 , soc_inst|m0_1|u_logic|Skm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cawwx4~0 , soc_inst|m0_1|u_logic|Cawwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Imt2z4~DUPLICATE , soc_inst|m0_1|u_logic|Imt2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rr73z4 , soc_inst|m0_1|u_logic|Rr73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cawwx4~2 , soc_inst|m0_1|u_logic|Cawwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cawwx4 , soc_inst|m0_1|u_logic|Cawwx4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Jiowx4~0 , soc_inst|m0_1|u_logic|Jiowx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jiowx4~1 , soc_inst|m0_1|u_logic|Jiowx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gto2z4~DUPLICATE , soc_inst|m0_1|u_logic|Gto2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fxu2z4 , soc_inst|m0_1|u_logic|Fxu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Saqwx4~3 , soc_inst|m0_1|u_logic|Saqwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uu83z4~DUPLICATE , soc_inst|m0_1|u_logic|Uu83z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rro2z4~feeder , soc_inst|m0_1|u_logic|Rro2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rro2z4 , soc_inst|m0_1|u_logic|Rro2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Saqwx4~1 , soc_inst|m0_1|u_logic|Saqwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wnt2z4 , soc_inst|m0_1|u_logic|Wnt2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Saqwx4~2 , soc_inst|m0_1|u_logic|Saqwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wj63z4~feeder , soc_inst|m0_1|u_logic|Wj63z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wj63z4 , soc_inst|m0_1|u_logic|Wj63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vuo2z4 , soc_inst|m0_1|u_logic|Vuo2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Saqwx4~0 , soc_inst|m0_1|u_logic|Saqwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Saqwx4 , soc_inst|m0_1|u_logic|Saqwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kepwx4~0 , soc_inst|m0_1|u_logic|Kepwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kepwx4~1 , soc_inst|m0_1|u_logic|Kepwx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Qmdwx4~0 , soc_inst|m0_1|u_logic|Qmdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tkdwx4~0 , soc_inst|m0_1|u_logic|Tkdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qmdwx4~1 , soc_inst|m0_1|u_logic|Qmdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B28wx4~0 , soc_inst|m0_1|u_logic|B28wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K9ovx4~0 , soc_inst|m0_1|u_logic|K9ovx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T2ivx4~0 , soc_inst|m0_1|u_logic|T2ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gxk2z4 , soc_inst|m0_1|u_logic|Gxk2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ztc3z4~0 , soc_inst|m0_1|u_logic|Ztc3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ztc3z4 , soc_inst|m0_1|u_logic|Ztc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ahowx4~0 , soc_inst|m0_1|u_logic|Ahowx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tgowx4~0 , soc_inst|m0_1|u_logic|Tgowx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tlyvx4~0 , soc_inst|m0_1|u_logic|Tlyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address[17] , soc_inst|pix1|word_address[17], de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~73 , soc_inst|m0_1|u_logic|Add3~73, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~69 , soc_inst|m0_1|u_logic|Add3~69, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~101 , soc_inst|m0_1|u_logic|Add3~101, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~97 , soc_inst|m0_1|u_logic|Add3~97, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~81 , soc_inst|m0_1|u_logic|Add3~81, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tmjvx4~0 , soc_inst|m0_1|u_logic|Tmjvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H4p2z4 , soc_inst|m0_1|u_logic|H4p2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Godwx4~0 , soc_inst|m0_1|u_logic|Godwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tkdwx4~1 , soc_inst|m0_1|u_logic|Tkdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xmdwx4~0 , soc_inst|m0_1|u_logic|Xmdwx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Xmdwx4~1 , soc_inst|m0_1|u_logic|Xmdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X563z4 , soc_inst|m0_1|u_logic|X563z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Okn2z4 , soc_inst|m0_1|u_logic|Okn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa03z4 , soc_inst|m0_1|u_logic|Wa03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fn33z4 , soc_inst|m0_1|u_logic|Fn33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q713z4 , soc_inst|m0_1|u_logic|Q713z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wd23z4~DUPLICATE , soc_inst|m0_1|u_logic|Wd23z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE , soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K4mvx4~0 , soc_inst|m0_1|u_logic|K4mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K4mvx4~1 , soc_inst|m0_1|u_logic|K4mvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jw93z4 , soc_inst|m0_1|u_logic|Jw93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sh5wx4~2 , soc_inst|m0_1|u_logic|Sh5wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cmn2z4 , soc_inst|m0_1|u_logic|Cmn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ow43z4~DUPLICATE , soc_inst|m0_1|u_logic|Ow43z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sh5wx4~1 , soc_inst|m0_1|u_logic|Sh5wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sh5wx4~3 , soc_inst|m0_1|u_logic|Sh5wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sh5wx4~0 , soc_inst|m0_1|u_logic|Sh5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[2] , soc_inst|m0_1|u_logic|hwdata_o[2], de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gha3z4~0 , soc_inst|m0_1|u_logic|Gha3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gha3z4 , soc_inst|m0_1|u_logic|Gha3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M2b3z4~DUPLICATE , soc_inst|m0_1|u_logic|M2b3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~13 , soc_inst|m0_1|u_logic|Add0~13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qsmvx4~0 , soc_inst|m0_1|u_logic|Qsmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M2b3z4 , soc_inst|m0_1|u_logic|M2b3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ckuvx4~0 , soc_inst|m0_1|u_logic|Ckuvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F2ivx4~0 , soc_inst|m0_1|u_logic|F2ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pxb3z4 , soc_inst|m0_1|u_logic|Pxb3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mbt2z4 , soc_inst|m0_1|u_logic|Mbt2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yrqwx4~0 , soc_inst|m0_1|u_logic|Yrqwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rrqwx4~0 , soc_inst|m0_1|u_logic|Rrqwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ojmwx4~0 , soc_inst|m0_1|u_logic|Ojmwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ojmwx4~1 , soc_inst|m0_1|u_logic|Ojmwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[2]~5 , soc_inst|ram_1|data_to_memory[2]~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~9 , soc_inst|m0_1|u_logic|hwdata_o~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[26]~6 , soc_inst|ram_1|data_to_memory[26]~6, de1_soc_wrapper, 1
-instance = comp, \SW[2]~input , SW[2]~input, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[0][2] , soc_inst|switches_1|switch_store[0][2], de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~101 , soc_inst|m0_1|u_logic|Add2~101, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~85 , soc_inst|m0_1|u_logic|Add2~85, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~81 , soc_inst|m0_1|u_logic|Add2~81, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ithvx4~0 , soc_inst|m0_1|u_logic|Ithvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oaawx4~0 , soc_inst|m0_1|u_logic|Oaawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Un0wx4~0 , soc_inst|m0_1|u_logic|Un0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|If33z4 , soc_inst|m0_1|u_logic|If33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z523z4 , soc_inst|m0_1|u_logic|Z523z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kq92z4~1 , soc_inst|m0_1|u_logic|Kq92z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J7ewx4~0 , soc_inst|m0_1|u_logic|J7ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I2uvx4~0 , soc_inst|m0_1|u_logic|I2uvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B1a3z4 , soc_inst|m0_1|u_logic|B1a3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Repwx4~0 , soc_inst|m0_1|u_logic|Repwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jxs2z4 , soc_inst|m0_1|u_logic|Jxs2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aqp2z4 , soc_inst|m0_1|u_logic|Aqp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Repwx4~1 , soc_inst|m0_1|u_logic|Repwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lns2z4 , soc_inst|m0_1|u_logic|Lns2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L0uvx4 , soc_inst|m0_1|u_logic|L0uvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6l2z4 , soc_inst|m0_1|u_logic|Q6l2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Repwx4~2 , soc_inst|m0_1|u_logic|Repwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ncpwx4~0 , soc_inst|m0_1|u_logic|Ncpwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A9iwx4~0 , soc_inst|m0_1|u_logic|A9iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mof3z4 , soc_inst|m0_1|u_logic|Mof3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xmf3z4 , soc_inst|m0_1|u_logic|Xmf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Icxwx4~3 , soc_inst|m0_1|u_logic|Icxwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bqf3z4 , soc_inst|m0_1|u_logic|Bqf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ldf3z4 , soc_inst|m0_1|u_logic|Ldf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Icxwx4~2 , soc_inst|m0_1|u_logic|Icxwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aff3z4 , soc_inst|m0_1|u_logic|Aff3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Icxwx4~0 , soc_inst|m0_1|u_logic|Icxwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wbf3z4 , soc_inst|m0_1|u_logic|Wbf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Orj2z4 , soc_inst|m0_1|u_logic|Orj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Icxwx4~1 , soc_inst|m0_1|u_logic|Icxwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Icxwx4 , soc_inst|m0_1|u_logic|Icxwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Md93z4 , soc_inst|m0_1|u_logic|Md93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G4qwx4~1 , soc_inst|m0_1|u_logic|G4qwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vcv2z4 , soc_inst|m0_1|u_logic|Vcv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G4qwx4~3 , soc_inst|m0_1|u_logic|G4qwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mz63z4 , soc_inst|m0_1|u_logic|Mz63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G4qwx4~0 , soc_inst|m0_1|u_logic|G4qwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M3u2z4 , soc_inst|m0_1|u_logic|M3u2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G4qwx4~2 , soc_inst|m0_1|u_logic|G4qwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G4qwx4 , soc_inst|m0_1|u_logic|G4qwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Asdwx4~0 , soc_inst|m0_1|u_logic|Asdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nvdwx4~0 , soc_inst|m0_1|u_logic|Nvdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Asdwx4~1 , soc_inst|m0_1|u_logic|Asdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lpt2z4 , soc_inst|m0_1|u_logic|Lpt2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE , soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eruwx4~2 , soc_inst|m0_1|u_logic|Eruwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jw83z4 , soc_inst|m0_1|u_logic|Jw83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fio2z4 , soc_inst|m0_1|u_logic|Fio2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eruwx4~1 , soc_inst|m0_1|u_logic|Eruwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ujo2z4~feeder , soc_inst|m0_1|u_logic|Ujo2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ujo2z4 , soc_inst|m0_1|u_logic|Ujo2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uyu2z4 , soc_inst|m0_1|u_logic|Uyu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eruwx4~3 , soc_inst|m0_1|u_logic|Eruwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ll63z4~feeder , soc_inst|m0_1|u_logic|Ll63z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ll63z4 , soc_inst|m0_1|u_logic|Ll63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jlo2z4~DUPLICATE , soc_inst|m0_1|u_logic|Jlo2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eruwx4~0 , soc_inst|m0_1|u_logic|Eruwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eruwx4 , soc_inst|m0_1|u_logic|Eruwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kjk2z4 , soc_inst|m0_1|u_logic|Kjk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ggk2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zkk2z4 , soc_inst|m0_1|u_logic|Zkk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE , soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F8wwx4~0 , soc_inst|m0_1|u_logic|F8wwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rht2z4 , soc_inst|m0_1|u_logic|Rht2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rd63z4~feeder , soc_inst|m0_1|u_logic|Rd63z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rd63z4~DUPLICATE , soc_inst|m0_1|u_logic|Rd63z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|An73z4 , soc_inst|m0_1|u_logic|An73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F8wwx4~1 , soc_inst|m0_1|u_logic|F8wwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F8wwx4 , soc_inst|m0_1|u_logic|F8wwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Beowx4~0 , soc_inst|m0_1|u_logic|Beowx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V0k2z4 , soc_inst|m0_1|u_logic|V0k2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K2k2z4 , soc_inst|m0_1|u_logic|K2k2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y1v2z4 , soc_inst|m0_1|u_logic|Y1v2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nz83z4 , soc_inst|m0_1|u_logic|Nz83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Feqwx4~0 , soc_inst|m0_1|u_logic|Feqwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pst2z4 , soc_inst|m0_1|u_logic|Pst2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z3k2z4 , soc_inst|m0_1|u_logic|Z3k2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Po63z4 , soc_inst|m0_1|u_logic|Po63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yx73z4~DUPLICATE , soc_inst|m0_1|u_logic|Yx73z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Feqwx4~1 , soc_inst|m0_1|u_logic|Feqwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Feqwx4 , soc_inst|m0_1|u_logic|Feqwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vgq2z4 , soc_inst|m0_1|u_logic|Vgq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J0v2z4 , soc_inst|m0_1|u_logic|J0v2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yx83z4 , soc_inst|m0_1|u_logic|Yx83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fexwx4~0 , soc_inst|m0_1|u_logic|Fexwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kiq2z4 , soc_inst|m0_1|u_logic|Kiq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|An63z4~DUPLICATE , soc_inst|m0_1|u_logic|An63z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Art2z4 , soc_inst|m0_1|u_logic|Art2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jw73z4 , soc_inst|m0_1|u_logic|Jw73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fexwx4~1 , soc_inst|m0_1|u_logic|Fexwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fexwx4 , soc_inst|m0_1|u_logic|Fexwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zudwx4~0 , soc_inst|m0_1|u_logic|Zudwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zudwx4~1 , soc_inst|m0_1|u_logic|Zudwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE , soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bus2z4 , soc_inst|m0_1|u_logic|Bus2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Avowx4~0 , soc_inst|m0_1|u_logic|Avowx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G8n2z4 , soc_inst|m0_1|u_logic|G8n2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dks2z4 , soc_inst|m0_1|u_logic|Dks2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Avowx4~1 , soc_inst|m0_1|u_logic|Avowx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Avowx4~2 , soc_inst|m0_1|u_logic|Avowx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ddi3z4 , soc_inst|m0_1|u_logic|Ddi3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[20]~16 , soc_inst|m0_1|u_logic|hwdata_o[20]~16, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I1h3z4 , soc_inst|m0_1|u_logic|I1h3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F473z4 , soc_inst|m0_1|u_logic|F473z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fi93z4 , soc_inst|m0_1|u_logic|Fi93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|St0wx4~6 , soc_inst|m0_1|u_logic|St0wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tvn2z4 , soc_inst|m0_1|u_logic|Tvn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Od83z4 , soc_inst|m0_1|u_logic|Od83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE , soc_inst|m0_1|u_logic|F8u2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ohv2z4 , soc_inst|m0_1|u_logic|Ohv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|St0wx4~7 , soc_inst|m0_1|u_logic|St0wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|St0wx4~8 , soc_inst|m0_1|u_logic|St0wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|St0wx4 , soc_inst|m0_1|u_logic|St0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[18]~13 , soc_inst|m0_1|u_logic|hwdata_o[18]~13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xyn2z4 , soc_inst|m0_1|u_logic|Xyn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~1 , soc_inst|m0_1|u_logic|Add0~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~73 , soc_inst|m0_1|u_logic|Add0~73, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE , soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sg83z4 , soc_inst|m0_1|u_logic|Sg83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z52xx4~0 , soc_inst|m0_1|u_logic|Z52xx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Cao2z4 , soc_inst|m0_1|u_logic|Cao2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hs92z4~0 , soc_inst|m0_1|u_logic|Hs92z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rbo2z4~feeder , soc_inst|m0_1|u_logic|Rbo2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rbo2z4 , soc_inst|m0_1|u_logic|Rbo2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ro43z4 , soc_inst|m0_1|u_logic|Ro43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ay53z4 , soc_inst|m0_1|u_logic|Ay53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kq92z4~0 , soc_inst|m0_1|u_logic|Kq92z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O403z4~feeder , soc_inst|m0_1|u_logic|O403z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O403z4 , soc_inst|m0_1|u_logic|O403z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I113z4 , soc_inst|m0_1|u_logic|I113z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kq92z4~2 , soc_inst|m0_1|u_logic|Kq92z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kq92z4~3 , soc_inst|m0_1|u_logic|Kq92z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U11wx4~0 , soc_inst|m0_1|u_logic|U11wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cao2z4~DUPLICATE , soc_inst|m0_1|u_logic|Cao2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J773z4~DUPLICATE , soc_inst|m0_1|u_logic|J773z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J773z4 , soc_inst|m0_1|u_logic|J773z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Jl93z4~DUPLICATE , soc_inst|m0_1|u_logic|Jl93z4~DUPLICATE, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|W21wx4~7 , soc_inst|m0_1|u_logic|W21wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sg83z4 , soc_inst|m0_1|u_logic|Sg83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z52xx4~0 , soc_inst|m0_1|u_logic|Z52xx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|W21wx4~8 , soc_inst|m0_1|u_logic|W21wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kfawx4~0 , soc_inst|m0_1|u_logic|Kfawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N8o2z4 , soc_inst|m0_1|u_logic|N8o2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W21wx4~1 , soc_inst|m0_1|u_logic|W21wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y6o2z4~DUPLICATE , soc_inst|m0_1|u_logic|Y6o2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W21wx4~4 , soc_inst|m0_1|u_logic|W21wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jbu2z4~feeder , soc_inst|m0_1|u_logic|Jbu2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jbu2z4 , soc_inst|m0_1|u_logic|Jbu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Skv2z4~feeder , soc_inst|m0_1|u_logic|Skv2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Skv2z4 , soc_inst|m0_1|u_logic|Skv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W21wx4~0 , soc_inst|m0_1|u_logic|W21wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ay53z4~DUPLICATE , soc_inst|m0_1|u_logic|Ay53z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W21wx4~3 , soc_inst|m0_1|u_logic|W21wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W21wx4~2 , soc_inst|m0_1|u_logic|W21wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I113z4~DUPLICATE , soc_inst|m0_1|u_logic|I113z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W21wx4~5 , soc_inst|m0_1|u_logic|W21wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W21wx4~6 , soc_inst|m0_1|u_logic|W21wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kfawx4~1 , soc_inst|m0_1|u_logic|Kfawx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~65 , soc_inst|m0_1|u_logic|Add5~65, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~69 , soc_inst|m0_1|u_logic|Add5~69, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vpovx4 , soc_inst|m0_1|u_logic|Vpovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eijvx4~0 , soc_inst|m0_1|u_logic|Eijvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ym93z4 , soc_inst|m0_1|u_logic|Ym93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lw53z4 , soc_inst|m0_1|u_logic|Lw53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cn43z4 , soc_inst|m0_1|u_logic|Cn43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yj92z4~0 , soc_inst|m0_1|u_logic|Yj92z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Td33z4 , soc_inst|m0_1|u_logic|Td33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W21wx4 , soc_inst|m0_1|u_logic|W21wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O24wx4~0 , soc_inst|m0_1|u_logic|O24wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gdo2z4 , soc_inst|m0_1|u_logic|Gdo2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Womvx4~0 , soc_inst|m0_1|u_logic|Womvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xeo2z4 , soc_inst|m0_1|u_logic|Xeo2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~29 , soc_inst|m0_1|u_logic|Add0~29, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~85 , soc_inst|m0_1|u_logic|Add3~85, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gdawx4~0 , soc_inst|m0_1|u_logic|Gdawx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|K423z4 , soc_inst|m0_1|u_logic|K423z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yj92z4~1 , soc_inst|m0_1|u_logic|Yj92z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S2p2z4 , soc_inst|m0_1|u_logic|S2p2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE , soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vl92z4~0 , soc_inst|m0_1|u_logic|Vl92z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z203z4 , soc_inst|m0_1|u_logic|Z203z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tz03z4 , soc_inst|m0_1|u_logic|Tz03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yj92z4~2 , soc_inst|m0_1|u_logic|Yj92z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yj92z4~3 , soc_inst|m0_1|u_logic|Yj92z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hy0wx4~0 , soc_inst|m0_1|u_logic|Hy0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gdawx4~0 , soc_inst|m0_1|u_logic|Gdawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Td33z4~DUPLICATE , soc_inst|m0_1|u_logic|Td33z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lw53z4~DUPLICATE , soc_inst|m0_1|u_logic|Lw53z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~3 , soc_inst|m0_1|u_logic|Yw0wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kwo2z4~feeder , soc_inst|m0_1|u_logic|Kwo2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kwo2z4 , soc_inst|m0_1|u_logic|Kwo2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~2 , soc_inst|m0_1|u_logic|Yw0wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K423z4~DUPLICATE , soc_inst|m0_1|u_logic|K423z4~DUPLICATE, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Ozo2z4 , soc_inst|m0_1|u_logic|Ozo2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~0 , soc_inst|m0_1|u_logic|Yw0wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|S2p2z4~DUPLICATE , soc_inst|m0_1|u_logic|S2p2z4~DUPLICATE, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|M92xx4~0 , soc_inst|m0_1|u_logic|M92xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lw53z4 , soc_inst|m0_1|u_logic|Lw53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Td33z4~DUPLICATE , soc_inst|m0_1|u_logic|Td33z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~3 , soc_inst|m0_1|u_logic|Yw0wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tz03z4 , soc_inst|m0_1|u_logic|Tz03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z203z4~feeder , soc_inst|m0_1|u_logic|Z203z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z203z4 , soc_inst|m0_1|u_logic|Z203z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~4 , soc_inst|m0_1|u_logic|Yw0wx4~4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Zxo2z4 , soc_inst|m0_1|u_logic|Zxo2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~1 , soc_inst|m0_1|u_logic|Yw0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cn43z4 , soc_inst|m0_1|u_logic|Cn43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kwo2z4 , soc_inst|m0_1|u_logic|Kwo2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~2 , soc_inst|m0_1|u_logic|Yw0wx4~2, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~5 , soc_inst|m0_1|u_logic|Yw0wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Df83z4 , soc_inst|m0_1|u_logic|Df83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D1p2z4 , soc_inst|m0_1|u_logic|D1p2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gdawx4~1 , soc_inst|m0_1|u_logic|Gdawx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~93 , soc_inst|m0_1|u_logic|Add3~93, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~97 , soc_inst|m0_1|u_logic|Add3~97, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|haddr_o~4 , soc_inst|m0_1|u_logic|haddr_o~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdjvx4~0 , soc_inst|m0_1|u_logic|Pdjvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J7q2z4 , soc_inst|m0_1|u_logic|J7q2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Psh3z4 , soc_inst|m0_1|u_logic|Psh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mi23z4 , soc_inst|m0_1|u_logic|Mi23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ft83z4 , soc_inst|m0_1|u_logic|Ft83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vr33z4 , soc_inst|m0_1|u_logic|Vr33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~7 , soc_inst|m0_1|u_logic|Z62wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Naq2z4~feeder , soc_inst|m0_1|u_logic|Naq2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wj73z4 , soc_inst|m0_1|u_logic|Wj73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~6 , soc_inst|m0_1|u_logic|Z62wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~8 , soc_inst|m0_1|u_logic|Z62wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fxv2z4~DUPLICATE , soc_inst|m0_1|u_logic|Fxv2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Arh3z4 , soc_inst|m0_1|u_logic|Arh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~3 , soc_inst|m0_1|u_logic|Z62wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wnu2z4 , soc_inst|m0_1|u_logic|Wnu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rdq2z4 , soc_inst|m0_1|u_logic|Rdq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~4 , soc_inst|m0_1|u_logic|Z62wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Na63z4 , soc_inst|m0_1|u_logic|Na63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~1 , soc_inst|m0_1|u_logic|Z62wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E153z4~DUPLICATE , soc_inst|m0_1|u_logic|E153z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lph3z4~feeder , soc_inst|m0_1|u_logic|Lph3z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lph3z4 , soc_inst|m0_1|u_logic|Lph3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~2 , soc_inst|m0_1|u_logic|Z62wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Euh3z4~DUPLICATE , soc_inst|m0_1|u_logic|Euh3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T04xx4~0 , soc_inst|m0_1|u_logic|T04xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ccq2z4 , soc_inst|m0_1|u_logic|Ccq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~0 , soc_inst|m0_1|u_logic|Z62wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~5 , soc_inst|m0_1|u_logic|Z62wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z62wx4 , soc_inst|m0_1|u_logic|Z62wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ns9wx4~0 , soc_inst|m0_1|u_logic|Ns9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ns9wx4~1 , soc_inst|m0_1|u_logic|Ns9wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N72wx4~0 , soc_inst|m0_1|u_logic|N72wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mgawx4~0 , soc_inst|m0_1|u_logic|Mgawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J61wx4~1 , soc_inst|m0_1|u_logic|J61wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J61wx4~0 , soc_inst|m0_1|u_logic|J61wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O51wx4~0 , soc_inst|m0_1|u_logic|O51wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M41wx4~0 , soc_inst|m0_1|u_logic|M41wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wqd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Wqd3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE , soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ai9wx4~2 , soc_inst|m0_1|u_logic|Ai9wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Snd3z4 , soc_inst|m0_1|u_logic|Snd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ai9wx4~1 , soc_inst|m0_1|u_logic|Ai9wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B5e3z4 , soc_inst|m0_1|u_logic|B5e3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ai9wx4~0 , soc_inst|m0_1|u_logic|Ai9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I0e3z4~DUPLICATE , soc_inst|m0_1|u_logic|I0e3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ai9wx4~3 , soc_inst|m0_1|u_logic|Ai9wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ai9wx4 , soc_inst|m0_1|u_logic|Ai9wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sndwx4~0 , soc_inst|m0_1|u_logic|Sndwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C0ewx4~0 , soc_inst|m0_1|u_logic|C0ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sndwx4~1 , soc_inst|m0_1|u_logic|Sndwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tkdwx4~0 , soc_inst|m0_1|u_logic|Tkdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Godwx4~0 , soc_inst|m0_1|u_logic|Godwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tkdwx4~1 , soc_inst|m0_1|u_logic|Tkdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J9d3z4 , soc_inst|m0_1|u_logic|J9d3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xdb3z4 , soc_inst|m0_1|u_logic|Xdb3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J7b3z4 , soc_inst|m0_1|u_logic|J7b3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gcb3z4 , soc_inst|m0_1|u_logic|Gcb3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pab3z4~feeder , soc_inst|m0_1|u_logic|Pab3z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pab3z4 , soc_inst|m0_1|u_logic|Pab3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jkc3z4~0 , soc_inst|m0_1|u_logic|Jkc3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jkc3z4 , soc_inst|m0_1|u_logic|Jkc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jruvx4~0 , soc_inst|m0_1|u_logic|Jruvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE , soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D1ivx4~0 , soc_inst|m0_1|u_logic|D1ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F4c3z4 , soc_inst|m0_1|u_logic|F4c3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wkpwx4~0 , soc_inst|m0_1|u_logic|Wkpwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wkpwx4~1 , soc_inst|m0_1|u_logic|Wkpwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wkpwx4~2 , soc_inst|m0_1|u_logic|Wkpwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wkpwx4~3 , soc_inst|m0_1|u_logic|Wkpwx4~3, de1_soc_wrapper, 1
+instance = comp, \SW[6]~input , SW[6]~input, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[0][6]~feeder , soc_inst|switches_1|switch_store[0][6]~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[0][6] , soc_inst|switches_1|switch_store[0][6], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[6]~36 , soc_inst|interconnect_1|HRDATA[6]~36, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O9iwx4~0 , soc_inst|m0_1|u_logic|O9iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O9iwx4~1 , soc_inst|m0_1|u_logic|O9iwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X61wx4~0 , soc_inst|m0_1|u_logic|X61wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X61wx4~1 , soc_inst|m0_1|u_logic|X61wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M41wx4~1 , soc_inst|m0_1|u_logic|M41wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y873z4~feeder , soc_inst|m0_1|u_logic|Y873z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y873z4 , soc_inst|m0_1|u_logic|Y873z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F4q2z4 , soc_inst|m0_1|u_logic|F4q2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O723z4~feeder , soc_inst|m0_1|u_logic|O723z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O723z4~DUPLICATE , soc_inst|m0_1|u_logic|O723z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gq43z4 , soc_inst|m0_1|u_logic|Gq43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S71wx4~6 , soc_inst|m0_1|u_logic|S71wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pz53z4~feeder , soc_inst|m0_1|u_logic|Pz53z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pz53z4 , soc_inst|m0_1|u_logic|Pz53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S71wx4~7 , soc_inst|m0_1|u_logic|S71wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S71wx4~8 , soc_inst|m0_1|u_logic|S71wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mgawx4~1 , soc_inst|m0_1|u_logic|Mgawx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~61 , soc_inst|m0_1|u_logic|Add5~61, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~65 , soc_inst|m0_1|u_logic|Add5~65, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q52wx4~0 , soc_inst|m0_1|u_logic|Q52wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q52wx4~1 , soc_inst|m0_1|u_logic|Q52wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E0d3z4 , soc_inst|m0_1|u_logic|E0d3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Naq2z4 , soc_inst|m0_1|u_logic|Naq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ey9wx4~1 , soc_inst|m0_1|u_logic|Ey9wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ey9wx4~0 , soc_inst|m0_1|u_logic|Ey9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ey9wx4~2 , soc_inst|m0_1|u_logic|Ey9wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fxv2z4 , soc_inst|m0_1|u_logic|Fxv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ccq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ccq2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ey9wx4~3 , soc_inst|m0_1|u_logic|Ey9wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ey9wx4 , soc_inst|m0_1|u_logic|Ey9wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Euh3z4 , soc_inst|m0_1|u_logic|Euh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E153z4 , soc_inst|m0_1|u_logic|E153z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Na63z4~DUPLICATE , soc_inst|m0_1|u_logic|Na63z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Du9wx4~0 , soc_inst|m0_1|u_logic|Du9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Du9wx4~2 , soc_inst|m0_1|u_logic|Du9wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aw9wx4~0 , soc_inst|m0_1|u_logic|Aw9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Du9wx4~1 , soc_inst|m0_1|u_logic|Du9wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Du9wx4~3 , soc_inst|m0_1|u_logic|Du9wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P82wx4~0 , soc_inst|m0_1|u_logic|P82wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|haddr_o~3 , soc_inst|m0_1|u_logic|haddr_o~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zcivx4~0 , soc_inst|m0_1|u_logic|Zcivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y8q2z4 , soc_inst|m0_1|u_logic|Y8q2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|If33z4 , soc_inst|m0_1|u_logic|If33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z523z4 , soc_inst|m0_1|u_logic|Z523z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kq92z4~1 , soc_inst|m0_1|u_logic|Kq92z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rbo2z4 , soc_inst|m0_1|u_logic|Rbo2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ay53z4 , soc_inst|m0_1|u_logic|Ay53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ro43z4 , soc_inst|m0_1|u_logic|Ro43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kq92z4~0 , soc_inst|m0_1|u_logic|Kq92z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O403z4~DUPLICATE , soc_inst|m0_1|u_logic|O403z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I113z4 , soc_inst|m0_1|u_logic|I113z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kq92z4~2 , soc_inst|m0_1|u_logic|Kq92z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hs92z4~0 , soc_inst|m0_1|u_logic|Hs92z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kq92z4~3 , soc_inst|m0_1|u_logic|Kq92z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U11wx4~0 , soc_inst|m0_1|u_logic|U11wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~69 , soc_inst|m0_1|u_logic|Add5~69, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~73 , soc_inst|m0_1|u_logic|Add5~73, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bv0wx4 , soc_inst|m0_1|u_logic|Bv0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tmjvx4~0 , soc_inst|m0_1|u_logic|Tmjvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H4p2z4 , soc_inst|m0_1|u_logic|H4p2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U9u2z4 , soc_inst|m0_1|u_logic|U9u2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df83z4~DUPLICATE , soc_inst|m0_1|u_logic|Df83z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U573z4~DUPLICATE , soc_inst|m0_1|u_logic|U573z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xcuwx4~1 , soc_inst|m0_1|u_logic|Xcuwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kwo2z4~DUPLICATE , soc_inst|m0_1|u_logic|Kwo2z4~DUPLICATE, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Djv2z4 , soc_inst|m0_1|u_logic|Djv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uj93z4~DUPLICATE , soc_inst|m0_1|u_logic|Uj93z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xcuwx4~0 , soc_inst|m0_1|u_logic|Xcuwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xcuwx4 , soc_inst|m0_1|u_logic|Xcuwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yj92z4~0 , soc_inst|m0_1|u_logic|Yj92z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S2p2z4 , soc_inst|m0_1|u_logic|S2p2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D1p2z4 , soc_inst|m0_1|u_logic|D1p2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vl92z4~0 , soc_inst|m0_1|u_logic|Vl92z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K423z4~DUPLICATE , soc_inst|m0_1|u_logic|K423z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Td33z4 , soc_inst|m0_1|u_logic|Td33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yj92z4~1 , soc_inst|m0_1|u_logic|Yj92z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yj92z4~2 , soc_inst|m0_1|u_logic|Yj92z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yj92z4~3 , soc_inst|m0_1|u_logic|Yj92z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hy0wx4~0 , soc_inst|m0_1|u_logic|Hy0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fx0wx4~0 , soc_inst|m0_1|u_logic|Fx0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iv0wx4~1 , soc_inst|m0_1|u_logic|Iv0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iv0wx4~0 , soc_inst|m0_1|u_logic|Iv0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df83z4 , soc_inst|m0_1|u_logic|Df83z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE , soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~7 , soc_inst|m0_1|u_logic|Yw0wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U573z4 , soc_inst|m0_1|u_logic|U573z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uj93z4~feeder , soc_inst|m0_1|u_logic|Uj93z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE , soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Uj93z4 , soc_inst|m0_1|u_logic|Uj93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U573z4 , soc_inst|m0_1|u_logic|U573z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~6 , soc_inst|m0_1|u_logic|Yw0wx4~6, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~8 , soc_inst|m0_1|u_logic|Yw0wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gdawx4~1 , soc_inst|m0_1|u_logic|Gdawx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fx0wx4~0 , soc_inst|m0_1|u_logic|Fx0wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4 , soc_inst|m0_1|u_logic|Yw0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iv0wx4~0 , soc_inst|m0_1|u_logic|Iv0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mx0wx4~0 , soc_inst|m0_1|u_logic|Mx0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mx0wx4~1 , soc_inst|m0_1|u_logic|Mx0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~73 , soc_inst|m0_1|u_logic|Add5~73, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iv0wx4~1 , soc_inst|m0_1|u_logic|Iv0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iv0wx4~2 , soc_inst|m0_1|u_logic|Iv0wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U9u2z4 , soc_inst|m0_1|u_logic|U9u2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xcuwx4~1 , soc_inst|m0_1|u_logic|Xcuwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djv2z4~DUPLICATE , soc_inst|m0_1|u_logic|Djv2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xcuwx4~0 , soc_inst|m0_1|u_logic|Xcuwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xcuwx4 , soc_inst|m0_1|u_logic|Xcuwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X0ewx4~0 , soc_inst|m0_1|u_logic|X0ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X0ewx4~1 , soc_inst|m0_1|u_logic|X0ewx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lee3z4~0 , soc_inst|m0_1|u_logic|Lee3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lee3z4 , soc_inst|m0_1|u_logic|Lee3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K9vvx4~0 , soc_inst|m0_1|u_logic|K9vvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uzhvx4~0 , soc_inst|m0_1|u_logic|Uzhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ble3z4 , soc_inst|m0_1|u_logic|Ble3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Whlwx4~0 , soc_inst|m0_1|u_logic|Whlwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Whlwx4~1 , soc_inst|m0_1|u_logic|Whlwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Whlwx4~2 , soc_inst|m0_1|u_logic|Whlwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[17]~17 , soc_inst|m0_1|u_logic|hwdata_o[17]~17, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B2i3z4 , soc_inst|m0_1|u_logic|B2i3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pomvx4~0 , soc_inst|m0_1|u_logic|Pomvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S3i3z4 , soc_inst|m0_1|u_logic|S3i3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~17 , soc_inst|m0_1|u_logic|Add0~17, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iomvx4~0 , soc_inst|m0_1|u_logic|Iomvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O0o2z4 , soc_inst|m0_1|u_logic|O0o2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~53 , soc_inst|m0_1|u_logic|Add0~53, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~45 , soc_inst|m0_1|u_logic|Add0~45, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Unmvx4~0 , soc_inst|m0_1|u_logic|Unmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z2h3z4 , soc_inst|m0_1|u_logic|Z2h3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~69 , soc_inst|m0_1|u_logic|Add0~69, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Llq2z4 , soc_inst|m0_1|u_logic|Llq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Poq2z4 , soc_inst|m0_1|u_logic|Poq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~1 , soc_inst|m0_1|u_logic|Ce0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rz13z4 , soc_inst|m0_1|u_logic|Rz13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eqq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Eqq2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~0 , soc_inst|m0_1|u_logic|Ce0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ji43z4 , soc_inst|m0_1|u_logic|Ji43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Anq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Anq2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~2 , soc_inst|m0_1|u_logic|Ce0wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tch3z4~DUPLICATE , soc_inst|m0_1|u_logic|Tch3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D03xx4~0 , soc_inst|m0_1|u_logic|D03xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A933z4 , soc_inst|m0_1|u_logic|A933z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sr53z4 , soc_inst|m0_1|u_logic|Sr53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~3 , soc_inst|m0_1|u_logic|Ce0wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P9h3z4 , soc_inst|m0_1|u_logic|P9h3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A8h3z4 , soc_inst|m0_1|u_logic|A8h3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~4 , soc_inst|m0_1|u_logic|Ce0wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~5 , soc_inst|m0_1|u_logic|Ce0wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B5u2z4 , soc_inst|m0_1|u_logic|B5u2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE , soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~7 , soc_inst|m0_1|u_logic|Ce0wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ka83z4 , soc_inst|m0_1|u_logic|Ka83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B173z4 , soc_inst|m0_1|u_logic|B173z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bf93z4 , soc_inst|m0_1|u_logic|Bf93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~6 , soc_inst|m0_1|u_logic|Ce0wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ebh3z4 , soc_inst|m0_1|u_logic|Ebh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~8 , soc_inst|m0_1|u_logic|Ce0wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4 , soc_inst|m0_1|u_logic|Ce0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[21]~15 , soc_inst|m0_1|u_logic|hwdata_o[21]~15, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ieh3z4 , soc_inst|m0_1|u_logic|Ieh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nnmvx4~0 , soc_inst|m0_1|u_logic|Nnmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ogo2z4 , soc_inst|m0_1|u_logic|Ogo2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~85 , soc_inst|m0_1|u_logic|Add0~85, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cma3z4~0 , soc_inst|m0_1|u_logic|Cma3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cma3z4 , soc_inst|m0_1|u_logic|Cma3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gnmvx4~0 , soc_inst|m0_1|u_logic|Gnmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ddi3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ddi3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y7iwx4~0 , soc_inst|m0_1|u_logic|Y7iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y7iwx4~1 , soc_inst|m0_1|u_logic|Y7iwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y7iwx4~2 , soc_inst|m0_1|u_logic|Y7iwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E9zvx4~0 , soc_inst|m0_1|u_logic|E9zvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E9zvx4~1 , soc_inst|m0_1|u_logic|E9zvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E1ewx4~0 , soc_inst|m0_1|u_logic|E1ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E1ewx4~1 , soc_inst|m0_1|u_logic|E1ewx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqdwx4~0 , soc_inst|m0_1|u_logic|Kqdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wwdwx4~1 , soc_inst|m0_1|u_logic|Wwdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~0 , soc_inst|m0_1|u_logic|Z78wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ycu2z4~feeder , soc_inst|m0_1|u_logic|Ycu2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ycu2z4 , soc_inst|m0_1|u_logic|Ycu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hi83z4 , soc_inst|m0_1|u_logic|Hi83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hmqwx4~2 , soc_inst|m0_1|u_logic|Hmqwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B1q2z4 , soc_inst|m0_1|u_logic|B1q2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hmv2z4 , soc_inst|m0_1|u_logic|Hmv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hmqwx4~3 , soc_inst|m0_1|u_logic|Hmqwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE , soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hmqwx4~0 , soc_inst|m0_1|u_logic|Hmqwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mzp2z4 , soc_inst|m0_1|u_logic|Mzp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|No93z4 , soc_inst|m0_1|u_logic|No93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hmqwx4~1 , soc_inst|m0_1|u_logic|Hmqwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hmqwx4 , soc_inst|m0_1|u_logic|Hmqwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mydwx4~0 , soc_inst|m0_1|u_logic|Mydwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C0ewx4~1 , soc_inst|m0_1|u_logic|C0ewx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zndwx4~0 , soc_inst|m0_1|u_logic|Zndwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vzdwx4~0 , soc_inst|m0_1|u_logic|Vzdwx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Vzdwx4~1 , soc_inst|m0_1|u_logic|Vzdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Whlwx4~3 , soc_inst|m0_1|u_logic|Whlwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bo0wx4~0 , soc_inst|m0_1|u_logic|Bo0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pap2z4~feeder , soc_inst|m0_1|u_logic|Pap2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pap2z4 , soc_inst|m0_1|u_logic|Pap2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~1 , soc_inst|m0_1|u_logic|Nn0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G123z4~feeder , soc_inst|m0_1|u_logic|G123z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G123z4 , soc_inst|m0_1|u_logic|G123z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ecp2z4~feeder , soc_inst|m0_1|u_logic|Ecp2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ecp2z4 , soc_inst|m0_1|u_logic|Ecp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~0 , soc_inst|m0_1|u_logic|Nn0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M0i3z4~DUPLICATE , soc_inst|m0_1|u_logic|M0i3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nr2xx4~0 , soc_inst|m0_1|u_logic|Nr2xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE , soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pa33z4~feeder , soc_inst|m0_1|u_logic|Pa33z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE , soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~3 , soc_inst|m0_1|u_logic|Nn0wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ixh3z4 , soc_inst|m0_1|u_logic|Ixh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tvh3z4 , soc_inst|m0_1|u_logic|Tvh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~4 , soc_inst|m0_1|u_logic|Nn0wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yj43z4 , soc_inst|m0_1|u_logic|Yj43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A9p2z4~feeder , soc_inst|m0_1|u_logic|A9p2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A9p2z4~DUPLICATE , soc_inst|m0_1|u_logic|A9p2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~2 , soc_inst|m0_1|u_logic|Nn0wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~5 , soc_inst|m0_1|u_logic|Nn0wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4 , soc_inst|m0_1|u_logic|Nn0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xl0wx4~0 , soc_inst|m0_1|u_logic|Xl0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zndwx4~1 , soc_inst|m0_1|u_logic|Zndwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djdwx4~0 , soc_inst|m0_1|u_logic|Djdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wwdwx4~2 , soc_inst|m0_1|u_logic|Wwdwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mydwx4~1 , soc_inst|m0_1|u_logic|Mydwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yxdwx4~1 , soc_inst|m0_1|u_logic|Yxdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D9uwx4~2 , soc_inst|m0_1|u_logic|D9uwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Anq2z4 , soc_inst|m0_1|u_logic|Anq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D9uwx4~1 , soc_inst|m0_1|u_logic|D9uwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kev2z4 , soc_inst|m0_1|u_logic|Kev2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D9uwx4~3 , soc_inst|m0_1|u_logic|D9uwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eqq2z4 , soc_inst|m0_1|u_logic|Eqq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D9uwx4~0 , soc_inst|m0_1|u_logic|D9uwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D9uwx4 , soc_inst|m0_1|u_logic|D9uwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qtdwx4~0 , soc_inst|m0_1|u_logic|Qtdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qtdwx4~1 , soc_inst|m0_1|u_logic|Qtdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tq7wx4~0 , soc_inst|m0_1|u_logic|Tq7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Godwx4~1 , soc_inst|m0_1|u_logic|Godwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S08wx4~0 , soc_inst|m0_1|u_logic|S08wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wwdwx4~0 , soc_inst|m0_1|u_logic|Wwdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~1 , soc_inst|m0_1|u_logic|Z78wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~4 , soc_inst|m0_1|u_logic|Z78wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qmdwx4~1 , soc_inst|m0_1|u_logic|Qmdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djdwx4~3 , soc_inst|m0_1|u_logic|Djdwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Widwx4~0 , soc_inst|m0_1|u_logic|Widwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jiowx4~1 , soc_inst|m0_1|u_logic|Jiowx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B28wx4~0 , soc_inst|m0_1|u_logic|B28wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fkdwx4~1 , soc_inst|m0_1|u_logic|Fkdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fq7wx4~0 , soc_inst|m0_1|u_logic|Fq7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djdwx4~1 , soc_inst|m0_1|u_logic|Djdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djdwx4~2 , soc_inst|m0_1|u_logic|Djdwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~3 , soc_inst|m0_1|u_logic|Z78wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nvdwx4~1 , soc_inst|m0_1|u_logic|Nvdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uvdwx4~1 , soc_inst|m0_1|u_logic|Uvdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqdwx4~2 , soc_inst|m0_1|u_logic|Kqdwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dqdwx4~0 , soc_inst|m0_1|u_logic|Dqdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xtdwx4~0 , soc_inst|m0_1|u_logic|Xtdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xtdwx4~1 , soc_inst|m0_1|u_logic|Xtdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqdwx4~3 , soc_inst|m0_1|u_logic|Kqdwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U18wx4~0 , soc_inst|m0_1|u_logic|U18wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yvtwx4~0 , soc_inst|m0_1|u_logic|Yvtwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fwtwx4~0 , soc_inst|m0_1|u_logic|Fwtwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xs7wx4~0 , soc_inst|m0_1|u_logic|Xs7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xs7wx4~1 , soc_inst|m0_1|u_logic|Xs7wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqdwx4~1 , soc_inst|m0_1|u_logic|Kqdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~2 , soc_inst|m0_1|u_logic|Z78wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~5 , soc_inst|m0_1|u_logic|Z78wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Beowx4~1 , soc_inst|m0_1|u_logic|Beowx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q7ewx4~0 , soc_inst|m0_1|u_logic|Q7ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q7ewx4~1 , soc_inst|m0_1|u_logic|Q7ewx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Kvtwx4 , soc_inst|m0_1|u_logic|Kvtwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[29]~1 , soc_inst|interconnect_1|HRDATA[29]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[27]~18 , soc_inst|ram_1|data_to_memory[27]~18, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mjlwx4~0 , soc_inst|m0_1|u_logic|Mjlwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gftwx4~0 , soc_inst|m0_1|u_logic|Gftwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kw7wx4~0 , soc_inst|m0_1|u_logic|Kw7wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Kw7wx4~1 , soc_inst|m0_1|u_logic|Kw7wx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Iutwx4~0 , soc_inst|m0_1|u_logic|Iutwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mjlwx4~1 , soc_inst|m0_1|u_logic|Mjlwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bo0wx4~1 , soc_inst|m0_1|u_logic|Bo0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xl0wx4~1 , soc_inst|m0_1|u_logic|Xl0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xl0wx4~2 , soc_inst|m0_1|u_logic|Xl0wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zb83z4 , soc_inst|m0_1|u_logic|Zb83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cuxwx4~0 , soc_inst|m0_1|u_logic|Cuxwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hr7wx4~0 , soc_inst|m0_1|u_logic|Hr7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X7ewx4~0 , soc_inst|m0_1|u_logic|X7ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A6ewx4~0 , soc_inst|m0_1|u_logic|A6ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gftwx4~1 , soc_inst|m0_1|u_logic|Gftwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F5ewx4 , soc_inst|m0_1|u_logic|F5ewx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W3ewx4~0 , soc_inst|m0_1|u_logic|W3ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W3ewx4~1 , soc_inst|m0_1|u_logic|W3ewx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~6 , soc_inst|m0_1|u_logic|Z78wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wpcvx4 , soc_inst|m0_1|u_logic|Wpcvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nz73z4 , soc_inst|m0_1|u_logic|Nz73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Igl2z4 , soc_inst|m0_1|u_logic|Igl2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C193z4 , soc_inst|m0_1|u_logic|C193z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eq63z4 , soc_inst|m0_1|u_logic|Eq63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~5 , soc_inst|m0_1|u_logic|Kqzvx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eut2z4 , soc_inst|m0_1|u_logic|Eut2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~6 , soc_inst|m0_1|u_logic|Kqzvx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~7 , soc_inst|m0_1|u_logic|Kqzvx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Edl2z4 , soc_inst|m0_1|u_logic|Edl2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~1 , soc_inst|m0_1|u_logic|Kqzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M743z4 , soc_inst|m0_1|u_logic|M743z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pbl2z4 , soc_inst|m0_1|u_logic|Pbl2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~2 , soc_inst|m0_1|u_logic|Kqzvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vg53z4 , soc_inst|m0_1|u_logic|Vg53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dy23z4 , soc_inst|m0_1|u_logic|Dy23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~3 , soc_inst|m0_1|u_logic|Kqzvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Csz2z4 , soc_inst|m0_1|u_logic|Csz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xhl2z4 , soc_inst|m0_1|u_logic|Xhl2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wo03z4 , soc_inst|m0_1|u_logic|Wo03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~4 , soc_inst|m0_1|u_logic|Kqzvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tel2z4 , soc_inst|m0_1|u_logic|Tel2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uo13z4 , soc_inst|m0_1|u_logic|Uo13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~0 , soc_inst|m0_1|u_logic|Kqzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4 , soc_inst|m0_1|u_logic|Kqzvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J4awx4~0 , soc_inst|m0_1|u_logic|J4awx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~57 , soc_inst|m0_1|u_logic|Add5~57, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~5 , soc_inst|m0_1|u_logic|Add5~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dih2z4~0 , soc_inst|m0_1|u_logic|Dih2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ovcvx4 , soc_inst|m0_1|u_logic|Ovcvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~117 , soc_inst|m0_1|u_logic|Add5~117, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~9 , soc_inst|m0_1|u_logic|Add5~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Szr2z4 , soc_inst|m0_1|u_logic|Szr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eyr2z4 , soc_inst|m0_1|u_logic|Eyr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qwr2z4 , soc_inst|m0_1|u_logic|Qwr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hp9wx4~0 , soc_inst|m0_1|u_logic|Hp9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z863z4 , soc_inst|m0_1|u_logic|Z863z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qz43z4 , soc_inst|m0_1|u_logic|Qz43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kn9wx4~0 , soc_inst|m0_1|u_logic|Kn9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kc03z4 , soc_inst|m0_1|u_logic|Kc03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E913z4 , soc_inst|m0_1|u_logic|E913z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kn9wx4~2 , soc_inst|m0_1|u_logic|Kn9wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yg23z4~DUPLICATE , soc_inst|m0_1|u_logic|Yg23z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hq33z4 , soc_inst|m0_1|u_logic|Hq33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kn9wx4~1 , soc_inst|m0_1|u_logic|Kn9wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kn9wx4~3 , soc_inst|m0_1|u_logic|Kn9wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F32wx4~0 , soc_inst|m0_1|u_logic|F32wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K9z2z4 , soc_inst|m0_1|u_logic|K9z2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tuawx4~0 , soc_inst|m0_1|u_logic|Tuawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tuawx4~1 , soc_inst|m0_1|u_logic|Tuawx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hnbwx4~0 , soc_inst|m0_1|u_logic|Hnbwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qzq2z4 , soc_inst|m0_1|u_logic|Qzq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z4bwx4~1 , soc_inst|m0_1|u_logic|Z4bwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hnbwx4~1 , soc_inst|m0_1|u_logic|Hnbwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~29 , soc_inst|m0_1|u_logic|Add5~29, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~93 , soc_inst|m0_1|u_logic|Add5~93, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~101 , soc_inst|m0_1|u_logic|Add5~101, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~33 , soc_inst|m0_1|u_logic|Add5~33, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~97 , soc_inst|m0_1|u_logic|Add5~97, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~109 , soc_inst|m0_1|u_logic|Add5~109, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~37 , soc_inst|m0_1|u_logic|Add5~37, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~81 , soc_inst|m0_1|u_logic|Add5~81, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~41 , soc_inst|m0_1|u_logic|Add5~41, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Do8wx4~0 , soc_inst|m0_1|u_logic|Do8wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jf92z4~0 , soc_inst|m0_1|u_logic|Jf92z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ixn2z4 , soc_inst|m0_1|u_logic|Ixn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wu53z4~DUPLICATE , soc_inst|m0_1|u_logic|Wu53z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Md92z4~0 , soc_inst|m0_1|u_logic|Md92z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ec33z4 , soc_inst|m0_1|u_logic|Ec33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Md92z4~1 , soc_inst|m0_1|u_logic|Md92z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Md92z4~2 , soc_inst|m0_1|u_logic|Md92z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Md92z4~3 , soc_inst|m0_1|u_logic|Md92z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qs0wx4~0 , soc_inst|m0_1|u_logic|Qs0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~21 , soc_inst|m0_1|u_logic|Add5~21, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U6awx4~0 , soc_inst|m0_1|u_logic|U6awx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U6awx4~1 , soc_inst|m0_1|u_logic|U6awx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oaawx4~0 , soc_inst|m0_1|u_logic|Oaawx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Xyh3z4~DUPLICATE , soc_inst|m0_1|u_logic|Xyh3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zfv2z4 , soc_inst|m0_1|u_logic|Zfv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6u2z4 , soc_inst|m0_1|u_logic|Q6u2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~7 , soc_inst|m0_1|u_logic|Nn0wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zb83z4 , soc_inst|m0_1|u_logic|Zb83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q273z4~DUPLICATE , soc_inst|m0_1|u_logic|Q273z4~DUPLICATE, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Qg93z4 , soc_inst|m0_1|u_logic|Qg93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q273z4~feeder , soc_inst|m0_1|u_logic|Q273z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q273z4 , soc_inst|m0_1|u_logic|Q273z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~6 , soc_inst|m0_1|u_logic|Nn0wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6u2z4~DUPLICATE , soc_inst|m0_1|u_logic|Q6u2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zfv2z4 , soc_inst|m0_1|u_logic|Zfv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~7 , soc_inst|m0_1|u_logic|Nn0wx4~7, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~8 , soc_inst|m0_1|u_logic|Nn0wx4~8, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Oaawx4~1 , soc_inst|m0_1|u_logic|Oaawx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ecawx4~0 , soc_inst|m0_1|u_logic|Ecawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fi93z4 , soc_inst|m0_1|u_logic|Fi93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F473z4~DUPLICATE , soc_inst|m0_1|u_logic|F473z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|St0wx4~6 , soc_inst|m0_1|u_logic|St0wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ohv2z4 , soc_inst|m0_1|u_logic|Ohv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F8u2z4 , soc_inst|m0_1|u_logic|F8u2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|St0wx4~7 , soc_inst|m0_1|u_logic|St0wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Od83z4 , soc_inst|m0_1|u_logic|Od83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tvn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Tvn2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|St0wx4~8 , soc_inst|m0_1|u_logic|St0wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Psn2z4 , soc_inst|m0_1|u_logic|Psn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|St0wx4~1 , soc_inst|m0_1|u_logic|St0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wu53z4 , soc_inst|m0_1|u_logic|Wu53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ec33z4 , soc_inst|m0_1|u_logic|Ec33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|St0wx4~3 , soc_inst|m0_1|u_logic|St0wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nl43z4 , soc_inst|m0_1|u_logic|Nl43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Arn2z4 , soc_inst|m0_1|u_logic|Arn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|St0wx4~2 , soc_inst|m0_1|u_logic|St0wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ixn2z4 , soc_inst|m0_1|u_logic|Ixn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jq1xx4~0 , soc_inst|m0_1|u_logic|Jq1xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ey03z4 , soc_inst|m0_1|u_logic|Ey03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K103z4 , soc_inst|m0_1|u_logic|K103z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|St0wx4~4 , soc_inst|m0_1|u_logic|St0wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V223z4~feeder , soc_inst|m0_1|u_logic|V223z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V223z4 , soc_inst|m0_1|u_logic|V223z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eun2z4 , soc_inst|m0_1|u_logic|Eun2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|St0wx4~0 , soc_inst|m0_1|u_logic|St0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|St0wx4~5 , soc_inst|m0_1|u_logic|St0wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ecawx4~1 , soc_inst|m0_1|u_logic|Ecawx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~21 , soc_inst|m0_1|u_logic|Add5~21, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE , soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yj43z4~DUPLICATE , soc_inst|m0_1|u_logic|Yj43z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A792z4~0 , soc_inst|m0_1|u_logic|A792z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xyh3z4 , soc_inst|m0_1|u_logic|Xyh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X892z4~0 , soc_inst|m0_1|u_logic|X892z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pa33z4 , soc_inst|m0_1|u_logic|Pa33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A792z4~1 , soc_inst|m0_1|u_logic|A792z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A792z4~2 , soc_inst|m0_1|u_logic|A792z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A792z4~3 , soc_inst|m0_1|u_logic|A792z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wo0wx4~0 , soc_inst|m0_1|u_logic|Wo0wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Add5~49 , soc_inst|m0_1|u_logic|Add5~49, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ithvx4~1 , soc_inst|m0_1|u_logic|Ithvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ithvx4~2 , soc_inst|m0_1|u_logic|Ithvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zjq2z4 , soc_inst|m0_1|u_logic|Zjq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xvjvx4~0 , soc_inst|m0_1|u_logic|Xvjvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L7p2z4 , soc_inst|m0_1|u_logic|L7p2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tj0wx4~0 , soc_inst|m0_1|u_logic|Tj0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ldhvx4~0 , soc_inst|m0_1|u_logic|Ldhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~89 , soc_inst|m0_1|u_logic|Add2~89, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B9g3z4 , soc_inst|m0_1|u_logic|B9g3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M9awx4~0 , soc_inst|m0_1|u_logic|M9awx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sog3z4 , soc_inst|m0_1|u_logic|Sog3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tzg3z4~DUPLICATE , soc_inst|m0_1|u_logic|Tzg3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~1 , soc_inst|m0_1|u_logic|Hk0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ltg3z4~feeder , soc_inst|m0_1|u_logic|Ltg3z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ltg3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ltg3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Avg3z4 , soc_inst|m0_1|u_logic|Avg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~4 , soc_inst|m0_1|u_logic|Hk0wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vgg3z4~DUPLICATE , soc_inst|m0_1|u_logic|Vgg3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zjg3z4 , soc_inst|m0_1|u_logic|Zjg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~3 , soc_inst|m0_1|u_logic|Hk0wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eyg3z4~feeder , soc_inst|m0_1|u_logic|Eyg3z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eyg3z4~DUPLICATE , soc_inst|m0_1|u_logic|Eyg3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xi2xx4~0 , soc_inst|m0_1|u_logic|Xi2xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kig3z4 , soc_inst|m0_1|u_logic|Kig3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ccg3z4~feeder , soc_inst|m0_1|u_logic|Ccg3z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ccg3z4 , soc_inst|m0_1|u_logic|Ccg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~2 , soc_inst|m0_1|u_logic|Hk0wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Olg3z4 , soc_inst|m0_1|u_logic|Olg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wrg3z4 , soc_inst|m0_1|u_logic|Wrg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~0 , soc_inst|m0_1|u_logic|Hk0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~5 , soc_inst|m0_1|u_logic|Hk0wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nag3z4~feeder , soc_inst|m0_1|u_logic|Nag3z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nag3z4 , soc_inst|m0_1|u_logic|Nag3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gfg3z4~DUPLICATE , soc_inst|m0_1|u_logic|Gfg3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~6 , soc_inst|m0_1|u_logic|Hk0wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rdg3z4~feeder , soc_inst|m0_1|u_logic|Rdg3z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rdg3z4 , soc_inst|m0_1|u_logic|Rdg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pwg3z4~feeder , soc_inst|m0_1|u_logic|Pwg3z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pwg3z4~DUPLICATE , soc_inst|m0_1|u_logic|Pwg3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dng3z4 , soc_inst|m0_1|u_logic|Dng3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hqg3z4~DUPLICATE , soc_inst|m0_1|u_logic|Hqg3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~7 , soc_inst|m0_1|u_logic|Hk0wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~8 , soc_inst|m0_1|u_logic|Hk0wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M9awx4~1 , soc_inst|m0_1|u_logic|M9awx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Add5~53 , soc_inst|m0_1|u_logic|Add5~53, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ldhvx4~1 , soc_inst|m0_1|u_logic|Ldhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ldhvx4~2 , soc_inst|m0_1|u_logic|Ldhvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B9g3z4~DUPLICATE , soc_inst|m0_1|u_logic|B9g3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M0kvx4~0 , soc_inst|m0_1|u_logic|M0kvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tzg3z4 , soc_inst|m0_1|u_logic|Tzg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eyg3z4 , soc_inst|m0_1|u_logic|Eyg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE , soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xu82z4~1 , soc_inst|m0_1|u_logic|Xu82z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ltg3z4 , soc_inst|m0_1|u_logic|Ltg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xu82z4~2 , soc_inst|m0_1|u_logic|Xu82z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pwg3z4 , soc_inst|m0_1|u_logic|Pwg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uw82z4~0 , soc_inst|m0_1|u_logic|Uw82z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vgg3z4 , soc_inst|m0_1|u_logic|Vgg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xu82z4~0 , soc_inst|m0_1|u_logic|Xu82z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xu82z4~3 , soc_inst|m0_1|u_logic|Xu82z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fj0wx4~0 , soc_inst|m0_1|u_logic|Fj0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~77 , soc_inst|m0_1|u_logic|Add3~77, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~85 , soc_inst|m0_1|u_logic|Add3~85, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ug0wx4 , soc_inst|m0_1|u_logic|Ug0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address~1 , soc_inst|pix1|word_address~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[5] , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[5], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address~0 , soc_inst|pix1|word_address~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2] , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address~3 , soc_inst|pix1|word_address~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3] , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address~4 , soc_inst|pix1|word_address~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0] , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address~5 , soc_inst|pix1|word_address~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1] , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address[13] , soc_inst|pix1|word_address[13], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address[18]~feeder , soc_inst|pix1|word_address[18]~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address[18] , soc_inst|pix1|word_address[18], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address[15] , soc_inst|pix1|word_address[15], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address[14] , soc_inst|pix1|word_address[14], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3572w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3572w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3760w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3760w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address[8] , soc_inst|pix1|word_address[8], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address[9] , soc_inst|pix1|word_address[9], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address[10] , soc_inst|pix1|word_address[10], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address[11] , soc_inst|pix1|word_address[11], de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|haddr_o~4 , soc_inst|m0_1|u_logic|haddr_o~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address[12] , soc_inst|pix1|word_address[12], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address~6 , soc_inst|pix1|word_address~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address~7 , soc_inst|pix1|word_address~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address~8 , soc_inst|pix1|word_address~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address~9 , soc_inst|pix1|word_address~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address~10 , soc_inst|pix1|word_address~10, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address~11 , soc_inst|pix1|word_address~11, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address~12 , soc_inst|pix1|word_address~12, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address~13 , soc_inst|pix1|word_address~13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address~14 , soc_inst|pix1|word_address~14, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address~15 , soc_inst|pix1|word_address~15, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address~16 , soc_inst|pix1|word_address~16, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address~17 , soc_inst|pix1|word_address~17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address~18 , soc_inst|pix1|word_address~18, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a202 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a202, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3592w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3592w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3780w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3780w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a218 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a218, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3770w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3770w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a210 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a210, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory~17 , soc_inst|pix1|memory~17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3749w[3] , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3749w[3], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a194 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a194, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w2_n1_mux_dataout~2 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w2_n1_mux_dataout~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address~2 , soc_inst|pix1|word_address~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3655w[3] , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3655w[3], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a130 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a130, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3686w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3686w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a154 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a154, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3666w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3666w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a138 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a138, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3676w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3676w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a146 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a146, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w2_n1_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w2_n1_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3716w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3716w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a178 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a178, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3612w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3612w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3706w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3706w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a170 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a170, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3726w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3726w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3726w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3726w[3]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a186 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a186, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3696w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3696w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a162 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a162, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w2_n1_mux_dataout~1 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w2_n1_mux_dataout~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3790w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3790w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address[8]~DUPLICATE , soc_inst|pix1|word_address[8]~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a226 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a226, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3810w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3810w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a242 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a242, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3800w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3800w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a234 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a234, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3820w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3820w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a250 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a250, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w2_n1_mux_dataout~3 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w2_n1_mux_dataout~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w2_n1_mux_dataout~4 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w2_n1_mux_dataout~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[4] , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[4], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[41] , soc_inst|pix1|memory_rtl_0_bypass[41], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory~0feeder , soc_inst|pix1|memory~0feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory~0 , soc_inst|pix1|memory~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[6]~10 , soc_inst|interconnect_1|HRDATA[6]~10, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory~20 , soc_inst|pix1|memory~20, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory~19 , soc_inst|pix1|memory~19, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory~21 , soc_inst|pix1|memory~21, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory~3 , soc_inst|pix1|memory~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[6]~9 , soc_inst|interconnect_1|HRDATA[6]~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[2]~60 , soc_inst|interconnect_1|HRDATA[2]~60, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3517w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3517w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3527w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3527w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3487w[3] , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3487w[3], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3622w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3622w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a114 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a114, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3582w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3582w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a82 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a82, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3527w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3527w[3]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a50 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a50, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w2_n0_mux_dataout~2 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w2_n0_mux_dataout~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3572w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3572w[3]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a74 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a74, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3612w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3612w[3]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a106 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a106, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3517w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3517w[3]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3517w[3]~2 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3517w[3]~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a42 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a42, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3477w[3] , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3477w[3], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w2_n0_mux_dataout~1 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w2_n0_mux_dataout~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3497w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3497w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3632w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3632w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a122 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a122, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3537w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3537w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a58 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a58, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3592w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3592w[3]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a90 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a90, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w2_n0_mux_dataout~3 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w2_n0_mux_dataout~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2799w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2799w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3561w[3] , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3561w[3], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a66 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a66, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory~18 , soc_inst|pix1|memory~18, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~0 , soc_inst|m0_1|u_logic|Nlovx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3460w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3460w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3507w[3] , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3507w[3], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3602w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3602w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a98 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a98, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w2_n0_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w2_n0_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w2_n0_mux_dataout~4 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w2_n0_mux_dataout~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l6_w5_n0_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l6_w5_n0_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3864w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3864w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3894w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3894w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[7] , soc_inst|m0_1|u_logic|hwdata_o[7], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a298 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a298, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3884w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3884w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a290 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a290, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l6_w2_n0_mux_dataout~1 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l6_w2_n0_mux_dataout~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l6_w2_n0_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l6_w2_n0_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3843w[3] , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3843w[3], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a258 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a258, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3854w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3854w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a266 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a266, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3874w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3874w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a282 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a282, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3864w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|rden_decode_b|w_anode3864w[3]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a274 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a274, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w2_n8_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w2_n8_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[2]~61 , soc_inst|interconnect_1|HRDATA[2]~61, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[2]~17 , soc_inst|interconnect_1|HRDATA[2]~17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[2]~18 , soc_inst|interconnect_1|HRDATA[2]~18, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qpowx4~0 , soc_inst|m0_1|u_logic|Qpowx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F7qwx4 , soc_inst|m0_1|u_logic|F7qwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ynvvx4 , soc_inst|m0_1|u_logic|Ynvvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sta2z4~0 , soc_inst|m0_1|u_logic|Sta2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M5mvx4~0 , soc_inst|m0_1|u_logic|M5mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M5mvx4~1 , soc_inst|m0_1|u_logic|M5mvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hzj2z4 , soc_inst|m0_1|u_logic|Hzj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T7qwx4~0 , soc_inst|m0_1|u_logic|T7qwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jkmwx4~0 , soc_inst|m0_1|u_logic|Jkmwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rd63z4 , soc_inst|m0_1|u_logic|Rd63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vhk2z4 , soc_inst|m0_1|u_logic|Vhk2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|An73z4~DUPLICATE , soc_inst|m0_1|u_logic|An73z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rht2z4 , soc_inst|m0_1|u_logic|Rht2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F8wwx4~1 , soc_inst|m0_1|u_logic|F8wwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zkk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Zkk2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kjk2z4 , soc_inst|m0_1|u_logic|Kjk2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ggk2z4 , soc_inst|m0_1|u_logic|Ggk2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aru2z4 , soc_inst|m0_1|u_logic|Aru2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F8wwx4~0 , soc_inst|m0_1|u_logic|F8wwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F8wwx4 , soc_inst|m0_1|u_logic|F8wwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Beowx4~0 , soc_inst|m0_1|u_logic|Beowx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zudwx4~1 , soc_inst|m0_1|u_logic|Zudwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kepwx4~1 , soc_inst|m0_1|u_logic|Kepwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A6ewx4~0 , soc_inst|m0_1|u_logic|A6ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jkmwx4~1 , soc_inst|m0_1|u_logic|Jkmwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|St0wx4 , soc_inst|m0_1|u_logic|St0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hr0wx4~0 , soc_inst|m0_1|u_logic|Hr0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cs0wx4~1 , soc_inst|m0_1|u_logic|Cs0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cs0wx4~0 , soc_inst|m0_1|u_logic|Cs0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mq0wx4~0 , soc_inst|m0_1|u_logic|Mq0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Or0wx4~0 , soc_inst|m0_1|u_logic|Or0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mq0wx4~1 , soc_inst|m0_1|u_logic|Mq0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mq0wx4~2 , soc_inst|m0_1|u_logic|Mq0wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Psn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Psn2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H1qwx4~0 , soc_inst|m0_1|u_logic|H1qwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F473z4 , soc_inst|m0_1|u_logic|F473z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H1qwx4~1 , soc_inst|m0_1|u_logic|H1qwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H1qwx4 , soc_inst|m0_1|u_logic|H1qwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tvn2z4 , soc_inst|m0_1|u_logic|Tvn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jf92z4~0 , soc_inst|m0_1|u_logic|Jf92z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Md92z4~0 , soc_inst|m0_1|u_logic|Md92z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V223z4~DUPLICATE , soc_inst|m0_1|u_logic|V223z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Md92z4~1 , soc_inst|m0_1|u_logic|Md92z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Md92z4~2 , soc_inst|m0_1|u_logic|Md92z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Md92z4~3 , soc_inst|m0_1|u_logic|Md92z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qs0wx4~0 , soc_inst|m0_1|u_logic|Qs0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fq0wx4 , soc_inst|m0_1|u_logic|Fq0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address[16] , soc_inst|pix1|word_address[16], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a240 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a240, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a232 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a232, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a224 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a224, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a248 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a248, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a176 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a176, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a168 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a168, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a160 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a160, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a184 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a184, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a208 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a208, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a216 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a216, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a200 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a200, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a192 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a192, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a128 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a128, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a136 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a136, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a152 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a152, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a144 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a144, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[1]~28 , soc_inst|interconnect_1|HRDATA[1]~28, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~4 , soc_inst|m0_1|u_logic|hwdata_o~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a296 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a296, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a288 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a288, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l6_w0_n0_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l6_w0_n0_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a272 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a272, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a264 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a264, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a280 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a280, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a256 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a256, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[0]~59 , soc_inst|interconnect_1|HRDATA[0]~59, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory~1 , soc_inst|pix1|memory~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[39] , soc_inst|pix1|memory_rtl_0_bypass[39], de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|DataValid~1 , soc_inst|switches_1|DataValid~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|DataValid[0] , soc_inst|switches_1|DataValid[0], de1_soc_wrapper, 1
-instance = comp, \SW[0]~input , SW[0]~input, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[0][0] , soc_inst|switches_1|switch_store[0][0], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[0]~26 , soc_inst|ram_1|data_to_memory[0]~26, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ny3wx4~1 , soc_inst|m0_1|u_logic|Ny3wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[24]~25 , soc_inst|ram_1|data_to_memory[24]~25, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[0]~49 , soc_inst|interconnect_1|HRDATA[0]~49, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[0]~58 , soc_inst|interconnect_1|HRDATA[0]~58, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a72 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a72, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a104 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a104, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a40 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a40, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a112 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a112, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a48 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a48, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a80 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a80, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a120 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a120, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a56 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a56, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a88 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a88, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a96 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a96, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a64 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a64, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[0]~50 , soc_inst|interconnect_1|HRDATA[0]~50, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tlyvx4~1 , soc_inst|m0_1|u_logic|Tlyvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I21wx4 , soc_inst|m0_1|u_logic|I21wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE , soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~77 , soc_inst|m0_1|u_logic|Add2~77, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~73 , soc_inst|m0_1|u_logic|Add2~73, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~105 , soc_inst|m0_1|u_logic|Add2~105, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dkx2z4 , soc_inst|m0_1|u_logic|Dkx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qjhvx4~0 , soc_inst|m0_1|u_logic|Qjhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qjhvx4~1 , soc_inst|m0_1|u_logic|Qjhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dkx2z4~DUPLICATE , soc_inst|m0_1|u_logic|Dkx2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jjhvx4~0 , soc_inst|m0_1|u_logic|Jjhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jjhvx4~1 , soc_inst|m0_1|u_logic|Jjhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jjhvx4~2 , soc_inst|m0_1|u_logic|Jjhvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Plx2z4 , soc_inst|m0_1|u_logic|Plx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bv0wx4 , soc_inst|m0_1|u_logic|Bv0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[32]~feeder , soc_inst|pix1|memory_rtl_0_bypass[32]~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[32] , soc_inst|pix1|memory_rtl_0_bypass[32], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[30] , soc_inst|pix1|memory_rtl_0_bypass[30], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[33] , soc_inst|pix1|memory_rtl_0_bypass[33], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[34] , soc_inst|pix1|memory_rtl_0_bypass[34], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[31] , soc_inst|pix1|memory_rtl_0_bypass[31], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[29]~feeder , soc_inst|pix1|memory_rtl_0_bypass[29]~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[29] , soc_inst|pix1|memory_rtl_0_bypass[29], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory~10 , soc_inst|pix1|memory~10, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[24] , soc_inst|pix1|memory_rtl_0_bypass[24], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[27] , soc_inst|pix1|memory_rtl_0_bypass[27], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[26]~feeder , soc_inst|pix1|memory_rtl_0_bypass[26]~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[26] , soc_inst|pix1|memory_rtl_0_bypass[26], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[23] , soc_inst|pix1|memory_rtl_0_bypass[23], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[25] , soc_inst|pix1|memory_rtl_0_bypass[25], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[28] , soc_inst|pix1|memory_rtl_0_bypass[28], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory~11 , soc_inst|pix1|memory~11, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[17]~feeder , soc_inst|pix1|memory_rtl_0_bypass[17]~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[17] , soc_inst|pix1|memory_rtl_0_bypass[17], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[18] , soc_inst|pix1|memory_rtl_0_bypass[18], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[21] , soc_inst|pix1|memory_rtl_0_bypass[21], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[20] , soc_inst|pix1|memory_rtl_0_bypass[20], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[19] , soc_inst|pix1|memory_rtl_0_bypass[19], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[22] , soc_inst|pix1|memory_rtl_0_bypass[22], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory~12 , soc_inst|pix1|memory~12, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory~16 , soc_inst|pix1|memory~16, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[1]~29 , soc_inst|interconnect_1|HRDATA[1]~29, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[40] , soc_inst|pix1|memory_rtl_0_bypass[40], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory~2 , soc_inst|pix1|memory~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a97 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a97, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a65 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a65, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w1_n0_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w1_n0_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a89 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a89, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a57 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a57, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a121 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a121, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w1_n0_mux_dataout~3 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w1_n0_mux_dataout~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a49 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a49, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a113 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a113, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a81 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a81, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w1_n0_mux_dataout~2 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w1_n0_mux_dataout~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a41 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a41, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a105 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a105, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a73 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a73, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w1_n0_mux_dataout~1 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w1_n0_mux_dataout~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w1_n0_mux_dataout~4 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w1_n0_mux_dataout~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U5r2z4 , soc_inst|m0_1|u_logic|U5r2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bn53z4 , soc_inst|m0_1|u_logic|Bn53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E1r2z4 , soc_inst|m0_1|u_logic|E1r2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T9v2z4~feeder , soc_inst|m0_1|u_logic|T9v2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T9v2z4 , soc_inst|m0_1|u_logic|T9v2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S2r2z4 , soc_inst|m0_1|u_logic|S2r2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ka93z4 , soc_inst|m0_1|u_logic|Ka93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ixxwx4~0 , soc_inst|m0_1|u_logic|Ixxwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G4r2z4 , soc_inst|m0_1|u_logic|G4r2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kw63z4 , soc_inst|m0_1|u_logic|Kw63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T583z4~feeder , soc_inst|m0_1|u_logic|T583z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T583z4 , soc_inst|m0_1|u_logic|T583z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K0u2z4 , soc_inst|m0_1|u_logic|K0u2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ixxwx4~1 , soc_inst|m0_1|u_logic|Ixxwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ixxwx4 , soc_inst|m0_1|u_logic|Ixxwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I7r2z4~DUPLICATE , soc_inst|m0_1|u_logic|I7r2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sd43z4 , soc_inst|m0_1|u_logic|Sd43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Am5wx4~3 , soc_inst|m0_1|u_logic|Am5wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nt03z4 , soc_inst|m0_1|u_logic|Nt03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J433z4 , soc_inst|m0_1|u_logic|J433z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bjkvx4~0 , soc_inst|m0_1|u_logic|Bjkvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bjkvx4~1 , soc_inst|m0_1|u_logic|Bjkvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ovc3z4 , soc_inst|m0_1|u_logic|Ovc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Av13z4 , soc_inst|m0_1|u_logic|Av13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Am5wx4~2 , soc_inst|m0_1|u_logic|Am5wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Am5wx4~0 , soc_inst|m0_1|u_logic|Am5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Am5wx4~1 , soc_inst|m0_1|u_logic|Am5wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[4] , soc_inst|m0_1|u_logic|hwdata_o[4], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a297 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a297, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a289 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a289, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l6_w1_n0_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l6_w1_n0_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a273 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a273, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a265 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a265, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a257 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a257, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a281 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a281, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w1_n8_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w1_n8_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l6_w1_n0_mux_dataout~1 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l6_w1_n0_mux_dataout~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a185 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a185, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a153 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a153, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a249 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a249, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a217 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a217, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w1_n1_mux_dataout~3 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w1_n1_mux_dataout~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a145 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a145, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a177 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a177, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a241 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a241, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a209 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a209, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w1_n1_mux_dataout~2 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w1_n1_mux_dataout~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a137 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a137, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a169 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a169, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a201 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a201, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a233 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a233, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w1_n1_mux_dataout~1 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w1_n1_mux_dataout~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a161 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a161, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a193 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a193, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a225 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a225, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a129 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a129, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w1_n1_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w1_n1_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w1_n1_mux_dataout~4 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w1_n1_mux_dataout~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l6_w1_n0_mux_dataout~2 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l6_w1_n0_mux_dataout~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[1]~30 , soc_inst|interconnect_1|HRDATA[1]~30, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rhfwx4~2 , soc_inst|m0_1|u_logic|Rhfwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C2rvx4~1 , soc_inst|m0_1|u_logic|C2rvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[12]~18 , soc_inst|m0_1|u_logic|hwdata_o[12]~18, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~25 , soc_inst|m0_1|u_logic|Add5~25, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Do8wx4~1 , soc_inst|m0_1|u_logic|Do8wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Do8wx4~2 , soc_inst|m0_1|u_logic|Do8wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Do8wx4~3 , soc_inst|m0_1|u_logic|Do8wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Do8wx4~4 , soc_inst|m0_1|u_logic|Do8wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Phh2z4~0 , soc_inst|m0_1|u_logic|Phh2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sa13z4~DUPLICATE , soc_inst|m0_1|u_logic|Sa13z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bk23z4 , soc_inst|m0_1|u_logic|Bk23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H972z4~1 , soc_inst|m0_1|u_logic|H972z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pfz2z4 , soc_inst|m0_1|u_logic|Pfz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H972z4~2 , soc_inst|m0_1|u_logic|H972z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T253z4 , soc_inst|m0_1|u_logic|T253z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H972z4~0 , soc_inst|m0_1|u_logic|H972z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eb72z4~0 , soc_inst|m0_1|u_logic|Eb72z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H972z4~3 , soc_inst|m0_1|u_logic|H972z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A67wx4~0 , soc_inst|m0_1|u_logic|A67wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zwcvx4 , soc_inst|m0_1|u_logic|Zwcvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~77 , soc_inst|m0_1|u_logic|Add5~77, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~0 , soc_inst|m0_1|u_logic|N88wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[11]~3 , soc_inst|interconnect_1|HRDATA[11]~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[12]~13 , soc_inst|ram_1|data_to_memory[12]~13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[28]~14 , soc_inst|ram_1|data_to_memory[28]~14, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[12]~22 , soc_inst|interconnect_1|HRDATA[12]~22, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xrmwx4~0 , soc_inst|m0_1|u_logic|Xrmwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xrmwx4~1 , soc_inst|m0_1|u_logic|Xrmwx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Dpc3z4~0 , soc_inst|m0_1|u_logic|Dpc3z4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Dpc3z4 , soc_inst|m0_1|u_logic|Dpc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kwa2z4~0 , soc_inst|m0_1|u_logic|Kwa2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nzhvx4~0 , soc_inst|m0_1|u_logic|Nzhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oar2z4~DUPLICATE , soc_inst|m0_1|u_logic|Oar2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D4g3z4~0 , soc_inst|m0_1|u_logic|D4g3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D4g3z4 , soc_inst|m0_1|u_logic|D4g3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tib3z4~DUPLICATE , soc_inst|m0_1|u_logic|Tib3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE , soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vgs2z4~DUPLICATE , soc_inst|m0_1|u_logic|Vgs2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zxvwx4~0 , soc_inst|m0_1|u_logic|Zxvwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zxvwx4~1 , soc_inst|m0_1|u_logic|Zxvwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pab3z4 , soc_inst|m0_1|u_logic|Pab3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Arzwx4~0 , soc_inst|m0_1|u_logic|Arzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jsc3z4~0 , soc_inst|m0_1|u_logic|Jsc3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jsc3z4 , soc_inst|m0_1|u_logic|Jsc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jsa2z4~0 , soc_inst|m0_1|u_logic|Jsa2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Syhvx4~0 , soc_inst|m0_1|u_logic|Syhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lul2z4 , soc_inst|m0_1|u_logic|Lul2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tqc3z4~0 , soc_inst|m0_1|u_logic|Tqc3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tqc3z4 , soc_inst|m0_1|u_logic|Tqc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4 , soc_inst|m0_1|u_logic|Wa0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[22]~3 , soc_inst|m0_1|u_logic|hwdata_o[22]~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dks2z4~DUPLICATE , soc_inst|m0_1|u_logic|Dks2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sa13z4 , soc_inst|m0_1|u_logic|Sa13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Isi2z4~feeder , soc_inst|m0_1|u_logic|Isi2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Isi2z4 , soc_inst|m0_1|u_logic|Isi2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~0 , soc_inst|m0_1|u_logic|Nd3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Glj2z4 , soc_inst|m0_1|u_logic|Glj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O3ivx4~0 , soc_inst|m0_1|u_logic|O3ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O3ivx4~1 , soc_inst|m0_1|u_logic|O3ivx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V1l2z4 , soc_inst|m0_1|u_logic|V1l2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~1 , soc_inst|m0_1|u_logic|Nd3wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Koj2z4 , soc_inst|m0_1|u_logic|Koj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kt33z4 , soc_inst|m0_1|u_logic|Kt33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~2 , soc_inst|m0_1|u_logic|Nd3wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T253z4 , soc_inst|m0_1|u_logic|T253z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE , soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~3 , soc_inst|m0_1|u_logic|Nd3wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X2j2z4 , soc_inst|m0_1|u_logic|X2j2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cgt2z4 , soc_inst|m0_1|u_logic|Cgt2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lpu2z4 , soc_inst|m0_1|u_logic|Lpu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~6 , soc_inst|m0_1|u_logic|Nd3wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cc63z4~feeder , soc_inst|m0_1|u_logic|Cc63z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cc63z4 , soc_inst|m0_1|u_logic|Cc63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xti2z4 , soc_inst|m0_1|u_logic|Xti2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~5 , soc_inst|m0_1|u_logic|Nd3wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~7 , soc_inst|m0_1|u_logic|Nd3wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yd03z4~DUPLICATE , soc_inst|m0_1|u_logic|Yd03z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pfz2z4 , soc_inst|m0_1|u_logic|Pfz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ehz2z4 , soc_inst|m0_1|u_logic|Ehz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~4 , soc_inst|m0_1|u_logic|Nd3wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4 , soc_inst|m0_1|u_logic|Nd3wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~0 , soc_inst|m0_1|u_logic|hwdata_o~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ux4wx4~0 , soc_inst|m0_1|u_logic|Ux4wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE , soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ft73z4 , soc_inst|m0_1|u_logic|Ft73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T31xx4~0 , soc_inst|m0_1|u_logic|T31xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wnt2z4~DUPLICATE , soc_inst|m0_1|u_logic|Wnt2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fxu2z4 , soc_inst|m0_1|u_logic|Fxu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R91xx4~0 , soc_inst|m0_1|u_logic|R91xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~0 , soc_inst|m0_1|u_logic|O7zvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vr23z4 , soc_inst|m0_1|u_logic|Vr23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Na53z4~DUPLICATE , soc_inst|m0_1|u_logic|Na53z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~3 , soc_inst|m0_1|u_logic|O7zvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J5i3z4 , soc_inst|m0_1|u_logic|J5i3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y6i3z4 , soc_inst|m0_1|u_logic|Y6i3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~5 , soc_inst|m0_1|u_logic|O7zvx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E143z4 , soc_inst|m0_1|u_logic|E143z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~2 , soc_inst|m0_1|u_logic|O7zvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gto2z4~DUPLICATE , soc_inst|m0_1|u_logic|Gto2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lhd3z4 , soc_inst|m0_1|u_logic|Lhd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jxs2z4 , soc_inst|m0_1|u_logic|Jxs2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aqp2z4 , soc_inst|m0_1|u_logic|Aqp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I2uvx4~0 , soc_inst|m0_1|u_logic|I2uvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B1a3z4 , soc_inst|m0_1|u_logic|B1a3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Repwx4~0 , soc_inst|m0_1|u_logic|Repwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Repwx4~1 , soc_inst|m0_1|u_logic|Repwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6l2z4 , soc_inst|m0_1|u_logic|Q6l2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Repwx4~2 , soc_inst|m0_1|u_logic|Repwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ncpwx4~0 , soc_inst|m0_1|u_logic|Ncpwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[14]~30 , soc_inst|ram_1|data_to_memory[14]~30, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[30]~29 , soc_inst|ram_1|data_to_memory[30]~29, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[30]~53 , soc_inst|interconnect_1|HRDATA[30]~53, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J7ewx4~0 , soc_inst|m0_1|u_logic|J7ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A9iwx4~0 , soc_inst|m0_1|u_logic|A9iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E9zvx4~0 , soc_inst|m0_1|u_logic|E9zvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[0][6] , soc_inst|switches_1|switch_store[0][6], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a294 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a294, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l6_w6_n0_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l6_w6_n0_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a278 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a278, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a262 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a262, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a270 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a270, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a286 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a286, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w6_n8_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w6_n8_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[6]~69 , soc_inst|interconnect_1|HRDATA[6]~69, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a254 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a254, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a238 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a238, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a230 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a230, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a246 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a246, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w6_n1_mux_dataout~3 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w6_n1_mux_dataout~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a166 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a166, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a190 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a190, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a182 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a182, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a174 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a174, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w6_n1_mux_dataout~1 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w6_n1_mux_dataout~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a134 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a134, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a142 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a142, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a158 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a158, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a150 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a150, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w6_n1_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w6_n1_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a198 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a198, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a222 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a222, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a214 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a214, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a206 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a206, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w6_n1_mux_dataout~2 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w6_n1_mux_dataout~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w6_n1_mux_dataout~4 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w6_n1_mux_dataout~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory~7 , soc_inst|pix1|memory~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[45] , soc_inst|pix1|memory_rtl_0_bypass[45], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[6]~68 , soc_inst|interconnect_1|HRDATA[6]~68, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a94 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a94, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a126 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a126, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a62 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a62, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w6_n0_mux_dataout~3 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w6_n0_mux_dataout~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a110 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a110, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a46 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a46, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a78 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a78, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w6_n0_mux_dataout~1 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w6_n0_mux_dataout~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a38 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a38, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a102 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a102, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a70 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a70, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w6_n0_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w6_n0_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a54 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a54, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a86 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a86, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a118 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a118, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w6_n0_mux_dataout~2 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w6_n0_mux_dataout~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w6_n0_mux_dataout~4 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w6_n0_mux_dataout~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[6]~54 , soc_inst|interconnect_1|HRDATA[6]~54, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[6]~55 , soc_inst|interconnect_1|HRDATA[6]~55, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E9zvx4~1 , soc_inst|m0_1|u_logic|E9zvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R7iwx4~1 , soc_inst|m0_1|u_logic|R7iwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ovcvx4 , soc_inst|m0_1|u_logic|Ovcvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dih2z4~0 , soc_inst|m0_1|u_logic|Dih2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~117 , soc_inst|m0_1|u_logic|Add5~117, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~9 , soc_inst|m0_1|u_logic|Add5~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wj82z4~0 , soc_inst|m0_1|u_logic|Wj82z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ug43z4 , soc_inst|m0_1|u_logic|Ug43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh82z4~0 , soc_inst|m0_1|u_logic|Zh82z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L733z4 , soc_inst|m0_1|u_logic|L733z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh82z4~1 , soc_inst|m0_1|u_logic|Zh82z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vzz2z4 , soc_inst|m0_1|u_logic|Vzz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh82z4~2 , soc_inst|m0_1|u_logic|Zh82z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh82z4~3 , soc_inst|m0_1|u_logic|Zh82z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cymwx4~3 , soc_inst|m0_1|u_logic|Cymwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ecp2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ecp2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bjxwx4~1 , soc_inst|m0_1|u_logic|Bjxwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE , soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A9p2z4 , soc_inst|m0_1|u_logic|A9p2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bjxwx4~0 , soc_inst|m0_1|u_logic|Bjxwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bjxwx4 , soc_inst|m0_1|u_logic|Bjxwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jtdwx4~0 , soc_inst|m0_1|u_logic|Jtdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jtdwx4~1 , soc_inst|m0_1|u_logic|Jtdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[13]~22 , soc_inst|ram_1|data_to_memory[13]~22, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[13]~46 , soc_inst|interconnect_1|HRDATA[13]~46, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T5g3z4 , soc_inst|m0_1|u_logic|T5g3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Twmwx4~0 , soc_inst|m0_1|u_logic|Twmwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Twmwx4~1 , soc_inst|m0_1|u_logic|Twmwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Twmwx4~2 , soc_inst|m0_1|u_logic|Twmwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~11 , soc_inst|m0_1|u_logic|hwdata_o~11, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[29]~23 , soc_inst|ram_1|data_to_memory[29]~23, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ka83z4 , soc_inst|m0_1|u_logic|Ka83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ebh3z4 , soc_inst|m0_1|u_logic|Ebh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B173z4~DUPLICATE , soc_inst|m0_1|u_logic|B173z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bf93z4 , soc_inst|m0_1|u_logic|Bf93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~6 , soc_inst|m0_1|u_logic|Ce0wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B5u2z4~DUPLICATE , soc_inst|m0_1|u_logic|B5u2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kev2z4 , soc_inst|m0_1|u_logic|Kev2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~7 , soc_inst|m0_1|u_logic|Ce0wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~8 , soc_inst|m0_1|u_logic|Ce0wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4 , soc_inst|m0_1|u_logic|Ce0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[21]~14 , soc_inst|m0_1|u_logic|hwdata_o[21]~14, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[21]~24 , soc_inst|ram_1|data_to_memory[21]~24, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hxmwx4~0 , soc_inst|m0_1|u_logic|Hxmwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mouwx4~0 , soc_inst|m0_1|u_logic|Mouwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F5ewx4 , soc_inst|m0_1|u_logic|F5ewx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hxmwx4~1 , soc_inst|m0_1|u_logic|Hxmwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qe0wx4~0 , soc_inst|m0_1|u_logic|Qe0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Anq2z4~feeder , soc_inst|m0_1|u_logic|Anq2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Anq2z4 , soc_inst|m0_1|u_logic|Anq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bf93z4~DUPLICATE , soc_inst|m0_1|u_logic|Bf93z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D9uwx4~1 , soc_inst|m0_1|u_logic|D9uwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B173z4 , soc_inst|m0_1|u_logic|B173z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eqq2z4 , soc_inst|m0_1|u_logic|Eqq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D9uwx4~0 , soc_inst|m0_1|u_logic|D9uwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B5u2z4 , soc_inst|m0_1|u_logic|B5u2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D9uwx4~2 , soc_inst|m0_1|u_logic|D9uwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Poq2z4 , soc_inst|m0_1|u_logic|Poq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D9uwx4~3 , soc_inst|m0_1|u_logic|D9uwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D9uwx4 , soc_inst|m0_1|u_logic|D9uwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tch3z4 , soc_inst|m0_1|u_logic|Tch3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A8h3z4~DUPLICATE , soc_inst|m0_1|u_logic|A8h3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P9h3z4 , soc_inst|m0_1|u_logic|P9h3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lo82z4~2 , soc_inst|m0_1|u_logic|Lo82z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ji43z4 , soc_inst|m0_1|u_logic|Ji43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sr53z4 , soc_inst|m0_1|u_logic|Sr53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lo82z4~0 , soc_inst|m0_1|u_logic|Lo82z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iq82z4~0 , soc_inst|m0_1|u_logic|Iq82z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A933z4 , soc_inst|m0_1|u_logic|A933z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lo82z4~1 , soc_inst|m0_1|u_logic|Lo82z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lo82z4~3 , soc_inst|m0_1|u_logic|Lo82z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lf0wx4~0 , soc_inst|m0_1|u_logic|Lf0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Je0wx4~0 , soc_inst|m0_1|u_logic|Je0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mc0wx4~0 , soc_inst|m0_1|u_logic|Mc0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mc0wx4~1 , soc_inst|m0_1|u_logic|Mc0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mc0wx4~2 , soc_inst|m0_1|u_logic|Mc0wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rz13z4 , soc_inst|m0_1|u_logic|Rz13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~0 , soc_inst|m0_1|u_logic|Ce0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A933z4~DUPLICATE , soc_inst|m0_1|u_logic|A933z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~3 , soc_inst|m0_1|u_logic|Ce0wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Poq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Poq2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~1 , soc_inst|m0_1|u_logic|Ce0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~2 , soc_inst|m0_1|u_logic|Ce0wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A8h3z4 , soc_inst|m0_1|u_logic|A8h3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~4 , soc_inst|m0_1|u_logic|Ce0wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D03xx4~0 , soc_inst|m0_1|u_logic|D03xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~5 , soc_inst|m0_1|u_logic|Ce0wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U6awx4~0 , soc_inst|m0_1|u_logic|U6awx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U6awx4~1 , soc_inst|m0_1|u_logic|U6awx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~25 , soc_inst|m0_1|u_logic|Add5~25, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~41 , soc_inst|m0_1|u_logic|Add2~41, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gehvx4~1 , soc_inst|m0_1|u_logic|Gehvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gehvx4~0 , soc_inst|m0_1|u_logic|Gehvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gehvx4~2 , soc_inst|m0_1|u_logic|Gehvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Foe3z4 , soc_inst|m0_1|u_logic|Foe3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~37 , soc_inst|m0_1|u_logic|Add3~37, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fc0wx4 , soc_inst|m0_1|u_logic|Fc0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B5kvx4~0 , soc_inst|m0_1|u_logic|B5kvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Llq2z4 , soc_inst|m0_1|u_logic|Llq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N90wx4~0 , soc_inst|m0_1|u_logic|N90wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~1 , soc_inst|m0_1|u_logic|Add5~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Do8wx4~2 , soc_inst|m0_1|u_logic|Do8wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Locvx4 , soc_inst|m0_1|u_logic|Locvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J4awx4~0 , soc_inst|m0_1|u_logic|J4awx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T2pvx4~0 , soc_inst|m0_1|u_logic|T2pvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ojnvx4~0 , soc_inst|m0_1|u_logic|Ojnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O3pvx4 , soc_inst|m0_1|u_logic|O3pvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F9pvx4~1 , soc_inst|m0_1|u_logic|F9pvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F9pvx4~2 , soc_inst|m0_1|u_logic|F9pvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE , soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C34wx4~0 , soc_inst|m0_1|u_logic|C34wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P2a3z4 , soc_inst|m0_1|u_logic|P2a3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zad3z4 , soc_inst|m0_1|u_logic|Zad3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kkb3z4 , soc_inst|m0_1|u_logic|Kkb3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wva2z4~0 , soc_inst|m0_1|u_logic|Wva2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~3 , soc_inst|m0_1|u_logic|Vsywx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bjd3z4 , soc_inst|m0_1|u_logic|Bjd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pguvx4~0 , soc_inst|m0_1|u_logic|Pguvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~0 , soc_inst|m0_1|u_logic|Vsywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bsvwx4~0 , soc_inst|m0_1|u_logic|Bsvwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xrmwx4~2 , soc_inst|m0_1|u_logic|Xrmwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B2uvx4~1 , soc_inst|m0_1|u_logic|B2uvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U1uvx4 , soc_inst|m0_1|u_logic|U1uvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Adt2z4 , soc_inst|m0_1|u_logic|Adt2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Oxuvx4~0 , soc_inst|m0_1|u_logic|Oxuvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bmb3z4 , soc_inst|m0_1|u_logic|Bmb3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tib3z4 , soc_inst|m0_1|u_logic|Tib3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jruvx4~0 , soc_inst|m0_1|u_logic|Jruvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~2 , soc_inst|m0_1|u_logic|Vsywx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Douvx4~0 , soc_inst|m0_1|u_logic|Douvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H8l2z4 , soc_inst|m0_1|u_logic|H8l2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T7d3z4 , soc_inst|m0_1|u_logic|T7d3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iuuvx4~0 , soc_inst|m0_1|u_logic|Iuuvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Usl2z4 , soc_inst|m0_1|u_logic|Usl2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~5 , soc_inst|m0_1|u_logic|Vsywx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Azs2z4 , soc_inst|m0_1|u_logic|Azs2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tqs2z4 , soc_inst|m0_1|u_logic|Tqs2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cps2z4 , soc_inst|m0_1|u_logic|Cps2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~1 , soc_inst|m0_1|u_logic|Vsywx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qrp2z4 , soc_inst|m0_1|u_logic|Qrp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~4 , soc_inst|m0_1|u_logic|Vsywx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~6 , soc_inst|m0_1|u_logic|Vsywx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xtywx4~0 , soc_inst|m0_1|u_logic|Xtywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ypa2z4~1 , soc_inst|m0_1|u_logic|Ypa2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C34wx4 , soc_inst|m0_1|u_logic|C34wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zx3wx4~0 , soc_inst|m0_1|u_logic|Zx3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uyv2z4 , soc_inst|m0_1|u_logic|Uyv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H6mvx4~0 , soc_inst|m0_1|u_logic|H6mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE , soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X9n2z4 , soc_inst|m0_1|u_logic|X9n2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S4pwx4~0 , soc_inst|m0_1|u_logic|S4pwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hzywx4~0 , soc_inst|m0_1|u_logic|Hzywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tyywx4~0 , soc_inst|m0_1|u_logic|Tyywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K1ivx4~0 , soc_inst|m0_1|u_logic|K1ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N7c3z4 , soc_inst|m0_1|u_logic|N7c3z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|R1ivx4~0 , soc_inst|m0_1|u_logic|R1ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ipb3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ipb3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fhc3z4 , soc_inst|m0_1|u_logic|Fhc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ipb3z4 , soc_inst|m0_1|u_logic|Ipb3z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Fhc3z4~0 , soc_inst|m0_1|u_logic|Fhc3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fhc3z4~DUPLICATE , soc_inst|m0_1|u_logic|Fhc3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uic3z4~0 , soc_inst|m0_1|u_logic|Uic3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uic3z4 , soc_inst|m0_1|u_logic|Uic3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE , soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE , soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wzvwx4~0 , soc_inst|m0_1|u_logic|Wzvwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wzvwx4~1 , soc_inst|m0_1|u_logic|Wzvwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jjuwx4~0 , soc_inst|m0_1|u_logic|Jjuwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F4c3z4 , soc_inst|m0_1|u_logic|F4c3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D1ivx4~0 , soc_inst|m0_1|u_logic|D1ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE , soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jkc3z4~0 , soc_inst|m0_1|u_logic|Jkc3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jkc3z4 , soc_inst|m0_1|u_logic|Jkc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ylc3z4~0 , soc_inst|m0_1|u_logic|Ylc3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ylc3z4 , soc_inst|m0_1|u_logic|Ylc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z4l2z4 , soc_inst|m0_1|u_logic|Z4l2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W0ivx4~0 , soc_inst|m0_1|u_logic|W0ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X0c3z4 , soc_inst|m0_1|u_logic|X0c3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G8n2z4~DUPLICATE , soc_inst|m0_1|u_logic|G8n2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A50xx4~0 , soc_inst|m0_1|u_logic|A50xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ayzwx4 , soc_inst|m0_1|u_logic|Ayzwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jjuwx4~1 , soc_inst|m0_1|u_logic|Jjuwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wvzwx4~0 , soc_inst|m0_1|u_logic|Wvzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE , soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G10xx4~0 , soc_inst|m0_1|u_logic|G10xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G10xx4~1 , soc_inst|m0_1|u_logic|G10xx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I90xx4~1 , soc_inst|m0_1|u_logic|I90xx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I90xx4~2 , soc_inst|m0_1|u_logic|I90xx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N10xx4~0 , soc_inst|m0_1|u_logic|N10xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F40xx4~0 , soc_inst|m0_1|u_logic|F40xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Adzwx4~0 , soc_inst|m0_1|u_logic|Adzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tb0xx4~0 , soc_inst|m0_1|u_logic|Tb0xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B90xx4~0 , soc_inst|m0_1|u_logic|B90xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hdzwx4~0 , soc_inst|m0_1|u_logic|Hdzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A6zwx4~0 , soc_inst|m0_1|u_logic|A6zwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kizwx4~0 , soc_inst|m0_1|u_logic|Kizwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dizwx4~0 , soc_inst|m0_1|u_logic|Dizwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tqzwx4~0 , soc_inst|m0_1|u_logic|Tqzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fczwx4~0 , soc_inst|m0_1|u_logic|Fczwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE , soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H2f3z4 , soc_inst|m0_1|u_logic|H2f3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[8]~6 , soc_inst|m0_1|u_logic|hwdata_o[8]~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H2f3z4~0 , soc_inst|m0_1|u_logic|H2f3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H2f3z4~DUPLICATE , soc_inst|m0_1|u_logic|H2f3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE , soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kss2z4~0 , soc_inst|m0_1|u_logic|Kss2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE , soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Whzwx4~0 , soc_inst|m0_1|u_logic|Whzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Whzwx4~1 , soc_inst|m0_1|u_logic|Whzwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qlzwx4~0 , soc_inst|m0_1|u_logic|Qlzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bus2z4~DUPLICATE , soc_inst|m0_1|u_logic|Bus2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jxs2z4~DUPLICATE , soc_inst|m0_1|u_logic|Jxs2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Svs2z4 , soc_inst|m0_1|u_logic|Svs2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gyvwx4~0 , soc_inst|m0_1|u_logic|Gyvwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nnc3z4~0 , soc_inst|m0_1|u_logic|Nnc3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nnc3z4 , soc_inst|m0_1|u_logic|Nnc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ipn2z4 , soc_inst|m0_1|u_logic|Ipn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B0ivx4~0 , soc_inst|m0_1|u_logic|B0ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gyvwx4~1 , soc_inst|m0_1|u_logic|Gyvwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yizwx4~0 , soc_inst|m0_1|u_logic|Yizwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fjzwx4~0 , soc_inst|m0_1|u_logic|Fjzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B6pwx4~0 , soc_inst|m0_1|u_logic|B6pwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mczwx4~0 , soc_inst|m0_1|u_logic|Mczwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B6pwx4~1 , soc_inst|m0_1|u_logic|B6pwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B6pwx4~3 , soc_inst|m0_1|u_logic|B6pwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Clzwx4~0 , soc_inst|m0_1|u_logic|Clzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ihzwx4~0 , soc_inst|m0_1|u_logic|Ihzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T5zwx4~0 , soc_inst|m0_1|u_logic|T5zwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B6pwx4~2 , soc_inst|m0_1|u_logic|B6pwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H6zwx4~0 , soc_inst|m0_1|u_logic|H6zwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G2zwx4~0 , soc_inst|m0_1|u_logic|G2zwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ozywx4~0 , soc_inst|m0_1|u_logic|Ozywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pwywx4~0 , soc_inst|m0_1|u_logic|Pwywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wwywx4~0 , soc_inst|m0_1|u_logic|Wwywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J0zwx4~0 , soc_inst|m0_1|u_logic|J0zwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jzzwx4~0 , soc_inst|m0_1|u_logic|Jzzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qzzwx4~0 , soc_inst|m0_1|u_logic|Qzzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Czzwx4~0 , soc_inst|m0_1|u_logic|Czzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fb0xx4~0 , soc_inst|m0_1|u_logic|Fb0xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE , soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S00xx4~0 , soc_inst|m0_1|u_logic|S00xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kbzwx4~0 , soc_inst|m0_1|u_logic|Kbzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R4zwx4~0 , soc_inst|m0_1|u_logic|R4zwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vzywx4~0 , soc_inst|m0_1|u_logic|Vzywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vzywx4~1 , soc_inst|m0_1|u_logic|Vzywx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gvywx4~0 , soc_inst|m0_1|u_logic|Gvywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E5owx4~0 , soc_inst|m0_1|u_logic|E5owx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C0zwx4~0 , soc_inst|m0_1|u_logic|C0zwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pjyvx4~0 , soc_inst|m0_1|u_logic|Pjyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F9pvx4~0 , soc_inst|m0_1|u_logic|F9pvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ojnvx4~1 , soc_inst|m0_1|u_logic|Ojnvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J4pvx4~0 , soc_inst|m0_1|u_logic|J4pvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J4pvx4~1 , soc_inst|m0_1|u_logic|J4pvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ojnvx4~2 , soc_inst|m0_1|u_logic|Ojnvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z7i2z4 , soc_inst|m0_1|u_logic|Z7i2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vjnvx4~0 , soc_inst|m0_1|u_logic|Vjnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~33 , soc_inst|m0_1|u_logic|Add3~33, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~113 , soc_inst|m0_1|u_logic|Add3~113, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~109 , soc_inst|m0_1|u_logic|Add3~109, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y1pvx4 , soc_inst|m0_1|u_logic|Y1pvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vjnvx4~1 , soc_inst|m0_1|u_logic|Vjnvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q7j2z4 , soc_inst|m0_1|u_logic|Q7j2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B6j2z4 , soc_inst|m0_1|u_logic|B6j2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Joi3z4 , soc_inst|m0_1|u_logic|Joi3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Umi3z4 , soc_inst|m0_1|u_logic|Umi3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M782z4~0 , soc_inst|m0_1|u_logic|M782z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sz23z4 , soc_inst|m0_1|u_logic|Sz23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jq13z4 , soc_inst|m0_1|u_logic|Jq13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P582z4~1 , soc_inst|m0_1|u_logic|P582z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ki53z4~DUPLICATE , soc_inst|m0_1|u_logic|Ki53z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B943z4 , soc_inst|m0_1|u_logic|B943z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P582z4~0 , soc_inst|m0_1|u_logic|P582z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qji3z4 , soc_inst|m0_1|u_logic|Qji3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fli3z4 , soc_inst|m0_1|u_logic|Fli3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P582z4~2 , soc_inst|m0_1|u_logic|P582z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P582z4~3 , soc_inst|m0_1|u_logic|P582z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gtnvx4~0 , soc_inst|m0_1|u_logic|Gtnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ancvx4 , soc_inst|m0_1|u_logic|Ancvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M4j2z4 , soc_inst|m0_1|u_logic|M4j2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bf9wx4~0 , soc_inst|m0_1|u_logic|Bf9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ilf3z4 , soc_inst|m0_1|u_logic|Ilf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bc82z4~1 , soc_inst|m0_1|u_logic|Bc82z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ftf3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ftf3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bc82z4~2 , soc_inst|m0_1|u_logic|Bc82z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bc82z4~3 , soc_inst|m0_1|u_logic|Bc82z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bc82z4~0 , soc_inst|m0_1|u_logic|Bc82z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bc82z4~4 , soc_inst|m0_1|u_logic|Bc82z4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ntnvx4~0 , soc_inst|m0_1|u_logic|Ntnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T7cwx4~0 , soc_inst|m0_1|u_logic|T7cwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~125 , soc_inst|m0_1|u_logic|Add5~125, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~121 , soc_inst|m0_1|u_logic|Add5~121, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~57 , soc_inst|m0_1|u_logic|Add5~57, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Do8wx4~3 , soc_inst|m0_1|u_logic|Do8wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I4dwx4~0 , soc_inst|m0_1|u_logic|I4dwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z4bwx4~0 , soc_inst|m0_1|u_logic|Z4bwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z4bwx4~1 , soc_inst|m0_1|u_logic|Z4bwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hnbwx4~0 , soc_inst|m0_1|u_logic|Hnbwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hnbwx4~1 , soc_inst|m0_1|u_logic|Hnbwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q713z4~DUPLICATE , soc_inst|m0_1|u_logic|Q713z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xhbwx4~1 , soc_inst|m0_1|u_logic|Xhbwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xhbwx4~2 , soc_inst|m0_1|u_logic|Xhbwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wd23z4 , soc_inst|m0_1|u_logic|Wd23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ow43z4 , soc_inst|m0_1|u_logic|Ow43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xhbwx4~3 , soc_inst|m0_1|u_logic|Xhbwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xhbwx4~0 , soc_inst|m0_1|u_logic|Xhbwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qrnvx4~0 , soc_inst|m0_1|u_logic|Qrnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Asbvx4 , soc_inst|m0_1|u_logic|Asbvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~29 , soc_inst|m0_1|u_logic|Add5~29, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~93 , soc_inst|m0_1|u_logic|Add5~93, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~101 , soc_inst|m0_1|u_logic|Add5~101, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~33 , soc_inst|m0_1|u_logic|Add5~33, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Do8wx4~0 , soc_inst|m0_1|u_logic|Do8wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Do8wx4~1 , soc_inst|m0_1|u_logic|Do8wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Do8wx4~4 , soc_inst|m0_1|u_logic|Do8wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Phh2z4~0 , soc_inst|m0_1|u_logic|Phh2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eb72z4~0 , soc_inst|m0_1|u_logic|Eb72z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T253z4~DUPLICATE , soc_inst|m0_1|u_logic|T253z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H972z4~0 , soc_inst|m0_1|u_logic|H972z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bk23z4 , soc_inst|m0_1|u_logic|Bk23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H972z4~1 , soc_inst|m0_1|u_logic|H972z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yd03z4 , soc_inst|m0_1|u_logic|Yd03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H972z4~2 , soc_inst|m0_1|u_logic|H972z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H972z4~3 , soc_inst|m0_1|u_logic|H972z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A67wx4~0 , soc_inst|m0_1|u_logic|A67wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zwcvx4 , soc_inst|m0_1|u_logic|Zwcvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~85 , soc_inst|m0_1|u_logic|Add5~85, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sscvx4 , soc_inst|m0_1|u_logic|Sscvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~89 , soc_inst|m0_1|u_logic|Add5~89, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~81 , soc_inst|m0_1|u_logic|Add5~81, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~0 , soc_inst|m0_1|u_logic|N88wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q9cwx4~0 , soc_inst|m0_1|u_logic|Q9cwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yqzvx4~0 , soc_inst|m0_1|u_logic|Yqzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fhc3z4 , soc_inst|m0_1|u_logic|Fhc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dewwx4~0 , soc_inst|m0_1|u_logic|Dewwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dewwx4~1 , soc_inst|m0_1|u_logic|Dewwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gtmwx4~0 , soc_inst|m0_1|u_logic|Gtmwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gtmwx4~1 , soc_inst|m0_1|u_logic|Gtmwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gtmwx4~2 , soc_inst|m0_1|u_logic|Gtmwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z2h3z4~DUPLICATE , soc_inst|m0_1|u_logic|Z2h3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[1][4] , soc_inst|switches_1|switch_store[1][4], de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sjvwx4~0 , soc_inst|m0_1|u_logic|Sjvwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ntmwx4~0 , soc_inst|m0_1|u_logic|Ntmwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ntmwx4~1 , soc_inst|m0_1|u_logic|Ntmwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wzpvx4~0 , soc_inst|m0_1|u_logic|Wzpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lsmwx4~0 , soc_inst|m0_1|u_logic|Lsmwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lsmwx4~1 , soc_inst|m0_1|u_logic|Lsmwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wzpvx4~1 , soc_inst|m0_1|u_logic|Wzpvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D47wx4~0 , soc_inst|m0_1|u_logic|D47wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zxpvx4~0 , soc_inst|m0_1|u_logic|Zxpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Phh2z4~1 , soc_inst|m0_1|u_logic|Phh2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S17wx4~0 , soc_inst|m0_1|u_logic|S17wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rhnvx4~0 , soc_inst|m0_1|u_logic|Rhnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rhnvx4~1 , soc_inst|m0_1|u_logic|Rhnvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Idk2z4 , soc_inst|m0_1|u_logic|Idk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mnawx4~0 , soc_inst|m0_1|u_logic|Mnawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C3qvx4~0 , soc_inst|m0_1|u_logic|C3qvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|N88wx4~15 , soc_inst|m0_1|u_logic|N88wx4~15, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ox1wx4~0 , soc_inst|m0_1|u_logic|Ox1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~2 , soc_inst|m0_1|u_logic|N88wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~3 , soc_inst|m0_1|u_logic|N88wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nf1wx4~0 , soc_inst|m0_1|u_logic|Nf1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rjzvx4~0 , soc_inst|m0_1|u_logic|Rjzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~4 , soc_inst|m0_1|u_logic|N88wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~5 , soc_inst|m0_1|u_logic|N88wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ox1wx4~1 , soc_inst|m0_1|u_logic|Ox1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wsawx4~0 , soc_inst|m0_1|u_logic|Wsawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~6 , soc_inst|m0_1|u_logic|N88wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cr1wx4~3 , soc_inst|m0_1|u_logic|Cr1wx4~3, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|G6d3z4~0 , soc_inst|m0_1|u_logic|G6d3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G6d3z4~1 , soc_inst|m0_1|u_logic|G6d3z4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|G6d3z4 , soc_inst|m0_1|u_logic|G6d3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[9]~6 , soc_inst|m0_1|u_logic|hwdata_o[9]~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kxe3z4 , soc_inst|m0_1|u_logic|Kxe3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aze3z4 , soc_inst|m0_1|u_logic|Aze3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~9 , soc_inst|m0_1|u_logic|Add0~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~77 , soc_inst|m0_1|u_logic|Add0~77, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[8]~7 , soc_inst|m0_1|u_logic|hwdata_o[8]~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W3f3z4 , soc_inst|m0_1|u_logic|W3f3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Armvx4~0 , soc_inst|m0_1|u_logic|Armvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M5f3z4 , soc_inst|m0_1|u_logic|M5f3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~25 , soc_inst|m0_1|u_logic|Add0~25, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tqmvx4~0 , soc_inst|m0_1|u_logic|Tqmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aze3z4~DUPLICATE , soc_inst|m0_1|u_logic|Aze3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE , soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mxa2z4~0 , soc_inst|m0_1|u_logic|Mxa2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I0ivx4~0 , soc_inst|m0_1|u_logic|I0ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y9l2z4 , soc_inst|m0_1|u_logic|Y9l2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vve3z4 , soc_inst|m0_1|u_logic|Vve3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vve3z4~0 , soc_inst|m0_1|u_logic|Vve3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE , soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Khfwx4~0 , soc_inst|m0_1|u_logic|Khfwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[8]~15 , soc_inst|interconnect_1|HRDATA[8]~15, de1_soc_wrapper, 1
+instance = comp, \SW[9]~input , SW[9]~input, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[0][9] , soc_inst|switches_1|switch_store[0][9], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[9]~16 , soc_inst|interconnect_1|HRDATA[9]~16, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Khfwx4~1 , soc_inst|m0_1|u_logic|Khfwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Khfwx4~2 , soc_inst|m0_1|u_logic|Khfwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Khfwx4~3 , soc_inst|m0_1|u_logic|Khfwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vq1wx4~0 , soc_inst|m0_1|u_logic|Vq1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vq1wx4~1 , soc_inst|m0_1|u_logic|Vq1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vq1wx4 , soc_inst|m0_1|u_logic|Vq1wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G6d3z4~1 , soc_inst|m0_1|u_logic|G6d3z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G6d3z4~DUPLICATE , soc_inst|m0_1|u_logic|G6d3z4~DUPLICATE, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Ffbwx4~0 , soc_inst|m0_1|u_logic|Ffbwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cr1wx4~2 , soc_inst|m0_1|u_logic|Cr1wx4~2, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Cr1wx4~0 , soc_inst|m0_1|u_logic|Cr1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ogbwx4~0 , soc_inst|m0_1|u_logic|Ogbwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cr1wx4~1 , soc_inst|m0_1|u_logic|Cr1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uozvx4~1 , soc_inst|m0_1|u_logic|Uozvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uozvx4~0 , soc_inst|m0_1|u_logic|Uozvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L9zvx4~0 , soc_inst|m0_1|u_logic|L9zvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L9zvx4~2 , soc_inst|m0_1|u_logic|L9zvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L9zvx4~1 , soc_inst|m0_1|u_logic|L9zvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L9zvx4 , soc_inst|m0_1|u_logic|L9zvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~13 , soc_inst|m0_1|u_logic|N88wx4~13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z80wx4~1 , soc_inst|m0_1|u_logic|Z80wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z80wx4~0 , soc_inst|m0_1|u_logic|Z80wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~19 , soc_inst|m0_1|u_logic|N88wx4~19, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~21 , soc_inst|m0_1|u_logic|N88wx4~21, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|N88wx4~8 , soc_inst|m0_1|u_logic|N88wx4~8, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|N88wx4~7 , soc_inst|m0_1|u_logic|N88wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~20 , soc_inst|m0_1|u_logic|N88wx4~20, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~18 , soc_inst|m0_1|u_logic|N88wx4~18, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|N88wx4~9 , soc_inst|m0_1|u_logic|N88wx4~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~6 , soc_inst|m0_1|u_logic|N88wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~10 , soc_inst|m0_1|u_logic|N88wx4~10, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Ri0wx4~1 , soc_inst|m0_1|u_logic|Ri0wx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Ri0wx4~0 , soc_inst|m0_1|u_logic|Ri0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ox1wx4~1 , soc_inst|m0_1|u_logic|Ox1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~11 , soc_inst|m0_1|u_logic|N88wx4~11, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G79wx4~5 , soc_inst|m0_1|u_logic|G79wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G79wx4~6 , soc_inst|m0_1|u_logic|G79wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G79wx4~8 , soc_inst|m0_1|u_logic|G79wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G79wx4~7 , soc_inst|m0_1|u_logic|G79wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G79wx4~9 , soc_inst|m0_1|u_logic|G79wx4~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C8zvx4~0 , soc_inst|m0_1|u_logic|C8zvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Znzvx4~0 , soc_inst|m0_1|u_logic|Znzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G79wx4~0 , soc_inst|m0_1|u_logic|G79wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|G79wx4~2 , soc_inst|m0_1|u_logic|G79wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G79wx4~3 , soc_inst|m0_1|u_logic|G79wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dv8wx4~0 , soc_inst|m0_1|u_logic|Dv8wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|G79wx4~1 , soc_inst|m0_1|u_logic|G79wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G79wx4~0 , soc_inst|m0_1|u_logic|G79wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G79wx4~3 , soc_inst|m0_1|u_logic|G79wx4~3, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|G79wx4~4 , soc_inst|m0_1|u_logic|G79wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4 , soc_inst|m0_1|u_logic|Hk0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W21wx4 , soc_inst|m0_1|u_logic|W21wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G79wx4~5 , soc_inst|m0_1|u_logic|G79wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G79wx4~6 , soc_inst|m0_1|u_logic|G79wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G79wx4~7 , soc_inst|m0_1|u_logic|G79wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~10 , soc_inst|m0_1|u_logic|N88wx4~10, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ee8wx4~3 , soc_inst|m0_1|u_logic|Ee8wx4~3, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Ee8wx4~0 , soc_inst|m0_1|u_logic|Ee8wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qd8wx4~2 , soc_inst|m0_1|u_logic|Qd8wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qd8wx4~3 , soc_inst|m0_1|u_logic|Qd8wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qd8wx4~1 , soc_inst|m0_1|u_logic|Qd8wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qd8wx4~0 , soc_inst|m0_1|u_logic|Qd8wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ee8wx4~2 , soc_inst|m0_1|u_logic|Ee8wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ee8wx4~1 , soc_inst|m0_1|u_logic|Ee8wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~11 , soc_inst|m0_1|u_logic|N88wx4~11, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|N88wx4~12 , soc_inst|m0_1|u_logic|N88wx4~12, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G11wx4~1 , soc_inst|m0_1|u_logic|G11wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G11wx4~0 , soc_inst|m0_1|u_logic|G11wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~17 , soc_inst|m0_1|u_logic|N88wx4~17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~2 , soc_inst|m0_1|u_logic|N88wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~3 , soc_inst|m0_1|u_logic|N88wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~1 , soc_inst|m0_1|u_logic|N88wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~4 , soc_inst|m0_1|u_logic|N88wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~5 , soc_inst|m0_1|u_logic|N88wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~18 , soc_inst|m0_1|u_logic|N88wx4~18, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ox1wx4~0 , soc_inst|m0_1|u_logic|Ox1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gpcwx4~0 , soc_inst|m0_1|u_logic|Gpcwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gpcwx4~1 , soc_inst|m0_1|u_logic|Gpcwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J00wx4~0 , soc_inst|m0_1|u_logic|J00wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J00wx4~1 , soc_inst|m0_1|u_logic|J00wx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Nyawx4~0 , soc_inst|m0_1|u_logic|Nyawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xk1wx4~1 , soc_inst|m0_1|u_logic|Xk1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xk1wx4~0 , soc_inst|m0_1|u_logic|Xk1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ya1wx4~1 , soc_inst|m0_1|u_logic|Ya1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ya1wx4~0 , soc_inst|m0_1|u_logic|Ya1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~13 , soc_inst|m0_1|u_logic|N88wx4~13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fyzvx4~2 , soc_inst|m0_1|u_logic|Fyzvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fyzvx4~1 , soc_inst|m0_1|u_logic|Fyzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~17 , soc_inst|m0_1|u_logic|N88wx4~17, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wccwx4~0 , soc_inst|m0_1|u_logic|Wccwx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Fyzvx4~0 , soc_inst|m0_1|u_logic|Fyzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Do1wx4~1 , soc_inst|m0_1|u_logic|Do1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Do1wx4~2 , soc_inst|m0_1|u_logic|Do1wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Do1wx4~0 , soc_inst|m0_1|u_logic|Do1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~19 , soc_inst|m0_1|u_logic|N88wx4~19, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~20 , soc_inst|m0_1|u_logic|N88wx4~20, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~1 , soc_inst|m0_1|u_logic|N88wx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|N88wx4~14 , soc_inst|m0_1|u_logic|N88wx4~14, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|N88wx4~16 , soc_inst|m0_1|u_logic|N88wx4~16, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qtdwx4~0 , soc_inst|m0_1|u_logic|Qtdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qtdwx4~1 , soc_inst|m0_1|u_logic|Qtdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tq7wx4~0 , soc_inst|m0_1|u_logic|Tq7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Godwx4~1 , soc_inst|m0_1|u_logic|Godwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S08wx4~0 , soc_inst|m0_1|u_logic|S08wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wwdwx4~0 , soc_inst|m0_1|u_logic|Wwdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djdwx4~0 , soc_inst|m0_1|u_logic|Djdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wwdwx4~2 , soc_inst|m0_1|u_logic|Wwdwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~0 , soc_inst|m0_1|u_logic|Z78wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqdwx4~0 , soc_inst|m0_1|u_logic|Kqdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wwdwx4~1 , soc_inst|m0_1|u_logic|Wwdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~1 , soc_inst|m0_1|u_logic|Z78wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~4 , soc_inst|m0_1|u_logic|Z78wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dqdwx4~0 , soc_inst|m0_1|u_logic|Dqdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqdwx4~2 , soc_inst|m0_1|u_logic|Kqdwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqdwx4~3 , soc_inst|m0_1|u_logic|Kqdwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mrdwx4~1 , soc_inst|m0_1|u_logic|Mrdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqdwx4~1 , soc_inst|m0_1|u_logic|Kqdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~2 , soc_inst|m0_1|u_logic|Z78wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Widwx4~0 , soc_inst|m0_1|u_logic|Widwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djdwx4~2 , soc_inst|m0_1|u_logic|Djdwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fq7wx4~0 , soc_inst|m0_1|u_logic|Fq7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djdwx4~1 , soc_inst|m0_1|u_logic|Djdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djdwx4~3 , soc_inst|m0_1|u_logic|Djdwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~3 , soc_inst|m0_1|u_logic|Z78wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~5 , soc_inst|m0_1|u_logic|Z78wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X7ewx4~0 , soc_inst|m0_1|u_logic|X7ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cuxwx4~0 , soc_inst|m0_1|u_logic|Cuxwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hr7wx4~0 , soc_inst|m0_1|u_logic|Hr7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W3ewx4~0 , soc_inst|m0_1|u_logic|W3ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W3ewx4~1 , soc_inst|m0_1|u_logic|W3ewx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~6 , soc_inst|m0_1|u_logic|Z78wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~7 , soc_inst|m0_1|u_logic|Z78wx4~7, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|S9zvx4~0 , soc_inst|m0_1|u_logic|S9zvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S9zvx4~1 , soc_inst|m0_1|u_logic|S9zvx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|R38wx4~0 , soc_inst|m0_1|u_logic|R38wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|R38wx4~1 , soc_inst|m0_1|u_logic|R38wx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Qb3wx4 , soc_inst|m0_1|u_logic|Qb3wx4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Z9zvx4~0 , soc_inst|m0_1|u_logic|Z9zvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Igi2z4 , soc_inst|m0_1|u_logic|Igi2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~13 , soc_inst|m0_1|u_logic|Add2~13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rhi2z4 , soc_inst|m0_1|u_logic|Rhi2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Add2~1 , soc_inst|m0_1|u_logic|Add2~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Tvhvx4~0 , soc_inst|m0_1|u_logic|Tvhvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Tvhvx4~1 , soc_inst|m0_1|u_logic|Tvhvx4~1, de1_soc_wrapper, 1
@@ -2857,2333 +2114,2304 @@ instance = comp, \soc_inst|m0_1|u_logic|Tvhvx4~2 , soc_inst|m0_1|u_logic|Tvhvx4~
instance = comp, \soc_inst|m0_1|u_logic|Omk2z4 , soc_inst|m0_1|u_logic|Omk2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Velvx4~0 , soc_inst|m0_1|u_logic|Velvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Velvx4~1 , soc_inst|m0_1|u_logic|Velvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rhi2z4 , soc_inst|m0_1|u_logic|Rhi2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~4 , soc_inst|m0_1|u_logic|O7zvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE , soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vr23z4~feeder , soc_inst|m0_1|u_logic|Vr23z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vr23z4 , soc_inst|m0_1|u_logic|Vr23z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Mi13z4 , soc_inst|m0_1|u_logic|Mi13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vuo2z4 , soc_inst|m0_1|u_logic|Vuo2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ec62z4~1 , soc_inst|m0_1|u_logic|Ec62z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Na53z4~feeder , soc_inst|m0_1|u_logic|Na53z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Na53z4 , soc_inst|m0_1|u_logic|Na53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E143z4~feeder , soc_inst|m0_1|u_logic|E143z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E143z4 , soc_inst|m0_1|u_logic|E143z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ec62z4~0 , soc_inst|m0_1|u_logic|Ec62z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N8i3z4 , soc_inst|m0_1|u_logic|N8i3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Be62z4~0 , soc_inst|m0_1|u_logic|Be62z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cai3z4 , soc_inst|m0_1|u_logic|Cai3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J5i3z4 , soc_inst|m0_1|u_logic|J5i3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y6i3z4 , soc_inst|m0_1|u_logic|Y6i3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ec62z4~2 , soc_inst|m0_1|u_logic|Ec62z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ec62z4~3 , soc_inst|m0_1|u_logic|Ec62z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q8zvx4~0 , soc_inst|m0_1|u_logic|Q8zvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C8zvx4~0 , soc_inst|m0_1|u_logic|C8zvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F6zvx4~0 , soc_inst|m0_1|u_logic|F6zvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F6zvx4~1 , soc_inst|m0_1|u_logic|F6zvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ft73z4~feeder , soc_inst|m0_1|u_logic|Ft73z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ft73z4 , soc_inst|m0_1|u_logic|Ft73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~2 , soc_inst|m0_1|u_logic|O7zvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gto2z4 , soc_inst|m0_1|u_logic|Gto2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~4 , soc_inst|m0_1|u_logic|O7zvx4~4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~1 , soc_inst|m0_1|u_logic|O7zvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~3 , soc_inst|m0_1|u_logic|O7zvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~5 , soc_inst|m0_1|u_logic|O7zvx4~5, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~6 , soc_inst|m0_1|u_logic|O7zvx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N8i3z4 , soc_inst|m0_1|u_logic|N8i3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cai3z4~DUPLICATE , soc_inst|m0_1|u_logic|Cai3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wj63z4 , soc_inst|m0_1|u_logic|Wj63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uu83z4~feeder , soc_inst|m0_1|u_logic|Uu83z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uu83z4~DUPLICATE , soc_inst|m0_1|u_logic|Uu83z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N8i3z4~DUPLICATE , soc_inst|m0_1|u_logic|N8i3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uu83z4 , soc_inst|m0_1|u_logic|Uu83z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~7 , soc_inst|m0_1|u_logic|O7zvx4~7, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~8 , soc_inst|m0_1|u_logic|O7zvx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~0 , soc_inst|m0_1|u_logic|O7zvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|O7zvx4 , soc_inst|m0_1|u_logic|O7zvx4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~2 , soc_inst|m0_1|u_logic|hwdata_o~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lns2z4 , soc_inst|m0_1|u_logic|Lns2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xwvwx4~0 , soc_inst|m0_1|u_logic|Xwvwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xwvwx4~1 , soc_inst|m0_1|u_logic|Xwvwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Arzwx4~1 , soc_inst|m0_1|u_logic|Arzwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iazwx4~0 , soc_inst|m0_1|u_logic|Iazwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pazwx4 , soc_inst|m0_1|u_logic|Pazwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J7zwx4~0 , soc_inst|m0_1|u_logic|J7zwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B6pwx4~4 , soc_inst|m0_1|u_logic|B6pwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Viuwx4~0 , soc_inst|m0_1|u_logic|Viuwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I6pwx4~0 , soc_inst|m0_1|u_logic|I6pwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kzqvx4~1 , soc_inst|m0_1|u_logic|Kzqvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jjuwx4~2 , soc_inst|m0_1|u_logic|Jjuwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U5pwx4~0 , soc_inst|m0_1|u_logic|U5pwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kzqvx4~0 , soc_inst|m0_1|u_logic|Kzqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kzqvx4~2 , soc_inst|m0_1|u_logic|Kzqvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kzqvx4~3 , soc_inst|m0_1|u_logic|Kzqvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dwl2z4 , soc_inst|m0_1|u_logic|Dwl2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hcnvx4~0 , soc_inst|m0_1|u_logic|Hcnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hcnvx4~1 , soc_inst|m0_1|u_logic|Hcnvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dwl2z4~DUPLICATE , soc_inst|m0_1|u_logic|Dwl2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Acnvx4~0 , soc_inst|m0_1|u_logic|Acnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Acnvx4~1 , soc_inst|m0_1|u_logic|Acnvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE , soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Txa2z4~0 , soc_inst|m0_1|u_logic|Txa2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zyhvx4~0 , soc_inst|m0_1|u_logic|Zyhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rym2z4 , soc_inst|m0_1|u_logic|Rym2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M1pwx4~1 , soc_inst|m0_1|u_logic|M1pwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M1pwx4~0 , soc_inst|m0_1|u_logic|M1pwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M1pwx4~2 , soc_inst|m0_1|u_logic|M1pwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M1pwx4~3 , soc_inst|m0_1|u_logic|M1pwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M1pwx4~4 , soc_inst|m0_1|u_logic|M1pwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D7iwx4~1 , soc_inst|m0_1|u_logic|D7iwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ba0wx4~0 , soc_inst|m0_1|u_logic|Ba0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ba0wx4 , soc_inst|m0_1|u_logic|Ba0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~37 , soc_inst|m0_1|u_logic|Add2~37, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vihvx4~0 , soc_inst|m0_1|u_logic|Vihvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vihvx4~1 , soc_inst|m0_1|u_logic|Vihvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nox2z4 , soc_inst|m0_1|u_logic|Nox2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C70wx4 , soc_inst|m0_1|u_logic|C70wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q9kvx4~0 , soc_inst|m0_1|u_logic|Q9kvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zfh3z4 , soc_inst|m0_1|u_logic|Zfh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~1 , soc_inst|m0_1|u_logic|Wa0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J0n2z4 , soc_inst|m0_1|u_logic|J0n2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~2 , soc_inst|m0_1|u_logic|Wa0wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~5 , soc_inst|m0_1|u_logic|Wa0wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E5awx4~1 , soc_inst|m0_1|u_logic|E5awx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z80wx4~1 , soc_inst|m0_1|u_logic|Z80wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z80wx4~0 , soc_inst|m0_1|u_logic|Z80wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E80wx4~0 , soc_inst|m0_1|u_logic|E80wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J70wx4~0 , soc_inst|m0_1|u_logic|J70wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J70wx4~1 , soc_inst|m0_1|u_logic|J70wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J70wx4~2 , soc_inst|m0_1|u_logic|J70wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mz63z4 , soc_inst|m0_1|u_logic|Mz63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G4qwx4~0 , soc_inst|m0_1|u_logic|G4qwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G4qwx4~1 , soc_inst|m0_1|u_logic|G4qwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G4qwx4~3 , soc_inst|m0_1|u_logic|G4qwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M3u2z4 , soc_inst|m0_1|u_logic|M3u2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V883z4 , soc_inst|m0_1|u_logic|V883z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G4qwx4~2 , soc_inst|m0_1|u_logic|G4qwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G4qwx4 , soc_inst|m0_1|u_logic|G4qwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Asdwx4~0 , soc_inst|m0_1|u_logic|Asdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xtdwx4~1 , soc_inst|m0_1|u_logic|Xtdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z2h3z4~DUPLICATE , soc_inst|m0_1|u_logic|Z2h3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~33 , soc_inst|m0_1|u_logic|Add0~33, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~21 , soc_inst|m0_1|u_logic|Add0~21, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[18]~12 , soc_inst|m0_1|u_logic|hwdata_o[18]~12, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xyn2z4 , soc_inst|m0_1|u_logic|Xyn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iomvx4~0 , soc_inst|m0_1|u_logic|Iomvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O0o2z4 , soc_inst|m0_1|u_logic|O0o2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~57 , soc_inst|m0_1|u_logic|Add0~57, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[19]~13 , soc_inst|m0_1|u_logic|hwdata_o[19]~13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L8m2z4 , soc_inst|m0_1|u_logic|L8m2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bomvx4~0 , soc_inst|m0_1|u_logic|Bomvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jpa3z4 , soc_inst|m0_1|u_logic|Jpa3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~45 , soc_inst|m0_1|u_logic|Add0~45, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[20]~15 , soc_inst|m0_1|u_logic|hwdata_o[20]~15, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I1h3z4 , soc_inst|m0_1|u_logic|I1h3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Unmvx4~0 , soc_inst|m0_1|u_logic|Unmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z2h3z4 , soc_inst|m0_1|u_logic|Z2h3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[1][4] , soc_inst|switches_1|switch_store[1][4], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[20]~16 , soc_inst|ram_1|data_to_memory[20]~16, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sx3wx4~0 , soc_inst|m0_1|u_logic|Sx3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[28]~15 , soc_inst|ram_1|data_to_memory[28]~15, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[20]~39 , soc_inst|interconnect_1|HRDATA[20]~39, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ntmwx4~0 , soc_inst|m0_1|u_logic|Ntmwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ntmwx4~1 , soc_inst|m0_1|u_logic|Ntmwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dunwx4~0 , soc_inst|m0_1|u_logic|Dunwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wtnwx4~0 , soc_inst|m0_1|u_logic|Wtnwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uf1wx4~0 , soc_inst|m0_1|u_logic|Uf1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ekhvx4~2 , soc_inst|m0_1|u_logic|Ekhvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fhx2z4 , soc_inst|m0_1|u_logic|Fhx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L4jvx4~0 , soc_inst|m0_1|u_logic|L4jvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dkr2z4 , soc_inst|m0_1|u_logic|Dkr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~7 , soc_inst|m0_1|u_logic|Ze1wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~8 , soc_inst|m0_1|u_logic|Ze1wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4 , soc_inst|m0_1|u_logic|Ze1wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nf1wx4~0 , soc_inst|m0_1|u_logic|Nf1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qd1wx4~0 , soc_inst|m0_1|u_logic|Qd1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qd1wx4~1 , soc_inst|m0_1|u_logic|Qd1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lpv2z4~feeder , soc_inst|m0_1|u_logic|Lpv2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lpv2z4 , soc_inst|m0_1|u_logic|Lpv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H2wwx4~3 , soc_inst|m0_1|u_logic|H2wwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cgu2z4~DUPLICATE , soc_inst|m0_1|u_logic|Cgu2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H2wwx4~2 , soc_inst|m0_1|u_logic|H2wwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H2wwx4~0 , soc_inst|m0_1|u_logic|H2wwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H2wwx4~1 , soc_inst|m0_1|u_logic|H2wwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H2wwx4 , soc_inst|m0_1|u_logic|H2wwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C0ewx4~0 , soc_inst|m0_1|u_logic|C0ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sndwx4~1 , soc_inst|m0_1|u_logic|Sndwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xdb3z4 , soc_inst|m0_1|u_logic|Xdb3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J9d3z4 , soc_inst|m0_1|u_logic|J9d3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J7b3z4~0 , soc_inst|m0_1|u_logic|J7b3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J7b3z4 , soc_inst|m0_1|u_logic|J7b3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gcb3z4 , soc_inst|m0_1|u_logic|Gcb3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wkpwx4~0 , soc_inst|m0_1|u_logic|Wkpwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wkpwx4~1 , soc_inst|m0_1|u_logic|Wkpwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wkpwx4~2 , soc_inst|m0_1|u_logic|Wkpwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wkpwx4~3 , soc_inst|m0_1|u_logic|Wkpwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O9iwx4~0 , soc_inst|m0_1|u_logic|O9iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X61wx4~0 , soc_inst|m0_1|u_logic|X61wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X61wx4~1 , soc_inst|m0_1|u_logic|X61wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X61wx4~2 , soc_inst|m0_1|u_logic|X61wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xjhvx4~0 , soc_inst|m0_1|u_logic|Xjhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xjhvx4~1 , soc_inst|m0_1|u_logic|Xjhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xjhvx4~2 , soc_inst|m0_1|u_logic|Xjhvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rix2z4 , soc_inst|m0_1|u_logic|Rix2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdjvx4~0 , soc_inst|m0_1|u_logic|Pdjvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J7q2z4 , soc_inst|m0_1|u_logic|J7q2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P82wx4~0 , soc_inst|m0_1|u_logic|P82wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sdhvx4~0 , soc_inst|m0_1|u_logic|Sdhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sdhvx4~1 , soc_inst|m0_1|u_logic|Sdhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Scvwx4~0 , soc_inst|m0_1|u_logic|Scvwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zcvwx4~0 , soc_inst|m0_1|u_logic|Zcvwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nfb3z4~0 , soc_inst|m0_1|u_logic|Nfb3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nfb3z4 , soc_inst|m0_1|u_logic|Nfb3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dhb3z4~DUPLICATE , soc_inst|m0_1|u_logic|Dhb3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wywwx4~0 , soc_inst|m0_1|u_logic|Wywwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wywwx4~1 , soc_inst|m0_1|u_logic|Wywwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wywwx4~2 , soc_inst|m0_1|u_logic|Wywwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wywwx4~3 , soc_inst|m0_1|u_logic|Wywwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G9lwx4~0 , soc_inst|m0_1|u_logic|G9lwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[7]~4 , soc_inst|ram_1|data_to_memory[7]~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[23]~3 , soc_inst|ram_1|data_to_memory[23]~3, de1_soc_wrapper, 1
-instance = comp, \SW[7]~input , SW[7]~input, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[0][7] , soc_inst|switches_1|switch_store[0][7], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory~8 , soc_inst|pix1|memory~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[46] , soc_inst|pix1|memory_rtl_0_bypass[46], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[7]~62 , soc_inst|interconnect_1|HRDATA[7]~62, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a127 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a127, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a95 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a95, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a63 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a63, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w7_n0_mux_dataout~3 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w7_n0_mux_dataout~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a71 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a71, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a39 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a39, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a103 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a103, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w7_n0_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w7_n0_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a79 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a79, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a47 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a47, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a111 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a111, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w7_n0_mux_dataout~1 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w7_n0_mux_dataout~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a87 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a87, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a55 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a55, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a119 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a119, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w7_n0_mux_dataout~2 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w7_n0_mux_dataout~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w7_n0_mux_dataout~4 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w7_n0_mux_dataout~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a199 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a199, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a207 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a207, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a223 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a223, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a215 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a215, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w7_n1_mux_dataout~2 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w7_n1_mux_dataout~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a191 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a191, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a167 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a167, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a175 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a175, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a183 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a183, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w7_n1_mux_dataout~1 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w7_n1_mux_dataout~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a231 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a231, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a247 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a247, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a255 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a255, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a239 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a239, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w7_n1_mux_dataout~3 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w7_n1_mux_dataout~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a135 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a135, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a143 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a143, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a151 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a151, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a159 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a159, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w7_n1_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w7_n1_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w7_n1_mux_dataout~4 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w7_n1_mux_dataout~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a295 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a295, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l6_w7_n0_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l6_w7_n0_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a279 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a279, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a271 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a271, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a287 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a287, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a263 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a263, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w7_n8_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w7_n8_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[7]~63 , soc_inst|interconnect_1|HRDATA[7]~63, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[7]~11 , soc_inst|interconnect_1|HRDATA[7]~11, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[7]~16 , soc_inst|interconnect_1|HRDATA[7]~16, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U72wx4~0 , soc_inst|m0_1|u_logic|U72wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U72wx4~1 , soc_inst|m0_1|u_logic|U72wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sdhvx4~2 , soc_inst|m0_1|u_logic|Sdhvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jwf3z4 , soc_inst|m0_1|u_logic|Jwf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|haddr_o~3 , soc_inst|m0_1|u_logic|haddr_o~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zcivx4~0 , soc_inst|m0_1|u_logic|Zcivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y8q2z4 , soc_inst|m0_1|u_logic|Y8q2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~0 , soc_inst|m0_1|u_logic|Z62wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~5 , soc_inst|m0_1|u_logic|Z62wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z62wx4 , soc_inst|m0_1|u_logic|Z62wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N72wx4~0 , soc_inst|m0_1|u_logic|N72wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q52wx4~0 , soc_inst|m0_1|u_logic|Q52wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q52wx4~1 , soc_inst|m0_1|u_logic|Q52wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fxv2z4 , soc_inst|m0_1|u_logic|Fxv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ccq2z4 , soc_inst|m0_1|u_logic|Ccq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ey9wx4~3 , soc_inst|m0_1|u_logic|Ey9wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wnu2z4~DUPLICATE , soc_inst|m0_1|u_logic|Wnu2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ey9wx4~2 , soc_inst|m0_1|u_logic|Ey9wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ey9wx4~1 , soc_inst|m0_1|u_logic|Ey9wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wj73z4 , soc_inst|m0_1|u_logic|Wj73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ey9wx4~0 , soc_inst|m0_1|u_logic|Ey9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ey9wx4 , soc_inst|m0_1|u_logic|Ey9wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mydwx4~0 , soc_inst|m0_1|u_logic|Mydwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C0ewx4~1 , soc_inst|m0_1|u_logic|C0ewx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iua3z4~DUPLICATE , soc_inst|m0_1|u_logic|Iua3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L7a3z4 , soc_inst|m0_1|u_logic|L7a3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xrmwx4~0 , soc_inst|m0_1|u_logic|Xrmwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xrmwx4~1 , soc_inst|m0_1|u_logic|Xrmwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bsvwx4~0 , soc_inst|m0_1|u_logic|Bsvwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xrmwx4~2 , soc_inst|m0_1|u_logic|Xrmwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wh0wx4~0 , soc_inst|m0_1|u_logic|Wh0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bh0wx4~0 , soc_inst|m0_1|u_logic|Bh0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tj0wx4~1 , soc_inst|m0_1|u_logic|Tj0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bh0wx4~1 , soc_inst|m0_1|u_logic|Bh0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gfg3z4~feeder , soc_inst|m0_1|u_logic|Gfg3z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gfg3z4 , soc_inst|m0_1|u_logic|Gfg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hqg3z4 , soc_inst|m0_1|u_logic|Hqg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rdg3z4~DUPLICATE , soc_inst|m0_1|u_logic|Rdg3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dmvwx4~1 , soc_inst|m0_1|u_logic|Dmvwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nag3z4~DUPLICATE , soc_inst|m0_1|u_logic|Nag3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dmvwx4~0 , soc_inst|m0_1|u_logic|Dmvwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dmvwx4 , soc_inst|m0_1|u_logic|Dmvwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xtdwx4~0 , soc_inst|m0_1|u_logic|Xtdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eudwx4~0 , soc_inst|m0_1|u_logic|Eudwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eudwx4~1 , soc_inst|m0_1|u_logic|Eudwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[18]~8 , soc_inst|ram_1|data_to_memory[18]~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[1][2] , soc_inst|switches_1|switch_store[1][2], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[18]~20 , soc_inst|interconnect_1|HRDATA[18]~20, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xyn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Xyn2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ajmwx4~0 , soc_inst|m0_1|u_logic|Ajmwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ajmwx4~1 , soc_inst|m0_1|u_logic|Ajmwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ajmwx4~2 , soc_inst|m0_1|u_logic|Ajmwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yjzvx4~0 , soc_inst|m0_1|u_logic|Yjzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yjzvx4~1 , soc_inst|m0_1|u_logic|Yjzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uhzvx4~1 , soc_inst|m0_1|u_logic|Uhzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nqz2z4~feeder , soc_inst|m0_1|u_logic|Nqz2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nqz2z4 , soc_inst|m0_1|u_logic|Nqz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hn03z4 , soc_inst|m0_1|u_logic|Hn03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D7k2z4 , soc_inst|m0_1|u_logic|D7k2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~4 , soc_inst|m0_1|u_logic|Djzvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X543z4~feeder , soc_inst|m0_1|u_logic|X543z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X543z4 , soc_inst|m0_1|u_logic|X543z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~2 , soc_inst|m0_1|u_logic|Djzvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~1 , soc_inst|m0_1|u_logic|Djzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ow23z4 , soc_inst|m0_1|u_logic|Ow23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gf53z4~feeder , soc_inst|m0_1|u_logic|Gf53z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gf53z4~DUPLICATE , soc_inst|m0_1|u_logic|Gf53z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~3 , soc_inst|m0_1|u_logic|Djzvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fn13z4~feeder , soc_inst|m0_1|u_logic|Fn13z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fn13z4~DUPLICATE , soc_inst|m0_1|u_logic|Fn13z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~0 , soc_inst|m0_1|u_logic|Djzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y1v2z4~DUPLICATE , soc_inst|m0_1|u_logic|Y1v2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pst2z4~DUPLICATE , soc_inst|m0_1|u_logic|Pst2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~6 , soc_inst|m0_1|u_logic|Djzvx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O5k2z4 , soc_inst|m0_1|u_logic|O5k2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Po63z4 , soc_inst|m0_1|u_logic|Po63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE , soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~5 , soc_inst|m0_1|u_logic|Djzvx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~7 , soc_inst|m0_1|u_logic|Djzvx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djzvx4 , soc_inst|m0_1|u_logic|Djzvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H3awx4~0 , soc_inst|m0_1|u_logic|H3awx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~5 , soc_inst|m0_1|u_logic|Add5~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hihvx4~1 , soc_inst|m0_1|u_logic|Hihvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hihvx4~2 , soc_inst|m0_1|u_logic|Hihvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lrx2z4 , soc_inst|m0_1|u_logic|Lrx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S8k2z4 , soc_inst|m0_1|u_logic|S8k2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~65 , soc_inst|m0_1|u_logic|Add3~65, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~21 , soc_inst|m0_1|u_logic|Add3~21, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nhzvx4 , soc_inst|m0_1|u_logic|Nhzvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R5lvx4~0 , soc_inst|m0_1|u_logic|R5lvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S8k2z4~DUPLICATE , soc_inst|m0_1|u_logic|S8k2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ds72z4~2 , soc_inst|m0_1|u_logic|Ds72z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fn13z4 , soc_inst|m0_1|u_logic|Fn13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ds72z4~1 , soc_inst|m0_1|u_logic|Ds72z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Au72z4~0 , soc_inst|m0_1|u_logic|Au72z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gf53z4 , soc_inst|m0_1|u_logic|Gf53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ds72z4~0 , soc_inst|m0_1|u_logic|Ds72z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ds72z4~3 , soc_inst|m0_1|u_logic|Ds72z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hlzvx4~0 , soc_inst|m0_1|u_logic|Hlzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wpcvx4 , soc_inst|m0_1|u_logic|Wpcvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cfzvx4~0 , soc_inst|m0_1|u_logic|Cfzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cfzvx4~1 , soc_inst|m0_1|u_logic|Cfzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cfzvx4~2 , soc_inst|m0_1|u_logic|Cfzvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jw73z4~feeder , soc_inst|m0_1|u_logic|Jw73z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jw73z4 , soc_inst|m0_1|u_logic|Jw73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J0v2z4~DUPLICATE , soc_inst|m0_1|u_logic|J0v2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~0 , soc_inst|m0_1|u_logic|Pdbwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~7 , soc_inst|m0_1|u_logic|Pdbwx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hmh3z4~feeder , soc_inst|m0_1|u_logic|Hmh3z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hmh3z4 , soc_inst|m0_1|u_logic|Hmh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wnh3z4 , soc_inst|m0_1|u_logic|Wnh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~8 , soc_inst|m0_1|u_logic|Pdbwx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ql13z4~feeder , soc_inst|m0_1|u_logic|Ql13z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ql13z4 , soc_inst|m0_1|u_logic|Ql13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~1 , soc_inst|m0_1|u_logic|Pdbwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zu23z4 , soc_inst|m0_1|u_logic|Zu23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rd53z4~feeder , soc_inst|m0_1|u_logic|Rd53z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rd53z4~DUPLICATE , soc_inst|m0_1|u_logic|Rd53z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~3 , soc_inst|m0_1|u_logic|Pdbwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Skh3z4 , soc_inst|m0_1|u_logic|Skh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djh3z4~DUPLICATE , soc_inst|m0_1|u_logic|Djh3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~5 , soc_inst|m0_1|u_logic|Pdbwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I443z4~feeder , soc_inst|m0_1|u_logic|I443z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I443z4 , soc_inst|m0_1|u_logic|I443z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~2 , soc_inst|m0_1|u_logic|Pdbwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hak2z4~DUPLICATE , soc_inst|m0_1|u_logic|Hak2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~4 , soc_inst|m0_1|u_logic|Pdbwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~6 , soc_inst|m0_1|u_logic|Pdbwx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4 , soc_inst|m0_1|u_logic|Pdbwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ny3wx4~0 , soc_inst|m0_1|u_logic|Ny3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Knvvx4~0 , soc_inst|m0_1|u_logic|Knvvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T5mvx4~0 , soc_inst|m0_1|u_logic|T5mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Imvvx4~0 , soc_inst|m0_1|u_logic|Imvvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T5mvx4~1 , soc_inst|m0_1|u_logic|T5mvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wbk2z4 , soc_inst|m0_1|u_logic|Wbk2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lsmwx4~0 , soc_inst|m0_1|u_logic|Lsmwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lsmwx4~1 , soc_inst|m0_1|u_logic|Lsmwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wzpvx4~0 , soc_inst|m0_1|u_logic|Wzpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I4rwx4~0 , soc_inst|m0_1|u_logic|I4rwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wzpvx4~1 , soc_inst|m0_1|u_logic|Wzpvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Phh2z4~1 , soc_inst|m0_1|u_logic|Phh2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S17wx4~0 , soc_inst|m0_1|u_logic|S17wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D47wx4~0 , soc_inst|m0_1|u_logic|D47wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zxpvx4~0 , soc_inst|m0_1|u_logic|Zxpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Idk2z4 , soc_inst|m0_1|u_logic|Idk2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rhnvx4~0 , soc_inst|m0_1|u_logic|Rhnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rhnvx4~1 , soc_inst|m0_1|u_logic|Rhnvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mnawx4~0 , soc_inst|m0_1|u_logic|Mnawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C3qvx4~0 , soc_inst|m0_1|u_logic|C3qvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C3qvx4~1 , soc_inst|m0_1|u_logic|C3qvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kjk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Kjk2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zu33z4 , soc_inst|m0_1|u_logic|Zu33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~2 , soc_inst|m0_1|u_logic|Izpvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nf03z4 , soc_inst|m0_1|u_logic|Nf03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aez2z4 , soc_inst|m0_1|u_logic|Aez2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tiz2z4 , soc_inst|m0_1|u_logic|Tiz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~4 , soc_inst|m0_1|u_logic|Izpvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zkk2z4 , soc_inst|m0_1|u_logic|Zkk2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rd63z4~DUPLICATE , soc_inst|m0_1|u_logic|Rd63z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~5 , soc_inst|m0_1|u_logic|Izpvx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|An73z4 , soc_inst|m0_1|u_logic|An73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rek2z4 , soc_inst|m0_1|u_logic|Rek2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE , soc_inst|m0_1|u_logic|Aru2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~6 , soc_inst|m0_1|u_logic|Izpvx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~7 , soc_inst|m0_1|u_logic|Izpvx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ql23z4 , soc_inst|m0_1|u_logic|Ql23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I453z4 , soc_inst|m0_1|u_logic|I453z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~3 , soc_inst|m0_1|u_logic|Izpvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc13z4 , soc_inst|m0_1|u_logic|Hc13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~0 , soc_inst|m0_1|u_logic|Izpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~1 , soc_inst|m0_1|u_logic|Izpvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Izpvx4 , soc_inst|m0_1|u_logic|Izpvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Whh2z4~0 , soc_inst|m0_1|u_logic|Whh2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mdzvx4~1 , soc_inst|m0_1|u_logic|Mdzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fdzvx4~0 , soc_inst|m0_1|u_logic|Fdzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ll63z4 , soc_inst|m0_1|u_logic|Ll63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eruwx4~0 , soc_inst|m0_1|u_logic|Eruwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lpt2z4~DUPLICATE , soc_inst|m0_1|u_logic|Lpt2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE , soc_inst|m0_1|u_logic|Uu73z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eruwx4~2 , soc_inst|m0_1|u_logic|Eruwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ujo2z4 , soc_inst|m0_1|u_logic|Ujo2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eruwx4~3 , soc_inst|m0_1|u_logic|Eruwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eruwx4~1 , soc_inst|m0_1|u_logic|Eruwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eruwx4 , soc_inst|m0_1|u_logic|Eruwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fwtwx4~0 , soc_inst|m0_1|u_logic|Fwtwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yvtwx4~0 , soc_inst|m0_1|u_logic|Yvtwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xs7wx4~0 , soc_inst|m0_1|u_logic|Xs7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xs7wx4~1 , soc_inst|m0_1|u_logic|Xs7wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cma3z4~0 , soc_inst|m0_1|u_logic|Cma3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cma3z4 , soc_inst|m0_1|u_logic|Cma3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~69 , soc_inst|m0_1|u_logic|Add0~69, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ieh3z4 , soc_inst|m0_1|u_logic|Ieh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nnmvx4~0 , soc_inst|m0_1|u_logic|Nnmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ogo2z4 , soc_inst|m0_1|u_logic|Ogo2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~89 , soc_inst|m0_1|u_logic|Add0~89, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gnmvx4~0 , soc_inst|m0_1|u_logic|Gnmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ddi3z4 , soc_inst|m0_1|u_logic|Ddi3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~5 , soc_inst|m0_1|u_logic|Add0~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jca3z4~DUPLICATE , soc_inst|m0_1|u_logic|Jca3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zmmvx4~0 , soc_inst|m0_1|u_logic|Zmmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uei3z4 , soc_inst|m0_1|u_logic|Uei3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[1][7] , soc_inst|switches_1|switch_store[1][7], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[23]~8 , soc_inst|interconnect_1|HRDATA[23]~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Walwx4~0 , soc_inst|m0_1|u_logic|Walwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Walwx4~1 , soc_inst|m0_1|u_logic|Walwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oa3wx4~0 , soc_inst|m0_1|u_logic|Oa3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oa3wx4~1 , soc_inst|m0_1|u_logic|Oa3wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~117 , soc_inst|m0_1|u_logic|Add2~117, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zdhvx4~0 , soc_inst|m0_1|u_logic|Zdhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zdhvx4~1 , soc_inst|m0_1|u_logic|Zdhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zdhvx4~2 , soc_inst|m0_1|u_logic|Zdhvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kaf3z4 , soc_inst|m0_1|u_logic|Kaf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y92wx4 , soc_inst|m0_1|u_logic|Y92wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K8ivx4~0 , soc_inst|m0_1|u_logic|K8ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B6j2z4~DUPLICATE , soc_inst|m0_1|u_logic|B6j2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R6cwx4~1 , soc_inst|m0_1|u_logic|R6cwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wbf3z4 , soc_inst|m0_1|u_logic|Wbf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W852z4~0 , soc_inst|m0_1|u_logic|W852z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aff3z4 , soc_inst|m0_1|u_logic|Aff3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P852z4~0 , soc_inst|m0_1|u_logic|P852z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S652z4~0 , soc_inst|m0_1|u_logic|S652z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xmf3z4 , soc_inst|m0_1|u_logic|Xmf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G752z4~0 , soc_inst|m0_1|u_logic|G752z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R6cwx4~4 , soc_inst|m0_1|u_logic|R6cwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ilf3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ilf3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fpi2z4 , soc_inst|m0_1|u_logic|Fpi2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R6cwx4~0 , soc_inst|m0_1|u_logic|R6cwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ldf3z4 , soc_inst|m0_1|u_logic|Ldf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I852z4~0 , soc_inst|m0_1|u_logic|I852z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R6cwx4~5 , soc_inst|m0_1|u_logic|R6cwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D6cwx4~0 , soc_inst|m0_1|u_logic|D6cwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Va3wx4~0 , soc_inst|m0_1|u_logic|Va3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fa2wx4~0 , soc_inst|m0_1|u_logic|Fa2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bqf3z4 , soc_inst|m0_1|u_logic|Bqf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Icxwx4~2 , soc_inst|m0_1|u_logic|Icxwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mof3z4 , soc_inst|m0_1|u_logic|Mof3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Icxwx4~3 , soc_inst|m0_1|u_logic|Icxwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aff3z4~DUPLICATE , soc_inst|m0_1|u_logic|Aff3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Icxwx4~0 , soc_inst|m0_1|u_logic|Icxwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Icxwx4~1 , soc_inst|m0_1|u_logic|Icxwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Icxwx4 , soc_inst|m0_1|u_logic|Icxwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mrdwx4~0 , soc_inst|m0_1|u_logic|Mrdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uvdwx4~1 , soc_inst|m0_1|u_logic|Uvdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rilwx4~0 , soc_inst|m0_1|u_logic|Rilwx4~0, de1_soc_wrapper, 1
-instance = comp, \SW[3]~input , SW[3]~input, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[1][3] , soc_inst|switches_1|switch_store[1][3], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[19]~20 , soc_inst|ram_1|data_to_memory[19]~20, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[11]~19 , soc_inst|ram_1|data_to_memory[11]~19, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[19]~43 , soc_inst|interconnect_1|HRDATA[19]~43, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rilwx4~1 , soc_inst|m0_1|u_logic|Rilwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rilwx4~2 , soc_inst|m0_1|u_logic|Rilwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vqtwx4~0 , soc_inst|m0_1|u_logic|Vqtwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ll1wx4~0 , soc_inst|m0_1|u_logic|Ll1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ihlwx4~4 , soc_inst|m0_1|u_logic|Ihlwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ll1wx4~1 , soc_inst|m0_1|u_logic|Ll1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uehvx4~2 , soc_inst|m0_1|u_logic|Uehvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Owovx4 , soc_inst|m0_1|u_logic|Owovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wzivx4~0 , soc_inst|m0_1|u_logic|Wzivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wce3z4 , soc_inst|m0_1|u_logic|Wce3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ibe3z4 , soc_inst|m0_1|u_logic|Ibe3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6e3z4 , soc_inst|m0_1|u_logic|Q6e3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F8e3z4 , soc_inst|m0_1|u_logic|F8e3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cc9wx4~2 , soc_inst|m0_1|u_logic|Cc9wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ge9wx4~0 , soc_inst|m0_1|u_logic|Ge9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aud3z4 , soc_inst|m0_1|u_logic|Aud3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pvd3z4 , soc_inst|m0_1|u_logic|Pvd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cc9wx4~0 , soc_inst|m0_1|u_logic|Cc9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Exd3z4 , soc_inst|m0_1|u_logic|Exd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cc9wx4~1 , soc_inst|m0_1|u_logic|Cc9wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cc9wx4~3 , soc_inst|m0_1|u_logic|Cc9wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qk1wx4~0 , soc_inst|m0_1|u_logic|Qk1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ck1wx4~0 , soc_inst|m0_1|u_logic|Ck1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aj1wx4~0 , soc_inst|m0_1|u_logic|Aj1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aj1wx4~1 , soc_inst|m0_1|u_logic|Aj1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aj1wx4~2 , soc_inst|m0_1|u_logic|Aj1wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hpd3z4 , soc_inst|m0_1|u_logic|Hpd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~3 , soc_inst|m0_1|u_logic|Gm1wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X1e3z4 , soc_inst|m0_1|u_logic|X1e3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~1 , soc_inst|m0_1|u_logic|Gm1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ibe3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ibe3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uo5xx4~0 , soc_inst|m0_1|u_logic|Uo5xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~4 , soc_inst|m0_1|u_logic|Gm1wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wqd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Wqd3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~0 , soc_inst|m0_1|u_logic|Gm1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~2 , soc_inst|m0_1|u_logic|Gm1wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~5 , soc_inst|m0_1|u_logic|Gm1wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4 , soc_inst|m0_1|u_logic|Gm1wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[11]~7 , soc_inst|m0_1|u_logic|hwdata_o[11]~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bge3z4 , soc_inst|m0_1|u_logic|Bge3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zva3z4 , soc_inst|m0_1|u_logic|Zva3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~17 , soc_inst|m0_1|u_logic|Add0~17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~53 , soc_inst|m0_1|u_logic|Add0~53, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fqmvx4~0 , soc_inst|m0_1|u_logic|Fqmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|She3z4 , soc_inst|m0_1|u_logic|She3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~41 , soc_inst|m0_1|u_logic|Add0~41, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ypmvx4~0 , soc_inst|m0_1|u_logic|Ypmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iua3z4 , soc_inst|m0_1|u_logic|Iua3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~65 , soc_inst|m0_1|u_logic|Add0~65, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rpmvx4~0 , soc_inst|m0_1|u_logic|Rpmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K7g3z4 , soc_inst|m0_1|u_logic|K7g3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~81 , soc_inst|m0_1|u_logic|Add0~81, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kpmvx4~0 , soc_inst|m0_1|u_logic|Kpmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rsa3z4 , soc_inst|m0_1|u_logic|Rsa3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~1 , soc_inst|m0_1|u_logic|Add0~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dpmvx4~0 , soc_inst|m0_1|u_logic|Dpmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ara3z4 , soc_inst|m0_1|u_logic|Ara3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~77 , soc_inst|m0_1|u_logic|Add0~77, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O24wx4~0 , soc_inst|m0_1|u_logic|O24wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gdo2z4 , soc_inst|m0_1|u_logic|Gdo2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Womvx4~0 , soc_inst|m0_1|u_logic|Womvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xeo2z4 , soc_inst|m0_1|u_logic|Xeo2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[17]~16 , soc_inst|m0_1|u_logic|hwdata_o[17]~16, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B2i3z4 , soc_inst|m0_1|u_logic|B2i3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pomvx4~0 , soc_inst|m0_1|u_logic|Pomvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S3i3z4 , soc_inst|m0_1|u_logic|S3i3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bgfwx4~0 , soc_inst|m0_1|u_logic|Bgfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bgfwx4~1 , soc_inst|m0_1|u_logic|Bgfwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vq1wx4~0 , soc_inst|m0_1|u_logic|Vq1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vq1wx4~1 , soc_inst|m0_1|u_logic|Vq1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfhvx4~2 , soc_inst|m0_1|u_logic|Bfhvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V4d3z4 , soc_inst|m0_1|u_logic|V4d3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dmivx4~0 , soc_inst|m0_1|u_logic|Dmivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dmivx4~1 , soc_inst|m0_1|u_logic|Dmivx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G1s2z4 , soc_inst|m0_1|u_logic|G1s2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Konvx4~0 , soc_inst|m0_1|u_logic|Konvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ksbwx4~1 , soc_inst|m0_1|u_logic|Ksbwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ksbwx4~0 , soc_inst|m0_1|u_logic|Ksbwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ox1wx4~2 , soc_inst|m0_1|u_logic|Ox1wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iu1wx4~0 , soc_inst|m0_1|u_logic|Iu1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U2s2z4~feeder , soc_inst|m0_1|u_logic|U2s2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U2s2z4 , soc_inst|m0_1|u_logic|U2s2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cxc3z4 , soc_inst|m0_1|u_logic|Cxc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pybwx4~1 , soc_inst|m0_1|u_logic|Pybwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pybwx4~0 , soc_inst|m0_1|u_logic|Pybwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Duv2z4~DUPLICATE , soc_inst|m0_1|u_logic|Duv2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pybwx4~3 , soc_inst|m0_1|u_logic|Pybwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uku2z4 , soc_inst|m0_1|u_logic|Uku2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pybwx4~2 , soc_inst|m0_1|u_logic|Pybwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pybwx4 , soc_inst|m0_1|u_logic|Pybwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nodwx4~0 , soc_inst|m0_1|u_logic|Nodwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nodwx4~1 , soc_inst|m0_1|u_logic|Nodwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~20 , soc_inst|m0_1|u_logic|hwdata_o~20, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y1ivx4~0 , soc_inst|m0_1|u_logic|Y1ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hub3z4 , soc_inst|m0_1|u_logic|Hub3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qfc3z4~0 , soc_inst|m0_1|u_logic|Qfc3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qfc3z4 , soc_inst|m0_1|u_logic|Qfc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ihlwx4~0 , soc_inst|m0_1|u_logic|Ihlwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ihlwx4~1 , soc_inst|m0_1|u_logic|Ihlwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~49 , soc_inst|m0_1|u_logic|Add0~49, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wia3z4~0 , soc_inst|m0_1|u_logic|Wia3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wia3z4 , soc_inst|m0_1|u_logic|Wia3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jsmvx4~0 , soc_inst|m0_1|u_logic|Jsmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W0b3z4 , soc_inst|m0_1|u_logic|W0b3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ihlwx4~2 , soc_inst|m0_1|u_logic|Ihlwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ihlwx4~3 , soc_inst|m0_1|u_logic|Ihlwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qfzvx4~0 , soc_inst|m0_1|u_logic|Qfzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qfzvx4~1 , soc_inst|m0_1|u_logic|Qfzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~21 , soc_inst|m0_1|u_logic|Add2~21, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aihvx4~0 , soc_inst|m0_1|u_logic|Aihvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aihvx4~1 , soc_inst|m0_1|u_logic|Aihvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aihvx4~2 , soc_inst|m0_1|u_logic|Aihvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xsx2z4 , soc_inst|m0_1|u_logic|Xsx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~9 , soc_inst|m0_1|u_logic|Add2~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhhvx4~0 , soc_inst|m0_1|u_logic|Mhhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhhvx4~1 , soc_inst|m0_1|u_logic|Mhhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhhvx4~2 , soc_inst|m0_1|u_logic|Mhhvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vvx2z4 , soc_inst|m0_1|u_logic|Vvx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yhnvx4~0 , soc_inst|m0_1|u_logic|Yhnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yhnvx4~1 , soc_inst|m0_1|u_logic|Yhnvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cqo2z4 , soc_inst|m0_1|u_logic|Cqo2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cai3z4 , soc_inst|m0_1|u_logic|Cai3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Be62z4~0 , soc_inst|m0_1|u_logic|Be62z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ec62z4~1 , soc_inst|m0_1|u_logic|Ec62z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Na53z4 , soc_inst|m0_1|u_logic|Na53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ec62z4~0 , soc_inst|m0_1|u_logic|Ec62z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J5i3z4~DUPLICATE , soc_inst|m0_1|u_logic|J5i3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ec62z4~2 , soc_inst|m0_1|u_logic|Ec62z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ec62z4~3 , soc_inst|m0_1|u_logic|Ec62z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q8zvx4~0 , soc_inst|m0_1|u_logic|Q8zvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L9zvx4~1 , soc_inst|m0_1|u_logic|L9zvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L9zvx4~2 , soc_inst|m0_1|u_logic|L9zvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L9zvx4~0 , soc_inst|m0_1|u_logic|L9zvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L9zvx4 , soc_inst|m0_1|u_logic|L9zvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F6zvx4~1 , soc_inst|m0_1|u_logic|F6zvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F6zvx4~2 , soc_inst|m0_1|u_logic|F6zvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F6zvx4~0 , soc_inst|m0_1|u_logic|F6zvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rro2z4~feeder , soc_inst|m0_1|u_logic|Rro2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rro2z4 , soc_inst|m0_1|u_logic|Rro2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uu83z4 , soc_inst|m0_1|u_logic|Uu83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Saqwx4~1 , soc_inst|m0_1|u_logic|Saqwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gto2z4 , soc_inst|m0_1|u_logic|Gto2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fxu2z4~DUPLICATE , soc_inst|m0_1|u_logic|Fxu2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Saqwx4~3 , soc_inst|m0_1|u_logic|Saqwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wj63z4~DUPLICATE , soc_inst|m0_1|u_logic|Wj63z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Saqwx4~0 , soc_inst|m0_1|u_logic|Saqwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wnt2z4 , soc_inst|m0_1|u_logic|Wnt2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ft73z4~DUPLICATE , soc_inst|m0_1|u_logic|Ft73z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Saqwx4~2 , soc_inst|m0_1|u_logic|Saqwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Saqwx4 , soc_inst|m0_1|u_logic|Saqwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kepwx4~0 , soc_inst|m0_1|u_logic|Kepwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Beowx4~1 , soc_inst|m0_1|u_logic|Beowx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q7ewx4~0 , soc_inst|m0_1|u_logic|Q7ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q7ewx4~1 , soc_inst|m0_1|u_logic|Q7ewx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE , soc_inst|m0_1|u_logic|B1a3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tyywx4~0 , soc_inst|m0_1|u_logic|Tyywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE , soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uqi2z4 , soc_inst|m0_1|u_logic|Uqi2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hzywx4~0 , soc_inst|m0_1|u_logic|Hzywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~18 , soc_inst|m0_1|u_logic|hwdata_o~18, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hzj2z4 , soc_inst|m0_1|u_logic|Hzj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M5mvx4~0 , soc_inst|m0_1|u_logic|M5mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S5b3z4 , soc_inst|m0_1|u_logic|S5b3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~10 , soc_inst|m0_1|u_logic|hwdata_o~10, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ynvvx4 , soc_inst|m0_1|u_logic|Ynvvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M5mvx4~1 , soc_inst|m0_1|u_logic|M5mvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Hzj2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE , soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bec3z4~0 , soc_inst|m0_1|u_logic|Bec3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bec3z4 , soc_inst|m0_1|u_logic|Bec3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ckuvx4~0 , soc_inst|m0_1|u_logic|Ckuvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F2ivx4~0 , soc_inst|m0_1|u_logic|F2ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pxb3z4 , soc_inst|m0_1|u_logic|Pxb3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D0wwx4~0 , soc_inst|m0_1|u_logic|D0wwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D0wwx4~1 , soc_inst|m0_1|u_logic|D0wwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I90xx4~0 , soc_inst|m0_1|u_logic|I90xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iuuvx4~0 , soc_inst|m0_1|u_logic|Iuuvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K1ivx4~0 , soc_inst|m0_1|u_logic|K1ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE , soc_inst|m0_1|u_logic|N7c3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uic3z4~0 , soc_inst|m0_1|u_logic|Uic3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uic3z4 , soc_inst|m0_1|u_logic|Uic3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bmb3z4 , soc_inst|m0_1|u_logic|Bmb3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE , soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wzvwx4~0 , soc_inst|m0_1|u_logic|Wzvwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wzvwx4~1 , soc_inst|m0_1|u_logic|Wzvwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jjuwx4~0 , soc_inst|m0_1|u_logic|Jjuwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Douvx4~0 , soc_inst|m0_1|u_logic|Douvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W0ivx4~0 , soc_inst|m0_1|u_logic|W0ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X0c3z4 , soc_inst|m0_1|u_logic|X0c3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ylc3z4~0 , soc_inst|m0_1|u_logic|Ylc3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ylc3z4 , soc_inst|m0_1|u_logic|Ylc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z4l2z4 , soc_inst|m0_1|u_logic|Z4l2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H8l2z4~DUPLICATE , soc_inst|m0_1|u_logic|H8l2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A50xx4~0 , soc_inst|m0_1|u_logic|A50xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ayzwx4 , soc_inst|m0_1|u_logic|Ayzwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jjuwx4~1 , soc_inst|m0_1|u_logic|Jjuwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE , soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K9ovx4~0 , soc_inst|m0_1|u_logic|K9ovx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T2ivx4~0 , soc_inst|m0_1|u_logic|T2ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gxk2z4 , soc_inst|m0_1|u_logic|Gxk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mcc3z4 , soc_inst|m0_1|u_logic|Mcc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mcc3z4~0 , soc_inst|m0_1|u_logic|Mcc3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mcc3z4~DUPLICATE , soc_inst|m0_1|u_logic|Mcc3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zad3z4 , soc_inst|m0_1|u_logic|Zad3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ruvvx4~0 , soc_inst|m0_1|u_logic|Ruvvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M2ivx4~0 , soc_inst|m0_1|u_logic|M2ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE , soc_inst|m0_1|u_logic|Vac3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G10xx4~0 , soc_inst|m0_1|u_logic|G10xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ztc3z4~0 , soc_inst|m0_1|u_logic|Ztc3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ztc3z4 , soc_inst|m0_1|u_logic|Ztc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G10xx4~1 , soc_inst|m0_1|u_logic|G10xx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fb0xx4~0 , soc_inst|m0_1|u_logic|Fb0xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S00xx4~0 , soc_inst|m0_1|u_logic|S00xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I90xx4~1 , soc_inst|m0_1|u_logic|I90xx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tb0xx4~0 , soc_inst|m0_1|u_logic|Tb0xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B90xx4~0 , soc_inst|m0_1|u_logic|B90xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cjuwx4~0 , soc_inst|m0_1|u_logic|Cjuwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wvzwx4~1 , soc_inst|m0_1|u_logic|Wvzwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pwywx4~0 , soc_inst|m0_1|u_logic|Pwywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qrp2z4 , soc_inst|m0_1|u_logic|Qrp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hdzwx4~0 , soc_inst|m0_1|u_logic|Hdzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Usl2z4 , soc_inst|m0_1|u_logic|Usl2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N10xx4~0 , soc_inst|m0_1|u_logic|N10xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F40xx4~0 , soc_inst|m0_1|u_logic|F40xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Adzwx4~0 , soc_inst|m0_1|u_logic|Adzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wvzwx4~0 , soc_inst|m0_1|u_logic|Wvzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I90xx4~2 , soc_inst|m0_1|u_logic|I90xx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A6zwx4~0 , soc_inst|m0_1|u_logic|A6zwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wuq2z4 , soc_inst|m0_1|u_logic|Wuq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yauvx4~0 , soc_inst|m0_1|u_logic|Yauvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gzhvx4~0 , soc_inst|m0_1|u_logic|Gzhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tqzwx4~0 , soc_inst|m0_1|u_logic|Tqzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jsa2z4~0 , soc_inst|m0_1|u_logic|Jsa2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Syhvx4~0 , soc_inst|m0_1|u_logic|Syhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lul2z4 , soc_inst|m0_1|u_logic|Lul2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jsc3z4 , soc_inst|m0_1|u_logic|Jsc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jsc3z4~0 , soc_inst|m0_1|u_logic|Jsc3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE , soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tqc3z4~DUPLICATE , soc_inst|m0_1|u_logic|Tqc3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cps2z4 , soc_inst|m0_1|u_logic|Cps2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uls2z4 , soc_inst|m0_1|u_logic|Uls2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xwvwx4~0 , soc_inst|m0_1|u_logic|Xwvwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xwvwx4~1 , soc_inst|m0_1|u_logic|Xwvwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Arzwx4~1 , soc_inst|m0_1|u_logic|Arzwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vgs2z4 , soc_inst|m0_1|u_logic|Vgs2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tib3z4 , soc_inst|m0_1|u_logic|Tib3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dizwx4~0 , soc_inst|m0_1|u_logic|Dizwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kizwx4~0 , soc_inst|m0_1|u_logic|Kizwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fczwx4~0 , soc_inst|m0_1|u_logic|Fczwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K9vvx4~0 , soc_inst|m0_1|u_logic|K9vvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uzhvx4~0 , soc_inst|m0_1|u_logic|Uzhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ble3z4 , soc_inst|m0_1|u_logic|Ble3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lee3z4~0 , soc_inst|m0_1|u_logic|Lee3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lee3z4 , soc_inst|m0_1|u_logic|Lee3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[10]~9 , soc_inst|m0_1|u_logic|hwdata_o[10]~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wva2z4~0 , soc_inst|m0_1|u_logic|Wva2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B0ivx4~0 , soc_inst|m0_1|u_logic|B0ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ipn2z4 , soc_inst|m0_1|u_logic|Ipn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nnc3z4~0 , soc_inst|m0_1|u_logic|Nnc3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nnc3z4 , soc_inst|m0_1|u_logic|Nnc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Azs2z4 , soc_inst|m0_1|u_logic|Azs2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Svs2z4 , soc_inst|m0_1|u_logic|Svs2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gyvwx4~0 , soc_inst|m0_1|u_logic|Gyvwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gyvwx4~1 , soc_inst|m0_1|u_logic|Gyvwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B6pwx4~0 , soc_inst|m0_1|u_logic|B6pwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H2f3z4~0 , soc_inst|m0_1|u_logic|H2f3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H2f3z4 , soc_inst|m0_1|u_logic|H2f3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T8f3z4 , soc_inst|m0_1|u_logic|T8f3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mhvvx4~0 , soc_inst|m0_1|u_logic|Mhvvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P0ivx4~0 , soc_inst|m0_1|u_logic|P0ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE , soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE , soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tqs2z4 , soc_inst|m0_1|u_logic|Tqs2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kkb3z4 , soc_inst|m0_1|u_logic|Kkb3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Whzwx4~0 , soc_inst|m0_1|u_logic|Whzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Whzwx4~1 , soc_inst|m0_1|u_logic|Whzwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fjzwx4~0 , soc_inst|m0_1|u_logic|Fjzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qlzwx4~0 , soc_inst|m0_1|u_logic|Qlzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yizwx4~0 , soc_inst|m0_1|u_logic|Yizwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mczwx4~0 , soc_inst|m0_1|u_logic|Mczwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B6pwx4~1 , soc_inst|m0_1|u_logic|B6pwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B6pwx4~3 , soc_inst|m0_1|u_logic|B6pwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE , soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iazwx4~0 , soc_inst|m0_1|u_logic|Iazwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J7zwx4~0 , soc_inst|m0_1|u_logic|J7zwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ihzwx4~0 , soc_inst|m0_1|u_logic|Ihzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Clzwx4~0 , soc_inst|m0_1|u_logic|Clzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T5zwx4~0 , soc_inst|m0_1|u_logic|T5zwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B6pwx4~2 , soc_inst|m0_1|u_logic|B6pwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H6zwx4~0 , soc_inst|m0_1|u_logic|H6zwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ozywx4~0 , soc_inst|m0_1|u_logic|Ozywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J0zwx4~0 , soc_inst|m0_1|u_logic|J0zwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vzywx4~0 , soc_inst|m0_1|u_logic|Vzywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kbzwx4~0 , soc_inst|m0_1|u_logic|Kbzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE , soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jzzwx4~0 , soc_inst|m0_1|u_logic|Jzzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qzzwx4~0 , soc_inst|m0_1|u_logic|Qzzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Czzwx4~0 , soc_inst|m0_1|u_logic|Czzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R4zwx4~0 , soc_inst|m0_1|u_logic|R4zwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vzywx4~1 , soc_inst|m0_1|u_logic|Vzywx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gvywx4~0 , soc_inst|m0_1|u_logic|Gvywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E5owx4~0 , soc_inst|m0_1|u_logic|E5owx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C0zwx4~0 , soc_inst|m0_1|u_logic|C0zwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X2rvx4~0 , soc_inst|m0_1|u_logic|X2rvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pjyvx4~0 , soc_inst|m0_1|u_logic|Pjyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ahowx4~0 , soc_inst|m0_1|u_logic|Ahowx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tgowx4~0 , soc_inst|m0_1|u_logic|Tgowx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tlyvx4~0 , soc_inst|m0_1|u_logic|Tlyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tlyvx4~1 , soc_inst|m0_1|u_logic|Tlyvx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Rkyvx4~0 , soc_inst|m0_1|u_logic|Rkyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I21wx4~0 , soc_inst|m0_1|u_logic|I21wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L01wx4~0 , soc_inst|m0_1|u_logic|L01wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qz0wx4~0 , soc_inst|m0_1|u_logic|Qz0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qz0wx4~1 , soc_inst|m0_1|u_logic|Qz0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qz0wx4~2 , soc_inst|m0_1|u_logic|Qz0wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J5o2z4 , soc_inst|m0_1|u_logic|J5o2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jl93z4 , soc_inst|m0_1|u_logic|Jl93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nrvwx4~1 , soc_inst|m0_1|u_logic|Nrvwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J773z4 , soc_inst|m0_1|u_logic|J773z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N8o2z4~DUPLICATE , soc_inst|m0_1|u_logic|N8o2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nrvwx4~0 , soc_inst|m0_1|u_logic|Nrvwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y6o2z4 , soc_inst|m0_1|u_logic|Y6o2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Skv2z4~DUPLICATE , soc_inst|m0_1|u_logic|Skv2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nrvwx4~3 , soc_inst|m0_1|u_logic|Nrvwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jbu2z4~DUPLICATE , soc_inst|m0_1|u_logic|Jbu2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nrvwx4~2 , soc_inst|m0_1|u_logic|Nrvwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nrvwx4 , soc_inst|m0_1|u_logic|Nrvwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E1ewx4~0 , soc_inst|m0_1|u_logic|E1ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E1ewx4~1 , soc_inst|m0_1|u_logic|E1ewx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U18wx4~0 , soc_inst|m0_1|u_logic|U18wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pjyvx4~1 , soc_inst|m0_1|u_logic|Pjyvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pjyvx4~2 , soc_inst|m0_1|u_logic|Pjyvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pjyvx4~3 , soc_inst|m0_1|u_logic|Pjyvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[8]~28 , soc_inst|ram_1|data_to_memory[8]~28, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0, de1_soc_wrapper, 1
+instance = comp, \SW[8]~input , SW[8]~input, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[0][8] , soc_inst|switches_1|switch_store[0][8], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[8]~33 , soc_inst|interconnect_1|HRDATA[8]~33, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE , soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hmyvx4~0 , soc_inst|m0_1|u_logic|Hmyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hmyvx4~1 , soc_inst|m0_1|u_logic|Hmyvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hmyvx4~2 , soc_inst|m0_1|u_logic|Hmyvx4~2, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|O3pvx4~0 , soc_inst|m0_1|u_logic|O3pvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|O3pvx4~1 , soc_inst|m0_1|u_logic|O3pvx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Rqzvx4~0 , soc_inst|m0_1|u_logic|Rqzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C183z4 , soc_inst|m0_1|u_logic|C183z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R293z4~feeder , soc_inst|m0_1|u_logic|R293z4~feeder, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|R293z4 , soc_inst|m0_1|u_logic|R293z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~7 , soc_inst|m0_1|u_logic|Eacwx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~8 , soc_inst|m0_1|u_logic|Eacwx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C5v2z4 , soc_inst|m0_1|u_logic|C5v2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tvt2z4 , soc_inst|m0_1|u_logic|Tvt2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~0 , soc_inst|m0_1|u_logic|Eacwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B943z4~DUPLICATE , soc_inst|m0_1|u_logic|B943z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~2 , soc_inst|m0_1|u_logic|Eacwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~1 , soc_inst|m0_1|u_logic|Eacwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q7j2z4~DUPLICATE , soc_inst|m0_1|u_logic|Q7j2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~4 , soc_inst|m0_1|u_logic|Eacwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ki53z4 , soc_inst|m0_1|u_logic|Ki53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sz23z4~DUPLICATE , soc_inst|m0_1|u_logic|Sz23z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~3 , soc_inst|m0_1|u_logic|Eacwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~5 , soc_inst|m0_1|u_logic|Eacwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~6 , soc_inst|m0_1|u_logic|Eacwx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~9 , soc_inst|m0_1|u_logic|Eacwx4~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rih2z4~0 , soc_inst|m0_1|u_logic|Rih2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~113 , soc_inst|m0_1|u_logic|Add2~113, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zpj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Zpj2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mnvwx4~1 , soc_inst|m0_1|u_logic|Mnvwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C5v2z4~DUPLICATE , soc_inst|m0_1|u_logic|C5v2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mnvwx4~3 , soc_inst|m0_1|u_logic|Mnvwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C183z4~DUPLICATE , soc_inst|m0_1|u_logic|C183z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mnvwx4~2 , soc_inst|m0_1|u_logic|Mnvwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mnvwx4~0 , soc_inst|m0_1|u_logic|Mnvwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mnvwx4 , soc_inst|m0_1|u_logic|Mnvwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mrdwx4~0 , soc_inst|m0_1|u_logic|Mrdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mrdwx4~1 , soc_inst|m0_1|u_logic|Mrdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jymwx4~0 , soc_inst|m0_1|u_logic|Jymwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jymwx4~1 , soc_inst|m0_1|u_logic|Jymwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N7c3z4 , soc_inst|m0_1|u_logic|N7c3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cymwx4~0 , soc_inst|m0_1|u_logic|Cymwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cymwx4~1 , soc_inst|m0_1|u_logic|Cymwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cymwx4~2 , soc_inst|m0_1|u_logic|Cymwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cymwx4~3 , soc_inst|m0_1|u_logic|Cymwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qe0wx4~0 , soc_inst|m0_1|u_logic|Qe0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qe0wx4 , soc_inst|m0_1|u_logic|Qe0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Je0wx4~0 , soc_inst|m0_1|u_logic|Je0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mc0wx4~1 , soc_inst|m0_1|u_logic|Mc0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mc0wx4~0 , soc_inst|m0_1|u_logic|Mc0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tch3z4 , soc_inst|m0_1|u_logic|Tch3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iq82z4~0 , soc_inst|m0_1|u_logic|Iq82z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lo82z4~1 , soc_inst|m0_1|u_logic|Lo82z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lo82z4~2 , soc_inst|m0_1|u_logic|Lo82z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ji43z4~DUPLICATE , soc_inst|m0_1|u_logic|Ji43z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lo82z4~0 , soc_inst|m0_1|u_logic|Lo82z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lo82z4~3 , soc_inst|m0_1|u_logic|Lo82z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lf0wx4~0 , soc_inst|m0_1|u_logic|Lf0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~1 , soc_inst|m0_1|u_logic|Add5~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~61 , soc_inst|m0_1|u_logic|Add2~61, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~105 , soc_inst|m0_1|u_logic|Add2~105, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~117 , soc_inst|m0_1|u_logic|Add2~117, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zdhvx4~0 , soc_inst|m0_1|u_logic|Zdhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oa3wx4~0 , soc_inst|m0_1|u_logic|Oa3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oa3wx4~1 , soc_inst|m0_1|u_logic|Oa3wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oa3wx4 , soc_inst|m0_1|u_logic|Oa3wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zdhvx4~1 , soc_inst|m0_1|u_logic|Zdhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kaf3z4 , soc_inst|m0_1|u_logic|Kaf3z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Duhvx4~0 , soc_inst|m0_1|u_logic|Duhvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Duhvx4~1 , soc_inst|m0_1|u_logic|Duhvx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Xyk2z4 , soc_inst|m0_1|u_logic|Xyk2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oihvx4~0 , soc_inst|m0_1|u_logic|Oihvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oihvx4~1 , soc_inst|m0_1|u_logic|Oihvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ppzvx4~0 , soc_inst|m0_1|u_logic|Ppzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ppzvx4~1 , soc_inst|m0_1|u_logic|Ppzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oihvx4~2 , soc_inst|m0_1|u_logic|Oihvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zpx2z4 , soc_inst|m0_1|u_logic|Zpx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rnovx4 , soc_inst|m0_1|u_logic|Rnovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C1lvx4~0 , soc_inst|m0_1|u_logic|C1lvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lgi3z4 , soc_inst|m0_1|u_logic|Lgi3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uo13z4~DUPLICATE , soc_inst|m0_1|u_logic|Uo13z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~109 , soc_inst|m0_1|u_logic|Add3~109, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y1pvx4 , soc_inst|m0_1|u_logic|Y1pvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vjnvx4~0 , soc_inst|m0_1|u_logic|Vjnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vjnvx4~1 , soc_inst|m0_1|u_logic|Vjnvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q7j2z4 , soc_inst|m0_1|u_logic|Q7j2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Dy23z4~DUPLICATE , soc_inst|m0_1|u_logic|Dy23z4~DUPLICATE, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Py72z4~1 , soc_inst|m0_1|u_logic|Py72z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Igl2z4 , soc_inst|m0_1|u_logic|Igl2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M082z4~0 , soc_inst|m0_1|u_logic|M082z4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Wo03z4~DUPLICATE , soc_inst|m0_1|u_logic|Wo03z4~DUPLICATE, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Py72z4~2 , soc_inst|m0_1|u_logic|Py72z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M743z4~DUPLICATE , soc_inst|m0_1|u_logic|M743z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vg53z4 , soc_inst|m0_1|u_logic|Vg53z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Py72z4~0 , soc_inst|m0_1|u_logic|Py72z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE , soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M082z4~0 , soc_inst|m0_1|u_logic|M082z4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Py72z4~3 , soc_inst|m0_1|u_logic|Py72z4~3, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Nozvx4~0 , soc_inst|m0_1|u_logic|Nozvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uozvx4~1 , soc_inst|m0_1|u_logic|Uozvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uozvx4~0 , soc_inst|m0_1|u_logic|Uozvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Locvx4 , soc_inst|m0_1|u_logic|Locvx4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Xmzvx4~0 , soc_inst|m0_1|u_logic|Xmzvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Xmzvx4~1 , soc_inst|m0_1|u_logic|Xmzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xmzvx4~2 , soc_inst|m0_1|u_logic|Xmzvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N3v2z4 , soc_inst|m0_1|u_logic|N3v2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U7uwx4~0 , soc_inst|m0_1|u_logic|U7uwx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE , soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nz73z4~DUPLICATE , soc_inst|m0_1|u_logic|Nz73z4~DUPLICATE, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|U7uwx4~1 , soc_inst|m0_1|u_logic|U7uwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Edl2z4~DUPLICATE , soc_inst|m0_1|u_logic|Edl2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pbl2z4~DUPLICATE , soc_inst|m0_1|u_logic|Pbl2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U7uwx4~0 , soc_inst|m0_1|u_logic|U7uwx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|U7uwx4 , soc_inst|m0_1|u_logic|U7uwx4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Uvdwx4~0 , soc_inst|m0_1|u_logic|Uvdwx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Gvdwx4~0 , soc_inst|m0_1|u_logic|Gvdwx4~0, de1_soc_wrapper, 1
-instance = comp, \SW[5]~input , SW[5]~input, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[1][5] , soc_inst|switches_1|switch_store[1][5], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[21]~47 , soc_inst|interconnect_1|HRDATA[21]~47, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jymwx4~0 , soc_inst|m0_1|u_logic|Jymwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jymwx4~1 , soc_inst|m0_1|u_logic|Jymwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mb1wx4~1 , soc_inst|m0_1|u_logic|Mb1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M5ewx4~0 , soc_inst|m0_1|u_logic|M5ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pgfwx4~0 , soc_inst|m0_1|u_logic|Pgfwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pgfwx4~1 , soc_inst|m0_1|u_logic|Pgfwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ppzvx4~0 , soc_inst|m0_1|u_logic|Ppzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ppzvx4~1 , soc_inst|m0_1|u_logic|Ppzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oihvx4~2 , soc_inst|m0_1|u_logic|Oihvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oihvx4~1 , soc_inst|m0_1|u_logic|Oihvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oihvx4~0 , soc_inst|m0_1|u_logic|Oihvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zpx2z4 , soc_inst|m0_1|u_logic|Zpx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~73 , soc_inst|m0_1|u_logic|Add3~73, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rnovx4 , soc_inst|m0_1|u_logic|Rnovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C1lvx4~0 , soc_inst|m0_1|u_logic|C1lvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lgi3z4 , soc_inst|m0_1|u_logic|Lgi3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE , soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ow23z4~feeder , soc_inst|m0_1|u_logic|Ow23z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ow23z4 , soc_inst|m0_1|u_logic|Ow23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fn13z4~feeder , soc_inst|m0_1|u_logic|Fn13z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fn13z4 , soc_inst|m0_1|u_logic|Fn13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ds72z4~1 , soc_inst|m0_1|u_logic|Ds72z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X543z4 , soc_inst|m0_1|u_logic|X543z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ds72z4~0 , soc_inst|m0_1|u_logic|Ds72z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hn03z4 , soc_inst|m0_1|u_logic|Hn03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nqz2z4 , soc_inst|m0_1|u_logic|Nqz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ds72z4~2 , soc_inst|m0_1|u_logic|Ds72z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O5k2z4 , soc_inst|m0_1|u_logic|O5k2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Au72z4~0 , soc_inst|m0_1|u_logic|Au72z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ds72z4~3 , soc_inst|m0_1|u_logic|Ds72z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hlzvx4~0 , soc_inst|m0_1|u_logic|Hlzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rjzvx4~1 , soc_inst|m0_1|u_logic|Rjzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uhzvx4~1 , soc_inst|m0_1|u_logic|Uhzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uhzvx4~0 , soc_inst|m0_1|u_logic|Uhzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gf53z4 , soc_inst|m0_1|u_logic|Gf53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~3 , soc_inst|m0_1|u_logic|Djzvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fn13z4~DUPLICATE , soc_inst|m0_1|u_logic|Fn13z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~0 , soc_inst|m0_1|u_logic|Djzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~2 , soc_inst|m0_1|u_logic|Djzvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yx73z4 , soc_inst|m0_1|u_logic|Yx73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~6 , soc_inst|m0_1|u_logic|Djzvx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE , soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Po63z4~DUPLICATE , soc_inst|m0_1|u_logic|Po63z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~5 , soc_inst|m0_1|u_logic|Djzvx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~7 , soc_inst|m0_1|u_logic|Djzvx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~1 , soc_inst|m0_1|u_logic|Djzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nqz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Nqz2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE , soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D7k2z4 , soc_inst|m0_1|u_logic|D7k2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~4 , soc_inst|m0_1|u_logic|Djzvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djzvx4 , soc_inst|m0_1|u_logic|Djzvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H3awx4~0 , soc_inst|m0_1|u_logic|H3awx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~89 , soc_inst|m0_1|u_logic|Add5~89, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zbbwx4~0 , soc_inst|m0_1|u_logic|Zbbwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cfzvx4~0 , soc_inst|m0_1|u_logic|Cfzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cfzvx4~1 , soc_inst|m0_1|u_logic|Cfzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE , soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~0 , soc_inst|m0_1|u_logic|Pdbwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE , soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hmh3z4 , soc_inst|m0_1|u_logic|Hmh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|An63z4 , soc_inst|m0_1|u_logic|An63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yx83z4~DUPLICATE , soc_inst|m0_1|u_logic|Yx83z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~7 , soc_inst|m0_1|u_logic|Pdbwx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~8 , soc_inst|m0_1|u_logic|Pdbwx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE , soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rd53z4 , soc_inst|m0_1|u_logic|Rd53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~3 , soc_inst|m0_1|u_logic|Pdbwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I443z4 , soc_inst|m0_1|u_logic|I443z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gfq2z4 , soc_inst|m0_1|u_logic|Gfq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~2 , soc_inst|m0_1|u_logic|Pdbwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~4 , soc_inst|m0_1|u_logic|Pdbwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ql13z4 , soc_inst|m0_1|u_logic|Ql13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~1 , soc_inst|m0_1|u_logic|Pdbwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Skh3z4 , soc_inst|m0_1|u_logic|Skh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djh3z4 , soc_inst|m0_1|u_logic|Djh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~5 , soc_inst|m0_1|u_logic|Pdbwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~6 , soc_inst|m0_1|u_logic|Pdbwx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4 , soc_inst|m0_1|u_logic|Pdbwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yih2z4~0 , soc_inst|m0_1|u_logic|Yih2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~85 , soc_inst|m0_1|u_logic|Add5~85, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mdzvx4~1 , soc_inst|m0_1|u_logic|Mdzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fdzvx4~0 , soc_inst|m0_1|u_logic|Fdzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jlo2z4~feeder , soc_inst|m0_1|u_logic|Jlo2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jlo2z4 , soc_inst|m0_1|u_logic|Jlo2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bk13z4~feeder , soc_inst|m0_1|u_logic|Bk13z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE , soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~0 , soc_inst|m0_1|u_logic|Rtpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T243z4 , soc_inst|m0_1|u_logic|T243z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~2 , soc_inst|m0_1|u_logic|Rtpvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE , soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kt23z4 , soc_inst|m0_1|u_logic|Kt23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~3 , soc_inst|m0_1|u_logic|Rtpvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ujo2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ujo2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~1 , soc_inst|m0_1|u_logic|Rtpvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yoz2z4 , soc_inst|m0_1|u_logic|Yoz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Noo2z4 , soc_inst|m0_1|u_logic|Noo2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sl03z4 , soc_inst|m0_1|u_logic|Sl03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~4 , soc_inst|m0_1|u_logic|Rtpvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uu73z4 , soc_inst|m0_1|u_logic|Uu73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ymo2z4 , soc_inst|m0_1|u_logic|Ymo2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~5 , soc_inst|m0_1|u_logic|Rtpvx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~6 , soc_inst|m0_1|u_logic|Rtpvx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~7 , soc_inst|m0_1|u_logic|Rtpvx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4 , soc_inst|m0_1|u_logic|Rtpvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~12 , soc_inst|m0_1|u_logic|hwdata_o~12, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[29]~22 , soc_inst|ram_1|data_to_memory[29]~22, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[13]~21 , soc_inst|ram_1|data_to_memory[13]~21, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hxmwx4~0 , soc_inst|m0_1|u_logic|Hxmwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hxmwx4~1 , soc_inst|m0_1|u_logic|Hxmwx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Mb1wx4~0 , soc_inst|m0_1|u_logic|Mb1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mb1wx4~2 , soc_inst|m0_1|u_logic|Mb1wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Da1wx4~0 , soc_inst|m0_1|u_logic|Da1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B91wx4~0 , soc_inst|m0_1|u_logic|B91wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B91wx4~1 , soc_inst|m0_1|u_logic|B91wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B91wx4~2 , soc_inst|m0_1|u_logic|B91wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lqr2z4 , soc_inst|m0_1|u_logic|Lqr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~4 , soc_inst|m0_1|u_logic|Hc1wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vr43z4 , soc_inst|m0_1|u_logic|Vr43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vxf3z4~DUPLICATE , soc_inst|m0_1|u_logic|Vxf3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~2 , soc_inst|m0_1|u_logic|Hc1wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~1 , soc_inst|m0_1|u_logic|Hc1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O2g3z4 , soc_inst|m0_1|u_logic|O2g3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X94xx4~0 , soc_inst|m0_1|u_logic|X94xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kzf3z4 , soc_inst|m0_1|u_logic|Kzf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~3 , soc_inst|m0_1|u_logic|Hc1wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wor2z4 , soc_inst|m0_1|u_logic|Wor2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~0 , soc_inst|m0_1|u_logic|Hc1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~5 , soc_inst|m0_1|u_logic|Hc1wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4 , soc_inst|m0_1|u_logic|Hc1wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[13]~10 , soc_inst|m0_1|u_logic|hwdata_o[13]~10, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yauvx4~0 , soc_inst|m0_1|u_logic|Yauvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gzhvx4~0 , soc_inst|m0_1|u_logic|Gzhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wuq2z4 , soc_inst|m0_1|u_logic|Wuq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Geuwx4~0 , soc_inst|m0_1|u_logic|Geuwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Garwx4~0 , soc_inst|m0_1|u_logic|Garwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bspvx4~0 , soc_inst|m0_1|u_logic|Bspvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bspvx4~1 , soc_inst|m0_1|u_logic|Bspvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mj7wx4~0 , soc_inst|m0_1|u_logic|Mj7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mj7wx4~1 , soc_inst|m0_1|u_logic|Mj7wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Po73z4 , soc_inst|m0_1|u_logic|Po73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gjt2z4~DUPLICATE , soc_inst|m0_1|u_logic|Gjt2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xowwx4~1 , soc_inst|m0_1|u_logic|Xowwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qml2z4 , soc_inst|m0_1|u_logic|Qml2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xowwx4~0 , soc_inst|m0_1|u_logic|Xowwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xowwx4 , soc_inst|m0_1|u_logic|Xowwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ok7wx4~0 , soc_inst|m0_1|u_logic|Ok7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jl7wx4~0 , soc_inst|m0_1|u_logic|Jl7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Et7wx4~0 , soc_inst|m0_1|u_logic|Et7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fc7wx4~0 , soc_inst|m0_1|u_logic|Fc7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Po7wx4~0 , soc_inst|m0_1|u_logic|Po7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fc7wx4~1 , soc_inst|m0_1|u_logic|Fc7wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nu7wx4~0 , soc_inst|m0_1|u_logic|Nu7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dtpvx4~2 , soc_inst|m0_1|u_logic|Dtpvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dtpvx4~0 , soc_inst|m0_1|u_logic|Dtpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~129 , soc_inst|m0_1|u_logic|Add5~129, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dtpvx4~1 , soc_inst|m0_1|u_logic|Dtpvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zei2z4~0 , soc_inst|m0_1|u_logic|Zei2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zei2z4~1 , soc_inst|m0_1|u_logic|Zei2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zei2z4 , soc_inst|m0_1|u_logic|Zei2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qynvx4~0 , soc_inst|m0_1|u_logic|Qynvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qynvx4~1 , soc_inst|m0_1|u_logic|Qynvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vxnvx4~1 , soc_inst|m0_1|u_logic|Vxnvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~134 , soc_inst|m0_1|u_logic|Add5~134, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G5qvx4~2 , soc_inst|m0_1|u_logic|G5qvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G5qvx4~3 , soc_inst|m0_1|u_logic|G5qvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ek03z4~feeder , soc_inst|m0_1|u_logic|Ek03z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ek03z4 , soc_inst|m0_1|u_logic|Ek03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qz33z4~DUPLICATE , soc_inst|m0_1|u_logic|Qz33z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yg13z4 , soc_inst|m0_1|u_logic|Yg13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zhyvx4~0 , soc_inst|m0_1|u_logic|Zhyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D4mvx4~1 , soc_inst|m0_1|u_logic|D4mvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D4mvx4~0 , soc_inst|m0_1|u_logic|D4mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D4mvx4~2 , soc_inst|m0_1|u_logic|D4mvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iwp2z4 , soc_inst|m0_1|u_logic|Iwp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hq23z4 , soc_inst|m0_1|u_logic|Hq23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z853z4 , soc_inst|m0_1|u_logic|Z853z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Knz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Knz2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zhyvx4~2 , soc_inst|m0_1|u_logic|Zhyvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zhyvx4~1 , soc_inst|m0_1|u_logic|Zhyvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zhyvx4 , soc_inst|m0_1|u_logic|Zhyvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~19 , soc_inst|m0_1|u_logic|hwdata_o~19, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tna3z4 , soc_inst|m0_1|u_logic|Tna3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~37 , soc_inst|m0_1|u_logic|Add0~37, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Taa3z4~0 , soc_inst|m0_1|u_logic|Taa3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Taa3z4~DUPLICATE , soc_inst|m0_1|u_logic|Taa3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Csmvx4~0 , soc_inst|m0_1|u_logic|Csmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gza3z4 , soc_inst|m0_1|u_logic|Gza3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~61 , soc_inst|m0_1|u_logic|Add0~61, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mka3z4~0 , soc_inst|m0_1|u_logic|Mka3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mka3z4 , soc_inst|m0_1|u_logic|Mka3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vrmvx4~0 , soc_inst|m0_1|u_logic|Vrmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qxa3z4 , soc_inst|m0_1|u_logic|Qxa3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~85 , soc_inst|m0_1|u_logic|Add0~85, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ormvx4~0 , soc_inst|m0_1|u_logic|Ormvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z8b3z4 , soc_inst|m0_1|u_logic|Z8b3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~9 , soc_inst|m0_1|u_logic|Add0~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hrmvx4~0 , soc_inst|m0_1|u_logic|Hrmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dhb3z4 , soc_inst|m0_1|u_logic|Dhb3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M5f3z4 , soc_inst|m0_1|u_logic|M5f3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W3f3z4 , soc_inst|m0_1|u_logic|W3f3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Armvx4~0 , soc_inst|m0_1|u_logic|Armvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE , soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oytvx4~0 , soc_inst|m0_1|u_logic|Oytvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oytvx4~1 , soc_inst|m0_1|u_logic|Oytvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE , soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oytvx4~3 , soc_inst|m0_1|u_logic|Oytvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oytvx4~2 , soc_inst|m0_1|u_logic|Oytvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oytvx4~4 , soc_inst|m0_1|u_logic|Oytvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oytvx4 , soc_inst|m0_1|u_logic|Oytvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mxtvx4 , soc_inst|m0_1|u_logic|Mxtvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mb1wx4~1 , soc_inst|m0_1|u_logic|Mb1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~81 , soc_inst|m0_1|u_logic|Add2~81, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~109 , soc_inst|m0_1|u_logic|Add2~109, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nehvx4~1 , soc_inst|m0_1|u_logic|Nehvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nehvx4~0 , soc_inst|m0_1|u_logic|Nehvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tme3z4 , soc_inst|m0_1|u_logic|Tme3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A9jvx4~0 , soc_inst|m0_1|u_logic|A9jvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Slr2z4 , soc_inst|m0_1|u_logic|Slr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ty92z4~0 , soc_inst|m0_1|u_logic|Ty92z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U5q2z4 , soc_inst|m0_1|u_logic|U5q2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D603z4 , soc_inst|m0_1|u_logic|D603z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X213z4 , soc_inst|m0_1|u_logic|X213z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ww92z4~2 , soc_inst|m0_1|u_logic|Ww92z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ww92z4~0 , soc_inst|m0_1|u_logic|Ww92z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O723z4 , soc_inst|m0_1|u_logic|O723z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xg33z4 , soc_inst|m0_1|u_logic|Xg33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ww92z4~1 , soc_inst|m0_1|u_logic|Ww92z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ww92z4~3 , soc_inst|m0_1|u_logic|Ww92z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C61wx4~0 , soc_inst|m0_1|u_logic|C61wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~101 , soc_inst|m0_1|u_logic|Add2~101, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rix2z4 , soc_inst|m0_1|u_logic|Rix2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xjhvx4~0 , soc_inst|m0_1|u_logic|Xjhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xjhvx4~1 , soc_inst|m0_1|u_logic|Xjhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE , soc_inst|m0_1|u_logic|Rix2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~89 , soc_inst|m0_1|u_logic|Add3~89, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~69 , soc_inst|m0_1|u_logic|Add3~69, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~65 , soc_inst|m0_1|u_logic|Add3~65, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ug0wx4 , soc_inst|m0_1|u_logic|Ug0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M0kvx4~0 , soc_inst|m0_1|u_logic|M0kvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tzg3z4 , soc_inst|m0_1|u_logic|Tzg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~1 , soc_inst|m0_1|u_logic|Hk0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ccg3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ccg3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~2 , soc_inst|m0_1|u_logic|Hk0wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~4 , soc_inst|m0_1|u_logic|Hk0wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~5 , soc_inst|m0_1|u_logic|Hk0wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4 , soc_inst|m0_1|u_logic|Hk0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wh0wx4~0 , soc_inst|m0_1|u_logic|Wh0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bh0wx4~0 , soc_inst|m0_1|u_logic|Bh0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ia0wx4 , soc_inst|m0_1|u_logic|Ia0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tj0wx4~0 , soc_inst|m0_1|u_logic|Tj0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tj0wx4 , soc_inst|m0_1|u_logic|Tj0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bh0wx4~1 , soc_inst|m0_1|u_logic|Bh0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pwg3z4 , soc_inst|m0_1|u_logic|Pwg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hqg3z4 , soc_inst|m0_1|u_logic|Hqg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~7 , soc_inst|m0_1|u_logic|Hk0wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~6 , soc_inst|m0_1|u_logic|Hk0wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~8 , soc_inst|m0_1|u_logic|Hk0wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M9awx4~1 , soc_inst|m0_1|u_logic|M9awx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tjlwx4~0 , soc_inst|m0_1|u_logic|Tjlwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ldhvx4~1 , soc_inst|m0_1|u_logic|Ldhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B9g3z4 , soc_inst|m0_1|u_logic|B9g3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gehvx4~0 , soc_inst|m0_1|u_logic|Gehvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gehvx4~1 , soc_inst|m0_1|u_logic|Gehvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Foe3z4 , soc_inst|m0_1|u_logic|Foe3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fc0wx4 , soc_inst|m0_1|u_logic|Fc0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B5kvx4~0 , soc_inst|m0_1|u_logic|B5kvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L733z4~DUPLICATE , soc_inst|m0_1|u_logic|L733z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh82z4~1 , soc_inst|m0_1|u_logic|Zh82z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh82z4~0 , soc_inst|m0_1|u_logic|Zh82z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh82z4~2 , soc_inst|m0_1|u_logic|Zh82z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C5n2z4 , soc_inst|m0_1|u_logic|C5n2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wj82z4~0 , soc_inst|m0_1|u_logic|Wj82z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh82z4~3 , soc_inst|m0_1|u_logic|Zh82z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N90wx4~0 , soc_inst|m0_1|u_logic|N90wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J70wx4~1 , soc_inst|m0_1|u_logic|J70wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J70wx4~2 , soc_inst|m0_1|u_logic|J70wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ba0wx4~0 , soc_inst|m0_1|u_logic|Ba0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ba0wx4 , soc_inst|m0_1|u_logic|Ba0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J70wx4~0 , soc_inst|m0_1|u_logic|J70wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V883z4 , soc_inst|m0_1|u_logic|V883z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~7 , soc_inst|m0_1|u_logic|Wa0wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~6 , soc_inst|m0_1|u_logic|Wa0wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~8 , soc_inst|m0_1|u_logic|Wa0wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E5awx4~1 , soc_inst|m0_1|u_logic|E5awx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vihvx4~0 , soc_inst|m0_1|u_logic|Vihvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vihvx4~1 , soc_inst|m0_1|u_logic|Vihvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nox2z4 , soc_inst|m0_1|u_logic|Nox2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C70wx4 , soc_inst|m0_1|u_logic|C70wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q9kvx4~0 , soc_inst|m0_1|u_logic|Q9kvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zfh3z4 , soc_inst|m0_1|u_logic|Zfh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bf9wx4~0 , soc_inst|m0_1|u_logic|Bf9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M4j2z4 , soc_inst|m0_1|u_logic|M4j2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eif3z4~DUPLICATE , soc_inst|m0_1|u_logic|Eif3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pgf3z4 , soc_inst|m0_1|u_logic|Pgf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bc82z4~0 , soc_inst|m0_1|u_logic|Bc82z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tjf3z4 , soc_inst|m0_1|u_logic|Tjf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ilf3z4 , soc_inst|m0_1|u_logic|Ilf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bc82z4~1 , soc_inst|m0_1|u_logic|Bc82z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ftf3z4 , soc_inst|m0_1|u_logic|Ftf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qrf3z4 , soc_inst|m0_1|u_logic|Qrf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bc82z4~2 , soc_inst|m0_1|u_logic|Bc82z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uuf3z4 , soc_inst|m0_1|u_logic|Uuf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bc82z4~3 , soc_inst|m0_1|u_logic|Bc82z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bc82z4~4 , soc_inst|m0_1|u_logic|Bc82z4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ntnvx4~0 , soc_inst|m0_1|u_logic|Ntnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D6cwx4~0 , soc_inst|m0_1|u_logic|D6cwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Va3wx4~0 , soc_inst|m0_1|u_logic|Va3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fa2wx4~0 , soc_inst|m0_1|u_logic|Fa2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fpi2z4 , soc_inst|m0_1|u_logic|Fpi2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R6cwx4~0 , soc_inst|m0_1|u_logic|R6cwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S652z4~0 , soc_inst|m0_1|u_logic|S652z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wbf3z4~DUPLICATE , soc_inst|m0_1|u_logic|Wbf3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W852z4~0 , soc_inst|m0_1|u_logic|W852z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xmf3z4~DUPLICATE , soc_inst|m0_1|u_logic|Xmf3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G752z4~0 , soc_inst|m0_1|u_logic|G752z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P852z4~0 , soc_inst|m0_1|u_logic|P852z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R6cwx4~4 , soc_inst|m0_1|u_logic|R6cwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mof3z4~DUPLICATE , soc_inst|m0_1|u_logic|Mof3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R6cwx4~1 , soc_inst|m0_1|u_logic|R6cwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I852z4~0 , soc_inst|m0_1|u_logic|I852z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M352z4~0 , soc_inst|m0_1|u_logic|M352z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ftf3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ftf3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T352z4~0 , soc_inst|m0_1|u_logic|T352z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uuf3z4~DUPLICATE , soc_inst|m0_1|u_logic|Uuf3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C552z4~0 , soc_inst|m0_1|u_logic|C552z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O452z4~0 , soc_inst|m0_1|u_logic|O452z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R6cwx4~3 , soc_inst|m0_1|u_logic|R6cwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eif3z4 , soc_inst|m0_1|u_logic|Eif3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R6cwx4~2 , soc_inst|m0_1|u_logic|R6cwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R6cwx4~5 , soc_inst|m0_1|u_logic|R6cwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[23]~0 , soc_inst|ram_1|data_to_memory[23]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V4ovx4~0 , soc_inst|m0_1|u_logic|V4ovx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vfd3z4 , soc_inst|m0_1|u_logic|Vfd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R6xwx4~0 , soc_inst|m0_1|u_logic|R6xwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R6xwx4~1 , soc_inst|m0_1|u_logic|R6xwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R6xwx4~2 , soc_inst|m0_1|u_logic|R6xwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jca3z4~0 , soc_inst|m0_1|u_logic|Jca3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jca3z4 , soc_inst|m0_1|u_logic|Jca3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~5 , soc_inst|m0_1|u_logic|Add0~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zmmvx4~0 , soc_inst|m0_1|u_logic|Zmmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uei3z4 , soc_inst|m0_1|u_logic|Uei3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[1][7] , soc_inst|switches_1|switch_store[1][7], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[23]~3 , soc_inst|ram_1|data_to_memory[23]~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[23]~8 , soc_inst|interconnect_1|HRDATA[23]~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Walwx4~0 , soc_inst|m0_1|u_logic|Walwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Walwx4~1 , soc_inst|m0_1|u_logic|Walwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U72wx4~0 , soc_inst|m0_1|u_logic|U72wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jwf3z4 , soc_inst|m0_1|u_logic|Jwf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~97 , soc_inst|m0_1|u_logic|Add2~97, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sdhvx4~1 , soc_inst|m0_1|u_logic|Sdhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sdhvx4~2 , soc_inst|m0_1|u_logic|Sdhvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sdhvx4~0 , soc_inst|m0_1|u_logic|Sdhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE , soc_inst|m0_1|u_logic|Jwf3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~93 , soc_inst|m0_1|u_logic|Add2~93, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qjhvx4~0 , soc_inst|m0_1|u_logic|Qjhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I21wx4~0 , soc_inst|m0_1|u_logic|I21wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I21wx4 , soc_inst|m0_1|u_logic|I21wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qjhvx4~1 , soc_inst|m0_1|u_logic|Qjhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dkx2z4 , soc_inst|m0_1|u_logic|Dkx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vpovx4 , soc_inst|m0_1|u_logic|Vpovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eijvx4~0 , soc_inst|m0_1|u_logic|Eijvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ym93z4 , soc_inst|m0_1|u_logic|Ym93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W21wx4~4 , soc_inst|m0_1|u_logic|W21wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Skv2z4~feeder , soc_inst|m0_1|u_logic|Skv2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Skv2z4 , soc_inst|m0_1|u_logic|Skv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jbu2z4 , soc_inst|m0_1|u_logic|Jbu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W21wx4~0 , soc_inst|m0_1|u_logic|W21wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J5o2z4 , soc_inst|m0_1|u_logic|J5o2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ro43z4~DUPLICATE , soc_inst|m0_1|u_logic|Ro43z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W21wx4~2 , soc_inst|m0_1|u_logic|W21wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N8o2z4 , soc_inst|m0_1|u_logic|N8o2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W21wx4~1 , soc_inst|m0_1|u_logic|W21wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O403z4 , soc_inst|m0_1|u_logic|O403z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W21wx4~5 , soc_inst|m0_1|u_logic|W21wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W21wx4~6 , soc_inst|m0_1|u_logic|W21wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kfawx4~0 , soc_inst|m0_1|u_logic|Kfawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kfawx4~1 , soc_inst|m0_1|u_logic|Kfawx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G11wx4~1 , soc_inst|m0_1|u_logic|G11wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G11wx4~0 , soc_inst|m0_1|u_logic|G11wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qz0wx4~1 , soc_inst|m0_1|u_logic|Qz0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qz0wx4~2 , soc_inst|m0_1|u_logic|Qz0wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qz0wx4~0 , soc_inst|m0_1|u_logic|Qz0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y6o2z4 , soc_inst|m0_1|u_logic|Y6o2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nrvwx4~3 , soc_inst|m0_1|u_logic|Nrvwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nrvwx4~0 , soc_inst|m0_1|u_logic|Nrvwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jl93z4 , soc_inst|m0_1|u_logic|Jl93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nrvwx4~1 , soc_inst|m0_1|u_logic|Nrvwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE , soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nrvwx4~2 , soc_inst|m0_1|u_logic|Nrvwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nrvwx4 , soc_inst|m0_1|u_logic|Nrvwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yxdwx4~0 , soc_inst|m0_1|u_logic|Yxdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X0ewx4~0 , soc_inst|m0_1|u_logic|X0ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X0ewx4~1 , soc_inst|m0_1|u_logic|X0ewx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|C9a3z4 , soc_inst|m0_1|u_logic|C9a3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~13 , soc_inst|m0_1|u_logic|Add0~13, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Mqmvx4~0 , soc_inst|m0_1|u_logic|Mqmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zva3z4~DUPLICATE , soc_inst|m0_1|u_logic|Zva3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zva3z4 , soc_inst|m0_1|u_logic|Zva3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~49 , soc_inst|m0_1|u_logic|Add0~49, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bge3z4 , soc_inst|m0_1|u_logic|Bge3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fqmvx4~0 , soc_inst|m0_1|u_logic|Fqmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|She3z4 , soc_inst|m0_1|u_logic|She3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Whlwx4~1 , soc_inst|m0_1|u_logic|Whlwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Whlwx4~0 , soc_inst|m0_1|u_logic|Whlwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Whlwx4~2 , soc_inst|m0_1|u_logic|Whlwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Whlwx4~3 , soc_inst|m0_1|u_logic|Whlwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L6nwx4 , soc_inst|m0_1|u_logic|L6nwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wjyvx4~0 , soc_inst|m0_1|u_logic|Wjyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U0vvx4~0 , soc_inst|m0_1|u_logic|U0vvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Amyvx4~1 , soc_inst|m0_1|u_logic|Amyvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Amyvx4~0 , soc_inst|m0_1|u_logic|Amyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Amyvx4~2 , soc_inst|m0_1|u_logic|Amyvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ykyvx4~0 , soc_inst|m0_1|u_logic|Ykyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U0vvx4~1 , soc_inst|m0_1|u_logic|U0vvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U0vvx4~2 , soc_inst|m0_1|u_logic|U0vvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I30wx4~2 , soc_inst|m0_1|u_logic|I30wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H2m2z4~DUPLICATE , soc_inst|m0_1|u_logic|H2m2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hbv2z4 , soc_inst|m0_1|u_logic|Hbv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ebbwx4~3 , soc_inst|m0_1|u_logic|Ebbwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T0m2z4 , soc_inst|m0_1|u_logic|T0m2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yb93z4 , soc_inst|m0_1|u_logic|Yb93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ebbwx4~1 , soc_inst|m0_1|u_logic|Ebbwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y1u2z4 , soc_inst|m0_1|u_logic|Y1u2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H783z4 , soc_inst|m0_1|u_logic|H783z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ebbwx4~2 , soc_inst|m0_1|u_logic|Ebbwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yx63z4 , soc_inst|m0_1|u_logic|Yx63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V3m2z4 , soc_inst|m0_1|u_logic|V3m2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ebbwx4~0 , soc_inst|m0_1|u_logic|Ebbwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ebbwx4 , soc_inst|m0_1|u_logic|Ebbwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jmdwx4~0 , soc_inst|m0_1|u_logic|Jmdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jmdwx4~1 , soc_inst|m0_1|u_logic|Jmdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6twx4~0 , soc_inst|m0_1|u_logic|Q6twx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6twx4~1 , soc_inst|m0_1|u_logic|Q6twx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rhfwx4~0 , soc_inst|m0_1|u_logic|Rhfwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rhfwx4~1 , soc_inst|m0_1|u_logic|Rhfwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rhfwx4~2 , soc_inst|m0_1|u_logic|Rhfwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mx0wx4~0 , soc_inst|m0_1|u_logic|Mx0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mx0wx4 , soc_inst|m0_1|u_logic|Mx0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~89 , soc_inst|m0_1|u_logic|Add2~89, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jjhvx4~0 , soc_inst|m0_1|u_logic|Jjhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jjhvx4~1 , soc_inst|m0_1|u_logic|Jjhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Plx2z4 , soc_inst|m0_1|u_logic|Plx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cjhvx4~0 , soc_inst|m0_1|u_logic|Cjhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[1][2] , soc_inst|switches_1|switch_store[1][2], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[18]~6 , soc_inst|ram_1|data_to_memory[18]~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[10]~5 , soc_inst|ram_1|data_to_memory[10]~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[18]~13 , soc_inst|interconnect_1|HRDATA[18]~13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ajmwx4~0 , soc_inst|m0_1|u_logic|Ajmwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ajmwx4~1 , soc_inst|m0_1|u_logic|Ajmwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ajmwx4~2 , soc_inst|m0_1|u_logic|Ajmwx4~2, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Qkmwx4~0 , soc_inst|m0_1|u_logic|Qkmwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[10]~12 , soc_inst|interconnect_1|HRDATA[10]~12, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Qkmwx4~1 , soc_inst|m0_1|u_logic|Qkmwx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Qkmwx4~2 , soc_inst|m0_1|u_logic|Qkmwx4~2, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Qkmwx4~3 , soc_inst|m0_1|u_logic|Qkmwx4~3, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Et0wx4~0 , soc_inst|m0_1|u_logic|Et0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cjhvx4~0 , soc_inst|m0_1|u_logic|Cjhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Et0wx4 , soc_inst|m0_1|u_logic|Et0wx4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Cjhvx4~1 , soc_inst|m0_1|u_logic|Cjhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cjhvx4~2 , soc_inst|m0_1|u_logic|Cjhvx4~2, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Bnx2z4 , soc_inst|m0_1|u_logic|Bnx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fq0wx4 , soc_inst|m0_1|u_logic|Fq0wx4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Irjvx4~0 , soc_inst|m0_1|u_logic|Irjvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|W5p2z4 , soc_inst|m0_1|u_logic|W5p2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M0i3z4 , soc_inst|m0_1|u_logic|M0i3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ht53z4 , soc_inst|m0_1|u_logic|Ht53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A792z4~0 , soc_inst|m0_1|u_logic|A792z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G123z4~DUPLICATE , soc_inst|m0_1|u_logic|G123z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pa33z4 , soc_inst|m0_1|u_logic|Pa33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A792z4~1 , soc_inst|m0_1|u_logic|A792z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A792z4~2 , soc_inst|m0_1|u_logic|A792z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xyh3z4 , soc_inst|m0_1|u_logic|Xyh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X892z4~0 , soc_inst|m0_1|u_logic|X892z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A792z4~3 , soc_inst|m0_1|u_logic|A792z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wo0wx4~0 , soc_inst|m0_1|u_logic|Wo0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ql0wx4 , soc_inst|m0_1|u_logic|Ql0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[36] , soc_inst|pix1|memory_rtl_0_bypass[36], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[35] , soc_inst|pix1|memory_rtl_0_bypass[35], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[37] , soc_inst|pix1|memory_rtl_0_bypass[37], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[38] , soc_inst|pix1|memory_rtl_0_bypass[38], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory~9 , soc_inst|pix1|memory~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory~5 , soc_inst|pix1|memory~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[43] , soc_inst|pix1|memory_rtl_0_bypass[43], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[4]~35 , soc_inst|interconnect_1|HRDATA[4]~35, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[7]~34 , soc_inst|interconnect_1|HRDATA[7]~34, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a292 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a292, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l6_w4_n0_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l6_w4_n0_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a284 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a284, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a276 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a276, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a268 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a268, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a260 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a260, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w4_n8_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w4_n8_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l6_w4_n0_mux_dataout~1 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l6_w4_n0_mux_dataout~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a180 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a180, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a164 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a164, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a172 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a172, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a188 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a188, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w4_n1_mux_dataout~1 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w4_n1_mux_dataout~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a156 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a156, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a148 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a148, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a140 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a140, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a132 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a132, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w4_n1_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w4_n1_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a252 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a252, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a236 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a236, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a228 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a228, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a244 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a244, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w4_n1_mux_dataout~3 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w4_n1_mux_dataout~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a212 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a212, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a220 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a220, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a196 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a196, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a204 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a204, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w4_n1_mux_dataout~2 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w4_n1_mux_dataout~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w4_n1_mux_dataout~4 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w4_n1_mux_dataout~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a124 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a124, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a60 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a60, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a92 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a92, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w4_n0_mux_dataout~3 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w4_n0_mux_dataout~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a100 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a100, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a68 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a68, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w4_n0_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w4_n0_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a108 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a108, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a44 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a44, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a76 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a76, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w4_n0_mux_dataout~1 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w4_n0_mux_dataout~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a116 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a116, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a84 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a84, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a52 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a52, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w4_n0_mux_dataout~2 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w4_n0_mux_dataout~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w4_n0_mux_dataout~4 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w4_n0_mux_dataout~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l6_w4_n0_mux_dataout~2 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l6_w4_n0_mux_dataout~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[4]~36 , soc_inst|interconnect_1|HRDATA[4]~36, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[4]~57 , soc_inst|interconnect_1|HRDATA[4]~57, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W5rvx4 , soc_inst|m0_1|u_logic|W5rvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fbnvx4~0 , soc_inst|m0_1|u_logic|Fbnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Owq2z4~0 , soc_inst|m0_1|u_logic|Owq2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Owq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Owq2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pamvx4~0 , soc_inst|m0_1|u_logic|Pamvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pamvx4~1 , soc_inst|m0_1|u_logic|Pamvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Trq2z4 , soc_inst|m0_1|u_logic|Trq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhvvx4~0 , soc_inst|m0_1|u_logic|Mhvvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P0ivx4~0 , soc_inst|m0_1|u_logic|P0ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T8f3z4 , soc_inst|m0_1|u_logic|T8f3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hmyvx4~0 , soc_inst|m0_1|u_logic|Hmyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hmyvx4~1 , soc_inst|m0_1|u_logic|Hmyvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hmyvx4~2 , soc_inst|m0_1|u_logic|Hmyvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K22wx4~0 , soc_inst|m0_1|u_logic|K22wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bmnwx4~0 , soc_inst|m0_1|u_logic|Bmnwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K22wx4~1 , soc_inst|m0_1|u_logic|K22wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Skhvx4~0 , soc_inst|m0_1|u_logic|Skhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Skhvx4~1 , soc_inst|m0_1|u_logic|Skhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Skhvx4~2 , soc_inst|m0_1|u_logic|Skhvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jex2z4 , soc_inst|m0_1|u_logic|Jex2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ohivx4~0 , soc_inst|m0_1|u_logic|Ohivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Szr2z4 , soc_inst|m0_1|u_logic|Szr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z863z4 , soc_inst|m0_1|u_logic|Z863z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P12wx4~2 , soc_inst|m0_1|u_logic|P12wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qwr2z4~DUPLICATE , soc_inst|m0_1|u_logic|Qwr2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qz43z4 , soc_inst|m0_1|u_logic|Qz43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yg23z4 , soc_inst|m0_1|u_logic|Yg23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P12wx4~1 , soc_inst|m0_1|u_logic|P12wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P12wx4~3 , soc_inst|m0_1|u_logic|P12wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cvr2z4 , soc_inst|m0_1|u_logic|Cvr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Imu2z4 , soc_inst|m0_1|u_logic|Imu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P12wx4~4 , soc_inst|m0_1|u_logic|P12wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E913z4 , soc_inst|m0_1|u_logic|E913z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P12wx4~7 , soc_inst|m0_1|u_logic|P12wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Asr2z4~feeder , soc_inst|m0_1|u_logic|Asr2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Asr2z4 , soc_inst|m0_1|u_logic|Asr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eyr2z4~feeder , soc_inst|m0_1|u_logic|Eyr2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eyr2z4~DUPLICATE , soc_inst|m0_1|u_logic|Eyr2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Otr2z4~feeder , soc_inst|m0_1|u_logic|Otr2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Otr2z4 , soc_inst|m0_1|u_logic|Otr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P12wx4~5 , soc_inst|m0_1|u_logic|P12wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qyc3z4 , soc_inst|m0_1|u_logic|Qyc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kc03z4 , soc_inst|m0_1|u_logic|Kc03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rvv2z4 , soc_inst|m0_1|u_logic|Rvv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P12wx4~6 , soc_inst|m0_1|u_logic|P12wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P12wx4~0 , soc_inst|m0_1|u_logic|P12wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P12wx4 , soc_inst|m0_1|u_logic|P12wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lk9wx4~1 , soc_inst|m0_1|u_logic|Lk9wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D22wx4~0 , soc_inst|m0_1|u_logic|D22wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zz1wx4~0 , soc_inst|m0_1|u_logic|Zz1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zz1wx4~1 , soc_inst|m0_1|u_logic|Zz1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rr83z4 , soc_inst|m0_1|u_logic|Rr83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lr9wx4~2 , soc_inst|m0_1|u_logic|Lr9wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lr9wx4~0 , soc_inst|m0_1|u_logic|Lr9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Asr2z4~DUPLICATE , soc_inst|m0_1|u_logic|Asr2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lr9wx4~1 , soc_inst|m0_1|u_logic|Lr9wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lr9wx4~3 , soc_inst|m0_1|u_logic|Lr9wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lr9wx4 , soc_inst|m0_1|u_logic|Lr9wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fkdwx4~0 , soc_inst|m0_1|u_logic|Fkdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fkdwx4~1 , soc_inst|m0_1|u_logic|Fkdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cymwx4~0 , soc_inst|m0_1|u_logic|Cymwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cymwx4~1 , soc_inst|m0_1|u_logic|Cymwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cymwx4~2 , soc_inst|m0_1|u_logic|Cymwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vcuvx4~1 , soc_inst|m0_1|u_logic|Vcuvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vcuvx4~0 , soc_inst|m0_1|u_logic|Vcuvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vcuvx4~2 , soc_inst|m0_1|u_logic|Vcuvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wamvx4~1 , soc_inst|m0_1|u_logic|Wamvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tdp2z4 , soc_inst|m0_1|u_logic|Tdp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rryvx4~0 , soc_inst|m0_1|u_logic|Rryvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Upyvx4~0 , soc_inst|m0_1|u_logic|Upyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F4mwx4~0 , soc_inst|m0_1|u_logic|F4mwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R3mwx4~0 , soc_inst|m0_1|u_logic|R3mwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pet2z4~DUPLICATE , soc_inst|m0_1|u_logic|Pet2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nen2z4~0 , soc_inst|m0_1|u_logic|Nen2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nen2z4~1 , soc_inst|m0_1|u_logic|Nen2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nen2z4 , soc_inst|m0_1|u_logic|Nen2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cr1wx4~2 , soc_inst|m0_1|u_logic|Cr1wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cr1wx4~3 , soc_inst|m0_1|u_logic|Cr1wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vu93z4 , soc_inst|m0_1|u_logic|Vu93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Mhn2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yfn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Yfn2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Psv2z4~DUPLICATE , soc_inst|m0_1|u_logic|Psv2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q1ywx4~0 , soc_inst|m0_1|u_logic|Q1ywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Po83z4 , soc_inst|m0_1|u_logic|Po83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ajn2z4 , soc_inst|m0_1|u_logic|Ajn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gf73z4~DUPLICATE , soc_inst|m0_1|u_logic|Gf73z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q1ywx4~1 , soc_inst|m0_1|u_logic|Q1ywx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q1ywx4 , soc_inst|m0_1|u_logic|Q1ywx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tzxwx4~0 , soc_inst|m0_1|u_logic|Tzxwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oldwx4~0 , soc_inst|m0_1|u_logic|Oldwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fuowx4~0 , soc_inst|m0_1|u_logic|Fuowx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Taa3z4 , soc_inst|m0_1|u_logic|Taa3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Adt2z4 , soc_inst|m0_1|u_logic|Adt2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ipb3z4 , soc_inst|m0_1|u_logic|Ipb3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dewwx4~0 , soc_inst|m0_1|u_logic|Dewwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dewwx4~1 , soc_inst|m0_1|u_logic|Dewwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gtmwx4~0 , soc_inst|m0_1|u_logic|Gtmwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gtmwx4~1 , soc_inst|m0_1|u_logic|Gtmwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gtmwx4~2 , soc_inst|m0_1|u_logic|Gtmwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Leuvx4~0 , soc_inst|m0_1|u_logic|Leuvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Leuvx4~1 , soc_inst|m0_1|u_logic|Leuvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C00wx4~0 , soc_inst|m0_1|u_logic|C00wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ka93z4~DUPLICATE , soc_inst|m0_1|u_logic|Ka93z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bdwwx4~1 , soc_inst|m0_1|u_logic|Bdwwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T9v2z4~DUPLICATE , soc_inst|m0_1|u_logic|T9v2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bdwwx4~3 , soc_inst|m0_1|u_logic|Bdwwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bdwwx4~0 , soc_inst|m0_1|u_logic|Bdwwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bdwwx4~2 , soc_inst|m0_1|u_logic|Bdwwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bdwwx4 , soc_inst|m0_1|u_logic|Bdwwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I7r2z4 , soc_inst|m0_1|u_logic|I7r2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C372z4~1 , soc_inst|m0_1|u_logic|C372z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z472z4~0 , soc_inst|m0_1|u_logic|Z472z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Twz2z4 , soc_inst|m0_1|u_logic|Twz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nt03z4~DUPLICATE , soc_inst|m0_1|u_logic|Nt03z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C372z4~2 , soc_inst|m0_1|u_logic|C372z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C372z4~0 , soc_inst|m0_1|u_logic|C372z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C372z4~3 , soc_inst|m0_1|u_logic|C372z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tpnvx4~0 , soc_inst|m0_1|u_logic|Tpnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~97 , soc_inst|m0_1|u_logic|Add5~97, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~109 , soc_inst|m0_1|u_logic|Add5~109, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oszvx4~1 , soc_inst|m0_1|u_logic|Oszvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oszvx4~2 , soc_inst|m0_1|u_logic|Oszvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H133z4 , soc_inst|m0_1|u_logic|H133z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yr13z4~DUPLICATE , soc_inst|m0_1|u_logic|Yr13z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qp62z4~1 , soc_inst|m0_1|u_logic|Qp62z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nr62z4~0 , soc_inst|m0_1|u_logic|Nr62z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qa43z4 , soc_inst|m0_1|u_logic|Qa43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qp62z4~0 , soc_inst|m0_1|u_logic|Qp62z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lq03z4~DUPLICATE , soc_inst|m0_1|u_logic|Lq03z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qp62z4~2 , soc_inst|m0_1|u_logic|Qp62z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qp62z4~3 , soc_inst|m0_1|u_logic|Qp62z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Euzvx4~0 , soc_inst|m0_1|u_logic|Euzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hszvx4 , soc_inst|m0_1|u_logic|Hszvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[4] , soc_inst|ram_1|saved_word_address[4], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory.raddr_a[4]~4 , soc_inst|ram_1|memory.raddr_a[4]~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[22]~32 , soc_inst|ram_1|data_to_memory[22]~32, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[6]~31 , soc_inst|ram_1|data_to_memory[6]~31, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[22]~56 , soc_inst|interconnect_1|HRDATA[22]~56, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aphvx4~0 , soc_inst|m0_1|u_logic|Aphvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Enw2z4 , soc_inst|m0_1|u_logic|Enw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vapvx4 , soc_inst|m0_1|u_logic|Vapvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J6nvx4~0 , soc_inst|m0_1|u_logic|J6nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J6nvx4~1 , soc_inst|m0_1|u_logic|J6nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zoy2z4 , soc_inst|m0_1|u_logic|Zoy2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|My6wx4~0 , soc_inst|m0_1|u_logic|My6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M4fwx4~0 , soc_inst|m0_1|u_logic|M4fwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~0 , soc_inst|m0_1|u_logic|K6yvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~1 , soc_inst|m0_1|u_logic|K6yvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~5 , soc_inst|m0_1|u_logic|K6yvx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~7 , soc_inst|m0_1|u_logic|K6yvx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~8 , soc_inst|m0_1|u_logic|K6yvx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X8kwx4~0 , soc_inst|m0_1|u_logic|X8kwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tuwvx4~0 , soc_inst|m0_1|u_logic|Tuwvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~6 , soc_inst|m0_1|u_logic|K6yvx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~9 , soc_inst|m0_1|u_logic|K6yvx4~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~10 , soc_inst|m0_1|u_logic|K6yvx4~10, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE , soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ujp2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ujp2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~4 , soc_inst|m0_1|u_logic|Eo5wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W893z4~DUPLICATE , soc_inst|m0_1|u_logic|W893z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~3 , soc_inst|m0_1|u_logic|Eo5wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~0 , soc_inst|m0_1|u_logic|Eo5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ylwwx4~0 , soc_inst|m0_1|u_logic|Ylwwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ylwwx4~1 , soc_inst|m0_1|u_logic|Ylwwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ok7wx4~1 , soc_inst|m0_1|u_logic|Ok7wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Manwx4~0 , soc_inst|m0_1|u_logic|Manwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S1ewx4~0 , soc_inst|m0_1|u_logic|S1ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W6iwx4 , soc_inst|m0_1|u_logic|W6iwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|St0wx4~1 , soc_inst|m0_1|u_logic|St0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wu53z4 , soc_inst|m0_1|u_logic|Wu53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|St0wx4~3 , soc_inst|m0_1|u_logic|St0wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|St0wx4~5 , soc_inst|m0_1|u_logic|St0wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ecawx4~0 , soc_inst|m0_1|u_logic|Ecawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ecawx4~1 , soc_inst|m0_1|u_logic|Ecawx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cs0wx4~1 , soc_inst|m0_1|u_logic|Cs0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cs0wx4~0 , soc_inst|m0_1|u_logic|Cs0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mq0wx4~1 , soc_inst|m0_1|u_logic|Mq0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mq0wx4~2 , soc_inst|m0_1|u_logic|Mq0wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mq0wx4~0 , soc_inst|m0_1|u_logic|Mq0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Psn2z4 , soc_inst|m0_1|u_logic|Psn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ohv2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ohv2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H1qwx4~0 , soc_inst|m0_1|u_logic|H1qwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F8u2z4 , soc_inst|m0_1|u_logic|F8u2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H1qwx4~1 , soc_inst|m0_1|u_logic|H1qwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H1qwx4 , soc_inst|m0_1|u_logic|H1qwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eudwx4~0 , soc_inst|m0_1|u_logic|Eudwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eudwx4~1 , soc_inst|m0_1|u_logic|Eudwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[30]~29 , soc_inst|ram_1|data_to_memory[30]~29, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qapwx4~0 , soc_inst|m0_1|u_logic|Qapwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D7iwx4~0 , soc_inst|m0_1|u_logic|D7iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D7iwx4~1 , soc_inst|m0_1|u_logic|D7iwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zuzvx4~0 , soc_inst|m0_1|u_logic|Zuzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zuzvx4~1 , soc_inst|m0_1|u_logic|Zuzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oszvx4~1 , soc_inst|m0_1|u_logic|Oszvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mvm2z4 , soc_inst|m0_1|u_logic|Mvm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ytm2z4 , soc_inst|m0_1|u_logic|Ytm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G493z4~DUPLICATE , soc_inst|m0_1|u_logic|G493z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qowwx4~0 , soc_inst|m0_1|u_logic|Qowwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|It63z4~DUPLICATE , soc_inst|m0_1|u_logic|It63z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ixt2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ixt2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qowwx4~1 , soc_inst|m0_1|u_logic|Qowwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qowwx4 , soc_inst|m0_1|u_logic|Qowwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H133z4 , soc_inst|m0_1|u_logic|H133z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yr13z4 , soc_inst|m0_1|u_logic|Yr13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lq03z4 , soc_inst|m0_1|u_logic|Lq03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uvzvx4~2 , soc_inst|m0_1|u_logic|Uvzvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zj53z4 , soc_inst|m0_1|u_logic|Zj53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rtz2z4 , soc_inst|m0_1|u_logic|Rtz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qa43z4~DUPLICATE , soc_inst|m0_1|u_logic|Qa43z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uvzvx4~1 , soc_inst|m0_1|u_logic|Uvzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uvzvx4~0 , soc_inst|m0_1|u_logic|Uvzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uvzvx4 , soc_inst|m0_1|u_logic|Uvzvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~4 , soc_inst|m0_1|u_logic|hwdata_o~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J7b3z4~0 , soc_inst|m0_1|u_logic|J7b3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J7b3z4~DUPLICATE , soc_inst|m0_1|u_logic|J7b3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ormvx4~0 , soc_inst|m0_1|u_logic|Ormvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z8b3z4 , soc_inst|m0_1|u_logic|Z8b3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hrmvx4~0 , soc_inst|m0_1|u_logic|Hrmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dhb3z4 , soc_inst|m0_1|u_logic|Dhb3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oytvx4~1 , soc_inst|m0_1|u_logic|Oytvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oytvx4~3 , soc_inst|m0_1|u_logic|Oytvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oytvx4~2 , soc_inst|m0_1|u_logic|Oytvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oytvx4~4 , soc_inst|m0_1|u_logic|Oytvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K7g3z4~DUPLICATE , soc_inst|m0_1|u_logic|K7g3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oytvx4~0 , soc_inst|m0_1|u_logic|Oytvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oytvx4 , soc_inst|m0_1|u_logic|Oytvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Etmvx4~0 , soc_inst|m0_1|u_logic|Etmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F2o2z4 , soc_inst|m0_1|u_logic|F2o2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mxtvx4 , soc_inst|m0_1|u_logic|Mxtvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bomvx4~0 , soc_inst|m0_1|u_logic|Bomvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jpa3z4 , soc_inst|m0_1|u_logic|Jpa3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rilwx4~1 , soc_inst|m0_1|u_logic|Rilwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rilwx4~2 , soc_inst|m0_1|u_logic|Rilwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ll1wx4~0 , soc_inst|m0_1|u_logic|Ll1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ll1wx4~1 , soc_inst|m0_1|u_logic|Ll1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aj1wx4~0 , soc_inst|m0_1|u_logic|Aj1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ibe3z4 , soc_inst|m0_1|u_logic|Ibe3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cc9wx4~2 , soc_inst|m0_1|u_logic|Cc9wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U9e3z4 , soc_inst|m0_1|u_logic|U9e3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ge9wx4~0 , soc_inst|m0_1|u_logic|Ge9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cc9wx4~0 , soc_inst|m0_1|u_logic|Cc9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tyd3z4 , soc_inst|m0_1|u_logic|Tyd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Exd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Exd3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cc9wx4~1 , soc_inst|m0_1|u_logic|Cc9wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cc9wx4~3 , soc_inst|m0_1|u_logic|Cc9wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qk1wx4~0 , soc_inst|m0_1|u_logic|Qk1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Owovx4 , soc_inst|m0_1|u_logic|Owovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[9] , soc_inst|ram_1|saved_word_address[9], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory.raddr_a[9]~9 , soc_inst|ram_1|memory.raddr_a[9]~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[7]~11 , soc_inst|interconnect_1|HRDATA[7]~11, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wywwx4~0 , soc_inst|m0_1|u_logic|Wywwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wywwx4~1 , soc_inst|m0_1|u_logic|Wywwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wywwx4~2 , soc_inst|m0_1|u_logic|Wywwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wywwx4~3 , soc_inst|m0_1|u_logic|Wywwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G9lwx4~0 , soc_inst|m0_1|u_logic|G9lwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R5zvx4~0 , soc_inst|m0_1|u_logic|R5zvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R5zvx4~1 , soc_inst|m0_1|u_logic|R5zvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R5zvx4~2 , soc_inst|m0_1|u_logic|R5zvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Po7wx4~0 , soc_inst|m0_1|u_logic|Po7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fc7wx4~0 , soc_inst|m0_1|u_logic|Fc7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fc7wx4~1 , soc_inst|m0_1|u_logic|Fc7wx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Cb3wx4~0 , soc_inst|m0_1|u_logic|Cb3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cb3wx4~1 , soc_inst|m0_1|u_logic|Cb3wx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Gci2z4 , soc_inst|m0_1|u_logic|Gci2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Y5zvx4~0 , soc_inst|m0_1|u_logic|Y5zvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Y5zvx4~1 , soc_inst|m0_1|u_logic|Y5zvx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Y5zvx4~2 , soc_inst|m0_1|u_logic|Y5zvx4~2, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|J3qvx4~0 , soc_inst|m0_1|u_logic|J3qvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ll73z4 , soc_inst|m0_1|u_logic|Ll73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N3ywx4~2 , soc_inst|m0_1|u_logic|N3ywx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N3ywx4~3 , soc_inst|m0_1|u_logic|N3ywx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cc63z4~DUPLICATE , soc_inst|m0_1|u_logic|Cc63z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cc63z4 , soc_inst|m0_1|u_logic|Cc63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Isi2z4 , soc_inst|m0_1|u_logic|Isi2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|N3ywx4~0 , soc_inst|m0_1|u_logic|N3ywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Glj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Glj2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lpu2z4 , soc_inst|m0_1|u_logic|Lpu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N3ywx4~3 , soc_inst|m0_1|u_logic|N3ywx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cgt2z4 , soc_inst|m0_1|u_logic|Cgt2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N3ywx4~2 , soc_inst|m0_1|u_logic|N3ywx4~2, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|N3ywx4~1 , soc_inst|m0_1|u_logic|N3ywx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|N3ywx4 , soc_inst|m0_1|u_logic|N3ywx4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|U2ewx4~0 , soc_inst|m0_1|u_logic|U2ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ttwwx4~0 , soc_inst|m0_1|u_logic|Ttwwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N4rvx4~0 , soc_inst|m0_1|u_logic|N4rvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[15]~2 , soc_inst|ram_1|data_to_memory[15]~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[31]~1 , soc_inst|ram_1|data_to_memory[31]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[15]~5 , soc_inst|interconnect_1|HRDATA[15]~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U9lwx4~0 , soc_inst|m0_1|u_logic|U9lwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kswwx4~1 , soc_inst|m0_1|u_logic|Kswwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B8nwx4~2 , soc_inst|m0_1|u_logic|B8nwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yxzvx4~0 , soc_inst|m0_1|u_logic|Yxzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ilp2z4 , soc_inst|m0_1|u_logic|Ilp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nl53z4 , soc_inst|m0_1|u_logic|Nl53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ec43z4 , soc_inst|m0_1|u_logic|Ec43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fvz2z4 , soc_inst|m0_1|u_logic|Fvz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wmp2z4 , soc_inst|m0_1|u_logic|Wmp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~6 , soc_inst|m0_1|u_logic|Eo5wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V233z4 , soc_inst|m0_1|u_logic|V233z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mt13z4 , soc_inst|m0_1|u_logic|Mt13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zr03z4 , soc_inst|m0_1|u_logic|Zr03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~5 , soc_inst|m0_1|u_logic|Eo5wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~1 , soc_inst|m0_1|u_logic|Eo5wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~2 , soc_inst|m0_1|u_logic|Eo5wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[5] , soc_inst|m0_1|u_logic|hwdata_o[5], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[5]~21 , soc_inst|ram_1|data_to_memory[5]~21, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[0][5] , soc_inst|switches_1|switch_store[0][5], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a285 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a285, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a277 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a277, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a261 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a261, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a269 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a269, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w5_n8_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w5_n8_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a299 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a299, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a293 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a293, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l6_w5_n0_mux_dataout~1 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l6_w5_n0_mux_dataout~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[5]~67 , soc_inst|interconnect_1|HRDATA[5]~67, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory~6 , soc_inst|pix1|memory~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[44] , soc_inst|pix1|memory_rtl_0_bypass[44], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[5]~66 , soc_inst|interconnect_1|HRDATA[5]~66, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a109 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a109, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a45 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a45, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a77 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a77, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w5_n0_mux_dataout~1 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w5_n0_mux_dataout~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a93 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a93, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a125 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a125, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a61 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a61, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w5_n0_mux_dataout~3 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w5_n0_mux_dataout~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a53 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a53, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a85 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a85, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a117 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a117, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w5_n0_mux_dataout~2 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w5_n0_mux_dataout~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a69 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a69, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a101 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a101, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w5_n0_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w5_n0_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w5_n0_mux_dataout~4 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w5_n0_mux_dataout~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a245 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a245, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a253 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a253, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a237 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a237, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a229 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a229, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w5_n1_mux_dataout~3 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w5_n1_mux_dataout~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a133 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a133, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a149 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a149, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a141 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a141, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a157 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a157, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w5_n1_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w5_n1_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a189 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a189, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a181 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a181, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a173 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a173, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a165 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a165, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w5_n1_mux_dataout~1 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w5_n1_mux_dataout~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a221 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a221, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a197 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a197, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a205 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a205, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a213 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a213, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w5_n1_mux_dataout~2 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w5_n1_mux_dataout~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w5_n1_mux_dataout~4 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w5_n1_mux_dataout~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[5]~44 , soc_inst|interconnect_1|HRDATA[5]~44, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[5]~45 , soc_inst|interconnect_1|HRDATA[5]~45, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yanvx4~0 , soc_inst|m0_1|u_logic|Yanvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F0y2z4 , soc_inst|m0_1|u_logic|F0y2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hphvx4~0 , soc_inst|m0_1|u_logic|Hphvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qlw2z4 , soc_inst|m0_1|u_logic|Qlw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6nvx4~0 , soc_inst|m0_1|u_logic|Q6nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6nvx4~1 , soc_inst|m0_1|u_logic|Q6nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lny2z4 , soc_inst|m0_1|u_logic|Lny2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gvrwx4~0 , soc_inst|m0_1|u_logic|Gvrwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ctrwx4~0 , soc_inst|m0_1|u_logic|Ctrwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ctrwx4~1 , soc_inst|m0_1|u_logic|Ctrwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kghvx4~0 , soc_inst|m0_1|u_logic|Kghvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I6z2z4 , soc_inst|m0_1|u_logic|I6z2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xly2z4 , soc_inst|m0_1|u_logic|Xly2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tecwx4~0 , soc_inst|m0_1|u_logic|Tecwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Afcwx4~0 , soc_inst|m0_1|u_logic|Afcwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ydcwx4~0 , soc_inst|m0_1|u_logic|Ydcwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nlhvx4~0 , soc_inst|m0_1|u_logic|Nlhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nlhvx4~1 , soc_inst|m0_1|u_logic|Nlhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nlhvx4~2 , soc_inst|m0_1|u_logic|Nlhvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cax2z4 , soc_inst|m0_1|u_logic|Cax2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE , soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qnkvx4~0 , soc_inst|m0_1|u_logic|Qnkvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qnkvx4~1 , soc_inst|m0_1|u_logic|Qnkvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Efp2z4 , soc_inst|m0_1|u_logic|Efp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qw62z4~1 , soc_inst|m0_1|u_logic|Qw62z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qw62z4~2 , soc_inst|m0_1|u_logic|Qw62z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ec43z4~DUPLICATE , soc_inst|m0_1|u_logic|Ec43z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nl53z4~DUPLICATE , soc_inst|m0_1|u_logic|Nl53z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qw62z4~0 , soc_inst|m0_1|u_logic|Qw62z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ilp2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ilp2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ny62z4~0 , soc_inst|m0_1|u_logic|Ny62z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qw62z4~3 , soc_inst|m0_1|u_logic|Qw62z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mpnvx4~0 , soc_inst|m0_1|u_logic|Mpnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rxzvx4 , soc_inst|m0_1|u_logic|Rxzvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xknvx4~0 , soc_inst|m0_1|u_logic|Xknvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kop2z4 , soc_inst|m0_1|u_logic|Kop2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M5tvx4~0 , soc_inst|m0_1|u_logic|M5tvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zyovx4 , soc_inst|m0_1|u_logic|Zyovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bec3z4~0 , soc_inst|m0_1|u_logic|Bec3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bec3z4 , soc_inst|m0_1|u_logic|Bec3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D0wwx4~0 , soc_inst|m0_1|u_logic|D0wwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D0wwx4~1 , soc_inst|m0_1|u_logic|D0wwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I90xx4~0 , soc_inst|m0_1|u_logic|I90xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cjuwx4~0 , soc_inst|m0_1|u_logic|Cjuwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wvzwx4~1 , soc_inst|m0_1|u_logic|Wvzwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G2zwx4~1 , soc_inst|m0_1|u_logic|G2zwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X2rvx4~0 , soc_inst|m0_1|u_logic|X2rvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X2rvx4~1 , soc_inst|m0_1|u_logic|X2rvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tbnvx4~0 , soc_inst|m0_1|u_logic|Tbnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tbnvx4~1 , soc_inst|m0_1|u_logic|Tbnvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lbn2z4 , soc_inst|m0_1|u_logic|Lbn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L7nvx4~0 , soc_inst|m0_1|u_logic|L7nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cqhvx4~0 , soc_inst|m0_1|u_logic|Cqhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ahw2z4 , soc_inst|m0_1|u_logic|Ahw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L7nvx4~1 , soc_inst|m0_1|u_logic|L7nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Viy2z4 , soc_inst|m0_1|u_logic|Viy2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zpqvx4~0 , soc_inst|m0_1|u_logic|Zpqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Irqvx4~0 , soc_inst|m0_1|u_logic|Irqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Irqvx4~1 , soc_inst|m0_1|u_logic|Irqvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z4xvx4~0 , soc_inst|m0_1|u_logic|Z4xvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rmpvx4~0 , soc_inst|m0_1|u_logic|Rmpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rmpvx4~1 , soc_inst|m0_1|u_logic|Rmpvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gxxvx4~0 , soc_inst|m0_1|u_logic|Gxxvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jvxvx4 , soc_inst|m0_1|u_logic|Jvxvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Irxvx4~0 , soc_inst|m0_1|u_logic|Irxvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zpxvx4~0 , soc_inst|m0_1|u_logic|Zpxvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ljpvx4~0 , soc_inst|m0_1|u_logic|Ljpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Joqvx4~0 , soc_inst|m0_1|u_logic|Joqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y7xvx4 , soc_inst|m0_1|u_logic|Y7xvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xipvx4~0 , soc_inst|m0_1|u_logic|Xipvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gqxvx4 , soc_inst|m0_1|u_logic|Gqxvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I6xvx4~0 , soc_inst|m0_1|u_logic|I6xvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zcn2z4 , soc_inst|m0_1|u_logic|Zcn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yplwx4~0 , soc_inst|m0_1|u_logic|Yplwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vopvx4~0 , soc_inst|m0_1|u_logic|Vopvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A1yvx4~0 , soc_inst|m0_1|u_logic|A1yvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mnpvx4~0 , soc_inst|m0_1|u_logic|Mnpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hhpvx4~0 , soc_inst|m0_1|u_logic|Hhpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z4xvx4~1 , soc_inst|m0_1|u_logic|Z4xvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z4xvx4~2 , soc_inst|m0_1|u_logic|Z4xvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z4xvx4~3 , soc_inst|m0_1|u_logic|Z4xvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O0dwx4~0 , soc_inst|m0_1|u_logic|O0dwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jky2z4 , soc_inst|m0_1|u_logic|Jky2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H0dwx4~0 , soc_inst|m0_1|u_logic|H0dwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xucwx4~0 , soc_inst|m0_1|u_logic|Xucwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ulhvx4~1 , soc_inst|m0_1|u_logic|Ulhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ulhvx4~2 , soc_inst|m0_1|u_logic|Ulhvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R8x2z4~DUPLICATE , soc_inst|m0_1|u_logic|R8x2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yuovx4 , soc_inst|m0_1|u_logic|Yuovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[2] , soc_inst|ram_1|saved_word_address[2], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory.raddr_a[2]~2 , soc_inst|ram_1|memory.raddr_a[2]~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[17]~12 , soc_inst|ram_1|data_to_memory[17]~12, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[9]~11 , soc_inst|ram_1|data_to_memory[9]~11, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M7qwx4~0 , soc_inst|m0_1|u_logic|M7qwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mjlwx4~0 , soc_inst|m0_1|u_logic|Mjlwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mjlwx4~1 , soc_inst|m0_1|u_logic|Mjlwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bo0wx4~0 , soc_inst|m0_1|u_logic|Bo0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bo0wx4 , soc_inst|m0_1|u_logic|Bo0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zjq2z4 , soc_inst|m0_1|u_logic|Zjq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ithvx4~0 , soc_inst|m0_1|u_logic|Ithvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ithvx4~1 , soc_inst|m0_1|u_logic|Ithvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ql0wx4 , soc_inst|m0_1|u_logic|Ql0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xvjvx4~0 , soc_inst|m0_1|u_logic|Xvjvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L7p2z4 , soc_inst|m0_1|u_logic|L7p2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~1 , soc_inst|m0_1|u_logic|Nn0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ht53z4 , soc_inst|m0_1|u_logic|Ht53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE , soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~3 , soc_inst|m0_1|u_logic|Nn0wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yj43z4 , soc_inst|m0_1|u_logic|Yj43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A9p2z4 , soc_inst|m0_1|u_logic|A9p2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~2 , soc_inst|m0_1|u_logic|Nn0wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~5 , soc_inst|m0_1|u_logic|Nn0wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4 , soc_inst|m0_1|u_logic|Nn0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Un0wx4~0 , soc_inst|m0_1|u_logic|Un0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xl0wx4~1 , soc_inst|m0_1|u_logic|Xl0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xl0wx4~0 , soc_inst|m0_1|u_logic|Xl0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6u2z4 , soc_inst|m0_1|u_logic|Q6u2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q273z4 , soc_inst|m0_1|u_logic|Q273z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE , soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bjxwx4~1 , soc_inst|m0_1|u_logic|Bjxwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pap2z4 , soc_inst|m0_1|u_logic|Pap2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bjxwx4~0 , soc_inst|m0_1|u_logic|Bjxwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bjxwx4 , soc_inst|m0_1|u_logic|Bjxwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jtdwx4~0 , soc_inst|m0_1|u_logic|Jtdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jtdwx4~1 , soc_inst|m0_1|u_logic|Jtdwx4~1, de1_soc_wrapper, 1
+instance = comp, \SW[1]~input , SW[1]~input, de1_soc_wrapper, 1
instance = comp, \soc_inst|switches_1|switch_store[1][1] , soc_inst|switches_1|switch_store[1][1], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[17]~33 , soc_inst|interconnect_1|HRDATA[17]~33, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jqhvx4~0 , soc_inst|m0_1|u_logic|Jqhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mfw2z4 , soc_inst|m0_1|u_logic|Mfw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S7nvx4~1 , soc_inst|m0_1|u_logic|S7nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S7nvx4~0 , soc_inst|m0_1|u_logic|S7nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S7nvx4~2 , soc_inst|m0_1|u_logic|S7nvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rxl2z4 , soc_inst|m0_1|u_logic|Rxl2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fmqvx4~1 , soc_inst|m0_1|u_logic|Fmqvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fmqvx4~0 , soc_inst|m0_1|u_logic|Fmqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Onqvx4~0 , soc_inst|m0_1|u_logic|Onqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fmqvx4~2 , soc_inst|m0_1|u_logic|Fmqvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fmqvx4~3 , soc_inst|m0_1|u_logic|Fmqvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE , soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mbtwx4~0 , soc_inst|m0_1|u_logic|Mbtwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bgfwx4~0 , soc_inst|m0_1|u_logic|Bgfwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bgfwx4~1 , soc_inst|m0_1|u_logic|Bgfwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C2rvx4~0 , soc_inst|m0_1|u_logic|C2rvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C2rvx4~1 , soc_inst|m0_1|u_logic|C2rvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C2rvx4~2 , soc_inst|m0_1|u_logic|C2rvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qppvx4~2 , soc_inst|m0_1|u_logic|Qppvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ukt2z4 , soc_inst|m0_1|u_logic|Ukt2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ug63z4 , soc_inst|m0_1|u_logic|Ug63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE , soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V7ywx4~1 , soc_inst|m0_1|u_logic|V7ywx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Txj2z4 , soc_inst|m0_1|u_logic|Txj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Duu2z4 , soc_inst|m0_1|u_logic|Duu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V7ywx4~0 , soc_inst|m0_1|u_logic|V7ywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V7ywx4 , soc_inst|m0_1|u_logic|V7ywx4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|A7ywx4~0 , soc_inst|m0_1|u_logic|A7ywx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|D5ywx4~0 , soc_inst|m0_1|u_logic|D5ywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Asdwx4~1 , soc_inst|m0_1|u_logic|Asdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dks2z4 , soc_inst|m0_1|u_logic|Dks2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bus2z4 , soc_inst|m0_1|u_logic|Bus2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Avowx4~0 , soc_inst|m0_1|u_logic|Avowx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Avowx4~1 , soc_inst|m0_1|u_logic|Avowx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Avowx4~2 , soc_inst|m0_1|u_logic|Avowx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y7iwx4~0 , soc_inst|m0_1|u_logic|Y7iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y7iwx4~1 , soc_inst|m0_1|u_logic|Y7iwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y7iwx4~2 , soc_inst|m0_1|u_logic|Y7iwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zuzvx4~0 , soc_inst|m0_1|u_logic|Zuzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zuzvx4~1 , soc_inst|m0_1|u_logic|Zuzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Glhvx4~0 , soc_inst|m0_1|u_logic|Glhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Glhvx4~1 , soc_inst|m0_1|u_logic|Glhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Glhvx4~2 , soc_inst|m0_1|u_logic|Glhvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nbx2z4 , soc_inst|m0_1|u_logic|Nbx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fskvx4~0 , soc_inst|m0_1|u_logic|Fskvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U593z4 , soc_inst|m0_1|u_logic|U593z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ikz2z4 , soc_inst|m0_1|u_logic|Ikz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ch03z4 , soc_inst|m0_1|u_logic|Ch03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sj62z4~2 , soc_inst|m0_1|u_logic|Sj62z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mcz2z4 , soc_inst|m0_1|u_logic|Mcz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pl62z4~0 , soc_inst|m0_1|u_logic|Pl62z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wd13z4 , soc_inst|m0_1|u_logic|Wd13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fn23z4 , soc_inst|m0_1|u_logic|Fn23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sj62z4~1 , soc_inst|m0_1|u_logic|Sj62z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X553z4 , soc_inst|m0_1|u_logic|X553z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ow33z4 , soc_inst|m0_1|u_logic|Ow33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sj62z4~0 , soc_inst|m0_1|u_logic|Sj62z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sj62z4~3 , soc_inst|m0_1|u_logic|Sj62z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yonvx4~0 , soc_inst|m0_1|u_logic|Yonvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wsawx4~1 , soc_inst|m0_1|u_logic|Wsawx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wsawx4~0 , soc_inst|m0_1|u_logic|Wsawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z4qvx4~0 , soc_inst|m0_1|u_logic|Z4qvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z4qvx4 , soc_inst|m0_1|u_logic|Z4qvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cll2z4 , soc_inst|m0_1|u_logic|Cll2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X553z4~DUPLICATE , soc_inst|m0_1|u_logic|X553z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I793z4~DUPLICATE , soc_inst|m0_1|u_logic|I793z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ht5wx4~2 , soc_inst|m0_1|u_logic|Ht5wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ow33z4~DUPLICATE , soc_inst|m0_1|u_logic|Ow33z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ht5wx4~1 , soc_inst|m0_1|u_logic|Ht5wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ht5wx4~3 , soc_inst|m0_1|u_logic|Ht5wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ht5wx4~0 , soc_inst|m0_1|u_logic|Ht5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[15]~1 , soc_inst|m0_1|u_logic|hwdata_o[15]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vgs2z4 , soc_inst|m0_1|u_logic|Vgs2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Inb2z4 , soc_inst|m0_1|u_logic|Inb2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N8b2z4 , soc_inst|m0_1|u_logic|N8b2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Luywx4~1 , soc_inst|m0_1|u_logic|Luywx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G8n2z4 , soc_inst|m0_1|u_logic|G8n2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Luywx4~4 , soc_inst|m0_1|u_logic|Luywx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Luywx4~0 , soc_inst|m0_1|u_logic|Luywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fed3z4 , soc_inst|m0_1|u_logic|Fed3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Luywx4~2 , soc_inst|m0_1|u_logic|Luywx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kss2z4 , soc_inst|m0_1|u_logic|Kss2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Luywx4~3 , soc_inst|m0_1|u_logic|Luywx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aqp2z4~DUPLICATE , soc_inst|m0_1|u_logic|Aqp2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Luywx4~5 , soc_inst|m0_1|u_logic|Luywx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Luywx4~6 , soc_inst|m0_1|u_logic|Luywx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ypa2z4~0 , soc_inst|m0_1|u_logic|Ypa2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z5pvx4~0 , soc_inst|m0_1|u_logic|Z5pvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Scpvx4~0 , soc_inst|m0_1|u_logic|Scpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|It52z4~2 , soc_inst|m0_1|u_logic|It52z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|byte3~0 , soc_inst|ram_1|byte3~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|byte_select[3] , soc_inst|ram_1|byte_select[3], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[25]~21 , soc_inst|interconnect_1|HRDATA[25]~21, de1_soc_wrapper, 1
-instance = comp, \SW[8]~input , SW[8]~input, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[1][8] , soc_inst|switches_1|switch_store[1][8], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[24]~48 , soc_inst|interconnect_1|HRDATA[24]~48, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V5nvx4~0 , soc_inst|m0_1|u_logic|V5nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6y2z4 , soc_inst|m0_1|u_logic|K6y2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mohvx4~0 , soc_inst|m0_1|u_logic|Mohvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gqw2z4 , soc_inst|m0_1|u_logic|Gqw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V5nvx4~1 , soc_inst|m0_1|u_logic|V5nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V5nvx4~2 , soc_inst|m0_1|u_logic|V5nvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bsy2z4 , soc_inst|m0_1|u_logic|Bsy2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~1 , soc_inst|m0_1|u_logic|Yafwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~2 , soc_inst|m0_1|u_logic|Yafwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~3 , soc_inst|m0_1|u_logic|Yafwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nkpvx4~0 , soc_inst|m0_1|u_logic|Nkpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~4 , soc_inst|m0_1|u_logic|Yafwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rjrwx4~0 , soc_inst|m0_1|u_logic|Rjrwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J3xvx4 , soc_inst|m0_1|u_logic|J3xvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~5 , soc_inst|m0_1|u_logic|Yafwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mvc2z4 , soc_inst|m0_1|u_logic|Mvc2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kuc2z4~0 , soc_inst|m0_1|u_logic|Kuc2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kuc2z4~1 , soc_inst|m0_1|u_logic|Kuc2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F7qwx4 , soc_inst|m0_1|u_logic|F7qwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[26]~8 , soc_inst|ram_1|data_to_memory[26]~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T7qwx4~0 , soc_inst|m0_1|u_logic|T7qwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jkmwx4~0 , soc_inst|m0_1|u_logic|Jkmwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jkmwx4~1 , soc_inst|m0_1|u_logic|Jkmwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yjzvx4~0 , soc_inst|m0_1|u_logic|Yjzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yjzvx4~1 , soc_inst|m0_1|u_logic|Yjzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hihvx4~2 , soc_inst|m0_1|u_logic|Hihvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hihvx4~1 , soc_inst|m0_1|u_logic|Hihvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hihvx4~0 , soc_inst|m0_1|u_logic|Hihvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lrx2z4 , soc_inst|m0_1|u_logic|Lrx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~21 , soc_inst|m0_1|u_logic|Add3~21, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nhzvx4 , soc_inst|m0_1|u_logic|Nhzvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R5lvx4~0 , soc_inst|m0_1|u_logic|R5lvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S8k2z4 , soc_inst|m0_1|u_logic|S8k2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fm72z4~0 , soc_inst|m0_1|u_logic|Fm72z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wnh3z4 , soc_inst|m0_1|u_logic|Wnh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fm72z4~2 , soc_inst|m0_1|u_logic|Fm72z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zu23z4 , soc_inst|m0_1|u_logic|Zu23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ql13z4~DUPLICATE , soc_inst|m0_1|u_logic|Ql13z4~DUPLICATE, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Fm72z4~1 , soc_inst|m0_1|u_logic|Fm72z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hmh3z4~DUPLICATE , soc_inst|m0_1|u_logic|Hmh3z4~DUPLICATE, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Co72z4~0 , soc_inst|m0_1|u_logic|Co72z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djh3z4 , soc_inst|m0_1|u_logic|Djh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fm72z4~2 , soc_inst|m0_1|u_logic|Fm72z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rd53z4 , soc_inst|m0_1|u_logic|Rd53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fm72z4~0 , soc_inst|m0_1|u_logic|Fm72z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE , soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Fm72z4~3 , soc_inst|m0_1|u_logic|Fm72z4~3, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Lsnvx4~0 , soc_inst|m0_1|u_logic|Lsnvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Add3~17 , soc_inst|m0_1|u_logic|Add3~17, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Vezvx4 , soc_inst|m0_1|u_logic|Vezvx4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Galvx4~0 , soc_inst|m0_1|u_logic|Galvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Hak2z4 , soc_inst|m0_1|u_logic|Hak2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qh72z4~0 , soc_inst|m0_1|u_logic|Qh72z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tf72z4~2 , soc_inst|m0_1|u_logic|Tf72z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I453z4~DUPLICATE , soc_inst|m0_1|u_logic|I453z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aez2z4 , soc_inst|m0_1|u_logic|Aez2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zu33z4 , soc_inst|m0_1|u_logic|Zu33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I453z4 , soc_inst|m0_1|u_logic|I453z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Tf72z4~0 , soc_inst|m0_1|u_logic|Tf72z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ql23z4 , soc_inst|m0_1|u_logic|Ql23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc13z4~feeder , soc_inst|m0_1|u_logic|Hc13z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc13z4 , soc_inst|m0_1|u_logic|Hc13z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Tf72z4~1 , soc_inst|m0_1|u_logic|Tf72z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tiz2z4~feeder , soc_inst|m0_1|u_logic|Tiz2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nf03z4~DUPLICATE , soc_inst|m0_1|u_logic|Nf03z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tf72z4~2 , soc_inst|m0_1|u_logic|Tf72z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rek2z4 , soc_inst|m0_1|u_logic|Rek2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qh72z4~0 , soc_inst|m0_1|u_logic|Qh72z4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Tf72z4~3 , soc_inst|m0_1|u_logic|Tf72z4~3, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Esnvx4~0 , soc_inst|m0_1|u_logic|Esnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~13 , soc_inst|m0_1|u_logic|Add3~13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V2qvx4 , soc_inst|m0_1|u_logic|V2qvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S6ovx4~2 , soc_inst|m0_1|u_logic|S6ovx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|half_word_address~1 , soc_inst|switches_1|half_word_address~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|half_word_address~3 , soc_inst|switches_1|half_word_address~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|half_word_address[1] , soc_inst|switches_1|half_word_address[1], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[6]~13 , soc_inst|interconnect_1|HRDATA[6]~13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[8]~31 , soc_inst|interconnect_1|HRDATA[8]~31, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[0][9] , soc_inst|switches_1|switch_store[0][9], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[9]~32 , soc_inst|interconnect_1|HRDATA[9]~32, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O5nvx4~0 , soc_inst|m0_1|u_logic|O5nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add1~9 , soc_inst|m0_1|u_logic|Add1~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add1~21 , soc_inst|m0_1|u_logic|Add1~21, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add1~25 , soc_inst|m0_1|u_logic|Add1~25, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W9nvx4~0 , soc_inst|m0_1|u_logic|W9nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y7y2z4 , soc_inst|m0_1|u_logic|Y7y2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fohvx4~0 , soc_inst|m0_1|u_logic|Fohvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Urw2z4 , soc_inst|m0_1|u_logic|Urw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O5nvx4~1 , soc_inst|m0_1|u_logic|O5nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O5nvx4~2 , soc_inst|m0_1|u_logic|O5nvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pty2z4 , soc_inst|m0_1|u_logic|Pty2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G27wx4~0 , soc_inst|m0_1|u_logic|G27wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X3xvx4~0 , soc_inst|m0_1|u_logic|X3xvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X3xvx4~1 , soc_inst|m0_1|u_logic|X3xvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~3 , soc_inst|m0_1|u_logic|U6wvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~2 , soc_inst|m0_1|u_logic|U6wvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~1 , soc_inst|m0_1|u_logic|U6wvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~4 , soc_inst|m0_1|u_logic|U6wvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~5 , soc_inst|m0_1|u_logic|U6wvx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~0 , soc_inst|m0_1|u_logic|U6wvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~6 , soc_inst|m0_1|u_logic|U6wvx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lu6wx4~0 , soc_inst|m0_1|u_logic|Lu6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~7 , soc_inst|m0_1|u_logic|U6wvx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wpkwx4~0 , soc_inst|m0_1|u_logic|Wpkwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z5wvx4~0 , soc_inst|m0_1|u_logic|Z5wvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wlwvx4~0 , soc_inst|m0_1|u_logic|Wlwvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wlwvx4~1 , soc_inst|m0_1|u_logic|Wlwvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E4xvx4~1 , soc_inst|m0_1|u_logic|E4xvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B3mvx4~0 , soc_inst|m0_1|u_logic|B3mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B3mvx4~1 , soc_inst|m0_1|u_logic|B3mvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C3z2z4 , soc_inst|m0_1|u_logic|C3z2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fjswx4~0 , soc_inst|m0_1|u_logic|Fjswx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Emewx4~0 , soc_inst|m0_1|u_logic|Emewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wvswx4~0 , soc_inst|m0_1|u_logic|Wvswx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fjswx4~1 , soc_inst|m0_1|u_logic|Fjswx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE , soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rvu2z4~DUPLICATE , soc_inst|m0_1|u_logic|Rvu2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gmm2z4~DUPLICATE , soc_inst|m0_1|u_logic|Gmm2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sscvx4 , soc_inst|m0_1|u_logic|Sscvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C3qvx4~1 , soc_inst|m0_1|u_logic|C3qvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vhk2z4 , soc_inst|m0_1|u_logic|Vhk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~0 , soc_inst|m0_1|u_logic|Izpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ggk2z4 , soc_inst|m0_1|u_logic|Ggk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~1 , soc_inst|m0_1|u_logic|Izpvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nf03z4 , soc_inst|m0_1|u_logic|Nf03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE , soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tiz2z4 , soc_inst|m0_1|u_logic|Tiz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~4 , soc_inst|m0_1|u_logic|Izpvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rd63z4 , soc_inst|m0_1|u_logic|Rd63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~5 , soc_inst|m0_1|u_logic|Izpvx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aru2z4 , soc_inst|m0_1|u_logic|Aru2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~6 , soc_inst|m0_1|u_logic|Izpvx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~7 , soc_inst|m0_1|u_logic|Izpvx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE , soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~3 , soc_inst|m0_1|u_logic|Izpvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~2 , soc_inst|m0_1|u_logic|Izpvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Izpvx4 , soc_inst|m0_1|u_logic|Izpvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sx3wx4~0 , soc_inst|m0_1|u_logic|Sx3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Imvvx4~0 , soc_inst|m0_1|u_logic|Imvvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T5mvx4~0 , soc_inst|m0_1|u_logic|T5mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T5mvx4~1 , soc_inst|m0_1|u_logic|T5mvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wbk2z4 , soc_inst|m0_1|u_logic|Wbk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wwywx4~0 , soc_inst|m0_1|u_logic|Wwywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I6pwx4~0 , soc_inst|m0_1|u_logic|I6pwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N4rvx4~0 , soc_inst|m0_1|u_logic|N4rvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mbnvx4~0 , soc_inst|m0_1|u_logic|Mbnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gtp2z4 , soc_inst|m0_1|u_logic|Gtp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L8mvx4~0 , soc_inst|m0_1|u_logic|L8mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cam2z4 , soc_inst|m0_1|u_logic|Cam2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kwa2z4~0 , soc_inst|m0_1|u_logic|Kwa2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nzhvx4~0 , soc_inst|m0_1|u_logic|Nzhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oar2z4 , soc_inst|m0_1|u_logic|Oar2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zxvwx4~0 , soc_inst|m0_1|u_logic|Zxvwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zxvwx4~1 , soc_inst|m0_1|u_logic|Zxvwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Arzwx4~0 , soc_inst|m0_1|u_logic|Arzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pazwx4 , soc_inst|m0_1|u_logic|Pazwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G2zwx4~0 , soc_inst|m0_1|u_logic|G2zwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G2zwx4~1 , soc_inst|m0_1|u_logic|G2zwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W5rvx4 , soc_inst|m0_1|u_logic|W5rvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fbnvx4~0 , soc_inst|m0_1|u_logic|Fbnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Owq2z4 , soc_inst|m0_1|u_logic|Owq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Leuvx4~0 , soc_inst|m0_1|u_logic|Leuvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Leuvx4~1 , soc_inst|m0_1|u_logic|Leuvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pamvx4~0 , soc_inst|m0_1|u_logic|Pamvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bjkvx4~0 , soc_inst|m0_1|u_logic|Bjkvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bjkvx4~1 , soc_inst|m0_1|u_logic|Bjkvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ovc3z4 , soc_inst|m0_1|u_logic|Ovc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nl53z4 , soc_inst|m0_1|u_logic|Nl53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ec43z4 , soc_inst|m0_1|u_logic|Ec43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qw62z4~0 , soc_inst|m0_1|u_logic|Qw62z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wmp2z4 , soc_inst|m0_1|u_logic|Wmp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mt13z4~DUPLICATE , soc_inst|m0_1|u_logic|Mt13z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V233z4 , soc_inst|m0_1|u_logic|V233z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qw62z4~1 , soc_inst|m0_1|u_logic|Qw62z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ny62z4~0 , soc_inst|m0_1|u_logic|Ny62z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zr03z4 , soc_inst|m0_1|u_logic|Zr03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fvz2z4 , soc_inst|m0_1|u_logic|Fvz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qw62z4~2 , soc_inst|m0_1|u_logic|Qw62z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qw62z4~3 , soc_inst|m0_1|u_logic|Qw62z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mpnvx4~0 , soc_inst|m0_1|u_logic|Mpnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vcuvx4~0 , soc_inst|m0_1|u_logic|Vcuvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vcuvx4~1 , soc_inst|m0_1|u_logic|Vcuvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yxzvx4~0 , soc_inst|m0_1|u_logic|Yxzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ilp2z4 , soc_inst|m0_1|u_logic|Ilp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~6 , soc_inst|m0_1|u_logic|Eo5wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mt13z4 , soc_inst|m0_1|u_logic|Mt13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V233z4~DUPLICATE , soc_inst|m0_1|u_logic|V233z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~5 , soc_inst|m0_1|u_logic|Eo5wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~1 , soc_inst|m0_1|u_logic|Eo5wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sgp2z4~DUPLICATE , soc_inst|m0_1|u_logic|Sgp2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~3 , soc_inst|m0_1|u_logic|Eo5wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~4 , soc_inst|m0_1|u_logic|Eo5wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~0 , soc_inst|m0_1|u_logic|Eo5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~2 , soc_inst|m0_1|u_logic|Eo5wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[13]~11 , soc_inst|m0_1|u_logic|hwdata_o[13]~11, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D4g3z4~0 , soc_inst|m0_1|u_logic|D4g3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D4g3z4 , soc_inst|m0_1|u_logic|D4g3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Geuwx4~0 , soc_inst|m0_1|u_logic|Geuwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jjuwx4~2 , soc_inst|m0_1|u_logic|Jjuwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U5pwx4~0 , soc_inst|m0_1|u_logic|U5pwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kzqvx4~1 , soc_inst|m0_1|u_logic|Kzqvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Viuwx4~0 , soc_inst|m0_1|u_logic|Viuwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B6pwx4~4 , soc_inst|m0_1|u_logic|B6pwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kzqvx4~2 , soc_inst|m0_1|u_logic|Kzqvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kzqvx4~0 , soc_inst|m0_1|u_logic|Kzqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T5g3z4 , soc_inst|m0_1|u_logic|T5g3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[13]~27 , soc_inst|interconnect_1|HRDATA[13]~27, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Twmwx4~0 , soc_inst|m0_1|u_logic|Twmwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Twmwx4~1 , soc_inst|m0_1|u_logic|Twmwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Twmwx4~2 , soc_inst|m0_1|u_logic|Twmwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bspvx4~0 , soc_inst|m0_1|u_logic|Bspvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bspvx4~1 , soc_inst|m0_1|u_logic|Bspvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xowwx4~0 , soc_inst|m0_1|u_logic|Xowwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xowwx4~1 , soc_inst|m0_1|u_logic|Xowwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xowwx4 , soc_inst|m0_1|u_logic|Xowwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ok7wx4~0 , soc_inst|m0_1|u_logic|Ok7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mj7wx4~0 , soc_inst|m0_1|u_logic|Mj7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jl7wx4~0 , soc_inst|m0_1|u_logic|Jl7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Et7wx4~0 , soc_inst|m0_1|u_logic|Et7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nu7wx4~0 , soc_inst|m0_1|u_logic|Nu7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mj7wx4~1 , soc_inst|m0_1|u_logic|Mj7wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dtpvx4~2 , soc_inst|m0_1|u_logic|Dtpvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dtpvx4~0 , soc_inst|m0_1|u_logic|Dtpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~129 , soc_inst|m0_1|u_logic|Add5~129, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dtpvx4~1 , soc_inst|m0_1|u_logic|Dtpvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zei2z4~0 , soc_inst|m0_1|u_logic|Zei2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zei2z4~1 , soc_inst|m0_1|u_logic|Zei2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zei2z4 , soc_inst|m0_1|u_logic|Zei2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qynvx4~0 , soc_inst|m0_1|u_logic|Qynvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qynvx4~1 , soc_inst|m0_1|u_logic|Qynvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vxnvx4~1 , soc_inst|m0_1|u_logic|Vxnvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~134 , soc_inst|m0_1|u_logic|Add5~134, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G5qvx4~2 , soc_inst|m0_1|u_logic|G5qvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G5qvx4~1 , soc_inst|m0_1|u_logic|G5qvx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Ejm2z4 , soc_inst|m0_1|u_logic|Ejm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gmm2z4 , soc_inst|m0_1|u_logic|Gmm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Unm2z4~DUPLICATE , soc_inst|m0_1|u_logic|Unm2z4~DUPLICATE, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Q8ywx4~1 , soc_inst|m0_1|u_logic|Q8ywx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Skm2z4 , soc_inst|m0_1|u_logic|Skm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Imt2z4~DUPLICATE , soc_inst|m0_1|u_logic|Imt2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Imt2z4 , soc_inst|m0_1|u_logic|Imt2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Q8ywx4~0 , soc_inst|m0_1|u_logic|Q8ywx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Q8ywx4 , soc_inst|m0_1|u_logic|Q8ywx4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|W4ywx4~0 , soc_inst|m0_1|u_logic|W4ywx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Mzxwx4~0 , soc_inst|m0_1|u_logic|Mzxwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y9nwx4~0 , soc_inst|m0_1|u_logic|Y9nwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Omyvx4~1 , soc_inst|m0_1|u_logic|Omyvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W4zvx4~0 , soc_inst|m0_1|u_logic|W4zvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W4zvx4~1 , soc_inst|m0_1|u_logic|W4zvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zkhvx4~0 , soc_inst|m0_1|u_logic|Zkhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zkhvx4~1 , soc_inst|m0_1|u_logic|Zkhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zkhvx4~2 , soc_inst|m0_1|u_logic|Zkhvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ycx2z4 , soc_inst|m0_1|u_logic|Ycx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pgnvx4~0 , soc_inst|m0_1|u_logic|Pgnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I793z4 , soc_inst|m0_1|u_logic|I793z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qwr2z4 , soc_inst|m0_1|u_logic|Qwr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hp9wx4~0 , soc_inst|m0_1|u_logic|Hp9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qz43z4~DUPLICATE , soc_inst|m0_1|u_logic|Qz43z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kn9wx4~0 , soc_inst|m0_1|u_logic|Kn9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hq33z4 , soc_inst|m0_1|u_logic|Hq33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kn9wx4~1 , soc_inst|m0_1|u_logic|Kn9wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kn9wx4~2 , soc_inst|m0_1|u_logic|Kn9wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eyr2z4 , soc_inst|m0_1|u_logic|Eyr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kn9wx4~3 , soc_inst|m0_1|u_logic|Kn9wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F32wx4~0 , soc_inst|m0_1|u_logic|F32wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z6ovx4 , soc_inst|m0_1|u_logic|Z6ovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nmnvx4~0 , soc_inst|m0_1|u_logic|Nmnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mjl2z4 , soc_inst|m0_1|u_logic|Mjl2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B7owx4 , soc_inst|m0_1|u_logic|B7owx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ckmwx4~0 , soc_inst|m0_1|u_logic|Ckmwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zluvx4~0 , soc_inst|m0_1|u_logic|Zluvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zluvx4~1 , soc_inst|m0_1|u_logic|Zluvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Imhvx4~0 , soc_inst|m0_1|u_logic|Imhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Imhvx4~1 , soc_inst|m0_1|u_logic|Imhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Imhvx4~2 , soc_inst|m0_1|u_logic|Imhvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J4x2z4 , soc_inst|m0_1|u_logic|J4x2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C1zvx4 , soc_inst|m0_1|u_logic|C1zvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M1j2z4~0 , soc_inst|m0_1|u_logic|M1j2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M1j2z4~3 , soc_inst|m0_1|u_logic|M1j2z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M1j2z4~1 , soc_inst|m0_1|u_logic|M1j2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M1j2z4~2 , soc_inst|m0_1|u_logic|M1j2z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE , soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pu1wx4 , soc_inst|m0_1|u_logic|Pu1wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J5m2z4 , soc_inst|m0_1|u_logic|J5m2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X6m2z4 , soc_inst|m0_1|u_logic|X6m2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gf43z4 , soc_inst|m0_1|u_logic|Gf43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Po53z4 , soc_inst|m0_1|u_logic|Po53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ow13z4 , soc_inst|m0_1|u_logic|Ow13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xx93z4 , soc_inst|m0_1|u_logic|Xx93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R40wx4~1 , soc_inst|m0_1|u_logic|R40wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bv03z4 , soc_inst|m0_1|u_logic|Bv03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X533z4~DUPLICATE , soc_inst|m0_1|u_logic|X533z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R40wx4~2 , soc_inst|m0_1|u_logic|R40wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R40wx4~0 , soc_inst|m0_1|u_logic|R40wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yx63z4~DUPLICATE , soc_inst|m0_1|u_logic|Yx63z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE , soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H783z4 , soc_inst|m0_1|u_logic|H783z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fzxwx4~1 , soc_inst|m0_1|u_logic|Fzxwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fzxwx4~0 , soc_inst|m0_1|u_logic|Fzxwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fzxwx4 , soc_inst|m0_1|u_logic|Fzxwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R40wx4 , soc_inst|m0_1|u_logic|R40wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L4bwx4~0 , soc_inst|m0_1|u_logic|L4bwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S4bwx4~0 , soc_inst|m0_1|u_logic|S4bwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q3bwx4~0 , soc_inst|m0_1|u_logic|Q3bwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O2bwx4~0 , soc_inst|m0_1|u_logic|O2bwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I30wx4~0 , soc_inst|m0_1|u_logic|I30wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I30wx4~1 , soc_inst|m0_1|u_logic|I30wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I30wx4~2 , soc_inst|m0_1|u_logic|I30wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U0vvx4~0 , soc_inst|m0_1|u_logic|U0vvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U0vvx4~1 , soc_inst|m0_1|u_logic|U0vvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I30wx4~3 , soc_inst|m0_1|u_logic|I30wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hyz2z4 , soc_inst|m0_1|u_logic|Hyz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D7bwx4~2 , soc_inst|m0_1|u_logic|D7bwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X533z4 , soc_inst|m0_1|u_logic|X533z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D7bwx4~1 , soc_inst|m0_1|u_logic|D7bwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE , soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D7bwx4~0 , soc_inst|m0_1|u_logic|D7bwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE , soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A9bwx4~0 , soc_inst|m0_1|u_logic|A9bwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D7bwx4~3 , soc_inst|m0_1|u_logic|D7bwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aqnvx4~0 , soc_inst|m0_1|u_logic|Aqnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ekovx4 , soc_inst|m0_1|u_logic|Ekovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[1] , soc_inst|ram_1|saved_word_address[1], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory.raddr_a[1]~1 , soc_inst|ram_1|memory.raddr_a[1]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[12]~14 , soc_inst|ram_1|data_to_memory[12]~14, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[4]~13 , soc_inst|ram_1|data_to_memory[4]~13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[12]~38 , soc_inst|interconnect_1|HRDATA[12]~38, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zgsvx4~0 , soc_inst|m0_1|u_logic|Zgsvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T4nvx4~0 , soc_inst|m0_1|u_logic|T4nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M9y2z4~DUPLICATE , soc_inst|m0_1|u_logic|M9y2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add1~29 , soc_inst|m0_1|u_logic|Add1~29, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add1~13 , soc_inst|m0_1|u_logic|Add1~13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add1~1 , soc_inst|m0_1|u_logic|Add1~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B9nvx4~0 , soc_inst|m0_1|u_logic|B9nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qcy2z4 , soc_inst|m0_1|u_logic|Qcy2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Knhvx4~0 , soc_inst|m0_1|u_logic|Knhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mww2z4 , soc_inst|m0_1|u_logic|Mww2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T4nvx4~1 , soc_inst|m0_1|u_logic|T4nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hyy2z4 , soc_inst|m0_1|u_logic|Hyy2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Csewx4~0 , soc_inst|m0_1|u_logic|Csewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V1yvx4~0 , soc_inst|m0_1|u_logic|V1yvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ho3wx4~0 , soc_inst|m0_1|u_logic|Ho3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~0 , soc_inst|m0_1|u_logic|Df3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qp3wx4~0 , soc_inst|m0_1|u_logic|Qp3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~1 , soc_inst|m0_1|u_logic|Df3wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~3 , soc_inst|m0_1|u_logic|Df3wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~2 , soc_inst|m0_1|u_logic|Df3wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~4 , soc_inst|m0_1|u_logic|Df3wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~5 , soc_inst|m0_1|u_logic|Df3wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~6 , soc_inst|m0_1|u_logic|Df3wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~7 , soc_inst|m0_1|u_logic|Df3wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R1pvx4~0 , soc_inst|m0_1|u_logic|R1pvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Khnvx4~0 , soc_inst|m0_1|u_logic|Khnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Khnvx4~1 , soc_inst|m0_1|u_logic|Khnvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ohh3z4 , soc_inst|m0_1|u_logic|Ohh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N662z4~0 , soc_inst|m0_1|u_logic|N662z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K862z4~0 , soc_inst|m0_1|u_logic|K862z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kt23z4~DUPLICATE , soc_inst|m0_1|u_logic|Kt23z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N662z4~1 , soc_inst|m0_1|u_logic|N662z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N662z4~2 , soc_inst|m0_1|u_logic|N662z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N662z4~3 , soc_inst|m0_1|u_logic|N662z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xrnvx4~0 , soc_inst|m0_1|u_logic|Xrnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~9 , soc_inst|m0_1|u_logic|Add3~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|haddr_o[29] , soc_inst|m0_1|u_logic|haddr_o[29], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|LessThan1~0 , soc_inst|interconnect_1|LessThan1~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|mux_sel[2] , soc_inst|interconnect_1|mux_sel[2], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[25]~2 , soc_inst|interconnect_1|HRDATA[25]~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[31]~3 , soc_inst|interconnect_1|HRDATA[31]~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S9ywx4~0 , soc_inst|m0_1|u_logic|S9ywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S9ywx4~1 , soc_inst|m0_1|u_logic|S9ywx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S9ywx4~2 , soc_inst|m0_1|u_logic|S9ywx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Otxwx4~0 , soc_inst|m0_1|u_logic|Otxwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Palwx4~0 , soc_inst|m0_1|u_logic|Palwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Prwwx4~0 , soc_inst|m0_1|u_logic|Prwwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oldwx4~0 , soc_inst|m0_1|u_logic|Oldwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M2b3z4~DUPLICATE , soc_inst|m0_1|u_logic|M2b3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mbt2z4 , soc_inst|m0_1|u_logic|Mbt2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yrqwx4~0 , soc_inst|m0_1|u_logic|Yrqwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ojmwx4~0 , soc_inst|m0_1|u_logic|Ojmwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ojmwx4~1 , soc_inst|m0_1|u_logic|Ojmwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ojmwx4~2 , soc_inst|m0_1|u_logic|Ojmwx4~2, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Wn1wx4~0 , soc_inst|m0_1|u_logic|Wn1wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Wn1wx4~1 , soc_inst|m0_1|u_logic|Wn1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pn1wx4~0 , soc_inst|m0_1|u_logic|Pn1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H903z4 , soc_inst|m0_1|u_logic|H903z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B613z4 , soc_inst|m0_1|u_logic|B613z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~4 , soc_inst|m0_1|u_logic|Zh5wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D432z4~0 , soc_inst|m0_1|u_logic|D432z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I463z4~DUPLICATE , soc_inst|m0_1|u_logic|I463z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~3 , soc_inst|m0_1|u_logic|Zh5wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~1 , soc_inst|m0_1|u_logic|Zh5wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zu43z4 , soc_inst|m0_1|u_logic|Zu43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~2 , soc_inst|m0_1|u_logic|Zh5wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~0 , soc_inst|m0_1|u_logic|Zh5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~5 , soc_inst|m0_1|u_logic|Zh5wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~9 , soc_inst|m0_1|u_logic|Zh5wx4~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[10]~8 , soc_inst|m0_1|u_logic|hwdata_o[10]~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[10]~7 , soc_inst|ram_1|data_to_memory[10]~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[10]~19 , soc_inst|interconnect_1|HRDATA[10]~19, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P9nvx4~0 , soc_inst|m0_1|u_logic|P9nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M9y2z4 , soc_inst|m0_1|u_logic|M9y2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ynhvx4~0 , soc_inst|m0_1|u_logic|Ynhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Itw2z4 , soc_inst|m0_1|u_logic|Itw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dcsvx4~0 , soc_inst|m0_1|u_logic|Dcsvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H5nvx4~0 , soc_inst|m0_1|u_logic|H5nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H5nvx4~1 , soc_inst|m0_1|u_logic|H5nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dvy2z4 , soc_inst|m0_1|u_logic|Dvy2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rafwx4~0 , soc_inst|m0_1|u_logic|Rafwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rni2z4 , soc_inst|m0_1|u_logic|Rni2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Knz2z4 , soc_inst|m0_1|u_logic|Knz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oxnvx4~2 , soc_inst|m0_1|u_logic|Oxnvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hq23z4~DUPLICATE , soc_inst|m0_1|u_logic|Hq23z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oxnvx4~1 , soc_inst|m0_1|u_logic|Oxnvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qz33z4 , soc_inst|m0_1|u_logic|Qz33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oxnvx4~0 , soc_inst|m0_1|u_logic|Oxnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oxnvx4~3 , soc_inst|m0_1|u_logic|Oxnvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N5qvx4~0 , soc_inst|m0_1|u_logic|N5qvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|byte0~0 , soc_inst|ram_1|byte0~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|byte_select[0] , soc_inst|ram_1|byte_select[0], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[3]~17 , soc_inst|ram_1|data_to_memory[3]~17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[0][3] , soc_inst|switches_1|switch_store[0][3], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a91 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a91, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a123 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a123, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a59 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a59, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w3_n0_mux_dataout~3 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w3_n0_mux_dataout~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a107 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a107, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a75 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a75, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a43 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a43, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w3_n0_mux_dataout~1 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w3_n0_mux_dataout~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a51 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a51, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a83 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a83, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a115 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a115, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w3_n0_mux_dataout~2 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w3_n0_mux_dataout~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a99 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a99, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a67 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a67, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w3_n0_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w3_n0_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w3_n0_mux_dataout~4 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w3_n0_mux_dataout~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory~4 , soc_inst|pix1|memory~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0_bypass[42] , soc_inst|pix1|memory_rtl_0_bypass[42], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[3]~64 , soc_inst|interconnect_1|HRDATA[3]~64, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a291 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a291, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l6_w3_n0_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l6_w3_n0_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a275 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a275, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a267 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a267, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a259 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a259, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a283 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a283, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w3_n8_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w3_n8_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[3]~65 , soc_inst|interconnect_1|HRDATA[3]~65, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a195 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a195, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a203 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a203, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a219 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a219, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a211 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a211, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w3_n1_mux_dataout~2 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w3_n1_mux_dataout~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a227 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a227, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a235 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a235, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a251 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a251, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a243 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a243, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w3_n1_mux_dataout~3 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w3_n1_mux_dataout~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a139 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a139, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a131 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a131, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a147 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a147, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a155 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a155, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w3_n1_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w3_n1_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a187 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a187, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a179 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a179, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a163 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a163, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a171 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a171, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w3_n1_mux_dataout~1 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w3_n1_mux_dataout~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w3_n1_mux_dataout~4 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w3_n1_mux_dataout~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[3]~40 , soc_inst|interconnect_1|HRDATA[3]~40, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[3]~41 , soc_inst|interconnect_1|HRDATA[3]~41, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mbnvx4~0 , soc_inst|m0_1|u_logic|Mbnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gtp2z4~0 , soc_inst|m0_1|u_logic|Gtp2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gtp2z4 , soc_inst|m0_1|u_logic|Gtp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~41 , soc_inst|m0_1|u_logic|Add2~41, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lkhvx4~1 , soc_inst|m0_1|u_logic|Lkhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lkhvx4~0 , soc_inst|m0_1|u_logic|Lkhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ufx2z4 , soc_inst|m0_1|u_logic|Ufx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~85 , soc_inst|m0_1|u_logic|Add2~85, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uehvx4~1 , soc_inst|m0_1|u_logic|Uehvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uehvx4~0 , soc_inst|m0_1|u_logic|Uehvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gmd3z4 , soc_inst|m0_1|u_logic|Gmd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fhx2z4 , soc_inst|m0_1|u_logic|Fhx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ekhvx4~0 , soc_inst|m0_1|u_logic|Ekhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uf1wx4~0 , soc_inst|m0_1|u_logic|Uf1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uf1wx4~1 , soc_inst|m0_1|u_logic|Uf1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ekhvx4~1 , soc_inst|m0_1|u_logic|Ekhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE , soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L4jvx4~0 , soc_inst|m0_1|u_logic|L4jvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dkr2z4 , soc_inst|m0_1|u_logic|Dkr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~7 , soc_inst|m0_1|u_logic|Ze1wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~8 , soc_inst|m0_1|u_logic|Ze1wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ejawx4~1 , soc_inst|m0_1|u_logic|Ejawx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nf1wx4~1 , soc_inst|m0_1|u_logic|Nf1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qd1wx4~0 , soc_inst|m0_1|u_logic|Qd1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qd1wx4~1 , soc_inst|m0_1|u_logic|Qd1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oir2z4 , soc_inst|m0_1|u_logic|Oir2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dy4xx4~0 , soc_inst|m0_1|u_logic|Dy4xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cgu2z4~DUPLICATE , soc_inst|m0_1|u_logic|Cgu2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~4 , soc_inst|m0_1|u_logic|Ze1wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE , soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~3 , soc_inst|m0_1|u_logic|Ze1wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~1 , soc_inst|m0_1|u_logic|Ze1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M413z4 , soc_inst|m0_1|u_logic|M413z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~2 , soc_inst|m0_1|u_logic|Ze1wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ll83z4 , soc_inst|m0_1|u_logic|Ll83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~0 , soc_inst|m0_1|u_logic|Ze1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~5 , soc_inst|m0_1|u_logic|Ze1wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4 , soc_inst|m0_1|u_logic|Ze1wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[12]~19 , soc_inst|m0_1|u_logic|hwdata_o[12]~19, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L7a3z4 , soc_inst|m0_1|u_logic|L7a3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~37 , soc_inst|m0_1|u_logic|Add0~37, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ypmvx4~0 , soc_inst|m0_1|u_logic|Ypmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iua3z4 , soc_inst|m0_1|u_logic|Iua3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~61 , soc_inst|m0_1|u_logic|Add0~61, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rpmvx4~0 , soc_inst|m0_1|u_logic|Rpmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K7g3z4 , soc_inst|m0_1|u_logic|K7g3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~81 , soc_inst|m0_1|u_logic|Add0~81, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kpmvx4~0 , soc_inst|m0_1|u_logic|Kpmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rsa3z4 , soc_inst|m0_1|u_logic|Rsa3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D4a3z4~0 , soc_inst|m0_1|u_logic|D4a3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D4a3z4 , soc_inst|m0_1|u_logic|D4a3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dpmvx4~0 , soc_inst|m0_1|u_logic|Dpmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ara3z4 , soc_inst|m0_1|u_logic|Ara3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wjxwx4~1 , soc_inst|m0_1|u_logic|Wjxwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wjxwx4~0 , soc_inst|m0_1|u_logic|Wjxwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wjxwx4~2 , soc_inst|m0_1|u_logic|Wjxwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wjxwx4~3 , soc_inst|m0_1|u_logic|Wjxwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wjxwx4~4 , soc_inst|m0_1|u_logic|Wjxwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~0 , soc_inst|m0_1|u_logic|hwdata_o~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[31]~1 , soc_inst|ram_1|data_to_memory[31]~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[15]~4 , soc_inst|interconnect_1|HRDATA[15]~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U9lwx4~0 , soc_inst|m0_1|u_logic|U9lwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U9lwx4~1 , soc_inst|m0_1|u_logic|U9lwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mtwwx4~0 , soc_inst|m0_1|u_logic|Mtwwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zz1wx4~2 , soc_inst|m0_1|u_logic|Zz1wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zz1wx4~1 , soc_inst|m0_1|u_logic|Zz1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K22wx4~1 , soc_inst|m0_1|u_logic|K22wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K22wx4~0 , soc_inst|m0_1|u_logic|K22wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zz1wx4~0 , soc_inst|m0_1|u_logic|Zz1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hq33z4~DUPLICATE , soc_inst|m0_1|u_logic|Hq33z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E913z4~DUPLICATE , soc_inst|m0_1|u_logic|E913z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P12wx4~7 , soc_inst|m0_1|u_logic|P12wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Imu2z4~DUPLICATE , soc_inst|m0_1|u_logic|Imu2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P12wx4~4 , soc_inst|m0_1|u_logic|P12wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eyr2z4~DUPLICATE , soc_inst|m0_1|u_logic|Eyr2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Otr2z4 , soc_inst|m0_1|u_logic|Otr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P12wx4~5 , soc_inst|m0_1|u_logic|P12wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P12wx4~6 , soc_inst|m0_1|u_logic|P12wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P12wx4~0 , soc_inst|m0_1|u_logic|P12wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rr83z4 , soc_inst|m0_1|u_logic|Rr83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qz43z4~DUPLICATE , soc_inst|m0_1|u_logic|Qz43z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yg23z4 , soc_inst|m0_1|u_logic|Yg23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P12wx4~1 , soc_inst|m0_1|u_logic|P12wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z863z4~DUPLICATE , soc_inst|m0_1|u_logic|Z863z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P12wx4~2 , soc_inst|m0_1|u_logic|P12wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P12wx4~3 , soc_inst|m0_1|u_logic|P12wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P12wx4 , soc_inst|m0_1|u_logic|P12wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lk9wx4~1 , soc_inst|m0_1|u_logic|Lk9wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfhvx4~1 , soc_inst|m0_1|u_logic|Bfhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V4d3z4 , soc_inst|m0_1|u_logic|V4d3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xxovx4 , soc_inst|m0_1|u_logic|Xxovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE , soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dmivx4~0 , soc_inst|m0_1|u_logic|Dmivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dmivx4~1 , soc_inst|m0_1|u_logic|Dmivx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G1s2z4 , soc_inst|m0_1|u_logic|G1s2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rds2z4~DUPLICATE , soc_inst|m0_1|u_logic|Rds2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dcs2z4 , soc_inst|m0_1|u_logic|Dcs2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ria2z4~0 , soc_inst|m0_1|u_logic|Ria2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H903z4 , soc_inst|m0_1|u_logic|H903z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uga2z4~2 , soc_inst|m0_1|u_logic|Uga2z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uga2z4~1 , soc_inst|m0_1|u_logic|Uga2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE , soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I463z4 , soc_inst|m0_1|u_logic|I463z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uga2z4~0 , soc_inst|m0_1|u_logic|Uga2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uga2z4~3 , soc_inst|m0_1|u_logic|Uga2z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hxnvx4~0 , soc_inst|m0_1|u_logic|Hxnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jxovx4 , soc_inst|m0_1|u_logic|Jxovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qknvx4~0 , soc_inst|m0_1|u_logic|Qknvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ffs2z4 , soc_inst|m0_1|u_logic|Ffs2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F4nvx4~0 , soc_inst|m0_1|u_logic|F4nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F4nvx4~1 , soc_inst|m0_1|u_logic|F4nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K3l2z4 , soc_inst|m0_1|u_logic|K3l2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ux4wx4~0 , soc_inst|m0_1|u_logic|Ux4wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P2a3z4 , soc_inst|m0_1|u_logic|P2a3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Inb2z4 , soc_inst|m0_1|u_logic|Inb2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~3 , soc_inst|m0_1|u_logic|Vsywx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~1 , soc_inst|m0_1|u_logic|Vsywx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bjd3z4 , soc_inst|m0_1|u_logic|Bjd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~0 , soc_inst|m0_1|u_logic|Vsywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~4 , soc_inst|m0_1|u_logic|Vsywx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T7d3z4 , soc_inst|m0_1|u_logic|T7d3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~5 , soc_inst|m0_1|u_logic|Vsywx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~2 , soc_inst|m0_1|u_logic|Vsywx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~6 , soc_inst|m0_1|u_logic|Vsywx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xtywx4~0 , soc_inst|m0_1|u_logic|Xtywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ypa2z4~1 , soc_inst|m0_1|u_logic|Ypa2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N8b2z4 , soc_inst|m0_1|u_logic|N8b2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ypa2z4~0 , soc_inst|m0_1|u_logic|Ypa2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C34wx4~0 , soc_inst|m0_1|u_logic|C34wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C34wx4 , soc_inst|m0_1|u_logic|C34wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cr0xx4~1 , soc_inst|m0_1|u_logic|Cr0xx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F5mvx4~0 , soc_inst|m0_1|u_logic|F5mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q5vvx4~0 , soc_inst|m0_1|u_logic|Q5vvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kofwx4~0 , soc_inst|m0_1|u_logic|Kofwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bk4wx4 , soc_inst|m0_1|u_logic|Bk4wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Si4wx4~0 , soc_inst|m0_1|u_logic|Si4wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pd4wx4~0 , soc_inst|m0_1|u_logic|Pd4wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pd4wx4~1 , soc_inst|m0_1|u_logic|Pd4wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H9i2z4 , soc_inst|m0_1|u_logic|H9i2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lny2z4 , soc_inst|m0_1|u_logic|Lny2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W7hwx4~0 , soc_inst|m0_1|u_logic|W7hwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Poa2z4~0 , soc_inst|m0_1|u_logic|Poa2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ik4wx4~0 , soc_inst|m0_1|u_logic|Ik4wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qdj2z4 , soc_inst|m0_1|u_logic|Qdj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ik4wx4~1 , soc_inst|m0_1|u_logic|Ik4wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pd4wx4~2 , soc_inst|m0_1|u_logic|Pd4wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q5vvx4~1 , soc_inst|m0_1|u_logic|Q5vvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q7mvx4~0 , soc_inst|m0_1|u_logic|Q7mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U7w2z4 , soc_inst|m0_1|u_logic|U7w2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~1 , soc_inst|m0_1|u_logic|Kkrvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Arzwx4~2 , soc_inst|m0_1|u_logic|Arzwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~0 , soc_inst|m0_1|u_logic|Kkrvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~2 , soc_inst|m0_1|u_logic|Kkrvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~3 , soc_inst|m0_1|u_logic|Kkrvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~4 , soc_inst|m0_1|u_logic|Kkrvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~5 , soc_inst|m0_1|u_logic|Kkrvx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~6 , soc_inst|m0_1|u_logic|Kkrvx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kyi2z4 , soc_inst|m0_1|u_logic|Kyi2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vcnvx4~0 , soc_inst|m0_1|u_logic|Vcnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kyi2z4~DUPLICATE , soc_inst|m0_1|u_logic|Kyi2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C9rvx4~0 , soc_inst|m0_1|u_logic|C9rvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kfpvx4~1 , soc_inst|m0_1|u_logic|Kfpvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kfpvx4~2 , soc_inst|m0_1|u_logic|Kfpvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kfpvx4~0 , soc_inst|m0_1|u_logic|Kfpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kfpvx4~3 , soc_inst|m0_1|u_logic|Kfpvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kfpvx4~4 , soc_inst|m0_1|u_logic|Kfpvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jipvx4~0 , soc_inst|m0_1|u_logic|Jipvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kfpvx4~5 , soc_inst|m0_1|u_logic|Kfpvx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zz8wx4 , soc_inst|m0_1|u_logic|Zz8wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J00wx4~0 , soc_inst|m0_1|u_logic|J00wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gpcwx4~0 , soc_inst|m0_1|u_logic|Gpcwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gpcwx4~1 , soc_inst|m0_1|u_logic|Gpcwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J00wx4~1 , soc_inst|m0_1|u_logic|J00wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C00wx4~0 , soc_inst|m0_1|u_logic|C00wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bn53z4 , soc_inst|m0_1|u_logic|Bn53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U5r2z4 , soc_inst|m0_1|u_logic|U5r2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Twz2z4 , soc_inst|m0_1|u_logic|Twz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J433z4 , soc_inst|m0_1|u_logic|J433z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Av13z4 , soc_inst|m0_1|u_logic|Av13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nt03z4 , soc_inst|m0_1|u_logic|Nt03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Am5wx4~2 , soc_inst|m0_1|u_logic|Am5wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I7r2z4 , soc_inst|m0_1|u_logic|I7r2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sd43z4 , soc_inst|m0_1|u_logic|Sd43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Am5wx4~3 , soc_inst|m0_1|u_logic|Am5wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Am5wx4~0 , soc_inst|m0_1|u_logic|Am5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Am5wx4~1 , soc_inst|m0_1|u_logic|Am5wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H0dwx4~0 , soc_inst|m0_1|u_logic|H0dwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O0dwx4~0 , soc_inst|m0_1|u_logic|O0dwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xucwx4~0 , soc_inst|m0_1|u_logic|Xucwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~25 , soc_inst|m0_1|u_logic|Add2~25, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~17 , soc_inst|m0_1|u_logic|Add2~17, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~33 , soc_inst|m0_1|u_logic|Add2~33, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ulhvx4~0 , soc_inst|m0_1|u_logic|Ulhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ulhvx4~1 , soc_inst|m0_1|u_logic|Ulhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R8x2z4 , soc_inst|m0_1|u_logic|R8x2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~29 , soc_inst|m0_1|u_logic|Add3~29, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~25 , soc_inst|m0_1|u_logic|Add3~25, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~33 , soc_inst|m0_1|u_logic|Add3~33, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~53 , soc_inst|m0_1|u_logic|Add3~53, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~49 , soc_inst|m0_1|u_logic|Add3~49, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S4qvx4 , soc_inst|m0_1|u_logic|S4qvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[5] , soc_inst|ram_1|saved_word_address[5], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory.raddr_a[5]~5 , soc_inst|ram_1|memory.raddr_a[5]~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[19]~18 , soc_inst|ram_1|data_to_memory[19]~18, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[19]~25 , soc_inst|interconnect_1|HRDATA[19]~25, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jky2z4 , soc_inst|m0_1|u_logic|Jky2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E7nvx4~0 , soc_inst|m0_1|u_logic|E7nvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Vphvx4~0 , soc_inst|m0_1|u_logic|Vphvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Oiw2z4 , soc_inst|m0_1|u_logic|Oiw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E7nvx4~0 , soc_inst|m0_1|u_logic|E7nvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|E7nvx4~1 , soc_inst|m0_1|u_logic|E7nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E7nvx4~2 , soc_inst|m0_1|u_logic|E7nvx4~2, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE , soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E4iwx4~0 , soc_inst|m0_1|u_logic|E4iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fjswx4~0 , soc_inst|m0_1|u_logic|Fjswx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Emewx4~0 , soc_inst|m0_1|u_logic|Emewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wvswx4~0 , soc_inst|m0_1|u_logic|Wvswx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fjswx4~1 , soc_inst|m0_1|u_logic|Fjswx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T1d3z4 , soc_inst|m0_1|u_logic|T1d3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L61xx4~0 , soc_inst|m0_1|u_logic|L61xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ek03z4~DUPLICATE , soc_inst|m0_1|u_logic|Ek03z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hq23z4 , soc_inst|m0_1|u_logic|Hq23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z853z4 , soc_inst|m0_1|u_logic|Z853z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Knz2z4 , soc_inst|m0_1|u_logic|Knz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zhyvx4~2 , soc_inst|m0_1|u_logic|Zhyvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zhyvx4~1 , soc_inst|m0_1|u_logic|Zhyvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qz33z4~feeder , soc_inst|m0_1|u_logic|Qz33z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qz33z4 , soc_inst|m0_1|u_logic|Qz33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yg13z4~feeder , soc_inst|m0_1|u_logic|Yg13z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yg13z4 , soc_inst|m0_1|u_logic|Yg13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zhyvx4~0 , soc_inst|m0_1|u_logic|Zhyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zhyvx4 , soc_inst|m0_1|u_logic|Zhyvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~5 , soc_inst|m0_1|u_logic|hwdata_o~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[0]~27 , soc_inst|ram_1|data_to_memory[0]~27, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[0]~32 , soc_inst|interconnect_1|HRDATA[0]~32, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qdnvx4~0 , soc_inst|m0_1|u_logic|Qdnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[16]~25 , soc_inst|ram_1|data_to_memory[16]~25, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ny3wx4~1 , soc_inst|m0_1|u_logic|Ny3wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[24]~26 , soc_inst|ram_1|data_to_memory[24]~26, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[1][0] , soc_inst|switches_1|switch_store[1][0], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[16]~30 , soc_inst|interconnect_1|HRDATA[16]~30, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qqhvx4~0 , soc_inst|m0_1|u_logic|Qqhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ydw2z4 , soc_inst|m0_1|u_logic|Ydw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qdnvx4~1 , soc_inst|m0_1|u_logic|Qdnvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qdnvx4~2 , soc_inst|m0_1|u_logic|Qdnvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yzi2z4 , soc_inst|m0_1|u_logic|Yzi2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|A2iwx4~0 , soc_inst|m0_1|u_logic|A2iwx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|A2iwx4~1 , soc_inst|m0_1|u_logic|A2iwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sjj2z4 , soc_inst|m0_1|u_logic|Sjj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dtj2z4 , soc_inst|m0_1|u_logic|Dtj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Duuwx4~3 , soc_inst|m0_1|u_logic|Duuwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qi03z4~DUPLICATE , soc_inst|m0_1|u_logic|Qi03z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Punvx4~2 , soc_inst|m0_1|u_logic|Punvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Punvx4~1 , soc_inst|m0_1|u_logic|Punvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Punvx4~3 , soc_inst|m0_1|u_logic|Punvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L753z4~DUPLICATE , soc_inst|m0_1|u_logic|L753z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Punvx4~0 , soc_inst|m0_1|u_logic|Punvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Punvx4~4 , soc_inst|m0_1|u_logic|Punvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O092z4~0 , soc_inst|m0_1|u_logic|O092z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T50wx4~0 , soc_inst|m0_1|u_logic|T50wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wxp2z4 , soc_inst|m0_1|u_logic|Wxp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B8nwx4~0 , soc_inst|m0_1|u_logic|B8nwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B8nwx4~1 , soc_inst|m0_1|u_logic|B8nwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lkhvx4~0 , soc_inst|m0_1|u_logic|Lkhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lkhvx4~1 , soc_inst|m0_1|u_logic|Lkhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lkhvx4~2 , soc_inst|m0_1|u_logic|Lkhvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ufx2z4 , soc_inst|m0_1|u_logic|Ufx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jxovx4 , soc_inst|m0_1|u_logic|Jxovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xqovx4~2 , soc_inst|m0_1|u_logic|Xqovx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~6 , soc_inst|m0_1|u_logic|Nlovx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~2 , soc_inst|m0_1|u_logic|Nlovx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xqovx4~1 , soc_inst|m0_1|u_logic|Xqovx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mvc2z4 , soc_inst|m0_1|u_logic|Mvc2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kuc2z4~1 , soc_inst|m0_1|u_logic|Kuc2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qa43z4 , soc_inst|m0_1|u_logic|Qa43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qp62z4~0 , soc_inst|m0_1|u_logic|Qp62z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H133z4~DUPLICATE , soc_inst|m0_1|u_logic|H133z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qp62z4~1 , soc_inst|m0_1|u_logic|Qp62z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qp62z4~2 , soc_inst|m0_1|u_logic|Qp62z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nr62z4~0 , soc_inst|m0_1|u_logic|Nr62z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qp62z4~3 , soc_inst|m0_1|u_logic|Qp62z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Euzvx4~0 , soc_inst|m0_1|u_logic|Euzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hszvx4 , soc_inst|m0_1|u_logic|Hszvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[4] , soc_inst|ram_1|saved_word_address[4], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory.raddr_a[4]~4 , soc_inst|ram_1|memory.raddr_a[4]~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[20]~16 , soc_inst|ram_1|data_to_memory[20]~16, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[4]~15 , soc_inst|ram_1|data_to_memory[4]~15, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ophvx4~0 , soc_inst|m0_1|u_logic|Ophvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ckw2z4 , soc_inst|m0_1|u_logic|Ckw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pxrvx4~0 , soc_inst|m0_1|u_logic|Pxrvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X6nvx4~0 , soc_inst|m0_1|u_logic|X6nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X6nvx4~1 , soc_inst|m0_1|u_logic|X6nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE , soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ctrwx4~0 , soc_inst|m0_1|u_logic|Ctrwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ctrwx4~1 , soc_inst|m0_1|u_logic|Ctrwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kghvx4~0 , soc_inst|m0_1|u_logic|Kghvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I6z2z4 , soc_inst|m0_1|u_logic|I6z2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dghvx4~1 , soc_inst|m0_1|u_logic|Dghvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W7z2z4 , soc_inst|m0_1|u_logic|W7z2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uz9wx4~0 , soc_inst|m0_1|u_logic|Uz9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uz9wx4~1 , soc_inst|m0_1|u_logic|Uz9wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~37 , soc_inst|m0_1|u_logic|Add2~37, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~57 , soc_inst|m0_1|u_logic|Add2~57, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nbx2z4 , soc_inst|m0_1|u_logic|Nbx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Glhvx4~0 , soc_inst|m0_1|u_logic|Glhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Glhvx4~1 , soc_inst|m0_1|u_logic|Glhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE , soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zkhvx4~1 , soc_inst|m0_1|u_logic|Zkhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W4zvx4~0 , soc_inst|m0_1|u_logic|W4zvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W4zvx4~1 , soc_inst|m0_1|u_logic|W4zvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zkhvx4~0 , soc_inst|m0_1|u_logic|Zkhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ycx2z4 , soc_inst|m0_1|u_logic|Ycx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z6ovx4 , soc_inst|m0_1|u_logic|Z6ovx4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~3 , soc_inst|m0_1|u_logic|Nlovx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xqovx4~0 , soc_inst|m0_1|u_logic|Xqovx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~4 , soc_inst|m0_1|u_logic|Nlovx4~4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~1 , soc_inst|m0_1|u_logic|Nlovx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~2 , soc_inst|m0_1|u_logic|Nlovx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~4 , soc_inst|m0_1|u_logic|Nlovx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~6 , soc_inst|m0_1|u_logic|Nlovx4~6, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~5 , soc_inst|m0_1|u_logic|Nlovx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Elnvx4~0 , soc_inst|m0_1|u_logic|Elnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J6i2z4 , soc_inst|m0_1|u_logic|J6i2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~8 , soc_inst|m0_1|u_logic|Nlovx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~0 , soc_inst|m0_1|u_logic|Nlovx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~7 , soc_inst|m0_1|u_logic|Nlovx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jknvx4~0 , soc_inst|m0_1|u_logic|Jknvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lz93z4 , soc_inst|m0_1|u_logic|Lz93z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|N1uvx4 , soc_inst|m0_1|u_logic|N1uvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wjxwx4~1 , soc_inst|m0_1|u_logic|Wjxwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wjxwx4~0 , soc_inst|m0_1|u_logic|Wjxwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wjxwx4~2 , soc_inst|m0_1|u_logic|Wjxwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wjxwx4~3 , soc_inst|m0_1|u_logic|Wjxwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wjxwx4~4 , soc_inst|m0_1|u_logic|Wjxwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U9lwx4~1 , soc_inst|m0_1|u_logic|U9lwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mtwwx4~0 , soc_inst|m0_1|u_logic|Mtwwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bmhvx4~0 , soc_inst|m0_1|u_logic|Bmhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bmhvx4~1 , soc_inst|m0_1|u_logic|Bmhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bmhvx4~2 , soc_inst|m0_1|u_logic|Bmhvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G7x2z4 , soc_inst|m0_1|u_logic|G7x2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R0t2z4~DUPLICATE , soc_inst|m0_1|u_logic|R0t2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C6mwx4~2 , soc_inst|m0_1|u_logic|C6mwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~7 , soc_inst|m0_1|u_logic|Vsywx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C6mwx4~1 , soc_inst|m0_1|u_logic|C6mwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C6mwx4~0 , soc_inst|m0_1|u_logic|C6mwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C6mwx4~3 , soc_inst|m0_1|u_logic|C6mwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V5mwx4~0 , soc_inst|m0_1|u_logic|V5mwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G9w2z4 , soc_inst|m0_1|u_logic|G9w2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rexvx4~0 , soc_inst|m0_1|u_logic|Rexvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~0 , soc_inst|m0_1|u_logic|Rfpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~1 , soc_inst|m0_1|u_logic|Rfpvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~2 , soc_inst|m0_1|u_logic|Rfpvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ffxvx4~0 , soc_inst|m0_1|u_logic|Ffxvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~3 , soc_inst|m0_1|u_logic|Rfpvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~4 , soc_inst|m0_1|u_logic|Rfpvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~5 , soc_inst|m0_1|u_logic|Rfpvx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tdg2z4 , soc_inst|m0_1|u_logic|Tdg2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aeg2z4 , soc_inst|m0_1|u_logic|Aeg2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vff2z4 , soc_inst|m0_1|u_logic|Vff2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qhe2z4 , soc_inst|m0_1|u_logic|Qhe2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hhd2z4 , soc_inst|m0_1|u_logic|Hhd2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jhe2z4 , soc_inst|m0_1|u_logic|Jhe2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ohd2z4 , soc_inst|m0_1|u_logic|Ohd2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mgd2z4~4 , soc_inst|m0_1|u_logic|Mgd2z4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cgf2z4 , soc_inst|m0_1|u_logic|Cgf2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mgd2z4~0 , soc_inst|m0_1|u_logic|Mgd2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y1d2z4~1 , soc_inst|m0_1|u_logic|Y1d2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y1d2z4~0 , soc_inst|m0_1|u_logic|Y1d2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y1d2z4~2 , soc_inst|m0_1|u_logic|Y1d2z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K1wvx4 , soc_inst|m0_1|u_logic|K1wvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~5 , soc_inst|m0_1|u_logic|Add3~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|haddr_o~1 , soc_inst|m0_1|u_logic|haddr_o~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0 , soc_inst|interconnect_1|HSEL_SIGNALS[1]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|mux_sel[1] , soc_inst|interconnect_1|mux_sel[1], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|Equal1~0 , soc_inst|interconnect_1|Equal1~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[0][8] , soc_inst|switches_1|switch_store[0][8], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[8]~51 , soc_inst|interconnect_1|HRDATA[8]~51, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H8l2z4 , soc_inst|m0_1|u_logic|H8l2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S9ywx4~0 , soc_inst|m0_1|u_logic|S9ywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S9ywx4~1 , soc_inst|m0_1|u_logic|S9ywx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S9ywx4~2 , soc_inst|m0_1|u_logic|S9ywx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Otxwx4~0 , soc_inst|m0_1|u_logic|Otxwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Palwx4~0 , soc_inst|m0_1|u_logic|Palwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kswwx4~0 , soc_inst|m0_1|u_logic|Kswwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ttwwx4~0 , soc_inst|m0_1|u_logic|Ttwwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B8nwx4~0 , soc_inst|m0_1|u_logic|B8nwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B8nwx4~1 , soc_inst|m0_1|u_logic|B8nwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aihvx4~2 , soc_inst|m0_1|u_logic|Aihvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aihvx4~1 , soc_inst|m0_1|u_logic|Aihvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aihvx4~0 , soc_inst|m0_1|u_logic|Aihvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xsx2z4 , soc_inst|m0_1|u_logic|Xsx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~13 , soc_inst|m0_1|u_logic|Add3~13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V2qvx4 , soc_inst|m0_1|u_logic|V2qvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Khnvx4~0 , soc_inst|m0_1|u_logic|Khnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Khnvx4~1 , soc_inst|m0_1|u_logic|Khnvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ohh3z4 , soc_inst|m0_1|u_logic|Ohh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N662z4~2 , soc_inst|m0_1|u_logic|N662z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Noo2z4~DUPLICATE , soc_inst|m0_1|u_logic|Noo2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bk13z4 , soc_inst|m0_1|u_logic|Bk13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N662z4~1 , soc_inst|m0_1|u_logic|N662z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K862z4~0 , soc_inst|m0_1|u_logic|K862z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cc53z4 , soc_inst|m0_1|u_logic|Cc53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N662z4~0 , soc_inst|m0_1|u_logic|N662z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N662z4~3 , soc_inst|m0_1|u_logic|N662z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xrnvx4~0 , soc_inst|m0_1|u_logic|Xrnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~9 , soc_inst|m0_1|u_logic|Add3~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|haddr_o[29] , soc_inst|m0_1|u_logic|haddr_o[29], de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S6ovx4~2 , soc_inst|m0_1|u_logic|S6ovx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S6ovx4~3 , soc_inst|m0_1|u_logic|S6ovx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nmnvx4~0 , soc_inst|m0_1|u_logic|Nmnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mjl2z4 , soc_inst|m0_1|u_logic|Mjl2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B7owx4 , soc_inst|m0_1|u_logic|B7owx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pjyvx4~1 , soc_inst|m0_1|u_logic|Pjyvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pjyvx4~2 , soc_inst|m0_1|u_logic|Pjyvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F9pvx4~0 , soc_inst|m0_1|u_logic|F9pvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F9pvx4~1 , soc_inst|m0_1|u_logic|F9pvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kkyvx4~1 , soc_inst|m0_1|u_logic|Kkyvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ocnvx4~0 , soc_inst|m0_1|u_logic|Ocnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE , soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X7mvx4~0 , soc_inst|m0_1|u_logic|X7mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X7mvx4~1 , soc_inst|m0_1|u_logic|X7mvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I6w2z4 , soc_inst|m0_1|u_logic|I6w2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F5mvx4~1 , soc_inst|m0_1|u_logic|F5mvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F5mvx4~2 , soc_inst|m0_1|u_logic|F5mvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U5x2z4 , soc_inst|m0_1|u_logic|U5x2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lefwx4~0 , soc_inst|m0_1|u_logic|Lefwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nlhvx4~0 , soc_inst|m0_1|u_logic|Nlhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nlhvx4~1 , soc_inst|m0_1|u_logic|Nlhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cax2z4 , soc_inst|m0_1|u_logic|Cax2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rxzvx4 , soc_inst|m0_1|u_logic|Rxzvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[3] , soc_inst|ram_1|saved_word_address[3], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory.raddr_a[3]~3 , soc_inst|ram_1|memory.raddr_a[3]~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[22]~31 , soc_inst|ram_1|data_to_memory[22]~31, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[6]~32 , soc_inst|ram_1|data_to_memory[6]~32, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[1][6] , soc_inst|switches_1|switch_store[1][6], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[22]~35 , soc_inst|interconnect_1|HRDATA[22]~35, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J6nvx4~0 , soc_inst|m0_1|u_logic|J6nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aphvx4~0 , soc_inst|m0_1|u_logic|Aphvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Enw2z4 , soc_inst|m0_1|u_logic|Enw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C9rvx4~3 , soc_inst|m0_1|u_logic|C9rvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C9rvx4~4 , soc_inst|m0_1|u_logic|C9rvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C9rvx4~1 , soc_inst|m0_1|u_logic|C9rvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C9rvx4~2 , soc_inst|m0_1|u_logic|C9rvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add1~5 , soc_inst|m0_1|u_logic|Add1~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add1~9 , soc_inst|m0_1|u_logic|Add1~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W4y2z4 , soc_inst|m0_1|u_logic|W4y2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kanvx4~0 , soc_inst|m0_1|u_logic|Kanvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W4y2z4~DUPLICATE , soc_inst|m0_1|u_logic|W4y2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add1~21 , soc_inst|m0_1|u_logic|Add1~21, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Danvx4~0 , soc_inst|m0_1|u_logic|Danvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6y2z4~DUPLICATE , soc_inst|m0_1|u_logic|K6y2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6y2z4 , soc_inst|m0_1|u_logic|K6y2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add1~1 , soc_inst|m0_1|u_logic|Add1~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Add1~17 , soc_inst|m0_1|u_logic|Add1~17, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|U8nvx4~0 , soc_inst|m0_1|u_logic|U8nvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Bdm2z4 , soc_inst|m0_1|u_logic|Bdm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W4y2z4 , soc_inst|m0_1|u_logic|W4y2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Oylwx4~0 , soc_inst|m0_1|u_logic|Oylwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add1~25 , soc_inst|m0_1|u_logic|Add1~25, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W9nvx4~0 , soc_inst|m0_1|u_logic|W9nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y7y2z4 , soc_inst|m0_1|u_logic|Y7y2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add1~29 , soc_inst|m0_1|u_logic|Add1~29, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P9nvx4~0 , soc_inst|m0_1|u_logic|P9nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M9y2z4 , soc_inst|m0_1|u_logic|M9y2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Oylwx4~1 , soc_inst|m0_1|u_logic|Oylwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|By4wx4 , soc_inst|m0_1|u_logic|By4wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J5vvx4 , soc_inst|m0_1|u_logic|J5vvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y6t2z4 , soc_inst|m0_1|u_logic|Y6t2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Og4wx4~0 , soc_inst|m0_1|u_logic|Og4wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mtqvx4 , soc_inst|m0_1|u_logic|Mtqvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q5vvx4~0 , soc_inst|m0_1|u_logic|Q5vvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Si4wx4~0 , soc_inst|m0_1|u_logic|Si4wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pd4wx4~0 , soc_inst|m0_1|u_logic|Pd4wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pd4wx4~1 , soc_inst|m0_1|u_logic|Pd4wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pd4wx4~2 , soc_inst|m0_1|u_logic|Pd4wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q5vvx4~1 , soc_inst|m0_1|u_logic|Q5vvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q7mvx4~0 , soc_inst|m0_1|u_logic|Q7mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U7w2z4 , soc_inst|m0_1|u_logic|U7w2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Arzwx4~2 , soc_inst|m0_1|u_logic|Arzwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~0 , soc_inst|m0_1|u_logic|Kkrvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~1 , soc_inst|m0_1|u_logic|Kkrvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~2 , soc_inst|m0_1|u_logic|Kkrvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~3 , soc_inst|m0_1|u_logic|Kkrvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~4 , soc_inst|m0_1|u_logic|Kkrvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~5 , soc_inst|m0_1|u_logic|Kkrvx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~6 , soc_inst|m0_1|u_logic|Kkrvx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vcnvx4~0 , soc_inst|m0_1|u_logic|Vcnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kyi2z4 , soc_inst|m0_1|u_logic|Kyi2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C9rvx4~2 , soc_inst|m0_1|u_logic|C9rvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Owq2z4 , soc_inst|m0_1|u_logic|Owq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C9rvx4~1 , soc_inst|m0_1|u_logic|C9rvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C9rvx4~3 , soc_inst|m0_1|u_logic|C9rvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C9rvx4~0 , soc_inst|m0_1|u_logic|C9rvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Add1~34 , soc_inst|m0_1|u_logic|Add1~34, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add1~5 , soc_inst|m0_1|u_logic|Add1~5, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Ranvx4~0 , soc_inst|m0_1|u_logic|Ranvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|I3y2z4 , soc_inst|m0_1|u_logic|I3y2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kanvx4~0 , soc_inst|m0_1|u_logic|Kanvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W4y2z4~DUPLICATE , soc_inst|m0_1|u_logic|W4y2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C6nvx4~0 , soc_inst|m0_1|u_logic|C6nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tohvx4~0 , soc_inst|m0_1|u_logic|Tohvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sow2z4 , soc_inst|m0_1|u_logic|Sow2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C6nvx4~1 , soc_inst|m0_1|u_logic|C6nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nqy2z4 , soc_inst|m0_1|u_logic|Nqy2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W7hwx4~0 , soc_inst|m0_1|u_logic|W7hwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE , soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhc2z4~0 , soc_inst|m0_1|u_logic|Mhc2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ekc2z4~0 , soc_inst|m0_1|u_logic|Ekc2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhc2z4~1 , soc_inst|m0_1|u_logic|Mhc2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wmc2z4~0 , soc_inst|m0_1|u_logic|Wmc2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhc2z4~2 , soc_inst|m0_1|u_logic|Mhc2z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhc2z4~3 , soc_inst|m0_1|u_logic|Mhc2z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhc2z4~4 , soc_inst|m0_1|u_logic|Mhc2z4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zdc2z4~0 , soc_inst|m0_1|u_logic|Zdc2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~1 , soc_inst|m0_1|u_logic|Dcrwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~0 , soc_inst|m0_1|u_logic|Dcrwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~2 , soc_inst|m0_1|u_logic|Dcrwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~3 , soc_inst|m0_1|u_logic|Dcrwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~4 , soc_inst|m0_1|u_logic|Dcrwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mac2z4~0 , soc_inst|m0_1|u_logic|Mac2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kgc2z4~0 , soc_inst|m0_1|u_logic|Kgc2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~5 , soc_inst|m0_1|u_logic|Dcrwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~6 , soc_inst|m0_1|u_logic|Dcrwx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B8c2z4~0 , soc_inst|m0_1|u_logic|B8c2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Scpvx4~1 , soc_inst|m0_1|u_logic|Scpvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Scpvx4~2 , soc_inst|m0_1|u_logic|Scpvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hjnvx4~0 , soc_inst|m0_1|u_logic|Hjnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pmhvx4~0 , soc_inst|m0_1|u_logic|Pmhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F1x2z4 , soc_inst|m0_1|u_logic|F1x2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G8nvx4~0 , soc_inst|m0_1|u_logic|G8nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ufy2z4 , soc_inst|m0_1|u_logic|Ufy2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hjnvx4~1 , soc_inst|m0_1|u_logic|Hjnvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hjnvx4~2 , soc_inst|m0_1|u_logic|Hjnvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE , soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Md6wx4~0 , soc_inst|m0_1|u_logic|Md6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dc6wx4~0 , soc_inst|m0_1|u_logic|Dc6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dc6wx4~1 , soc_inst|m0_1|u_logic|Dc6wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhgwx4~0 , soc_inst|m0_1|u_logic|Mhgwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iikwx4~0 , soc_inst|m0_1|u_logic|Iikwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uijwx4~0 , soc_inst|m0_1|u_logic|Uijwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dj6wx4~0 , soc_inst|m0_1|u_logic|Dj6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qf6wx4~0 , soc_inst|m0_1|u_logic|Qf6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uv6wx4 , soc_inst|m0_1|u_logic|Uv6wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~2 , soc_inst|m0_1|u_logic|Q86wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~3 , soc_inst|m0_1|u_logic|Q86wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xf6wx4~0 , soc_inst|m0_1|u_logic|Xf6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gpjwx4~0 , soc_inst|m0_1|u_logic|Gpjwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ua6wx4~0 , soc_inst|m0_1|u_logic|Ua6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~0 , soc_inst|m0_1|u_logic|Q86wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~1 , soc_inst|m0_1|u_logic|Q86wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~4 , soc_inst|m0_1|u_logic|Q86wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~5 , soc_inst|m0_1|u_logic|Q86wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~6 , soc_inst|m0_1|u_logic|Q86wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G27wx4~2 , soc_inst|m0_1|u_logic|G27wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~1 , soc_inst|m0_1|u_logic|Jm6wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~2 , soc_inst|m0_1|u_logic|Jm6wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~3 , soc_inst|m0_1|u_logic|Jm6wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eyhvx4~0 , soc_inst|m0_1|u_logic|Eyhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~4 , soc_inst|m0_1|u_logic|Jm6wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hyewx4 , soc_inst|m0_1|u_logic|Hyewx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~0 , soc_inst|m0_1|u_logic|Jm6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~5 , soc_inst|m0_1|u_logic|Jm6wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ad7wx4~0 , soc_inst|m0_1|u_logic|Ad7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~6 , soc_inst|m0_1|u_logic|Jm6wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P28wx4 , soc_inst|m0_1|u_logic|P28wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X07wx4~0 , soc_inst|m0_1|u_logic|X07wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xt6wx4~0 , soc_inst|m0_1|u_logic|Xt6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q07wx4~1 , soc_inst|m0_1|u_logic|Q07wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q07wx4~0 , soc_inst|m0_1|u_logic|Q07wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xt6wx4~1 , soc_inst|m0_1|u_logic|Xt6wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~7 , soc_inst|m0_1|u_logic|Jm6wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eyhvx4~1 , soc_inst|m0_1|u_logic|Eyhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdi2z4 , soc_inst|m0_1|u_logic|Pdi2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cxhvx4~0 , soc_inst|m0_1|u_logic|Cxhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cxhvx4~1 , soc_inst|m0_1|u_logic|Cxhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J6nvx4~1 , soc_inst|m0_1|u_logic|J6nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J6nvx4~2 , soc_inst|m0_1|u_logic|J6nvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zoy2z4 , soc_inst|m0_1|u_logic|Zoy2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ho3wx4~0 , soc_inst|m0_1|u_logic|Ho3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~1 , soc_inst|m0_1|u_logic|Df3wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~0 , soc_inst|m0_1|u_logic|Df3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~2 , soc_inst|m0_1|u_logic|Df3wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wpkwx4~0 , soc_inst|m0_1|u_logic|Wpkwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~6 , soc_inst|m0_1|u_logic|Df3wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~7 , soc_inst|m0_1|u_logic|Df3wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~5 , soc_inst|m0_1|u_logic|Df3wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~8 , soc_inst|m0_1|u_logic|Df3wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~9 , soc_inst|m0_1|u_logic|Df3wx4~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R1pvx4~0 , soc_inst|m0_1|u_logic|R1pvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mekvx4~0 , soc_inst|m0_1|u_logic|Mekvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mekvx4~1 , soc_inst|m0_1|u_logic|Mekvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xx93z4 , soc_inst|m0_1|u_logic|Xx93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C372z4~0 , soc_inst|m0_1|u_logic|C372z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C372z4~1 , soc_inst|m0_1|u_logic|C372z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C372z4~2 , soc_inst|m0_1|u_logic|C372z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z472z4~0 , soc_inst|m0_1|u_logic|Z472z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C372z4~3 , soc_inst|m0_1|u_logic|C372z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tpnvx4~0 , soc_inst|m0_1|u_logic|Tpnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yuovx4 , soc_inst|m0_1|u_logic|Yuovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[2] , soc_inst|ram_1|saved_word_address[2], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory.raddr_a[2]~2 , soc_inst|ram_1|memory.raddr_a[2]~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[21]~24 , soc_inst|ram_1|data_to_memory[21]~24, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[21]~29 , soc_inst|interconnect_1|HRDATA[21]~29, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hphvx4~0 , soc_inst|m0_1|u_logic|Hphvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qlw2z4 , soc_inst|m0_1|u_logic|Qlw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6nvx4~1 , soc_inst|m0_1|u_logic|Q6nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6nvx4~0 , soc_inst|m0_1|u_logic|Q6nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6nvx4~2 , soc_inst|m0_1|u_logic|Q6nvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE , soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jvxvx4 , soc_inst|m0_1|u_logic|Jvxvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vnqvx4~0 , soc_inst|m0_1|u_logic|Vnqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bsy2z4 , soc_inst|m0_1|u_logic|Bsy2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y7xvx4 , soc_inst|m0_1|u_logic|Y7xvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gqxvx4 , soc_inst|m0_1|u_logic|Gqxvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Irxvx4~0 , soc_inst|m0_1|u_logic|Irxvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zpxvx4~0 , soc_inst|m0_1|u_logic|Zpxvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hnxvx4~0 , soc_inst|m0_1|u_logic|Hnxvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zcn2z4 , soc_inst|m0_1|u_logic|Zcn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mmxvx4~0 , soc_inst|m0_1|u_logic|Mmxvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sbxvx4~1 , soc_inst|m0_1|u_logic|Sbxvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sbxvx4~2 , soc_inst|m0_1|u_logic|Sbxvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gokwx4~0 , soc_inst|m0_1|u_logic|Gokwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sbxvx4~0 , soc_inst|m0_1|u_logic|Sbxvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sbxvx4~3 , soc_inst|m0_1|u_logic|Sbxvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uup2z4 , soc_inst|m0_1|u_logic|Uup2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H2m2z4 , soc_inst|m0_1|u_logic|H2m2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fzxwx4~0 , soc_inst|m0_1|u_logic|Fzxwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H783z4~DUPLICATE , soc_inst|m0_1|u_logic|H783z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE , soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yx63z4~DUPLICATE , soc_inst|m0_1|u_logic|Yx63z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE , soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fzxwx4~1 , soc_inst|m0_1|u_logic|Fzxwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fzxwx4 , soc_inst|m0_1|u_logic|Fzxwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wxxwx4~0 , soc_inst|m0_1|u_logic|Wxxwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y9nwx4~0 , soc_inst|m0_1|u_logic|Y9nwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kkyvx4~0 , soc_inst|m0_1|u_logic|Kkyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zluvx4~1 , soc_inst|m0_1|u_logic|Zluvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zluvx4~0 , soc_inst|m0_1|u_logic|Zluvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zluvx4~2 , soc_inst|m0_1|u_logic|Zluvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U9mvx4~0 , soc_inst|m0_1|u_logic|U9mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uaj2z4 , soc_inst|m0_1|u_logic|Uaj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rryvx4~0 , soc_inst|m0_1|u_logic|Rryvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Upyvx4~0 , soc_inst|m0_1|u_logic|Upyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R3mwx4~0 , soc_inst|m0_1|u_logic|R3mwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pet2z4 , soc_inst|m0_1|u_logic|Pet2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nen2z4~0 , soc_inst|m0_1|u_logic|Nen2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nen2z4~1 , soc_inst|m0_1|u_logic|Nen2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nen2z4 , soc_inst|m0_1|u_logic|Nen2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cr1wx4~1 , soc_inst|m0_1|u_logic|Cr1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Okn2z4 , soc_inst|m0_1|u_logic|Okn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X563z4 , soc_inst|m0_1|u_logic|X563z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vu93z4~DUPLICATE , soc_inst|m0_1|u_logic|Vu93z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mhn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Mhn2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yfn2z4 , soc_inst|m0_1|u_logic|Yfn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Psv2z4~DUPLICATE , soc_inst|m0_1|u_logic|Psv2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q1ywx4~0 , soc_inst|m0_1|u_logic|Q1ywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gf73z4 , soc_inst|m0_1|u_logic|Gf73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Po83z4 , soc_inst|m0_1|u_logic|Po83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gju2z4 , soc_inst|m0_1|u_logic|Gju2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ajn2z4 , soc_inst|m0_1|u_logic|Ajn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q1ywx4~1 , soc_inst|m0_1|u_logic|Q1ywx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q1ywx4 , soc_inst|m0_1|u_logic|Q1ywx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa03z4 , soc_inst|m0_1|u_logic|Wa03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fn33z4 , soc_inst|m0_1|u_logic|Fn33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q713z4 , soc_inst|m0_1|u_logic|Q713z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wd23z4 , soc_inst|m0_1|u_logic|Wd23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sh5wx4~2 , soc_inst|m0_1|u_logic|Sh5wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ow43z4~DUPLICATE , soc_inst|m0_1|u_logic|Ow43z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cmn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Cmn2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sh5wx4~1 , soc_inst|m0_1|u_logic|Sh5wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sh5wx4~3 , soc_inst|m0_1|u_logic|Sh5wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sh5wx4~0 , soc_inst|m0_1|u_logic|Sh5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[2] , soc_inst|m0_1|u_logic|hwdata_o[2], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[2]~7 , soc_inst|ram_1|data_to_memory[2]~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[2]~14 , soc_inst|interconnect_1|HRDATA[2]~14, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L7nvx4~0 , soc_inst|m0_1|u_logic|L7nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cqhvx4~0 , soc_inst|m0_1|u_logic|Cqhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ahw2z4 , soc_inst|m0_1|u_logic|Ahw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L7nvx4~1 , soc_inst|m0_1|u_logic|L7nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L7nvx4~2 , soc_inst|m0_1|u_logic|L7nvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE , soc_inst|m0_1|u_logic|Viy2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L4bwx4~0 , soc_inst|m0_1|u_logic|L4bwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S4bwx4~0 , soc_inst|m0_1|u_logic|S4bwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q3bwx4~0 , soc_inst|m0_1|u_logic|Q3bwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bmhvx4~0 , soc_inst|m0_1|u_logic|Bmhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bmhvx4~1 , soc_inst|m0_1|u_logic|Bmhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G7x2z4 , soc_inst|m0_1|u_logic|G7x2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ekovx4 , soc_inst|m0_1|u_logic|Ekovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[1]~feeder , soc_inst|ram_1|saved_word_address[1]~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[1] , soc_inst|ram_1|saved_word_address[1], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory.raddr_a[1]~1 , soc_inst|ram_1|memory.raddr_a[1]~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[17]~10 , soc_inst|ram_1|data_to_memory[17]~10, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[9]~9 , soc_inst|ram_1|data_to_memory[9]~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jqhvx4~0 , soc_inst|m0_1|u_logic|Jqhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mfw2z4 , soc_inst|m0_1|u_logic|Mfw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pqrvx4~0 , soc_inst|m0_1|u_logic|Pqrvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S7nvx4~0 , soc_inst|m0_1|u_logic|S7nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S7nvx4~1 , soc_inst|m0_1|u_logic|S7nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rxl2z4 , soc_inst|m0_1|u_logic|Rxl2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rblwx4~0 , soc_inst|m0_1|u_logic|Rblwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rblwx4~1 , soc_inst|m0_1|u_logic|Rblwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rblwx4~2 , soc_inst|m0_1|u_logic|Rblwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fgm2z4 , soc_inst|m0_1|u_logic|Fgm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Po83z4~DUPLICATE , soc_inst|m0_1|u_logic|Po83z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ylbwx4~1 , soc_inst|m0_1|u_logic|Ylbwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Psv2z4 , soc_inst|m0_1|u_logic|Psv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vu93z4 , soc_inst|m0_1|u_logic|Vu93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mhn2z4 , soc_inst|m0_1|u_logic|Mhn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ylbwx4~0 , soc_inst|m0_1|u_logic|Ylbwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ylbwx4 , soc_inst|m0_1|u_logic|Ylbwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cmn2z4 , soc_inst|m0_1|u_logic|Cmn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE , soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xhbwx4~2 , soc_inst|m0_1|u_logic|Xhbwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xhbwx4~1 , soc_inst|m0_1|u_logic|Xhbwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ow43z4 , soc_inst|m0_1|u_logic|Ow43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xhbwx4~3 , soc_inst|m0_1|u_logic|Xhbwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xhbwx4~0 , soc_inst|m0_1|u_logic|Xhbwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qrnvx4~0 , soc_inst|m0_1|u_logic|Qrnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Asbvx4 , soc_inst|m0_1|u_logic|Asbvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Imhvx4~0 , soc_inst|m0_1|u_logic|Imhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Imhvx4~1 , soc_inst|m0_1|u_logic|Imhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J4x2z4 , soc_inst|m0_1|u_logic|J4x2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Uzvvx4~0 , soc_inst|m0_1|u_logic|Uzvvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Fvovx4 , soc_inst|m0_1|u_logic|Fvovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[0] , soc_inst|ram_1|saved_word_address[0], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory.raddr_a[0]~0 , soc_inst|ram_1|memory.raddr_a[0]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[16]~28 , soc_inst|ram_1|data_to_memory[16]~28, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[8]~27 , soc_inst|ram_1|data_to_memory[8]~27, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[1][0] , soc_inst|switches_1|switch_store[1][0], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[16]~52 , soc_inst|interconnect_1|HRDATA[16]~52, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qqhvx4~0 , soc_inst|m0_1|u_logic|Qqhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ydw2z4 , soc_inst|m0_1|u_logic|Ydw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qdnvx4~1 , soc_inst|m0_1|u_logic|Qdnvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qdnvx4~0 , soc_inst|m0_1|u_logic|Qdnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qdnvx4~2 , soc_inst|m0_1|u_logic|Qdnvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yzi2z4 , soc_inst|m0_1|u_logic|Yzi2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jipvx4~0 , soc_inst|m0_1|u_logic|Jipvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kfpvx4~4 , soc_inst|m0_1|u_logic|Kfpvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kfpvx4~1 , soc_inst|m0_1|u_logic|Kfpvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kfpvx4~0 , soc_inst|m0_1|u_logic|Kfpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kfpvx4~2 , soc_inst|m0_1|u_logic|Kfpvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kyi2z4~DUPLICATE , soc_inst|m0_1|u_logic|Kyi2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kfpvx4~3 , soc_inst|m0_1|u_logic|Kfpvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kfpvx4~5 , soc_inst|m0_1|u_logic|Kfpvx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qzq2z4 , soc_inst|m0_1|u_logic|Qzq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mmxvx4~0 , soc_inst|m0_1|u_logic|Mmxvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sbxvx4~1 , soc_inst|m0_1|u_logic|Sbxvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sbxvx4~2 , soc_inst|m0_1|u_logic|Sbxvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hnxvx4~0 , soc_inst|m0_1|u_logic|Hnxvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gokwx4~0 , soc_inst|m0_1|u_logic|Gokwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sbxvx4~0 , soc_inst|m0_1|u_logic|Sbxvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sbxvx4~3 , soc_inst|m0_1|u_logic|Sbxvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uup2z4 , soc_inst|m0_1|u_logic|Uup2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wxxwx4~0 , soc_inst|m0_1|u_logic|Wxxwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|half_word_address~2 , soc_inst|switches_1|half_word_address~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|half_word_address[1] , soc_inst|switches_1|half_word_address[1], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[1]~19 , soc_inst|interconnect_1|HRDATA[1]~19, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|DataValid~0 , soc_inst|switches_1|DataValid~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|DataValid[1] , soc_inst|switches_1|DataValid[1], de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[0][1] , soc_inst|switches_1|switch_store[0][1], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[1]~12 , soc_inst|ram_1|data_to_memory[1]~12, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[25]~11 , soc_inst|ram_1|data_to_memory[25]~11, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[1]~21 , soc_inst|interconnect_1|HRDATA[1]~21, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hcnvx4~0 , soc_inst|m0_1|u_logic|Hcnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dwl2z4 , soc_inst|m0_1|u_logic|Dwl2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Acnvx4~0 , soc_inst|m0_1|u_logic|Acnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE , soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sta2z4~0 , soc_inst|m0_1|u_logic|Sta2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uyv2z4 , soc_inst|m0_1|u_logic|Uyv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zx3wx4~0 , soc_inst|m0_1|u_logic|Zx3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H6mvx4~0 , soc_inst|m0_1|u_logic|H6mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE , soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S4pwx4~0 , soc_inst|m0_1|u_logic|S4pwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X2rvx4~1 , soc_inst|m0_1|u_logic|X2rvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X2rvx4~2 , soc_inst|m0_1|u_logic|X2rvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tbnvx4~0 , soc_inst|m0_1|u_logic|Tbnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lbn2z4 , soc_inst|m0_1|u_logic|Lbn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z4xvx4~0 , soc_inst|m0_1|u_logic|Z4xvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z4xvx4~1 , soc_inst|m0_1|u_logic|Z4xvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z4xvx4~2 , soc_inst|m0_1|u_logic|Z4xvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I6xvx4~0 , soc_inst|m0_1|u_logic|I6xvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z4xvx4~3 , soc_inst|m0_1|u_logic|Z4xvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tzxwx4~0 , soc_inst|m0_1|u_logic|Tzxwx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Pkwwx4~0 , soc_inst|m0_1|u_logic|Pkwwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C8rwx4~0 , soc_inst|m0_1|u_logic|C8rwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V9iwx4~0 , soc_inst|m0_1|u_logic|V9iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R5zvx4~0 , soc_inst|m0_1|u_logic|R5zvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R5zvx4~1 , soc_inst|m0_1|u_logic|R5zvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~5 , soc_inst|m0_1|u_logic|Add2~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wthvx4~0 , soc_inst|m0_1|u_logic|Wthvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wthvx4~1 , soc_inst|m0_1|u_logic|Wthvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wthvx4~2 , soc_inst|m0_1|u_logic|Wthvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J0l2z4 , soc_inst|m0_1|u_logic|J0l2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~1 , soc_inst|m0_1|u_logic|Add3~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Va62z4 , soc_inst|m0_1|u_logic|Va62z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H362z4~0 , soc_inst|m0_1|u_logic|H362z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|haddr_o[29]~2 , soc_inst|m0_1|u_logic|haddr_o[29]~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|htrans_o[1]~0 , soc_inst|m0_1|u_logic|htrans_o[1]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|always1~0 , soc_inst|ram_1|always1~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|write_cycle~0 , soc_inst|ram_1|write_cycle~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|write_cycle , soc_inst|ram_1|write_cycle, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N8nvx4~0 , soc_inst|m0_1|u_logic|N8nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fey2z4 , soc_inst|m0_1|u_logic|Fey2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M4nvx4~1 , soc_inst|m0_1|u_logic|M4nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wmhvx4~0 , soc_inst|m0_1|u_logic|Wmhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qzw2z4 , soc_inst|m0_1|u_logic|Qzw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M4nvx4~0 , soc_inst|m0_1|u_logic|M4nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M4nvx4~2 , soc_inst|m0_1|u_logic|M4nvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H9i2z4 , soc_inst|m0_1|u_logic|H9i2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wkiwx4~3 , soc_inst|m0_1|u_logic|Wkiwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wkiwx4~0 , soc_inst|m0_1|u_logic|Wkiwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wkiwx4~1 , soc_inst|m0_1|u_logic|Wkiwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wkiwx4~2 , soc_inst|m0_1|u_logic|Wkiwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wkiwx4~5 , soc_inst|m0_1|u_logic|Wkiwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wkiwx4~4 , soc_inst|m0_1|u_logic|Wkiwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~0 , soc_inst|m0_1|u_logic|Sbiwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~1 , soc_inst|m0_1|u_logic|Sbiwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~2 , soc_inst|m0_1|u_logic|Sbiwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Idiwx4~0 , soc_inst|m0_1|u_logic|Idiwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ws3wx4~0 , soc_inst|m0_1|u_logic|Ws3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~3 , soc_inst|m0_1|u_logic|Sbiwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ttiwx4~1 , soc_inst|m0_1|u_logic|Ttiwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ttiwx4~0 , soc_inst|m0_1|u_logic|Ttiwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~4 , soc_inst|m0_1|u_logic|Sbiwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Agiwx4~0 , soc_inst|m0_1|u_logic|Agiwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yeiwx4~0 , soc_inst|m0_1|u_logic|Yeiwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~5 , soc_inst|m0_1|u_logic|Sbiwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~6 , soc_inst|m0_1|u_logic|Sbiwx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mvhvx4 , soc_inst|m0_1|u_logic|Mvhvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aok2z4 , soc_inst|m0_1|u_logic|Aok2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M9pvx4~0 , soc_inst|m0_1|u_logic|M9pvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S5pvx4 , soc_inst|m0_1|u_logic|S5pvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yghvx4~0 , soc_inst|m0_1|u_logic|Yghvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE , soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ibrwx4~0 , soc_inst|m0_1|u_logic|Ibrwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hxx2z4 , soc_inst|m0_1|u_logic|Hxx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pfovx4~0 , soc_inst|m0_1|u_logic|Pfovx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ophvx4~0 , soc_inst|m0_1|u_logic|Ophvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ckw2z4 , soc_inst|m0_1|u_logic|Ckw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X6nvx4~0 , soc_inst|m0_1|u_logic|X6nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X6nvx4~1 , soc_inst|m0_1|u_logic|X6nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE , soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hklwx4~2 , soc_inst|m0_1|u_logic|Hklwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hklwx4~3 , soc_inst|m0_1|u_logic|Hklwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jeewx4 , soc_inst|m0_1|u_logic|Jeewx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zmlwx4~0 , soc_inst|m0_1|u_logic|Zmlwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hklwx4~0 , soc_inst|m0_1|u_logic|Hklwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hklwx4~4 , soc_inst|m0_1|u_logic|Hklwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bthvx4~0 , soc_inst|m0_1|u_logic|Bthvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cyq2z4 , soc_inst|m0_1|u_logic|Cyq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fjewx4~0 , soc_inst|m0_1|u_logic|Fjewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fjewx4~1 , soc_inst|m0_1|u_logic|Fjewx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rvfwx4~1 , soc_inst|m0_1|u_logic|Rvfwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L6gwx4~0 , soc_inst|m0_1|u_logic|L6gwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rvfwx4~0 , soc_inst|m0_1|u_logic|Rvfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rvfwx4~4 , soc_inst|m0_1|u_logic|Rvfwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rvfwx4~2 , soc_inst|m0_1|u_logic|Rvfwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ugewx4~0 , soc_inst|m0_1|u_logic|Ugewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K2gwx4~0 , soc_inst|m0_1|u_logic|K2gwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B1gwx4~1 , soc_inst|m0_1|u_logic|B1gwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B1gwx4~0 , soc_inst|m0_1|u_logic|B1gwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B1gwx4~2 , soc_inst|m0_1|u_logic|B1gwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y9gwx4~0 , soc_inst|m0_1|u_logic|Y9gwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K9gwx4~0 , soc_inst|m0_1|u_logic|K9gwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ccgwx4~0 , soc_inst|m0_1|u_logic|Ccgwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D9gwx4~0 , soc_inst|m0_1|u_logic|D9gwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cyfwx4~0 , soc_inst|m0_1|u_logic|Cyfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E6gwx4~0 , soc_inst|m0_1|u_logic|E6gwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E6gwx4~1 , soc_inst|m0_1|u_logic|E6gwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rvfwx4~3 , soc_inst|m0_1|u_logic|Rvfwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vqfwx4~0 , soc_inst|m0_1|u_logic|Vqfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ajfwx4~0 , soc_inst|m0_1|u_logic|Ajfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ajfwx4~1 , soc_inst|m0_1|u_logic|Ajfwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I0hwx4~0 , soc_inst|m0_1|u_logic|I0hwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zlfwx4~0 , soc_inst|m0_1|u_logic|Zlfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ajfwx4~2 , soc_inst|m0_1|u_logic|Ajfwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lsfwx4~1 , soc_inst|m0_1|u_logic|Lsfwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Infwx4~0 , soc_inst|m0_1|u_logic|Infwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lsfwx4~0 , soc_inst|m0_1|u_logic|Lsfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ajfwx4~3 , soc_inst|m0_1|u_logic|Ajfwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ajfwx4~4 , soc_inst|m0_1|u_logic|Ajfwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ajfwx4~5 , soc_inst|m0_1|u_logic|Ajfwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ajfwx4 , soc_inst|m0_1|u_logic|Ajfwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hdh2z4~1 , soc_inst|m0_1|u_logic|Hdh2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|byte1~0 , soc_inst|ram_1|byte1~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|byte_select[1]~DUPLICATE , soc_inst|ram_1|byte_select[1]~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[13]~4 , soc_inst|interconnect_1|HRDATA[13]~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[11]~42 , soc_inst|interconnect_1|HRDATA[11]~42, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I9nvx4~0 , soc_inst|m0_1|u_logic|I9nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bby2z4 , soc_inst|m0_1|u_logic|Bby2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oesvx4~0 , soc_inst|m0_1|u_logic|Oesvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A5nvx4~0 , soc_inst|m0_1|u_logic|A5nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rnhvx4~0 , soc_inst|m0_1|u_logic|Rnhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xuw2z4 , soc_inst|m0_1|u_logic|Xuw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A5nvx4~1 , soc_inst|m0_1|u_logic|A5nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE , soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Blwvx4~0 , soc_inst|m0_1|u_logic|Blwvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Akewx4~1 , soc_inst|m0_1|u_logic|Akewx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yiewx4~0 , soc_inst|m0_1|u_logic|Yiewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Itgwx4~0 , soc_inst|m0_1|u_logic|Itgwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fcewx4~0 , soc_inst|m0_1|u_logic|Fcewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fcewx4~1 , soc_inst|m0_1|u_logic|Fcewx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P0hwx4~1 , soc_inst|m0_1|u_logic|P0hwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4~0 , soc_inst|m0_1|u_logic|Pw6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4~1 , soc_inst|m0_1|u_logic|Pw6wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H3ivx4~0 , soc_inst|m0_1|u_logic|H3ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H3ivx4~2 , soc_inst|m0_1|u_logic|H3ivx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H3ivx4~3 , soc_inst|m0_1|u_logic|H3ivx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~0 , soc_inst|m0_1|u_logic|Av3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~1 , soc_inst|m0_1|u_logic|Av3wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~2 , soc_inst|m0_1|u_logic|Av3wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~3 , soc_inst|m0_1|u_logic|Av3wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~4 , soc_inst|m0_1|u_logic|Av3wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oar2z4 , soc_inst|m0_1|u_logic|Oar2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~5 , soc_inst|m0_1|u_logic|Av3wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~7 , soc_inst|m0_1|u_logic|Av3wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~6 , soc_inst|m0_1|u_logic|Av3wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~8 , soc_inst|m0_1|u_logic|Av3wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~9 , soc_inst|m0_1|u_logic|Av3wx4~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ny3wx4~3 , soc_inst|m0_1|u_logic|Ny3wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ny3wx4~2 , soc_inst|m0_1|u_logic|Ny3wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ny3wx4~4 , soc_inst|m0_1|u_logic|Ny3wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ny3wx4~5 , soc_inst|m0_1|u_logic|Ny3wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~10 , soc_inst|m0_1|u_logic|Av3wx4~10, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~11 , soc_inst|m0_1|u_logic|Av3wx4~11, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H3ivx4~1 , soc_inst|m0_1|u_logic|H3ivx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H3ivx4~4 , soc_inst|m0_1|u_logic|H3ivx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gji2z4 , soc_inst|m0_1|u_logic|Gji2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|My6wx4~1 , soc_inst|m0_1|u_logic|My6wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vr7wx4~0 , soc_inst|m0_1|u_logic|Vr7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R7iwx4~0 , soc_inst|m0_1|u_logic|R7iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O3pvx4 , soc_inst|m0_1|u_logic|O3pvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ojnvx4~0 , soc_inst|m0_1|u_logic|Ojnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ojnvx4~1 , soc_inst|m0_1|u_logic|Ojnvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ojnvx4~2 , soc_inst|m0_1|u_logic|Ojnvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z7i2z4 , soc_inst|m0_1|u_logic|Z7i2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iwp2z4 , soc_inst|m0_1|u_logic|Iwp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D4mvx4~1 , soc_inst|m0_1|u_logic|D4mvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D4mvx4~2 , soc_inst|m0_1|u_logic|D4mvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE , soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oxnvx4~1 , soc_inst|m0_1|u_logic|Oxnvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ek03z4 , soc_inst|m0_1|u_logic|Ek03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oxnvx4~2 , soc_inst|m0_1|u_logic|Oxnvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qz33z4~DUPLICATE , soc_inst|m0_1|u_logic|Qz33z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oxnvx4~0 , soc_inst|m0_1|u_logic|Oxnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oxnvx4~3 , soc_inst|m0_1|u_logic|Oxnvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N5qvx4~0 , soc_inst|m0_1|u_logic|N5qvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S6ovx4~1 , soc_inst|m0_1|u_logic|S6ovx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Va62z4 , soc_inst|m0_1|u_logic|Va62z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|haddr_o[29]~2 , soc_inst|m0_1|u_logic|haddr_o[29]~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H362z4~0 , soc_inst|m0_1|u_logic|H362z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|htrans_o[1]~0 , soc_inst|m0_1|u_logic|htrans_o[1]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|half_word_address~1 , soc_inst|switches_1|half_word_address~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|half_word_address~3 , soc_inst|switches_1|half_word_address~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|half_word_address[0] , soc_inst|switches_1|half_word_address[0], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[24]~6 , soc_inst|interconnect_1|HRDATA[24]~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[24]~17 , soc_inst|interconnect_1|HRDATA[24]~17, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[1][9] , soc_inst|switches_1|switch_store[1][9], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[25]~18 , soc_inst|interconnect_1|HRDATA[25]~18, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O5nvx4~0 , soc_inst|m0_1|u_logic|O5nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fohvx4~0 , soc_inst|m0_1|u_logic|Fohvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Urw2z4 , soc_inst|m0_1|u_logic|Urw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O5nvx4~1 , soc_inst|m0_1|u_logic|O5nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O5nvx4~2 , soc_inst|m0_1|u_logic|O5nvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pty2z4 , soc_inst|m0_1|u_logic|Pty2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dj6wx4~0 , soc_inst|m0_1|u_logic|Dj6wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Vskwx4~0 , soc_inst|m0_1|u_logic|Vskwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bhewx4~0 , soc_inst|m0_1|u_logic|Bhewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lfewx4 , soc_inst|m0_1|u_logic|Lfewx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4~2 , soc_inst|m0_1|u_logic|Pw6wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4~3 , soc_inst|m0_1|u_logic|Pw6wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lgkwx4~0 , soc_inst|m0_1|u_logic|Lgkwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Px5wx4 , soc_inst|m0_1|u_logic|Px5wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sfewx4~0 , soc_inst|m0_1|u_logic|Sfewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sfewx4~1 , soc_inst|m0_1|u_logic|Sfewx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Unewx4~0 , soc_inst|m0_1|u_logic|Unewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Unewx4 , soc_inst|m0_1|u_logic|Unewx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4~4 , soc_inst|m0_1|u_logic|Pw6wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4~5 , soc_inst|m0_1|u_logic|Pw6wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vz6wx4 , soc_inst|m0_1|u_logic|Vz6wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4 , soc_inst|m0_1|u_logic|Pw6wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE , soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X7mvx4~0 , soc_inst|m0_1|u_logic|X7mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X7mvx4~1 , soc_inst|m0_1|u_logic|X7mvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I6w2z4 , soc_inst|m0_1|u_logic|I6w2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F5mvx4~1 , soc_inst|m0_1|u_logic|F5mvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F5mvx4~2 , soc_inst|m0_1|u_logic|F5mvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U5x2z4 , soc_inst|m0_1|u_logic|U5x2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lefwx4~0 , soc_inst|m0_1|u_logic|Lefwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jux2z4 , soc_inst|m0_1|u_logic|Jux2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Thhvx4~0 , soc_inst|m0_1|u_logic|Thhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Thhvx4~1 , soc_inst|m0_1|u_logic|Thhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Thhvx4~2 , soc_inst|m0_1|u_logic|Thhvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jux2z4~DUPLICATE , soc_inst|m0_1|u_logic|Jux2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pet2z4 , soc_inst|m0_1|u_logic|Pet2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Msyvx4 , soc_inst|m0_1|u_logic|Msyvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ptgwx4~0 , soc_inst|m0_1|u_logic|Ptgwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Etlwx4~0 , soc_inst|m0_1|u_logic|Etlwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xslwx4~0 , soc_inst|m0_1|u_logic|Xslwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xslwx4~1 , soc_inst|m0_1|u_logic|Xslwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xslwx4~2 , soc_inst|m0_1|u_logic|Xslwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xslwx4~3 , soc_inst|m0_1|u_logic|Xslwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xslwx4~4 , soc_inst|m0_1|u_logic|Xslwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ushvx4~0 , soc_inst|m0_1|u_logic|Ushvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O5t2z4 , soc_inst|m0_1|u_logic|O5t2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mkrwx4 , soc_inst|m0_1|u_logic|Mkrwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~1 , soc_inst|m0_1|u_logic|Amjwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D5kwx4~0 , soc_inst|m0_1|u_logic|D5kwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~2 , soc_inst|m0_1|u_logic|Amjwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~3 , soc_inst|m0_1|u_logic|Amjwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~4 , soc_inst|m0_1|u_logic|Amjwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~5 , soc_inst|m0_1|u_logic|Amjwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Krjwx4~0 , soc_inst|m0_1|u_logic|Krjwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tsjwx4~0 , soc_inst|m0_1|u_logic|Tsjwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qujwx4~0 , soc_inst|m0_1|u_logic|Qujwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E2kwx4~0 , soc_inst|m0_1|u_logic|E2kwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Htjwx4~0 , soc_inst|m0_1|u_logic|Htjwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Htjwx4~1 , soc_inst|m0_1|u_logic|Htjwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Htjwx4~2 , soc_inst|m0_1|u_logic|Htjwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R3fwx4~0 , soc_inst|m0_1|u_logic|R3fwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zvjwx4~0 , soc_inst|m0_1|u_logic|Zvjwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xujwx4~0 , soc_inst|m0_1|u_logic|Xujwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Htjwx4~3 , soc_inst|m0_1|u_logic|Htjwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Drjwx4~0 , soc_inst|m0_1|u_logic|Drjwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Amjwx4 , soc_inst|m0_1|u_logic|Amjwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G36wx4~0 , soc_inst|m0_1|u_logic|G36wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W46wx4~0 , soc_inst|m0_1|u_logic|W46wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H06wx4~0 , soc_inst|m0_1|u_logic|H06wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|V76wx4~0 , soc_inst|m0_1|u_logic|V76wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|V76wx4~1 , soc_inst|m0_1|u_logic|V76wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xu5wx4~1 , soc_inst|m0_1|u_logic|Xu5wx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|D56wx4~0 , soc_inst|m0_1|u_logic|D56wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mz5wx4~0 , soc_inst|m0_1|u_logic|Mz5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O76wx4 , soc_inst|m0_1|u_logic|O76wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yy5wx4~0 , soc_inst|m0_1|u_logic|Yy5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P0hwx4~1 , soc_inst|m0_1|u_logic|P0hwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xu5wx4~1 , soc_inst|m0_1|u_logic|Xu5wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Px5wx4 , soc_inst|m0_1|u_logic|Px5wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G27wx4~2 , soc_inst|m0_1|u_logic|G27wx4~2, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Uw5wx4~0 , soc_inst|m0_1|u_logic|Uw5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ry5wx4~0 , soc_inst|m0_1|u_logic|Ry5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mz5wx4~0 , soc_inst|m0_1|u_logic|Mz5wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Xu5wx4~0 , soc_inst|m0_1|u_logic|Xu5wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Xu5wx4~2 , soc_inst|m0_1|u_logic|Xu5wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H06wx4~0 , soc_inst|m0_1|u_logic|H06wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Xu5wx4~3 , soc_inst|m0_1|u_logic|Xu5wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A76wx4~0 , soc_inst|m0_1|u_logic|A76wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W46wx4~0 , soc_inst|m0_1|u_logic|W46wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Xu5wx4 , soc_inst|m0_1|u_logic|Xu5wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wai2z4~feeder , soc_inst|m0_1|u_logic|Wai2z4~feeder, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE , soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Svxwx4~0 , soc_inst|m0_1|u_logic|Svxwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vy7wx4~0 , soc_inst|m0_1|u_logic|Vy7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kkyvx4~0 , soc_inst|m0_1|u_logic|Kkyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L8mvx4~0 , soc_inst|m0_1|u_logic|L8mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L8mvx4~1 , soc_inst|m0_1|u_logic|L8mvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE , soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ylwwx4~0 , soc_inst|m0_1|u_logic|Ylwwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ylwwx4~1 , soc_inst|m0_1|u_logic|Ylwwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ok7wx4~1 , soc_inst|m0_1|u_logic|Ok7wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Manwx4~0 , soc_inst|m0_1|u_logic|Manwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pwdwx4~0 , soc_inst|m0_1|u_logic|Pwdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Glnwx4~1 , soc_inst|m0_1|u_logic|Glnwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Skhvx4~1 , soc_inst|m0_1|u_logic|Skhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Skhvx4~0 , soc_inst|m0_1|u_logic|Skhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jex2z4 , soc_inst|m0_1|u_logic|Jex2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ohivx4~0 , soc_inst|m0_1|u_logic|Ohivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE , soc_inst|m0_1|u_logic|Szr2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lwbwx4~0 , soc_inst|m0_1|u_logic|Lwbwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE , soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|To33z4~DUPLICATE , soc_inst|m0_1|u_logic|To33z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oubwx4~1 , soc_inst|m0_1|u_logic|Oubwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fre3z4~DUPLICATE , soc_inst|m0_1|u_logic|Fre3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oubwx4~2 , soc_inst|m0_1|u_logic|Oubwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oubwx4~0 , soc_inst|m0_1|u_logic|Oubwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oubwx4~3 , soc_inst|m0_1|u_logic|Oubwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Konvx4~0 , soc_inst|m0_1|u_logic|Konvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ksbwx4~0 , soc_inst|m0_1|u_logic|Ksbwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iu1wx4~0 , soc_inst|m0_1|u_logic|Iu1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uku2z4 , soc_inst|m0_1|u_logic|Uku2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE , soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pybwx4~2 , soc_inst|m0_1|u_logic|Pybwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pybwx4~1 , soc_inst|m0_1|u_logic|Pybwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Duv2z4~DUPLICATE , soc_inst|m0_1|u_logic|Duv2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pybwx4~3 , soc_inst|m0_1|u_logic|Pybwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pybwx4~0 , soc_inst|m0_1|u_logic|Pybwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pybwx4 , soc_inst|m0_1|u_logic|Pybwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tdg2z4 , soc_inst|m0_1|u_logic|Tdg2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aeg2z4 , soc_inst|m0_1|u_logic|Aeg2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vff2z4 , soc_inst|m0_1|u_logic|Vff2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jhe2z4 , soc_inst|m0_1|u_logic|Jhe2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qhe2z4 , soc_inst|m0_1|u_logic|Qhe2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hhd2z4 , soc_inst|m0_1|u_logic|Hhd2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ohd2z4 , soc_inst|m0_1|u_logic|Ohd2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mgd2z4~4 , soc_inst|m0_1|u_logic|Mgd2z4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cgf2z4 , soc_inst|m0_1|u_logic|Cgf2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mgd2z4~0 , soc_inst|m0_1|u_logic|Mgd2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lhyvx4~2 , soc_inst|m0_1|u_logic|Lhyvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z4qvx4~0 , soc_inst|m0_1|u_logic|Z4qvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z4qvx4 , soc_inst|m0_1|u_logic|Z4qvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cll2z4 , soc_inst|m0_1|u_logic|Cll2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ch03z4 , soc_inst|m0_1|u_logic|Ch03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ht5wx4~2 , soc_inst|m0_1|u_logic|Ht5wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ht5wx4~1 , soc_inst|m0_1|u_logic|Ht5wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ht5wx4~3 , soc_inst|m0_1|u_logic|Ht5wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ht5wx4~0 , soc_inst|m0_1|u_logic|Ht5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[15]~1 , soc_inst|m0_1|u_logic|hwdata_o[15]~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[15]~2 , soc_inst|ram_1|data_to_memory[15]~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[31]~2 , soc_inst|interconnect_1|HRDATA[31]~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hjnvx4~0 , soc_inst|m0_1|u_logic|Hjnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pmhvx4~0 , soc_inst|m0_1|u_logic|Pmhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F1x2z4 , soc_inst|m0_1|u_logic|F1x2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G8nvx4~0 , soc_inst|m0_1|u_logic|G8nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ufy2z4 , soc_inst|m0_1|u_logic|Ufy2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hjnvx4~1 , soc_inst|m0_1|u_logic|Hjnvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hjnvx4~2 , soc_inst|m0_1|u_logic|Hjnvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U2x2z4 , soc_inst|m0_1|u_logic|U2x2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Srgwx4~0 , soc_inst|m0_1|u_logic|Srgwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fzyvx4~0 , soc_inst|m0_1|u_logic|Fzyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mk6wx4~0 , soc_inst|m0_1|u_logic|Mk6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X3xvx4~0 , soc_inst|m0_1|u_logic|X3xvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X3xvx4~1 , soc_inst|m0_1|u_logic|X3xvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pa7wx4~0 , soc_inst|m0_1|u_logic|Pa7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q3xvx4~0 , soc_inst|m0_1|u_logic|Q3xvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q3xvx4~1 , soc_inst|m0_1|u_logic|Q3xvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Na6wx4~0 , soc_inst|m0_1|u_logic|Na6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~0 , soc_inst|m0_1|u_logic|U6wvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~3 , soc_inst|m0_1|u_logic|U6wvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~4 , soc_inst|m0_1|u_logic|U6wvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~1 , soc_inst|m0_1|u_logic|U6wvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~2 , soc_inst|m0_1|u_logic|U6wvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~5 , soc_inst|m0_1|u_logic|U6wvx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~6 , soc_inst|m0_1|u_logic|U6wvx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~7 , soc_inst|m0_1|u_logic|U6wvx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W3mvx4~0 , soc_inst|m0_1|u_logic|W3mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W3mvx4~1 , soc_inst|m0_1|u_logic|W3mvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE , soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E4xvx4~1 , soc_inst|m0_1|u_logic|E4xvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B3mvx4~0 , soc_inst|m0_1|u_logic|B3mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wlwvx4~0 , soc_inst|m0_1|u_logic|Wlwvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wlwvx4~1 , soc_inst|m0_1|u_logic|Wlwvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B3mvx4~1 , soc_inst|m0_1|u_logic|B3mvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE , soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E4xvx4~0 , soc_inst|m0_1|u_logic|E4xvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hklwx4~1 , soc_inst|m0_1|u_logic|Hklwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hklwx4~2 , soc_inst|m0_1|u_logic|Hklwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hklwx4~3 , soc_inst|m0_1|u_logic|Hklwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jeewx4 , soc_inst|m0_1|u_logic|Jeewx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zmlwx4~0 , soc_inst|m0_1|u_logic|Zmlwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hklwx4~0 , soc_inst|m0_1|u_logic|Hklwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hklwx4~4 , soc_inst|m0_1|u_logic|Hklwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bthvx4~0 , soc_inst|m0_1|u_logic|Bthvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cyq2z4 , soc_inst|m0_1|u_logic|Cyq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tykwx4~0 , soc_inst|m0_1|u_logic|Tykwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tykwx4~1 , soc_inst|m0_1|u_logic|Tykwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kxkwx4~0 , soc_inst|m0_1|u_logic|Kxkwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kxkwx4~1 , soc_inst|m0_1|u_logic|Kxkwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kxkwx4~2 , soc_inst|m0_1|u_logic|Kxkwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Svk2z4 , soc_inst|m0_1|u_logic|Svk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C51xx4~0 , soc_inst|m0_1|u_logic|C51xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE , soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE , soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Po53z4 , soc_inst|m0_1|u_logic|Po53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R40wx4~2 , soc_inst|m0_1|u_logic|R40wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE , soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE , soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R40wx4~1 , soc_inst|m0_1|u_logic|R40wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R40wx4~0 , soc_inst|m0_1|u_logic|R40wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R40wx4 , soc_inst|m0_1|u_logic|R40wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[11]~8 , soc_inst|m0_1|u_logic|hwdata_o[11]~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[11]~17 , soc_inst|ram_1|data_to_memory[11]~17, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[11]~24 , soc_inst|interconnect_1|HRDATA[11]~24, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add1~13 , soc_inst|m0_1|u_logic|Add1~13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I9nvx4~0 , soc_inst|m0_1|u_logic|I9nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bby2z4 , soc_inst|m0_1|u_logic|Bby2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B9nvx4~0 , soc_inst|m0_1|u_logic|B9nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qcy2z4 , soc_inst|m0_1|u_logic|Qcy2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Knhvx4~0 , soc_inst|m0_1|u_logic|Knhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mww2z4 , soc_inst|m0_1|u_logic|Mww2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zgsvx4~0 , soc_inst|m0_1|u_logic|Zgsvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hyy2z4 , soc_inst|m0_1|u_logic|Hyy2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T4nvx4~0 , soc_inst|m0_1|u_logic|T4nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T4nvx4~1 , soc_inst|m0_1|u_logic|T4nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE , soc_inst|m0_1|u_logic|Hyy2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ocfwx4~0 , soc_inst|m0_1|u_logic|Ocfwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rafwx4~0 , soc_inst|m0_1|u_logic|Rafwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rni2z4 , soc_inst|m0_1|u_logic|Rni2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE , soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L753z4 , soc_inst|m0_1|u_logic|L753z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Punvx4~0 , soc_inst|m0_1|u_logic|Punvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qi03z4 , soc_inst|m0_1|u_logic|Qi03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wlz2z4 , soc_inst|m0_1|u_logic|Wlz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Punvx4~2 , soc_inst|m0_1|u_logic|Punvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kf13z4 , soc_inst|m0_1|u_logic|Kf13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|To23z4 , soc_inst|m0_1|u_logic|To23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Punvx4~1 , soc_inst|m0_1|u_logic|Punvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Punvx4~3 , soc_inst|m0_1|u_logic|Punvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Punvx4~4 , soc_inst|m0_1|u_logic|Punvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T50wx4~0 , soc_inst|m0_1|u_logic|T50wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|byte1~0 , soc_inst|ram_1|byte1~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|byte_select[1] , soc_inst|ram_1|byte_select[1], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[14]~30 , soc_inst|ram_1|data_to_memory[14]~30, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[30]~34 , soc_inst|interconnect_1|HRDATA[30]~34, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wmhvx4~0 , soc_inst|m0_1|u_logic|Wmhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qzw2z4 , soc_inst|m0_1|u_logic|Qzw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M4nvx4~0 , soc_inst|m0_1|u_logic|M4nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N8nvx4~0 , soc_inst|m0_1|u_logic|N8nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fey2z4 , soc_inst|m0_1|u_logic|Fey2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M4nvx4~1 , soc_inst|m0_1|u_logic|M4nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M4nvx4~2 , soc_inst|m0_1|u_logic|M4nvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE , soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mhgwx4~0 , soc_inst|m0_1|u_logic|Mhgwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iikwx4~0 , soc_inst|m0_1|u_logic|Iikwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Md6wx4~0 , soc_inst|m0_1|u_logic|Md6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dc6wx4~0 , soc_inst|m0_1|u_logic|Dc6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dc6wx4~1 , soc_inst|m0_1|u_logic|Dc6wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R8d2z4~0 , soc_inst|m0_1|u_logic|R8d2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uijwx4~0 , soc_inst|m0_1|u_logic|Uijwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qf6wx4~0 , soc_inst|m0_1|u_logic|Qf6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uv6wx4 , soc_inst|m0_1|u_logic|Uv6wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~2 , soc_inst|m0_1|u_logic|Q86wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~3 , soc_inst|m0_1|u_logic|Q86wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~7 , soc_inst|m0_1|u_logic|Vsywx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C6mwx4~1 , soc_inst|m0_1|u_logic|C6mwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rqywx4~0 , soc_inst|m0_1|u_logic|Rqywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C6mwx4~2 , soc_inst|m0_1|u_logic|C6mwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V5mwx4~0 , soc_inst|m0_1|u_logic|V5mwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G9w2z4 , soc_inst|m0_1|u_logic|G9w2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xf6wx4~0 , soc_inst|m0_1|u_logic|Xf6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ua6wx4~0 , soc_inst|m0_1|u_logic|Ua6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~0 , soc_inst|m0_1|u_logic|Q86wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gpjwx4~0 , soc_inst|m0_1|u_logic|Gpjwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~1 , soc_inst|m0_1|u_logic|Q86wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~4 , soc_inst|m0_1|u_logic|Q86wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~5 , soc_inst|m0_1|u_logic|Q86wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~6 , soc_inst|m0_1|u_logic|Q86wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~1 , soc_inst|m0_1|u_logic|Jm6wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~2 , soc_inst|m0_1|u_logic|Jm6wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~3 , soc_inst|m0_1|u_logic|Jm6wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eyhvx4~0 , soc_inst|m0_1|u_logic|Eyhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ad7wx4~0 , soc_inst|m0_1|u_logic|Ad7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P28wx4 , soc_inst|m0_1|u_logic|P28wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~4 , soc_inst|m0_1|u_logic|Jm6wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hyewx4 , soc_inst|m0_1|u_logic|Hyewx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~0 , soc_inst|m0_1|u_logic|Jm6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~5 , soc_inst|m0_1|u_logic|Jm6wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~6 , soc_inst|m0_1|u_logic|Jm6wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xt6wx4~0 , soc_inst|m0_1|u_logic|Xt6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q07wx4~1 , soc_inst|m0_1|u_logic|Q07wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X07wx4~0 , soc_inst|m0_1|u_logic|X07wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q07wx4~0 , soc_inst|m0_1|u_logic|Q07wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xt6wx4~1 , soc_inst|m0_1|u_logic|Xt6wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~7 , soc_inst|m0_1|u_logic|Jm6wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eyhvx4~1 , soc_inst|m0_1|u_logic|Eyhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdi2z4 , soc_inst|m0_1|u_logic|Pdi2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cxhvx4~0 , soc_inst|m0_1|u_logic|Cxhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cxhvx4~1 , soc_inst|m0_1|u_logic|Cxhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fcj2z4 , soc_inst|m0_1|u_logic|Fcj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vllvx4~0 , soc_inst|m0_1|u_logic|Vllvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qnyvx4~0 , soc_inst|m0_1|u_logic|Qnyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vllvx4~1 , soc_inst|m0_1|u_logic|Vllvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U4z2z4 , soc_inst|m0_1|u_logic|U4z2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Htyvx4~0 , soc_inst|m0_1|u_logic|Htyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cy33z4 , soc_inst|m0_1|u_logic|Cy33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Htyvx4~1 , soc_inst|m0_1|u_logic|Htyvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L753z4~DUPLICATE , soc_inst|m0_1|u_logic|L753z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Htyvx4~2 , soc_inst|m0_1|u_logic|Htyvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Htyvx4~3 , soc_inst|m0_1|u_logic|Htyvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[1] , soc_inst|m0_1|u_logic|hwdata_o[1], de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R0t2z4 , soc_inst|m0_1|u_logic|R0t2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rexvx4~0 , soc_inst|m0_1|u_logic|Rexvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Scpvx4~0 , soc_inst|m0_1|u_logic|Scpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z5pvx4~0 , soc_inst|m0_1|u_logic|Z5pvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|It52z4~0 , soc_inst|m0_1|u_logic|It52z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|It52z4~1 , soc_inst|m0_1|u_logic|It52z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|It52z4~2 , soc_inst|m0_1|u_logic|It52z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|byte0~0 , soc_inst|ram_1|byte0~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|byte_select[0] , soc_inst|ram_1|byte_select[0], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[5]~23 , soc_inst|ram_1|data_to_memory[5]~23, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[0][5] , soc_inst|switches_1|switch_store[0][5], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[5]~28 , soc_inst|interconnect_1|HRDATA[5]~28, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yanvx4~0 , soc_inst|m0_1|u_logic|Yanvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F0y2z4 , soc_inst|m0_1|u_logic|F0y2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wamvx4~0 , soc_inst|m0_1|u_logic|Wamvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tdp2z4 , soc_inst|m0_1|u_logic|Tdp2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Ye4wx4 , soc_inst|m0_1|u_logic|Ye4wx4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|S4w2z4 , soc_inst|m0_1|u_logic|S4w2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E7mwx4 , soc_inst|m0_1|u_logic|E7mwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rbi3z4~0 , soc_inst|m0_1|u_logic|Rbi3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zdc2z4~0 , soc_inst|m0_1|u_logic|Zdc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Skc2z4~0 , soc_inst|m0_1|u_logic|Skc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ekc2z4~0 , soc_inst|m0_1|u_logic|Ekc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mhc2z4~0 , soc_inst|m0_1|u_logic|Mhc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mhc2z4~1 , soc_inst|m0_1|u_logic|Mhc2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~1 , soc_inst|m0_1|u_logic|Dcrwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~0 , soc_inst|m0_1|u_logic|Dcrwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~2 , soc_inst|m0_1|u_logic|Dcrwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~4 , soc_inst|m0_1|u_logic|Dcrwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~3 , soc_inst|m0_1|u_logic|Dcrwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mac2z4~0 , soc_inst|m0_1|u_logic|Mac2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kgc2z4~0 , soc_inst|m0_1|u_logic|Kgc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~5 , soc_inst|m0_1|u_logic|Dcrwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~6 , soc_inst|m0_1|u_logic|Dcrwx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qaiwx4~0 , soc_inst|m0_1|u_logic|Qaiwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H4nwx4 , soc_inst|m0_1|u_logic|H4nwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~5 , soc_inst|m0_1|u_logic|Add2~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wthvx4~0 , soc_inst|m0_1|u_logic|Wthvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wthvx4~1 , soc_inst|m0_1|u_logic|Wthvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J0l2z4 , soc_inst|m0_1|u_logic|J0l2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~5 , soc_inst|m0_1|u_logic|Add3~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~1 , soc_inst|m0_1|u_logic|Add3~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Rbi3z4~1 , soc_inst|m0_1|u_logic|Rbi3z4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Rbi3z4 , soc_inst|m0_1|u_logic|Rbi3z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Ueovx4~0 , soc_inst|m0_1|u_logic|Ueovx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Qbpvx4~0 , soc_inst|m0_1|u_logic|Qbpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tohvx4~0 , soc_inst|m0_1|u_logic|Tohvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sow2z4 , soc_inst|m0_1|u_logic|Sow2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C6nvx4~1 , soc_inst|m0_1|u_logic|C6nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C6nvx4~0 , soc_inst|m0_1|u_logic|C6nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C6nvx4~2 , soc_inst|m0_1|u_logic|C6nvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE , soc_inst|m0_1|u_logic|Nqy2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z5wvx4~0 , soc_inst|m0_1|u_logic|Z5wvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I3mvx4~0 , soc_inst|m0_1|u_logic|I3mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ndwvx4~0 , soc_inst|m0_1|u_logic|Ndwvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I3mvx4~1 , soc_inst|m0_1|u_logic|I3mvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE , soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ggswx4~1 , soc_inst|m0_1|u_logic|Ggswx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ggswx4~0 , soc_inst|m0_1|u_logic|Ggswx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ggswx4~2 , soc_inst|m0_1|u_logic|Ggswx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yaz2z4 , soc_inst|m0_1|u_logic|Yaz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q2q2z4 , soc_inst|m0_1|u_logic|Q2q2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S71wx4~4 , soc_inst|m0_1|u_logic|S71wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S71wx4~3 , soc_inst|m0_1|u_logic|S71wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE , soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R21xx4~0 , soc_inst|m0_1|u_logic|R21xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hmv2z4~DUPLICATE , soc_inst|m0_1|u_logic|Hmv2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S71wx4~1 , soc_inst|m0_1|u_logic|S71wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D603z4~DUPLICATE , soc_inst|m0_1|u_logic|D603z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S71wx4~2 , soc_inst|m0_1|u_logic|S71wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hi83z4~DUPLICATE , soc_inst|m0_1|u_logic|Hi83z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S71wx4~0 , soc_inst|m0_1|u_logic|S71wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S71wx4~5 , soc_inst|m0_1|u_logic|S71wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S71wx4 , soc_inst|m0_1|u_logic|S71wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bq5wx4~0 , soc_inst|m0_1|u_logic|Bq5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Axm2z4~0 , soc_inst|m0_1|u_logic|Axm2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Axm2z4 , soc_inst|m0_1|u_logic|Axm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Luywx4~0 , soc_inst|m0_1|u_logic|Luywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Luywx4~4 , soc_inst|m0_1|u_logic|Luywx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lhd3z4 , soc_inst|m0_1|u_logic|Lhd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Luywx4~1 , soc_inst|m0_1|u_logic|Luywx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Luywx4~3 , soc_inst|m0_1|u_logic|Luywx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Luywx4~5 , soc_inst|m0_1|u_logic|Luywx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fed3z4 , soc_inst|m0_1|u_logic|Fed3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Luywx4~2 , soc_inst|m0_1|u_logic|Luywx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Luywx4~6 , soc_inst|m0_1|u_logic|Luywx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C6mwx4~0 , soc_inst|m0_1|u_logic|C6mwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C6mwx4~3 , soc_inst|m0_1|u_logic|C6mwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Abovx4~0 , soc_inst|m0_1|u_logic|Abovx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zlnvx4~0 , soc_inst|m0_1|u_logic|Zlnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nbm2z4 , soc_inst|m0_1|u_logic|Nbm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|By4wx4 , soc_inst|m0_1|u_logic|By4wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y6t2z4 , soc_inst|m0_1|u_logic|Y6t2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z0mwx4~0 , soc_inst|m0_1|u_logic|Z0mwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hprot_o~2 , soc_inst|m0_1|u_logic|hprot_o~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hprot_o~3 , soc_inst|m0_1|u_logic|hprot_o~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hprot_o~1 , soc_inst|m0_1|u_logic|hprot_o~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jbhwx4~0 , soc_inst|m0_1|u_logic|Jbhwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qx52z4~0 , soc_inst|m0_1|u_logic|Qx52z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hprot_o~4 , soc_inst|m0_1|u_logic|hprot_o~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hprot_o~5 , soc_inst|m0_1|u_logic|hprot_o~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E7mwx4 , soc_inst|m0_1|u_logic|E7mwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|always1~0 , soc_inst|ram_1|always1~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|write_cycle~0 , soc_inst|ram_1|write_cycle~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|write_cycle~DUPLICATE , soc_inst|ram_1|write_cycle~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rnhvx4~0 , soc_inst|m0_1|u_logic|Rnhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xuw2z4 , soc_inst|m0_1|u_logic|Xuw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oesvx4~0 , soc_inst|m0_1|u_logic|Oesvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A5nvx4~0 , soc_inst|m0_1|u_logic|A5nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A5nvx4~1 , soc_inst|m0_1|u_logic|A5nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Swy2z4 , soc_inst|m0_1|u_logic|Swy2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ahhwx4~0 , soc_inst|m0_1|u_logic|Ahhwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I0hwx4~0 , soc_inst|m0_1|u_logic|I0hwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~2 , soc_inst|m0_1|u_logic|Bfgwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~3 , soc_inst|m0_1|u_logic|Bfgwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ugewx4~0 , soc_inst|m0_1|u_logic|Ugewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~18 , soc_inst|m0_1|u_logic|Bfgwx4~18, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P0hwx4~3 , soc_inst|m0_1|u_logic|P0hwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~10 , soc_inst|m0_1|u_logic|Bfgwx4~10, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~5 , soc_inst|m0_1|u_logic|Bfgwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~6 , soc_inst|m0_1|u_logic|Bfgwx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~7 , soc_inst|m0_1|u_logic|Bfgwx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~8 , soc_inst|m0_1|u_logic|Bfgwx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~9 , soc_inst|m0_1|u_logic|Bfgwx4~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~11 , soc_inst|m0_1|u_logic|Bfgwx4~11, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Thgwx4~0 , soc_inst|m0_1|u_logic|Thgwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hahwx4~0 , soc_inst|m0_1|u_logic|Hahwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mhgwx4~1 , soc_inst|m0_1|u_logic|Mhgwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~1 , soc_inst|m0_1|u_logic|Bfgwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P0hwx4~2 , soc_inst|m0_1|u_logic|P0hwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bhewx4~0 , soc_inst|m0_1|u_logic|Bhewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~4 , soc_inst|m0_1|u_logic|Bfgwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~12 , soc_inst|m0_1|u_logic|Bfgwx4~12, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kugwx4~0 , soc_inst|m0_1|u_logic|Kugwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~13 , soc_inst|m0_1|u_logic|Bfgwx4~13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ekgwx4~0 , soc_inst|m0_1|u_logic|Ekgwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Poa2z4~1 , soc_inst|m0_1|u_logic|Poa2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~14 , soc_inst|m0_1|u_logic|Bfgwx4~14, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~15 , soc_inst|m0_1|u_logic|Bfgwx4~15, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Togwx4~1 , soc_inst|m0_1|u_logic|Togwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Togwx4~2 , soc_inst|m0_1|u_logic|Togwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Togwx4~0 , soc_inst|m0_1|u_logic|Togwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Togwx4~3 , soc_inst|m0_1|u_logic|Togwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~16 , soc_inst|m0_1|u_logic|Bfgwx4~16, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~17 , soc_inst|m0_1|u_logic|Bfgwx4~17, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I0hwx4~1 , soc_inst|m0_1|u_logic|I0hwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zygwx4~0 , soc_inst|m0_1|u_logic|Zygwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tvgwx4~0 , soc_inst|m0_1|u_logic|Tvgwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tvgwx4~1 , soc_inst|m0_1|u_logic|Tvgwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P0hwx4~0 , soc_inst|m0_1|u_logic|P0hwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~0 , soc_inst|m0_1|u_logic|Bfgwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4 , soc_inst|m0_1|u_logic|Bfgwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sgj2z4 , soc_inst|m0_1|u_logic|Sgj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qr42z4~0 , soc_inst|m0_1|u_logic|Qr42z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qr42z4~1 , soc_inst|m0_1|u_logic|Qr42z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I6qvx4~0 , soc_inst|m0_1|u_logic|I6qvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nfnvx4~0 , soc_inst|m0_1|u_logic|Nfnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE , soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G1mwx4~0 , soc_inst|m0_1|u_logic|G1mwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P2mwx4~0 , soc_inst|m0_1|u_logic|P2mwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwrite_o~0 , soc_inst|m0_1|u_logic|hwrite_o~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|read_cycle~0 , soc_inst|ram_1|read_cycle~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|read_cycle , soc_inst|ram_1|read_cycle, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[29]~0 , soc_inst|interconnect_1|HRDATA[29]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ajnvx4~0 , soc_inst|m0_1|u_logic|Ajnvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Dnhvx4~0 , soc_inst|m0_1|u_logic|Dnhvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Byw2z4 , soc_inst|m0_1|u_logic|Byw2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Ajnvx4~1 , soc_inst|m0_1|u_logic|Ajnvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qem2z4 , soc_inst|m0_1|u_logic|Qem2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ajnvx4~0 , soc_inst|m0_1|u_logic|Ajnvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Ajnvx4~2 , soc_inst|m0_1|u_logic|Ajnvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qem2z4~DUPLICATE , soc_inst|m0_1|u_logic|Qem2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xhxvx4 , soc_inst|m0_1|u_logic|Xhxvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Icyvx4~0 , soc_inst|m0_1|u_logic|Icyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ubjwx4~0 , soc_inst|m0_1|u_logic|Ubjwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ubjwx4~1 , soc_inst|m0_1|u_logic|Ubjwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hvhwx4~0 , soc_inst|m0_1|u_logic|Hvhwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lhjwx4~0 , soc_inst|m0_1|u_logic|Lhjwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ofjwx4~0 , soc_inst|m0_1|u_logic|Ofjwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ehjwx4~0 , soc_inst|m0_1|u_logic|Ehjwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ofjwx4~1 , soc_inst|m0_1|u_logic|Ofjwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S3jwx4~0 , soc_inst|m0_1|u_logic|S3jwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X2jwx4~0 , soc_inst|m0_1|u_logic|X2jwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~6 , soc_inst|m0_1|u_logic|Lwiwx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R6jwx4~0 , soc_inst|m0_1|u_logic|R6jwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T7jwx4 , soc_inst|m0_1|u_logic|T7jwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~1 , soc_inst|m0_1|u_logic|Lwiwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~2 , soc_inst|m0_1|u_logic|Lwiwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~3 , soc_inst|m0_1|u_logic|Lwiwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q2jwx4~0 , soc_inst|m0_1|u_logic|Q2jwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eajwx4~0 , soc_inst|m0_1|u_logic|Eajwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q9jwx4~0 , soc_inst|m0_1|u_logic|Q9jwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iyiwx4~0 , soc_inst|m0_1|u_logic|Iyiwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iyiwx4~1 , soc_inst|m0_1|u_logic|Iyiwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~0 , soc_inst|m0_1|u_logic|Lwiwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~4 , soc_inst|m0_1|u_logic|Lwiwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6fwx4~0 , soc_inst|m0_1|u_logic|Q6fwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6fwx4~1 , soc_inst|m0_1|u_logic|Q6fwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~5 , soc_inst|m0_1|u_logic|Lwiwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pyiwx4~0 , soc_inst|m0_1|u_logic|Pyiwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pyiwx4~1 , soc_inst|m0_1|u_logic|Pyiwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fvhvx4~0 , soc_inst|m0_1|u_logic|Fvhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Npk2z4 , soc_inst|m0_1|u_logic|Npk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qem2z4 , soc_inst|m0_1|u_logic|Qem2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qllwx4~1 , soc_inst|m0_1|u_logic|Qllwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qllwx4~2 , soc_inst|m0_1|u_logic|Qllwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qllwx4~3 , soc_inst|m0_1|u_logic|Qllwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qllwx4~4 , soc_inst|m0_1|u_logic|Qllwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wfhvx4~1 , soc_inst|m0_1|u_logic|Wfhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wfhvx4~0 , soc_inst|m0_1|u_logic|Wfhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wfhvx4~2 , soc_inst|m0_1|u_logic|Wfhvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE , soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fjewx4~0 , soc_inst|m0_1|u_logic|Fjewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fjewx4~1 , soc_inst|m0_1|u_logic|Fjewx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ajfwx4~0 , soc_inst|m0_1|u_logic|Ajfwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ajfwx4~1 , soc_inst|m0_1|u_logic|Ajfwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zlfwx4~0 , soc_inst|m0_1|u_logic|Zlfwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ajfwx4~2 , soc_inst|m0_1|u_logic|Ajfwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lsfwx4~0 , soc_inst|m0_1|u_logic|Lsfwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Infwx4~0 , soc_inst|m0_1|u_logic|Infwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lsfwx4~1 , soc_inst|m0_1|u_logic|Lsfwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ajfwx4~3 , soc_inst|m0_1|u_logic|Ajfwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ajfwx4~4 , soc_inst|m0_1|u_logic|Ajfwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ajfwx4~5 , soc_inst|m0_1|u_logic|Ajfwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vqfwx4~0 , soc_inst|m0_1|u_logic|Vqfwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rvfwx4~0 , soc_inst|m0_1|u_logic|Rvfwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L6gwx4~0 , soc_inst|m0_1|u_logic|L6gwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rvfwx4~1 , soc_inst|m0_1|u_logic|Rvfwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rvfwx4~4 , soc_inst|m0_1|u_logic|Rvfwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rvfwx4~2 , soc_inst|m0_1|u_logic|Rvfwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cyfwx4~0 , soc_inst|m0_1|u_logic|Cyfwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B1gwx4~1 , soc_inst|m0_1|u_logic|B1gwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K2gwx4~0 , soc_inst|m0_1|u_logic|K2gwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B1gwx4~0 , soc_inst|m0_1|u_logic|B1gwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B1gwx4~2 , soc_inst|m0_1|u_logic|B1gwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ccgwx4~0 , soc_inst|m0_1|u_logic|Ccgwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y9gwx4~0 , soc_inst|m0_1|u_logic|Y9gwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K9gwx4~0 , soc_inst|m0_1|u_logic|K9gwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D9gwx4~0 , soc_inst|m0_1|u_logic|D9gwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E6gwx4~0 , soc_inst|m0_1|u_logic|E6gwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E6gwx4~1 , soc_inst|m0_1|u_logic|E6gwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rvfwx4~3 , soc_inst|m0_1|u_logic|Rvfwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ajfwx4 , soc_inst|m0_1|u_logic|Ajfwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ffj2z4 , soc_inst|m0_1|u_logic|Ffj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wdxvx4~0 , soc_inst|m0_1|u_logic|Wdxvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~0 , soc_inst|m0_1|u_logic|Amjwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D5kwx4~0 , soc_inst|m0_1|u_logic|D5kwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~2 , soc_inst|m0_1|u_logic|Amjwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~3 , soc_inst|m0_1|u_logic|Amjwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~1 , soc_inst|m0_1|u_logic|Amjwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~4 , soc_inst|m0_1|u_logic|Amjwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~5 , soc_inst|m0_1|u_logic|Amjwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tsjwx4~0 , soc_inst|m0_1|u_logic|Tsjwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R3fwx4~0 , soc_inst|m0_1|u_logic|R3fwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zvjwx4~0 , soc_inst|m0_1|u_logic|Zvjwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|My6wx4~1 , soc_inst|m0_1|u_logic|My6wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xujwx4~0 , soc_inst|m0_1|u_logic|Xujwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E2kwx4~0 , soc_inst|m0_1|u_logic|E2kwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Htjwx4~0 , soc_inst|m0_1|u_logic|Htjwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Htjwx4~1 , soc_inst|m0_1|u_logic|Htjwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Htjwx4~2 , soc_inst|m0_1|u_logic|Htjwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Htjwx4~3 , soc_inst|m0_1|u_logic|Htjwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qujwx4~0 , soc_inst|m0_1|u_logic|Qujwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Drjwx4~0 , soc_inst|m0_1|u_logic|Drjwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Krjwx4~0 , soc_inst|m0_1|u_logic|Krjwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Amjwx4 , soc_inst|m0_1|u_logic|Amjwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ark2z4 , soc_inst|m0_1|u_logic|Ark2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A0zvx4~0 , soc_inst|m0_1|u_logic|A0zvx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Hohwx4~0 , soc_inst|m0_1|u_logic|Hohwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~2 , soc_inst|m0_1|u_logic|Fuhwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~1 , soc_inst|m0_1|u_logic|Fuhwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xphwx4~0 , soc_inst|m0_1|u_logic|Xphwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~1 , soc_inst|m0_1|u_logic|Rmhwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~2 , soc_inst|m0_1|u_logic|Rmhwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~0 , soc_inst|m0_1|u_logic|Rmhwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~3 , soc_inst|m0_1|u_logic|Rmhwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~4 , soc_inst|m0_1|u_logic|Rmhwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~5 , soc_inst|m0_1|u_logic|Rmhwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~4 , soc_inst|m0_1|u_logic|Fuhwx4~4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|K0iwx4~0 , soc_inst|m0_1|u_logic|K0iwx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|K0iwx4~1 , soc_inst|m0_1|u_logic|K0iwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~1 , soc_inst|m0_1|u_logic|Fuhwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~2 , soc_inst|m0_1|u_logic|Fuhwx4~2, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~3 , soc_inst|m0_1|u_logic|Fuhwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~4 , soc_inst|m0_1|u_logic|Fuhwx4~4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~5 , soc_inst|m0_1|u_logic|Fuhwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sjhwx4~0 , soc_inst|m0_1|u_logic|Sjhwx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Tghwx4~0 , soc_inst|m0_1|u_logic|Tghwx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Fghwx4 , soc_inst|m0_1|u_logic|Fghwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ahhwx4~0 , soc_inst|m0_1|u_logic|Ahhwx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Ejhwx4 , soc_inst|m0_1|u_logic|Ejhwx4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Ndhwx4~0 , soc_inst|m0_1|u_logic|Ndhwx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Ndhwx4~1 , soc_inst|m0_1|u_logic|Ndhwx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Ndhwx4~2 , soc_inst|m0_1|u_logic|Ndhwx4~2, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Ndhwx4~3 , soc_inst|m0_1|u_logic|Ndhwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sjhwx4~0 , soc_inst|m0_1|u_logic|Sjhwx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Ndhwx4~4 , soc_inst|m0_1|u_logic|Ndhwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xphwx4~0 , soc_inst|m0_1|u_logic|Xphwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~2 , soc_inst|m0_1|u_logic|Rmhwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~0 , soc_inst|m0_1|u_logic|Rmhwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~1 , soc_inst|m0_1|u_logic|Rmhwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~3 , soc_inst|m0_1|u_logic|Rmhwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~4 , soc_inst|m0_1|u_logic|Rmhwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~5 , soc_inst|m0_1|u_logic|Rmhwx4~5, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Ndhwx4 , soc_inst|m0_1|u_logic|Ndhwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE , soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fij2z4 , soc_inst|m0_1|u_logic|Fij2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|B1vvx4~0 , soc_inst|m0_1|u_logic|B1vvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pyqvx4~0 , soc_inst|m0_1|u_logic|Pyqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ocnvx4~0 , soc_inst|m0_1|u_logic|Ocnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ocnvx4~1 , soc_inst|m0_1|u_logic|Ocnvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R1w2z4 , soc_inst|m0_1|u_logic|R1w2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Owgvx4~0 , soc_inst|m0_1|u_logic|Owgvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ywi2z4 , soc_inst|m0_1|u_logic|Ywi2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rqywx4~0 , soc_inst|m0_1|u_logic|Rqywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Abovx4~0 , soc_inst|m0_1|u_logic|Abovx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cdnvx4~0 , soc_inst|m0_1|u_logic|Cdnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L8t2z4 , soc_inst|m0_1|u_logic|L8t2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ivewx4 , soc_inst|m0_1|u_logic|Ivewx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E0fwx4~1 , soc_inst|m0_1|u_logic|E0fwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E0fwx4~0 , soc_inst|m0_1|u_logic|E0fwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E0fwx4~2 , soc_inst|m0_1|u_logic|E0fwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E7fwx4~0 , soc_inst|m0_1|u_logic|E7fwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dwewx4~0 , soc_inst|m0_1|u_logic|Dwewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dwewx4~1 , soc_inst|m0_1|u_logic|Dwewx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bvewx4~0 , soc_inst|m0_1|u_logic|Bvewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Woewx4~0 , soc_inst|m0_1|u_logic|Woewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Woewx4~2 , soc_inst|m0_1|u_logic|Woewx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Woewx4~4 , soc_inst|m0_1|u_logic|Woewx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Woewx4~5 , soc_inst|m0_1|u_logic|Woewx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Woewx4~3 , soc_inst|m0_1|u_logic|Woewx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Woewx4~1 , soc_inst|m0_1|u_logic|Woewx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Woewx4~6 , soc_inst|m0_1|u_logic|Woewx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Woewx4~7 , soc_inst|m0_1|u_logic|Woewx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Woewx4~8 , soc_inst|m0_1|u_logic|Woewx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Woewx4~9 , soc_inst|m0_1|u_logic|Woewx4~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qxhvx4~0 , soc_inst|m0_1|u_logic|Qxhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Emi2z4 , soc_inst|m0_1|u_logic|Emi2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hprot_o~0 , soc_inst|m0_1|u_logic|hprot_o~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Mrsvx4~0 , soc_inst|m0_1|u_logic|Mrsvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C4d2z4~0 , soc_inst|m0_1|u_logic|C4d2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O3d2z4~0 , soc_inst|m0_1|u_logic|O3d2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mrsvx4~1 , soc_inst|m0_1|u_logic|Mrsvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G6d2z4~0 , soc_inst|m0_1|u_logic|G6d2z4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Z5d2z4~0 , soc_inst|m0_1|u_logic|Z5d2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P7d2z4~0 , soc_inst|m0_1|u_logic|P7d2z4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|L5d2z4~0 , soc_inst|m0_1|u_logic|L5d2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P7d2z4~0 , soc_inst|m0_1|u_logic|P7d2z4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|L7fwx4~0 , soc_inst|m0_1|u_logic|L7fwx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Mrsvx4~2 , soc_inst|m0_1|u_logic|Mrsvx4~2, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Aekwx4~0 , soc_inst|m0_1|u_logic|Aekwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G6d2z4~0 , soc_inst|m0_1|u_logic|G6d2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O3d2z4~0 , soc_inst|m0_1|u_logic|O3d2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mrsvx4~1 , soc_inst|m0_1|u_logic|Mrsvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C4d2z4~0 , soc_inst|m0_1|u_logic|C4d2z4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Mrsvx4~3 , soc_inst|m0_1|u_logic|Mrsvx4~3, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Mrsvx4~4 , soc_inst|m0_1|u_logic|Mrsvx4~4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|haddr_o~0 , soc_inst|m0_1|u_logic|haddr_o~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|interconnect_1|LessThan0~0 , soc_inst|interconnect_1|LessThan0~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|interconnect_1|mux_sel[0] , soc_inst|interconnect_1|mux_sel[0], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HREADY~0 , soc_inst|interconnect_1|HREADY~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I6qvx4~0 , soc_inst|m0_1|u_logic|I6qvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nfnvx4~0 , soc_inst|m0_1|u_logic|Nfnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE , soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I0hwx4~1 , soc_inst|m0_1|u_logic|I0hwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kugwx4~0 , soc_inst|m0_1|u_logic|Kugwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~13 , soc_inst|m0_1|u_logic|Bfgwx4~13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I0hwx4~2 , soc_inst|m0_1|u_logic|I0hwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ekgwx4~0 , soc_inst|m0_1|u_logic|Ekgwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~14 , soc_inst|m0_1|u_logic|Bfgwx4~14, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Togwx4~0 , soc_inst|m0_1|u_logic|Togwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Togwx4~1 , soc_inst|m0_1|u_logic|Togwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Togwx4~2 , soc_inst|m0_1|u_logic|Togwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Togwx4~3 , soc_inst|m0_1|u_logic|Togwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~15 , soc_inst|m0_1|u_logic|Bfgwx4~15, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~5 , soc_inst|m0_1|u_logic|Bfgwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~6 , soc_inst|m0_1|u_logic|Bfgwx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~7 , soc_inst|m0_1|u_logic|Bfgwx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~8 , soc_inst|m0_1|u_logic|Bfgwx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~9 , soc_inst|m0_1|u_logic|Bfgwx4~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P0hwx4~3 , soc_inst|m0_1|u_logic|P0hwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~10 , soc_inst|m0_1|u_logic|Bfgwx4~10, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~11 , soc_inst|m0_1|u_logic|Bfgwx4~11, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P0hwx4~2 , soc_inst|m0_1|u_logic|P0hwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~4 , soc_inst|m0_1|u_logic|Bfgwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhgwx4~1 , soc_inst|m0_1|u_logic|Mhgwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hahwx4~0 , soc_inst|m0_1|u_logic|Hahwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Thgwx4~0 , soc_inst|m0_1|u_logic|Thgwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~1 , soc_inst|m0_1|u_logic|Bfgwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~2 , soc_inst|m0_1|u_logic|Bfgwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~3 , soc_inst|m0_1|u_logic|Bfgwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~17 , soc_inst|m0_1|u_logic|Bfgwx4~17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~12 , soc_inst|m0_1|u_logic|Bfgwx4~12, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~16 , soc_inst|m0_1|u_logic|Bfgwx4~16, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zygwx4~0 , soc_inst|m0_1|u_logic|Zygwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tvgwx4~0 , soc_inst|m0_1|u_logic|Tvgwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tvgwx4~1 , soc_inst|m0_1|u_logic|Tvgwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P0hwx4~0 , soc_inst|m0_1|u_logic|P0hwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~0 , soc_inst|m0_1|u_logic|Bfgwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4 , soc_inst|m0_1|u_logic|Bfgwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sgj2z4 , soc_inst|m0_1|u_logic|Sgj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|Equal1~0 , soc_inst|interconnect_1|Equal1~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[1][8] , soc_inst|switches_1|switch_store[1][8], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[24]~31 , soc_inst|interconnect_1|HRDATA[24]~31, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mohvx4~0 , soc_inst|m0_1|u_logic|Mohvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gqw2z4 , soc_inst|m0_1|u_logic|Gqw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V5nvx4~1 , soc_inst|m0_1|u_logic|V5nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V5nvx4~0 , soc_inst|m0_1|u_logic|V5nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V5nvx4~2 , soc_inst|m0_1|u_logic|V5nvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE , soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fkkwx4~0 , soc_inst|m0_1|u_logic|Fkkwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fkkwx4~1 , soc_inst|m0_1|u_logic|Fkkwx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Pikwx4~0 , soc_inst|m0_1|u_logic|Pikwx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Askwx4~1 , soc_inst|m0_1|u_logic|Askwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Askwx4~0 , soc_inst|m0_1|u_logic|Askwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mkkwx4~1 , soc_inst|m0_1|u_logic|Mkkwx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Mkkwx4~2 , soc_inst|m0_1|u_logic|Mkkwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mkkwx4~1 , soc_inst|m0_1|u_logic|Mkkwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lgkwx4~0 , soc_inst|m0_1|u_logic|Lgkwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Unewx4~0 , soc_inst|m0_1|u_logic|Unewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Unewx4 , soc_inst|m0_1|u_logic|Unewx4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~7 , soc_inst|m0_1|u_logic|T6kwx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Askwx4~0 , soc_inst|m0_1|u_logic|Askwx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~8 , soc_inst|m0_1|u_logic|T6kwx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fkkwx4~0 , soc_inst|m0_1|u_logic|Fkkwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fkkwx4~1 , soc_inst|m0_1|u_logic|Fkkwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~0 , soc_inst|m0_1|u_logic|T6kwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q8kwx4~0 , soc_inst|m0_1|u_logic|Q8kwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~4 , soc_inst|m0_1|u_logic|T6kwx4~4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Mkkwx4~0 , soc_inst|m0_1|u_logic|Mkkwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bbkwx4~0 , soc_inst|m0_1|u_logic|Bbkwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~1 , soc_inst|m0_1|u_logic|T6kwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~2 , soc_inst|m0_1|u_logic|T6kwx4~2, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Hekwx4~0 , soc_inst|m0_1|u_logic|Hekwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~2 , soc_inst|m0_1|u_logic|T6kwx4~2, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~3 , soc_inst|m0_1|u_logic|T6kwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q8kwx4~0 , soc_inst|m0_1|u_logic|Q8kwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~4 , soc_inst|m0_1|u_logic|T6kwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bbkwx4~0 , soc_inst|m0_1|u_logic|Bbkwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~1 , soc_inst|m0_1|u_logic|T6kwx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~5 , soc_inst|m0_1|u_logic|T6kwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~0 , soc_inst|m0_1|u_logic|T6kwx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~6 , soc_inst|m0_1|u_logic|T6kwx4~6, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Ruhvx4~0 , soc_inst|m0_1|u_logic|Ruhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nsk2z4 , soc_inst|m0_1|u_logic|Nsk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M9pvx4~0 , soc_inst|m0_1|u_logic|M9pvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xdfwx4 , soc_inst|m0_1|u_logic|Xdfwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Thhvx4~0 , soc_inst|m0_1|u_logic|Thhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Thhvx4~1 , soc_inst|m0_1|u_logic|Thhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Thhvx4~2 , soc_inst|m0_1|u_logic|Thhvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jux2z4 , soc_inst|m0_1|u_logic|Jux2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Msyvx4 , soc_inst|m0_1|u_logic|Msyvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hvhwx4~0 , soc_inst|m0_1|u_logic|Hvhwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ubjwx4~0 , soc_inst|m0_1|u_logic|Ubjwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ubjwx4~1 , soc_inst|m0_1|u_logic|Ubjwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S3jwx4~0 , soc_inst|m0_1|u_logic|S3jwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X2jwx4~0 , soc_inst|m0_1|u_logic|X2jwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ehjwx4~0 , soc_inst|m0_1|u_logic|Ehjwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ofjwx4~0 , soc_inst|m0_1|u_logic|Ofjwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lhjwx4~0 , soc_inst|m0_1|u_logic|Lhjwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ofjwx4~1 , soc_inst|m0_1|u_logic|Ofjwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~6 , soc_inst|m0_1|u_logic|Lwiwx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q2jwx4~0 , soc_inst|m0_1|u_logic|Q2jwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iyiwx4~0 , soc_inst|m0_1|u_logic|Iyiwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iyiwx4~1 , soc_inst|m0_1|u_logic|Iyiwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~0 , soc_inst|m0_1|u_logic|Lwiwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~1 , soc_inst|m0_1|u_logic|Lwiwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eajwx4~0 , soc_inst|m0_1|u_logic|Eajwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q9jwx4~0 , soc_inst|m0_1|u_logic|Q9jwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~2 , soc_inst|m0_1|u_logic|Lwiwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~3 , soc_inst|m0_1|u_logic|Lwiwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~4 , soc_inst|m0_1|u_logic|Lwiwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T7jwx4 , soc_inst|m0_1|u_logic|T7jwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R6jwx4~0 , soc_inst|m0_1|u_logic|R6jwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6fwx4~0 , soc_inst|m0_1|u_logic|Q6fwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6fwx4~1 , soc_inst|m0_1|u_logic|Q6fwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~5 , soc_inst|m0_1|u_logic|Lwiwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pyiwx4~0 , soc_inst|m0_1|u_logic|Pyiwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pyiwx4~1 , soc_inst|m0_1|u_logic|Pyiwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fvhvx4~0 , soc_inst|m0_1|u_logic|Fvhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Npk2z4 , soc_inst|m0_1|u_logic|Npk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y8pvx4~0 , soc_inst|m0_1|u_logic|Y8pvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ipsvx4~0 , soc_inst|m0_1|u_logic|Ipsvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Scpvx4~1 , soc_inst|m0_1|u_logic|Scpvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Scpvx4~2 , soc_inst|m0_1|u_logic|Scpvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wfovx4 , soc_inst|m0_1|u_logic|Wfovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jvqvx4~0 , soc_inst|m0_1|u_logic|Jvqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jnrvx4~0 , soc_inst|m0_1|u_logic|Jnrvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jhy2z4 , soc_inst|m0_1|u_logic|Jhy2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pfovx4~0 , soc_inst|m0_1|u_logic|Pfovx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ynhvx4~0 , soc_inst|m0_1|u_logic|Ynhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Itw2z4 , soc_inst|m0_1|u_logic|Itw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dcsvx4~0 , soc_inst|m0_1|u_logic|Dcsvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H5nvx4~0 , soc_inst|m0_1|u_logic|H5nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H5nvx4~1 , soc_inst|m0_1|u_logic|H5nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dvy2z4 , soc_inst|m0_1|u_logic|Dvy2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G27wx4~0 , soc_inst|m0_1|u_logic|G27wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Blwvx4~0 , soc_inst|m0_1|u_logic|Blwvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4~0 , soc_inst|m0_1|u_logic|Pw6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4~1 , soc_inst|m0_1|u_logic|Pw6wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H3ivx4~2 , soc_inst|m0_1|u_logic|H3ivx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H3ivx4~3 , soc_inst|m0_1|u_logic|H3ivx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ws3wx4~0 , soc_inst|m0_1|u_logic|Ws3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H3ivx4~0 , soc_inst|m0_1|u_logic|H3ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~0 , soc_inst|m0_1|u_logic|Av3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~2 , soc_inst|m0_1|u_logic|Av3wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~3 , soc_inst|m0_1|u_logic|Av3wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~4 , soc_inst|m0_1|u_logic|Av3wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~1 , soc_inst|m0_1|u_logic|Av3wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vac3z4 , soc_inst|m0_1|u_logic|Vac3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~6 , soc_inst|m0_1|u_logic|Av3wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~7 , soc_inst|m0_1|u_logic|Av3wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~8 , soc_inst|m0_1|u_logic|Av3wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~5 , soc_inst|m0_1|u_logic|Av3wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~9 , soc_inst|m0_1|u_logic|Av3wx4~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ny3wx4~3 , soc_inst|m0_1|u_logic|Ny3wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ny3wx4~2 , soc_inst|m0_1|u_logic|Ny3wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ny3wx4~4 , soc_inst|m0_1|u_logic|Ny3wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ny3wx4~5 , soc_inst|m0_1|u_logic|Ny3wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~10 , soc_inst|m0_1|u_logic|Av3wx4~10, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~11 , soc_inst|m0_1|u_logic|Av3wx4~11, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H3ivx4~1 , soc_inst|m0_1|u_logic|H3ivx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H3ivx4~4 , soc_inst|m0_1|u_logic|H3ivx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gji2z4 , soc_inst|m0_1|u_logic|Gji2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lfewx4 , soc_inst|m0_1|u_logic|Lfewx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4~2 , soc_inst|m0_1|u_logic|Pw6wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4~3 , soc_inst|m0_1|u_logic|Pw6wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fcewx4~0 , soc_inst|m0_1|u_logic|Fcewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fcewx4~1 , soc_inst|m0_1|u_logic|Fcewx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sfewx4~0 , soc_inst|m0_1|u_logic|Sfewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sfewx4~1 , soc_inst|m0_1|u_logic|Sfewx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4~4 , soc_inst|m0_1|u_logic|Pw6wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Akewx4~1 , soc_inst|m0_1|u_logic|Akewx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yiewx4~0 , soc_inst|m0_1|u_logic|Yiewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4~5 , soc_inst|m0_1|u_logic|Pw6wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vz6wx4 , soc_inst|m0_1|u_logic|Vz6wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4 , soc_inst|m0_1|u_logic|Pw6wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE , soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pcyvx4 , soc_inst|m0_1|u_logic|Pcyvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Duc2z4~0 , soc_inst|m0_1|u_logic|Duc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y1d2z4~0 , soc_inst|m0_1|u_logic|Y1d2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y1d2z4~1 , soc_inst|m0_1|u_logic|Y1d2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y1d2z4~2 , soc_inst|m0_1|u_logic|Y1d2z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K1wvx4 , soc_inst|m0_1|u_logic|K1wvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|haddr_o~1 , soc_inst|m0_1|u_logic|haddr_o~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|LessThan1~0 , soc_inst|interconnect_1|LessThan1~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0 , soc_inst|interconnect_1|HSEL_SIGNALS[1]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|mux_sel[1] , soc_inst|interconnect_1|mux_sel[1], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HREADY~0 , soc_inst|interconnect_1|HREADY~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cdnvx4~0 , soc_inst|m0_1|u_logic|Cdnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE , soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ivewx4 , soc_inst|m0_1|u_logic|Ivewx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E7fwx4~0 , soc_inst|m0_1|u_logic|E7fwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dwewx4~0 , soc_inst|m0_1|u_logic|Dwewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dwewx4~1 , soc_inst|m0_1|u_logic|Dwewx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bvewx4~0 , soc_inst|m0_1|u_logic|Bvewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Woewx4~0 , soc_inst|m0_1|u_logic|Woewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Woewx4~2 , soc_inst|m0_1|u_logic|Woewx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Woewx4~5 , soc_inst|m0_1|u_logic|Woewx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Woewx4~3 , soc_inst|m0_1|u_logic|Woewx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Woewx4~1 , soc_inst|m0_1|u_logic|Woewx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Woewx4~4 , soc_inst|m0_1|u_logic|Woewx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Woewx4~6 , soc_inst|m0_1|u_logic|Woewx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Woewx4~7 , soc_inst|m0_1|u_logic|Woewx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Woewx4~8 , soc_inst|m0_1|u_logic|Woewx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E0fwx4~0 , soc_inst|m0_1|u_logic|E0fwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E0fwx4~1 , soc_inst|m0_1|u_logic|E0fwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E0fwx4~2 , soc_inst|m0_1|u_logic|E0fwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Woewx4~9 , soc_inst|m0_1|u_logic|Woewx4~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qxhvx4~0 , soc_inst|m0_1|u_logic|Qxhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Emi2z4 , soc_inst|m0_1|u_logic|Emi2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xslwx4~0 , soc_inst|m0_1|u_logic|Xslwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xslwx4~1 , soc_inst|m0_1|u_logic|Xslwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xslwx4~2 , soc_inst|m0_1|u_logic|Xslwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xslwx4~3 , soc_inst|m0_1|u_logic|Xslwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xslwx4~4 , soc_inst|m0_1|u_logic|Xslwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Etlwx4~0 , soc_inst|m0_1|u_logic|Etlwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ushvx4~0 , soc_inst|m0_1|u_logic|Ushvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O5t2z4 , soc_inst|m0_1|u_logic|O5t2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~0 , soc_inst|m0_1|u_logic|Sbiwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~1 , soc_inst|m0_1|u_logic|Sbiwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~2 , soc_inst|m0_1|u_logic|Sbiwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wkiwx4~0 , soc_inst|m0_1|u_logic|Wkiwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wkiwx4~1 , soc_inst|m0_1|u_logic|Wkiwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wkiwx4~2 , soc_inst|m0_1|u_logic|Wkiwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wkiwx4~5 , soc_inst|m0_1|u_logic|Wkiwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wkiwx4~3 , soc_inst|m0_1|u_logic|Wkiwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wkiwx4~4 , soc_inst|m0_1|u_logic|Wkiwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Idiwx4~0 , soc_inst|m0_1|u_logic|Idiwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~3 , soc_inst|m0_1|u_logic|Sbiwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ttiwx4~0 , soc_inst|m0_1|u_logic|Ttiwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ttiwx4~1 , soc_inst|m0_1|u_logic|Ttiwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~4 , soc_inst|m0_1|u_logic|Sbiwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Agiwx4~0 , soc_inst|m0_1|u_logic|Agiwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yeiwx4~0 , soc_inst|m0_1|u_logic|Yeiwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~5 , soc_inst|m0_1|u_logic|Sbiwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~6 , soc_inst|m0_1|u_logic|Sbiwx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mvhvx4 , soc_inst|m0_1|u_logic|Mvhvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aok2z4 , soc_inst|m0_1|u_logic|Aok2z4, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|G97wx4~0 , soc_inst|m0_1|u_logic|G97wx4~0, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Z5pvx4~1 , soc_inst|m0_1|u_logic|Z5pvx4~1, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Q5c2z4~0 , soc_inst|m0_1|u_logic|Q5c2z4~0, de1_soc_wrapper, 1
@@ -5191,142 +4419,230 @@ instance = comp, \soc_inst|m0_1|u_logic|Z5pvx4~2 , soc_inst|m0_1|u_logic|Z5pvx4~
instance = comp, \soc_inst|m0_1|u_logic|Z5pvx4~3 , soc_inst|m0_1|u_logic|Z5pvx4~3, de1_soc_wrapper, 1
instance = comp, \soc_inst|m0_1|u_logic|Z5pvx4~4 , soc_inst|m0_1|u_logic|Z5pvx4~4, de1_soc_wrapper, 1
instance = comp, \running~feeder , running~feeder, de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add1~17 , raz_inst|Add1~17, de1_soc_wrapper, 1
-instance = comp, \raz_inst|H_count[0] , raz_inst|H_count[0], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add1~21 , raz_inst|Add1~21, de1_soc_wrapper, 1
-instance = comp, \raz_inst|H_count[1] , raz_inst|H_count[1], de1_soc_wrapper, 1
+instance = comp, \raz_inst|Add1~37 , raz_inst|Add1~37, de1_soc_wrapper, 1
+instance = comp, \raz_inst|Add0~25 , raz_inst|Add0~25, de1_soc_wrapper, 1
instance = comp, \raz_inst|H_count[0]~DUPLICATE , raz_inst|H_count[0]~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add1~25 , raz_inst|Add1~25, de1_soc_wrapper, 1
+instance = comp, \raz_inst|Add0~29 , raz_inst|Add0~29, de1_soc_wrapper, 1
+instance = comp, \raz_inst|H_count[1] , raz_inst|H_count[1], de1_soc_wrapper, 1
+instance = comp, \raz_inst|Add0~21 , raz_inst|Add0~21, de1_soc_wrapper, 1
instance = comp, \raz_inst|H_count[2] , raz_inst|H_count[2], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add1~37 , raz_inst|Add1~37, de1_soc_wrapper, 1
+instance = comp, \raz_inst|Add0~37 , raz_inst|Add0~37, de1_soc_wrapper, 1
instance = comp, \raz_inst|H_count[3] , raz_inst|H_count[3], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add1~41 , raz_inst|Add1~41, de1_soc_wrapper, 1
+instance = comp, \raz_inst|Add0~41 , raz_inst|Add0~41, de1_soc_wrapper, 1
instance = comp, \raz_inst|H_count[4] , raz_inst|H_count[4], de1_soc_wrapper, 1
-instance = comp, \raz_inst|LessThan1~0 , raz_inst|LessThan1~0, de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add1~29 , raz_inst|Add1~29, de1_soc_wrapper, 1
+instance = comp, \raz_inst|Add0~33 , raz_inst|Add0~33, de1_soc_wrapper, 1
instance = comp, \raz_inst|H_count[5] , raz_inst|H_count[5], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add1~33 , raz_inst|Add1~33, de1_soc_wrapper, 1
+instance = comp, \raz_inst|Add0~17 , raz_inst|Add0~17, de1_soc_wrapper, 1
instance = comp, \raz_inst|H_count[6] , raz_inst|H_count[6], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add1~5 , raz_inst|Add1~5, de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add1~9 , raz_inst|Add1~9, de1_soc_wrapper, 1
+instance = comp, \raz_inst|Add0~5 , raz_inst|Add0~5, de1_soc_wrapper, 1
+instance = comp, \raz_inst|H_count[7] , raz_inst|H_count[7], de1_soc_wrapper, 1
+instance = comp, \raz_inst|Add0~9 , raz_inst|Add0~9, de1_soc_wrapper, 1
instance = comp, \raz_inst|H_count[8] , raz_inst|H_count[8], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add1~13 , raz_inst|Add1~13, de1_soc_wrapper, 1
+instance = comp, \raz_inst|Add0~13 , raz_inst|Add0~13, de1_soc_wrapper, 1
+instance = comp, \raz_inst|Add0~1 , raz_inst|Add0~1, de1_soc_wrapper, 1
+instance = comp, \raz_inst|H_count[10] , raz_inst|H_count[10], de1_soc_wrapper, 1
+instance = comp, \raz_inst|H_count[1]~DUPLICATE , raz_inst|H_count[1]~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \raz_inst|LessThan0~0 , raz_inst|LessThan0~0, de1_soc_wrapper, 1
+instance = comp, \raz_inst|LessThan0~2 , raz_inst|LessThan0~2, de1_soc_wrapper, 1
+instance = comp, \raz_inst|LessThan0~1 , raz_inst|LessThan0~1, de1_soc_wrapper, 1
+instance = comp, \raz_inst|LessThan0~3 , raz_inst|LessThan0~3, de1_soc_wrapper, 1
instance = comp, \raz_inst|H_count[9] , raz_inst|H_count[9], de1_soc_wrapper, 1
-instance = comp, \raz_inst|LessThan1~2 , raz_inst|LessThan1~2, de1_soc_wrapper, 1
instance = comp, \raz_inst|Add1~1 , raz_inst|Add1~1, de1_soc_wrapper, 1
-instance = comp, \raz_inst|H_count[10] , raz_inst|H_count[10], de1_soc_wrapper, 1
-instance = comp, \raz_inst|LessThan1~1 , raz_inst|LessThan1~1, de1_soc_wrapper, 1
-instance = comp, \raz_inst|LessThan1~3 , raz_inst|LessThan1~3, de1_soc_wrapper, 1
-instance = comp, \raz_inst|H_count[7] , raz_inst|H_count[7], de1_soc_wrapper, 1
-instance = comp, \raz_inst|LessThan9~0 , raz_inst|LessThan9~0, de1_soc_wrapper, 1
-instance = comp, \raz_inst|video_on_H , raz_inst|video_on_H, de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add2~37 , raz_inst|Add2~37, de1_soc_wrapper, 1
-instance = comp, \raz_inst|Equal2~1 , raz_inst|Equal2~1, de1_soc_wrapper, 1
-instance = comp, \raz_inst|Equal2~0 , raz_inst|Equal2~0, de1_soc_wrapper, 1
-instance = comp, \raz_inst|Equal2~2 , raz_inst|Equal2~2, de1_soc_wrapper, 1
+instance = comp, \raz_inst|Add1~9 , raz_inst|Add1~9, de1_soc_wrapper, 1
+instance = comp, \raz_inst|Equal0~3 , raz_inst|Equal0~3, de1_soc_wrapper, 1
+instance = comp, \raz_inst|Equal0~1 , raz_inst|Equal0~1, de1_soc_wrapper, 1
+instance = comp, \raz_inst|Equal0~0 , raz_inst|Equal0~0, de1_soc_wrapper, 1
+instance = comp, \raz_inst|Equal0~4 , raz_inst|Equal0~4, de1_soc_wrapper, 1
+instance = comp, \raz_inst|V_count[7] , raz_inst|V_count[7], de1_soc_wrapper, 1
+instance = comp, \raz_inst|Add1~13 , raz_inst|Add1~13, de1_soc_wrapper, 1
+instance = comp, \raz_inst|V_count[8] , raz_inst|V_count[8], de1_soc_wrapper, 1
+instance = comp, \raz_inst|Add1~17 , raz_inst|Add1~17, de1_soc_wrapper, 1
+instance = comp, \raz_inst|V_count[9] , raz_inst|V_count[9], de1_soc_wrapper, 1
+instance = comp, \raz_inst|Add1~21 , raz_inst|Add1~21, de1_soc_wrapper, 1
+instance = comp, \raz_inst|V_count[10] , raz_inst|V_count[10], de1_soc_wrapper, 1
+instance = comp, \raz_inst|always0~2 , raz_inst|always0~2, de1_soc_wrapper, 1
+instance = comp, \raz_inst|always0~3 , raz_inst|always0~3, de1_soc_wrapper, 1
+instance = comp, \raz_inst|always0~4 , raz_inst|always0~4, de1_soc_wrapper, 1
+instance = comp, \raz_inst|LessThan4~1 , raz_inst|LessThan4~1, de1_soc_wrapper, 1
+instance = comp, \raz_inst|H_count~1 , raz_inst|H_count~1, de1_soc_wrapper, 1
+instance = comp, \raz_inst|H_count~0 , raz_inst|H_count~0, de1_soc_wrapper, 1
+instance = comp, \raz_inst|always0~13 , raz_inst|always0~13, de1_soc_wrapper, 1
+instance = comp, \raz_inst|always0~14 , raz_inst|always0~14, de1_soc_wrapper, 1
instance = comp, \raz_inst|V_count[0] , raz_inst|V_count[0], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add2~41 , raz_inst|Add2~41, de1_soc_wrapper, 1
+instance = comp, \raz_inst|Add1~41 , raz_inst|Add1~41, de1_soc_wrapper, 1
instance = comp, \raz_inst|V_count[1] , raz_inst|V_count[1], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add2~29 , raz_inst|Add2~29, de1_soc_wrapper, 1
+instance = comp, \raz_inst|Add1~25 , raz_inst|Add1~25, de1_soc_wrapper, 1
instance = comp, \raz_inst|V_count[2] , raz_inst|V_count[2], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add2~33 , raz_inst|Add2~33, de1_soc_wrapper, 1
+instance = comp, \raz_inst|Add1~29 , raz_inst|Add1~29, de1_soc_wrapper, 1
instance = comp, \raz_inst|V_count[3] , raz_inst|V_count[3], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add2~25 , raz_inst|Add2~25, de1_soc_wrapper, 1
+instance = comp, \raz_inst|Add1~33 , raz_inst|Add1~33, de1_soc_wrapper, 1
instance = comp, \raz_inst|V_count[4] , raz_inst|V_count[4], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add2~13 , raz_inst|Add2~13, de1_soc_wrapper, 1
+instance = comp, \raz_inst|Add1~5 , raz_inst|Add1~5, de1_soc_wrapper, 1
instance = comp, \raz_inst|V_count[5] , raz_inst|V_count[5], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add2~9 , raz_inst|Add2~9, de1_soc_wrapper, 1
instance = comp, \raz_inst|V_count[6] , raz_inst|V_count[6], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add2~1 , raz_inst|Add2~1, de1_soc_wrapper, 1
-instance = comp, \raz_inst|V_count[7] , raz_inst|V_count[7], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add2~5 , raz_inst|Add2~5, de1_soc_wrapper, 1
-instance = comp, \raz_inst|V_count[8] , raz_inst|V_count[8], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add2~17 , raz_inst|Add2~17, de1_soc_wrapper, 1
-instance = comp, \raz_inst|V_count[9] , raz_inst|V_count[9], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add2~21 , raz_inst|Add2~21, de1_soc_wrapper, 1
-instance = comp, \raz_inst|V_count[10] , raz_inst|V_count[10], de1_soc_wrapper, 1
-instance = comp, \raz_inst|always1~1 , raz_inst|always1~1, de1_soc_wrapper, 1
-instance = comp, \raz_inst|always1~2 , raz_inst|always1~2, de1_soc_wrapper, 1
-instance = comp, \raz_inst|always1~3 , raz_inst|always1~3, de1_soc_wrapper, 1
-instance = comp, \raz_inst|H_count~1 , raz_inst|H_count~1, de1_soc_wrapper, 1
-instance = comp, \raz_inst|LessThan5~0 , raz_inst|LessThan5~0, de1_soc_wrapper, 1
-instance = comp, \raz_inst|H_count~0 , raz_inst|H_count~0, de1_soc_wrapper, 1
-instance = comp, \raz_inst|always1~0 , raz_inst|always1~0, de1_soc_wrapper, 1
-instance = comp, \raz_inst|always1~4 , raz_inst|always1~4, de1_soc_wrapper, 1
-instance = comp, \raz_inst|LessThan10~0 , raz_inst|LessThan10~0, de1_soc_wrapper, 1
-instance = comp, \raz_inst|LessThan10~1 , raz_inst|LessThan10~1, de1_soc_wrapper, 1
-instance = comp, \raz_inst|LessThan10~2 , raz_inst|LessThan10~2, de1_soc_wrapper, 1
-instance = comp, \raz_inst|video_on_V~0 , raz_inst|video_on_V~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add1~25 , soc_inst|pix1|Add1~25, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add1~29 , soc_inst|pix1|Add1~29, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add1~33 , soc_inst|pix1|Add1~33, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add1~37 , soc_inst|pix1|Add1~37, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add1~41 , soc_inst|pix1|Add1~41, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add1~45 , soc_inst|pix1|Add1~45, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add1~17 , soc_inst|pix1|Add1~17, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add1~21 , soc_inst|pix1|Add1~21, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add1~13 , soc_inst|pix1|Add1~13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2] , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|always0~0 , soc_inst|pix1|always0~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|word_address[15] , soc_inst|pix1|word_address[15], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|word_address[13] , soc_inst|pix1|word_address[13], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|write_enable , soc_inst|pix1|write_enable, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|word_address[16] , soc_inst|pix1|word_address[16], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|word_address[17] , soc_inst|pix1|word_address[17], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|word_address[18] , soc_inst|pix1|word_address[18], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|word_address[14] , soc_inst|pix1|word_address[14], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|word_address[0] , soc_inst|pix1|word_address[0], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|word_address[1] , soc_inst|pix1|word_address[1], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|word_address[2] , soc_inst|pix1|word_address[2], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|word_address[3] , soc_inst|pix1|word_address[3], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|word_address[4] , soc_inst|pix1|word_address[4], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|word_address[5] , soc_inst|pix1|word_address[5], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|word_address[6] , soc_inst|pix1|word_address[6], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|word_address[7] , soc_inst|pix1|word_address[7], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|word_address[8] , soc_inst|pix1|word_address[8], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|word_address[9] , soc_inst|pix1|word_address[9], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|word_address[10] , soc_inst|pix1|word_address[10], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|word_address[11] , soc_inst|pix1|word_address[11], de1_soc_wrapper, 1
+instance = comp, \raz_inst|H_count[0] , raz_inst|H_count[0], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0] , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|word_address[12] , soc_inst|pix1|word_address[12], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1] , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0, de1_soc_wrapper, 1
+instance = comp, \raz_inst|Red~0 , raz_inst|Red~0, de1_soc_wrapper, 1
+instance = comp, \raz_inst|always0~0 , raz_inst|always0~0, de1_soc_wrapper, 1
+instance = comp, \raz_inst|LessThan4~0 , raz_inst|LessThan4~0, de1_soc_wrapper, 1
+instance = comp, \raz_inst|always0~1 , raz_inst|always0~1, de1_soc_wrapper, 1
+instance = comp, \raz_inst|LessThan8~2 , raz_inst|LessThan8~2, de1_soc_wrapper, 1
+instance = comp, \raz_inst|LessThan8~3 , raz_inst|LessThan8~3, de1_soc_wrapper, 1
+instance = comp, \raz_inst|Equal0~2 , raz_inst|Equal0~2, de1_soc_wrapper, 1
+instance = comp, \raz_inst|LessThan8~1 , raz_inst|LessThan8~1, de1_soc_wrapper, 1
+instance = comp, \raz_inst|LessThan8~0 , raz_inst|LessThan8~0, de1_soc_wrapper, 1
+instance = comp, \raz_inst|LessThan8~4 , raz_inst|LessThan8~4, de1_soc_wrapper, 1
instance = comp, \raz_inst|video_on_V , raz_inst|video_on_V, de1_soc_wrapper, 1
+instance = comp, \raz_inst|LessThan7~0 , raz_inst|LessThan7~0, de1_soc_wrapper, 1
+instance = comp, \raz_inst|video_on_H , raz_inst|video_on_H, de1_soc_wrapper, 1
instance = comp, \raz_inst|VGA_BLANK_N , raz_inst|VGA_BLANK_N, de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add0~25 , raz_inst|Add0~25, de1_soc_wrapper, 1
-instance = comp, \raz_inst|LessThan0~0 , raz_inst|LessThan0~0, de1_soc_wrapper, 1
-instance = comp, \raz_inst|pixel_x[0] , raz_inst|pixel_x[0], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add0~17 , raz_inst|Add0~17, de1_soc_wrapper, 1
-instance = comp, \raz_inst|pixel_x[1] , raz_inst|pixel_x[1], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add0~21 , raz_inst|Add0~21, de1_soc_wrapper, 1
-instance = comp, \raz_inst|pixel_x[2] , raz_inst|pixel_x[2], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add0~13 , raz_inst|Add0~13, de1_soc_wrapper, 1
-instance = comp, \raz_inst|pixel_x[3] , raz_inst|pixel_x[3], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add0~5 , raz_inst|Add0~5, de1_soc_wrapper, 1
-instance = comp, \raz_inst|pixel_x[4] , raz_inst|pixel_x[4], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add0~9 , raz_inst|Add0~9, de1_soc_wrapper, 1
-instance = comp, \raz_inst|pixel_x[5] , raz_inst|pixel_x[5], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add0~1 , raz_inst|Add0~1, de1_soc_wrapper, 1
-instance = comp, \raz_inst|pixel_x[6] , raz_inst|pixel_x[6], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add0~33 , raz_inst|Add0~33, de1_soc_wrapper, 1
-instance = comp, \raz_inst|pixel_x[7] , raz_inst|pixel_x[7], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add0~37 , raz_inst|Add0~37, de1_soc_wrapper, 1
-instance = comp, \raz_inst|pixel_x[8] , raz_inst|pixel_x[8], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add0~29 , raz_inst|Add0~29, de1_soc_wrapper, 1
-instance = comp, \raz_inst|pixel_x[9] , raz_inst|pixel_x[9], de1_soc_wrapper, 1
-instance = comp, \raz_inst|red_square~11 , raz_inst|red_square~11, de1_soc_wrapper, 1
-instance = comp, \raz_inst|red_square~12 , raz_inst|red_square~12, de1_soc_wrapper, 1
-instance = comp, \raz_inst|red_square~0 , raz_inst|red_square~0, de1_soc_wrapper, 1
-instance = comp, \raz_inst|H_count[3]~DUPLICATE , raz_inst|H_count[3]~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \raz_inst|red_square~1 , raz_inst|red_square~1, de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add3~25 , raz_inst|Add3~25, de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add3~13 , raz_inst|Add3~13, de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add3~17 , raz_inst|Add3~17, de1_soc_wrapper, 1
-instance = comp, \raz_inst|pixel_y[5] , raz_inst|pixel_y[5], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add3~9 , raz_inst|Add3~9, de1_soc_wrapper, 1
-instance = comp, \raz_inst|pixel_y[6] , raz_inst|pixel_y[6], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add3~1 , raz_inst|Add3~1, de1_soc_wrapper, 1
-instance = comp, \raz_inst|pixel_y[7] , raz_inst|pixel_y[7], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add3~5 , raz_inst|Add3~5, de1_soc_wrapper, 1
-instance = comp, \raz_inst|pixel_y[8] , raz_inst|pixel_y[8], de1_soc_wrapper, 1
-instance = comp, \raz_inst|LessThan6~0 , raz_inst|LessThan6~0, de1_soc_wrapper, 1
-instance = comp, \raz_inst|pixel_y[0] , raz_inst|pixel_y[0], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add3~29 , raz_inst|Add3~29, de1_soc_wrapper, 1
-instance = comp, \raz_inst|pixel_y[1] , raz_inst|pixel_y[1], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add3~33 , raz_inst|Add3~33, de1_soc_wrapper, 1
-instance = comp, \raz_inst|pixel_y[2] , raz_inst|pixel_y[2], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add3~21 , raz_inst|Add3~21, de1_soc_wrapper, 1
-instance = comp, \raz_inst|pixel_y[3] , raz_inst|pixel_y[3], de1_soc_wrapper, 1
-instance = comp, \raz_inst|pixel_y[4] , raz_inst|pixel_y[4], de1_soc_wrapper, 1
-instance = comp, \raz_inst|pixel_y[5]~DUPLICATE , raz_inst|pixel_y[5]~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \raz_inst|red_square~3 , raz_inst|red_square~3, de1_soc_wrapper, 1
-instance = comp, \raz_inst|red_square~5 , raz_inst|red_square~5, de1_soc_wrapper, 1
-instance = comp, \raz_inst|red_square~4 , raz_inst|red_square~4, de1_soc_wrapper, 1
-instance = comp, \raz_inst|red_square~6 , raz_inst|red_square~6, de1_soc_wrapper, 1
-instance = comp, \raz_inst|red_square~7 , raz_inst|red_square~7, de1_soc_wrapper, 1
-instance = comp, \raz_inst|red_square~2 , raz_inst|red_square~2, de1_soc_wrapper, 1
-instance = comp, \raz_inst|red_square~8 , raz_inst|red_square~8, de1_soc_wrapper, 1
-instance = comp, \raz_inst|red_square~9 , raz_inst|red_square~9, de1_soc_wrapper, 1
-instance = comp, \raz_inst|red_square~10 , raz_inst|red_square~10, de1_soc_wrapper, 1
-instance = comp, \raz_inst|red_square~13 , raz_inst|red_square~13, de1_soc_wrapper, 1
-instance = comp, \raz_inst|red_square , raz_inst|red_square, de1_soc_wrapper, 1
-instance = comp, \raz_inst|Red , raz_inst|Red, de1_soc_wrapper, 1
-instance = comp, \raz_inst|always1~6 , raz_inst|always1~6, de1_soc_wrapper, 1
-instance = comp, \raz_inst|always1~5 , raz_inst|always1~5, de1_soc_wrapper, 1
-instance = comp, \raz_inst|always1~7 , raz_inst|always1~7, de1_soc_wrapper, 1
-instance = comp, \raz_inst|VGA_VS~0 , raz_inst|VGA_VS~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0]~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2]~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add1~9 , soc_inst|pix1|Add1~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3] , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2799w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2799w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add1~5 , soc_inst|pix1|Add1~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[4] , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[4], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add1~1 , soc_inst|pix1|Add1~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[5] , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[5], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3]~DUPLICATE , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3]~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \raz_inst|Red~1 , raz_inst|Red~1, de1_soc_wrapper, 1
+instance = comp, \raz_inst|always0~6 , raz_inst|always0~6, de1_soc_wrapper, 1
+instance = comp, \raz_inst|always0~5 , raz_inst|always0~5, de1_soc_wrapper, 1
+instance = comp, \raz_inst|always0~7 , raz_inst|always0~7, de1_soc_wrapper, 1
+instance = comp, \raz_inst|VGA_HS~0 , raz_inst|VGA_HS~0, de1_soc_wrapper, 1
instance = comp, \raz_inst|VGA_HS , raz_inst|VGA_HS, de1_soc_wrapper, 1
-instance = comp, \raz_inst|always1~8 , raz_inst|always1~8, de1_soc_wrapper, 1
-instance = comp, \raz_inst|always1~9 , raz_inst|always1~9, de1_soc_wrapper, 1
-instance = comp, \raz_inst|always1~10 , raz_inst|always1~10, de1_soc_wrapper, 1
-instance = comp, \raz_inst|always1~11 , raz_inst|always1~11, de1_soc_wrapper, 1
-instance = comp, \raz_inst|always1~12 , raz_inst|always1~12, de1_soc_wrapper, 1
+instance = comp, \raz_inst|always0~9 , raz_inst|always0~9, de1_soc_wrapper, 1
+instance = comp, \raz_inst|always0~10 , raz_inst|always0~10, de1_soc_wrapper, 1
+instance = comp, \raz_inst|always0~8 , raz_inst|always0~8, de1_soc_wrapper, 1
+instance = comp, \raz_inst|always0~11 , raz_inst|always0~11, de1_soc_wrapper, 1
+instance = comp, \raz_inst|always0~12 , raz_inst|always0~12, de1_soc_wrapper, 1
instance = comp, \raz_inst|VGA_VS , raz_inst|VGA_VS, de1_soc_wrapper, 1
instance = comp, \KEY[3]~input , KEY[3]~input, de1_soc_wrapper, 1
instance = comp, \~QUARTUS_CREATED_GND~I , ~QUARTUS_CREATED_GND~I, de1_soc_wrapper, 1