diff --git a/behavioural/de0_wrapper.sv b/behavioural/de0_wrapper.sv
deleted file mode 100644
index 2130b9cb10aa8d488fd411f363c9e8ab3726ba72..0000000000000000000000000000000000000000
--- a/behavioural/de0_wrapper.sv
+++ /dev/null
@@ -1,87 +0,0 @@
-// Example code for an M0 AHBLite System
-//  Iain McNally
-//  ECS, University of Soutampton
-//
-// This module is a wrapper allowing the system to be used on the DE0 FPGA board
-//
-
-module de0_wrapper(
-
-  input CLOCK_50,
-  
-  input [9:0] SW, 
-  input [2:0] KEY, // de0 keys are active low
-
-  output [9:0] LEDG,
-  output [7:0] HEX0,
-  output [7:0] HEX1,
-  output [7:0] HEX2,
-  output [7:0] HEX3
-
-);
-
-timeunit 1ns;
-timeprecision 100ps;
-
-  localparam heartbeat_count_msb = 25; 
-  
-  
-  wire HCLK, HRESETn, LOCKUP, DataValid;
-  wire [1:0] Buttons;
-  wire [15:0] Switches;
-
-  assign Switches = { 6'd0, SW }; // DE0 has just 10 switches
-  
-  assign Buttons = ~KEY[1:0];
- 
-  arm_soc soc_inst(.HCLK, .HRESETn, .DataOut(LEDG), .DataValid, .Switches, .Buttons, .LOCKUP);
-
-  assign DataInvalid = ! DataValid;
-
-  // Drive HRESETn directly from active low CPU KEY[2] button
-  assign HRESETn = KEY[2];
-
-  // Drive HCLK from 50MHz de0 board clock
-  assign HCLK = CLOCK_50;
-
-
-
-  // This code gives us a heartbeat signal on the least significant
-  //  decimal point of the seven segment display
-  //
-  logic running, heartbeat;
-  logic [heartbeat_count_msb:0] tick_count;
-  always_ff @(posedge CLOCK_50, negedge HRESETn )
-    if ( ! HRESETn )
-      begin
-        running <= 0;
-        heartbeat <= 0;
-        tick_count <= 0;
-      end
-    else
-      begin
-        running <= 1;
-        heartbeat = tick_count[heartbeat_count_msb] && tick_count[heartbeat_count_msb-2];
-        tick_count <= tick_count + 1;
-      end
-
-  // seven segment display to indicate system status
-  assign HEX0 = ~{heartbeat, 1'b0,
-                  !DataValid&&!LOCKUP,
-                  !DataValid&&!LOCKUP,
-                  !DataValid&&!LOCKUP,
-                   !LOCKUP,
-                   !LOCKUP,
-                  !DataValid&&!LOCKUP };
-
-  // HEX1 is off
-  assign HEX1 = ~{8'b0000_0000 };
-
-  // running shows as r on HEX2
-  assign HEX2 = ~{2'b00,running,1'b0,running, 4'b000 };
-
-  // LOCKUP shows as L on HEX3
-  assign HEX3 = ~{2'b00,LOCKUP,LOCKUP,LOCKUP, 3'b000 };
-
-
-endmodule
diff --git a/behavioural/de2_wrapper.sv b/behavioural/de2_wrapper.sv
deleted file mode 100644
index d6dd7f6f3646d0d56571b27ff7b053fd4542fe7e..0000000000000000000000000000000000000000
--- a/behavioural/de2_wrapper.sv
+++ /dev/null
@@ -1,85 +0,0 @@
-// Example code for an M0 AHBLite System
-//  Iain McNally
-//  ECS, University of Soutampton
-//
-// This module is a wrapper allowing the system to be used on the DE1-SoC FPGA board
-//
-
-module de2_wrapper(
-
-  input CLOCK_50,
-  
-  input [15:0] SW, 
-  input [2:0] KEY, // DE2 keys are active low
-
-  output [15:0] LEDR,
-  output [6:0] HEX0,
-  output [6:0] HEX1,
-  output [6:0] HEX2,
-  output [6:0] HEX3
-
-);
-
-timeunit 1ns;
-timeprecision 100ps;
-
-  localparam heartbeat_count_msb = 25; 
-  
-  
-  wire HCLK, HRESETn, LOCKUP, DataValid;
-  wire [1:0] Buttons;
-  wire [15:0] Switches;
-
-  assign Switches = SW; // DE2 has nore than 16 switches
-  
-  assign Buttons = ~KEY[1:0];
- 
-  arm_soc soc_inst(.HCLK, .HRESETn, .DataOut(LEDR), .DataValid, .Switches, .Buttons, .LOCKUP);
-
-  // Drive HRESETn directly from active low CPU KEY[2] button
-  assign HRESETn = KEY[2];
-
-  // Drive HCLK from 50MHz de0 board clock
-  assign HCLK = CLOCK_50;
-
-
-
-  // This code gives us a heartbeat signal
-  //
-  logic running, heartbeat;
-  logic [heartbeat_count_msb:0] tick_count;
-  always_ff @(posedge CLOCK_50, negedge HRESETn )
-    if ( ! HRESETn )
-      begin
-        running <= 0;
-        heartbeat <= 0;
-        tick_count <= 0;
-      end
-    else
-      begin
-        running <= 1;
-        heartbeat = tick_count[heartbeat_count_msb] && tick_count[heartbeat_count_msb-2];
-        tick_count <= tick_count + 1;
-      end
-
-  // seven segment display to indicate system status
-
-  // HEX0 is heartbeat
-  assign HEX0 = (heartbeat) ? 7'b0100011 : '1;
-
-  // HEX1 is DataValid
-  assign HEX1 = ~{!DataValid&&!LOCKUP,
-                  !DataValid&&!LOCKUP,
-                  !DataValid&&!LOCKUP,
-                   !LOCKUP,
-                   !LOCKUP,
-                  !DataValid&&!LOCKUP };
-
-  // running shows as r on HEX2
-  assign HEX2 = ~{1'b0,running,1'b0,running, 4'b000 };
-
-  // LOCKUP shows as L on HEX3
-  assign HEX3 = ~{1'b0,LOCKUP,LOCKUP,LOCKUP, 3'b000 };
-
-
-endmodule
diff --git a/behavioural/nexys4_wrapper.sv b/behavioural/nexys4_wrapper.sv
deleted file mode 100644
index e9f4f76003b19d3aae946d35cbf928a748ee36a4..0000000000000000000000000000000000000000
--- a/behavioural/nexys4_wrapper.sv
+++ /dev/null
@@ -1,79 +0,0 @@
-// Example code for an M0 AHBLite System
-//  Iain McNally
-//  ECS, University of Soutampton
-//
-// This module is a wrapper allowing the system to be used on the Nexsys 4 FPGA board
-//
-
-module nexys4_wrapper(
-
-  input Clock, nReset,
-  
-  input [15:0] Switches, 
-  input [1:0] Buttons, // nexys4 buttons are active high
-
-  output [15:0] DataOut,
-  output DataValid, DataInvalid,
-  output Status_Green, Status_Red
-
-);
-
-timeunit 1ns;
-timeprecision 100ps;
-
-  localparam heartbeat_count_msb = 26; 
-  localparam heartbeat_dimmer_msb = 5; 
-  
-  
-  wire HCLK, HRESETn, LOCKUP;
- 
-  arm_soc soc_inst(.HCLK, .HRESETn, .DataOut, .DataValid, .Switches, .Buttons, .LOCKUP);
-
-  assign DataInvalid = ! DataValid;
-
-  // Drive HRESETn directly from active low CPU RESET button
-  assign HRESETn = nReset;
-
-  // Drive HCLK from 50MHz signal derived from 100MHz Nexys4 board clock
-  logic Clock50;
-  always_ff @(posedge Clock, negedge nReset )
-    if ( ! nReset )
-      Clock50 <= 0;
-    else
-      Clock50 <= ! Clock50;
-
-  assign HCLK = Clock50;
-
-
-
-  // This code gives us a heartbeat signal on the RGB LED
-  //
-  // The LED is:
-  //      steady orange - at reset,
-  //      steady red    - in the event of ARM M0 "lockup" and
-  //      pulsing green - under normal operation
-  //
-  logic running, heartbeat;
-  logic [heartbeat_count_msb:0] tick_count;
-  always_ff @(posedge Clock, negedge nReset )
-    if ( ! nReset )
-      begin
-        running <= 0;
-        heartbeat <= 0;
-        tick_count <= 0;
-      end
-    else
-      begin
-        running <= 1;
-        heartbeat = tick_count[heartbeat_count_msb] && tick_count[heartbeat_count_msb-2] && (&tick_count[heartbeat_dimmer_msb:0]);
-        tick_count <= tick_count + 1;
-      end
-
-  // Single LED with two colours to indicate system status
-  assign Status_Green = !running || ( heartbeat && !LOCKUP );
-  assign Status_Red   = !running || LOCKUP;
-
-
-
-
-endmodule