diff --git a/common.cmake b/common.cmake
index e21a533958c33bd94b509d7e0715ae177c3b1480..ef8bf4ecd229836986a4989cead614312b621f02 100644
--- a/common.cmake
+++ b/common.cmake
@@ -19,7 +19,7 @@ add_compile_options(
# Linker scripts
set(CMAKE_EXE_LINKER_FLAGS
- "${CMAKE_EXE_LINKER_FLAGS} -T $ENV{MSP_GCC_ROOT}/include/msp430fr5994.ld ")
+ "${CMAKE_EXE_LINKER_FLAGS} -T ${CMAKE_SOURCE_DIR}/../msp430fr5994.ld ")
# Add to search path for linker scripts (xx_symbols.ld, included by main linker script)
link_directories(
diff --git a/msp430fr5994.ld b/msp430fr5994.ld
new file mode 100644
index 0000000000000000000000000000000000000000..43480871a6d246dfada08656a0eaf9e5ad34d429
--- /dev/null
+++ b/msp430fr5994.ld
@@ -0,0 +1,554 @@
+/* ============================================================================ */
+/* Copyright (c) 2015, Texas Instruments Incorporated */
+/* All rights reserved. */
+/* */
+/* Redistribution and use in source and binary forms, with or without */
+/* modification, are permitted provided that the following conditions */
+/* are met: */
+/* */
+/* * Redistributions of source code must retain the above copyright */
+/* notice, this list of conditions and the following disclaimer. */
+/* */
+/* * Redistributions in binary form must reproduce the above copyright */
+/* notice, this list of conditions and the following disclaimer in the */
+/* documentation and/or other materials provided with the distribution. */
+/* */
+/* * Neither the name of Texas Instruments Incorporated nor the names of */
+/* its contributors may be used to endorse or promote products derived */
+/* from this software without specific prior written permission. */
+/* */
+/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
+/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */
+/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */
+/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */
+/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */
+/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */
+/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
+/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */
+/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */
+/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
+/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
+/* ============================================================================ */
+
+/* This file supports MSP430FR5994 devices. */
+/* Default linker script, for normal executables */
+
+/* 1.206 */
+
+OUTPUT_ARCH(msp430)
+ENTRY(_start)
+
+__stack_size = 0x200;
+__boot_stack_size = 0x80;
+
+MEMORY {
+ TINYRAM : ORIGIN = 0xA, LENGTH = 0x0016
+ BSL : ORIGIN = 0x1000, LENGTH = 0x0800
+ RAM : ORIGIN = 0x1C00, LENGTH = 0x1000
+ LEARAM : ORIGIN = 0x2C00, LENGTH = 0x0EC8
+ LEASTACK : ORIGIN = 0x3AC8, LENGTH = 0x0138
+ INFOMEM : ORIGIN = 0x1800, LENGTH = 0x0200
+ INFOD : ORIGIN = 0x1800, LENGTH = 0x0080
+ INFOC : ORIGIN = 0x1880, LENGTH = 0x0080
+ INFOB : ORIGIN = 0x1900, LENGTH = 0x0080
+ INFOA : ORIGIN = 0x1980, LENGTH = 0x0080
+ FRAM (rxw) : ORIGIN = 0x4000, LENGTH = 0xBF80 /* END=0xFF7F, size 49024 */
+ FRAM2 (rxw) : ORIGIN = 0x00010000, LENGTH = 0x00033FFF
+ JTAGSIGNATURE : ORIGIN = 0xFF80, LENGTH = 0x0004
+ BSLSIGNATURE : ORIGIN = 0xFF84, LENGTH = 0x0004
+ IPESIGNATURE : ORIGIN = 0xFF88, LENGTH = 0x0008
+ VECT0 : ORIGIN = 0xFF90, LENGTH = 0x0002
+ VECT1 : ORIGIN = 0xFF92, LENGTH = 0x0002
+ VECT2 : ORIGIN = 0xFF94, LENGTH = 0x0002
+ VECT3 : ORIGIN = 0xFF96, LENGTH = 0x0002
+ VECT4 : ORIGIN = 0xFF98, LENGTH = 0x0002
+ VECT5 : ORIGIN = 0xFF9A, LENGTH = 0x0002
+ VECT6 : ORIGIN = 0xFF9C, LENGTH = 0x0002
+ VECT7 : ORIGIN = 0xFF9E, LENGTH = 0x0002
+ VECT8 : ORIGIN = 0xFFA0, LENGTH = 0x0002
+ VECT9 : ORIGIN = 0xFFA2, LENGTH = 0x0002
+ VECT10 : ORIGIN = 0xFFA4, LENGTH = 0x0002
+ VECT11 : ORIGIN = 0xFFA6, LENGTH = 0x0002
+ VECT12 : ORIGIN = 0xFFA8, LENGTH = 0x0002
+ VECT13 : ORIGIN = 0xFFAA, LENGTH = 0x0002
+ VECT14 : ORIGIN = 0xFFAC, LENGTH = 0x0002
+ VECT15 : ORIGIN = 0xFFAE, LENGTH = 0x0002
+ VECT16 : ORIGIN = 0xFFB0, LENGTH = 0x0002
+ VECT17 : ORIGIN = 0xFFB2, LENGTH = 0x0002
+ VECT18 : ORIGIN = 0xFFB4, LENGTH = 0x0002
+ VECT19 : ORIGIN = 0xFFB6, LENGTH = 0x0002
+ VECT20 : ORIGIN = 0xFFB8, LENGTH = 0x0002
+ VECT21 : ORIGIN = 0xFFBA, LENGTH = 0x0002
+ VECT22 : ORIGIN = 0xFFBC, LENGTH = 0x0002
+ VECT23 : ORIGIN = 0xFFBE, LENGTH = 0x0002
+ VECT24 : ORIGIN = 0xFFC0, LENGTH = 0x0002
+ VECT25 : ORIGIN = 0xFFC2, LENGTH = 0x0002
+ VECT26 : ORIGIN = 0xFFC4, LENGTH = 0x0002
+ VECT27 : ORIGIN = 0xFFC6, LENGTH = 0x0002
+ VECT28 : ORIGIN = 0xFFC8, LENGTH = 0x0002
+ VECT29 : ORIGIN = 0xFFCA, LENGTH = 0x0002
+ VECT30 : ORIGIN = 0xFFCC, LENGTH = 0x0002
+ VECT31 : ORIGIN = 0xFFCE, LENGTH = 0x0002
+ VECT32 : ORIGIN = 0xFFD0, LENGTH = 0x0002
+ VECT33 : ORIGIN = 0xFFD2, LENGTH = 0x0002
+ VECT34 : ORIGIN = 0xFFD4, LENGTH = 0x0002
+ VECT35 : ORIGIN = 0xFFD6, LENGTH = 0x0002
+ VECT36 : ORIGIN = 0xFFD8, LENGTH = 0x0002
+ VECT37 : ORIGIN = 0xFFDA, LENGTH = 0x0002
+ VECT38 : ORIGIN = 0xFFDC, LENGTH = 0x0002
+ VECT39 : ORIGIN = 0xFFDE, LENGTH = 0x0002
+ VECT40 : ORIGIN = 0xFFE0, LENGTH = 0x0002
+ VECT41 : ORIGIN = 0xFFE2, LENGTH = 0x0002
+ VECT42 : ORIGIN = 0xFFE4, LENGTH = 0x0002
+ VECT43 : ORIGIN = 0xFFE6, LENGTH = 0x0002
+ VECT44 : ORIGIN = 0xFFE8, LENGTH = 0x0002
+ VECT45 : ORIGIN = 0xFFEA, LENGTH = 0x0002
+ VECT46 : ORIGIN = 0xFFEC, LENGTH = 0x0002
+ VECT47 : ORIGIN = 0xFFEE, LENGTH = 0x0002
+ VECT48 : ORIGIN = 0xFFF0, LENGTH = 0x0002
+ VECT49 : ORIGIN = 0xFFF2, LENGTH = 0x0002
+ VECT50 : ORIGIN = 0xFFF4, LENGTH = 0x0002
+ VECT51 : ORIGIN = 0xFFF6, LENGTH = 0x0002
+ VECT52 : ORIGIN = 0xFFF8, LENGTH = 0x0002
+ VECT53 : ORIGIN = 0xFFFA, LENGTH = 0x0002
+ VECT54 : ORIGIN = 0xFFFC, LENGTH = 0x0002
+ RESETVEC : ORIGIN = 0xFFFE, LENGTH = 0x0002
+}
+
+SECTIONS
+{
+ .leaRAM : {} > LEARAM
+ .jtagsignature : {} > JTAGSIGNATURE
+ .bslsignature : {} > BSLSIGNATURE
+ .ipe :
+ {
+ KEEP (*(.ipesignature))
+ KEEP (*(.jtagpassword))
+ } > IPESIGNATURE
+
+ __interrupt_vector_0 : { KEEP (*(__interrupt_vector_0 )) } > VECT0
+ __interrupt_vector_1 : { KEEP (*(__interrupt_vector_1 )) } > VECT1
+ __interrupt_vector_2 : { KEEP (*(__interrupt_vector_2 )) } > VECT2
+ __interrupt_vector_3 : { KEEP (*(__interrupt_vector_3 )) } > VECT3
+ __interrupt_vector_4 : { KEEP (*(__interrupt_vector_4 )) } > VECT4
+ __interrupt_vector_5 : { KEEP (*(__interrupt_vector_5 )) } > VECT5
+ __interrupt_vector_6 : { KEEP (*(__interrupt_vector_6 )) } > VECT6
+ __interrupt_vector_7 : { KEEP (*(__interrupt_vector_7 )) } > VECT7
+ __interrupt_vector_8 : { KEEP (*(__interrupt_vector_8 )) } > VECT8
+ __interrupt_vector_9 : { KEEP (*(__interrupt_vector_9 )) } > VECT9
+ __interrupt_vector_10 : { KEEP (*(__interrupt_vector_10 )) } > VECT10
+ __interrupt_vector_11 : { KEEP (*(__interrupt_vector_11 )) } > VECT11
+ __interrupt_vector_12 : { KEEP (*(__interrupt_vector_12 )) } > VECT12
+ __interrupt_vector_13 : { KEEP (*(__interrupt_vector_13 )) } > VECT13
+ __interrupt_vector_14 : { KEEP (*(__interrupt_vector_14 )) } > VECT14
+ __interrupt_vector_15 : { KEEP (*(__interrupt_vector_15 )) } > VECT15
+ __interrupt_vector_16 : { KEEP (*(__interrupt_vector_16 )) } > VECT16
+ __interrupt_vector_17 : { KEEP (*(__interrupt_vector_17 )) } > VECT17
+ __interrupt_vector_18 : { KEEP (*(__interrupt_vector_18)) KEEP (*(__interrupt_vector_lea)) } > VECT18
+ __interrupt_vector_19 : { KEEP (*(__interrupt_vector_19)) KEEP (*(__interrupt_vector_port8)) } > VECT19
+ __interrupt_vector_20 : { KEEP (*(__interrupt_vector_20)) KEEP (*(__interrupt_vector_port7)) } > VECT20
+ __interrupt_vector_21 : { KEEP (*(__interrupt_vector_21)) KEEP (*(__interrupt_vector_eusci_b3)) } > VECT21
+ __interrupt_vector_22 : { KEEP (*(__interrupt_vector_22)) KEEP (*(__interrupt_vector_eusci_b2)) } > VECT22
+ __interrupt_vector_23 : { KEEP (*(__interrupt_vector_23)) KEEP (*(__interrupt_vector_eusci_b1)) } > VECT23
+ __interrupt_vector_24 : { KEEP (*(__interrupt_vector_24)) KEEP (*(__interrupt_vector_eusci_a3)) } > VECT24
+ __interrupt_vector_25 : { KEEP (*(__interrupt_vector_25)) KEEP (*(__interrupt_vector_eusci_a2)) } > VECT25
+ __interrupt_vector_26 : { KEEP (*(__interrupt_vector_26)) KEEP (*(__interrupt_vector_port6)) } > VECT26
+ __interrupt_vector_27 : { KEEP (*(__interrupt_vector_27)) KEEP (*(__interrupt_vector_port5)) } > VECT27
+ __interrupt_vector_28 : { KEEP (*(__interrupt_vector_28)) KEEP (*(__interrupt_vector_timer4_a1)) } > VECT28
+ __interrupt_vector_29 : { KEEP (*(__interrupt_vector_29)) KEEP (*(__interrupt_vector_timer4_a0)) } > VECT29
+ __interrupt_vector_30 : { KEEP (*(__interrupt_vector_30)) KEEP (*(__interrupt_vector_aes256)) } > VECT30
+ __interrupt_vector_31 : { KEEP (*(__interrupt_vector_31)) KEEP (*(__interrupt_vector_rtc_c)) } > VECT31
+ __interrupt_vector_32 : { KEEP (*(__interrupt_vector_32)) KEEP (*(__interrupt_vector_port4)) } > VECT32
+ __interrupt_vector_33 : { KEEP (*(__interrupt_vector_33)) KEEP (*(__interrupt_vector_port3)) } > VECT33
+ __interrupt_vector_34 : { KEEP (*(__interrupt_vector_34)) KEEP (*(__interrupt_vector_timer3_a1)) } > VECT34
+ __interrupt_vector_35 : { KEEP (*(__interrupt_vector_35)) KEEP (*(__interrupt_vector_timer3_a0)) } > VECT35
+ __interrupt_vector_36 : { KEEP (*(__interrupt_vector_36)) KEEP (*(__interrupt_vector_port2)) } > VECT36
+ __interrupt_vector_37 : { KEEP (*(__interrupt_vector_37)) KEEP (*(__interrupt_vector_timer2_a1)) } > VECT37
+ __interrupt_vector_38 : { KEEP (*(__interrupt_vector_38)) KEEP (*(__interrupt_vector_timer2_a0)) } > VECT38
+ __interrupt_vector_39 : { KEEP (*(__interrupt_vector_39)) KEEP (*(__interrupt_vector_port1)) } > VECT39
+ __interrupt_vector_40 : { KEEP (*(__interrupt_vector_40)) KEEP (*(__interrupt_vector_timer1_a1)) } > VECT40
+ __interrupt_vector_41 : { KEEP (*(__interrupt_vector_41)) KEEP (*(__interrupt_vector_timer1_a0)) } > VECT41
+ __interrupt_vector_42 : { KEEP (*(__interrupt_vector_42)) KEEP (*(__interrupt_vector_dma)) } > VECT42
+ __interrupt_vector_43 : { KEEP (*(__interrupt_vector_43)) KEEP (*(__interrupt_vector_eusci_a1)) } > VECT43
+ __interrupt_vector_44 : { KEEP (*(__interrupt_vector_44)) KEEP (*(__interrupt_vector_timer0_a1)) } > VECT44
+ __interrupt_vector_45 : { KEEP (*(__interrupt_vector_45)) KEEP (*(__interrupt_vector_timer0_a0)) } > VECT45
+ __interrupt_vector_46 : { KEEP (*(__interrupt_vector_46)) KEEP (*(__interrupt_vector_adc12_b)) } > VECT46
+ __interrupt_vector_47 : { KEEP (*(__interrupt_vector_47)) KEEP (*(__interrupt_vector_eusci_b0)) } > VECT47
+ __interrupt_vector_48 : { KEEP (*(__interrupt_vector_48)) KEEP (*(__interrupt_vector_eusci_a0)) } > VECT48
+ __interrupt_vector_49 : { KEEP (*(__interrupt_vector_49)) KEEP (*(__interrupt_vector_wdt)) } > VECT49
+ __interrupt_vector_50 : { KEEP (*(__interrupt_vector_50)) KEEP (*(__interrupt_vector_timer0_b1)) } > VECT50
+ __interrupt_vector_51 : { KEEP (*(__interrupt_vector_51)) KEEP (*(__interrupt_vector_timer0_b0)) } > VECT51
+ __interrupt_vector_52 : { KEEP (*(__interrupt_vector_52)) KEEP (*(__interrupt_vector_comp_e)) } > VECT52
+ __interrupt_vector_53 : { KEEP (*(__interrupt_vector_53)) KEEP (*(__interrupt_vector_unmi)) } > VECT53
+ __interrupt_vector_54 : { KEEP (*(__interrupt_vector_54)) KEEP (*(__interrupt_vector_sysnmi)) } > VECT54
+ __reset_vector : { KEEP (*(__interrupt_vector_55)) KEEP (*(__interrupt_vector_reset)) KEEP (*(.resetvec)) } > RESETVEC
+
+ .lower.rodata :
+ {
+ . = ALIGN(2);
+ *(.lower.rodata.* .lower.rodata)
+ } > FRAM
+
+ .rodata :
+ {
+ . = ALIGN(2);
+ *(.plt)
+ *(.rodata .rodata.* .gnu.linkonce.r.* .const .const:*)
+ *(.rodata1)
+ /* Note: By default we do not have this line:
+
+ *(.either.rodata.*) *(.either.rodata)
+
+ defined here, or anywhere else in this script. This is deliberate.
+ The algorithm in the linker that automatically places rodata into
+ either the .rodata or the .upper.rodata sections relies upon the
+ fact that the .either.rodata section is not defined, and that the
+ .upper.rodata section is defined. If the .upper.rodata is not
+ defined in this script then the line above should be restored so that
+ code compiled with -mdata-region=either enabled will still work.
+
+ The same reasoning applies to the absence of definitions for the
+ .either.text, .either.data and .either.bss sections as well. */
+
+ KEEP (*(.gcc_except_table)) *(.gcc_except_table.*)
+ PROVIDE (__preinit_array_start = .);
+ KEEP (*(.preinit_array))
+ PROVIDE (__preinit_array_end = .);
+ PROVIDE (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array))
+ PROVIDE (__init_array_end = .);
+ PROVIDE (__fini_array_start = .);
+ KEEP (*(.fini_array))
+ KEEP (*(SORT(.fini_array.*)))
+ PROVIDE (__fini_array_end = .);
+ } > FRAM
+
+ /* Note: Separate .rodata section for sections which are
+ read only but which older linkers treat as read-write.
+ This prevents older linkers from marking the entire .rodata
+ section as read-write. */
+ .rodata2 : {
+ . = ALIGN(2);
+ *(.eh_frame_hdr)
+ KEEP (*(.eh_frame))
+ /* gcc uses crtbegin.o to find the start of the constructors, so
+ we make sure it is first. Because this is a wildcard, it
+ doesn't matter if the user does not actually link against
+ crtbegin.o; the linker won't look for a file to match a
+ wildcard. The wildcard also means that it doesn't matter which
+ directory crtbegin.o is in. */
+ KEEP (*crtbegin*.o(.ctors))
+
+ /* We don't want to include the .ctor section from from the
+ crtend.o file until after the sorted ctors. The .ctor section
+ from the crtend file contains the end of ctors marker and it
+ must be last */
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+
+ KEEP (*crtbegin*.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ } > FRAM
+
+ /* This section contains data that is not initialised during load
+ or application reset. */
+ .persistent :
+ {
+ . = ALIGN(2);
+ PROVIDE (__persistent_start = .);
+ *(.persistent)
+ . = ALIGN(2);
+ PROVIDE (__persistent_end = .);
+ } > FRAM
+
+ .upper.rodata :
+ {
+ /* Note: If this section is not defined then please add:
+
+ *(.either.rodata.*) *(.either.rodata)
+
+ to the definition of the .rodata section above. This
+ will allow code compiled with -mdata-region=either to
+ work properly. */
+ *(.upper.rodata.* .upper.rodata)
+ } > FRAM2
+
+ .tinyram : {} > TINYRAM
+
+ .fram_vars : {} > FRAM
+
+ .lower.data :
+ {
+ . = ALIGN(2);
+ PROVIDE (__datastart = .);
+ PROVIDE (__data_low = .);
+ *(.lower.data.* .lower.data)
+ } > RAM AT> FRAM
+
+ .data :
+ {
+ . = ALIGN(2);
+ PROVIDE (__datastart = .);
+ PROVIDE (__data_low = .);
+
+ KEEP (*(.jcr))
+ *(.data.rel.ro.local) *(.data.rel.ro*)
+ *(.dynamic)
+
+ *(.data .data.* .gnu.linkonce.d.*)
+ KEEP (*(.gnu.linkonce.d.*personality*))
+ SORT(CONSTRUCTORS)
+ *(.data1)
+ *(.got.plt) *(.got)
+
+ /* We want the small data sections together, so single-instruction offsets
+ can access them all, and initialized data all before uninitialized, so
+ we can shorten the on-disk segment size. */
+ . = ALIGN(2);
+ *(.sdata .sdata.* .gnu.linkonce.s.* D_2 D_1)
+
+ /* See the note in .rodata section about why we do not have this line here:
+
+ *(.either.data.* .either.data)
+ */
+ . = ALIGN(2);
+ _edata = .;
+ PROVIDE (edata = .);
+ PROVIDE (__dataend = .);
+ PROVIDE (__data_high = .);
+ } > RAM AT> FRAM
+
+ /* Note that crt0 assumes this is a multiple of two; all the
+ start/stop symbols are also assumed word-aligned. */
+ PROVIDE(__romdatastart = LOADADDR(.lower.data));
+ PROVIDE (__romdatacopysize = SIZEOF(.lower.data) + SIZEOF(.data));
+ PROVIDE(__data_loadLow = LOADADDR(.lower.data));
+ PROVIDE(__data_loadHigh = LOADADDR(.lower.data) + SIZEOF(.lower.data) + SIZEOF(.data));
+
+.mmdata : {
+ PROVIDE(__mmdata_start = .);
+ *(.mmdata)
+ PROVIDE(__mmdata_end = .);
+} >RAM AT> FRAM
+
+PROVIDE(__mmdata_loadStart = LOADADDR(.mmdata));
+PROVIDE(__mmdata_loadEnd = LOADADDR(.mmdata) + SIZEOF(.mmdata));
+
+.npdata : {
+ PROVIDE(__npdata_low = .);
+ *(.npdata)
+ PROVIDE(__npdata_high = .);
+} >RAM AT> FRAM
+
+PROVIDE(__npdata_loadLow = LOADADDR(.npdata));
+PROVIDE(__npdata_loadHigh = LOADADDR(.npdata) + SIZEOF(.npdata));
+
+/* Boot stack */
+.boot_stack (NOLOAD) : {
+ __boot_stack_low = .;
+ . += __boot_stack_size;
+ __boot_stack_high = .;
+} > RAM
+
+ .lower.bss :
+ {
+ . = ALIGN(2);
+ PROVIDE (__bssstart = .);
+ PROVIDE (__bss_low = .);
+ *(.lower.bss.* .lower.bss)
+ } > RAM
+
+ .bss (NOLOAD) :
+ {
+ . = ALIGN(2);
+ PROVIDE (__bssstart = .);
+ PROVIDE (__bss_low = .);
+ *(.dynbss)
+ *(.sbss .sbss.*)
+ *(.bss .bss.* .gnu.linkonce.b.*)
+ /* See the note in .rodata section about why we do not have this line here:
+
+ *(.either.bss.* .either.bss)
+ */
+ . = ALIGN(2);
+ *(COMMON)
+ PROVIDE (__bssend = .);
+ PROVIDE (__bss_high = .);
+ } > RAM
+
+ PROVIDE (__bsssize = SIZEOF(.lower.bss) + SIZEOF(.bss));
+
+ /* This section contains data that is not initialised during load
+ or application reset. */
+ .noinit (NOLOAD) :
+ {
+ . = ALIGN(2);
+ PROVIDE (__noinit_start = .);
+ *(.noinit)
+ . = ALIGN(2);
+ PROVIDE (__noinit_end = .);
+ } > RAM
+
+ .upper.bss :
+ {
+ /* Note - if this section is not going to be defined then please
+ add this line back into the definition of the .bss section above:
+
+ *(.either.bss.* .either.bss)
+ */
+ . = ALIGN(2);
+ __high_bssstart = .;
+ *(.upper.bss.* .upper.bss)
+ . = ALIGN(2);
+ __high_bssend = .;
+ } > FRAM2
+ __high_bsssize = SIZEOF(.upper.bss);
+
+ /* We create this section so that "end" will always be in the
+ RAM region (matching .stack below), even if the .bss
+ section is empty. */
+ .heap (NOLOAD) :
+ {
+ . = ALIGN(2);
+ __heap_start__ = .;
+ _end = __heap_start__;
+ PROVIDE (end = .);
+ KEEP (*(.heap))
+ _end = .;
+ PROVIDE (end = .);
+ /* This word is here so that the section is not empty, and thus
+ not discarded by the linker. The actual value does not matter
+ and is ignored. */
+ LONG(0);
+ __heap_end__ = .;
+ __HeapLimit = __heap_end__;
+ } > RAM
+ /* WARNING: Do not place anything in RAM here.
+ The heap section must be the last section in RAM and the stack
+ section must be placed at the very end of the RAM region. */
+ .stack (ORIGIN (RAM) + LENGTH(RAM) - __stack_size) :
+ {
+ PROVIDE (__stack = .);
+ PROVIDE (__stack_low = .);
+ *(.stack)
+ . += __stack_size;
+ PROVIDE (__STACK_END = .);
+ PROVIDE (__stack_high = .);
+ }
+
+ .lower.text :
+ {
+ . = ALIGN(2);
+ *(.lower.text.* .lower.text)
+ } > FRAM
+
+ .text :
+ {
+ PROVIDE (_start = .);
+
+ . = ALIGN(2);
+ KEEP (*(SORT(.crt_*)))
+
+ . = ALIGN(2);
+ *(.lower.text.* .lower.text)
+
+ . = ALIGN(2);
+ *(.text .stub .text.* .gnu.linkonce.t.* .text:*)
+ /* See the note in .rodata section about why we do not have this line here:
+
+ *(.either.text.* .either.text)
+
+ */
+
+ KEEP (*(.text.*personality*))
+ /* .gnu.warning sections are handled specially by elf32.em. */
+ *(.gnu.warning)
+ *(.interp .hash .dynsym .dynstr .gnu.version*)
+ PROVIDE (__etext = .);
+ PROVIDE (_etext = .);
+ PROVIDE (etext = .);
+ . = ALIGN(2);
+ KEEP (*(.init))
+ KEEP (*(.fini))
+ KEEP (*(.tm_clone_table))
+ } > FRAM
+
+ .upper.text :
+ {
+ /* Note - if this section is not going to be included in the script
+ then please add this line back into the definition of the .text
+ section above:
+
+ *(.either.text.* .either.text)
+ */
+ . = ALIGN(2);
+ *(.upper.text.* .upper.text)
+ } > FRAM2
+
+ /* MSP430 INFO FLASH MEMORY SEGMENTS */
+ .infoD (NOLOAD) : {} > INFOD
+ .infoC (NOLOAD) : {} > INFOC
+ .infoB (NOLOAD) : {} > INFOB
+ .infoA (NOLOAD) : {} > INFOA
+
+
+ /* The rest are all not normally part of the runtime image. */
+
+ .MSP430.attributes 0 :
+ {
+ KEEP (*(.MSP430.attributes))
+ KEEP (*(.gnu.attributes))
+ KEEP (*(__TI_build_attributes))
+ }
+
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1. */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions. */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2. */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2. */
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions. */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+ /* DWARF 3 */
+ .debug_pubtypes 0 : { *(.debug_pubtypes) }
+ .debug_ranges 0 : { *(.debug_ranges) }
+ /* DWARF Extension. */
+ .debug_macro 0 : { *(.debug_macro) }
+
+ /DISCARD/ : { *(.note.GNU-stack) }
+}
+
+/****************************************************************************/
+/* Include peripherals memory map */
+/****************************************************************************/
+
+INCLUDE msp430fr5994_symbols.ld
diff --git a/source/lib/hal_mcu/hal_fr5_timer.c b/source/lib/hal_mcu/hal_fr5_timer.c
index 4232eae1e562be2b9b1a51887c00cc57d42945d5..129003bf7fbafb9777948b5711a49159b3d491ea 100644
--- a/source/lib/hal_mcu/hal_fr5_timer.c
+++ b/source/lib/hal_mcu/hal_fr5_timer.c
@@ -283,7 +283,7 @@ unsigned int hal_timer_wait(unsigned int time) {
* @return void
*
*/
-HAL_ISR_FUNC_DECLARATION(TIMER_A1,timer_a1_isr){
+HAL_ISR_FUNC_DECLARATION(timer_a1_isr,TIMER_A1){
//#pragma vector=TIMERB1_VECTOR
//__interrupt void TIMERB1_ISR(void) {
diff --git a/source/lib/radio_drv/cc1101_drv/cc1101_drv.c b/source/lib/radio_drv/cc1101_drv/cc1101_drv.c
index 0cd943e54320b98762c8c728c6d61759d6a06e1a..73236ba492e8080f1c6a185c363c53e9858e2729 100644
--- a/source/lib/radio_drv/cc1101_drv/cc1101_drv.c
+++ b/source/lib/radio_drv/cc1101_drv/cc1101_drv.c
@@ -845,8 +845,7 @@ int radio_freq_error(void) {
* @return void
*
*/
-#pragma vector=RF_PORT_VECTOR
-__interrupt void radio_isr(void) {
+HAL_ISR_FUNC_DECLARATION(radio_isr,RF_PORT){
if(RF_GDO_PxIFG & RF_GDO_PIN) {
diff --git a/source/lib/radio_drv/hal_spi_rf_exp430fr5994.h b/source/lib/radio_drv/hal_spi_rf_exp430fr5994.h
index ce25f56409a8c7800de417c012176fbd20e316a2..47b20b6eca81c6ad3fd9be7c81ec14795cb22964 100644
--- a/source/lib/radio_drv/hal_spi_rf_exp430fr5994.h
+++ b/source/lib/radio_drv/hal_spi_rf_exp430fr5994.h
@@ -109,16 +109,16 @@ extern "C" {
#define RF_GDO_PIN BIT7
/* Optional button interrupt configuration */
-#define BUTTON_VECTOR PORT5_VECTOR
-#define BUTTON_OUT P5DIR
-#define BUTTON_DIR P5DIR
-#define BUTTON_IN P5IN
-#define BUTTON_SEL P5SEL
-#define BUTTON_PxIES P5IES
-#define BUTTON_PxIFG P5IFG
-#define BUTTON_PxIE P5IE
-#define BUTTON_PIN BIT5
-#define BUTTON_REN P5REN
+#define BUTTON_VECTOR PORT8_VECTOR
+#define BUTTON_OUT P8DIR
+#define BUTTON_DIR P8DIR
+#define BUTTON_IN P8IN
+#define BUTTON_SEL P8SEL
+#define BUTTON_PxIES P8IES
+#define BUTTON_PxIFG P8IFG
+#define BUTTON_PxIE P8IE
+#define BUTTON_PIN BIT1
+#define BUTTON_REN P1REN
/* Macro to enable LEDs */
#define LED1_PxOUT P1OUT
diff --git a/source/test/LaunchPad_trx_main.c b/source/test/LaunchPad_trx_main.c
index 9baad4d8a29f5a8a0a3e69edcd59e4da34af2a77..698e20d42cdbc7069374571123159654b05846d2 100644
--- a/source/test/LaunchPad_trx_main.c
+++ b/source/test/LaunchPad_trx_main.c
@@ -136,11 +136,12 @@ void main (void)
/* indicator that button has been pressed */
user_button_pushed = 0;
- /* Infinite loop with a 1 second timer */
+ /* Infinite loop with a 0.5 second timer */
while(1)
{
/* Put MCU in low power mode, wait for UART and blink LED */
+ /* Or wait for WDT or button press */
HAL_LED2_OFF();
_BIS_SR(LPM0_bits + GIE);
HAL_LED2_ON();
@@ -155,7 +156,7 @@ void main (void)
}
/*
- * For each idle loop (1 second) a counter is incremented, if check to see
+ * For each idle loop (0.5 second) a counter is incremented, if check to see
* if we have had 60 idle loops, if so we enter a default action. This enables
* the board to automatically start doing something (used for becoming a
* reciever in a TX/RX BER system
@@ -294,10 +295,9 @@ void main (void)
* @return void
*
*/
-#pragma vector=WDT_VECTOR
-__interrupt void wdt_isr (void)
+HAL_ISR_FUNC_DECLARATION(wdt_isr,WDT)
{
- /* global "1-second" counter used for printing time stamped packet sniffer data */
+ /* global "0.5 second" counter used for printing time stamped packet sniffer data */
time_counter++;
/* check to see if wake on wdt is enabled */
@@ -324,8 +324,7 @@ __interrupt void wdt_isr (void)
* @return void
*
*/
-#pragma vector=BUTTON_VECTOR
-__interrupt void button_isr(void)
+HAL_ISR_FUNC_DECLARATION(button_isr,BUTTON)
{
/* reset the RF_GDO_PIN */
BUTTON_PxIFG &= ~BUTTON_PIN;