| Prev Page | Hierarchy | Files | Modules | Signals | Tasks | Functions | Help |
| A | B | C | D | E | F | G | H | I | L | M | N | O | P | R | S | T | U | W | X |
| R |
| Connects up to: | cortexm0_pmu:u_sysisolaten:FCLK , cortexm0_pmu:u_sysretainn:FCLK , cortexm0_pmu:u_syspwrdown:FCLK , cortexm0_pmu:u_dbgisolaten:FCLK , cortexm0_pmu:u_cdbgpwrupack:FCLK |
| Connects up to: | cortexm0_pmu:u_dbgpwrdown:FCLK |
| Connects up to: | cortexm0_pmu:u_dbgpwrdown:nxt_dbg_pdn |
| Connects up to: | cortexm0_pmu:u_dbgpwrdown:DBGPWRDOWN |
| Connects up to: | cortexm0_pmu:u_dbgpwrdown:up_dbg_pdn |
| Connects up to: | cortexm0_pmu:u_dbgpwrdown:PORESETn |
| Connects up to: | cmsdk_mcu_system:u_cmsdk_mcu_sysctrl:remap_ctrl |
| Connects up to: | cmsdk_mcu_system:u_addr_decode:remap_ctrl |
| Connects down to: | cmsdk_mcu_addr_decode:u_addr_decode:remap_ctrl , cmsdk_mcu_sysctrl:u_cmsdk_mcu_sysctrl:REMAP |
| Connects up to: | tb_cmsdk_mcu:u_cmsdk_uart_capture:NRST |
| Connects up to: | CORTEXM0INTEGRATION:u_dpreset_sync:RSTBYPASS |
| Connects up to: | cortexm0_rst_ctl:u_poresetn_sync:RSTBYPASS , cortexm0_rst_ctl:u_hresetn_sync:RSTBYPASS , cortexm0_rst_ctl:u_dbgresetn_sync:RSTBYPASS |
| Connects up to: | cmsdk_mcu:u_cmsdk_mcu_clkctrl:TESTMODE |
| Connects down to: | CORTEXM0INTEGRATION:u_cortex_m0_integration:RSTBYPASS |
| Connects up to: | cmsdk_mcu:u_cmsdk_mcu_system:TESTMODE |
| Connects down to: | cm0_dbg_reset_sync:u_dpreset_sync:RSTBYPASS |
| Connects up to: | cmsdk_mcu_system:u_cortex_m0_integration:RSTBYPASS |
| Connects down to: | cm0_rst_sync:u_poresetn_sync:RSTBYPASS , cm0_rst_sync:u_hresetn_sync:RSTBYPASS , cm0_rst_sync:u_dbgresetn_sync:RSTBYPASS |
| Connects up to: | CORTEXM0INTEGRATION:u_dpreset_sync:PORESETn |
| Connects up to: | cortexm0_rst_ctl:u_poresetn_sync:GLOBALRESETn , cortexm0_rst_ctl:u_hresetn_sync:GLOBALRESETn , cortexm0_rst_ctl:u_dbgresetn_sync:GLOBALRESETn |
| Connects up to: | CORTEXM0INTEGRATION:u_dpreset_sync:dp_reset_n |
| Connects up to: | cortexm0_rst_ctl:u_dbgresetn_sync:DBGRESETn , cortexm0_rst_ctl:u_hresetn_sync:HRESETn , cortexm0_rst_ctl:u_poresetn_sync:PORESETn |
| Connects up to: | cortexm0_rst_ctl:u_hresetn_sync:HRESETREQ , cortexm0_rst_ctl:u_dbgresetn_sync:dbg_reset_req_sync |
| Connects up to: | cortexm0_rst_ctl:u_dbgreset_req:PMUDBGRESETREQ , cortexm0_rst_ctl:u_hreset_req:h_reset_req_in |
| Connects up to: | cortexm0_rst_ctl:u_hreset_req:HRESETREQ , cortexm0_rst_ctl:u_dbgreset_req:dbg_reset_req_sync |
| Connects up to: | tb_cmsdk_mcu:u_cmsdk_uart_capture:P1 |
| Connects down to: | CORTEXM0INTEGRATION:u_cortex_m0_integration:RXEV |
| Connects up to: | cmsdk_mcu_system:u_cortex_m0_integration:RXEV |
| Connects down to: | CORTEXM0:u_cortexm0:RXEV |
| A | B | C | D | E | F | G | H | I | L | M | N | O | P | R | S | T | U | W | X |
| Next Page | Hierarchy | Files | Modules | Signals | Tasks | Functions | Help |
| This page: | Created: | Wed Nov 24 14:08:43 2021 |
| Verilog converted to html by v2html 7.30.1.3 (written by Costas Calamvokis). | Help |