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Zbeta_BetaCDF.R

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  • makefile.fpga 5.26 KiB
    #-----------------------------------------------------------------------------
    # NanoSoC FPGA Flow Makefile 
    # A joint work commissioned on behalf of SoC Labs, under Arm Academic Access license.
    #
    # Contributors
    #
    # David Mapstone (d.a.mapstone@soton.ac.uk)
    #
    # Copyright (C) 2021-3, SoC Labs (www.soclabs.org)
    #-----------------------------------------------------------------------------
    
    # Get properties for FPGA Boards
    include $(SOCLABS_NANOSOC_TECH_DIR)/fpga/makefile.targets
    
    # Vivado Options
    VIVIADO_VERSION  ?= 2021_1
    
    # NanoSoC Synthesis Properties
    NANOSOC_VENDOR   ?= soclabs.org
    NANOSOC_CORE_REV ?= 2
    
    # Top-level of RTL design to Implement
    COMPONENT_TOP    ?= nanosoc_chip
    
    # Name of Implemented Chip Design (Including Socket IP)
    DESIGN_NAME      ?= nanosoc_design
    
    # Location to build FPGA files
    IMPLEMENTATION_DIR   ?= $(SOCLABS_PROJECT_DIR)/imp/fpga
    RUN_DIR              := $(IMPLEMENTATION_DIR)/run
    IMP_NANOSOC_DIR      := $(IMPLEMENTATION_DIR)/nanosoc
    IMP_SOCKET_DIR       := $(IMPLEMENTATION_DIR)/socket
    PROJECT_DIR          := $(IMPLEMENTATION_DIR)/targets/$(BOARD_NAME)
    
    # Location of Defines File
    DEFINES_DIR          := $(SOCLABS_PROJECT_DIR)/system/src/defines/
    DEFINES_FILE         := $(DEFINES_DIR)/gen_defines.v
    
    # Name of generated filelist by python script
    TCL_FLIST_DIR        := $(IMP_NANOSOC_DIR)/flist
    TCL_OUTPUT_FILELIST  := $(TCL_FLIST_DIR)/gen_flist.tcl
    GENUS_OUTPUT_FILELIST := $(TCL_FLIST_DIR)/genus_flist.tcl
    
    # NanoSoC Tech Flow Dependencies
    NANOSOC_FPGA_FLOW_DIR := $(SOCLABS_NANOSOC_TECH_DIR)/fpga
    
    # Directory to look for FPGA specific implementation files
    TARGET_DIR            ?= $(NANOSOC_FPGA_FLOW_DIR)/targets/$(BOARD_NAME)
    TARGET_TCL_DIR        := $(TARGET_DIR)/vivado_script/$(VIVIADO_VERSION)
    PINMAP_FILE           ?= $(TARGET_DIR)/fpga_pinmap.xdc
    
    # NanoSoC Tech Socket Design Dependencies
    RTL_SOCKET_DIR        := $(SOCLABS_SOCDEBUG_TECH_DIR)/socket/vivado_packages
    
    # Define Bitfile Output Directory depending on Platform
    ifeq ($(PLATFORM), bare)
    	OUTPUT_DIR ?=  $(IMPLEMENTATION_DIR)/output/$(BOARD_NAME)
    else ifeq ($(PLATFORM), pynq)
    	OUTPUT_DIR ?=  $(IMPLEMENTATION_DIR)/output/$(BOARD_NAME)/overlays
    endif
    
    # Compile Testcodes and Bootrom
    code:
    	@echo Compiling Firmware
    	@$(MAKE) -C $(SOCLABS_NANOSOC_TECH_DIR) bootrom
    
    # Generate TCL filelist from flists
    flist_tcl_nanosoc: gen_defs
    	@mkdir -p $(TCL_FLIST_DIR)
    	@(cd $(TCL_FLIST_DIR); \